From 85d1d103b758ed47024a78981f5d8d8a0688c8a6 Mon Sep 17 00:00:00 2001 From: Zane Kaminski Date: Tue, 29 Mar 2022 04:23:54 -0400 Subject: [PATCH] Better CPLD stuff --- .gitignore | 4 +- MXSE.v.textClipping | Bin 0 -> 185 bytes cpld/{MXSE.ucf => WarpSE-XC95144XL.ucf} | 0 cpld/{MXSE.v => WarpSE.v} | 2 +- cpld/XC95144XL/{MXSE.lso => .lso} | 0 cpld/XC95144XL/CNT_summary.html | 81 + cpld/XC95144XL/MXSE.cmd_log | 96 - cpld/XC95144XL/MXSE.gyd | 122 - cpld/XC95144XL/MXSE.jed | 1714 -- cpld/XC95144XL/MXSE.mfd | 2843 --- cpld/XC95144XL/MXSE.nga | 3 - cpld/XC95144XL/MXSE.ngc | 3 - cpld/XC95144XL/MXSE.ngd | 3 - cpld/XC95144XL/MXSE.ngr | 3 - cpld/XC95144XL/MXSE.rpt | 1816 -- cpld/XC95144XL/MXSE.stx | 0 cpld/XC95144XL/MXSE.svf | 5207 ----- cpld/XC95144XL/MXSE.tim | 0 cpld/XC95144XL/MXSE.vm6 | 8524 -------- cpld/XC95144XL/MXSE.xml | 3 - cpld/XC95144XL/MXSE_html/fit/ascii.htm | 1824 -- cpld/XC95144XL/MXSE_html/fit/defeqns.htm | 990 - cpld/XC95144XL/MXSE_html/fit/time.htm | 4 - .../XC95144XL/MXSE_html/tim/timing_report.htm | 2993 --- cpld/XC95144XL/MXSE_summary.html | 102 - cpld/XC95144XL/{MXSE.bld => WarpSE.bld} | 18 +- cpld/XC95144XL/WarpSE.cmd_log | 24 + cpld/XC95144XL/WarpSE.data | 1387 ++ cpld/XC95144XL/WarpSE.gise | 138 +- cpld/XC95144XL/WarpSE.gyd | 122 + cpld/XC95144XL/WarpSE.lso | 1 + cpld/XC95144XL/WarpSE.mfd | 2914 +++ cpld/XC95144XL/WarpSE.mod | 233 + cpld/XC95144XL/WarpSE.nga | 3 + cpld/XC95144XL/WarpSE.ngc | 3 + cpld/XC95144XL/WarpSE.ngd | 3 + cpld/XC95144XL/WarpSE.ngr | 3 + cpld/XC95144XL/{MXSE.pad => WarpSE.pad} | 6 +- cpld/XC95144XL/{MXSE.pnx => WarpSE.pnx} | 2 +- cpld/XC95144XL/{MXSE.prj => WarpSE.prj} | 2 +- cpld/XC95144XL/WarpSE.rpt | 1836 ++ cpld/XC95144XL/{MXSE.lfp => WarpSE.stx} | 0 cpld/XC95144XL/{MXSE.syr => WarpSE.syr} | 162 +- cpld/XC95144XL/WarpSE.tim | 919 + cpld/XC95144XL/{MXSE.tspec => WarpSE.tspec} | 424 +- cpld/XC95144XL/WarpSE.vm6 | 8813 +++++++++ cpld/XC95144XL/WarpSE.xise | 47 +- cpld/XC95144XL/WarpSE.xml | 3 + cpld/XC95144XL/{MXSE.xst => WarpSE.xst} | 10 +- cpld/XC95144XL/WarpSE_bld.html | 1 + .../{MXSE_build.xml => WarpSE_build.xml} | 14 +- ...vsettings.html => WarpSE_envsettings.html} | 12 +- .../{MXSE_html => WarpSE_html}/fit/applet.js | 0 .../fit/appletref.htm | 0 cpld/XC95144XL/WarpSE_html/fit/ascii.htm | 1844 ++ .../fit/asciidoc.htm | 0 cpld/XC95144XL/WarpSE_html/fit/backtop.jpg | Bin 0 -> 1651 bytes .../WarpSE_html/fit/beginstraight.gif | Bin 0 -> 352 bytes .../{MXSE_html => WarpSE_html}/fit/blank.gif | Bin cpld/XC95144XL/WarpSE_html/fit/blank.htm | 1 + cpld/XC95144XL/WarpSE_html/fit/briefview.jpg | Bin 0 -> 1254 bytes .../{MXSE_html => WarpSE_html}/fit/check.htm | 0 .../fit/checkNS4.htm | 0 .../fit/contact.gif | Bin .../WarpSE_html/fit/coolrunnerII_logo.jpg | Bin 0 -> 9562 bytes .../WarpSE_html/fit/coolrunner_logo.jpg | Bin 0 -> 11278 bytes cpld/XC95144XL/WarpSE_html/fit/defeqns.htm | 1015 + cpld/XC95144XL/WarpSE_html/fit/education.gif | Bin 0 -> 816 bytes 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cpld/XC95144XL/WarpSE_html/fit/print.jpg | Bin 0 -> 1683 bytes cpld/XC95144XL/WarpSE_html/fit/products.gif | Bin 0 -> 828 bytes cpld/XC95144XL/WarpSE_html/fit/purchase.gif | Bin 0 -> 642 bytes .../{MXSE_html => WarpSE_html}/fit/report.htm | 0 .../{MXSE_html => WarpSE_html}/fit/result.htm | 0 .../{MXSE_html => WarpSE_html}/fit/search.gif | Bin cpld/XC95144XL/WarpSE_html/fit/spacer.gif | Bin 0 -> 233 bytes .../{MXSE_html => WarpSE_html}/fit/style.css | 0 .../fit/summary.htm | 14 +- .../{MXSE_html => WarpSE_html}/fit/summary.js | 0 .../fit/summarydoc.htm | 0 cpld/XC95144XL/WarpSE_html/fit/support.gif | Bin 0 -> 760 bytes cpld/XC95144XL/WarpSE_html/fit/time.htm | 923 + .../fit/tooltips.js | 0 .../{MXSE_html => WarpSE_html}/fit/topnav.htm | 0 .../{MXSE_html => WarpSE_html}/fit/topnav.js | 0 .../WarpSE_html/fit/unmapinputdoc.htm | 65 + .../WarpSE_html/fit/unmaplogicdoc.htm | 68 + .../XC95144XL/WarpSE_html/fit/verboseview.jpg | Bin 0 -> 1262 bytes .../{MXSE_html => WarpSE_html}/fit/view.gif | Bin .../{MXSE_html => WarpSE_html}/fit/wait.htm | 0 .../XC95144XL/WarpSE_html/fit/xc9500_logo.gif | Bin 0 -> 8103 bytes .../XC95144XL/WarpSE_html/fit/xc9500_logo.jpg | Bin 0 -> 8318 bytes .../WarpSE_html/fit/xc9500xl_logo.gif | Bin 0 -> 9315 bytes .../fit/xc9500xl_logo.jpg | Bin .../WarpSE_html/fit/xc9500xv_logo.jpg | Bin 0 -> 9336 bytes cpld/XC95144XL/WarpSE_html/fit/xcenter.gif | Bin 0 -> 868 bytes cpld/XC95144XL/WarpSE_html/fit/xlogo.gif | Bin 0 -> 3407 bytes .../{MXSE_html => WarpSE_html}/fit/xml5.jpg | Bin .../{MXSE_html => WarpSE_html}/fit/xml6.jpg | Bin .../{MXSE_html => WarpSE_html}/fit/xml7.jpg | Bin .../{MXSE_html => WarpSE_html}/fit/xml8.jpg | Bin .../WarpSE_html/images/acr2_logo.jpg | Bin 0 -> 2865 bytes .../XC95144XL/WarpSE_html/images/blackBar.jpg | Bin 0 -> 750 bytes .../WarpSE_html/images/cpldBanner.jpg | Bin 0 -> 5897 bytes .../WarpSE_html/images/cr2s_logo.jpg | Bin 0 -> 2884 bytes .../WarpSE_html/images/fitterRpt.jpg | Bin 0 -> 1341 bytes cpld/XC95144XL/WarpSE_html/images/logo.jpg | Bin 0 -> 2922 bytes cpld/XC95144XL/WarpSE_html/images/spacer.jpg | Bin 0 -> 444 bytes .../WarpSE_html/images/timingRpt.jpg | Bin 0 -> 1480 bytes .../WarpSE_html/images/xa9500xl_logo.jpg | Bin 0 -> 2922 bytes .../XC95144XL/WarpSE_html/images/xbr_logo.jpg | Bin 0 -> 2865 bytes .../WarpSE_html/images/xc9500_logo.jpg | Bin 0 -> 1979 bytes .../WarpSE_html/images/xc9500xl_logo.jpg | Bin 0 -> 2922 bytes .../WarpSE_html/images/xc9500xv_logo.jpg | Bin 0 -> 2499 bytes .../WarpSE_html/images/xpla3_logo.jpg | Bin 0 -> 4130 bytes .../WarpSE_html/tim/cpldta_glossary.htm | 250 + .../WarpSE_html/tim/cpldta_style.css | 144 + cpld/XC95144XL/WarpSE_html/tim/genreport.htm | 17 + cpld/XC95144XL/WarpSE_html/tim/leftnav.htm | 37 + cpld/XC95144XL/WarpSE_html/tim/report.htm | 17 + .../WarpSE_html/tim/timing_report.htm | 16265 ++++++++++++++++ cpld/XC95144XL/WarpSE_html/tim/toc.css | 36 + cpld/XC95144XL/WarpSE_html/tim/topnav.htm | 31 + ...XSE_ngdbuild.xrpt => WarpSE_ngdbuild.xrpt} | 42 +- .../{MXSE_pad.csv => WarpSE_pad.csv} | 6 +- cpld/XC95144XL/WarpSE_summary.html | 81 + cpld/XC95144XL/WarpSE_tim.html | 1 + .../{MXSE_xst.xrpt => WarpSE_xst.xrpt} | 36 +- cpld/XC95144XL/_impact.cmd | 41 - cpld/XC95144XL/_impact.log | 77 - cpld/XC95144XL/_ngo/netlist.lst | 2 +- cpld/XC95144XL/_xmsgs/cpldfit.xmsgs | 2 +- cpld/XC95144XL/_xmsgs/hprep6.xmsgs | 9 - cpld/XC95144XL/_xmsgs/pn_parser.xmsgs | 20 +- cpld/XC95144XL/_xmsgs/xst.xmsgs | 4 +- cpld/XC95144XL/iseconfig/MXSE.xreport | 98 +- cpld/XC95144XL/iseconfig/WarpSE.projectmgr | 88 + .../{MXSE 2.xreport => WarpSE.xreport} | 100 +- cpld/XC95144XL/webtalk_pn.xml | 17 +- cpld/XC95144XL/xlnx_auto_0_xdb/cst 2.xbcd | Bin 4466 -> 0 bytes cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd | Bin 8316 -> 8004 bytes cpld/XC95144XL/xst/work/hdllib.ref | 15 +- cpld/XC95144XL/xst/work/vlg14/_r_a_m 2.bin | Bin 18234 -> 0 bytes cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin | Bin 20942 -> 20942 bytes cpld/XC95144XL/xst/work/vlg15/_m_x_s_e 2.bin | Bin 16105 -> 0 bytes cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin | Bin 21678 -> 21678 bytes cpld/XC95144XL/xst/work/vlg22/_c_s 2.bin | Bin 12744 -> 0 bytes cpld/XC95144XL/xst/work/vlg22/_c_s.bin | Bin 13511 -> 13511 bytes cpld/XC95144XL/xst/work/vlg37/_f_s_b 2.bin | Bin 6917 -> 0 bytes cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin | Bin 7217 -> 7217 bytes cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin | Bin 0 -> 21682 bytes cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin | Bin 4280 -> 4280 bytes cpld/XC95144XL/xst/work/vlg73/_i_o_b_m 2.bin | Bin 17476 -> 0 bytes cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin | Bin 19519 -> 19519 bytes cpld/XC95144XL/xst/work/vlg79/_i_o_b_s 2.bin | Bin 12663 -> 0 bytes cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin | Bin 12663 -> 12663 bytes cpld/auto_project.ipf | Bin 21260 -> 0 bytes cpld/auto_project_1.ipf | Bin 21260 -> 0 bytes cpld/impact.xsl | 55 - cpld/impact_impact.xwbt | 8 - cpld/usage_statistics_webtalk.html | 73 - cpld/webtalk.log | 16 - cpld/webtalk_impact.xml | 41 - 240 files changed, 39500 insertions(+), 28785 deletions(-) create mode 100644 MXSE.v.textClipping rename cpld/{MXSE.ucf => WarpSE-XC95144XL.ucf} (100%) rename cpld/{MXSE.v => WarpSE.v} (99%) rename cpld/XC95144XL/{MXSE.lso => .lso} (100%) create mode 100644 cpld/XC95144XL/CNT_summary.html delete mode 100644 cpld/XC95144XL/MXSE.cmd_log delete mode 100644 cpld/XC95144XL/MXSE.gyd delete mode 100644 cpld/XC95144XL/MXSE.jed delete mode 100644 cpld/XC95144XL/MXSE.mfd delete mode 100644 cpld/XC95144XL/MXSE.nga delete mode 100644 cpld/XC95144XL/MXSE.ngc delete mode 100644 cpld/XC95144XL/MXSE.ngd delete mode 100644 cpld/XC95144XL/MXSE.ngr delete mode 100644 cpld/XC95144XL/MXSE.rpt delete mode 100644 cpld/XC95144XL/MXSE.stx delete mode 100644 cpld/XC95144XL/MXSE.svf delete mode 100644 cpld/XC95144XL/MXSE.tim delete mode 100644 cpld/XC95144XL/MXSE.vm6 delete mode 100644 cpld/XC95144XL/MXSE.xml delete mode 100644 cpld/XC95144XL/MXSE_html/fit/ascii.htm delete mode 100644 cpld/XC95144XL/MXSE_html/fit/defeqns.htm delete mode 100644 cpld/XC95144XL/MXSE_html/fit/time.htm delete mode 100644 cpld/XC95144XL/MXSE_html/tim/timing_report.htm delete mode 100644 cpld/XC95144XL/MXSE_summary.html rename cpld/XC95144XL/{MXSE.bld => WarpSE.bld} (59%) create mode 100644 cpld/XC95144XL/WarpSE.cmd_log create mode 100644 cpld/XC95144XL/WarpSE.data create mode 100644 cpld/XC95144XL/WarpSE.gyd create mode 100644 cpld/XC95144XL/WarpSE.lso create mode 100644 cpld/XC95144XL/WarpSE.mfd create mode 100644 cpld/XC95144XL/WarpSE.mod create mode 100644 cpld/XC95144XL/WarpSE.nga create mode 100644 cpld/XC95144XL/WarpSE.ngc create mode 100644 cpld/XC95144XL/WarpSE.ngd create mode 100644 cpld/XC95144XL/WarpSE.ngr rename cpld/XC95144XL/{MXSE.pad => WarpSE.pad} (95%) rename cpld/XC95144XL/{MXSE.pnx => WarpSE.pnx} (83%) rename cpld/XC95144XL/{MXSE.prj => WarpSE.prj} (81%) create mode 100644 cpld/XC95144XL/WarpSE.rpt rename cpld/XC95144XL/{MXSE.lfp => WarpSE.stx} (100%) rename cpld/XC95144XL/{MXSE.syr => WarpSE.syr} (82%) create mode 100644 cpld/XC95144XL/WarpSE.tim rename cpld/XC95144XL/{MXSE.tspec => WarpSE.tspec} (65%) create mode 100644 cpld/XC95144XL/WarpSE.vm6 create mode 100644 cpld/XC95144XL/WarpSE.xml rename cpld/XC95144XL/{MXSE.xst => WarpSE.xst} (80%) create mode 100644 cpld/XC95144XL/WarpSE_bld.html rename cpld/XC95144XL/{MXSE_build.xml => WarpSE_build.xml} (94%) rename cpld/XC95144XL/{MXSE_envsettings.html => WarpSE_envsettings.html} (98%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/applet.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/appletref.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/ascii.htm rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/asciidoc.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/backtop.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/fit/beginstraight.gif rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/blank.gif (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/blank.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/briefview.jpg rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/check.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/checkNS4.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/contact.gif (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/coolrunnerII_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/fit/coolrunner_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/fit/defeqns.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/education.gif create mode 100644 cpld/XC95144XL/WarpSE_html/fit/endmkt.gif rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/eqns.htm (53%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/eqns.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/equations.gif (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/equations.htm (100%) rename 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cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FB2.htm (93%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FB3.htm (58%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FB4.htm (80%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FB5.htm (73%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FB6.htm (92%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FB7.htm (66%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FB8.htm (84%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbs_FBdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbsdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/fbview.jpg (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/functionblock.gif (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/genmsg.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/header.gif create mode 100644 cpld/XC95144XL/WarpSE_html/fit/home.gif rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/index.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/inputleft.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/inputleft.js rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/inputleftdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/leftnav.htm (94%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/leftnav.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/legend.gif (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/legend.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/fit/logic_legXC95.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/logic_legXbr.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/logic_legXpla3.htm rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/logicleft.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/logicleft.js rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/logicleftdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/logiclegend.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/logiclegendV.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/macrocell.gif (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/mapinput_00.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/mapinput_01.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/mapinput_02.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/mapinputdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/maplogic.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/maplogic_00.htm (93%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/maplogic_01.htm (93%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/maplogic_02.htm (93%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/maplogicdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/newappletref.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/next.jpg rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/ns4plugin.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/options.htm (95%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/optionsdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/paths.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pin.gif (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/pin_legXC95.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/pin_legXbr.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/pin_legXpla3.htm rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pindiagram.gif (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pinlegend.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pinlegendV.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pins.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pins.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pinsdoc.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/pinview.jpg (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/plugin.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/prev.jpg (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/print.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/fit/products.gif create mode 100644 cpld/XC95144XL/WarpSE_html/fit/purchase.gif rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/report.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/result.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/search.gif (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/spacer.gif rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/style.css (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/summary.htm (91%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/summary.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/summarydoc.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/support.gif create mode 100644 cpld/XC95144XL/WarpSE_html/fit/time.htm rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/tooltips.js (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/topnav.htm (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/topnav.js (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/unmapinputdoc.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/unmaplogicdoc.htm create mode 100644 cpld/XC95144XL/WarpSE_html/fit/verboseview.jpg rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/view.gif (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/wait.htm (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/xc9500_logo.gif create mode 100644 cpld/XC95144XL/WarpSE_html/fit/xc9500_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/fit/xc9500xl_logo.gif rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/xc9500xl_logo.jpg (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/fit/xc9500xv_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/fit/xcenter.gif create mode 100644 cpld/XC95144XL/WarpSE_html/fit/xlogo.gif rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/xml5.jpg (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/xml6.jpg (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/xml7.jpg (100%) rename cpld/XC95144XL/{MXSE_html => WarpSE_html}/fit/xml8.jpg (100%) create mode 100644 cpld/XC95144XL/WarpSE_html/images/acr2_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/blackBar.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/cpldBanner.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/cr2s_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/fitterRpt.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/spacer.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/timingRpt.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/xa9500xl_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/xbr_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/xc9500_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/xc9500xl_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/xc9500xv_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/images/xpla3_logo.jpg create mode 100644 cpld/XC95144XL/WarpSE_html/tim/cpldta_glossary.htm create mode 100644 cpld/XC95144XL/WarpSE_html/tim/cpldta_style.css create mode 100644 cpld/XC95144XL/WarpSE_html/tim/genreport.htm create mode 100644 cpld/XC95144XL/WarpSE_html/tim/leftnav.htm create mode 100644 cpld/XC95144XL/WarpSE_html/tim/report.htm create mode 100644 cpld/XC95144XL/WarpSE_html/tim/timing_report.htm create mode 100644 cpld/XC95144XL/WarpSE_html/tim/toc.css create mode 100644 cpld/XC95144XL/WarpSE_html/tim/topnav.htm rename cpld/XC95144XL/{MXSE_ngdbuild.xrpt => WarpSE_ngdbuild.xrpt} (95%) rename cpld/XC95144XL/{MXSE_pad.csv => WarpSE_pad.csv} (95%) create mode 100644 cpld/XC95144XL/WarpSE_summary.html create mode 100644 cpld/XC95144XL/WarpSE_tim.html rename cpld/XC95144XL/{MXSE_xst.xrpt => WarpSE_xst.xrpt} (87%) delete mode 100644 cpld/XC95144XL/_impact.cmd delete mode 100644 cpld/XC95144XL/_impact.log delete mode 100644 cpld/XC95144XL/_xmsgs/hprep6.xmsgs create mode 100644 cpld/XC95144XL/iseconfig/WarpSE.projectmgr rename cpld/XC95144XL/iseconfig/{MXSE 2.xreport => WarpSE.xreport} (78%) delete mode 100644 cpld/XC95144XL/xlnx_auto_0_xdb/cst 2.xbcd delete mode 100644 cpld/XC95144XL/xst/work/vlg14/_r_a_m 2.bin delete mode 100644 cpld/XC95144XL/xst/work/vlg15/_m_x_s_e 2.bin delete mode 100644 cpld/XC95144XL/xst/work/vlg22/_c_s 2.bin delete mode 100644 cpld/XC95144XL/xst/work/vlg37/_f_s_b 2.bin create mode 100644 cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin delete mode 100644 cpld/XC95144XL/xst/work/vlg73/_i_o_b_m 2.bin delete mode 100644 cpld/XC95144XL/xst/work/vlg79/_i_o_b_s 2.bin delete mode 100644 cpld/auto_project.ipf delete mode 100644 cpld/auto_project_1.ipf delete mode 100644 cpld/impact.xsl delete mode 100644 cpld/impact_impact.xwbt delete mode 100644 cpld/usage_statistics_webtalk.html delete mode 100644 cpld/webtalk.log delete mode 100644 cpld/webtalk_impact.xml diff --git a/.gitignore b/.gitignore index adc040a..a512faf 100644 --- a/.gitignore +++ b/.gitignore @@ -8,8 +8,8 @@ _autosave-* *-save.pro *-save.kicad_pcb fp-info-cache -Warp-SE-backups/* +WarpSE-backups/* *.DS_Store Documentation/Thumbs.db -Warp-SE.kicad_prl +WarpSE.kicad_prl diff --git a/MXSE.v.textClipping b/MXSE.v.textClipping new file mode 100644 index 0000000000000000000000000000000000000000..d3b00dc93e35753a67f0f78cab98f4f8afa809e4 GIT binary patch literal 185 zcmYc)$jK}&F)+Bu$P^J8;;HMBSdw^|nT3^&og-dAB{@G=FR`E?CsnVcC^03oBr`uR zF-JEyFh($ literal 0 HcmV?d00001 diff --git a/cpld/MXSE.ucf b/cpld/WarpSE-XC95144XL.ucf similarity index 100% rename from cpld/MXSE.ucf rename to cpld/WarpSE-XC95144XL.ucf diff --git a/cpld/MXSE.v b/cpld/WarpSE.v similarity index 99% rename from cpld/MXSE.v rename to cpld/WarpSE.v index 48ad708..49ffa5e 100644 --- a/cpld/MXSE.v +++ b/cpld/WarpSE.v @@ -1,4 +1,4 @@ -module MXSE( +module WarpSE( input [23:1] A_FSB, input nAS_FSB, input nLDS_FSB, diff --git a/cpld/XC95144XL/MXSE.lso b/cpld/XC95144XL/.lso similarity index 100% rename from cpld/XC95144XL/MXSE.lso rename to cpld/XC95144XL/.lso diff --git a/cpld/XC95144XL/CNT_summary.html b/cpld/XC95144XL/CNT_summary.html new file mode 100644 index 0000000..08e59ac --- /dev/null +++ b/cpld/XC95144XL/CNT_summary.html @@ -0,0 +1,81 @@ +Xilinx Design Summary + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
MXSE Project Status (03/28/2022 - 09:28:10)
Project File:WarpSE.xiseParser Errors: No Errors
Module Name:CNTImplementation State:Fitted
Target Device:xc95144xl-10TQ100
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal:Balanced
  • Routing Results:
 + 
Design Strategy:Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: 
  • Final Timing Score:
  
+ + + + + + + + + + + + 
+ + + + + + + + + + + +
Detailed Reports [-]
Report NameStatusGeneratedErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
+ 
+ + + +
Secondary Reports [-]
Report NameStatusGenerated
Post-Fit Simulation Model Report  
+ + +
Date Generated: 03/28/2022 - 09:28:10
+ \ No newline at end of file diff --git a/cpld/XC95144XL/MXSE.cmd_log b/cpld/XC95144XL/MXSE.cmd_log deleted file mode 100644 index a763bb5..0000000 --- a/cpld/XC95144XL/MXSE.cmd_log +++ /dev/null @@ -1,96 +0,0 @@ -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -hprep6 -s IEEE1149 -n MXSE -i MXSE -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm -xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd -XSLTProcess MXSE_build.xml -tsim -intstyle ise MXSE MXSE.nga -taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm -hprep6 -s IEEE1149 -n MXSE -i MXSE -hprep6 -s IEEE1149 -n MXSE -i MXSE diff --git a/cpld/XC95144XL/MXSE.gyd b/cpld/XC95144XL/MXSE.gyd deleted file mode 100644 index 576f81f..0000000 --- a/cpld/XC95144XL/MXSE.gyd +++ /dev/null @@ -1,122 +0,0 @@ -Pin Freeze File: version P.20131013 - -95144XL100 XC95144XL-10-TQ100 -A_FSB<10> S:PIN8 -A_FSB<11> S:PIN9 -A_FSB<12> S:PIN10 -A_FSB<13> S:PIN11 -A_FSB<14> S:PIN12 -A_FSB<15> S:PIN13 -A_FSB<16> S:PIN14 -A_FSB<17> S:PIN15 -A_FSB<18> S:PIN16 -A_FSB<19> S:PIN17 -A_FSB<1> S:PIN94 -A_FSB<20> S:PIN18 -A_FSB<21> S:PIN19 -A_FSB<22> S:PIN20 -A_FSB<23> S:PIN24 -A_FSB<2> S:PIN95 -A_FSB<3> S:PIN96 -A_FSB<4> S:PIN97 -A_FSB<5> S:PIN2 -A_FSB<6> S:PIN3 -A_FSB<7> S:PIN4 -A_FSB<8> S:PIN6 -A_FSB<9> S:PIN7 -SW<0> S:PIN61 -CLK2X_IOB S:PIN22 -CLK_FSB S:PIN27 -CLK_IOB S:PIN23 -E_IOB S:PIN25 -SW<1> S:PIN60 -nAS_FSB S:PIN32 -nBERR_IOB S:PIN76 -nBG_IOB S:PIN73 -nDTACK_IOB S:PIN78 -nIPL2 S:PIN92 -nLDS_FSB S:PIN30 -nRES S:PIN91 -nUDS_FSB S:PIN33 -nVPA_IOB S:PIN77 -nWE_FSB S:PIN29 -RA<11> S:PIN63 -RA<10> S:PIN55 -CLK20EN S:PIN59 -CLK25EN S:PIN58 -nBR_IOB S:PIN72 -RA<0> S:PIN53 -RA<1> S:PIN50 -RA<2> S:PIN43 -RA<3> S:PIN41 -RA<4> S:PIN40 -RA<5> S:PIN42 -RA<6> S:PIN46 -RA<7> S:PIN52 -RA<8> S:PIN54 -RA<9> S:PIN56 -nADoutLE0 S:PIN85 -nADoutLE1 S:PIN82 -nAS_IOB S:PIN81 -nAoutOE S:PIN87 -nBERR_FSB S:PIN70 -nCAS S:PIN36 -nDTACK_FSB S:PIN28 -nDinLE S:PIN86 -nDinOE S:PIN90 -nDoutOE S:PIN89 -nLDS_IOB S:PIN79 -nOE S:PIN37 -nRAMLWE S:PIN65 -nRAMUWE S:PIN66 -nRAS S:PIN64 -nROMCS S:PIN35 -nROMWE S:PIN34 -nUDS_IOB S:PIN80 -nVMA_IOB S:PIN74 -nVPA_FSB S:PIN93 - - -;The remaining section of the .gyd file is for documentation purposes only. -;It shows where your internal equations were placed in the last successful fit. - -PARTITION FB1_1 ram/BACTr iobm/RESrr iobm/RESrf fsb/ASrf - cnt/RefCnt<2> cnt/RefCnt<1> RefAck RESr2 - RESr1 RESr0 IPL2r1 IPL2r0 - ALE0S $OpTx$FX_DC$708 iobs/IOU1 iobs/IOL1 - iobm/IOS_FSM_FFd1 IOU0 -PARTITION FB2_6 iobs/IOACTr iobm/VPArr iobm/VPArf iobm/IOREQr - iobm/Er2 iobm/Er iobm/DTACKrr iobm/DTACKrf - iobm/BGr1 iobm/BGr0 iobm/BERRrr iobm/BERRrf - cnt/RefCnt<0> -PARTITION FB3_1 fsb/Ready1r EXP14_ iobs/IORW1 EXP15_ - fsb/Ready2r EXP16_ EXP17_ EXP18_ - nDTACK_FSB_OBUF EXP19_ EXP20_ -PARTITION FB3_13 EXP21_ EXP22_ fsb/VPA EXP23_ - nROMWE_OBUF iobs/Clear1 -PARTITION FB4_1 cnt/RefCnt<6> nAoutOE_OBUF cnt/RefCnt<5> cnt/RefCnt<4> - nDoutOE_OBUF nDinOE_OBUF cnt/RefCnt<3> iobs/PS_FSM_FFd1 - fsb/BERR1r cs/nOverlay1 nVPA_FSB_OBUF cnt/RefDone - cs/nOverlay0 cnt/TimeoutBPre TimeoutA IOL0 - iobs/IOReady BERR_IOBS -PARTITION FB5_1 ram/RASEL nROMCS_OBUF cnt/RefCnt<7> ram/RAMDIS2 - nCAS_OBUF nOE_OBUF EXP24_ ram/RAMDIS1 - RA_4_OBUF EXP25_ RA_3_OBUF RA_5_OBUF - iobs/Load1 RA_2_OBUF RA_6_OBUF ram/Once - EXP26_ EXP27_ -PARTITION FB6_1 iobm/ETACK nVMA_IOBout iobm/IOS_FSM_FFd3 iobm/ES<3> - iobm/ES<1> iobm/ES<0> ALE0M iobm/ES<4> - nLDS_IOBout iobm/IOS_FSM_FFd2 nUDS_IOBout nAS_IOBout - iobm/ES<2> nADoutLE1_OBUF nADoutLE0_OBUF IOACT - nDinLE_OBUF IOBERR -PARTITION FB7_1 ram/RAMReady RA_1_OBUF TimeoutB fsb/Ready0r - RA_7_OBUF RA_0_OBUF ram/RS_FSM_FFd1 RA_8_OBUF - A_FSB_21_IBUF$BUF0 $OpTx$$OpTx$FX_DC$182_INV$783 RA_9_OBUF CLK25EN_OBUF - ram/RS_FSM_FFd3 CLK20EN_OBUF$BUF0 EXP28_ EXP29_ - ram/RS_FSM_FFd2 EXP30_ -PARTITION FB8_1 EXP31_ A_FSB_19_IBUF$BUF0 EXP32_ iobs/PS_FSM_FFd2 - nRAS_OBUF nRAMLWE_OBUF RESDone nRAMUWE_OBUF - IOREQ EXP33_ EXP34_ nBERR_FSB_OBUF - EXP35_ iobs/Once Park fsb/BERR0r - EXP36_ IORW0 - diff --git a/cpld/XC95144XL/MXSE.jed b/cpld/XC95144XL/MXSE.jed deleted file mode 100644 index 9162b71..0000000 --- a/cpld/XC95144XL/MXSE.jed +++ /dev/null @@ -1,1714 +0,0 @@ -Programmer Jedec Bit Map -Date Extracted: Sun Mar 27 10:12:11 2022 - -QF93312* -QP100* -QV0* -F0* -X0* -J0 0* -N VERSION P.20131013* -N DEVICE XC95144XL-10-TQ100* -N PPMAP 2 1* -N PPMAP 17 10* -N PPMAP 18 11* -N PPMAP 19 12* -N PPMAP 21 13* -N PPMAP 22 14* -N PPMAP 23 15* -N PPMAP 24 16* -N PPMAP 26 17* -N PPMAP 28 18* -N PPMAP 29 19* -N PPMAP 4 2* -N PPMAP 30 20* -N PPMAP 33 22* -N PPMAP 35 23* -N PPMAP 36 24* -N PPMAP 37 25* -N PPMAP 42 27* -N PPMAP 44 28* -N PPMAP 47 29* -N PPMAP 6 3* -N PPMAP 49 30* -N PPMAP 54 32* -N PPMAP 56 33* -N PPMAP 57 34* -N PPMAP 58 35* -N PPMAP 59 36* -N PPMAP 60 37* -N PPMAP 62 39* -N PPMAP 8 4* -N PPMAP 63 40* -N PPMAP 64 41* -N PPMAP 68 42* -N PPMAP 69 43* -N PPMAP 72 46* -N PPMAP 77 49* -N PPMAP 79 50* -N PPMAP 82 52* -N PPMAP 86 53* -N PPMAP 88 54* -N PPMAP 90 55* -N PPMAP 92 56* -N PPMAP 95 58* -N PPMAP 96 59* -N PPMAP 11 6* -N PPMAP 97 60* -N PPMAP 98 61* -N PPMAP 102 63* -N PPMAP 103 64* -N PPMAP 104 65* -N PPMAP 105 66* -N PPMAP 107 67* -N PPMAP 109 68* -N PPMAP 12 7* -N PPMAP 112 70* -N PPMAP 114 71* -N PPMAP 116 72* -N PPMAP 117 73* -N PPMAP 118 74* -N PPMAP 123 76* -N PPMAP 125 77* -N PPMAP 127 78* -N PPMAP 130 79* -N PPMAP 13 8* -N PPMAP 134 80* -N PPMAP 135 81* -N PPMAP 136 82* -N PPMAP 139 85* -N PPMAP 140 86* -N PPMAP 141 87* -N PPMAP 143 89* -N PPMAP 15 9* -N PPMAP 144 90* -N PPMAP 145 91* -N PPMAP 146 92* -N PPMAP 147 93* -N PPMAP 149 94* -N PPMAP 153 95* -N PPMAP 155 96* -N PPMAP 157 97* -N PPMAP 160 99* -L0000000 00000100 00000000 00010100 00000000 00010000 00000000 00000000 00000000* -L0000064 00000000 00000000 10010100 00000000 00000000 00000000 01000000 00000000* -L0000128 00000000 00000000 10010000 00000000 00000000 00000000 01000000 00010000* -L0000192 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000* -L0000256 00000000 00000000 00000000 00000000 00000000 00000000 00010000 00001000* -L0000320 00000000 00000000 00001000 00000000 01010000 00000000 00000000 00000000* -L0000384 00000000 00000000 00101000 00001000 00000000 00000000 00000000 00100000* -L0000448 00000000 00000000 00101000 00001000 00010000 00000000 00010000 01000000* -L0000512 00000000 00000000 00101000 00000000 00000000 00000000 00000000 00000000* -L0000576 000000 000000 001010 000000 000000 000000 000000 000001* -L0000624 000000 000000 000000 000000 000010 000000 000000 000000* -L0000672 000000 000000 000001 000110 000000 000000 000000 100000* -L0000720 000000 000000 000001 000010 000010 000000 000000 000101* -L0000768 000000 000000 000001 000000 000000 000000 000000 000000* -L0000816 000000 000000 000001 000000 000000 000000 000000 000000* -L0000864 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000* -L0000928 00000000 00000000 00000000 00000000 00010000 00010000 00000000 00000000* -L0000992 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100* -L0001056 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000* -L0001120 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000* -L0001184 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000* -L0001248 00000000 00000000 00000100 00000000 00010000 00000000 00000000 00010000* -L0001312 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000* -L0001376 00000000 00000000 00010000 00000000 00010000 00000000 00000000 00000000* -L0001440 000000 000000 000000 000000 000000 000000 000000 000000* -L0001488 000000 000000 000000 000000 000000 000000 000000 000000* -L0001536 000000 000000 000000 000000 000010 000001 000000 000000* -L0001584 000000 000000 000000 000000 000000 000001 000000 000000* -L0001632 000000 000000 000000 000000 000010 000000 000000 000000* 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000000 000000 000000 000000 000000 000001 000000 000000* -L0093264 000000 000000 000000 000000 000000 000001 000000 000000* -C9409* -2DB1 diff --git a/cpld/XC95144XL/MXSE.mfd b/cpld/XC95144XL/MXSE.mfd deleted file mode 100644 index db7358c..0000000 --- a/cpld/XC95144XL/MXSE.mfd +++ /dev/null @@ -1,2843 +0,0 @@ -MDF Database: version 1.0 -MDF_INFO | MXSE | XC95144XL-10-TQ100 -MACROCELL | 5 | 1 | nVMA_IOBout -ATTRIBUTES | 4622082 | 0 -OUTPUTMC | 2 | 5 | 1 | 5 | 0 -INPUTS | 10 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | IOACT | iobm/VPArf | iobm/VPArr | nAoutOE -INPUTMC | 10 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 1 | 7 | 1 | 6 | 3 | 1 -EQ | 6 | - nVMA_IOB.T = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & - !iobm/ES<3> & !iobm/ES<4> - # nVMA_IOB & iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & - !iobm/ES<3> & !iobm/ES<4> & IOACT & iobm/VPArf & iobm/VPArr; - nVMA_IOB.CLK = CLK2X_IOB; // GCK - nVMA_IOB.OE = !nAoutOE; -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 11 | nAS_IOBout -ATTRIBUTES | 8816386 | 0 -OUTPUTMC | 1 | 3 | 1 -INPUTS | 4 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | nAoutOE -INPUTMC | 4 | 0 | 16 | 5 | 9 | 5 | 2 | 3 | 1 -EQ | 4 | - nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 - # iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2; - !nAS_IOB.CLK = CLK2X_IOB; // GCK - nAS_IOB.OE = !nAoutOE; -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 8 | nLDS_IOBout -ATTRIBUTES | 8685314 | 0 -INPUTS | 6 | IOL0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | IORW0 | nAoutOE -INPUTMC | 6 | 3 | 15 | 5 | 2 | 5 | 9 | 0 | 16 | 7 | 17 | 3 | 1 -EQ | 6 | - !nLDS_IOB.D = IOL0 & !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 - # IOL0 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 - # !IORW0 & IOL0 & iobm/IOS_FSM_FFd3 & - !iobm/IOS_FSM_FFd1; - !nLDS_IOB.CLK = CLK2X_IOB; // GCK - nLDS_IOB.OE = !nAoutOE; -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 10 | nUDS_IOBout -ATTRIBUTES | 8685314 | 0 -INPUTS | 6 | IOU0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | IORW0 | nAoutOE -INPUTMC | 6 | 0 | 17 | 5 | 2 | 5 | 9 | 0 | 16 | 7 | 17 | 3 | 1 -EQ | 6 | - !nUDS_IOB.D = IOU0 & !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 - # IOU0 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 - # !IORW0 & IOU0 & iobm/IOS_FSM_FFd3 & - !iobm/IOS_FSM_FFd1; - !nUDS_IOB.CLK = CLK2X_IOB; // GCK - nUDS_IOB.OE = !nAoutOE; -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 4 | 15 | ram/Once -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 10 | 4 | 15 | 4 | 3 | 6 | 0 | 6 | 6 | 6 | 12 | 4 | 4 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 17 -INPUTS | 10 | ram/Once | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | A_FSB<21> -INPUTMC | 6 | 4 | 15 | 0 | 3 | 3 | 9 | 6 | 16 | 6 | 6 | 6 | 12 -INPUTP | 4 | 54 | 36 | 30 | 29 -EQ | 13 | - ram/Once.T = ram/Once & nAS_FSB & !fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & fsb/ASrf; - ram/Once.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 11 | cnt/RefDone -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 18 | 3 | 11 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 12 | 4 | 7 | 6 | 0 | 4 | 1 | 4 | 4 | 4 | 5 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 13 | 6 | 14 | 6 | 17 -INPUTS | 10 | cnt/RefDone | RefAck | cnt/RefCnt<0> | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> | cnt/RefCnt<4> | cnt/RefCnt<7> -INPUTMC | 10 | 3 | 11 | 0 | 6 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2 -EQ | 5 | - !cnt/RefDone.D = !cnt/RefDone & !RefAck - # !cnt/RefCnt<0> & !cnt/RefCnt<5> & !cnt/RefCnt<6> & - !cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & !cnt/RefCnt<4> & - !cnt/RefCnt<7>; - cnt/RefDone.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 7 | 13 | iobs/Once -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 11 | 7 | 13 | 3 | 17 | 7 | 14 | 2 | 2 | 3 | 16 | 7 | 3 | 4 | 12 | 7 | 8 | 7 | 1 | 7 | 11 | 7 | 12 -INPUTS | 10 | A_FSB<22> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | nADoutLE1 | EXP35_.EXP | Park.EXP -INPUTMC | 7 | 7 | 13 | 7 | 3 | 3 | 7 | 0 | 3 | 5 | 13 | 7 | 12 | 7 | 14 -INPUTP | 3 | 30 | 54 | 36 -IMPORTS | 2 | 7 | 12 | 7 | 14 -EQ | 25 | - !iobs/Once.D = nAS_FSB & !fsb/ASrf - # A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd2 - # A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd2 - # A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd1 - # !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1 -;Imported pterms FB8_13 - # A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1 - # !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once - # !A_FSB<23> & !A_FSB<22> & !iobs/Once & - !cs/nOverlay1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once -;Imported pterms FB8_12 - # !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB - # !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1> - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - !iobs/Once - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & - cs/nOverlay1 -;Imported pterms FB8_15 - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once; - iobs/Once.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 9 | cs/nOverlay1 -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 43 | 4 | 15 | 7 | 12 | 7 | 17 | 6 | 3 | 6 | 9 | 2 | 4 | 2 | 13 | 2 | 1 | 4 | 3 | 2 | 7 | 2 | 17 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 6 | 6 | 0 | 6 | 7 | 6 | 17 | 2 | 15 | 2 | 0 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 8 | 6 | 10 | 6 | 14 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11 -INPUTS | 3 | cs/nOverlay0 | nAS_FSB | fsb/ASrf -INPUTMC | 2 | 3 | 12 | 0 | 3 -INPUTP | 1 | 54 -EQ | 3 | - cs/nOverlay1.D = cs/nOverlay0; - cs/nOverlay1.CLK = CLK_FSB; // GCK - cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf; -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 17 | BERR_IOBS -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 7 | 3 | 17 | 3 | 8 | 2 | 14 | 2 | 8 | 7 | 10 | 2 | 10 | 2 | 16 -INPUTS | 8 | BERR_IOBS | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | IOBERR | nADoutLE1 -INPUTMC | 7 | 3 | 17 | 0 | 3 | 7 | 13 | 7 | 3 | 1 | 5 | 5 | 17 | 5 | 13 -INPUTP | 1 | 54 -EQ | 8 | - BERR_IOBS.T = BERR_IOBS & nAS_FSB & !fsb/ASrf - # iobs/Once & BERR_IOBS & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & !IOBERR & nADoutLE1 - # iobs/Once & !BERR_IOBS & !nAS_FSB & - !iobs/PS_FSM_FFd2 & !iobs/IOACTr & IOBERR & nADoutLE1 - # iobs/Once & !BERR_IOBS & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & IOBERR & fsb/ASrf & nADoutLE1; - BERR_IOBS.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 7 | 17 | IORW0 -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 6 | 5 | 8 | 5 | 10 | 7 | 17 | 3 | 4 | 7 | 0 | 7 | 1 -INPUTS | 12 | A_FSB<14> | A_FSB<13> | A_FSB<23> | A_FSB<21> | nADoutLE1 | A_FSB<22> | cs/nOverlay1 | A_FSB<20> | IORW0 | nWE_FSB | EXP31_.EXP | EXP36_.EXP -INPUTMC | 5 | 5 | 13 | 3 | 9 | 7 | 17 | 7 | 0 | 7 | 16 -INPUTP | 7 | 19 | 18 | 36 | 29 | 30 | 28 | 47 -IMPORTS | 2 | 7 | 0 | 7 | 16 -EQ | 26 | - !IORW0.T = !IORW0 & !nWE_FSB & nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & - nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & nADoutLE1 - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - nADoutLE1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 & nADoutLE1 -;Imported pterms FB8_1 - # IORW0 & iobs/IORW1 & !nADoutLE1 - # !IORW0 & !iobs/IORW1 & !nADoutLE1 - # nAS_FSB & !fsb/ASrf & nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !IORW0 & nADoutLE1 -;Imported pterms FB8_2 - # iobs/PS_FSM_FFd2 - # iobs/PS_FSM_FFd1 - # iobs/Once & nADoutLE1 - # IORW0 & nWE_FSB & nADoutLE1 -;Imported pterms FB8_17 - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1 - # !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1; - IORW0.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 12 | cs/nOverlay0 -ATTRIBUTES | 4358928 | 0 -OUTPUTMC | 2 | 3 | 9 | 3 | 12 -INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay0 | nAS_FSB | fsb/ASrf | nRES -INPUTMC | 2 | 3 | 12 | 0 | 3 -INPUTP | 6 | 36 | 30 | 29 | 28 | 54 | 145 -EQ | 6 | - cs/nOverlay0.T = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay0 & !nAS_FSB - # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay0 & fsb/ASrf; - cs/nOverlay0.CLK = CLK_FSB; // GCK - cs/nOverlay0.AR = !nRES; -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 15 | IOL0 -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 5 | 8 -INPUTS | 5 | iobs/IOL1 | nADoutLE1 | nLDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 -INPUTMC | 4 | 0 | 15 | 5 | 13 | 7 | 3 | 3 | 7 -INPUTP | 1 | 49 -EQ | 4 | - IOL0.D = !nLDS_FSB & nADoutLE1 - # iobs/IOL1 & !nADoutLE1; - IOL0.CLK = CLK_FSB; // GCK - IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 17 | IOU0 -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 5 | 10 -INPUTS | 5 | iobs/IOU1 | nADoutLE1 | nUDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 -INPUTMC | 4 | 0 | 14 | 5 | 13 | 7 | 3 | 3 | 7 -INPUTP | 1 | 56 -EQ | 4 | - IOU0.D = !nUDS_FSB & nADoutLE1 - # iobs/IOU1 & !nADoutLE1; - IOU0.CLK = CLK_FSB; // GCK - IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 14 | TimeoutA -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 8 | 3 | 14 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 -INPUTS | 10 | TimeoutA | nAS_FSB | fsb/ASrf | cnt/RefCnt<0> | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> | cnt/RefCnt<4> -INPUTMC | 9 | 3 | 14 | 0 | 3 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 -INPUTP | 1 | 54 -EQ | 8 | - TimeoutA.T = TimeoutA & nAS_FSB & !fsb/ASrf - # !TimeoutA & !nAS_FSB & !cnt/RefCnt<0> & - !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & - !cnt/RefCnt<3> & !cnt/RefCnt<4> - # !TimeoutA & !cnt/RefCnt<0> & !cnt/RefCnt<5> & - !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & - !cnt/RefCnt<4> & fsb/ASrf; - TimeoutA.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 6 | 2 | TimeoutB -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 5 | 6 | 2 | 7 | 15 | 7 | 10 | 6 | 9 | 6 | 1 -INPUTS | 15 | TimeoutB | nAS_FSB | fsb/ASrf | cnt/TimeoutBPre | cnt/RefCnt<0> | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> | cnt/RefCnt<4> | cnt/RefCnt<7> | A_FSB<11> | ram/RASEL | A_FSB<2> -INPUTMC | 12 | 6 | 2 | 0 | 3 | 3 | 13 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2 | 4 | 0 -INPUTP | 3 | 54 | 15 | 153 -EXPORTS | 1 | 6 | 1 -EQ | 10 | - TimeoutB.T = TimeoutB & nAS_FSB & !fsb/ASrf - # !TimeoutB & cnt/TimeoutBPre & !nAS_FSB & - !cnt/RefCnt<0> & !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & - !cnt/RefCnt<2> & !cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7> - # !TimeoutB & cnt/TimeoutBPre & !cnt/RefCnt<0> & - !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & - !cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7> & fsb/ASrf; - TimeoutB.CLK = CLK_FSB; // GCK - TimeoutB.EXP = A_FSB<11> & !ram/RASEL - # ram/RASEL & A_FSB<2> -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 13 | cnt/TimeoutBPre -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 2 | 6 | 2 | 3 | 13 -INPUTS | 11 | cnt/TimeoutBPre | nAS_FSB | fsb/ASrf | cnt/RefCnt<0> | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> | cnt/RefCnt<4> | cnt/RefCnt<7> -INPUTMC | 10 | 3 | 13 | 0 | 3 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2 -INPUTP | 1 | 54 -EQ | 8 | - cnt/TimeoutBPre.T = cnt/TimeoutBPre & nAS_FSB & !fsb/ASrf - # !cnt/TimeoutBPre & !nAS_FSB & !cnt/RefCnt<0> & - !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & - !cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7> - # !cnt/TimeoutBPre & !cnt/RefCnt<0> & !cnt/RefCnt<5> & - !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & - !cnt/RefCnt<4> & !cnt/RefCnt<7> & fsb/ASrf; - cnt/TimeoutBPre.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 7 | 15 | fsb/BERR0r -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 7 | 15 | 2 | 14 | 2 | 8 | 7 | 10 | 2 | 10 | 2 | 16 -INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | fsb/BERR0r | TimeoutB | nAS_FSB | fsb/ASrf -INPUTMC | 3 | 7 | 15 | 6 | 2 | 0 | 3 -INPUTP | 5 | 36 | 30 | 29 | 28 | 54 -EQ | 5 | - !fsb/BERR0r.D = !TimeoutB & !fsb/BERR0r - # nAS_FSB & !fsb/ASrf - # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & - !fsb/BERR0r; - fsb/BERR0r.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 8 | fsb/BERR1r -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 3 | 8 | 2 | 14 | 2 | 8 | 7 | 10 | 2 | 10 | 2 | 16 -INPUTS | 4 | BERR_IOBS | fsb/BERR1r | nAS_FSB | fsb/ASrf -INPUTMC | 3 | 3 | 17 | 3 | 8 | 0 | 3 -INPUTP | 1 | 54 -EQ | 3 | - !fsb/BERR1r.D = !BERR_IOBS & !fsb/BERR1r - # nAS_FSB & !fsb/ASrf; - fsb/BERR1r.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 6 | 3 | fsb/Ready0r -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 6 | 3 | 6 | 9 | 6 | 10 -INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | nAS_FSB | fsb/ASrf -INPUTMC | 4 | 3 | 9 | 6 | 3 | 6 | 0 | 0 | 3 -INPUTP | 4 | 36 | 30 | 29 | 54 -EQ | 6 | - !fsb/Ready0r.D = nAS_FSB & !fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & !ram/RAMReady - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady; - fsb/Ready0r.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 2 | 0 | fsb/Ready1r -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 9 | 2 | 0 | 2 | 13 | 2 | 7 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16 | 2 | 17 | 2 | 1 -INPUTS | 11 | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | iobs/IOReady | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | cs/nOverlay1 | iobs/Clear1.EXP -INPUTMC | 5 | 0 | 3 | 2 | 0 | 3 | 16 | 3 | 9 | 2 | 17 -INPUTP | 6 | 54 | 36 | 30 | 29 | 28 | 97 -EXPORTS | 1 | 2 | 1 -IMPORTS | 1 | 2 | 17 -EQ | 24 | - !fsb/Ready1r.D = nAS_FSB & !fsb/ASrf - # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady - # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & - !iobs/IOReady - # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & - !iobs/IOReady & !SW<1> -;Imported pterms FB3_18 - # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady - # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady - # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - !nADoutLE1 - # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - !nADoutLE1; - fsb/Ready1r.CLK = CLK_FSB; // GCK - fsb/Ready1r.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 2 | 4 | fsb/Ready2r -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 8 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 3 -INPUTS | 20 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | TimeoutA | fsb/Ready2r | EXP16_.EXP -INPUTMC | 4 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 5 -INPUTP | 16 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 -EXPORTS | 1 | 2 | 3 -IMPORTS | 1 | 2 | 5 -EQ | 36 | - !fsb/Ready2r.D = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r -;Imported pterms FB3_6 - # nAS_FSB & !fsb/ASrf - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r; - fsb/Ready2r.CLK = CLK_FSB; // GCK - fsb/Ready2r.EXP = !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 2 | 14 | fsb/VPA -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 2 | 14 | 3 | 10 | 2 | 12 | 2 | 13 | 2 | 15 -INPUTS | 9 | fsb/BERR1r | fsb/VPA | $OpTx$FX_DC$708 | nBR_IOB | fsb/BERR0r | $OpTx$$OpTx$FX_DC$182_INV$783 | BERR_IOBS | EXP22_.EXP | EXP23_.EXP -INPUTMC | 9 | 3 | 8 | 2 | 14 | 0 | 13 | 7 | 14 | 7 | 15 | 6 | 9 | 3 | 17 | 2 | 13 | 2 | 15 -IMPORTS | 2 | 2 | 13 | 2 | 15 -EQ | 83 | - fsb/VPA.D = BERR_IOBS & fsb/VPA & !$OpTx$FX_DC$708 - # fsb/BERR0r & fsb/VPA & !$OpTx$FX_DC$708 - # fsb/BERR1r & fsb/VPA & !$OpTx$FX_DC$708 - # fsb/VPA & !nBR_IOB & !$OpTx$FX_DC$708 - # fsb/VPA & !$OpTx$FX_DC$708 & - $OpTx$$OpTx$FX_DC$182_INV$783 -;Imported pterms FB3_14 - # A_FSB<23> & !fsb/Ready1r & fsb/VPA & - !iobs/IOReady & !$OpTx$FX_DC$708 - # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & - fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708 - # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA & - !iobs/IOReady & !SW<1> & !$OpTx$FX_DC$708 - # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708 - # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708 -;Imported pterms FB3_13 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 -;Imported pterms FB3_16 - # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & - !nADoutLE1 & !$OpTx$FX_DC$708 - # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & - !nADoutLE1 & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 -;Imported pterms FB3_17 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - fsb/Ready1r & nBR_IOB & !$OpTx$FX_DC$708 & - !$OpTx$$OpTx$FX_DC$182_INV$783 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - iobs/IOReady & nBR_IOB & !$OpTx$FX_DC$708 & - !$OpTx$$OpTx$FX_DC$182_INV$783; - fsb/VPA.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 15 | iobs/IOL1 -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 3 | 15 -INPUTS | 2 | nLDS_FSB | iobs/Load1 -INPUTMC | 1 | 4 | 12 -INPUTP | 1 | 49 -EQ | 3 | - iobs/IOL1.D = !nLDS_FSB; - iobs/IOL1.CLK = CLK_FSB; // GCK - iobs/IOL1.CE = iobs/Load1; -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 2 | 2 | iobs/IORW1 -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 2 | 7 | 0 | 2 | 2 -INPUTS | 8 | A_FSB<23> | A_FSB<21> | iobs/IORW1 | nADoutLE1 | iobs/Once | nWE_FSB | EXP14_.EXP | EXP15_.EXP -INPUTMC | 5 | 2 | 2 | 5 | 13 | 7 | 13 | 2 | 1 | 2 | 3 -INPUTP | 3 | 36 | 29 | 47 -IMPORTS | 2 | 2 | 1 | 2 | 3 -EQ | 23 | - !iobs/IORW1.T = iobs/Once - # !nADoutLE1 - # nWE_FSB & iobs/IORW1 - # !nWE_FSB & !iobs/IORW1 - # !A_FSB<23> & A_FSB<21> & !iobs/IORW1 -;Imported pterms FB3_2 - # nAS_FSB & !fsb/ASrf - # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> -;Imported pterms FB3_1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 -;Imported pterms FB3_4 - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> - # !A_FSB<23> & !A_FSB<20> & SW<1> -;Imported pterms FB3_5 - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>; - iobs/IORW1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 16 | iobs/IOReady -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 9 | 2 | 0 | 2 | 13 | 3 | 16 | 2 | 7 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16 | 2 | 17 -INPUTS | 8 | iobs/IOReady | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | IOBERR | nADoutLE1 -INPUTMC | 7 | 3 | 16 | 0 | 3 | 7 | 13 | 7 | 3 | 1 | 5 | 5 | 17 | 5 | 13 -INPUTP | 1 | 54 -EQ | 8 | - iobs/IOReady.T = iobs/IOReady & nAS_FSB & !fsb/ASrf - # iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & IOBERR & nADoutLE1 - # iobs/Once & !iobs/IOReady & !nAS_FSB & - !iobs/PS_FSM_FFd2 & !iobs/IOACTr & !IOBERR & nADoutLE1 - # iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & !IOBERR & fsb/ASrf & nADoutLE1; - iobs/IOReady.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 14 | iobs/IOU1 -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 0 | 17 -INPUTS | 2 | nUDS_FSB | iobs/Load1 -INPUTMC | 1 | 4 | 12 -INPUTP | 1 | 56 -EQ | 3 | - iobs/IOU1.D = !nUDS_FSB; - iobs/IOU1.CLK = CLK_FSB; // GCK - iobs/IOU1.CE = iobs/Load1; -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 4 | 3 | ram/RAMDIS2 -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 4 | 4 | 3 | 4 | 4 | 7 | 5 | 7 | 6 -INPUTS | 15 | ram/RAMDIS2 | nAS_FSB | fsb/ASrf | ram/Once | cnt/RefDone | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nCAS_OBUF.EXP -INPUTMC | 12 | 4 | 3 | 0 | 3 | 4 | 15 | 3 | 11 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 2 | 3 | 0 | 4 | 2 | 3 | 9 | 4 | 4 -INPUTP | 3 | 54 | 36 | 30 -IMPORTS | 1 | 4 | 4 -EQ | 25 | - ram/RAMDIS2.T = ram/RAMDIS2 & nAS_FSB & !fsb/ASrf - # ram/Once & !cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & - ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # ram/Once & !cnt/RefDone & !ram/RAMDIS2 & - ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & ram/Once & !cnt/RefDone & - cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # !A_FSB<23> & !A_FSB<22> & ram/Once & !cnt/RefDone & - cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - fsb/ASrf -;Imported pterms FB5_5 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & - !cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & - !cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> & fsb/ASrf; - ram/RAMDIS2.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 2 | 8 | nDTACK_FSB_OBUF -ATTRIBUTES | 8815362 | 0 -OUTPUTMC | 5 | 2 | 8 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 10 -INPUTS | 8 | fsb/BERR1r | nDTACK_FSB | nBR_IOB | fsb/BERR0r | $OpTx$$OpTx$FX_DC$182_INV$783 | BERR_IOBS | EXP18_.EXP | EXP19_.EXP -INPUTMC | 8 | 3 | 8 | 2 | 8 | 7 | 14 | 7 | 15 | 6 | 9 | 3 | 17 | 2 | 7 | 2 | 9 -IMPORTS | 2 | 2 | 7 | 2 | 9 -EQ | 81 | - nDTACK_FSB.D = BERR_IOBS & nDTACK_FSB - # fsb/BERR0r & nDTACK_FSB - # fsb/BERR1r & nDTACK_FSB - # nDTACK_FSB & !nBR_IOB - # nDTACK_FSB & $OpTx$$OpTx$FX_DC$182_INV$783 -;Imported pterms FB3_8 - # nAS_FSB & !fsb/ASrf - # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & - nDTACK_FSB - # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & - !iobs/IOReady & nDTACK_FSB - # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & - !iobs/IOReady & !SW<1> & nDTACK_FSB - # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB -;Imported pterms FB3_7 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB -;Imported pterms FB3_10 - # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB - # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - nDTACK_FSB & !nADoutLE1 - # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - nDTACK_FSB & !nADoutLE1 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB -;Imported pterms FB3_11 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - fsb/Ready1r & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - iobs/IOReady & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783; - nDTACK_FSB.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 4 | 0 | ram/RASEL -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 10 | 6 | 5 | 6 | 7 | 6 | 10 | 4 | 10 | 4 | 4 | 4 | 9 | 4 | 14 | 6 | 4 | 6 | 2 | 6 | 8 -INPUTS | 13 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd1 | A_FSB<23> | cnt/RefDone | nAS_FSB | ram/BACTr | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | nROMCS_OBUF.EXP | EXP27_.EXP -INPUTMC | 11 | 6 | 16 | 6 | 12 | 6 | 6 | 3 | 11 | 0 | 0 | 0 | 3 | 3 | 2 | 3 | 0 | 4 | 2 | 4 | 1 | 4 | 17 -INPUTP | 2 | 36 | 54 -IMPORTS | 2 | 4 | 1 | 4 | 17 -EQ | 48 | - ram/RASEL.D = !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 - # ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 - # A_FSB<23> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> -;Imported pterms FB5_2 - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - !fsb/ASrf - # !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd1 & - ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - !fsb/ASrf -;Imported pterms FB5_18 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr -;Imported pterms FB5_17 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7>; - ram/RASEL.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 6 | 16 | ram/RS_FSM_FFd2 -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 18 | 4 | 15 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 0 | 6 | 4 | 7 | 4 | 17 | 4 | 1 | 4 | 4 | 4 | 8 | 4 | 16 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 14 | 6 | 17 -INPUTS | 9 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefDone | ram/RS_FSM_FFd1 | cnt/RefCnt<6> | ram/BACTr | cnt/RefCnt<7> | cnt/RefCnt<5> | EXP29_.EXP -INPUTMC | 9 | 6 | 16 | 6 | 12 | 3 | 11 | 6 | 6 | 3 | 0 | 0 | 0 | 4 | 2 | 3 | 2 | 6 | 15 -EXPORTS | 1 | 6 | 17 -IMPORTS | 1 | 6 | 15 -EQ | 30 | - !ram/RS_FSM_FFd2.T = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # cnt/RefDone & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<6> & ram/BACTr - # !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & ram/BACTr & - !cnt/RefCnt<7> -;Imported pterms FB7_16 - # !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<5> & ram/BACTr - # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<5> & !fsb/ASrf - # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<6> & !fsb/ASrf - # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<7> & !fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 -;Imported pterms FB7_15 - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd2 & - ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - !fsb/ASrf; - ram/RS_FSM_FFd2.CLK = CLK_FSB; // GCK - ram/RS_FSM_FFd2.EXP = !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 6 | 6 | ram/RS_FSM_FFd1 -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 22 | 4 | 15 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 0 | 6 | 4 | 7 | 6 | 0 | 4 | 1 | 4 | 4 | 4 | 5 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 14 | 6 | 15 | 6 | 17 -INPUTS | 10 | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | fsb/ASrf | A_FSB<21> -INPUTMC | 6 | 4 | 15 | 3 | 9 | 6 | 16 | 6 | 6 | 6 | 12 | 0 | 3 -INPUTP | 4 | 36 | 30 | 54 | 29 -EQ | 13 | - ram/RS_FSM_FFd1.T = ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & fsb/ASrf; - ram/RS_FSM_FFd1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 6 | 12 | ram/RS_FSM_FFd3 -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 15 | 4 | 15 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 4 | 7 | 4 | 8 | 4 | 1 | 4 | 4 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 14 | 6 | 15 -INPUTS | 11 | A_FSB<23> | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | ram/Once | cnt/RefCnt<6> | cnt/RefCnt<7> | cnt/RefDone | cnt/RefCnt<5> | CLK25EN_OBUF.EXP | CLK20EN_OBUF$BUF0.EXP -INPUTMC | 10 | 6 | 16 | 6 | 6 | 6 | 12 | 4 | 15 | 3 | 0 | 4 | 2 | 3 | 11 | 3 | 2 | 6 | 11 | 6 | 13 -INPUTP | 1 | 36 -IMPORTS | 2 | 6 | 11 | 6 | 13 -EQ | 27 | - !ram/RS_FSM_FFd3.T = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 - # ram/Once & cnt/RefDone & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & !cnt/RefCnt<5> - # ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & !cnt/RefCnt<6> - # ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & !cnt/RefCnt<7> -;Imported pterms FB7_12 - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & !fsb/ASrf -;Imported pterms FB7_14 - # !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & - ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & - ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - fsb/ASrf; - ram/RS_FSM_FFd3.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 5 | 2 | iobm/IOS_FSM_FFd3 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 13 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 6 | 3 | 4 | 5 | 0 | 5 | 14 | 5 | 16 -INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | CLK_IOB | iobm/IOREQr | nAoutOE -INPUTMC | 5 | 0 | 16 | 5 | 9 | 5 | 2 | 1 | 8 | 3 | 1 -INPUTP | 1 | 35 -EQ | 6 | - iobm/IOS_FSM_FFd3.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 - # iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & - !iobm/IOS_FSM_FFd2 - # !CLK_IOB & !iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 & - iobm/IOREQr & !nAoutOE; - iobm/IOS_FSM_FFd3.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 0 | 16 | iobm/IOS_FSM_FFd1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 6 | 5 | 16 | 5 | 0 | 5 | 14 -INPUTS | 3 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 -INPUTMC | 3 | 5 | 2 | 5 | 9 | 0 | 16 -EQ | 3 | - iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 - # !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2; - iobm/IOS_FSM_FFd1.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd2 -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 6 | 5 | 16 | 3 | 4 | 5 | 0 -INPUTS | 11 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | CLK_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/RESrf | iobm/RESrr -INPUTMC | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 0 | 1 | 16 | 1 | 15 | 1 | 12 | 1 | 11 | 0 | 2 | 0 | 1 -INPUTP | 1 | 35 -EQ | 11 | - iobm/IOS_FSM_FFd2.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & - !iobm/IOS_FSM_FFd2 - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/IOS_FSM_FFd2 & iobm/ETACK - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/IOS_FSM_FFd2 & iobm/DTACKrf & iobm/DTACKrr - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/IOS_FSM_FFd2 & iobm/BERRrf & iobm/BERRrr - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/IOS_FSM_FFd2 & iobm/RESrf & iobm/RESrr; - iobm/IOS_FSM_FFd2.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 7 | 3 | iobs/PS_FSM_FFd2 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 17 | 7 | 13 | 3 | 17 | 7 | 9 | 3 | 15 | 0 | 17 | 2 | 1 | 3 | 16 | 7 | 3 | 3 | 7 | 4 | 12 | 0 | 12 | 7 | 8 | 2 | 17 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7 -INPUTS | 12 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | EXP32_.EXP | nRAS_OBUF.EXP -INPUTMC | 9 | 7 | 3 | 3 | 7 | 1 | 5 | 7 | 13 | 5 | 13 | 0 | 3 | 3 | 9 | 7 | 2 | 7 | 4 -INPUTP | 3 | 54 | 36 | 30 -IMPORTS | 2 | 7 | 2 | 7 | 4 -EQ | 33 | - !iobs/PS_FSM_FFd2.D = iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & - iobs/IOACTr - # !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & - !iobs/IOACTr - # iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - nADoutLE1 - # nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - !fsb/ASrf & nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 -;Imported pterms FB8_3 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 -;Imported pterms FB8_5 - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & nWE_FSB & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & !A_FSB<20> & SW<1> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1; - iobs/PS_FSM_FFd2.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 5 | 5 | iobm/ES<0> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 -INPUTS | 7 | iobm/ES<0> | iobm/Er | iobm/Er2 | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> -INPUTMC | 7 | 5 | 5 | 1 | 10 | 1 | 9 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 -EQ | 6 | - !iobm/ES<0>.T = iobm/ES<0> & !iobm/Er & iobm/Er2 - # !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & - !iobm/ES<3> & !iobm/ES<4> & iobm/Er - # !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & - !iobm/ES<3> & !iobm/ES<4> & !iobm/Er2; - iobm/ES<0>.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 4 | iobm/ES<1> -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 -INPUTS | 4 | iobm/ES<0> | iobm/ES<1> | iobm/Er | iobm/Er2 -INPUTMC | 4 | 5 | 5 | 5 | 4 | 1 | 10 | 1 | 9 -EQ | 4 | - !iobm/ES<1>.D = iobm/ES<0> & iobm/ES<1> - # !iobm/ES<0> & !iobm/ES<1> - # !iobm/Er & iobm/Er2; - iobm/ES<1>.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 12 | iobm/ES<2> -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 -INPUTS | 7 | iobm/ES<0> | iobm/ES<2> | iobm/ES<1> | iobm/Er | iobm/Er2 | iobm/ES<3> | iobm/ES<4> -INPUTMC | 7 | 5 | 5 | 5 | 12 | 5 | 4 | 1 | 10 | 1 | 9 | 5 | 3 | 5 | 7 -EQ | 6 | - !iobm/ES<2>.D = !iobm/ES<0> & !iobm/ES<2> - # !iobm/ES<1> & !iobm/ES<2> - # !iobm/Er & iobm/Er2 - # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> - # !iobm/ES<2> & !iobm/ES<3> & iobm/ES<4>; - iobm/ES<2>.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 3 | 7 | iobs/PS_FSM_FFd1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 14 | 7 | 13 | 7 | 12 | 3 | 15 | 0 | 17 | 2 | 1 | 7 | 3 | 3 | 7 | 4 | 12 | 0 | 12 | 7 | 8 | 2 | 17 | 7 | 1 | 7 | 2 | 7 | 4 -INPUTS | 3 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr -INPUTMC | 3 | 7 | 3 | 3 | 7 | 1 | 5 -EQ | 3 | - iobs/PS_FSM_FFd1.D = iobs/PS_FSM_FFd2 - # iobs/PS_FSM_FFd1 & iobs/IOACTr; - iobs/PS_FSM_FFd1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 5 | 3 | iobm/ES<3> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 -INPUTS | 6 | iobm/ES<3> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> -INPUTMC | 6 | 5 | 3 | 1 | 10 | 1 | 9 | 5 | 5 | 5 | 4 | 5 | 12 -EQ | 4 | - iobm/ES<3>.T = iobm/ES<3> & !iobm/Er & iobm/Er2 - # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & iobm/Er - # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & !iobm/Er2; - iobm/ES<3>.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 7 | iobm/ES<4> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 5 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 7 | 5 | 0 -INPUTS | 7 | iobm/ES<4> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> -INPUTMC | 7 | 5 | 7 | 1 | 10 | 1 | 9 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 -EQ | 8 | - iobm/ES<4>.T = iobm/ES<4> & !iobm/Er & iobm/Er2 - # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & - iobm/ES<3> & iobm/Er - # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & - iobm/ES<3> & !iobm/Er2 - # iobm/ES<0> & iobm/ES<1> & !iobm/ES<2> & - !iobm/ES<3> & iobm/ES<4>; - iobm/ES<4>.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 17 | cnt/RefCnt<0> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 11 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2 -INPUTS | 0 -EQ | 2 | - cnt/RefCnt<0>.T = Vcc; - cnt/RefCnt<0>.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 2 | cnt/RefCnt<5> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 18 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 4 | 3 | 4 | 0 | 6 | 15 | 6 | 12 | 3 | 0 | 4 | 2 | 4 | 5 | 4 | 16 | 4 | 1 | 4 | 4 | 4 | 8 | 6 | 13 | 6 | 14 | 6 | 16 -INPUTS | 5 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> | cnt/RefCnt<4> -INPUTMC | 5 | 1 | 17 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 -EQ | 3 | - cnt/RefCnt<5>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2> & - cnt/RefCnt<3> & cnt/RefCnt<4>; - cnt/RefCnt<5>.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 0 | cnt/RefCnt<6> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 17 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 12 | 4 | 2 | 4 | 5 | 4 | 16 | 4 | 1 | 4 | 4 | 4 | 8 | 6 | 13 | 6 | 14 | 6 | 15 -INPUTS | 6 | cnt/RefCnt<0> | cnt/RefCnt<5> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> | cnt/RefCnt<4> -INPUTMC | 6 | 1 | 17 | 3 | 2 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 -EQ | 3 | - cnt/RefCnt<6>.T = cnt/RefCnt<0> & cnt/RefCnt<5> & cnt/RefCnt<1> & - cnt/RefCnt<2> & cnt/RefCnt<3> & cnt/RefCnt<4>; - cnt/RefCnt<6>.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 1 | 5 | iobs/IOACTr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 3 | 17 | 3 | 16 | 7 | 3 | 3 | 7 | 7 | 8 -INPUTS | 1 | IOACT -INPUTMC | 1 | 5 | 15 -EQ | 2 | - iobs/IOACTr.D = IOACT; - iobs/IOACTr.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 5 | cnt/RefCnt<1> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 10 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2 -INPUTS | 1 | cnt/RefCnt<0> -INPUTMC | 1 | 1 | 17 -EQ | 2 | - cnt/RefCnt<1>.T = cnt/RefCnt<0>; - cnt/RefCnt<1>.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 4 | cnt/RefCnt<2> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 9 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 3 | 6 | 3 | 3 | 4 | 2 -INPUTS | 2 | cnt/RefCnt<0> | cnt/RefCnt<1> -INPUTMC | 2 | 1 | 17 | 0 | 5 -EQ | 2 | - cnt/RefCnt<2>.T = cnt/RefCnt<0> & cnt/RefCnt<1>; - cnt/RefCnt<2>.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 6 | cnt/RefCnt<3> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 8 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 3 | 3 | 4 | 2 -INPUTS | 3 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<2> -INPUTMC | 3 | 1 | 17 | 0 | 5 | 0 | 4 -EQ | 2 | - cnt/RefCnt<3>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2>; - cnt/RefCnt<3>.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 3 | cnt/RefCnt<4> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 7 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 4 | 2 -INPUTS | 4 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> -INPUTMC | 4 | 1 | 17 | 0 | 5 | 0 | 4 | 3 | 6 -EQ | 3 | - cnt/RefCnt<4>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2> & - cnt/RefCnt<3>; - cnt/RefCnt<4>.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 4 | 12 | iobs/Load1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 0 | 15 | 0 | 14 | 5 | 13 -INPUTS | 11 | nADoutLE1 | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | RA_5_OBUF.EXP | RA_2_OBUF.EXP -INPUTMC | 8 | 5 | 13 | 7 | 13 | 7 | 3 | 3 | 7 | 0 | 3 | 3 | 9 | 4 | 11 | 4 | 13 -INPUTP | 3 | 54 | 36 | 30 -IMPORTS | 2 | 4 | 11 | 4 | 13 -EQ | 19 | - !iobs/Load1.D = iobs/Once - # !nADoutLE1 - # nAS_FSB & !fsb/ASrf - # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 -;Imported pterms FB5_12 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> -;Imported pterms FB5_14 - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> - # !A_FSB<23> & A_FSB<21> & nWE_FSB - # !A_FSB<23> & !A_FSB<20> & SW<1> - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1; - iobs/Load1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 0 | ram/BACTr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 11 | 4 | 0 | 6 | 16 | 4 | 7 | 6 | 0 | 4 | 1 | 4 | 6 | 4 | 8 | 4 | 17 | 6 | 1 | 6 | 15 | 6 | 17 -INPUTS | 2 | nAS_FSB | fsb/ASrf -INPUTMC | 1 | 0 | 3 -INPUTP | 1 | 54 -EQ | 2 | - !ram/BACTr.D = nAS_FSB & !fsb/ASrf; - ram/BACTr.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 5 | 15 | IOACT -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 5 | 1 | 1 | 5 -INPUTS | 11 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr | nAoutOE | CLK_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | nADoutLE0_OBUF.EXP | nDinLE_OBUF.EXP -INPUTMC | 10 | 0 | 16 | 5 | 9 | 5 | 2 | 1 | 8 | 3 | 1 | 5 | 0 | 1 | 16 | 1 | 15 | 5 | 14 | 5 | 16 -INPUTP | 1 | 35 -IMPORTS | 2 | 5 | 14 | 5 | 16 -EQ | 15 | - !IOACT.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 - # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & - !iobm/IOREQr - # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & nAoutOE - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/ETACK - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/BERRrf & iobm/BERRrr -;Imported pterms FB6_15 - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/DTACKrf & iobm/DTACKrr -;Imported pterms FB6_17 - # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/RESrf & iobm/RESrr; - IOACT.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 17 | IOBERR -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 4 | 3 | 17 | 3 | 16 | 5 | 17 | 5 | 0 -INPUTS | 12 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | IOBERR | CLK_IOB | nBERR_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/ETACK.EXP -INPUTMC | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 17 | 5 | 0 | 1 | 16 | 1 | 15 | 1 | 12 | 1 | 11 | 5 | 0 -INPUTP | 2 | 35 | 123 -IMPORTS | 1 | 5 | 0 -EQ | 26 | - IOBERR.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & - !iobm/IOS_FSM_FFd2 & IOBERR - # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/ETACK - # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/ETACK - # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/DTACKrf & - iobm/DTACKrr - # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/BERRrf & - iobm/BERRrr -;Imported pterms FB6_1 - # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/RESrf & - iobm/RESrr - # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/DTACKrf & - iobm/DTACKrr - # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/BERRrf & - iobm/BERRrr - # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/RESrf & - iobm/RESrr; - IOBERR.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 0 | 9 | RESr0 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 0 | 8 | 7 | 6 | 7 | 14 -INPUTS | 1 | nRES -INPUTP | 1 | 145 -EQ | 2 | - RESr0.D = !nRES; - RESr0.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 8 | RESr1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 0 | 7 | 7 | 6 | 7 | 14 -INPUTS | 1 | RESr0 -INPUTMC | 1 | 0 | 9 -EQ | 2 | - RESr1.D = RESr0; - RESr1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 4 | 2 | cnt/RefCnt<7> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 15 | 3 | 11 | 6 | 2 | 3 | 13 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 12 | 4 | 5 | 4 | 16 | 4 | 1 | 4 | 4 | 4 | 8 | 6 | 13 | 6 | 14 | 6 | 15 -INPUTS | 13 | cnt/RefCnt<0> | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<1> | cnt/RefCnt<2> | cnt/RefCnt<3> | cnt/RefCnt<4> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | cs/nOverlay1 -INPUTMC | 8 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 3 | 9 -INPUTP | 5 | 36 | 30 | 29 | 28 | 97 -EXPORTS | 1 | 4 | 1 -EQ | 9 | - cnt/RefCnt<7>.T = cnt/RefCnt<0> & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<1> & cnt/RefCnt<2> & cnt/RefCnt<3> & cnt/RefCnt<4>; - cnt/RefCnt<7>.CLK = CLK_FSB; // GCK - cnt/RefCnt<7>.EXP = A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !SW<1> - # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - SW<1> - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay1 -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 1 | 10 | iobm/Er -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 1 | 9 -INPUTS | 1 | E_IOB -INPUTP | 1 | 37 -EQ | 2 | - iobm/Er.D = E_IOB; - !iobm/Er.CLK = CLK_IOB; // GCK -GLOBALS | 1 | 2 | CLK_IOB - -MACROCELL | 1 | 8 | iobm/IOREQr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 5 | 2 | 5 | 15 | 5 | 6 -INPUTS | 1 | IOREQ -INPUTMC | 1 | 7 | 8 -EQ | 2 | - iobm/IOREQr.D = IOREQ; - !iobm/IOREQr.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 0 | 11 | IPL2r0 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 0 | 10 | 7 | 14 -INPUTS | 1 | nIPL2 -INPUTP | 1 | 146 -EQ | 2 | - IPL2r0.D = !nIPL2; - IPL2r0.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 7 | RESr2 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 7 | 6 | 7 | 14 -INPUTS | 1 | RESr1 -INPUTMC | 1 | 0 | 8 -EQ | 2 | - RESr2.D = RESr1; - RESr2.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 6 | RefAck -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 3 | 11 | 7 | 5 -INPUTS | 2 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 -INPUTMC | 2 | 6 | 16 | 6 | 6 -EQ | 2 | - RefAck.D = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1; - RefAck.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 1 | 14 | iobm/BGr0 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 1 | 13 | 3 | 1 -INPUTS | 1 | nBG_IOB -INPUTP | 1 | 117 -EQ | 2 | - iobm/BGr0.D = !nBG_IOB; - iobm/BGr0.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 12 | iobm/DTACKrf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 9 | 5 | 14 | 5 | 17 | 5 | 0 -INPUTS | 1 | nDTACK_IOB -INPUTP | 1 | 127 -EQ | 2 | - iobm/DTACKrf.D = !nDTACK_IOB; - !iobm/DTACKrf.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 11 | iobm/DTACKrr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 9 | 5 | 14 | 5 | 17 | 5 | 0 -INPUTS | 1 | nDTACK_IOB -INPUTP | 1 | 127 -EQ | 2 | - iobm/DTACKrr.D = !nDTACK_IOB; - iobm/DTACKrr.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 5 | 0 | iobm/ETACK -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 5 | 9 | 5 | 15 | 5 | 17 -INPUTS | 18 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | CLK_IOB | nBERR_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | IOBERR | iobm/RESrf | iobm/RESrr | iobm/DTACKrf | iobm/DTACKrr | iobm/BERRrf | iobm/BERRrr -INPUTMC | 16 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 17 | 0 | 2 | 0 | 1 | 1 | 12 | 1 | 11 | 1 | 16 | 1 | 15 -INPUTP | 2 | 35 | 123 -EXPORTS | 1 | 5 | 17 -EQ | 15 | - iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & - !iobm/ES<3> & iobm/ES<4>; - iobm/ETACK.CLK = CLK2X_IOB; // GCK - iobm/ETACK.EXP = CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/RESrf & - iobm/RESrr - # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/DTACKrf & - iobm/DTACKrr - # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/BERRrf & - iobm/BERRrr - # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/RESrf & - iobm/RESrr -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 9 | iobm/Er2 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 -INPUTS | 1 | iobm/Er -INPUTMC | 1 | 1 | 10 -EQ | 2 | - iobm/Er2.D = iobm/Er; - iobm/Er2.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 7 | iobm/VPArf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 5 | 1 -INPUTS | 1 | nVPA_IOB -INPUTP | 1 | 125 -EQ | 2 | - iobm/VPArf.D = !nVPA_IOB; - !iobm/VPArf.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 6 | iobm/VPArr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 5 | 1 -INPUTS | 1 | nVPA_IOB -INPUTP | 1 | 125 -EQ | 2 | - iobm/VPArr.D = !nVPA_IOB; - iobm/VPArr.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 7 | 6 | RESDone -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 2 | 7 | 14 | 7 | 7 -INPUTS | 8 | RESr0 | RESr1 | RESr2 | nWE_FSB | nUDS_FSB | ram/RAMDIS2 | nAS_FSB | ram/RAMDIS1 -INPUTMC | 5 | 0 | 9 | 0 | 8 | 0 | 7 | 4 | 3 | 4 | 7 -INPUTP | 3 | 47 | 56 | 54 -EXPORTS | 1 | 7 | 7 -EQ | 5 | - RESDone.D = Vcc; - RESDone.CLK = CLK_FSB; // GCK - RESDone.CE = !RESr0 & !RESr1 & RESr2; - RESDone.EXP = !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & - !ram/RAMDIS1 -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 5 | 6 | ALE0M -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 5 | 14 -INPUTS | 5 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOREQr | nAoutOE -INPUTMC | 5 | 5 | 9 | 5 | 2 | 0 | 16 | 1 | 8 | 3 | 1 -EQ | 4 | - ALE0M.D = iobm/IOS_FSM_FFd2 - # iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 - # !iobm/IOS_FSM_FFd1 & iobm/IOREQr & !nAoutOE; - ALE0M.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 0 | 12 | ALE0S -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 5 | 14 -INPUTS | 2 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 -INPUTMC | 2 | 7 | 3 | 3 | 7 -EQ | 2 | - ALE0S.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; - ALE0S.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 7 | 8 | IOREQ -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 1 | 8 -INPUTS | 12 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nRAMUWE_OBUF.EXP | EXP33_.EXP -INPUTMC | 9 | 7 | 3 | 3 | 7 | 1 | 5 | 7 | 13 | 5 | 13 | 0 | 3 | 3 | 9 | 7 | 7 | 7 | 9 -INPUTP | 3 | 54 | 36 | 30 -IMPORTS | 2 | 7 | 7 | 7 | 9 -EQ | 30 | - !IOREQ.D = !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 - # iobs/PS_FSM_FFd1 & iobs/IOACTr - # iobs/Once & !iobs/PS_FSM_FFd2 & nADoutLE1 - # nAS_FSB & !iobs/PS_FSM_FFd2 & !fsb/ASrf & - nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & - !iobs/PS_FSM_FFd2 & nADoutLE1 -;Imported pterms FB8_8 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & - !iobs/PS_FSM_FFd2 & nADoutLE1 -;Imported pterms FB8_10 - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & nWE_FSB & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & !A_FSB<20> & SW<1> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1; - IOREQ.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 10 | IPL2r1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 7 | 14 -INPUTS | 1 | IPL2r0 -INPUTMC | 1 | 0 | 11 -EQ | 2 | - IPL2r1.D = IPL2r0; - IPL2r1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 0 | 3 | fsb/ASrf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 39 | 4 | 15 | 7 | 13 | 3 | 9 | 3 | 17 | 7 | 0 | 3 | 12 | 3 | 14 | 6 | 2 | 3 | 13 | 7 | 15 | 3 | 8 | 6 | 3 | 2 | 0 | 0 | 13 | 2 | 1 | 3 | 16 | 4 | 3 | 2 | 7 | 4 | 0 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 0 | 0 | 7 | 8 | 4 | 7 | 6 | 0 | 2 | 5 | 4 | 1 | 4 | 4 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 13 | 6 | 14 | 6 | 17 -INPUTS | 1 | nAS_FSB -INPUTP | 1 | 54 -EQ | 2 | - fsb/ASrf.D = !nAS_FSB; - !fsb/ASrf.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 1 | 16 | iobm/BERRrf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 0 -INPUTS | 1 | nBERR_IOB -INPUTP | 1 | 123 -EQ | 2 | - iobm/BERRrf.D = !nBERR_IOB; - !iobm/BERRrf.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 15 | iobm/BERRrr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 0 -INPUTS | 1 | nBERR_IOB -INPUTP | 1 | 123 -EQ | 2 | - iobm/BERRrr.D = !nBERR_IOB; - iobm/BERRrr.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 1 | 13 | iobm/BGr1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 3 | 1 -INPUTS | 1 | iobm/BGr0 -INPUTMC | 1 | 1 | 14 -EQ | 2 | - iobm/BGr1.D = iobm/BGr0; - iobm/BGr1.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 0 | 2 | iobm/RESrf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 5 | 9 | 5 | 0 | 5 | 16 -INPUTS | 1 | nRES -INPUTP | 1 | 145 -EQ | 2 | - iobm/RESrf.D = !nRES; - !iobm/RESrf.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 0 | 1 | iobm/RESrr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 5 | 9 | 5 | 0 | 5 | 16 -INPUTS | 1 | nRES -INPUTP | 1 | 145 -EQ | 2 | - iobm/RESrr.D = !nRES; - iobm/RESrr.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 2 | 17 | iobs/Clear1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 5 | 13 | 2 | 0 -INPUTS | 16 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<14> | A_FSB<22> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | fsb/Ready1r | iobs/IOReady | A_FSB<13> | A_FSB<21> -INPUTMC | 6 | 7 | 3 | 3 | 7 | 5 | 13 | 3 | 9 | 2 | 0 | 3 | 16 -INPUTP | 10 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 29 -EXPORTS | 1 | 2 | 0 -EQ | 16 | - iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1; - iobs/Clear1.CLK = CLK_FSB; // GCK - iobs/Clear1.EXP = A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady - # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady - # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - !nADoutLE1 - # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - !nADoutLE1 -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 4 | 7 | ram/RAMDIS1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 7 | 6 | 7 | 5 -INPUTS | 10 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | A_FSB<23> | cnt/RefDone | nAS_FSB | ram/BACTr | fsb/ASrf | EXP24_.EXP | RA_4_OBUF.EXP -INPUTMC | 8 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 11 | 0 | 0 | 0 | 3 | 4 | 6 | 4 | 8 -INPUTP | 2 | 36 | 54 -IMPORTS | 2 | 4 | 6 | 4 | 8 -EQ | 38 | - ram/RAMDIS1.D = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 - # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 - # !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 - # A_FSB<23> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & - !ram/BACTr & fsb/ASrf -;Imported pterms FB5_7 - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr -;Imported pterms FB5_6 - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> -;Imported pterms FB5_9 - # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # ram/Once & !cnt/RefDone & !ram/RS_FSM_FFd1 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf; - ram/RAMDIS1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 6 | 0 | ram/RAMReady -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 6 | 3 | 6 | 9 | 6 | 10 -INPUTS | 12 | A_FSB<21> | cnt/RefDone | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/BACTr | A_FSB<23> | A_FSB<22> | ram/Once | fsb/ASrf | RA_1_OBUF.EXP | EXP30_.EXP -INPUTMC | 8 | 3 | 11 | 3 | 9 | 6 | 6 | 0 | 0 | 4 | 15 | 0 | 3 | 6 | 1 | 6 | 17 -INPUTP | 4 | 29 | 54 | 36 | 30 -IMPORTS | 2 | 6 | 1 | 6 | 17 -EQ | 33 | - !ram/RAMReady.D = A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr - # !A_FSB<21> & !cnt/RefDone & !cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr - # !A_FSB<21> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 -;Imported pterms FB7_2 - # ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 - # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 - # A_FSB<23> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & - !ram/BACTr & fsb/ASrf -;Imported pterms FB7_18 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf -;Imported pterms FB7_17 - # !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7>; - ram/RAMReady.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 6 | 5 | RA_0_OBUF -ATTRIBUTES | 264962 | 0 -INPUTS | 3 | A_FSB<10> | ram/RASEL | A_FSB<1> -INPUTMC | 1 | 4 | 0 -INPUTP | 2 | 13 | 149 -EQ | 2 | - RA<0> = A_FSB<10> & !ram/RASEL - # ram/RASEL & A_FSB<1>; - -MACROCELL | 6 | 1 | RA_1_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 6 | 0 -INPUTS | 9 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd1 | A_FSB<23> | cnt/RefDone | nAS_FSB | ram/BACTr | fsb/ASrf | TimeoutB.EXP -INPUTMC | 7 | 6 | 16 | 6 | 12 | 6 | 6 | 3 | 11 | 0 | 0 | 0 | 3 | 6 | 2 -INPUTP | 2 | 36 | 54 -EXPORTS | 1 | 6 | 0 -IMPORTS | 1 | 6 | 2 -EQ | 10 | - RA<1> = ;Imported pterms FB7_3 - A_FSB<11> & !ram/RASEL - # ram/RASEL & A_FSB<2>; - RA_1_OBUF.EXP = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 - # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 - # A_FSB<23> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & - !ram/BACTr & fsb/ASrf - -MACROCELL | 4 | 13 | RA_2_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 12 -INPUTS | 11 | A_FSB<23> | A_FSB<21> | A_FSB<18> | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 | RA_6_OBUF.EXP -INPUTMC | 2 | 3 | 9 | 4 | 14 -INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30 -EXPORTS | 1 | 4 | 12 -IMPORTS | 1 | 4 | 14 -EQ | 9 | - RA<2> = ;Imported pterms FB5_15 - A_FSB<12> & !ram/RASEL - # ram/RASEL & A_FSB<3>; - RA_2_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> - # !A_FSB<23> & A_FSB<21> & nWE_FSB - # !A_FSB<23> & !A_FSB<20> & SW<1> - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 - -MACROCELL | 4 | 10 | RA_3_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 11 -INPUTS | 5 | A_FSB<13> | ram/RASEL | A_FSB<4> | A_FSB<15> | A_FSB<6> -INPUTMC | 1 | 4 | 0 -INPUTP | 4 | 18 | 157 | 21 | 6 -EXPORTS | 1 | 4 | 11 -EQ | 4 | - RA<3> = A_FSB<13> & !ram/RASEL - # ram/RASEL & A_FSB<4>; - RA_3_OBUF.EXP = A_FSB<15> & !ram/RASEL - # ram/RASEL & A_FSB<6> - -MACROCELL | 4 | 8 | RA_4_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 7 -INPUTS | 15 | A_FSB<23> | cnt/RefDone | ram/RS_FSM_FFd1 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<22> | cs/nOverlay1 | ram/BACTr | fsb/ASrf | ram/Once | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | nAS_FSB | EXP25_.EXP -INPUTMC | 12 | 3 | 11 | 6 | 6 | 3 | 2 | 3 | 0 | 4 | 2 | 3 | 9 | 0 | 0 | 0 | 3 | 4 | 15 | 6 | 16 | 6 | 12 | 4 | 9 -INPUTP | 3 | 36 | 30 | 54 -EXPORTS | 1 | 4 | 7 -IMPORTS | 1 | 4 | 9 -EQ | 13 | - RA<4> = ;Imported pterms FB5_10 - A_FSB<14> & !ram/RASEL - # ram/RASEL & A_FSB<5>; - RA_4_OBUF.EXP = A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # ram/Once & !cnt/RefDone & !ram/RS_FSM_FFd1 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf - -MACROCELL | 4 | 11 | RA_5_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 12 -INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> | RA_3_OBUF.EXP -INPUTMC | 1 | 4 | 10 -INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22 -EXPORTS | 1 | 4 | 12 -IMPORTS | 1 | 4 | 10 -EQ | 8 | - RA<5> = ;Imported pterms FB5_11 - A_FSB<15> & !ram/RASEL - # ram/RASEL & A_FSB<6>; - RA_5_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> - -MACROCELL | 4 | 14 | RA_6_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 13 -INPUTS | 5 | A_FSB<16> | ram/RASEL | A_FSB<7> | A_FSB<12> | A_FSB<3> -INPUTMC | 1 | 4 | 0 -INPUTP | 4 | 22 | 8 | 17 | 155 -EXPORTS | 1 | 4 | 13 -EQ | 4 | - RA<6> = A_FSB<16> & !ram/RASEL - # ram/RASEL & A_FSB<7>; - RA_6_OBUF.EXP = A_FSB<12> & !ram/RASEL - # ram/RASEL & A_FSB<3> - -MACROCELL | 6 | 4 | RA_7_OBUF -ATTRIBUTES | 264962 | 0 -INPUTS | 3 | A_FSB<17> | ram/RASEL | A_FSB<8> -INPUTMC | 1 | 4 | 0 -INPUTP | 2 | 23 | 11 -EQ | 2 | - RA<7> = A_FSB<8> & ram/RASEL - # A_FSB<17> & !ram/RASEL; - -MACROCELL | 6 | 7 | RA_8_OBUF -ATTRIBUTES | 264962 | 0 -INPUTS | 7 | A_FSB<23> | A_FSB<18> | ram/RASEL | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB_21_IBUF$BUF0.EXP -INPUTMC | 3 | 4 | 0 | 3 | 9 | 6 | 8 -INPUTP | 4 | 36 | 24 | 30 | 29 -IMPORTS | 1 | 6 | 8 -EQ | 10 | - RA<8> = A_FSB<23> & A_FSB<18> - # A_FSB<18> & !ram/RASEL - # A_FSB<22> & !A_FSB<21> & A_FSB<18> - # A_FSB<22> & A_FSB<18> & cs/nOverlay1 - # !A_FSB<22> & A_FSB<18> & !cs/nOverlay1 -;Imported pterms FB7_9 - # A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - ram/RASEL - # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & ram/RASEL; - -MACROCELL | 6 | 10 | RA_9_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 6 | 9 -INPUTS | 9 | A_FSB<19> | ram/RASEL | A_FSB<20> | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady -INPUTMC | 4 | 4 | 0 | 3 | 9 | 6 | 3 | 6 | 0 -INPUTP | 5 | 26 | 28 | 36 | 30 | 29 -EXPORTS | 1 | 6 | 9 -EQ | 4 | - RA<9> = A_FSB<20> & ram/RASEL - # A_FSB<19> & !ram/RASEL; - RA_9_OBUF.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady - -MACROCELL | 7 | 11 | nBERR_FSB_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 7 | 12 -INPUTS | 12 | nAS_FSB | A_FSB<23> | A_FSB<21> | iobs/Once | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 | EXP34_.EXP -INPUTMC | 3 | 7 | 13 | 3 | 9 | 7 | 10 -INPUTP | 9 | 54 | 36 | 29 | 47 | 28 | 97 | 19 | 18 | 30 -EXPORTS | 1 | 7 | 12 -IMPORTS | 1 | 7 | 10 -EQ | 11 | - nBERR_FSB = nAS_FSB -;Imported pterms FB8_11 - # !BERR_IOBS & !TimeoutB & !fsb/BERR0r & !fsb/BERR1r - # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & - !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r; - nBERR_FSB_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB - # !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1> - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - !iobs/Once - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & - cs/nOverlay1 - -MACROCELL | 4 | 5 | nOE_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 6 -INPUTS | 10 | nWE_FSB | nAS_FSB | A_FSB<22> | A_FSB<21> | cnt/RefDone | ram/RS_FSM_FFd1 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | cs/nOverlay1 -INPUTMC | 6 | 3 | 11 | 6 | 6 | 3 | 2 | 3 | 0 | 4 | 2 | 3 | 9 -INPUTP | 4 | 47 | 54 | 30 | 29 -EXPORTS | 1 | 4 | 6 -EQ | 7 | - !nOE = nWE_FSB & !nAS_FSB; - nOE_OBUF.EXP = A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - -MACROCELL | 2 | 16 | nROMWE_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 2 | 15 -INPUTS | 26 | nWE_FSB | nAS_FSB | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | BERR_IOBS | fsb/BERR0r | fsb/BERR1r | fsb/Ready1r | nBR_IOB | $OpTx$FX_DC$708 | $OpTx$$OpTx$FX_DC$182_INV$783 | iobs/IOReady -INPUTMC | 8 | 3 | 17 | 7 | 15 | 3 | 8 | 2 | 0 | 7 | 14 | 0 | 13 | 6 | 9 | 3 | 16 -INPUTP | 18 | 47 | 54 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 -EXPORTS | 1 | 2 | 15 -EQ | 13 | - !nROMWE = !nWE_FSB & !nAS_FSB; - nROMWE_OBUF.EXP = A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - fsb/Ready1r & nBR_IOB & !$OpTx$FX_DC$708 & - !$OpTx$$OpTx$FX_DC$182_INV$783 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - iobs/IOReady & nBR_IOB & !$OpTx$FX_DC$708 & - !$OpTx$$OpTx$FX_DC$182_INV$783 - -MACROCELL | 3 | 10 | nVPA_FSB_OBUF -ATTRIBUTES | 264962 | 0 -INPUTS | 2 | fsb/VPA | nAS_FSB -INPUTMC | 1 | 2 | 14 -INPUTP | 1 | 54 -EQ | 1 | - !nVPA_FSB = fsb/VPA & !nAS_FSB; - -MACROCELL | 5 | 14 | nADoutLE0_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 5 | 15 -INPUTS | 7 | ALE0M | ALE0S | CLK_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/DTACKrf | iobm/DTACKrr -INPUTMC | 6 | 5 | 6 | 0 | 12 | 5 | 2 | 0 | 16 | 1 | 12 | 1 | 11 -INPUTP | 1 | 35 -EXPORTS | 1 | 5 | 15 -EQ | 3 | - nADoutLE0 = !ALE0M & !ALE0S; - nADoutLE0_OBUF.EXP = CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/DTACKrf & iobm/DTACKrr - -MACROCELL | 4 | 4 | nCAS_OBUF -ATTRIBUTES | 8684290 | 0 -OUTPUTMC | 1 | 4 | 3 -INPUTS | 16 | ram/RASEL | A_FSB<23> | A_FSB<22> | A_FSB<21> | ram/Once | cnt/RefDone | cs/nOverlay1 | ram/RAMDIS2 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf -INPUTMC | 12 | 4 | 0 | 4 | 15 | 3 | 11 | 3 | 9 | 4 | 3 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 2 | 3 | 0 | 4 | 2 | 0 | 3 -INPUTP | 4 | 36 | 30 | 29 | 54 -EXPORTS | 1 | 4 | 3 -EQ | 10 | - nCAS.D = !ram/RASEL; - !nCAS.CLK = CLK_FSB; // GCK - nCAS_OBUF.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & - !cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & - !cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> & fsb/ASrf -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 5 | 16 | nDinLE_OBUF -ATTRIBUTES | 8684290 | 0 -OUTPUTMC | 1 | 5 | 15 -INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | CLK_IOB | iobm/IOS_FSM_FFd3 | iobm/RESrf | iobm/RESrr -INPUTMC | 5 | 0 | 16 | 5 | 9 | 5 | 2 | 0 | 2 | 0 | 1 -INPUTP | 1 | 35 -EXPORTS | 1 | 5 | 15 -EQ | 4 | - nDinLE.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2; - !nDinLE.CLK = CLK2X_IOB; // GCK - nDinLE_OBUF.EXP = CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/RESrf & iobm/RESrr -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 3 | 5 | nDinOE_OBUF -ATTRIBUTES | 264962 | 0 -INPUTS | 7 | A_FSB<23> | nWE_FSB | nAS_FSB | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> -INPUTP | 7 | 36 | 47 | 54 | 30 | 29 | 28 | 97 -EQ | 5 | - nDinOE = A_FSB<23> & nWE_FSB & !nAS_FSB - # A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & - !nAS_FSB - # A_FSB<22> & !A_FSB<21> & nWE_FSB & !nAS_FSB & - !SW<1>; - -MACROCELL | 3 | 4 | nDoutOE_OBUF -ATTRIBUTES | 8684290 | 0 -INPUTS | 3 | IORW0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 -INPUTMC | 3 | 7 | 17 | 5 | 2 | 5 | 9 -EQ | 3 | - nDoutOE.D = !IORW0 - # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2; - nDoutOE.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 7 | 4 | nRAS_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 7 | 3 -INPUTS | 14 | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 | nRAMLWE_OBUF.EXP -INPUTMC | 5 | 7 | 3 | 3 | 7 | 5 | 13 | 3 | 9 | 7 | 5 -INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30 -EXPORTS | 1 | 7 | 3 -IMPORTS | 1 | 7 | 5 -EQ | 16 | - !nRAS = ;Imported pterms FB8_6 - RefAck - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1; - nRAS_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & nWE_FSB & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & !A_FSB<20> & SW<1> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - -MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0 -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 7 | 0 -INPUTS | 7 | A_FSB<19> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/Once | nADoutLE1 | IORW0 | nWE_FSB -INPUTMC | 5 | 7 | 3 | 3 | 7 | 7 | 13 | 5 | 13 | 7 | 17 -INPUTP | 2 | 26 | 47 -EXPORTS | 1 | 7 | 0 -EQ | 5 | - RA<11> = A_FSB<19>; - A_FSB_19_IBUF$BUF0.EXP = iobs/PS_FSM_FFd2 - # iobs/PS_FSM_FFd1 - # iobs/Once & nADoutLE1 - # IORW0 & nWE_FSB & nADoutLE1 - -MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0 -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 6 | 7 -INPUTS | 6 | A_FSB<21> | A_FSB<9> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RASEL -INPUTMC | 2 | 3 | 9 | 4 | 0 -INPUTP | 4 | 29 | 12 | 36 | 30 -EXPORTS | 1 | 6 | 7 -EQ | 5 | - RA<10> = A_FSB<21>; - A_FSB_21_IBUF$BUF0.EXP = A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - ram/RASEL - # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & ram/RASEL - -MACROCELL | 6 | 13 | CLK20EN_OBUF$BUF0 -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 6 | 12 -INPUTS | 10 | SW<0> | cnt/RefDone | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf -INPUTMC | 8 | 3 | 11 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 2 | 3 | 0 | 4 | 2 | 0 | 3 -INPUTP | 2 | 98 | 54 -EXPORTS | 1 | 6 | 12 -EQ | 7 | - CLK20EN = SW<0>; - CLK20EN_OBUF$BUF0.EXP = !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & - ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & - ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - fsb/ASrf - -MACROCELL | 6 | 11 | CLK25EN_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 6 | 12 -INPUTS | 9 | SW<0> | A_FSB<22> | A_FSB<21> | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cs/nOverlay1 | nAS_FSB | fsb/ASrf -INPUTMC | 5 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 9 | 0 | 3 -INPUTP | 4 | 98 | 30 | 29 | 54 -EXPORTS | 1 | 6 | 12 -EQ | 9 | - CLK25EN = !SW<0>; - CLK25EN_OBUF.EXP = A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd3 & !fsb/ASrf - -MACROCELL | 7 | 14 | Park -ATTRIBUTES | 8815430 | 0 -OUTPUTMC | 5 | 2 | 14 | 2 | 8 | 2 | 10 | 2 | 16 | 7 | 13 -INPUTS | 13 | RESr0 | RESr1 | IPL2r0 | RESr2 | RESDone | IPL2r1 | A_FSB<23> | A_FSB<21> | A_FSB<19> | iobs/Once | A_FSB<18> | A_FSB<17> | A_FSB<16> -INPUTMC | 7 | 0 | 9 | 0 | 8 | 0 | 11 | 0 | 7 | 7 | 6 | 0 | 10 | 7 | 13 -INPUTP | 6 | 36 | 29 | 26 | 24 | 23 | 22 -EXPORTS | 1 | 7 | 13 -EQ | 8 | - nBR_IOB.D = Gnd; - nBR_IOB.CLK = CLK_FSB; // GCK - nBR_IOB.CE = RESr0 & RESr1 & IPL2r0 & RESr2 & !RESDone & - IPL2r1; - Park.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 5 | 13 | nADoutLE1_OBUF -ATTRIBUTES | 8815366 | 0 -OUTPUTMC | 22 | 7 | 13 | 3 | 17 | 7 | 17 | 3 | 15 | 0 | 17 | 5 | 13 | 2 | 9 | 2 | 2 | 3 | 16 | 2 | 17 | 7 | 3 | 4 | 12 | 7 | 8 | 2 | 15 | 7 | 0 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 16 -INPUTS | 3 | iobs/Clear1 | nADoutLE1 | iobs/Load1 -INPUTMC | 3 | 2 | 17 | 5 | 13 | 4 | 12 -EQ | 3 | - !nADoutLE1.D = iobs/Load1 - # !iobs/Clear1 & !nADoutLE1; - nADoutLE1.CLK = CLK_FSB; // GCK -GLOBALS | 1 | 2 | CLK_FSB - -MACROCELL | 3 | 1 | nAoutOE_OBUF -ATTRIBUTES | 8815366 | 0 -OUTPUTMC | 8 | 5 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 5 | 15 | 5 | 6 | 3 | 1 -INPUTS | 4 | iobm/BGr1 | nAoutOE | iobm/BGr0 | nAS_IOB -INPUTMC | 4 | 1 | 13 | 3 | 1 | 1 | 14 | 5 | 11 -EQ | 4 | - nAoutOE.D = !iobm/BGr0 & !iobm/BGr1 - # !iobm/BGr1 & nAoutOE - # !nAS_IOB & !iobm/BGr0 & !nAoutOE; - nAoutOE.CLK = CLK2X_IOB; // GCK -GLOBALS | 1 | 2 | CLK2X_IOB - -MACROCELL | 7 | 5 | nRAMLWE_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 7 | 4 -INPUTS | 10 | nWE_FSB | nLDS_FSB | ram/RAMDIS2 | nAS_FSB | ram/RAMDIS1 | RefAck | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21> -INPUTMC | 4 | 4 | 3 | 4 | 7 | 0 | 6 | 3 | 9 -INPUTP | 6 | 47 | 49 | 54 | 36 | 30 | 29 -EXPORTS | 1 | 7 | 4 -EQ | 7 | - !nRAMLWE = !nWE_FSB & !nLDS_FSB & !ram/RAMDIS2 & !nAS_FSB & - !ram/RAMDIS1; - nRAMLWE_OBUF.EXP = RefAck - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1 - -MACROCELL | 7 | 7 | nRAMUWE_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 7 | 8 -INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | nADoutLE1 | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> | RESDone.EXP -INPUTMC | 3 | 7 | 3 | 5 | 13 | 7 | 6 -INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22 -EXPORTS | 1 | 7 | 8 -IMPORTS | 1 | 7 | 6 -EQ | 13 | - !nRAMUWE = ;Imported pterms FB8_7 - !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & - !ram/RAMDIS1; - nRAMUWE_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - -MACROCELL | 4 | 1 | nROMCS_OBUF -ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 0 -INPUTS | 13 | A_FSB<22> | cnt/RefDone | cs/nOverlay1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | ram/BACTr | fsb/ASrf | nAS_FSB | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | ram/RS_FSM_FFd3 | cnt/RefCnt<7>.EXP -INPUTMC | 11 | 3 | 11 | 3 | 9 | 6 | 16 | 6 | 6 | 0 | 0 | 0 | 3 | 3 | 2 | 3 | 0 | 4 | 2 | 6 | 12 | 4 | 2 -INPUTP | 2 | 30 | 54 -EXPORTS | 1 | 4 | 0 -IMPORTS | 1 | 4 | 2 -EQ | 19 | - !nROMCS = ;Imported pterms FB5_3 - A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !SW<1> - # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - SW<1> - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay1; - nROMCS_OBUF.EXP = A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - !fsb/ASrf - # !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd1 & - ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - !fsb/ASrf - -MACROCELL | 0 | 13 | $OpTx$FX_DC$708 -ATTRIBUTES | 133888 | 0 -OUTPUTMC | 5 | 2 | 14 | 2 | 12 | 2 | 13 | 2 | 15 | 2 | 16 -INPUTS | 2 | nAS_FSB | fsb/ASrf -INPUTMC | 1 | 0 | 3 -INPUTP | 1 | 54 -EQ | 1 | - $OpTx$FX_DC$708 = nAS_FSB & !fsb/ASrf; - -MACROCELL | 6 | 9 | $OpTx$$OpTx$FX_DC$182_INV$783 -ATTRIBUTES | 133888 | 0 -OUTPUTMC | 4 | 2 | 14 | 2 | 8 | 2 | 10 | 2 | 16 -INPUTS | 9 | A_FSB<20> | TimeoutB | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | RA_9_OBUF.EXP -INPUTMC | 5 | 6 | 2 | 3 | 9 | 6 | 3 | 6 | 0 | 6 | 10 -INPUTP | 4 | 28 | 36 | 30 | 29 -IMPORTS | 1 | 6 | 10 -EQ | 9 | - $OpTx$$OpTx$FX_DC$182_INV$783 = A_FSB<23> & TimeoutB - # !A_FSB<22> & TimeoutB - # A_FSB<21> & TimeoutB - # !A_FSB<20> & TimeoutB - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & !ram/RAMReady -;Imported pterms FB7_11 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady; - -MACROCELL | 2 | 1 | EXP14_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 2 -INPUTS | 10 | nAS_FSB | fsb/ASrf | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB<20> | fsb/Ready1r.EXP -INPUTMC | 5 | 0 | 3 | 7 | 3 | 3 | 7 | 3 | 9 | 2 | 0 -INPUTP | 5 | 54 | 36 | 30 | 29 | 28 -EXPORTS | 1 | 2 | 2 -IMPORTS | 1 | 2 | 0 -EQ | 8 | - EXP14_.EXP = nAS_FSB & !fsb/ASrf - # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> -;Imported pterms FB3_1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 - -MACROCELL | 2 | 3 | EXP15_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 2 -INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | A_FSB<20> | SW<1> | fsb/Ready2r.EXP -INPUTMC | 1 | 2 | 4 -INPUTP | 8 | 36 | 29 | 26 | 24 | 23 | 22 | 28 | 97 -EXPORTS | 1 | 2 | 2 -IMPORTS | 1 | 2 | 4 -EQ | 7 | - EXP15_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> - # !A_FSB<23> & !A_FSB<20> & SW<1> -;Imported pterms FB3_5 - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> - -MACROCELL | 2 | 5 | EXP16_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 4 -INPUTS | 21 | nAS_FSB | fsb/ASrf | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | TimeoutA | fsb/Ready2r -INPUTMC | 4 | 0 | 3 | 3 | 9 | 3 | 14 | 2 | 4 -INPUTP | 17 | 54 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 -EXPORTS | 1 | 2 | 4 -EQ | 17 | - EXP16_.EXP = nAS_FSB & !fsb/ASrf - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r - -MACROCELL | 2 | 6 | EXP17_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 7 -INPUTS | 21 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | TimeoutA | fsb/Ready2r | nDTACK_FSB | A_FSB<8> -INPUTMC | 4 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 8 -INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11 -EXPORTS | 1 | 2 | 7 -EQ | 15 | - EXP17_.EXP = A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - -MACROCELL | 2 | 7 | EXP18_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 8 -INPUTS | 18 | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | EXP17_.EXP -INPUTMC | 6 | 0 | 3 | 2 | 0 | 3 | 16 | 2 | 8 | 3 | 9 | 2 | 6 -INPUTP | 12 | 54 | 36 | 30 | 29 | 28 | 97 | 19 | 26 | 24 | 23 | 22 | 47 -EXPORTS | 1 | 2 | 8 -IMPORTS | 1 | 2 | 6 -EQ | 26 | - EXP18_.EXP = nAS_FSB & !fsb/ASrf - # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & - nDTACK_FSB - # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & - !iobs/IOReady & nDTACK_FSB - # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & - !iobs/IOReady & !SW<1> & nDTACK_FSB - # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB -;Imported pterms FB3_7 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - -MACROCELL | 2 | 9 | EXP19_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 8 -INPUTS | 25 | A_FSB<13> | A_FSB<22> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | A_FSB<14> | A_FSB<21> | nADoutLE1 | A_FSB<9> | A_FSB<15> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | TimeoutA | fsb/Ready2r | A_FSB<8> | EXP20_.EXP -INPUTMC | 8 | 3 | 9 | 2 | 0 | 3 | 16 | 2 | 8 | 5 | 13 | 3 | 14 | 2 | 4 | 2 | 10 -INPUTP | 17 | 18 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 19 | 29 | 12 | 21 | 17 | 15 | 13 | 36 | 11 -EXPORTS | 1 | 2 | 8 -IMPORTS | 1 | 2 | 10 -EQ | 47 | - EXP19_.EXP = A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB - # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - nDTACK_FSB & !nADoutLE1 - # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & - nDTACK_FSB & !nADoutLE1 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB -;Imported pterms FB3_11 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - fsb/Ready1r & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - iobs/IOReady & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783 - -MACROCELL | 2 | 10 | EXP20_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 9 -INPUTS | 28 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | TimeoutA | fsb/Ready2r | nDTACK_FSB | A_FSB<8> | BERR_IOBS | fsb/BERR0r | fsb/BERR1r | fsb/Ready1r | nBR_IOB | $OpTx$$OpTx$FX_DC$182_INV$783 | iobs/IOReady -INPUTMC | 11 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 8 | 3 | 17 | 7 | 15 | 3 | 8 | 2 | 0 | 7 | 14 | 6 | 9 | 3 | 16 -INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11 -EXPORTS | 1 | 2 | 9 -EQ | 25 | - EXP20_.EXP = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - nDTACK_FSB - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - fsb/Ready1r & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - iobs/IOReady & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783 - -MACROCELL | 2 | 12 | EXP21_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 13 -INPUTS | 22 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | TimeoutA | fsb/Ready2r | fsb/VPA | $OpTx$FX_DC$708 | A_FSB<8> -INPUTMC | 5 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 14 | 0 | 13 -INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11 -EXPORTS | 1 | 2 | 13 -EQ | 25 | - EXP21_.EXP = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - -MACROCELL | 2 | 13 | EXP22_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 14 -INPUTS | 18 | A_FSB<23> | fsb/Ready1r | fsb/VPA | iobs/IOReady | $OpTx$FX_DC$708 | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | A_FSB<13> | EXP21_.EXP -INPUTMC | 6 | 2 | 0 | 2 | 14 | 3 | 16 | 0 | 13 | 3 | 9 | 2 | 12 -INPUTP | 12 | 36 | 30 | 29 | 28 | 97 | 19 | 26 | 24 | 23 | 22 | 47 | 18 -EXPORTS | 1 | 2 | 14 -IMPORTS | 1 | 2 | 12 -EQ | 38 | - EXP22_.EXP = A_FSB<23> & !fsb/Ready1r & fsb/VPA & - !iobs/IOReady & !$OpTx$FX_DC$708 - # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & - fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708 - # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA & - !iobs/IOReady & !SW<1> & !$OpTx$FX_DC$708 - # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708 - # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708 -;Imported pterms FB3_13 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - -MACROCELL | 2 | 15 | EXP23_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 14 -INPUTS | 26 | A_FSB<14> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | nWE_FSB | fsb/Ready1r | fsb/VPA | iobs/IOReady | nADoutLE1 | $OpTx$FX_DC$708 | A_FSB<13> | A_FSB<9> | A_FSB<15> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | TimeoutA | fsb/Ready2r | A_FSB<8> | nROMWE_OBUF.EXP -INPUTMC | 9 | 3 | 9 | 2 | 0 | 2 | 14 | 3 | 16 | 5 | 13 | 0 | 13 | 3 | 14 | 2 | 4 | 2 | 16 -INPUTP | 17 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 12 | 21 | 17 | 15 | 13 | 36 | 11 -EXPORTS | 1 | 2 | 14 -IMPORTS | 1 | 2 | 16 -EQ | 36 | - EXP23_.EXP = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & - !nADoutLE1 & !$OpTx$FX_DC$708 - # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & - A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & - !nADoutLE1 & !$OpTx$FX_DC$708 - # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & - A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 - # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & - !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & - A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & - A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & - fsb/VPA & !$OpTx$FX_DC$708 -;Imported pterms FB3_17 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - fsb/Ready1r & nBR_IOB & !$OpTx$FX_DC$708 & - !$OpTx$$OpTx$FX_DC$182_INV$783 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & - iobs/IOReady & nBR_IOB & !$OpTx$FX_DC$708 & - !$OpTx$$OpTx$FX_DC$182_INV$783 - -MACROCELL | 4 | 6 | EXP24_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 4 | 7 -INPUTS | 9 | A_FSB<22> | A_FSB<21> | cnt/RefDone | nAS_FSB | ram/RS_FSM_FFd1 | ram/BACTr | fsb/ASrf | cs/nOverlay1 | nOE_OBUF.EXP -INPUTMC | 6 | 3 | 11 | 6 | 6 | 0 | 0 | 0 | 3 | 3 | 9 | 4 | 5 -INPUTP | 3 | 30 | 29 | 54 -EXPORTS | 1 | 4 | 7 -IMPORTS | 1 | 4 | 5 -EQ | 17 | - EXP24_.EXP = A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr -;Imported pterms FB5_6 - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> - -MACROCELL | 4 | 9 | EXP25_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 4 | 8 -INPUTS | 3 | A_FSB<14> | ram/RASEL | A_FSB<5> -INPUTMC | 1 | 4 | 0 -INPUTP | 2 | 19 | 4 -EXPORTS | 1 | 4 | 8 -EQ | 2 | - EXP25_.EXP = A_FSB<14> & !ram/RASEL - # ram/RASEL & A_FSB<5> - -MACROCELL | 4 | 16 | EXP26_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 4 | 17 -INPUTS | 13 | A_FSB<23> | A_FSB<22> | A_FSB<21> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | fsb/ASrf | cnt/RefDone | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> -INPUTMC | 9 | 4 | 15 | 3 | 9 | 6 | 16 | 6 | 6 | 0 | 3 | 3 | 11 | 3 | 2 | 3 | 0 | 4 | 2 -INPUTP | 4 | 36 | 30 | 29 | 54 -EXPORTS | 1 | 4 | 17 -EQ | 13 | - EXP26_.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - -MACROCELL | 4 | 17 | EXP27_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 4 | 0 -INPUTS | 12 | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd1 | fsb/ASrf | A_FSB<21> | cnt/RefDone | ram/BACTr | EXP26_.EXP -INPUTMC | 8 | 4 | 15 | 3 | 9 | 6 | 16 | 6 | 6 | 0 | 3 | 3 | 11 | 0 | 0 | 4 | 16 -INPUTP | 4 | 36 | 30 | 54 | 29 -EXPORTS | 1 | 4 | 0 -IMPORTS | 1 | 4 | 16 -EQ | 24 | - EXP27_.EXP = !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr -;Imported pterms FB5_17 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - -MACROCELL | 6 | 14 | EXP28_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 6 | 15 -INPUTS | 13 | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | fsb/ASrf | A_FSB<21> | nAS_FSB | cnt/RefDone | ram/RS_FSM_FFd2 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> -INPUTMC | 9 | 3 | 9 | 6 | 6 | 6 | 12 | 0 | 3 | 3 | 11 | 6 | 16 | 3 | 2 | 3 | 0 | 4 | 2 -INPUTP | 4 | 36 | 30 | 29 | 54 -EXPORTS | 1 | 6 | 15 -EQ | 9 | - EXP28_.EXP = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd2 & - ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - !fsb/ASrf - -MACROCELL | 6 | 15 | EXP29_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 6 | 16 -INPUTS | 12 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | ram/BACTr | nAS_FSB | fsb/ASrf | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | EXP28_.EXP -INPUTMC | 9 | 6 | 6 | 6 | 12 | 3 | 2 | 0 | 0 | 0 | 3 | 3 | 0 | 4 | 2 | 3 | 9 | 6 | 14 -INPUTP | 3 | 54 | 36 | 30 -EXPORTS | 1 | 6 | 16 -IMPORTS | 1 | 6 | 14 -EQ | 20 | - EXP29_.EXP = !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<5> & ram/BACTr - # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<5> & !fsb/ASrf - # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<6> & !fsb/ASrf - # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & - !cnt/RefCnt<7> & !fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 -;Imported pterms FB7_15 - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd2 & - ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & - !fsb/ASrf - -MACROCELL | 6 | 17 | EXP30_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 6 | 0 -INPUTS | 11 | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | fsb/ASrf | cnt/RefDone | ram/BACTr | A_FSB<21> | ram/RS_FSM_FFd2.EXP -INPUTMC | 7 | 4 | 15 | 3 | 9 | 6 | 6 | 0 | 3 | 3 | 11 | 0 | 0 | 6 | 16 -INPUTP | 4 | 36 | 30 | 54 | 29 -EXPORTS | 1 | 6 | 0 -IMPORTS | 1 | 6 | 16 -EQ | 13 | - EXP30_.EXP = !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !nAS_FSB & !ram/RS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf -;Imported pterms FB7_17 - # !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & - cnt/RefCnt<7> - -MACROCELL | 7 | 0 | EXP31_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 17 -INPUTS | 9 | IORW0 | iobs/IORW1 | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB_19_IBUF$BUF0.EXP -INPUTMC | 5 | 7 | 17 | 2 | 2 | 5 | 13 | 0 | 3 | 7 | 1 -INPUTP | 4 | 54 | 36 | 30 | 29 -EXPORTS | 1 | 7 | 17 -IMPORTS | 1 | 7 | 1 -EQ | 10 | - EXP31_.EXP = IORW0 & iobs/IORW1 & !nADoutLE1 - # !IORW0 & !iobs/IORW1 & !nADoutLE1 - # nAS_FSB & !fsb/ASrf & nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !IORW0 & nADoutLE1 -;Imported pterms FB8_2 - # iobs/PS_FSM_FFd2 - # iobs/PS_FSM_FFd1 - # iobs/Once & nADoutLE1 - # IORW0 & nWE_FSB & nADoutLE1 - -MACROCELL | 7 | 2 | EXP32_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 3 -INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> -INPUTMC | 3 | 7 | 3 | 3 | 7 | 5 | 13 -INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22 -EXPORTS | 1 | 7 | 3 -EQ | 10 | - EXP32_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - -MACROCELL | 7 | 9 | EXP33_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 8 -INPUTS | 12 | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | nADoutLE1 | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 -INPUTMC | 3 | 7 | 3 | 5 | 13 | 3 | 9 -INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30 -EXPORTS | 1 | 7 | 8 -EQ | 10 | - EXP33_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & nWE_FSB & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & !A_FSB<20> & SW<1> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - !iobs/PS_FSM_FFd2 & nADoutLE1 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1 - -MACROCELL | 7 | 10 | EXP34_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 11 -INPUTS | 8 | BERR_IOBS | TimeoutB | fsb/BERR0r | fsb/BERR1r | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> -INPUTMC | 4 | 3 | 17 | 6 | 2 | 7 | 15 | 3 | 8 -INPUTP | 4 | 36 | 30 | 29 | 28 -EXPORTS | 1 | 7 | 11 -EQ | 3 | - EXP34_.EXP = !BERR_IOBS & !TimeoutB & !fsb/BERR0r & !fsb/BERR1r - # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & - !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r - -MACROCELL | 7 | 12 | EXP35_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 13 -INPUTS | 9 | A_FSB<23> | iobs/Once | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB<20> | nBERR_FSB_OBUF.EXP -INPUTMC | 5 | 7 | 13 | 3 | 7 | 5 | 13 | 3 | 9 | 7 | 11 -INPUTP | 4 | 36 | 30 | 29 | 28 -EXPORTS | 1 | 7 | 13 -IMPORTS | 1 | 7 | 11 -EQ | 13 | - EXP35_.EXP = A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1 - # !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once - # !A_FSB<23> & !A_FSB<22> & !iobs/Once & - !cs/nOverlay1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once -;Imported pterms FB8_12 - # !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB - # !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1> - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & - !iobs/Once - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & - cs/nOverlay1 - -MACROCELL | 7 | 16 | EXP36_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 17 -INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<19> | nADoutLE1 | A_FSB<18> | A_FSB<17> | A_FSB<16> | A_FSB<20> | SW<1> -INPUTMC | 1 | 5 | 13 -INPUTP | 8 | 36 | 29 | 26 | 24 | 23 | 22 | 28 | 97 -EXPORTS | 1 | 7 | 17 -EQ | 5 | - EXP36_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1 - # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1 - # !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1 - -PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 8 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 16 | 2 | 9 | 2 | 10 | 2 | 15 | 6 | 8 -PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 8 | 6 | 4 | 2 | 12 | 2 | 6 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16 -PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 4 | 10 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16 -PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 17 | 7 | 11 | 7 | 17 | 2 | 17 | 2 | 4 | 2 | 13 | 7 | 4 | 2 | 7 | 4 | 13 | 4 | 9 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 9 -PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 16 | 7 | 11 | 7 | 17 | 4 | 10 | 2 | 4 | 2 | 13 | 7 | 4 | 2 | 6 | 4 | 13 | 2 | 17 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 9 -PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 16 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 4 | 14 -PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 16 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 6 | 2 -PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 6 | 5 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16 -PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 56 | 4 | 15 | 7 | 13 | 7 | 17 | 3 | 12 | 7 | 15 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 2 | 4 | 3 | 2 | 7 | 4 | 0 | 6 | 15 | 6 | 6 | 6 | 12 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 7 | 6 | 0 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 16 | 6 | 9 | 2 | 1 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 2 | 4 | 4 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 8 | 6 | 10 | 6 | 14 | 6 | 17 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16 -PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 53 | 4 | 15 | 7 | 13 | 7 | 17 | 3 | 12 | 7 | 15 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 1 | 4 | 3 | 2 | 7 | 2 | 17 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 6 | 6 | 0 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 16 | 6 | 9 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 8 | 6 | 10 | 6 | 14 | 6 | 17 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11 | 7 | 12 -PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 49 | 4 | 15 | 7 | 12 | 7 | 17 | 3 | 12 | 7 | 15 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 2 | 4 | 2 | 2 | 7 | 2 | 17 | 6 | 14 | 6 | 6 | 6 | 11 | 7 | 2 | 4 | 11 | 7 | 7 | 4 | 6 | 6 | 0 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 0 | 6 | 8 | 2 | 16 | 6 | 9 | 2 | 1 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 4 | 4 | 5 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 10 | 6 | 17 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11 | 7 | 14 | 7 | 16 -PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 31 | 7 | 12 | 7 | 17 | 3 | 12 | 7 | 15 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 1 | 2 | 7 | 7 | 2 | 4 | 11 | 7 | 7 | 6 | 10 | 7 | 10 | 3 | 5 | 2 | 17 | 6 | 9 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 4 | 2 | 4 | 13 | 7 | 4 | 7 | 9 | 7 | 11 | 7 | 16 -PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 19 | 2 | 17 | 7 | 16 | 7 | 1 | 2 | 4 | 2 | 13 | 6 | 10 | 2 | 7 | 7 | 2 | 4 | 11 | 7 | 7 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14 -PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 18 | 7 | 9 | 7 | 16 | 6 | 7 | 2 | 4 | 2 | 13 | 7 | 4 | 2 | 7 | 4 | 13 | 2 | 17 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14 -PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 18 | 2 | 17 | 7 | 16 | 6 | 4 | 2 | 4 | 2 | 13 | 7 | 7 | 2 | 7 | 7 | 2 | 4 | 11 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14 -PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 18 | 2 | 17 | 7 | 16 | 4 | 14 | 2 | 4 | 2 | 13 | 7 | 7 | 2 | 7 | 7 | 2 | 4 | 11 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14 -PIN | CLK2X_IOB | 4096 | 0 | N/A | 33 | 31 | 5 | 1 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 5 | 17 | 1 | 14 | 1 | 11 | 5 | 0 | 1 | 9 | 1 | 6 | 5 | 6 | 1 | 15 | 1 | 13 | 0 | 1 | 3 | 4 | 3 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 1 | 8 | 1 | 12 | 1 | 7 | 1 | 16 | 0 | 2 | 5 | 16 -PIN | CLK_FSB | 16384 | 0 | N/A | 42 | 57 | 4 | 15 | 3 | 11 | 7 | 13 | 3 | 9 | 3 | 17 | 7 | 17 | 3 | 12 | 3 | 15 | 0 | 17 | 3 | 14 | 6 | 2 | 3 | 13 | 7 | 15 | 3 | 8 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 14 | 0 | 15 | 2 | 2 | 3 | 16 | 0 | 14 | 4 | 3 | 2 | 8 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 7 | 3 | 3 | 7 | 1 | 17 | 3 | 2 | 3 | 0 | 1 | 5 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 12 | 0 | 0 | 0 | 9 | 0 | 8 | 4 | 2 | 0 | 11 | 0 | 7 | 0 | 6 | 7 | 6 | 0 | 12 | 7 | 8 | 0 | 10 | 2 | 17 | 4 | 7 | 6 | 0 | 7 | 14 | 5 | 13 | 0 | 3 | 4 | 4 -PIN | nAS_FSB | 64 | 0 | N/A | 54 | 47 | 4 | 15 | 7 | 13 | 3 | 9 | 3 | 17 | 6 | 17 | 3 | 12 | 3 | 14 | 6 | 2 | 3 | 13 | 7 | 15 | 3 | 8 | 6 | 3 | 2 | 0 | 0 | 13 | 2 | 1 | 3 | 16 | 4 | 3 | 2 | 7 | 4 | 0 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 0 | 0 | 7 | 8 | 0 | 3 | 4 | 7 | 6 | 0 | 7 | 11 | 4 | 5 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 0 | 7 | 5 | 7 | 6 | 2 | 5 | 4 | 1 | 4 | 4 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 13 | 6 | 14 -PIN | nWE_FSB | 64 | 0 | N/A | 47 | 22 | 7 | 11 | 7 | 17 | 7 | 6 | 2 | 4 | 2 | 13 | 2 | 2 | 2 | 7 | 7 | 1 | 2 | 17 | 7 | 4 | 4 | 5 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 13 | 7 | 9 -PIN | SW<1> | 64 | 0 | N/A | 97 | 11 | 7 | 11 | 7 | 16 | 2 | 0 | 2 | 13 | 2 | 3 | 2 | 7 | 4 | 13 | 4 | 2 | 7 | 4 | 3 | 5 | 7 | 9 -PIN | nRES | 64 | 0 | N/A | 145 | 4 | 3 | 12 | 0 | 9 | 0 | 2 | 0 | 1 -PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 3 | 15 | 0 | 15 | 7 | 5 -PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 0 | 17 | 0 | 14 | 7 | 6 -PIN | CLK_IOB | 8256 | 0 | N/A | 35 | 8 | 5 | 2 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 0 | 5 | 14 | 5 | 16 | 1 | 10 -PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 4 | 5 | 17 | 1 | 16 | 1 | 15 | 5 | 0 -PIN | E_IOB | 64 | 0 | N/A | 37 | 1 | 1 | 10 -PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 0 | 11 -PIN | nBG_IOB | 64 | 0 | N/A | 117 | 1 | 1 | 14 -PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 1 | 12 | 1 | 11 -PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 7 | 1 | 6 -PIN | A_FSB<1> | 64 | 0 | N/A | 149 | 1 | 6 | 5 -PIN | A_FSB<2> | 64 | 0 | N/A | 153 | 1 | 6 | 2 -PIN | A_FSB<3> | 64 | 0 | N/A | 155 | 1 | 4 | 14 -PIN | A_FSB<4> | 64 | 0 | N/A | 157 | 1 | 4 | 10 -PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 9 -PIN | A_FSB<6> | 64 | 0 | N/A | 6 | 1 | 4 | 10 -PIN | A_FSB<7> | 64 | 0 | N/A | 8 | 1 | 4 | 14 -PIN | SW<0> | 64 | 0 | N/A | 98 | 2 | 6 | 13 | 6 | 11 -PIN | nVMA_IOB | 536871040 | 0 | N/A | 118 -PIN | nAS_IOB | 536871040 | 0 | N/A | 135 -PIN | nLDS_IOB | 536871040 | 0 | N/A | 130 -PIN | nUDS_IOB | 536871040 | 0 | N/A | 134 -PIN | nDTACK_FSB | 536871040 | 0 | N/A | 44 -PIN | RA<0> | 536871040 | 0 | N/A | 86 -PIN | RA<1> | 536871040 | 0 | N/A | 79 -PIN | RA<2> | 536871040 | 0 | N/A | 69 -PIN | RA<3> | 536871040 | 0 | N/A | 64 -PIN | RA<4> | 536871040 | 0 | N/A | 63 -PIN | RA<5> | 536871040 | 0 | N/A | 68 -PIN | RA<6> | 536871040 | 0 | N/A | 72 -PIN | RA<7> | 536871040 | 0 | N/A | 82 -PIN | RA<8> | 536871040 | 0 | N/A | 88 -PIN | RA<9> | 536871040 | 0 | N/A | 92 -PIN | nBERR_FSB | 536871040 | 0 | N/A | 112 -PIN | nOE | 536871040 | 0 | N/A | 60 -PIN | nROMWE | 536871040 | 0 | N/A | 57 -PIN | nVPA_FSB | 536871040 | 0 | N/A | 147 -PIN | nADoutLE0 | 536871040 | 0 | N/A | 139 -PIN | nCAS | 536871040 | 0 | N/A | 59 -PIN | nDinLE | 536871040 | 0 | N/A | 140 -PIN | nDinOE | 536871040 | 0 | N/A | 144 -PIN | nDoutOE | 536871040 | 0 | N/A | 143 -PIN | nRAS | 536871040 | 0 | N/A | 103 -PIN | RA<11> | 536871040 | 0 | N/A | 102 -PIN | RA<10> | 536871040 | 0 | N/A | 90 -PIN | CLK20EN | 536871040 | 0 | N/A | 96 -PIN | CLK25EN | 536871040 | 0 | N/A | 95 -PIN | nBR_IOB | 536871040 | 0 | N/A | 116 -PIN | nADoutLE1 | 536871040 | 0 | N/A | 136 -PIN | nAoutOE | 536871040 | 0 | N/A | 141 -PIN | nRAMLWE | 536871040 | 0 | N/A | 104 -PIN | nRAMUWE | 536871040 | 0 | N/A | 105 -PIN | nROMCS | 536871040 | 0 | N/A | 58 diff --git a/cpld/XC95144XL/MXSE.nga b/cpld/XC95144XL/MXSE.nga deleted file mode 100644 index ac7b079..0000000 --- a/cpld/XC95144XL/MXSE.nga +++ /dev/null @@ -1,3 +0,0 @@ -XILINX-XDB 0.1 STUB 0.1 ASCII -XILINX-XDM V1.6e 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2h1v?:9:181[43>27?8;4=479'77g=:=20b><6:c9~w24=838pR:<4=2`1>6b<,:8j6:?4n20:>5=z{>:1<7281v;h50;1xZ3`<5:h96>o4=565>6g<,:8j6:?4n20:>7=z{?o1<7=t^7g896d52:2019:9:2:8 64f2>;0b><6:29~w3e=839pR;m4=2`1>60<5=>=6>84$20b>27l=:27891212:?0(>2<1v;o50;1xZ3g<5:h96>:4=565>62<,:8j6:?4n20:>3=z{?31<7=t^7;896d52:9019:9:218 64f2>;0b><6:69~w3>=839pR;64=2`1>64<5=>=6><4$20b>27l=:23891212:;0(>201v;850;1xZ30<5:h96>>4=565>66<,:8j6:?4n20:>d=z{??1<7=t^77896d52;l019:9:3d8 64f2>;0b><6:c9~w32=839pR;:4=2`1>7c<5=>=6?k4$20b>27l=:3f891212;n0(>2m1v:o50;1xZ2g<5:h969;4=565>13<,:8j6:?4n20:>`=z{>31<7=t^6;896d52=>019:9:568 64f2>;0b><6:g9~w2>=838pR:64=565>15<,:8j6:?4n20:>463>97)==a;52?k5513;:7p}86;296~X0>27?8;4;1:&06d<092d8>44>2:p30<72;qU;852454905=#;;k1;<5a33;956=z{>>1<728>0q~9<:181[1434>?:7=j;%11e?163g9957?:;|q5`?6=:rT=h63;47803>"4:h0<=6`<28822>{t;;i1<76}Y;;h0R4o4=8a9576'. The input(s) are unused - after optimization. Please verify functionality via simulation. - ************************* Summary of Mapped Logic ************************ - -** 35 Outputs ** - -Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init -Name Pts Inps No. Type Use Mode Rate State -nDTACK_FSB 23 32 FB3_9 28 I/O O STD FAST RESET -nROMWE 1 2 FB3_17 34 I/O O STD FAST -nAoutOE 3 4 FB4_2 87 I/O O STD FAST SET -nDoutOE 2 3 FB4_5 89 I/O O STD FAST RESET -nDinOE 3 7 FB4_6 90 I/O O STD FAST -nVPA_FSB 1 2 FB4_11 93 I/O O STD FAST -nROMCS 3 6 FB5_2 35 I/O O STD FAST -nCAS 1 1 FB5_5 36 I/O O STD FAST RESET -nOE 1 2 FB5_6 37 I/O O STD FAST -RA<4> 2 3 FB5_9 40 I/O O STD FAST -RA<3> 2 3 FB5_11 41 I/O O STD FAST -RA<5> 2 3 FB5_12 42 I/O O STD FAST -RA<2> 2 3 FB5_14 43 I/O O STD FAST -RA<6> 2 3 FB5_15 46 I/O O STD FAST -nVMA_IOB 3 10 FB6_2 74 I/O O STD FAST RESET -nLDS_IOB 4 6 FB6_9 79 I/O O STD FAST RESET -nUDS_IOB 4 6 FB6_11 80 I/O O STD FAST RESET -nAS_IOB 3 4 FB6_12 81 I/O O STD FAST RESET -nADoutLE1 2 3 FB6_14 82 I/O O STD FAST SET -nADoutLE0 1 2 FB6_15 85 I/O O STD FAST -nDinLE 1 2 FB6_17 86 I/O O STD FAST RESET -RA<1> 2 3 FB7_2 50 I/O O STD FAST -RA<7> 2 3 FB7_5 52 I/O O STD FAST -RA<0> 2 3 FB7_6 53 I/O O STD FAST -RA<8> 7 7 FB7_8 54 I/O O STD FAST -RA<10> 1 1 FB7_9 55 I/O O STD FAST -RA<9> 2 3 FB7_11 56 I/O O STD FAST -CLK25EN 1 1 FB7_12 58 I/O O STD FAST -CLK20EN 1 1 FB7_14 59 I/O O STD FAST -RA<11> 1 1 FB8_2 63 I/O O STD FAST -nRAS 3 8 FB8_5 64 I/O O STD FAST -nRAMLWE 1 5 FB8_6 65 I/O O STD FAST -nRAMUWE 1 5 FB8_8 66 I/O O STD FAST -nBERR_FSB 3 9 FB8_12 70 I/O O STD FAST -nBR_IOB 1 6 FB8_15 72 I/O O STD FAST SET - -** 80 Buried Nodes ** - -Signal Total Total Loc Pwr Reg Init -Name Pts Inps Mode State -ram/BACTr 1 2 FB1_1 STD RESET -iobm/RESrr 1 1 FB1_2 STD RESET -iobm/RESrf 1 1 FB1_3 STD RESET -fsb/ASrf 1 1 FB1_4 STD RESET -cnt/RefCnt<2> 1 2 FB1_5 STD RESET -cnt/RefCnt<1> 1 1 FB1_6 STD RESET -RefAck 1 2 FB1_7 STD RESET -RESr2 1 1 FB1_8 STD RESET -RESr1 1 1 FB1_9 STD RESET -RESr0 1 1 FB1_10 STD RESET -IPL2r1 1 1 FB1_11 STD RESET -IPL2r0 1 1 FB1_12 STD RESET -ALE0S 1 2 FB1_13 STD RESET -$OpTx$FX_DC$708 1 2 FB1_14 STD -iobs/IOU1 2 2 FB1_15 STD RESET -iobs/IOL1 2 2 FB1_16 STD RESET -iobm/IOS_FSM_FFd1 2 3 FB1_17 STD RESET -IOU0 3 5 FB1_18 STD RESET -iobs/IOACTr 1 1 FB2_6 STD RESET -iobm/VPArr 1 1 FB2_7 STD RESET -iobm/VPArf 1 1 FB2_8 STD RESET -iobm/IOREQr 1 1 FB2_9 STD RESET -iobm/Er2 1 1 FB2_10 STD RESET -iobm/Er 1 1 FB2_11 STD RESET -iobm/DTACKrr 1 1 FB2_12 STD RESET -iobm/DTACKrf 1 1 FB2_13 STD RESET -iobm/BGr1 1 1 FB2_14 STD RESET -iobm/BGr0 1 1 FB2_15 STD RESET -iobm/BERRrr 1 1 FB2_16 STD RESET -iobm/BERRrf 1 1 FB2_17 STD RESET -cnt/RefCnt<0> 0 0 FB2_18 STD RESET -fsb/Ready1r 8 18 FB3_1 STD RESET -iobs/IORW1 17 20 FB3_3 STD RESET -fsb/Ready2r 9 22 FB3_5 STD RESET -fsb/VPA 22 31 FB3_15 STD RESET -iobs/Clear1 1 3 FB3_18 STD RESET -cnt/RefCnt<6> 1 6 FB4_1 STD RESET -cnt/RefCnt<5> 1 5 FB4_3 STD RESET -cnt/RefCnt<4> 1 4 FB4_4 STD RESET -cnt/RefCnt<3> 1 3 FB4_7 STD RESET - -Signal Total Total Loc Pwr Reg Init -Name Pts Inps Mode State -iobs/PS_FSM_FFd1 2 3 FB4_8 STD RESET -fsb/BERR1r 2 4 FB4_9 STD RESET -cs/nOverlay1 2 3 FB4_10 STD RESET -cnt/RefDone 2 10 FB4_12 STD RESET -cs/nOverlay0 3 8 FB4_13 STD RESET -cnt/TimeoutBPre 3 11 FB4_14 STD RESET -TimeoutA 3 10 FB4_15 STD RESET -IOL0 3 5 FB4_16 STD RESET -iobs/IOReady 4 8 FB4_17 STD RESET -BERR_IOBS 4 8 FB4_18 STD RESET -ram/RASEL 20 15 FB5_1 STD RESET -cnt/RefCnt<7> 1 7 FB5_3 STD RESET -ram/RAMDIS2 7 15 FB5_4 STD RESET -ram/RAMDIS1 18 15 FB5_8 STD RESET -iobs/Load1 15 19 FB5_13 STD RESET -ram/Once 5 10 FB5_16 STD RESET -iobm/ETACK 1 6 FB6_1 STD RESET -iobm/IOS_FSM_FFd3 3 6 FB6_3 STD RESET -iobm/ES<3> 3 6 FB6_4 STD RESET -iobm/ES<1> 3 4 FB6_5 STD RESET -iobm/ES<0> 3 7 FB6_6 STD RESET -ALE0M 3 5 FB6_7 STD RESET -iobm/ES<4> 4 7 FB6_8 STD RESET -iobm/IOS_FSM_FFd2 5 11 FB6_10 STD RESET -iobm/ES<2> 5 7 FB6_13 STD RESET -IOACT 7 13 FB6_16 STD RESET -IOBERR 9 13 FB6_18 STD RESET -ram/RAMReady 16 15 FB7_1 STD RESET -TimeoutB 3 12 FB7_3 STD RESET -fsb/Ready0r 3 8 FB7_4 STD RESET -ram/RS_FSM_FFd1 5 10 FB7_7 STD RESET -$OpTx$$OpTx$FX_DC$182_INV$783 6 8 FB7_10 STD -ram/RS_FSM_FFd3 11 14 FB7_13 STD RESET -ram/RS_FSM_FFd2 13 14 FB7_17 STD RESET -iobs/PS_FSM_FFd2 15 20 FB8_4 STD RESET -RESDone 1 3 FB8_7 STD RESET -IOREQ 15 20 FB8_9 STD RESET -iobs/Once 18 19 FB8_14 STD RESET -fsb/BERR0r 3 8 FB8_16 STD RESET -IORW0 19 21 FB8_18 STD RESET - -** 39 Inputs ** - -Signal Loc Pin Pin Pin -Name No. Type Use -A_FSB<13> FB1_2 11 I/O I -A_FSB<14> FB1_3 12 I/O I -A_FSB<15> FB1_5 13 I/O I -A_FSB<16> FB1_6 14 I/O I -A_FSB<17> FB1_8 15 I/O I -A_FSB<18> FB1_9 16 I/O I -A_FSB<19> FB1_11 17 I/O I -A_FSB<20> FB1_12 18 I/O I -A_FSB<21> FB1_14 19 I/O I -A_FSB<22> FB1_15 20 I/O I -CLK2X_IOB FB1_17 22 GCK/I/O GCK -A_FSB<5> FB2_6 2 GTS/I/O I -A_FSB<6> FB2_8 3 GTS/I/O I -A_FSB<7> FB2_9 4 GTS/I/O I -A_FSB<8> FB2_11 6 I/O I -A_FSB<9> FB2_12 7 I/O I -A_FSB<10> FB2_14 8 I/O I -A_FSB<11> FB2_15 9 I/O I -A_FSB<12> FB2_17 10 I/O I -CLK_IOB FB3_2 23 GCK/I/O GCK/I -A_FSB<23> FB3_5 24 I/O I -E_IOB FB3_6 25 I/O I -CLK_FSB FB3_8 27 GCK/I/O GCK -nWE_FSB FB3_11 29 I/O I -nLDS_FSB FB3_12 30 I/O I -nAS_FSB FB3_14 32 I/O I -nUDS_FSB FB3_15 33 I/O I -nRES FB4_8 91 I/O I -nIPL2 FB4_9 92 I/O I -A_FSB<1> FB4_12 94 I/O I -A_FSB<2> FB4_14 95 I/O I -A_FSB<3> FB4_15 96 I/O I -A_FSB<4> FB4_17 97 I/O I -nBERR_IOB FB6_5 76 I/O I -nVPA_IOB FB6_6 77 I/O I -nDTACK_IOB FB6_8 78 I/O I -SW<1> FB7_15 60 I/O I -SW<0> FB7_17 61 I/O I -nBG_IOB FB8_17 73 I/O I - -Legend: -Pin No. - ~ - User Assigned - ************************** Function Block Details ************************ -Legend: -Total Pt - Total product terms used by the macrocell signal -Imp Pt - Product terms imported from other macrocells -Exp Pt - Product terms exported to other macrocells - in direction shown -Unused Pt - Unused local product terms remaining in macrocell -Loc - Location where logic was mapped in device -Pin Type/Use - I - Input GCK - Global Clock - O - Output GTS - Global Output Enable - (b) - Buried macrocell GSR - Global Set/Reset -X - Signal used as input to the macrocell logic. -Pin No. - ~ - User Assigned - *********************************** FB1 *********************************** -Number of function block inputs used/remaining: 21/33 -Number of signals used by logic mapping into function block: 21 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -ram/BACTr 1 0 0 4 FB1_1 (b) (b) -iobm/RESrr 1 0 0 4 FB1_2 11 I/O I -iobm/RESrf 1 0 0 4 FB1_3 12 I/O I -fsb/ASrf 1 0 0 4 FB1_4 (b) (b) -cnt/RefCnt<2> 1 0 0 4 FB1_5 13 I/O I -cnt/RefCnt<1> 1 0 0 4 FB1_6 14 I/O I -RefAck 1 0 0 4 FB1_7 (b) (b) -RESr2 1 0 0 4 FB1_8 15 I/O I -RESr1 1 0 0 4 FB1_9 16 I/O I -RESr0 1 0 0 4 FB1_10 (b) (b) -IPL2r1 1 0 0 4 FB1_11 17 I/O I -IPL2r0 1 0 0 4 FB1_12 18 I/O I -ALE0S 1 0 0 4 FB1_13 (b) (b) -$OpTx$FX_DC$708 1 0 0 4 FB1_14 19 I/O I -iobs/IOU1 2 0 0 3 FB1_15 20 I/O I -iobs/IOL1 2 0 0 3 FB1_16 (b) (b) -iobm/IOS_FSM_FFd1 2 0 0 3 FB1_17 22 GCK/I/O GCK -IOU0 3 0 0 2 FB1_18 (b) (b) - -Signals Used by Logic in Function Block - 1: IPL2r0 8: iobm/IOS_FSM_FFd2 15: nAS_FSB - 2: RESr0 9: iobm/IOS_FSM_FFd3 16: nIPL2 - 3: RESr1 10: iobs/IOU1 17: nLDS_FSB - 4: cnt/RefCnt<0> 11: iobs/Load1 18: nRES - 5: cnt/RefCnt<1> 12: iobs/PS_FSM_FFd1 19: nUDS_FSB - 6: fsb/ASrf 13: iobs/PS_FSM_FFd2 20: ram/RS_FSM_FFd1 - 7: iobm/IOS_FSM_FFd1 14: nADoutLE1 21: ram/RS_FSM_FFd2 - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -ram/BACTr .....X........X......................... 2 -iobm/RESrr .................X...................... 1 -iobm/RESrf .................X...................... 1 -fsb/ASrf ..............X......................... 1 -cnt/RefCnt<2> ...XX................................... 2 -cnt/RefCnt<1> ...X.................................... 1 -RefAck ...................XX................... 2 -RESr2 ..X..................................... 1 -RESr1 .X...................................... 1 -RESr0 .................X...................... 1 -IPL2r1 X....................................... 1 -IPL2r0 ...............X........................ 1 -ALE0S ...........XX........................... 2 -$OpTx$FX_DC$708 .....X........X......................... 2 -iobs/IOU1 ..........X.......X..................... 2 -iobs/IOL1 ..........X.....X....................... 2 -iobm/IOS_FSM_FFd1 ......XXX............................... 3 -IOU0 .........X.XXX....X..................... 5 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - *********************************** FB2 *********************************** -Number of function block inputs used/remaining: 9/45 -Number of signals used by logic mapping into function block: 9 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -(unused) 0 0 0 5 FB2_1 (b) -(unused) 0 0 0 5 FB2_2 99 GSR/I/O -(unused) 0 0 0 5 FB2_3 (b) -(unused) 0 0 0 5 FB2_4 (b) -(unused) 0 0 0 5 FB2_5 1 GTS/I/O -iobs/IOACTr 1 0 0 4 FB2_6 2 GTS/I/O I -iobm/VPArr 1 0 0 4 FB2_7 (b) (b) -iobm/VPArf 1 0 0 4 FB2_8 3 GTS/I/O I -iobm/IOREQr 1 0 0 4 FB2_9 4 GTS/I/O I -iobm/Er2 1 0 0 4 FB2_10 (b) (b) -iobm/Er 1 0 0 4 FB2_11 6 I/O I -iobm/DTACKrr 1 0 0 4 FB2_12 7 I/O I -iobm/DTACKrf 1 0 0 4 FB2_13 (b) (b) -iobm/BGr1 1 0 0 4 FB2_14 8 I/O I -iobm/BGr0 1 0 0 4 FB2_15 9 I/O I -iobm/BERRrr 1 0 0 4 FB2_16 (b) (b) -iobm/BERRrf 1 0 0 4 FB2_17 10 I/O I -cnt/RefCnt<0> 0 0 0 5 FB2_18 (b) (b) - -Signals Used by Logic in Function Block - 1: E_IOB 4: iobm/BGr0 7: nBG_IOB - 2: IOACT 5: iobm/Er 8: nDTACK_IOB - 3: IOREQ 6: nBERR_IOB 9: nVPA_IOB - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -iobs/IOACTr .X...................................... 1 -iobm/VPArr ........X............................... 1 -iobm/VPArf ........X............................... 1 -iobm/IOREQr ..X..................................... 1 -iobm/Er2 ....X................................... 1 -iobm/Er X....................................... 1 -iobm/DTACKrr .......X................................ 1 -iobm/DTACKrf .......X................................ 1 -iobm/BGr1 ...X.................................... 1 -iobm/BGr0 ......X................................. 1 -iobm/BERRrr .....X.................................. 1 -iobm/BERRrf .....X.................................. 1 -cnt/RefCnt<0> ........................................ 0 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - *********************************** FB3 *********************************** -Number of function block inputs used/remaining: 38/16 -Number of signals used by logic mapping into function block: 38 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -fsb/Ready1r 8 4<- \/1 0 FB3_1 (b) (b) -(unused) 0 0 \/5 0 FB3_2 23 GCK/I/O GCK/I -iobs/IORW1 17 12<- 0 0 FB3_3 (b) (b) -(unused) 0 0 /\5 0 FB3_4 (b) (b) -fsb/Ready2r 9 5<- /\1 0 FB3_5 24 I/O I -(unused) 0 0 /\5 0 FB3_6 25 I/O I -(unused) 0 0 \/3 2 FB3_7 (b) (b) -(unused) 0 0 \/5 0 FB3_8 27 GCK/I/O GCK -nDTACK_FSB 23 18<- 0 0 FB3_9 28 I/O O -(unused) 0 0 /\5 0 FB3_10 (b) (b) -(unused) 0 0 /\5 0 FB3_11 29 I/O I -(unused) 0 0 0 5 FB3_12 30 I/O I -(unused) 0 0 \/5 0 FB3_13 (b) (b) -(unused) 0 0 \/5 0 FB3_14 32 I/O I -fsb/VPA 22 17<- 0 0 FB3_15 33 I/O I -(unused) 0 0 /\5 0 FB3_16 (b) (b) -nROMWE 1 0 /\2 2 FB3_17 34 I/O O -iobs/Clear1 1 0 \/4 0 FB3_18 (b) (b) - -Signals Used by Logic in Function Block - 1: $OpTx$$OpTx$FX_DC$182_INV$783 14: A_FSB<21> 27: fsb/Ready2r - 2: $OpTx$FX_DC$708 15: A_FSB<22> 28: fsb/VPA - 3: A_FSB<10> 16: A_FSB<23> 29: iobs/IORW1 - 4: A_FSB<11> 17: A_FSB<8> 30: iobs/IOReady - 5: A_FSB<12> 18: A_FSB<9> 31: iobs/Once - 6: A_FSB<13> 19: BERR_IOBS 32: iobs/PS_FSM_FFd1 - 7: A_FSB<14> 20: SW<1> 33: iobs/PS_FSM_FFd2 - 8: A_FSB<15> 21: TimeoutA 34: nADoutLE1 - 9: A_FSB<16> 22: cs/nOverlay1 35: nAS_FSB - 10: A_FSB<17> 23: fsb/ASrf 36: nBR_IOB - 11: A_FSB<18> 24: fsb/BERR0r 37: nDTACK_FSB - 12: A_FSB<19> 25: fsb/BERR1r 38: nWE_FSB - 13: A_FSB<20> 26: fsb/Ready1r - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -fsb/Ready1r .....XX.XXXXXXXX...X.XX..X...X...XX..X.. 18 -iobs/IORW1 .....XX.XXXXXXXX...X.XX.....X.XXXXX..X.. 20 -fsb/Ready2r ..XXXXXXXXXXXXXXXX..XXX...X.......X..X.. 22 -nDTACK_FSB X.XXXXXXXXXXXXXXXXXXXXXXXXX..X...XXXXX.. 32 -fsb/VPA XXXXXXXXXXXXXXXXXXXXXX.XXXXX.X...X.X.X.. 31 -nROMWE ..................................X..X.. 2 -iobs/Clear1 ...............................XXX...... 3 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - *********************************** FB4 *********************************** -Number of function block inputs used/remaining: 41/13 -Number of signals used by logic mapping into function block: 41 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -cnt/RefCnt<6> 1 0 0 4 FB4_1 (b) (b) -nAoutOE 3 0 0 2 FB4_2 87 I/O O -cnt/RefCnt<5> 1 0 0 4 FB4_3 (b) (b) -cnt/RefCnt<4> 1 0 0 4 FB4_4 (b) (b) -nDoutOE 2 0 0 3 FB4_5 89 I/O O -nDinOE 3 0 0 2 FB4_6 90 I/O O -cnt/RefCnt<3> 1 0 0 4 FB4_7 (b) (b) -iobs/PS_FSM_FFd1 2 0 0 3 FB4_8 91 I/O I -fsb/BERR1r 2 0 0 3 FB4_9 92 I/O I -cs/nOverlay1 2 0 0 3 FB4_10 (b) (b) -nVPA_FSB 1 0 0 4 FB4_11 93 I/O O -cnt/RefDone 2 0 0 3 FB4_12 94 I/O I -cs/nOverlay0 3 0 0 2 FB4_13 (b) (b) -cnt/TimeoutBPre 3 0 0 2 FB4_14 95 I/O I -TimeoutA 3 0 0 2 FB4_15 96 I/O I -IOL0 3 0 0 2 FB4_16 (b) (b) -iobs/IOReady 4 0 0 1 FB4_17 97 I/O I -BERR_IOBS 4 0 0 1 FB4_18 (b) (b) - -Signals Used by Logic in Function Block - 1: A_FSB<20> 15: cnt/RefCnt<4> 29: iobs/IOACTr - 2: A_FSB<21> 16: cnt/RefCnt<5> 30: iobs/IOL1 - 3: A_FSB<22> 17: cnt/RefCnt<6> 31: iobs/IOReady - 4: A_FSB<23> 18: cnt/RefCnt<7> 32: iobs/Once - 5: BERR_IOBS 19: cnt/RefDone 33: iobs/PS_FSM_FFd1 - 6: IOBERR 20: cnt/TimeoutBPre 34: iobs/PS_FSM_FFd2 - 7: IORW0 21: cs/nOverlay0 35: nADoutLE1 - 8: RefAck 22: fsb/ASrf 36: nAS_FSB - 9: SW<1> 23: fsb/BERR1r 37: nAS_IOB - 10: TimeoutA 24: fsb/VPA 38: nAoutOE - 11: cnt/RefCnt<0> 25: iobm/BGr0 39: nLDS_FSB - 12: cnt/RefCnt<1> 26: iobm/BGr1 40: nRES - 13: cnt/RefCnt<2> 27: iobm/IOS_FSM_FFd2 41: nWE_FSB - 14: cnt/RefCnt<3> 28: iobm/IOS_FSM_FFd3 - -Signal 1 2 3 4 5 FB -Name 0----+----0----+----0----+----0----+----0----+----0 Inputs -cnt/RefCnt<6> ..........XXXXXX.................................. 6 -nAoutOE ........................XX..........XX............ 4 -cnt/RefCnt<5> ..........XXXXX................................... 5 -cnt/RefCnt<4> ..........XXXX.................................... 4 -nDoutOE ......X...................XX...................... 3 -nDinOE XXXX....X..........................X....X......... 7 -cnt/RefCnt<3> ..........XXX..................................... 3 -iobs/PS_FSM_FFd1 ............................X...XX................ 3 -fsb/BERR1r ....X................XX............X.............. 4 -cs/nOverlay1 ....................XX.............X.............. 3 -nVPA_FSB .......................X...........X.............. 2 -cnt/RefDone .......X..XXXXXXXXX............................... 10 -cs/nOverlay0 XXXX................XX.............X...X.......... 8 -cnt/TimeoutBPre ..........XXXXXXXX.X.X.............X.............. 11 -TimeoutA .........XXXXXXXX....X.............X.............. 10 -IOL0 .............................X..XXX...X........... 5 -iobs/IOReady .....X...............X......X.XX.XXX.............. 8 -BERR_IOBS ....XX...............X......X..X.XXX.............. 8 - 0----+----1----+----2----+----3----+----4----+----5 - 0 0 0 0 0 - *********************************** FB5 *********************************** -Number of function block inputs used/remaining: 42/12 -Number of signals used by logic mapping into function block: 42 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -ram/RASEL 20 15<- 0 0 FB5_1 (b) (b) -nROMCS 3 3<- /\5 0 FB5_2 35 I/O O -cnt/RefCnt<7> 1 0 /\3 1 FB5_3 (b) (b) -ram/RAMDIS2 7 2<- 0 0 FB5_4 (b) (b) -nCAS 1 0 /\2 2 FB5_5 36 I/O O -nOE 1 0 \/3 1 FB5_6 37 I/O O -(unused) 0 0 \/5 0 FB5_7 (b) (b) -ram/RAMDIS1 18 13<- 0 0 FB5_8 39 I/O (b) -RA<4> 2 2<- /\5 0 FB5_9 40 I/O O -(unused) 0 0 /\2 3 FB5_10 (b) (b) -RA<3> 2 0 \/2 1 FB5_11 41 I/O O -RA<5> 2 2<- \/5 0 FB5_12 42 I/O O -iobs/Load1 15 10<- 0 0 FB5_13 (b) (b) -RA<2> 2 2<- /\5 0 FB5_14 43 I/O O -RA<6> 2 0 /\2 1 FB5_15 46 I/O O -ram/Once 5 0 0 0 FB5_16 (b) (b) -(unused) 0 0 \/5 0 FB5_17 49 I/O (b) -(unused) 0 0 \/5 0 FB5_18 (b) (b) - -Signals Used by Logic in Function Block - 1: A_FSB<12> 15: A_FSB<5> 29: fsb/ASrf - 2: A_FSB<13> 16: A_FSB<6> 30: iobs/Once - 3: A_FSB<14> 17: A_FSB<7> 31: iobs/PS_FSM_FFd1 - 4: A_FSB<15> 18: SW<1> 32: iobs/PS_FSM_FFd2 - 5: A_FSB<16> 19: cnt/RefCnt<0> 33: nADoutLE1 - 6: A_FSB<17> 20: cnt/RefCnt<1> 34: nAS_FSB - 7: A_FSB<18> 21: cnt/RefCnt<2> 35: nWE_FSB - 8: A_FSB<19> 22: cnt/RefCnt<3> 36: ram/BACTr - 9: A_FSB<20> 23: cnt/RefCnt<4> 37: ram/Once - 10: A_FSB<21> 24: cnt/RefCnt<5> 38: ram/RAMDIS2 - 11: A_FSB<22> 25: cnt/RefCnt<6> 39: ram/RASEL - 12: A_FSB<23> 26: cnt/RefCnt<7> 40: ram/RS_FSM_FFd1 - 13: A_FSB<3> 27: cnt/RefDone 41: ram/RS_FSM_FFd2 - 14: A_FSB<4> 28: cs/nOverlay1 42: ram/RS_FSM_FFd3 - -Signal 1 2 3 4 5 FB -Name 0----+----0----+----0----+----0----+----0----+----0 Inputs -ram/RASEL .........XXX...........XXXXXX....X.XX..XXX........ 15 -nROMCS ........XXXX.....X.........X...................... 6 -cnt/RefCnt<7> ..................XXXXXXX......................... 7 -ram/RAMDIS2 .........XXX...........XXXXXX....X..XX.XXX........ 15 -nCAS ......................................X........... 1 -nOE .................................XX............... 2 -ram/RAMDIS1 .........XXX...........XXXXXX....X.XX..XXX........ 15 -RA<4> ..X...........X.......................X........... 3 -RA<3> .X...........X........................X........... 3 -RA<5> ...X...........X......................X........... 3 -iobs/Load1 .XX.XXXXXXXX.....X.........XXXXXXXX............... 19 -RA<2> X...........X.........................X........... 3 -RA<6> ....X...........X.....................X........... 3 -ram/Once .........XXX...............XX....X..X..XXX........ 10 - 0----+----1----+----2----+----3----+----4----+----5 - 0 0 0 0 0 - *********************************** FB6 *********************************** -Number of function block inputs used/remaining: 34/20 -Number of signals used by logic mapping into function block: 34 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -iobm/ETACK 1 0 /\4 0 FB6_1 (b) (b) -nVMA_IOB 3 0 0 2 FB6_2 74 I/O O -iobm/IOS_FSM_FFd3 3 0 0 2 FB6_3 (b) (b) -iobm/ES<3> 3 0 0 2 FB6_4 (b) (b) -iobm/ES<1> 3 0 0 2 FB6_5 76 I/O I -iobm/ES<0> 3 0 0 2 FB6_6 77 I/O I -ALE0M 3 0 0 2 FB6_7 (b) (b) -iobm/ES<4> 4 0 0 1 FB6_8 78 I/O I -nLDS_IOB 4 0 0 1 FB6_9 79 I/O O -iobm/IOS_FSM_FFd2 5 0 0 0 FB6_10 (b) (b) -nUDS_IOB 4 0 0 1 FB6_11 80 I/O O -nAS_IOB 3 0 0 2 FB6_12 81 I/O O -iobm/ES<2> 5 0 0 0 FB6_13 (b) (b) -nADoutLE1 2 0 0 3 FB6_14 82 I/O O -nADoutLE0 1 0 \/1 3 FB6_15 85 I/O O -IOACT 7 2<- 0 0 FB6_16 (b) (b) -nDinLE 1 0 /\1 3 FB6_17 86 I/O O -IOBERR 9 4<- 0 0 FB6_18 (b) (b) - -Signals Used by Logic in Function Block - 1: ALE0M 13: iobm/ES<0> 24: iobm/IOS_FSM_FFd3 - 2: ALE0S 14: iobm/ES<1> 25: iobm/RESrf - 3: CLK_IOB 15: iobm/ES<2> 26: iobm/RESrr - 4: IOACT 16: iobm/ES<3> 27: iobm/VPArf - 5: IOBERR 17: iobm/ES<4> 28: iobm/VPArr - 6: IOL0 18: iobm/ETACK 29: iobs/Clear1 - 7: IORW0 19: iobm/Er 30: iobs/Load1 - 8: IOU0 20: iobm/Er2 31: nADoutLE1 - 9: iobm/BERRrf 21: iobm/IOREQr 32: nAoutOE - 10: iobm/BERRrr 22: iobm/IOS_FSM_FFd1 33: nBERR_IOB - 11: iobm/DTACKrf 23: iobm/IOS_FSM_FFd2 34: nVMA_IOB - 12: iobm/DTACKrr - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -iobm/ETACK ............XXXXX................X...... 6 -nVMA_IOB ...X........XXXXX.........XX...X.X...... 10 -iobm/IOS_FSM_FFd3 ..X.................XXXX.......X........ 6 -iobm/ES<3> ............XXXX..XX.................... 6 -iobm/ES<1> ............XX....XX.................... 4 -iobm/ES<0> ............XXXXX.XX.................... 7 -ALE0M ....................XXXX.......X........ 5 -iobm/ES<4> ............XXXXX.XX.................... 7 -nLDS_IOB .....XX..............XXX.......X........ 6 -iobm/IOS_FSM_FFd2 ..X.....XXXX.....X...XXXXX.............. 11 -nUDS_IOB ......XX.............XXX.......X........ 6 -nAS_IOB .....................XXX.......X........ 4 -iobm/ES<2> ............XXXXX.XX.................... 7 -nADoutLE1 ............................XXX......... 3 -nADoutLE0 XX...................................... 2 -IOACT ..X.....XXXX.....X..XXXXXX.....X........ 13 -nDinLE .....................XX................. 2 -IOBERR ..X.X...XXXX.....X...XXXXX......X....... 13 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - *********************************** FB7 *********************************** -Number of function block inputs used/remaining: 36/18 -Number of signals used by logic mapping into function block: 36 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -ram/RAMReady 16 11<- 0 0 FB7_1 (b) (b) -RA<1> 2 2<- /\5 0 FB7_2 50 I/O O -TimeoutB 3 0 /\2 0 FB7_3 (b) (b) -fsb/Ready0r 3 0 0 2 FB7_4 (b) (b) -RA<7> 2 0 0 3 FB7_5 52 I/O O -RA<0> 2 0 0 3 FB7_6 53 I/O O -ram/RS_FSM_FFd1 5 0 0 0 FB7_7 (b) (b) -RA<8> 7 2<- 0 0 FB7_8 54 I/O O -RA<10> 1 0 /\2 2 FB7_9 55 I/O O -$OpTx$$OpTx$FX_DC$182_INV$783 - 6 1<- 0 0 FB7_10 (b) (b) -RA<9> 2 0 /\1 2 FB7_11 56 I/O O -CLK25EN 1 0 \/4 0 FB7_12 58 I/O O -ram/RS_FSM_FFd3 11 6<- 0 0 FB7_13 (b) (b) -CLK20EN 1 0 /\2 2 FB7_14 59 I/O O -(unused) 0 0 \/4 1 FB7_15 60 I/O I -(unused) 0 0 \/5 0 FB7_16 (b) (b) -ram/RS_FSM_FFd2 13 9<- \/1 0 FB7_17 61 I/O I -(unused) 0 0 \/5 0 FB7_18 (b) (b) - -Signals Used by Logic in Function Block - 1: A_FSB<10> 13: A_FSB<9> 25: cnt/TimeoutBPre - 2: A_FSB<11> 14: SW<0> 26: cs/nOverlay1 - 3: A_FSB<17> 15: TimeoutB 27: fsb/ASrf - 4: A_FSB<18> 16: cnt/RefCnt<0> 28: fsb/Ready0r - 5: A_FSB<19> 17: cnt/RefCnt<1> 29: nAS_FSB - 6: A_FSB<1> 18: cnt/RefCnt<2> 30: ram/BACTr - 7: A_FSB<20> 19: cnt/RefCnt<3> 31: ram/Once - 8: A_FSB<21> 20: cnt/RefCnt<4> 32: ram/RAMReady - 9: A_FSB<22> 21: cnt/RefCnt<5> 33: ram/RASEL - 10: A_FSB<23> 22: cnt/RefCnt<6> 34: ram/RS_FSM_FFd1 - 11: A_FSB<2> 23: cnt/RefCnt<7> 35: ram/RS_FSM_FFd2 - 12: A_FSB<8> 24: cnt/RefDone 36: ram/RS_FSM_FFd3 - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -ram/RAMReady .......XXX..........XXXX.XX.XXX..XXX.... 15 -RA<1> .X........X.....................X....... 3 -TimeoutB ..............XXXXXXXXX.X.X.X........... 12 -fsb/Ready0r .......XXX...............XXXX..X........ 8 -RA<7> ..X........X....................X....... 3 -RA<0> X....X..........................X....... 3 -ram/RS_FSM_FFd1 .......XXX...............XX.X.X..XXX.... 10 -RA<8> ...X...XXX..X............X......X....... 7 -RA<10> .......X................................ 1 -$OpTx$$OpTx$FX_DC$182_INV$783 - ......XXXX....X..........X.X...X........ 8 -RA<9> ....X.X.........................X....... 3 -CLK25EN .............X.......................... 1 -ram/RS_FSM_FFd3 .......XXX..........XXXX.XX.X.X..XXX.... 14 -CLK20EN .............X.......................... 1 -ram/RS_FSM_FFd2 .......XXX..........XXXX.XX.XX...XXX.... 14 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - *********************************** FB8 *********************************** -Number of function block inputs used/remaining: 37/17 -Number of signals used by logic mapping into function block: 37 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -(unused) 0 0 /\5 0 FB8_1 (b) (b) -RA<11> 1 0 /\4 0 FB8_2 63 I/O O -(unused) 0 0 \/5 0 FB8_3 (b) (b) -iobs/PS_FSM_FFd2 15 10<- 0 0 FB8_4 (b) (b) -nRAS 3 3<- /\5 0 FB8_5 64 I/O O -nRAMLWE 1 0 /\3 1 FB8_6 65 I/O O -RESDone 1 0 \/1 3 FB8_7 (b) (b) -nRAMUWE 1 1<- \/5 0 FB8_8 66 I/O O -IOREQ 15 10<- 0 0 FB8_9 67 I/O (b) -(unused) 0 0 /\5 0 FB8_10 (b) (b) -(unused) 0 0 \/2 3 FB8_11 68 I/O (b) -nBERR_FSB 3 2<- \/4 0 FB8_12 70 I/O O -(unused) 0 0 \/5 0 FB8_13 (b) (b) -iobs/Once 18 13<- 0 0 FB8_14 71 I/O (b) -nBR_IOB 1 0 /\4 0 FB8_15 72 I/O O -fsb/BERR0r 3 0 0 2 FB8_16 (b) (b) -(unused) 0 0 \/5 0 FB8_17 73 I/O I -IORW0 19 14<- 0 0 FB8_18 (b) (b) - -Signals Used by Logic in Function Block - 1: A_FSB<13> 14: IPL2r1 26: iobs/IOACTr - 2: A_FSB<14> 15: RESDone 27: iobs/IORW1 - 3: A_FSB<16> 16: RESr0 28: iobs/Once - 4: A_FSB<17> 17: RESr1 29: iobs/PS_FSM_FFd1 - 5: A_FSB<18> 18: RESr2 30: iobs/PS_FSM_FFd2 - 6: A_FSB<19> 19: RefAck 31: nADoutLE1 - 7: A_FSB<20> 20: SW<1> 32: nAS_FSB - 8: A_FSB<21> 21: TimeoutB 33: nLDS_FSB - 9: A_FSB<22> 22: cs/nOverlay1 34: nUDS_FSB - 10: A_FSB<23> 23: fsb/ASrf 35: nWE_FSB - 11: BERR_IOBS 24: fsb/BERR0r 36: ram/RAMDIS1 - 12: IORW0 25: fsb/BERR1r 37: ram/RAMDIS2 - 13: IPL2r0 - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -RA<11> .....X.................................. 1 -iobs/PS_FSM_FFd2 XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20 -nRAS .......XXX........X..X.........X...XX... 8 -nRAMLWE ...............................XX.XXX... 5 -RESDone ...............XXX...................... 3 -nRAMUWE ...............................X.XXXX... 5 -IOREQ XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20 -nBERR_FSB ......XXXXX.........X..XX......X........ 9 -iobs/Once XXXXXXXXXX.........X.XX....XXXXX..X..... 19 -nBR_IOB ............XXXXXX...................... 6 -fsb/BERR0r ......XXXX..........X.XX.......X........ 8 -IORW0 XXXXXXXXXX.X.......X.XX...XXXXXX..X..... 21 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - ******************************* Equations ******************************** - -********** Mapped Logic ********** - - -$OpTx$$OpTx$FX_DC$182_INV$783 <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady) - OR (A_FSB(23) AND TimeoutB) - OR (NOT A_FSB(22) AND TimeoutB) - OR (A_FSB(21) AND TimeoutB) - OR (NOT A_FSB(20) AND TimeoutB) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND - NOT fsb/Ready0r AND NOT ram/RAMReady)); - - -$OpTx$FX_DC$708 <= (nAS_FSB AND NOT fsb/ASrf); - -FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0'); -ALE0M_D <= ((iobm/IOS_FSM_FFd2) - OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1) - OR (NOT iobm/IOS_FSM_FFd1 AND iobm/IOREQr AND NOT nAoutOE)); - -FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0'); -ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); - -FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0'); -BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf) - OR (iobs/Once AND BERR_IOBS AND NOT iobs/PS_FSM_FFd2 AND - NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) - OR (iobs/Once AND NOT BERR_IOBS AND NOT nAS_FSB AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND IOBERR AND nADoutLE1) - OR (iobs/Once AND NOT BERR_IOBS AND NOT iobs/PS_FSM_FFd2 AND - NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1)); - - -CLK20EN <= SW(0); - - -CLK25EN <= NOT SW(0); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0'); -IOACT_D <= ((CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/DTACKrf AND iobm/DTACKrr) - OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/RESrf AND iobm/RESrr) - OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) - OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND - NOT iobm/IOREQr) - OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND nAoutOE) - OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/ETACK) - OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/BERRrf AND iobm/BERRrr)); - -FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0'); -IOBERR_T <= ((CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND - iobm/RESrr) - OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND - iobm/DTACKrr) - OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND - iobm/BERRrr) - OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND - iobm/RESrr) - OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND - NOT iobm/IOS_FSM_FFd2 AND IOBERR) - OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK) - OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK) - OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND - iobm/DTACKrr) - OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND - iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND - iobm/BERRrr)); - -FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE); -IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1) - OR (iobs/IOL1 AND NOT nADoutLE1)); -IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); - -FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0'); -IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1) - OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr) - OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1) - OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND - nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND - NOT iobs/PS_FSM_FFd2 AND nADoutLE1)); - -FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0'); -IORW0_T <= ((A_FSB_19_IBUF$BUF0.EXP) - OR (IORW0 AND iobs/IORW1 AND NOT nADoutLE1) - OR (NOT IORW0 AND NOT iobs/IORW1 AND NOT nADoutLE1) - OR (nAS_FSB AND NOT fsb/ASrf AND nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT IORW0 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND nADoutLE1) - OR (NOT IORW0 AND NOT nWE_FSB AND nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND - nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND nADoutLE1) - OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND - nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - cs/nOverlay1 AND nADoutLE1)); - -FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE); -IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1) - OR (iobs/IOU1 AND NOT nADoutLE1)); -IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); - -FDCPE_IPL2r0: FDCPE port map (IPL2r0,NOT nIPL2,CLK_FSB,'0','0'); - -FDCPE_IPL2r1: FDCPE port map (IPL2r1,IPL2r0,CLK_FSB,'0','0'); - - -RA(0) <= ((A_FSB(10) AND NOT ram/RASEL) - OR (ram/RASEL AND A_FSB(1))); - - -RA(1) <= ((A_FSB(11) AND NOT ram/RASEL) - OR (ram/RASEL AND A_FSB(2))); - - -RA(2) <= ((A_FSB(12) AND NOT ram/RASEL) - OR (ram/RASEL AND A_FSB(3))); - - -RA(3) <= ((A_FSB(13) AND NOT ram/RASEL) - OR (ram/RASEL AND A_FSB(4))); - - -RA(4) <= ((A_FSB(14) AND NOT ram/RASEL) - OR (ram/RASEL AND A_FSB(5))); - - -RA(5) <= ((A_FSB(15) AND NOT ram/RASEL) - OR (ram/RASEL AND A_FSB(6))); - - -RA(6) <= ((A_FSB(16) AND NOT ram/RASEL) - OR (ram/RASEL AND A_FSB(7))); - - -RA(7) <= ((A_FSB(8) AND ram/RASEL) - OR (A_FSB(17) AND NOT ram/RASEL)); - - -RA(8) <= ((A_FSB(9) AND NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND - ram/RASEL) - OR (A_FSB(9) AND NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - NOT cs/nOverlay1 AND ram/RASEL) - OR (A_FSB(23) AND A_FSB(18)) - OR (A_FSB(18) AND NOT ram/RASEL) - OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(18)) - OR (A_FSB(22) AND A_FSB(18) AND cs/nOverlay1) - OR (NOT A_FSB(22) AND A_FSB(18) AND NOT cs/nOverlay1)); - - -RA(9) <= ((A_FSB(20) AND ram/RASEL) - OR (A_FSB(19) AND NOT ram/RASEL)); - - -RA(10) <= A_FSB(21); - - -RA(11) <= A_FSB(19); - -FDCPE_RESDone: FDCPE port map (RESDone,'1',CLK_FSB,'0','0',RESDone_CE); -RESDone_CE <= (NOT RESr0 AND NOT RESr1 AND RESr2); - -FDCPE_RESr0: FDCPE port map (RESr0,NOT nRES,CLK_FSB,'0','0'); - -FDCPE_RESr1: FDCPE port map (RESr1,RESr0,CLK_FSB,'0','0'); - -FDCPE_RESr2: FDCPE port map (RESr2,RESr1,CLK_FSB,'0','0'); - -FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0'); -RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1); - -FTCPE_TimeoutA: FTCPE port map (TimeoutA,TimeoutA_T,CLK_FSB,'0','0'); -TimeoutA_T <= ((TimeoutA AND nAS_FSB AND NOT fsb/ASrf) - OR (NOT TimeoutA AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND - NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND - NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4)) - OR (NOT TimeoutA AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND - NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND - NOT cnt/RefCnt(4) AND fsb/ASrf)); - -FTCPE_TimeoutB: FTCPE port map (TimeoutB,TimeoutB_T,CLK_FSB,'0','0'); -TimeoutB_T <= ((TimeoutB AND nAS_FSB AND NOT fsb/ASrf) - OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT nAS_FSB AND - NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND - NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7)) - OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND - NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND - NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf)); - -FTCPE_cnt/RefCnt0: FTCPE port map (cnt/RefCnt(0),'1',CLK_FSB,'0','0'); - -FTCPE_cnt/RefCnt1: FTCPE port map (cnt/RefCnt(1),cnt/RefCnt(0),CLK_FSB,'0','0'); - -FTCPE_cnt/RefCnt2: FTCPE port map (cnt/RefCnt(2),cnt/RefCnt_T(2),CLK_FSB,'0','0'); -cnt/RefCnt_T(2) <= (cnt/RefCnt(0) AND cnt/RefCnt(1)); - -FTCPE_cnt/RefCnt3: FTCPE port map (cnt/RefCnt(3),cnt/RefCnt_T(3),CLK_FSB,'0','0'); -cnt/RefCnt_T(3) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2)); - -FTCPE_cnt/RefCnt4: FTCPE port map (cnt/RefCnt(4),cnt/RefCnt_T(4),CLK_FSB,'0','0'); -cnt/RefCnt_T(4) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND - cnt/RefCnt(3)); - -FTCPE_cnt/RefCnt5: FTCPE port map (cnt/RefCnt(5),cnt/RefCnt_T(5),CLK_FSB,'0','0'); -cnt/RefCnt_T(5) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND - cnt/RefCnt(3) AND cnt/RefCnt(4)); - -FTCPE_cnt/RefCnt6: FTCPE port map (cnt/RefCnt(6),cnt/RefCnt_T(6),CLK_FSB,'0','0'); -cnt/RefCnt_T(6) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(1) AND - cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4)); - -FTCPE_cnt/RefCnt7: FTCPE port map (cnt/RefCnt(7),cnt/RefCnt_T(7),CLK_FSB,'0','0'); -cnt/RefCnt_T(7) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND - cnt/RefCnt(1) AND cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4)); - -FDCPE_cnt/RefDone: FDCPE port map (cnt/RefDone,cnt/RefDone_D,CLK_FSB,'0','0'); -cnt/RefDone_D <= ((NOT cnt/RefDone AND NOT RefAck) - OR (NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND - NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND - NOT cnt/RefCnt(7))); - -FTCPE_cnt/TimeoutBPre: FTCPE port map (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,'0','0'); -cnt/TimeoutBPre_T <= ((cnt/TimeoutBPre AND nAS_FSB AND NOT fsb/ASrf) - OR (NOT cnt/TimeoutBPre AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND - NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND - NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7)) - OR (NOT cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND - NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND - NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf)); - -FTCPE_cs/nOverlay0: FTCPE port map (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,NOT nRES,'0'); -cs/nOverlay0_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND - NOT cs/nOverlay0 AND NOT nAS_FSB) - OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND - NOT cs/nOverlay0 AND fsb/ASrf)); - -FDCPE_cs/nOverlay1: FDCPE port map (cs/nOverlay1,cs/nOverlay0,CLK_FSB,'0','0',cs/nOverlay1_CE); -cs/nOverlay1_CE <= (nAS_FSB AND NOT fsb/ASrf); - -FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT CLK_FSB,'0','0'); - -FDCPE_fsb/BERR0r: FDCPE port map (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,'0','0'); -fsb/BERR0r_D <= ((NOT TimeoutB AND NOT fsb/BERR0r) - OR (nAS_FSB AND NOT fsb/ASrf) - OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND - NOT fsb/BERR0r)); - -FDCPE_fsb/BERR1r: FDCPE port map (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,'0','0'); -fsb/BERR1r_D <= ((NOT BERR_IOBS AND NOT fsb/BERR1r) - OR (nAS_FSB AND NOT fsb/ASrf)); - -FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,'0','0'); -fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND - NOT fsb/Ready0r AND NOT ram/RAMReady) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady)); - -FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0'); -fsb/Ready1r_D <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND - A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND - NOT fsb/Ready1r AND NOT iobs/IOReady) - OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND - A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND - NOT fsb/Ready1r AND NOT iobs/IOReady) - OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND - A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND - cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND - NOT nADoutLE1) - OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND - A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND - cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND - NOT nADoutLE1) - OR (nAS_FSB AND NOT fsb/ASrf) - OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady) - OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND - NOT iobs/IOReady) - OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND - NOT iobs/IOReady AND NOT SW(1))); - -FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0'); -fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf) - OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) - OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) - OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND - NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) - OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND - NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) - OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) - OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) - OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND - NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) - OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND - NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)); - -FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0'); -fsb/VPA_D <= ((EXP21_.EXP) - OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND - NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) - OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND - fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) - OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND - NOT iobs/IOReady AND NOT SW(1) AND NOT $OpTx$FX_DC$708) - OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND - A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND - NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) - OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND - A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND - NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) - OR (nROMWE_OBUF.EXP) - OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND - A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND - cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND - NOT nADoutLE1 AND NOT $OpTx$FX_DC$708) - OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND - A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND - cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND - NOT nADoutLE1 AND NOT $OpTx$FX_DC$708) - OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND - fsb/VPA AND NOT $OpTx$FX_DC$708) - OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND - fsb/VPA AND NOT $OpTx$FX_DC$708) - OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND - NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND - fsb/VPA AND NOT $OpTx$FX_DC$708) - OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$708) - OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$708) - OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$708) - OR (fsb/VPA AND NOT nBR_IOB AND NOT $OpTx$FX_DC$708) - OR (fsb/VPA AND NOT $OpTx$FX_DC$708 AND - $OpTx$$OpTx$FX_DC$182_INV$783)); - -FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0'); - -FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0'); - -FDCPE_iobm/BGr0: FDCPE port map (iobm/BGr0,NOT nBG_IOB,CLK2X_IOB,'0','0'); - -FDCPE_iobm/BGr1: FDCPE port map (iobm/BGr1,iobm/BGr0,CLK2X_IOB,'0','0'); - -FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0'); - -FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0'); - -FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),CLK2X_IOB,'0','0'); -iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2) - OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND - NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er) - OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND - NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2)); - -FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),CLK2X_IOB,'0','0'); -iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1)) - OR (NOT iobm/ES(0) AND NOT iobm/ES(1)) - OR (NOT iobm/Er AND iobm/Er2)); - -FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),CLK2X_IOB,'0','0'); -iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2)) - OR (NOT iobm/ES(1) AND NOT iobm/ES(2)) - OR (NOT iobm/Er AND iobm/Er2) - OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2)) - OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4))); - -FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),CLK2X_IOB,'0','0'); -iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2) - OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er) - OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2)); - -FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),CLK2X_IOB,'0','0'); -iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2) - OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND - iobm/ES(3) AND iobm/Er) - OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND - iobm/ES(3) AND NOT iobm/Er2) - OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND - NOT iobm/ES(3) AND iobm/ES(4))); - -FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,'0','0'); -iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND - NOT iobm/ES(3) AND iobm/ES(4)); - -FDCPE_iobm/Er: FDCPE port map (iobm/Er,E_IOB,NOT CLK_IOB,'0','0'); - -FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0'); - -FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0'); - -FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,'0','0'); -iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1) - OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)); - -FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,'0','0'); -iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND - NOT iobm/IOS_FSM_FFd2) - OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/IOS_FSM_FFd2 AND iobm/ETACK) - OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr) - OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr) - OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND - iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr)); - -FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0'); -iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) - OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND - NOT iobm/IOS_FSM_FFd2) - OR (NOT CLK_IOB AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND - iobm/IOREQr AND NOT nAoutOE)); - -FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0'); - -FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES,CLK2X_IOB,'0','0'); - -FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT CLK2X_IOB,'0','0'); - -FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,CLK2X_IOB,'0','0'); - -FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,CLK_FSB,'0','0'); -iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1); - -FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,CLK_FSB,'0','0'); - -FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Load1); - -FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0'); -iobs/IORW1_T <= ((iobs/Once) - OR (NOT nADoutLE1) - OR (fsb/Ready1r.EXP) - OR (nAS_FSB AND NOT fsb/ASrf) - OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20)) - OR (fsb/Ready2r.EXP) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16)) - OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1)) - OR (nWE_FSB AND iobs/IORW1) - OR (NOT nWE_FSB AND NOT iobs/IORW1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1)); - -FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0'); -iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf) - OR (iobs/Once AND iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND - NOT iobs/IOACTr AND IOBERR AND nADoutLE1) - OR (iobs/Once AND NOT iobs/IOReady AND NOT nAS_FSB AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) - OR (iobs/Once AND NOT iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND - NOT iobs/IOACTr AND NOT IOBERR AND fsb/ASrf AND nADoutLE1)); - -FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,CLK_FSB,'0','0',iobs/Load1); - -FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0'); -iobs/Load1_D <= ((iobs/Once) - OR (NOT nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16)) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18)) - OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB) - OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1)) - OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21)) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - cs/nOverlay1) - OR (nAS_FSB AND NOT fsb/ASrf) - OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)); - -FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0'); -iobs/Once_D <= ((nBERR_FSB_OBUF.EXP) - OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1) - OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT iobs/Once AND - NOT cs/nOverlay1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND NOT iobs/Once) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once) - OR (nAS_FSB AND NOT fsb/ASrf) - OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2) - OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2) - OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1) - OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)); - -FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0'); -iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2) - OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)); - -FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0'); -iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - OR (iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND - iobs/IOACTr) - OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND - NOT iobs/IOACTr) - OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND - nADoutLE1) - OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND - NOT fsb/ASrf AND nADoutLE1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND - NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)); - - -nADoutLE0 <= (NOT ALE0M AND NOT ALE0S); - -FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0'); -nADoutLE1_D <= ((iobs/Load1) - OR (NOT iobs/Clear1 AND NOT nADoutLE1)); - -FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT CLK2X_IOB,'0','0'); -nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2) - OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)); -nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z'; -nAS_IOB_OE <= NOT nAoutOE; - -FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,CLK2X_IOB,'0','0'); -nAoutOE_D <= ((NOT iobm/BGr0 AND NOT iobm/BGr1) - OR (NOT iobm/BGr1 AND nAoutOE) - OR (NOT nAS_IOB AND NOT iobm/BGr0 AND NOT nAoutOE)); - - -nBERR_FSB <= ((nAS_FSB) - OR (NOT BERR_IOBS AND NOT TimeoutB AND NOT fsb/BERR0r AND NOT fsb/BERR1r) - OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND - NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r)); - -FDCPE_nBR_IOB: FDCPE port map (nBR_IOB,'0',CLK_FSB,'0','0',nBR_IOB_CE); -nBR_IOB_CE <= (RESr0 AND RESr1 AND IPL2r0 AND RESr2 AND NOT RESDone AND - IPL2r1); - -FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0'); - -FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0'); -nDTACK_FSB_D <= ((EXP17_.EXP) - OR (nAS_FSB AND NOT fsb/ASrf) - OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND - nDTACK_FSB) - OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND - NOT iobs/IOReady AND nDTACK_FSB) - OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND - NOT iobs/IOReady AND NOT SW(1) AND nDTACK_FSB) - OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND - A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND - NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB) - OR (EXP20_.EXP) - OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND - A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND - NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB) - OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND - A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND - cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND - nDTACK_FSB AND NOT nADoutLE1) - OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND - A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND - cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND - nDTACK_FSB AND NOT nADoutLE1) - OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND - nDTACK_FSB) - OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND - A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND - A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND - A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND - nDTACK_FSB) - OR (BERR_IOBS AND nDTACK_FSB) - OR (fsb/BERR0r AND nDTACK_FSB) - OR (fsb/BERR1r AND nDTACK_FSB) - OR (nDTACK_FSB AND NOT nBR_IOB) - OR (nDTACK_FSB AND $OpTx$$OpTx$FX_DC$182_INV$783)); - -FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0'); -nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2); - - -nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB) - OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND - NOT nAS_FSB) - OR (A_FSB(22) AND NOT A_FSB(21) AND nWE_FSB AND NOT nAS_FSB AND - NOT SW(1))); - -FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0'); -nDoutOE_D <= ((NOT IORW0) - OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2)); - -FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT CLK2X_IOB,'0','0'); -nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) - OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) - OR (NOT IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND - NOT iobm/IOS_FSM_FFd1)); -nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z'; -nLDS_IOB_OE <= NOT nAoutOE; - - -nOE <= NOT ((nWE_FSB AND NOT nAS_FSB)); - - -nRAMLWE <= NOT ((NOT nWE_FSB AND NOT nLDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND - NOT ram/RAMDIS1)); - - -nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND - NOT ram/RAMDIS1)); - - -nRAS <= NOT (((RefAck) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND - NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND - NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1))); - - -nROMCS <= NOT (((A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND - NOT SW(1)) - OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND - SW(1)) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND - NOT cs/nOverlay1))); - - -nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB)); - -FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT CLK2X_IOB,'0','0'); -nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) - OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) - OR (NOT IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND - NOT iobm/IOS_FSM_FFd1)); -nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z'; -nUDS_IOB_OE <= NOT nAoutOE; - -FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,'0','0'); -nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND - NOT iobm/ES(3) AND NOT iobm/ES(4)) - OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND - NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr)); -nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z'; -nVMA_IOB_OE <= NOT nAoutOE; - - -nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB)); - -FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,CLK_FSB,'0','0'); -ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf); - -FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0'); -ram/Once_T <= ((ram/Once AND nAS_FSB AND NOT fsb/ASrf) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND - NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND - NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3 AND fsb/ASrf)); - -FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0'); -ram/RAMDIS1_D <= ((nOE_OBUF.EXP) - OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND - cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) - OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND - cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) - OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3 AND - cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) - OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd1 AND - cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND NOT fsb/ASrf) - OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1) - OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) - OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND - NOT ram/BACTr AND fsb/ASrf)); - -FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0'); -ram/RAMDIS2_T <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND - NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND - cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND - NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND - cnt/RefCnt(7) AND fsb/ASrf) - OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf) - OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND - ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND - cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) - OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND - ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND - cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND - cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND - cnt/RefCnt(7)) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND - cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND - fsb/ASrf)); - -FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0'); -ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3) - OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1) - OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND - NOT ram/BACTr AND fsb/ASrf) - OR (ram/RS_FSM_FFd2.EXP) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT ram/RS_FSM_FFd1 AND fsb/ASrf) - OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND - NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf) - OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND - NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)); - -FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0'); -ram/RASEL_D <= ((A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND - NOT fsb/ASrf) - OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND - ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND - NOT fsb/ASrf) - OR (EXP26_.EXP) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf) - OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) - OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) - OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))); - -FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0'); -ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND - NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND - NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3) - OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND - NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3 AND fsb/ASrf)); - -FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0'); -ram/RS_FSM_FFd2_T <= ((EXP28_.EXP) - OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND - NOT cnt/RefCnt(5) AND ram/BACTr) - OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND - NOT cnt/RefCnt(5) AND NOT fsb/ASrf) - OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND - NOT cnt/RefCnt(6) AND NOT fsb/ASrf) - OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND - NOT cnt/RefCnt(7) AND NOT fsb/ASrf) - OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT nAS_FSB AND - NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) - OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3) - OR (cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) - OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND - NOT cnt/RefCnt(6) AND ram/BACTr) - OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND ram/BACTr AND - NOT cnt/RefCnt(7))); - -FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0'); -ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) - OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) - OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) - OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf) - OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND - ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND - cnt/RefCnt(7)) - OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND - ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND - fsb/ASrf) - OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3) - OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND - NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) - OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(5)) - OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6)) - OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND - NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7))); - -Register Legend: - FDCPE (Q,D,C,CLR,PRE,CE); - FTCPE (Q,D,C,CLR,PRE,CE); - LDCP (Q,D,G,CLR,PRE); - - ****************************** Device Pin Out ***************************** - -Device : XC95144XL-10-TQ100 - - - -------------------------------------------------- - /100 98 96 94 92 90 88 86 84 82 80 78 76 \ - | 99 97 95 93 91 89 87 85 83 81 79 77 | - | 1 75 | - | 2 74 | - | 3 73 | - | 4 72 | - | 5 71 | - | 6 70 | - | 7 69 | - | 8 68 | - | 9 67 | - | 10 66 | - | 11 65 | - | 12 64 | - | 13 XC95144XL-10-TQ100 63 | - | 14 62 | - | 15 61 | - | 16 60 | - | 17 59 | - | 18 58 | - | 19 57 | - | 20 56 | - | 21 55 | - | 22 54 | - | 23 53 | - | 24 52 | - | 25 51 | - | 27 29 31 33 35 37 39 41 43 45 47 49 | - \26 28 30 32 34 36 38 40 42 44 46 48 50 / - -------------------------------------------------- - - -Pin Signal Pin Signal -No. Name No. Name - 1 KPR 51 VCC - 2 A_FSB<5> 52 RA<7> - 3 A_FSB<6> 53 RA<0> - 4 A_FSB<7> 54 RA<8> - 5 VCC 55 RA<10> - 6 A_FSB<8> 56 RA<9> - 7 A_FSB<9> 57 VCC - 8 A_FSB<10> 58 CLK25EN - 9 A_FSB<11> 59 CLK20EN - 10 A_FSB<12> 60 SW<1> - 11 A_FSB<13> 61 SW<0> - 12 A_FSB<14> 62 GND - 13 A_FSB<15> 63 RA<11> - 14 A_FSB<16> 64 nRAS - 15 A_FSB<17> 65 nRAMLWE - 16 A_FSB<18> 66 nRAMUWE - 17 A_FSB<19> 67 KPR - 18 A_FSB<20> 68 KPR - 19 A_FSB<21> 69 GND - 20 A_FSB<22> 70 nBERR_FSB - 21 GND 71 KPR - 22 CLK2X_IOB 72 nBR_IOB - 23 CLK_IOB 73 nBG_IOB - 24 A_FSB<23> 74 nVMA_IOB - 25 E_IOB 75 GND - 26 VCC 76 nBERR_IOB - 27 CLK_FSB 77 nVPA_IOB - 28 nDTACK_FSB 78 nDTACK_IOB - 29 nWE_FSB 79 nLDS_IOB - 30 nLDS_FSB 80 nUDS_IOB - 31 GND 81 nAS_IOB - 32 nAS_FSB 82 nADoutLE1 - 33 nUDS_FSB 83 TDO - 34 nROMWE 84 GND - 35 nROMCS 85 nADoutLE0 - 36 nCAS 86 nDinLE - 37 nOE 87 nAoutOE - 38 VCC 88 VCC - 39 KPR 89 nDoutOE - 40 RA<4> 90 nDinOE - 41 RA<3> 91 nRES - 42 RA<5> 92 nIPL2 - 43 RA<2> 93 nVPA_FSB - 44 GND 94 A_FSB<1> - 45 TDI 95 A_FSB<2> - 46 RA<6> 96 A_FSB<3> - 47 TMS 97 A_FSB<4> - 48 TCK 98 VCC - 49 KPR 99 KPR - 50 RA<1> 100 GND - - -Legend : NC = Not Connected, unbonded pin - PGND = Unused I/O configured as additional Ground pin - TIE = Unused I/O floating -- must tie to VCC, GND or other signal - KPR = Unused I/O with weak keeper (leave unconnected) - VCC = Dedicated Power Pin - GND = Dedicated Ground Pin - TDI = Test Data In, JTAG pin - TDO = Test Data Out, JTAG pin - TCK = Test Clock, JTAG pin - TMS = Test Mode Select, JTAG pin - PROHIBITED = User reserved pin - **************************** Compiler Options **************************** - -Following is a list of all global compiler options used by the fitter run. - -Device(s) Specified : xc95144xl-10-TQ100 -Optimization Method : SPEED -Multi-Level Logic Optimization : ON -Ignore Timing Specifications : OFF -Default Register Power Up Value : LOW -Keep User Location Constraints : ON -What-You-See-Is-What-You-Get : OFF -Exhaustive Fitting : OFF -Keep Unused Inputs : OFF -Slew Rate : FAST -Power Mode : STD -Ground on Unused IOs : OFF -Set I/O Pin Termination : KEEPER -Global Clock Optimization : ON -Global Set/Reset Optimization : ON -Global Ouput Enable Optimization : ON -Input Limit : 54 -Pterm Limit : 25 diff --git a/cpld/XC95144XL/MXSE.stx b/cpld/XC95144XL/MXSE.stx deleted file mode 100644 index e69de29..0000000 diff --git a/cpld/XC95144XL/MXSE.svf b/cpld/XC95144XL/MXSE.svf deleted file mode 100644 index 9966c9a..0000000 --- a/cpld/XC95144XL/MXSE.svf +++ /dev/null @@ -1,5207 +0,0 @@ -// Created using Xilinx Cse Software [ISE - 14.7] -// Date: Sun Mar 27 10:20:02 2022 - -TRST OFF; -ENDIR IDLE; -ENDDR IDLE; -STATE RESET; -STATE IDLE; -FREQUENCY 1E6 HZ; -//Operation: Erase -p 0 -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -//Loading device with 'idcode' instruction. -SIR 8 TDI (fe) SMASK (ff) ; -SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f9608093) MASK (0fffffff) ; -//Check for Read/Write Protect. -SIR 8 TDI (ff) TDO (01) MASK (e3) ; -//Boundary Scan Chain Contents -//Position 1: xc95144xl -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -// Loading devices with 'ispen' or 'bypass' instruction. -SIR 8 TDI (e8) ; -SDR 6 TDI (05) SMASK (3f) ; -// Loading devices with 'fbulk' instruction. -SIR 8 TDI (ed) ; -SDR 18 TDI (03ffff) SMASK (03ffff) ; -RUNTEST 200000 TCK; -SDR 18 TDI (03fffd) TDO (000001) MASK (000003) ; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (f0) ; -RUNTEST 100 TCK; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (f0) ; -RUNTEST 100 TCK; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -SIR 8 TDI (ff) ; -SDR 1 TDI (00) SMASK (01) ; -//Operation: Program -p 0 -e -v -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -//Loading device with 'idcode' instruction. -SIR 8 TDI (fe) ; -SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f9608093) MASK (0fffffff) ; -//Check for Read/Write Protect. -SIR 8 TDI (ff) TDO (01) MASK (e3) ; -//Boundary Scan Chain Contents -//Position 1: xc95144xl -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -// Loading devices with 'ispen' or 'bypass' instruction. -SIR 8 TDI (e8) ; -SDR 6 TDI (05) SMASK (3f) ; -// Loading devices with 'fbulk' instruction. -SIR 8 TDI (ed) ; -SDR 18 TDI (03ffff) SMASK (03ffff) ; -RUNTEST 200000 TCK; -SDR 18 TDI (03fffd) TDO (000001) MASK (000003) ; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (f0) ; -RUNTEST 100 TCK; -// Loading devices with 'ispen' or 'bypass' instruction. -SIR 8 TDI (e8) ; -SDR 6 TDI (05) SMASK (3f) ; -// Loading device with 'fpgm' instruction. -SIR 8 TDI (ea) ; -SDR 82 TDI (0000000000002000a00081) SMASK (03ffffffffffffffffffff) ; -SDR 82 TDI (0000040008000000a40001) ; -SDR 82 TDI (0000082008000000240001) ; -SDR 82 TDI (00000c0000000000040001) ; -SDR 82 TDI (0000104020000000000001) ; -SDR 82 TDI (0000200000002800400001) ; -SDR 82 TDI (0000241000000040500001) ; -SDR 82 TDI (0000280820002040500001) ; -SDR 82 TDI (00002c0000000000500001) ; -SDR 82 TDI (0000308000000000500001) ; -SDR 82 TDI (0000400000004000000001) ; -SDR 82 TDI (0000440400000060800001) ; -SDR 82 TDI (000048a000004040800001) ; -SDR 82 TDI (00004c0000000000800001) ; -SDR 82 TDI (0000500000000000800003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0000800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0000800000000000000001) ; -SDR 82 TDI (0000840000202000000001) ; -SDR 82 TDI (0000888000000000000001) ; -SDR 82 TDI (00008c0000800000000001) ; -SDR 82 TDI (0000900000000000000001) ; -SDR 82 TDI (0000a00000000000000001) ; -SDR 82 TDI (0000a42000002000800001) ; -SDR 82 TDI (0000a80000000000000001) ; -SDR 82 TDI (0000ac0000002000200001) ; -SDR 82 TDI (0000b00000000000000001) ; -SDR 82 TDI (0000c00000000000000001) ; -SDR 82 TDI (0000c40000804000000001) ; -SDR 82 TDI (0000c80000800000000001) ; -SDR 82 TDI (0000cc0000004000000001) ; -SDR 82 TDI (0000d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0001000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0001000000000000000001) ; -SDR 82 TDI (0001040000000000000101) ; -SDR 82 TDI (0001080000000000000101) ; -SDR 82 TDI (00010c2000000000000101) ; -SDR 82 TDI (0001100000000000000001) ; -SDR 82 TDI (0001200000000000000001) ; -SDR 82 TDI (0001240000000000000001) ; -SDR 82 TDI (0001280000000004000001) ; -SDR 82 TDI (00012c0800004000000001) ; -SDR 82 TDI (0001300000000000000001) ; -SDR 82 TDI (0001400000000000000001) ; -SDR 82 TDI (0001440000000000000001) ; -SDR 82 TDI (0001480000000000000001) ; -SDR 82 TDI (00014ca000000000000001) ; -SDR 82 TDI (0001500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0001800000002000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0001800000002000000001) ; -SDR 82 TDI (0001840000040000000001) ; -SDR 82 TDI (0001880000000000000001) ; -SDR 82 TDI (00018c0000000000000001) ; -SDR 82 TDI (0001900000240000000001) ; -SDR 82 TDI (0001a00000000004000001) ; -SDR 82 TDI (0001a40000800000000001) ; -SDR 82 TDI (0001a80000000000000001) ; -SDR 82 TDI (0001ac0000000000000001) ; -SDR 82 TDI (0001b00000000000000001) ; -SDR 82 TDI (0001c00000000000000001) ; -SDR 82 TDI (0001c40000000000000001) ; -SDR 82 TDI (0001c80000000000000001) ; -SDR 82 TDI (0001cc0000000000000001) ; -SDR 82 TDI (0001d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0002000080000040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0002000080000040000001) ; -SDR 82 TDI (0002040080000040000001) ; -SDR 82 TDI (000208c040000000000001) ; -SDR 82 TDI (00020c0400000000000001) ; -SDR 82 TDI (0002100000000000000001) ; -SDR 82 TDI (0002201000000000000001) ; -SDR 82 TDI (0002242000000000000081) ; -SDR 82 TDI (0002280000000000000001) ; -SDR 82 TDI (00022c0000000000000001) ; -SDR 82 TDI (0002300000000000000001) ; -SDR 82 TDI (0002400400000000000001) ; -SDR 82 TDI (0002440004000008000001) ; -SDR 82 TDI (0002480004000008000001) ; -SDR 82 TDI (00024c0000000000040001) ; -SDR 82 TDI (0002500000000000040003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0002802000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0002802000000000000001) ; -SDR 82 TDI (0002842000040800000001) ; -SDR 82 TDI (0002880000000800000001) ; -SDR 82 TDI (00028c2000000800000001) ; -SDR 82 TDI (0002906400240c00000001) ; -SDR 82 TDI (0002a08800000000000081) ; -SDR 82 TDI (0002a49840800800000001) ; -SDR 82 TDI (0002a89040008800000001) ; -SDR 82 TDI (0002ac9800008400000001) ; -SDR 82 TDI (0002b01880008400000001) ; -SDR 82 TDI (0002c04000001400000001) ; -SDR 82 TDI (0002c46400000800000001) ; -SDR 82 TDI (0002c8c400001800040001) ; -SDR 82 TDI (0002ccac40001800000001) ; -SDR 82 TDI (0002d0e400001000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0003001008048800040100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0003001008048800040101) ; -SDR 82 TDI (0003040080000000000001) ; -SDR 82 TDI (0003080080004000000301) ; -SDR 82 TDI (00030c0080000000000101) ; -SDR 82 TDI (0003100000400000000101) ; -SDR 82 TDI (0003200000040000140101) ; -SDR 82 TDI (0003240000000080000201) ; -SDR 82 TDI (0003280000040080000001) ; -SDR 82 TDI (00032c0000100480000001) ; -SDR 82 TDI (0003300000000400000001) ; -SDR 82 TDI (0003400804000000080001) ; -SDR 82 TDI (0003440000080080000001) ; -SDR 82 TDI (0003480800080080000001) ; -SDR 82 TDI (00034c0840000080000001) ; -SDR 82 TDI (0003500020001000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0003800000080000000140) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0003800000080000000141) ; -SDR 82 TDI (0003840000001000000101) ; -SDR 82 TDI (0003880010008800000001) ; -SDR 82 TDI (00038c0004001480000301) ; -SDR 82 TDI (0003900010008800000101) ; -SDR 82 TDI (0003a00000000410000001) ; -SDR 82 TDI (0003a40000108000000101) ; -SDR 82 TDI (0003a80040100c00000101) ; -SDR 82 TDI (0003ac0000000000000001) ; -SDR 82 TDI (0003b00004001000000001) ; -SDR 82 TDI (0003c00040000000000001) ; -SDR 82 TDI (0003c40080009000000001) ; -SDR 82 TDI (0003c800c4000000000001) ; -SDR 82 TDI (0003cc0080008000000081) ; -SDR 82 TDI (0003d00080000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0004000000040000500020) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0004000000040000500021) ; -SDR 82 TDI (0004040000400000500001) ; -SDR 82 TDI (0004084000000040d00001) ; -SDR 82 TDI (00040c4400000000e00001) ; -SDR 82 TDI (0004100800000000e00001) ; -SDR 82 TDI (0004201000040000280005) ; -SDR 82 TDI (0004240000080000280001) ; -SDR 82 TDI (0004280000000000280001) ; -SDR 82 TDI (00042c0000000000080001) ; -SDR 82 TDI (0004300000000000000001) ; -SDR 82 TDI (0004400420000000000005) ; -SDR 82 TDI (0004448000080000080001) ; -SDR 82 TDI (0004480800080000080001) ; -SDR 82 TDI (00044c0000000000080001) ; -SDR 82 TDI (0004501000000000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0004800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0004800000000000000001) ; -SDR 82 TDI (0004840000080000000001) ; -SDR 82 TDI (0004888000080000000001) ; -SDR 82 TDI (00048c0000400000000001) ; -SDR 82 TDI (0004902000000000000001) ; -SDR 82 TDI (0004a00040080000000001) ; -SDR 82 TDI (0004a42000100000000001) ; -SDR 82 TDI (0004a84000140000000001) ; -SDR 82 TDI (0004ac4000100000000001) ; -SDR 82 TDI (0004b00800000000000001) ; -SDR 82 TDI (0004c00000000400000001) ; -SDR 82 TDI (0004c40000000000000001) ; -SDR 82 TDI (0004c80000000000000001) ; -SDR 82 TDI (0004cc0800000000000001) ; -SDR 82 TDI (0004d0a000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0005000000440000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0005000000440000000001) ; -SDR 82 TDI (0005040000000000000001) ; -SDR 82 TDI (0005080000000000000001) ; -SDR 82 TDI (00050c0000000000080001) ; -SDR 82 TDI (0005100000000000000001) ; -SDR 82 TDI (0005200000040000000001) ; -SDR 82 TDI (0005240000080080000001) ; -SDR 82 TDI (0005280000000080000001) ; -SDR 82 TDI (00052c0000000080000001) ; -SDR 82 TDI (0005300000000000000001) ; -SDR 82 TDI (0005400000000000000001) ; -SDR 82 TDI (0005440004080080000001) ; -SDR 82 TDI (0005480004080080000001) ; -SDR 82 TDI (00054c0000000080000001) ; -SDR 82 TDI (0005500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0005800000000000f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0005800000000000f00001) ; -SDR 82 TDI (0005840000080000f00001) ; -SDR 82 TDI (0005880000080000f00001) ; -SDR 82 TDI (00058c0000400000e00001) ; -SDR 82 TDI (0005900000000000e00001) ; -SDR 82 TDI (0005a00000080000280001) ; -SDR 82 TDI (0005a40000100010a80001) ; -SDR 82 TDI (0005a80000140000a80001) ; -SDR 82 TDI (0005ac0000100000680001) ; -SDR 82 TDI (0005b00000000000700001) ; -SDR 82 TDI (0005c00000080400000001) ; -SDR 82 TDI (0005c40000000000880001) ; -SDR 82 TDI (0005c80000000000880001) ; -SDR 82 TDI (0005cc0000000000880001) ; -SDR 82 TDI (0005d00000000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0006000303010301120310) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0006000303010301120311) ; -SDR 82 TDI (0006050203020300420301) ; -SDR 82 TDI (00060a0303010301520301) ; -SDR 82 TDI (00060d0303030300020301) ; -SDR 82 TDI (0006120303010301c20301) ; -SDR 82 TDI (0006210103030302030301) ; -SDR 82 TDI (0006260103020300230301) ; -SDR 82 TDI (00062803030103022b0301) ; -SDR 82 TDI (00062f0103000303090301) ; -SDR 82 TDI (0006300000000000000001) ; -SDR 82 TDI (0006400000000020000001) ; -SDR 82 TDI (0006440004000000000001) ; -SDR 82 TDI (0006480004000000000001) ; -SDR 82 TDI (00064c4000000000080001) ; -SDR 82 TDI (0006500000000000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0006830000020002400000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0006830000020002400001) ; -SDR 82 TDI (0006860100010003100001) ; -SDR 82 TDI (0006890000020000800001) ; -SDR 82 TDI (00068e0000000003e00001) ; -SDR 82 TDI (0006910000020002200001) ; -SDR 82 TDI (0006a20200000001280001) ; -SDR 82 TDI (0006a50200010003880001) ; -SDR 82 TDI (0006ab0000060001800001) ; -SDR 82 TDI (0006ac0200030000200001) ; -SDR 82 TDI (0006b00000000000200001) ; -SDR 82 TDI (0006c00000000400000001) ; -SDR 82 TDI (0006c40000000000080001) ; -SDR 82 TDI (0006c80000000000080001) ; -SDR 82 TDI (0006cc0000000000000001) ; -SDR 82 TDI (0006d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0007000302010001004040) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0007000302010001004041) ; -SDR 82 TDI (0007040203020100000001) ; -SDR 82 TDI (0007080103000201000001) ; -SDR 82 TDI (00070d0303034200000001) ; -SDR 82 TDI (0007120103000301000001) ; -SDR 82 TDI (0007200101020302000001) ; -SDR 82 TDI (0007260103020200040001) ; -SDR 82 TDI (0007280301010300000201) ; -SDR 82 TDI (00072f0003000301000201) ; -SDR 82 TDI (0007300000000000000001) ; -SDR 82 TDI (0007400000000000802001) ; -SDR 82 TDI (0007440000000000000001) ; -SDR 82 TDI (0007480000000000000001) ; -SDR 82 TDI (00074c0000000000000081) ; -SDR 82 TDI (0007500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0007830001020002000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0007830001020002000001) ; -SDR 82 TDI (0007870103010003000001) ; -SDR 82 TDI (00078b0202030000000001) ; -SDR 82 TDI (00078e1000000003000001) ; -SDR 82 TDI (0007910200030002000001) ; -SDR 82 TDI (0007a30202010001000001) ; -SDR 82 TDI (0007a40208010003000001) ; -SDR 82 TDI (0007ab0002060003000001) ; -SDR 82 TDI (0007ac0301030002000001) ; -SDR 82 TDI (0007b00000000000000001) ; -SDR 82 TDI (0007c00000000000000001) ; -SDR 82 TDI (0007c40000000000000001) ; -SDR 82 TDI (0007c80000000000000001) ; -SDR 82 TDI (0007cc4000000000000001) ; -SDR 82 TDI (0007d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0008000306010041000008) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0008000306010041000009) ; -SDR 82 TDI (0008040017000100000001) ; -SDR 82 TDI (0008080107800001000001) ; -SDR 82 TDI (00080d1313030200000001) ; -SDR 82 TDI (0008120085000201000001) ; -SDR 82 TDI (0008200001000322000001) ; -SDR 82 TDI (0008260143020040000001) ; -SDR 82 TDI (0008280301010280000001) ; -SDR 82 TDI (00082f0007000201000001) ; -SDR 82 TDI (0008300000000000000001) ; -SDR 82 TDI (0008400080000008000001) ; -SDR 82 TDI (0008440044000048000001) ; -SDR 82 TDI (0008480000000088000001) ; -SDR 82 TDI (00084c0000000000000001) ; -SDR 82 TDI (0008500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0008830009000002300004) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0008830009000002300005) ; -SDR 82 TDI (0008850380030003300001) ; -SDR 82 TDI (00088b0280130000300001) ; -SDR 82 TDI (00088e0080000223200001) ; -SDR 82 TDI (0008910200030002200001) ; -SDR 82 TDI (0008a302000300c1200041) ; -SDR 82 TDI (0008a40200010003300001) ; -SDR 82 TDI (0008ab0000020003300001) ; -SDR 82 TDI (0008ac0300030002100001) ; -SDR 82 TDI (0008b00000000000100001) ; -SDR 82 TDI (0008c000040000d0101001) ; -SDR 82 TDI (0008c40000000000100001) ; -SDR 82 TDI (0008c80000040000100001) ; -SDR 82 TDI (0008cc4040004000100001) ; -SDR 82 TDI (0008d00020000000100003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0009000302010201000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0009000302010201000001) ; -SDR 82 TDI (0009040006000000000001) ; -SDR 82 TDI (000908000c080001000001) ; -SDR 82 TDI (00090d1216038000000001) ; -SDR 82 TDI (000912001400d001000001) ; -SDR 82 TDI (0009220000008002000201) ; -SDR 82 TDI (0009250102028e08800201) ; -SDR 82 TDI (0009280321110e00800001) ; -SDR 82 TDI (00092f0003000201200201) ; -SDR 82 TDI (0009300010008000200001) ; -SDR 82 TDI (0009400000000000000001) ; -SDR 82 TDI (0009440040001000000001) ; -SDR 82 TDI (0009480050080000000001) ; -SDR 82 TDI (00094c00a0000c00000001) ; -SDR 82 TDI (0009500080000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0009830005080202000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0009830005080202000001) ; -SDR 82 TDI (0009850118038003000001) ; -SDR 82 TDI (00098b0310439000000001) ; -SDR 82 TDI (00098e0000001803000001) ; -SDR 82 TDI (00099100a0020802000001) ; -SDR 82 TDI (0009a30200130401000201) ; -SDR 82 TDI (0009a50200010202000281) ; -SDR 82 TDI (0009ab00000a0001000001) ; -SDR 82 TDI (0009ac0210038002000201) ; -SDR 82 TDI (0009b00000004000000001) ; -SDR 82 TDI (0009c000c0088000000001) ; -SDR 82 TDI (0009c40090008000000001) ; -SDR 82 TDI (0009c800a0000800000001) ; -SDR 82 TDI (0009cc4000000000000001) ; -SDR 82 TDI (0009d00000008000500003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000a000302090000100000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000a000302090000100001) ; -SDR 82 TDI (000a040000000000400001) ; -SDR 82 TDI (000a080000400001500001) ; -SDR 82 TDI (000a0d0202030000000001) ; -SDR 82 TDI (000a120000000000c00001) ; -SDR 82 TDI (000a200000100002000001) ; -SDR 82 TDI (000a240102020000200001) ; -SDR 82 TDI (000a280100090000280001) ; -SDR 82 TDI (000a2f0002000001080001) ; -SDR 82 TDI (000a300000000000000001) ; -SDR 82 TDI (000a400000080000000001) ; -SDR 82 TDI (000a440000000000000001) ; -SDR 82 TDI (000a480000000000000001) ; -SDR 82 TDI (000a4c0000000000080001) ; -SDR 82 TDI (000a500000000000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000a830001000003400000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000a830001000003400001) ; -SDR 82 TDI (000a850100090003100001) ; -SDR 82 TDI (000a8b0300020000800001) ; -SDR 82 TDI (000a8e0000000003e00001) ; -SDR 82 TDI (000a910000020003200001) ; -SDR 82 TDI (000aa20000000001280001) ; -SDR 82 TDI (000aa40200110002880001) ; -SDR 82 TDI (000aab0200020001800001) ; -SDR 82 TDI (000aac0200032002200001) ; -SDR 82 TDI (000ab00000000000200001) ; -SDR 82 TDI (000ac00000000000000001) ; -SDR 82 TDI (000ac40000080000080001) ; -SDR 82 TDI (000ac80000000000080001) ; -SDR 82 TDI (000acc4000000000000001) ; -SDR 82 TDI (000ad00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000b000104001001001100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000b000104001001001101) ; -SDR 82 TDI (000b040006011a00000001) ; -SDR 82 TDI (000b080004001e01000001) ; -SDR 82 TDI (000b0d0306021c00000001) ; -SDR 82 TDI (000b130003001c01000001) ; -SDR 82 TDI (000b210001010400001001) ; -SDR 82 TDI (000b270042000c00000001) ; -SDR 82 TDI (000b290240008c06000001) ; -SDR 82 TDI (000b2f0005009500020001) ; -SDR 82 TDI (000b300084009400000001) ; -SDR 82 TDI (000b400000001000000001) ; -SDR 82 TDI (000b440000001800000001) ; -SDR 82 TDI (000b480080009800000001) ; -SDR 82 TDI (000b4c00c0009800000001) ; -SDR 82 TDI (000b500000009000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000b800100010001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000b800100010001000001) ; -SDR 82 TDI (000b840040000000000001) ; -SDR 82 TDI (000b8a0000020001000001) ; -SDR 82 TDI (000b8d0200260000000001) ; -SDR 82 TDI (000b920000000000000001) ; -SDR 82 TDI (000ba00000000002000001) ; -SDR 82 TDI (000ba40082000000000001) ; -SDR 82 TDI (000ba90200010000000001) ; -SDR 82 TDI (000baf0000000001000001) ; -SDR 82 TDI (000bb00000000000000001) ; -SDR 82 TDI (000bc00000000000000001) ; -SDR 82 TDI (000bc40000400000000001) ; -SDR 82 TDI (000bc80000000000000001) ; -SDR 82 TDI (000bcc4000000000000001) ; -SDR 82 TDI (000bd00000800000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000c001300010040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000c001300010040000001) ; -SDR 82 TDI (000c040100018440000001) ; -SDR 82 TDI (000c080000008001000001) ; -SDR 82 TDI (000c0d0200038800000001) ; -SDR 82 TDI (000c130000028801000001) ; -SDR 82 TDI (000c200000000002000001) ; -SDR 82 TDI (000c240002000800000001) ; -SDR 82 TDI (000c280100011800000001) ; -SDR 82 TDI (000c2f0002010001000001) ; -SDR 82 TDI (000c300000000000000001) ; -SDR 82 TDI (000c400000400000000001) ; -SDR 82 TDI (000c440000000000000001) ; -SDR 82 TDI (000c480000000000000001) ; -SDR 82 TDI (000c4c0000000000000001) ; -SDR 82 TDI (000c500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000c830001020422000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000c830001020422000001) ; -SDR 82 TDI (000c850300010802000001) ; -SDR 82 TDI (000c880100010800000001) ; -SDR 82 TDI (000c8c0000000001000081) ; -SDR 82 TDI (000c910200030001000001) ; -SDR 82 TDI (000ca30000020001000001) ; -SDR 82 TDI (000ca40000001002000001) ; -SDR 82 TDI (000ca80002000002000001) ; -SDR 82 TDI (000cac0100010000000001) ; -SDR 82 TDI (000cb00000000400000001) ; -SDR 82 TDI (000cc00000000000000001) ; -SDR 82 TDI (000cc40008000000000001) ; -SDR 82 TDI (000cc80000000000000001) ; -SDR 82 TDI (000ccc0000001000000041) ; -SDR 82 TDI (000cd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000d000703010301c20300) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000d000703010301c20301) ; -SDR 82 TDI (000d054703034300c20301) ; -SDR 82 TDI (000d0a0303030301c20301) ; -SDR 82 TDI (000d0d0303030300c20301) ; -SDR 82 TDI (000d130303030301c20301) ; -SDR 82 TDI (000d230103030306430301) ; -SDR 82 TDI (000d270103020304c30301) ; -SDR 82 TDI (000d290303010302c30301) ; -SDR 82 TDI (000d2f0103010303430301) ; -SDR 82 TDI (000d304000000000400001) ; -SDR 82 TDI (000d400000000000400001) ; -SDR 82 TDI (000d440000000000400081) ; -SDR 82 TDI (000d480000000000400001) ; -SDR 82 TDI (000d4c0000000000400001) ; -SDR 82 TDI (000d500000000000400003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000d802000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000d802000000000000001) ; -SDR 82 TDI (000d842000000000000001) ; -SDR 82 TDI (000d882c00000000000001) ; -SDR 82 TDI (000d8c2c00000000000001) ; -SDR 82 TDI (000d902c00000000000001) ; -SDR 82 TDI (000da09800000000000001) ; -SDR 82 TDI (000da49800000000000001) ; -SDR 82 TDI (000da89800000000000001) ; -SDR 82 TDI (000dac9c00000000000001) ; -SDR 82 TDI (000db09c00000000000001) ; -SDR 82 TDI (000dc08400000000000081) ; -SDR 82 TDI (000dc48404000000000001) ; -SDR 82 TDI (000dc89404000000000001) ; -SDR 82 TDI (000dcc9400000000000001) ; -SDR 82 TDI (000dd09400000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000e002000000040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000e002000000040000001) ; -SDR 82 TDI (000e042018000040000001) ; -SDR 82 TDI (000e08e018000000000001) ; -SDR 82 TDI (000e0c6410000000000001) ; -SDR 82 TDI (000e106cb4000000000001) ; -SDR 82 TDI (000e209800000000000001) ; -SDR 82 TDI (000e24b800000000000001) ; -SDR 82 TDI (000e289820000000000001) ; -SDR 82 TDI (000e2c9800000000000001) ; -SDR 82 TDI (000e309800000000000001) ; -SDR 82 TDI (000e4044c0000000000001) ; -SDR 82 TDI (000e44e4d0000000000001) ; -SDR 82 TDI (000e48ec50000000000001) ; -SDR 82 TDI (000e4cac00000000000001) ; -SDR 82 TDI (000e50f480000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000e804060000000c00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000e804060000000c00001) ; -SDR 82 TDI (000e840000000000c00001) ; -SDR 82 TDI (000e880000000000c00001) ; -SDR 82 TDI (000e8c0000000000c00001) ; -SDR 82 TDI (000e900000000000c00001) ; -SDR 82 TDI (000ea00010000000400001) ; -SDR 82 TDI (000ea44000000000400001) ; -SDR 82 TDI (000ea80000000000400001) ; -SDR 82 TDI (000eac0004000000400001) ; -SDR 82 TDI (000eb00004000000400001) ; -SDR 82 TDI (000ec00000000008400001) ; -SDR 82 TDI (000ec40000004000400081) ; -SDR 82 TDI (000ec80000000000400001) ; -SDR 82 TDI (000ecc0000000000400001) ; -SDR 82 TDI (000ed00000000000400003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000f000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000f000000000000000001) ; -SDR 82 TDI (000f050300038300000001) ; -SDR 82 TDI (000f0a0200028000000001) ; -SDR 82 TDI (000f0c0000008000000001) ; -SDR 82 TDI (000f110302038100000001) ; -SDR 82 TDI (000f230102038100000001) ; -SDR 82 TDI (000f240000008000800001) ; -SDR 82 TDI (000f290102000002800001) ; -SDR 82 TDI (000f2c0100010001200001) ; -SDR 82 TDI (000f300000000000200001) ; -SDR 82 TDI (000f400000008000000001) ; -SDR 82 TDI (000f440000008000000001) ; -SDR 82 TDI (000f480000000000000001) ; -SDR 82 TDI (000f4c0000000000000001) ; -SDR 82 TDI (000f500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (000f800000008000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (000f800000008000000001) ; -SDR 82 TDI (000f840000000880000001) ; -SDR 82 TDI (000f880000240800000001) ; -SDR 82 TDI (000f8c0000000800000001) ; -SDR 82 TDI (000f900000800800000001) ; -SDR 82 TDI (000fa00000000000000001) ; -SDR 82 TDI (000fa40000000800000001) ; -SDR 82 TDI (000fa80000000800000001) ; -SDR 82 TDI (000fac0000000000000001) ; -SDR 82 TDI (000fb00000000000000001) ; -SDR 82 TDI (000fc00000000000000801) ; -SDR 82 TDI (000fc40000000000500001) ; -SDR 82 TDI (000fc80000001000000001) ; -SDR 82 TDI (000fcc0000800000000001) ; -SDR 82 TDI (000fd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0010000200200400000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0010000200200400000001) ; -SDR 82 TDI (0010050300138200000001) ; -SDR 82 TDI (00100a0200128400000001) ; -SDR 82 TDI (00100c2000008c00000001) ; -SDR 82 TDI (0010110300028c00000201) ; -SDR 82 TDI (0010210102038500000001) ; -SDR 82 TDI (0010240000008c00000001) ; -SDR 82 TDI (0010290100009c82000001) ; -SDR 82 TDI (00102c0900218480000001) ; -SDR 82 TDI (0010300000008000080001) ; -SDR 82 TDI (0010400000808000000001) ; -SDR 82 TDI (0010440000048000000001) ; -SDR 82 TDI (0010480000048000000001) ; -SDR 82 TDI (00104ca000108000000001) ; -SDR 82 TDI (0010500000008000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0010800100810301700310) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0010800100810301700311) ; -SDR 82 TDI (0010840000240c00d00201) ; -SDR 82 TDI (0010880100250b01f00201) ; -SDR 82 TDI (00108d0300a70300e00301) ; -SDR 82 TDI (0010920002a50201e00101) ; -SDR 82 TDI (0010a20000a01282292301) ; -SDR 82 TDI (0010a70100820380a80301) ; -SDR 82 TDI (0010a80200010300a80101) ; -SDR 82 TDI (0010af00000003032a0301) ; -SDR 82 TDI (0010b00000000000600001) ; -SDR 82 TDI (0010c00000340000000001) ; -SDR 82 TDI (0010c40000c00000080001) ; -SDR 82 TDI (0010c80000800000880001) ; -SDR 82 TDI (0010cc0000801000080001) ; -SDR 82 TDI (0010d00000800000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0011000003000000020000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0011000003000000020001) ; -SDR 82 TDI (0011040403000100000101) ; -SDR 82 TDI (0011080003000000020101) ; -SDR 82 TDI (00110c0003000000020001) ; -SDR 82 TDI (0011100401000100020001) ; -SDR 82 TDI (0011200001000000020001) ; -SDR 82 TDI (0011240003000000030001) ; -SDR 82 TDI (0011280003000080030201) ; -SDR 82 TDI (00112c0003000080010001) ; -SDR 82 TDI (0011300000000000000001) ; -SDR 82 TDI (0011408000000000000001) ; -SDR 82 TDI (0011440004000080000001) ; -SDR 82 TDI (0011480004000000000001) ; -SDR 82 TDI (00114c0000000000000001) ; -SDR 82 TDI (0011500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0011800400000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0011800400000000000001) ; -SDR 82 TDI (0011840002000000020001) ; -SDR 82 TDI (0011880002000000000101) ; -SDR 82 TDI (00118c0000000000020101) ; -SDR 82 TDI (0011900000010000000001) ; -SDR 82 TDI (0011a00000200000000001) ; -SDR 82 TDI (0011a40000000080000001) ; -SDR 82 TDI (0011a80002200000030001) ; -SDR 82 TDI (0011ac0001200000010001) ; -SDR 82 TDI (0011b00400000000000001) ; -SDR 82 TDI (0011c00000000400000001) ; -SDR 82 TDI (0011c40000000000000001) ; -SDR 82 TDI (0011c80000000080000001) ; -SDR 82 TDI (0011cc0000000080000001) ; -SDR 82 TDI (0011d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0012000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0012000000000000000001) ; -SDR 82 TDI (0012040000000000000001) ; -SDR 82 TDI (0012080000000000000001) ; -SDR 82 TDI (00120c0000000000000001) ; -SDR 82 TDI (0012100000000000000001) ; -SDR 82 TDI (0012200000000000000001) ; -SDR 82 TDI (0012240000000040000001) ; -SDR 82 TDI (0012280000000040000001) ; -SDR 82 TDI (00122c0000000000000001) ; -SDR 82 TDI (0012300000000000000001) ; -SDR 82 TDI (0012400000000000000001) ; -SDR 82 TDI (0012440004000060000001) ; -SDR 82 TDI (0012480004000040000001) ; -SDR 82 TDI (00124c0000000000000001) ; -SDR 82 TDI (0012500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0012800000000204000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0012800000000204000001) ; -SDR 82 TDI (0012840000000000000001) ; -SDR 82 TDI (0012880000000000000001) ; -SDR 82 TDI (00128c0000000000000001) ; -SDR 82 TDI (0012900000000000000001) ; -SDR 82 TDI (0012a20000000000000201) ; -SDR 82 TDI (0012a50000000200000201) ; -SDR 82 TDI (0012a80000000000000001) ; -SDR 82 TDI (0012ac0000000000000201) ; -SDR 82 TDI (0012b00000000000000001) ; -SDR 82 TDI (0012c00000000004000001) ; -SDR 82 TDI (0012c40000000000000001) ; -SDR 82 TDI (0012c80000000000000001) ; -SDR 82 TDI (0012cc0000000000000001) ; -SDR 82 TDI (0012d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0013000000000040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0013000000000040000001) ; -SDR 82 TDI (0013040000000040000001) ; -SDR 82 TDI (0013080000000000000001) ; -SDR 82 TDI (00130c0000000000000001) ; -SDR 82 TDI (0013100000000000080001) ; -SDR 82 TDI (0013200000000000000001) ; -SDR 82 TDI (0013240000000000000001) ; -SDR 82 TDI (0013280000004000000001) ; -SDR 82 TDI (00132c0000000000000001) ; -SDR 82 TDI (0013300000000000040001) ; -SDR 82 TDI (0013400000000000000001) ; -SDR 82 TDI (0013440000002400000001) ; -SDR 82 TDI (0013480000000400000001) ; -SDR 82 TDI (00134c0000000400000001) ; -SDR 82 TDI (0013500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0013800002000100f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0013800002000100f00001) ; -SDR 82 TDI (0013840001000000f00001) ; -SDR 82 TDI (0013880100010101f40001) ; -SDR 82 TDI (00138c0201010300e00001) ; -SDR 82 TDI (0013900000000200e00101) ; -SDR 82 TDI (0013a00001000200280101) ; -SDR 82 TDI (0013a40100020100e80001) ; -SDR 82 TDI (0013a80201000200b80001) ; -SDR 82 TDI (0013ae00020002006a0001) ; -SDR 82 TDI (0013b00000000000700001) ; -SDR 82 TDI (0013c00000000000000001) ; -SDR 82 TDI (0013c40000000008880001) ; -SDR 82 TDI (0013c80000000000880001) ; -SDR 82 TDI (0013cc0000000000880001) ; -SDR 82 TDI (0013d00004000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0014000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0014000000000000000001) ; -SDR 82 TDI (0014040000000000000001) ; -SDR 82 TDI (0014080080000000000001) ; -SDR 82 TDI (00140c0040000000000001) ; -SDR 82 TDI (0014100000000000000001) ; -SDR 82 TDI (0014200000000000000001) ; -SDR 82 TDI (0014240000000000000001) ; -SDR 82 TDI (0014280080000000000001) ; -SDR 82 TDI (00142c0000000000000001) ; -SDR 82 TDI (0014300000000000000001) ; -SDR 82 TDI (0014400000000000000001) ; -SDR 82 TDI (0014440004000000000001) ; -SDR 82 TDI (0014480004000000000001) ; -SDR 82 TDI (00144c0000000000000001) ; -SDR 82 TDI (0014500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0014800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0014800000000000000001) ; -SDR 82 TDI (0014840000000800000001) ; -SDR 82 TDI (0014880000000800000001) ; -SDR 82 TDI (00148c0000000800000001) ; -SDR 82 TDI (0014900000000c00000001) ; -SDR 82 TDI (0014a00000000000000001) ; -SDR 82 TDI (0014a40040000800000001) ; -SDR 82 TDI (0014a80040008800000001) ; -SDR 82 TDI (0014ac0000008400000001) ; -SDR 82 TDI (0014b00080008400000001) ; -SDR 82 TDI (0014c00000001400000001) ; -SDR 82 TDI (0014c40000000800000001) ; -SDR 82 TDI (0014c80000001800000001) ; -SDR 82 TDI (0014cc0040001800000001) ; -SDR 82 TDI (0014d00000001000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0015000000000000080000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0015000000000000080001) ; -SDR 82 TDI (0015040000000100000001) ; -SDR 82 TDI (0015080000000000000001) ; -SDR 82 TDI (00150c0000000000000001) ; -SDR 82 TDI (0015100002000000000001) ; -SDR 82 TDI (0015228000000008000001) ; -SDR 82 TDI (0015240000000000000001) ; -SDR 82 TDI (0015281000000000000001) ; -SDR 82 TDI (00152c0000200000000001) ; -SDR 82 TDI (0015300000000000000001) ; -SDR 82 TDI (0015404000000000000001) ; -SDR 82 TDI (0015440000000000000001) ; -SDR 82 TDI (0015480400002000000001) ; -SDR 82 TDI (00154c0000100000000001) ; -SDR 82 TDI (0015500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0015800000000000f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0015800000000000f00001) ; -SDR 82 TDI (0015840000000000f00001) ; -SDR 82 TDI (0015880000000000f00001) ; -SDR 82 TDI (00158c0000000000e00001) ; -SDR 82 TDI (0015900000000000e00001) ; -SDR 82 TDI (0015a00400000000280001) ; -SDR 82 TDI (0015a40020000000a80001) ; -SDR 82 TDI (0015a80000000000a80001) ; -SDR 82 TDI (0015ac0000000000680001) ; -SDR 82 TDI (0015b00000000000700001) ; -SDR 82 TDI (0015c00000000000000001) ; -SDR 82 TDI (0015c40000000000880001) ; -SDR 82 TDI (0015c80000000000880001) ; -SDR 82 TDI (0015cc0000000000880001) ; -SDR 82 TDI (0015d00000000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0016000000000000100000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0016000000000000100001) ; -SDR 82 TDI (0016050303030300400001) ; -SDR 82 TDI (00160a0202020000500001) ; -SDR 82 TDI (00160c0000000000000001) ; -SDR 82 TDI (0016110302030100c00001) ; -SDR 82 TDI (0016230102030100000001) ; -SDR 82 TDI (0016240000000000200001) ; -SDR 82 TDI (0016290102000002280001) ; -SDR 82 TDI (00162c0101010001080001) ; -SDR 82 TDI (0016300000000000000001) ; -SDR 82 TDI (0016400000000000000001) ; -SDR 82 TDI (0016440000000000000001) ; -SDR 82 TDI (0016480000000000000001) ; -SDR 82 TDI (00164c0000000000080001) ; -SDR 82 TDI (0016500000000000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0016830303030303420300) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0016830303030303420301) ; -SDR 82 TDI (0016870303030303120301) ; -SDR 82 TDI (00168b0303030301820301) ; -SDR 82 TDI (00168f0303030303e20301) ; -SDR 82 TDI (0016930303030303220301) ; -SDR 82 TDI (0016a303030303032b0301) ; -SDR 82 TDI (0016a703030303038b0301) ; -SDR 82 TDI (0016ab0303030303830301) ; -SDR 82 TDI (0016af0303030303210301) ; -SDR 82 TDI (0016b00000000000200001) ; -SDR 82 TDI (0016c00000000000000001) ; -SDR 82 TDI (0016c40000000000080001) ; -SDR 82 TDI (0016c80000004000080001) ; -SDR 82 TDI (0016cc0000000000000001) ; -SDR 82 TDI (0016d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0017030303030003588000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0017030303030003588001) ; -SDR 82 TDI (0017070303030103580001) ; -SDR 82 TDI (00170b0303070201d80001) ; -SDR 82 TDI (00170f0303070203e80001) ; -SDR 82 TDI (0017130303070303ec0001) ; -SDR 82 TDI (0017230303030303288001) ; -SDR 82 TDI (0017260303030203280001) ; -SDR 82 TDI (00172b03030303032c0201) ; -SDR 82 TDI (00172f03030303030c0201) ; -SDR 82 TDI (00173000000000000c0001) ; -SDR 82 TDI (0017400000000000000001) ; -SDR 82 TDI (0017440000000400080001) ; -SDR 82 TDI (0017480000800008080001) ; -SDR 82 TDI (00174c0000000000080001) ; -SDR 82 TDI (00175000000000000c0003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0017830303010003000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0017830303010003000001) ; -SDR 82 TDI (0017850303070103040001) ; -SDR 82 TDI (00178b2303030001000001) ; -SDR 82 TDI (00178f0303030203000001) ; -SDR 82 TDI (0017930201030203000001) ; -SDR 82 TDI (0017a30201030303400001) ; -SDR 82 TDI (0017a60303030003900001) ; -SDR 82 TDI (0017ab0b01034203800001) ; -SDR 82 TDI (0017af0303030203200001) ; -SDR 82 TDI (0017b08000000000200001) ; -SDR 82 TDI (0017c00000000000000001) ; -SDR 82 TDI (0017c40000800000000001) ; -SDR 82 TDI (0017c82000000400000001) ; -SDR 82 TDI (0017cc0000800000000001) ; -SDR 82 TDI (0017d00000800000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0018030303010203900000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0018030303010203900001) ; -SDR 82 TDI (001805013e038003a00001) ; -SDR 82 TDI (00180b0310038001f00001) ; -SDR 82 TDI (00180f0202030803a00001) ; -SDR 82 TDI (00181300a0025803a00001) ; -SDR 82 TDI (0018230200030003000201) ; -SDR 82 TDI (0018250302030602080201) ; -SDR 82 TDI (00182b0301030601040001) ; -SDR 82 TDI (00182f02030302030c0201) ; -SDR 82 TDI (0018300010008000000001) ; -SDR 82 TDI (00184000c000a000000001) ; -SDR 82 TDI (0018440090009400000001) ; -SDR 82 TDI (0018480000000000080001) ; -SDR 82 TDI (00184c00a0000c00800001) ; -SDR 82 TDI (0018500000000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0018830307011043600000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0018830307011043600001) ; -SDR 82 TDI (0018850100011043500001) ; -SDR 82 TDI (00188b0308021001040001) ; -SDR 82 TDI (00188f0212039003440001) ; -SDR 82 TDI (0018930014028003440001) ; -SDR 82 TDI (0018a20000008403280001) ; -SDR 82 TDI (0018a40302038802e00001) ; -SDR 82 TDI (0018ab0330038801f80001) ; -SDR 82 TDI (0018af0212038003700001) ; -SDR 82 TDI (0018b00000004000700001) ; -SDR 82 TDI (0018c00000000000000001) ; -SDR 82 TDI (0018c40060000808880001) ; -SDR 82 TDI (0018c800f0008c08800001) ; -SDR 82 TDI (0018cc0000008000080001) ; -SDR 82 TDI (0018d00080008000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0019004100000101000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0019004100000101000001) ; -SDR 82 TDI (0019054101010000000001) ; -SDR 82 TDI (0019094001000100000001) ; -SDR 82 TDI (00190c4000000000000301) ; -SDR 82 TDI (0019104101010101000001) ; -SDR 82 TDI (0019200000000000000001) ; -SDR 82 TDI (0019244000000000000001) ; -SDR 82 TDI (0019284000000000000001) ; -SDR 82 TDI (00192c4000000000000001) ; -SDR 82 TDI (0019304000000000000001) ; -SDR 82 TDI (0019404000000000000001) ; -SDR 82 TDI (0019446000000000000001) ; -SDR 82 TDI (0019486000000000000001) ; -SDR 82 TDI (00194c2000000000000001) ; -SDR 82 TDI (0019506000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0019830000030302000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0019830000030302000001) ; -SDR 82 TDI (0019860000020202000001) ; -SDR 82 TDI (00198b0800030302020001) ; -SDR 82 TDI (00198c0000000000000001) ; -SDR 82 TDI (0019900001000100020001) ; -SDR 82 TDI (0019a00000000000000001) ; -SDR 82 TDI (0019a40000000000000001) ; -SDR 82 TDI (0019a80000000000000001) ; -SDR 82 TDI (0019ac0400000000000001) ; -SDR 82 TDI (0019b00000000000000001) ; -SDR 82 TDI (0019c00000000000000001) ; -SDR 82 TDI (0019c40000000000000001) ; -SDR 82 TDI (0019c81000000000000001) ; -SDR 82 TDI (0019cc0000000000000001) ; -SDR 82 TDI (0019d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001a000300010001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001a000300010001000001) ; -SDR 82 TDI (001a050202000100000101) ; -SDR 82 TDI (001a090102010100000101) ; -SDR 82 TDI (001a0c0000000000000001) ; -SDR 82 TDI (001a100303010001000101) ; -SDR 82 TDI (001a202000000000000001) ; -SDR 82 TDI (001a242000000000800001) ; -SDR 82 TDI (001a280000000000800001) ; -SDR 82 TDI (001a2c0000000000200001) ; -SDR 82 TDI (001a300000000000200001) ; -SDR 82 TDI (001a400000000000000001) ; -SDR 82 TDI (001a440000000010000001) ; -SDR 82 TDI (001a480000000080000001) ; -SDR 82 TDI (001a4c0000000080000001) ; -SDR 82 TDI (001a500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001a820000000100000100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001a820000000100000101) ; -SDR 82 TDI (001a870203020100000101) ; -SDR 82 TDI (001a8a0203000100000101) ; -SDR 82 TDI (001a8c0000000000000001) ; -SDR 82 TDI (001a930103010101000101) ; -SDR 82 TDI (001aa00000000000000001) ; -SDR 82 TDI (001aa40000000000000001) ; -SDR 82 TDI (001aa80000000000000001) ; -SDR 82 TDI (001aac0000000000000001) ; -SDR 82 TDI (001ab00000000000000001) ; -SDR 82 TDI (001ac00000000080500001) ; -SDR 82 TDI (001ac40000000080000001) ; -SDR 82 TDI (001ac80000000000000001) ; -SDR 82 TDI (001acc0000000000000001) ; -SDR 82 TDI (001ad00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001b000100000303000100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001b000100000303000101) ; -SDR 82 TDI (001b050001000000000001) ; -SDR 82 TDI (001b090301000202000001) ; -SDR 82 TDI (001b0c0000000000000001) ; -SDR 82 TDI (001b100001010203000001) ; -SDR 82 TDI (001b200000000000000001) ; -SDR 82 TDI (001b240000000000000001) ; -SDR 82 TDI (001b280000000000000001) ; -SDR 82 TDI (001b2c0000000000000001) ; -SDR 82 TDI (001b300000000000000001) ; -SDR 82 TDI (001b4000000000000000c1) ; -SDR 82 TDI (001b440000000000000001) ; -SDR 82 TDI (001b480000000000000001) ; -SDR 82 TDI (001b4c0000000000000001) ; -SDR 82 TDI (001b500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001b800000000001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001b800000000001000001) ; -SDR 82 TDI (001b840003000000000001) ; -SDR 82 TDI (001b880003000301000001) ; -SDR 82 TDI (001b8c0000000000000001) ; -SDR 82 TDI (001b900103010300000001) ; -SDR 82 TDI (001ba00000000000000001) ; -SDR 82 TDI (001ba40000000000000001) ; -SDR 82 TDI (001ba80000000000000001) ; -SDR 82 TDI (001bac0000000000000001) ; -SDR 82 TDI (001bb00000000000000001) ; -SDR 82 TDI (001bc00000000000000001) ; -SDR 82 TDI (001bc40000000000000001) ; -SDR 82 TDI (001bc80000000000000001) ; -SDR 82 TDI (001bcc0000000000000001) ; -SDR 82 TDI (001bd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001c011100010200f00100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001c011100010200f00101) ; -SDR 82 TDI (001c050000000000f00101) ; -SDR 82 TDI (001c090101010201f00001) ; -SDR 82 TDI (001c0e0000020002e00001) ; -SDR 82 TDI (001c110101010300e00301) ; -SDR 82 TDI (001c200000000000a80001) ; -SDR 82 TDI (001c240000000000280001) ; -SDR 82 TDI (001c280000000000280001) ; -SDR 82 TDI (001c2c0000000000480001) ; -SDR 82 TDI (001c300000000000500001) ; -SDR 82 TDI (001c408800000000000001) ; -SDR 82 TDI (001c440000000000880001) ; -SDR 82 TDI (001c480000000000880001) ; -SDR 82 TDI (001c4c00000000008c0001) ; -SDR 82 TDI (001c500000000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001c820100030203002100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001c820100030203002101) ; -SDR 82 TDI (001c842000020000010001) ; -SDR 82 TDI (001c8a0101010203000101) ; -SDR 82 TDI (001c8c0000000000000001) ; -SDR 82 TDI (001c930001010201000101) ; -SDR 82 TDI (001ca00000000000000001) ; -SDR 82 TDI (001ca40800004000000001) ; -SDR 82 TDI (001ca80000000000000001) ; -SDR 82 TDI (001cac0000000000000001) ; -SDR 82 TDI (001cb00400000000000001) ; -SDR 82 TDI (001cc00000000808000001) ; -SDR 82 TDI (001cc42000000008000001) ; -SDR 82 TDI (001cc80000000008040001) ; -SDR 82 TDI (001ccc0000000000000001) ; -SDR 82 TDI (001cd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001d000040440201010000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001d000040440201010001) ; -SDR 82 TDI (001d040050410000010001) ; -SDR 82 TDI (001d080051000200010001) ; -SDR 82 TDI (001d0c0150000100000101) ; -SDR 82 TDI (001d110051400201010001) ; -SDR 82 TDI (001d200000040000000001) ; -SDR 82 TDI (001d240004000000000001) ; -SDR 82 TDI (001d280000000000000001) ; -SDR 82 TDI (001d2c0000100000000001) ; -SDR 82 TDI (001d300000000000000001) ; -SDR 82 TDI (001d400000000000000001) ; -SDR 82 TDI (001d440020080000000001) ; -SDR 82 TDI (001d480020080000000001) ; -SDR 82 TDI (001d4c0020000000000001) ; -SDR 82 TDI (001d500020000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001d820110010003000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001d820110010003000001) ; -SDR 82 TDI (001d8400000a0101000101) ; -SDR 82 TDI (001d8a01010b0102000101) ; -SDR 82 TDI (001d8c0000400000000001) ; -SDR 82 TDI (001d930301010303000101) ; -SDR 82 TDI (001da00084000000000001) ; -SDR 82 TDI (001da40040100000000001) ; -SDR 82 TDI (001da80040140000000001) ; -SDR 82 TDI (001dac0000000000000001) ; -SDR 82 TDI (001db00000000000000001) ; -SDR 82 TDI (001dc00000000000000001) ; -SDR 82 TDI (001dc40000000000000001) ; -SDR 82 TDI (001dc80000000000000001) ; -SDR 82 TDI (001dcc0040000000000001) ; -SDR 82 TDI (001dd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001e000000010002000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001e000000010002000001) ; -SDR 82 TDI (001e048002810000000001) ; -SDR 82 TDI (001e088001800003020001) ; -SDR 82 TDI (001e0e0020000200000001) ; -SDR 82 TDI (001e110003000002020001) ; -SDR 82 TDI (001e202000000000000001) ; -SDR 82 TDI (001e242000000000000001) ; -SDR 82 TDI (001e280000200000000001) ; -SDR 82 TDI (001e2c0000000000000001) ; -SDR 82 TDI (001e300000000000000001) ; -SDR 82 TDI (001e400000000000000001) ; -SDR 82 TDI (001e440000000000000001) ; -SDR 82 TDI (001e480000300000000001) ; -SDR 82 TDI (001e4c0000000000000001) ; -SDR 82 TDI (001e500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001e820100210202000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001e820100210202000001) ; -SDR 82 TDI (001e840002340100010001) ; -SDR 82 TDI (001e8a0103250302000001) ; -SDR 82 TDI (001e8c0000a40000000001) ; -SDR 82 TDI (001e930103a50302000001) ; -SDR 82 TDI (001ea00020000000000001) ; -SDR 82 TDI (001ea40000802000000001) ; -SDR 82 TDI (001ea80000000000000001) ; -SDR 82 TDI (001eac0000200000000001) ; -SDR 82 TDI (001eb00000000000000001) ; -SDR 82 TDI (001ec00000800000000001) ; -SDR 82 TDI (001ec40000c40000000001) ; -SDR 82 TDI (001ec80000800000000001) ; -SDR 82 TDI (001ecc0000900000000001) ; -SDR 82 TDI (001ed00000800000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001f020100010102500000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001f020100010102500001) ; -SDR 82 TDI (001f040200030200500101) ; -SDR 82 TDI (001f080000000102d00001) ; -SDR 82 TDI (001f0d0000000000e00001) ; -SDR 82 TDI (001f120201030300e00101) ; -SDR 82 TDI (001f200000000000280001) ; -SDR 82 TDI (001f240000000000280001) ; -SDR 82 TDI (001f280000000000280001) ; -SDR 82 TDI (001f2c0000000000080001) ; -SDR 82 TDI (001f300000000000000001) ; -SDR 82 TDI (001f400000000000000001) ; -SDR 82 TDI (001f440000000040080001) ; -SDR 82 TDI (001f480000000040080001) ; -SDR 82 TDI (001f4c0000000000080001) ; -SDR 82 TDI (001f500000000000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (001f800100000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (001f800100000000000001) ; -SDR 82 TDI (001f850002010000000101) ; -SDR 82 TDI (001f890302010302000301) ; -SDR 82 TDI (001f8c0000000000000001) ; -SDR 82 TDI (001f910102030301000301) ; -SDR 82 TDI (001fa00000000000000001) ; -SDR 82 TDI (001fa40000000000000001) ; -SDR 82 TDI (001fa80000000000000001) ; -SDR 82 TDI (001fac0000000000000001) ; -SDR 82 TDI (001fb00000000000000001) ; -SDR 82 TDI (001fc00008000040000001) ; -SDR 82 TDI (001fc40000000000000001) ; -SDR 82 TDI (001fc80000000000000001) ; -SDR 82 TDI (001fcc0000000000000001) ; -SDR 82 TDI (001fd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0020000200030001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0020000200030001000001) ; -SDR 82 TDI (0020070300030100000001) ; -SDR 82 TDI (0020090100000100000001) ; -SDR 82 TDI (00200c0000000000000001) ; -SDR 82 TDI (0020120200020001000301) ; -SDR 82 TDI (0020200000000000000001) ; -SDR 82 TDI (0020240000000004000001) ; -SDR 82 TDI (0020280000000004000001) ; -SDR 82 TDI (00202c0000000000000001) ; -SDR 82 TDI (0020300000000000000001) ; -SDR 82 TDI (0020400000400000000001) ; -SDR 82 TDI (0020440000000000000001) ; -SDR 82 TDI (0020480000000000000001) ; -SDR 82 TDI (00204c0000000000000001) ; -SDR 82 TDI (0020500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0020800000020203000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0020800000020203000001) ; -SDR 82 TDI (0020840002010003010001) ; -SDR 82 TDI (0020880003020003010001) ; -SDR 82 TDI (00208c0000000000000001) ; -SDR 82 TDI (0020900203030303010001) ; -SDR 82 TDI (0020a00000000000000001) ; -SDR 82 TDI (0020a40000000000000001) ; -SDR 82 TDI (0020a80000000000000001) ; -SDR 82 TDI (0020ac0000000000000001) ; -SDR 82 TDI (0020b00000000000000001) ; -SDR 82 TDI (0020c00000000000000001) ; -SDR 82 TDI (0020c40000000000000001) ; -SDR 82 TDI (0020c80000000000000001) ; -SDR 82 TDI (0020cc0000000000000001) ; -SDR 82 TDI (0020d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0021001002031302020100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0021001002031302020101) ; -SDR 82 TDI (0021040200038a02030101) ; -SDR 82 TDI (0021090002021703010001) ; -SDR 82 TDI (00210c0000008800000001) ; -SDR 82 TDI (0021120203031302000101) ; -SDR 82 TDI (0021200000008000800001) ; -SDR 82 TDI (0021240000000c40000001) ; -SDR 82 TDI (0021280000000040000001) ; -SDR 82 TDI (00212c0000001000000001) ; -SDR 82 TDI (0021300000000000000001) ; -SDR 82 TDI (0021400800008800000001) ; -SDR 82 TDI (0021440000000060000001) ; -SDR 82 TDI (0021480800008040000001) ; -SDR 82 TDI (00214c0800000000000001) ; -SDR 82 TDI (0021500000008000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0021838200008806040000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0021838200008806040001) ; -SDR 82 TDI (0021870202000100000001) ; -SDR 82 TDI (0021890502034102000001) ; -SDR 82 TDI (00218c0800000000000001) ; -SDR 82 TDI (0021930303010300000201) ; -SDR 82 TDI (0021a04000000000140011) ; -SDR 82 TDI (0021a40000000000000001) ; -SDR 82 TDI (0021a80000000000000001) ; -SDR 82 TDI (0021ac0000000400000001) ; -SDR 82 TDI (0021b00000000400000001) ; -SDR 82 TDI (0021c02000000000080001) ; -SDR 82 TDI (0021c40000000000000001) ; -SDR 82 TDI (0021c80000000000000001) ; -SDR 82 TDI (0021cc1000000000000001) ; -SDR 82 TDI (0021d00000001000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0022020100020302000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0022020100020302000001) ; -SDR 82 TDI (0022060200020002000001) ; -SDR 82 TDI (00220a0b00020302080001) ; -SDR 82 TDI (00220c0800000080000001) ; -SDR 82 TDI (0022120900020302000201) ; -SDR 82 TDI (0022200800000000000001) ; -SDR 82 TDI (0022240800000000000001) ; -SDR 82 TDI (0022280800000000000001) ; -SDR 82 TDI (00222c0800000000000001) ; -SDR 82 TDI (0022300800000000000001) ; -SDR 82 TDI (0022400400000000000001) ; -SDR 82 TDI (0022440400000000000001) ; -SDR 82 TDI (0022480400000000000001) ; -SDR 82 TDI (00224c0400000000000001) ; -SDR 82 TDI (0022500400000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0022804800020002f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0022804800020002f00001) ; -SDR 82 TDI (0022844900012101f00001) ; -SDR 82 TDI (0022880002030103f00001) ; -SDR 82 TDI (00228c0000000000e00001) ; -SDR 82 TDI (0022900002000000e00001) ; -SDR 82 TDI (0022a00000000000280001) ; -SDR 82 TDI (0022a40000000010a80001) ; -SDR 82 TDI (0022a80400000000a80001) ; -SDR 82 TDI (0022ac4000000000680001) ; -SDR 82 TDI (0022b00000000000700001) ; -SDR 82 TDI (0022c01000000000000001) ; -SDR 82 TDI (0022c41000000000880001) ; -SDR 82 TDI (0022c80000000000880001) ; -SDR 82 TDI (0022cc0000000000880001) ; -SDR 82 TDI (0022d00000000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0023000100010000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0023000100010000000001) ; -SDR 82 TDI (0023040200020002000001) ; -SDR 82 TDI (0023080102030002000001) ; -SDR 82 TDI (00230c0000000000000001) ; -SDR 82 TDI (0023120302010200000201) ; -SDR 82 TDI (0023200000000000000001) ; -SDR 82 TDI (0023240000000040000001) ; -SDR 82 TDI (0023280000000040000001) ; -SDR 82 TDI (00232c0000000000000001) ; -SDR 82 TDI (0023300000000000000001) ; -SDR 82 TDI (0023400000000000000001) ; -SDR 82 TDI (0023440000000060000001) ; -SDR 82 TDI (0023480000000040000001) ; -SDR 82 TDI (00234c0000000000000001) ; -SDR 82 TDI (0023500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002381030101010d000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002381030101010d000001) ; -SDR 82 TDI (0023840203000100000001) ; -SDR 82 TDI (00238b0103010101000001) ; -SDR 82 TDI (00238c0000000000000001) ; -SDR 82 TDI (0023920201000100000001) ; -SDR 82 TDI (0023a00000000000000001) ; -SDR 82 TDI (0023a40000000000000001) ; -SDR 82 TDI (0023a80000000000000001) ; -SDR 82 TDI (0023ac0000000000000001) ; -SDR 82 TDI (0023b00000000000000001) ; -SDR 82 TDI (0023c00000000004000001) ; -SDR 82 TDI (0023c40000000000000001) ; -SDR 82 TDI (0023c80000000000000001) ; -SDR 82 TDI (0023cc0000000000000001) ; -SDR 82 TDI (0023d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0024020000020000600200) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0024020000020000600201) ; -SDR 82 TDI (0024040002008202500001) ; -SDR 82 TDI (00240a0002038203000001) ; -SDR 82 TDI (00240c4000008800400001) ; -SDR 82 TDI (002410080200ca02400001) ; -SDR 82 TDI (002420000000c000280001) ; -SDR 82 TDI (002424000000c840200001) ; -SDR 82 TDI (0024280000004840280001) ; -SDR 82 TDI (00242c0000004000440001) ; -SDR 82 TDI (0024300000004000500001) ; -SDR 82 TDI (002440000000a000000001) ; -SDR 82 TDI (002444800400a060880001) ; -SDR 82 TDI (0024480004002440800001) ; -SDR 82 TDI (00244c0800002400080001) ; -SDR 82 TDI (0024501000002000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002483020203011e900000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002483020203011e900001) ; -SDR 82 TDI (0024840001000001a10001) ; -SDR 82 TDI (00248b0200030503f00001) ; -SDR 82 TDI (00248c0000000400a00001) ; -SDR 82 TDI (0024902002000400a40001) ; -SDR 82 TDI (0024a00000000000000001) ; -SDR 82 TDI (0024a40000000000080001) ; -SDR 82 TDI (0024a80000000000000001) ; -SDR 82 TDI (0024ac0000001000080001) ; -SDR 82 TDI (0024b00800001000000001) ; -SDR 82 TDI (0024c00000001004000001) ; -SDR 82 TDI (0024c40000000400000001) ; -SDR 82 TDI (0024c80800000000080001) ; -SDR 82 TDI (0024cc0000000000800001) ; -SDR 82 TDI (0024d0a000000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0025000202000080a00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0025000202000080a00001) ; -SDR 82 TDI (0025040300010301a40001) ; -SDR 82 TDI (0025080102010301240001) ; -SDR 82 TDI (00250c0000000000040001) ; -SDR 82 TDI (0025100202000200000201) ; -SDR 82 TDI (0025200000000000400001) ; -SDR 82 TDI (0025240000000000500001) ; -SDR 82 TDI (0025280000000000500001) ; -SDR 82 TDI (00252c0000000000500001) ; -SDR 82 TDI (0025300000000000500001) ; -SDR 82 TDI (0025400800000000000001) ; -SDR 82 TDI (0025440000000000800001) ; -SDR 82 TDI (0025480000000000800001) ; -SDR 82 TDI (00254c0000000000800001) ; -SDR 82 TDI (0025500000000000800003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0025810000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0025810000000000000001) ; -SDR 82 TDI (0025850000020000000001) ; -SDR 82 TDI (0025890200000000000001) ; -SDR 82 TDI (00258c0000000000000001) ; -SDR 82 TDI (0025910000020000000001) ; -SDR 82 TDI (0025a00000400000004001) ; -SDR 82 TDI (0025a40000000000000001) ; -SDR 82 TDI (0025a80000000000800001) ; -SDR 82 TDI (0025ac0000000000000001) ; -SDR 82 TDI (0025b00000000000200001) ; -SDR 82 TDI (0025c00000000000000001) ; -SDR 82 TDI (0025c40000000000000001) ; -SDR 82 TDI (0025c80000000000000001) ; -SDR 82 TDI (0025cc0000000000000001) ; -SDR 82 TDI (0025d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0026030000020301000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0026030000020301000001) ; -SDR 82 TDI (0026040002000000000001) ; -SDR 82 TDI (00260b0202020303000001) ; -SDR 82 TDI (00260c0000000000000001) ; -SDR 82 TDI (0026110002000301000001) ; -SDR 82 TDI (0026202000000000000001) ; -SDR 82 TDI (0026242000000000800001) ; -SDR 82 TDI (0026280000000000800001) ; -SDR 82 TDI (00262c0000000000200001) ; -SDR 82 TDI (0026300000000000200001) ; -SDR 82 TDI (0026400000000000000001) ; -SDR 82 TDI (0026440000000010000001) ; -SDR 82 TDI (0026480000000000000001) ; -SDR 82 TDI (00264c0000000000000001) ; -SDR 82 TDI (0026500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0026800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0026800000000000000001) ; -SDR 82 TDI (0026840000000000000001) ; -SDR 82 TDI (0026880000000000000001) ; -SDR 82 TDI (00268c0000000000000001) ; -SDR 82 TDI (0026900000000000000001) ; -SDR 82 TDI (0026a00000000000000001) ; -SDR 82 TDI (0026a40000000000000001) ; -SDR 82 TDI (0026a80000040000000001) ; -SDR 82 TDI (0026ac0000000000000001) ; -SDR 82 TDI (0026b00000000000000001) ; -SDR 82 TDI (0026c00000000000000001) ; -SDR 82 TDI (0026c40000000000000001) ; -SDR 82 TDI (0026c80000000000500001) ; -SDR 82 TDI (0026cc0000000000000001) ; -SDR 82 TDI (0026d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0027010101010101010100) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0027010101010101010101) ; -SDR 82 TDI (0027050501010001000001) ; -SDR 82 TDI (0027080000000000000001) ; -SDR 82 TDI (00270c0080000000040001) ; -SDR 82 TDI (0027100040000000000001) ; -SDR 82 TDI (0027200000000000000001) ; -SDR 82 TDI (0027250101010141010101) ; -SDR 82 TDI (0027280000000040400001) ; -SDR 82 TDI (00272c0080000000100001) ; -SDR 82 TDI (0027300000000000000001) ; -SDR 82 TDI (0027400000000000000001) ; -SDR 82 TDI (0027440004000020000001) ; -SDR 82 TDI (0027480004000000000001) ; -SDR 82 TDI (00274c0000000000000001) ; -SDR 82 TDI (0027500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0027800400000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0027800400000000000001) ; -SDR 82 TDI (0027840000000800000001) ; -SDR 82 TDI (0027880000000800000001) ; -SDR 82 TDI (00278c0000000800000001) ; -SDR 82 TDI (0027900000000c00080001) ; -SDR 82 TDI (0027a00000000000000001) ; -SDR 82 TDI (0027a40040000800000001) ; -SDR 82 TDI (0027a80040008800000001) ; -SDR 82 TDI (0027ac0000008400000001) ; -SDR 82 TDI (0027b00080008400000001) ; -SDR 82 TDI (0027c00000001000000001) ; -SDR 82 TDI (0027c40000000800000001) ; -SDR 82 TDI (0027c80000001800000001) ; -SDR 82 TDI (0027cc0040001800000001) ; -SDR 82 TDI (0027d00000001000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0028000000a01000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0028000000a01000000001) ; -SDR 82 TDI (0028040000801000000001) ; -SDR 82 TDI (0028080000801400000001) ; -SDR 82 TDI (00280c0000001400000001) ; -SDR 82 TDI (0028100000001000000001) ; -SDR 82 TDI (0028200000000400000001) ; -SDR 82 TDI (0028240000000440000001) ; -SDR 82 TDI (0028280000000440000001) ; -SDR 82 TDI (00282c0000001000000001) ; -SDR 82 TDI (0028300000001000000001) ; -SDR 82 TDI (0028400000a00000000001) ; -SDR 82 TDI (0028440000041060000001) ; -SDR 82 TDI (0028480000248040000001) ; -SDR 82 TDI (00284c0000008000000001) ; -SDR 82 TDI (0028500000008000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002880000010001c000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002880000010001c000001) ; -SDR 82 TDI (0028840000240000100001) ; -SDR 82 TDI (0028880000240000100001) ; -SDR 82 TDI (00288c0000240000c00001) ; -SDR 82 TDI (0028900000240000e00001) ; -SDR 82 TDI (0028a00008a00000000009) ; -SDR 82 TDI (0028a40000000000800001) ; -SDR 82 TDI (0028a80000200000a00001) ; -SDR 82 TDI (0028ac0000000000200001) ; -SDR 82 TDI (0028b00000000000200001) ; -SDR 82 TDI (0028c00000140004000009) ; -SDR 82 TDI (0028c40000800000080001) ; -SDR 82 TDI (0028c80000900000080001) ; -SDR 82 TDI (0028cc0000800000080001) ; -SDR 82 TDI (0028d00000800000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (00290010c4001000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (00290010c4001000000001) ; -SDR 82 TDI (00290400d4009400000001) ; -SDR 82 TDI (00290800d4009400000001) ; -SDR 82 TDI (00290c00d4009c00000001) ; -SDR 82 TDI (00291000d4009c00000001) ; -SDR 82 TDI (0029200000009400000001) ; -SDR 82 TDI (0029240080009c00000001) ; -SDR 82 TDI (0029280084008c00000001) ; -SDR 82 TDI (00292c0084009400000001) ; -SDR 82 TDI (0029300004009000000001) ; -SDR 82 TDI (00294008c0009000000001) ; -SDR 82 TDI (00294400e0009800000001) ; -SDR 82 TDI (00294808e0009800000001) ; -SDR 82 TDI (00294c08a0008800000001) ; -SDR 82 TDI (00295000a0009000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0029800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0029800000000000000001) ; -SDR 82 TDI (0029840000000800000001) ; -SDR 82 TDI (0029880000000800000001) ; -SDR 82 TDI (00298c0000000000000001) ; -SDR 82 TDI (0029900000000000000001) ; -SDR 82 TDI (0029a00000000000000021) ; -SDR 82 TDI (0029a40044000000000001) ; -SDR 82 TDI (0029a80040001000000001) ; -SDR 82 TDI (0029ac0000000000000001) ; -SDR 82 TDI (0029b00000000400000001) ; -SDR 82 TDI (0029c00000000000000001) ; -SDR 82 TDI (0029c40000000000000001) ; -SDR 82 TDI (0029c80000000000000001) ; -SDR 82 TDI (0029cc0040000000000001) ; -SDR 82 TDI (0029d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002a000004000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002a000004000000000001) ; -SDR 82 TDI (002a040004000000000001) ; -SDR 82 TDI (002a080004000000000001) ; -SDR 82 TDI (002a0c0004000000000001) ; -SDR 82 TDI (002a100000000000000001) ; -SDR 82 TDI (002a200000040000000001) ; -SDR 82 TDI (002a240000000000000001) ; -SDR 82 TDI (002a280000040000000001) ; -SDR 82 TDI (002a2c0004000000000001) ; -SDR 82 TDI (002a300004000000000001) ; -SDR 82 TDI (002a400000000000000001) ; -SDR 82 TDI (002a440000080000000001) ; -SDR 82 TDI (002a480080080000000001) ; -SDR 82 TDI (002a4c0080000000500001) ; -SDR 82 TDI (002a500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002a800080040000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002a800080040000000001) ; -SDR 82 TDI (002a840000000000000001) ; -SDR 82 TDI (002a880000000000000001) ; -SDR 82 TDI (002a8c0000000000000001) ; -SDR 82 TDI (002a900000400000000001) ; -SDR 82 TDI (002aa00000100020000001) ; -SDR 82 TDI (002aa40000000000800001) ; -SDR 82 TDI (002aa80080000000800001) ; -SDR 82 TDI (002aac0080100000200001) ; -SDR 82 TDI (002ab00000000000200001) ; -SDR 82 TDI (002ac00000000400000001) ; -SDR 82 TDI (002ac40000000000000001) ; -SDR 82 TDI (002ac80000000000000001) ; -SDR 82 TDI (002acc0000000000000001) ; -SDR 82 TDI (002ad00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002b000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002b000000000000000001) ; -SDR 82 TDI (002b040010000000000001) ; -SDR 82 TDI (002b080010000000000001) ; -SDR 82 TDI (002b0c0010000000000001) ; -SDR 82 TDI (002b100014000000000001) ; -SDR 82 TDI (002b200000000000000001) ; -SDR 82 TDI (002b240000000000000001) ; -SDR 82 TDI (002b280000000000000001) ; -SDR 82 TDI (002b2c0000000000000001) ; -SDR 82 TDI (002b300000000000000001) ; -SDR 82 TDI (002b400080000000004001) ; -SDR 82 TDI (002b440080000000000001) ; -SDR 82 TDI (002b480000000000000001) ; -SDR 82 TDI (002b4c0000000000000001) ; -SDR 82 TDI (002b500080000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002b800000004000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002b800000004000000001) ; -SDR 82 TDI (002b840040000000000001) ; -SDR 82 TDI (002b880040000000000001) ; -SDR 82 TDI (002b8c0040000000000001) ; -SDR 82 TDI (002b900040000000000001) ; -SDR 82 TDI (002ba00000000000000001) ; -SDR 82 TDI (002ba40000000080000001) ; -SDR 82 TDI (002ba80000000080000001) ; -SDR 82 TDI (002bac0000000080000001) ; -SDR 82 TDI (002bb00000000000000001) ; -SDR 82 TDI (002bc00000100000040001) ; -SDR 82 TDI (002bc40800000080000001) ; -SDR 82 TDI (002bc80000100080000001) ; -SDR 82 TDI (002bcc0000100080000001) ; -SDR 82 TDI (002bd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002c000000040000100000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002c000000040000100001) ; -SDR 82 TDI (002c048000000000400001) ; -SDR 82 TDI (002c080000000000500001) ; -SDR 82 TDI (002c0c0000000000000001) ; -SDR 82 TDI (002c100000000000c00001) ; -SDR 82 TDI (002c202000040000000001) ; -SDR 82 TDI (002c240000000040200001) ; -SDR 82 TDI (002c280000000040280001) ; -SDR 82 TDI (002c2c0000004000080001) ; -SDR 82 TDI (002c300000000000080001) ; -SDR 82 TDI (002c400000000000000001) ; -SDR 82 TDI (002c440004000060000001) ; -SDR 82 TDI (002c480004000040000001) ; -SDR 82 TDI (002c4c0000000000080001) ; -SDR 82 TDI (002c500000000000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002c80002000001cc00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002c80002000001cc00001) ; -SDR 82 TDI (002c840020000000300001) ; -SDR 82 TDI (002c880020000000800001) ; -SDR 82 TDI (002c8c0020000000e00001) ; -SDR 82 TDI (002c900000000000200001) ; -SDR 82 TDI (002ca00000002000280009) ; -SDR 82 TDI (002ca40000000000880001) ; -SDR 82 TDI (002ca80000040000800001) ; -SDR 82 TDI (002cac0000000000600001) ; -SDR 82 TDI (002cb00000000000300001) ; -SDR 82 TDI (002cc00004000004000001) ; -SDR 82 TDI (002cc40000000000880001) ; -SDR 82 TDI (002cc80000000000080001) ; -SDR 82 TDI (002ccc0000000000800001) ; -SDR 82 TDI (002cd00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002d002000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002d002000000000000001) ; -SDR 82 TDI (002d042800000000000001) ; -SDR 82 TDI (002d082804000000000001) ; -SDR 82 TDI (002d0c2804004000000001) ; -SDR 82 TDI (002d102800000000000001) ; -SDR 82 TDI (002d201800000000000001) ; -SDR 82 TDI (002d241800000040040001) ; -SDR 82 TDI (002d281810000040000001) ; -SDR 82 TDI (002d2c1800000000000001) ; -SDR 82 TDI (002d301800000000000001) ; -SDR 82 TDI (002d401400000000000001) ; -SDR 82 TDI (002d440420000000000001) ; -SDR 82 TDI (002d481400000000000001) ; -SDR 82 TDI (002d4c1400000000000001) ; -SDR 82 TDI (002d501400000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002d800800000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002d800800000000000001) ; -SDR 82 TDI (002d840000000000000001) ; -SDR 82 TDI (002d880028000000000001) ; -SDR 82 TDI (002d8c0010000000000001) ; -SDR 82 TDI (002d900014000000000001) ; -SDR 82 TDI (002da00000000040000081) ; -SDR 82 TDI (002da44400000000000001) ; -SDR 82 TDI (002da84020000000000001) ; -SDR 82 TDI (002dac0000000000000001) ; -SDR 82 TDI (002db04000000000000001) ; -SDR 82 TDI (002dc00010000000800001) ; -SDR 82 TDI (002dc40040000000000001) ; -SDR 82 TDI (002dc80050000000000001) ; -SDR 82 TDI (002dcc0000000000000001) ; -SDR 82 TDI (002dd00080000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002e000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002e000000000000000001) ; -SDR 82 TDI (002e040000000000000001) ; -SDR 82 TDI (002e080000000000000001) ; -SDR 82 TDI (002e0c0000000000000001) ; -SDR 82 TDI (002e100000000000000001) ; -SDR 82 TDI (002e200000000000000001) ; -SDR 82 TDI (002e240000000000000001) ; -SDR 82 TDI (002e280000000000000001) ; -SDR 82 TDI (002e2c0000000000000001) ; -SDR 82 TDI (002e300000000000000001) ; -SDR 82 TDI (002e400000000000000001) ; -SDR 82 TDI (002e440000000000000001) ; -SDR 82 TDI (002e480000000000000001) ; -SDR 82 TDI (002e4c0000000000000001) ; -SDR 82 TDI (002e500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002e800000000000500000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002e800000000000500001) ; -SDR 82 TDI (002e840000000000500001) ; -SDR 82 TDI (002e880000240000d00001) ; -SDR 82 TDI (002e8c0000000000e00001) ; -SDR 82 TDI (002e900000800000e00001) ; -SDR 82 TDI (002ea00000000000280001) ; -SDR 82 TDI (002ea40000000000a80001) ; -SDR 82 TDI (002ea80000002000a80001) ; -SDR 82 TDI (002eac0000000000280001) ; -SDR 82 TDI (002eb00000000000200001) ; -SDR 82 TDI (002ec00000000000000001) ; -SDR 82 TDI (002ec40000000000080001) ; -SDR 82 TDI (002ec80000000000080001) ; -SDR 82 TDI (002ecc0000800000080001) ; -SDR 82 TDI (002ed00000000000080003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002f008000001000000004) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002f008000001000000005) ; -SDR 82 TDI (002f040000001000000001) ; -SDR 82 TDI (002f080400000000040001) ; -SDR 82 TDI (002f0c0800000020040001) ; -SDR 82 TDI (002f100000000000000001) ; -SDR 82 TDI (002f2040000000c0000041) ; -SDR 82 TDI (002f240038000000400001) ; -SDR 82 TDI (002f280000008000540001) ; -SDR 82 TDI (002f2c0000000000100001) ; -SDR 82 TDI (002f300000000000000001) ; -SDR 82 TDI (002f4000080020d0000001) ; -SDR 82 TDI (002f440000000c00000001) ; -SDR 82 TDI (002f480000008400000001) ; -SDR 82 TDI (002f4c1004008400000001) ; -SDR 82 TDI (002f500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (002f800000000000d80000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (002f800000000000d80001) ; -SDR 82 TDI (002f840000000040f80001) ; -SDR 82 TDI (002f880000000000f80001) ; -SDR 82 TDI (002f8c0000248000e80001) ; -SDR 82 TDI (002f900000008000e40001) ; -SDR 82 TDI (002fa0002800c000280001) ; -SDR 82 TDI (002fa4000000c800a80001) ; -SDR 82 TDI (002fa80000000840a80001) ; -SDR 82 TDI (002fac0000004080280001) ; -SDR 82 TDI (002fb000000040002c0001) ; -SDR 82 TDI (002fc00000000000000001) ; -SDR 82 TDI (002fc40018402000080001) ; -SDR 82 TDI (002fc80010002040080001) ; -SDR 82 TDI (002fcc0000002080880001) ; -SDR 82 TDI (002fd000048020008c0003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (00300000c0000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (00300000c0000000000001) ; -SDR 82 TDI (00300408d0000000000001) ; -SDR 82 TDI (00300800d0000000000001) ; -SDR 82 TDI (00300c00d0000000000001) ; -SDR 82 TDI (00301000d0000000000001) ; -SDR 82 TDI (0030200084000000000001) ; -SDR 82 TDI (0030240080000000000001) ; -SDR 82 TDI (0030280080000000000001) ; -SDR 82 TDI (00302c0080000000000001) ; -SDR 82 TDI (0030300000000000000001) ; -SDR 82 TDI (0030400040000000000001) ; -SDR 82 TDI (0030440060000000000001) ; -SDR 82 TDI (0030480060040000000001) ; -SDR 82 TDI (00304c0020000000000001) ; -SDR 82 TDI (0030500020000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0030800810000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0030800810000000000001) ; -SDR 82 TDI (0030840000240000000001) ; -SDR 82 TDI (0030880000240000000001) ; -SDR 82 TDI (00308c0000a40000000001) ; -SDR 82 TDI (0030900000a40000000001) ; -SDR 82 TDI (0030a00000000000000001) ; -SDR 82 TDI (0030a40040800000000001) ; -SDR 82 TDI (0030a80044000000000001) ; -SDR 82 TDI (0030ac0000000000000001) ; -SDR 82 TDI (0030b00000000000000001) ; -SDR 82 TDI (0030c00000000000000001) ; -SDR 82 TDI (0030c41000c00000000001) ; -SDR 82 TDI (0030c80000800000000001) ; -SDR 82 TDI (0030cc0000800000000001) ; -SDR 82 TDI (0030d00000800000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0031000000000000800000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0031000000000000800001) ; -SDR 82 TDI (0031040000000080a00001) ; -SDR 82 TDI (0031080000000000200001) ; -SDR 82 TDI (00310c0000000000000001) ; -SDR 82 TDI (0031100000000000000001) ; -SDR 82 TDI (0031200000000000000001) ; -SDR 82 TDI (0031240000400000000001) ; -SDR 82 TDI (0031288000000000000001) ; -SDR 82 TDI (00312c1000000000000001) ; -SDR 82 TDI (0031300000000000000001) ; -SDR 82 TDI (0031400000000000800021) ; -SDR 82 TDI (0031440000000000040001) ; -SDR 82 TDI (0031484000000000000001) ; -SDR 82 TDI (00314c0400002000800001) ; -SDR 82 TDI (0031500000000000800003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0031800000000080000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0031800000000080000001) ; -SDR 82 TDI (0031840000000000000001) ; -SDR 82 TDI (0031880000000000000001) ; -SDR 82 TDI (00318c0000000000000001) ; -SDR 82 TDI (0031900000000000000001) ; -SDR 82 TDI (0031a00000000000000001) ; -SDR 82 TDI (0031a40000000080000001) ; -SDR 82 TDI (0031a80000000080000001) ; -SDR 82 TDI (0031ac0000000080000001) ; -SDR 82 TDI (0031b00000000000000001) ; -SDR 82 TDI (0031c00000000000000001) ; -SDR 82 TDI (0031c40000000080000001) ; -SDR 82 TDI (0031c80000000080000001) ; -SDR 82 TDI (0031cc0000000080000001) ; -SDR 82 TDI (0031d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0032002000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0032002000000000000001) ; -SDR 82 TDI (0032040000000000080001) ; -SDR 82 TDI (0032080000000000000001) ; -SDR 82 TDI (00320c0000000000000001) ; -SDR 82 TDI (0032100000000000000001) ; -SDR 82 TDI (0032200800004000000001) ; -SDR 82 TDI (0032248000400000000001) ; -SDR 82 TDI (0032280000000000000001) ; -SDR 82 TDI (00322c0000000000000001) ; -SDR 82 TDI (0032300000000000000001) ; -SDR 82 TDI (0032400000000000000001) ; -SDR 82 TDI (0032444000000000000001) ; -SDR 82 TDI (0032480000000000000001) ; -SDR 82 TDI (00324c0000000000000001) ; -SDR 82 TDI (0032500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0032800000000000f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0032800000000000f00001) ; -SDR 82 TDI (0032840000000000f00001) ; -SDR 82 TDI (0032880000000000f00001) ; -SDR 82 TDI (00328c0000000000e00001) ; -SDR 82 TDI (0032900000000000e00001) ; -SDR 82 TDI (0032a00010000000280001) ; -SDR 82 TDI (0032a40010000000a80001) ; -SDR 82 TDI (0032a80010000000a80001) ; -SDR 82 TDI (0032ac0010000000680001) ; -SDR 82 TDI (0032b00010000000700001) ; -SDR 82 TDI (0032c00000000000000001) ; -SDR 82 TDI (0032c40000000000880001) ; -SDR 82 TDI (0032c80000000000880001) ; -SDR 82 TDI (0032cc0000000000880001) ; -SDR 82 TDI (0032d00000000000880003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0033000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0033000000000000000001) ; -SDR 82 TDI (0033040008000000000001) ; -SDR 82 TDI (0033080008100000000001) ; -SDR 82 TDI (00330c0000000000000001) ; -SDR 82 TDI (0033100020000000000001) ; -SDR 82 TDI (0033200000000000000001) ; -SDR 82 TDI (0033240000240008000001) ; -SDR 82 TDI (0033280020000000000001) ; -SDR 82 TDI (00332c0000000000000001) ; -SDR 82 TDI (0033300000000000000001) ; -SDR 82 TDI (0033400000000000000001) ; -SDR 82 TDI (0033440000300000000001) ; -SDR 82 TDI (0033480000040000000001) ; -SDR 82 TDI (00334c0000000000000001) ; -SDR 82 TDI (0033500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0033800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0033800000000000000001) ; -SDR 82 TDI (0033840000800000000001) ; -SDR 82 TDI (0033880000000000000001) ; -SDR 82 TDI (00338c0000000000000001) ; -SDR 82 TDI (0033900000000000000001) ; -SDR 82 TDI (0033a00000000000000001) ; -SDR 82 TDI (0033a40000000000000001) ; -SDR 82 TDI (0033a80000000000000001) ; -SDR 82 TDI (0033ac0000000000000001) ; -SDR 82 TDI (0033b00000000000000001) ; -SDR 82 TDI (0033c00000000000000011) ; -SDR 82 TDI (0033c40000000000000001) ; -SDR 82 TDI (0033c80000000000000001) ; -SDR 82 TDI (0033cc0000000000000001) ; -SDR 82 TDI (0033d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0034000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0034000000000000000001) ; -SDR 82 TDI (0034040000000800000001) ; -SDR 82 TDI (0034080000000800000001) ; -SDR 82 TDI (00340c0000000800000001) ; -SDR 82 TDI (0034100000000800000001) ; -SDR 82 TDI (0034200000000000000001) ; -SDR 82 TDI (0034240000000800000001) ; -SDR 82 TDI (0034280000000800000001) ; -SDR 82 TDI (00342c0000000000000001) ; -SDR 82 TDI (0034300000000000000001) ; -SDR 82 TDI (0034400000000000000001) ; -SDR 82 TDI (0034440000000000000001) ; -SDR 82 TDI (0034480000000000000001) ; -SDR 82 TDI (00344c0000000000000001) ; -SDR 82 TDI (0034500000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0034800000000800000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0034800000000800000001) ; -SDR 82 TDI (0034840000000000000001) ; -SDR 82 TDI (0034880000000000000001) ; -SDR 82 TDI (00348c0000000000000001) ; -SDR 82 TDI (0034900000000000000001) ; -SDR 82 TDI (0034a00000000000000001) ; -SDR 82 TDI (0034a40000000000000001) ; -SDR 82 TDI (0034a80000000000000001) ; -SDR 82 TDI (0034ac0000000000000001) ; -SDR 82 TDI (0034b00000000000000001) ; -SDR 82 TDI (0034c00000000000000001) ; -SDR 82 TDI (0034c40000000000000001) ; -SDR 82 TDI (0034c80000000000000001) ; -SDR 82 TDI (0034cc0004000000000001) ; -SDR 82 TDI (0034d00000000000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0035000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0035000000000000000001) ; -SDR 82 TDI (0035040000000000000001) ; -SDR 82 TDI (0035080000040000000001) ; -SDR 82 TDI (00350c0000040000000001) ; -SDR 82 TDI (0035100000040000000001) ; -SDR 82 TDI (0035200000000000000001) ; -SDR 82 TDI (0035240000000000000001) ; -SDR 82 TDI (0035280000000000000001) ; -SDR 82 TDI (00352c8000000000000001) ; -SDR 82 TDI (0035301000000000000001) ; -SDR 82 TDI (0035400000000020000001) ; -SDR 82 TDI (0035440000000000000001) ; -SDR 82 TDI (0035480000800000000001) ; -SDR 82 TDI (00354c0000000000000001) ; -SDR 82 TDI (0035504400002000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0035800000000000500000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -SDR 82 TDI (0035800000000000500001) ; -SDR 82 TDI (0035840000040000400001) ; -SDR 82 TDI (0035880000000000c00001) ; -SDR 82 TDI (00358c0000000000200001) ; -SDR 82 TDI (0035900000000000000001) ; -SDR 82 TDI (0035a00000000000280001) ; -SDR 82 TDI (0035a40000000000a80001) ; -SDR 82 TDI (0035a80000000000880001) ; -SDR 82 TDI (0035ac0000000000280001) ; -SDR 82 TDI (0035b00000000000200001) ; -SDR 82 TDI (0035c00000804000000001) ; -SDR 82 TDI (0035c40010800000000001) ; -SDR 82 TDI (0035c80010000000000001) ; -SDR 82 TDI (0035cc0000800000000001) ; -SDR 82 TDI (0035d00000800000000003) ; -RUNTEST 20000 TCK; -SDR 82 TDI (0035d00000800000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (f0) ; -RUNTEST 100 TCK; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -//Loading device with 'ispen' instruction. -SIR 8 TDI (e8) ; -SDR 6 TDI (05) SMASK (3f) ; -//Loading device with 'ispen' instruction. -SIR 8 TDI (e8) ; -SDR 6 TDI (05) ; -// Loading device with a 'fvfy' instruction. -SIR 8 TDI (ee) ; -SDR 82 TDI (0000000000002000a00083) SMASK (03ffffffffffffffffffff) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000040008000000a40003) TDO (0000000000002000a00081) MASK (03ffffffffffffffffffff) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000082008000000240003) TDO (0000040008000000a40001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00000c0000000000040003) TDO (0000082008000000240001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000104020000000000003) TDO (00000c0000000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000200000002800400003) TDO (0000104020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000241000000040500003) TDO (0000200000002800400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000280820002040500003) TDO (0000241000000040500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00002c0000000000500003) TDO (0000280820002040500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000308000000000500003) TDO (00002c0000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000400000004000000003) TDO (0000308000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000440400000060800003) TDO (0000400000004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000048a000004040800003) TDO (0000440400000060800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00004c0000000000800003) TDO (000048a000004040800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000500000000000800003) TDO (00004c0000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000800000000000000003) TDO (0000500000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000840000202000000003) TDO (0000800000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000888000000000000003) TDO (0000840000202000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00008c0000800000000003) TDO (0000888000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000900000000000000003) TDO (00008c0000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000a00000000000000003) TDO (0000900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000a42000002000800003) TDO (0000a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000a80000000000000003) TDO (0000a42000002000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000ac0000002000200003) TDO (0000a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000b00000000000000003) TDO (0000ac0000002000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000c00000000000000003) TDO (0000b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000c40000804000000003) TDO (0000c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000c80000800000000003) TDO (0000c40000804000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000cc0000004000000003) TDO (0000c80000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0000d00000000000000003) TDO (0000cc0000004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001000000000000000003) TDO (0000d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001040000000000000103) TDO (0001000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001080000000000000103) TDO (0001040000000000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (00010c2000000000000103) TDO (0001080000000000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001100000000000000003) TDO (00010c2000000000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001200000000000000003) TDO (0001100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001240000000000000003) TDO (0001200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001280000000004000003) TDO (0001240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00012c0800004000000003) TDO (0001280000000004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001300000000000000003) TDO (00012c0800004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001400000000000000003) TDO (0001300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001440000000000000003) TDO (0001400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001480000000000000003) TDO (0001440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00014ca000000000000003) TDO (0001480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001500000000000000003) TDO (00014ca000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001800000002000000003) TDO (0001500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001840000040000000003) TDO (0001800000002000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001880000000000000003) TDO (0001840000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00018c0000000000000003) TDO (0001880000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001900000240000000003) TDO (00018c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001a00000000004000003) TDO (0001900000240000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001a40000800000000003) TDO (0001a00000000004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001a80000000000000003) TDO (0001a40000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001ac0000000000000003) TDO (0001a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001b00000000000000003) TDO (0001ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001c00000000000000003) TDO (0001b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001c40000000000000003) TDO (0001c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001c80000000000000003) TDO (0001c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001cc0000000000000003) TDO (0001c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0001d00000000000000003) TDO (0001cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002000080000040000003) TDO (0001d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002040080000040000003) TDO (0002000080000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000208c040000000000003) TDO (0002040080000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00020c0400000000000003) TDO (000208c040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002100000000000000003) TDO (00020c0400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002201000000000000003) TDO (0002100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002242000000000000083) TDO (0002201000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002280000000000000003) TDO (0002242000000000000081) ; -RUNTEST 1 TCK; -SDR 82 TDI (00022c0000000000000003) TDO (0002280000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002300000000000000003) TDO (00022c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002400400000000000003) TDO (0002300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002440004000008000003) TDO (0002400400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002480004000008000003) TDO (0002440004000008000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00024c0000000000040003) TDO (0002480004000008000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002500000000000040003) TDO (00024c0000000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002802000000000000003) TDO (0002500000000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002842000040800000003) TDO (0002802000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002880000000800000003) TDO (0002842000040800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00028c2000000800000003) TDO (0002880000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002906400240c00000003) TDO (00028c2000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002a08800000000000083) TDO (0002906400240c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002a49840800800000003) TDO (0002a08800000000000081) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002a89040008800000003) TDO (0002a49840800800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002ac9800008400000003) TDO (0002a89040008800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002b01880008400000003) TDO (0002ac9800008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002c04000001400000003) TDO (0002b01880008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002c46400000800000003) TDO (0002c04000001400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002c8c400001800040003) TDO (0002c46400000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002ccac40001800000003) TDO (0002c8c400001800040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0002d0e400001000000003) TDO (0002ccac40001800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003001008048800040103) TDO (0002d0e400001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003040080000000000003) TDO (0003001008048800040101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003080080004000000303) TDO (0003040080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00030c0080000000000103) TDO (0003080080004000000301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003100000400000000103) TDO (00030c0080000000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003200000040000140103) TDO (0003100000400000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003240000000080000203) TDO (0003200000040000140101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003280000040080000003) TDO (0003240000000080000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00032c0000100480000003) TDO (0003280000040080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003300000000400000003) TDO (00032c0000100480000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003400804000000080003) TDO (0003300000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003440000080080000003) TDO (0003400804000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003480800080080000003) TDO (0003440000080080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00034c0840000080000003) TDO (0003480800080080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003500020001000000003) TDO (00034c0840000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003800000080000000143) TDO (0003500020001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003840000001000000103) TDO (0003800000080000000141) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003880010008800000003) TDO (0003840000001000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (00038c0004001480000303) TDO (0003880010008800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003900010008800000103) TDO (00038c0004001480000301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003a00000000410000003) TDO (0003900010008800000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003a40000108000000103) TDO (0003a00000000410000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003a80040100c00000103) TDO (0003a40000108000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003ac0000000000000003) TDO (0003a80040100c00000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003b00004001000000003) TDO (0003ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003c00040000000000003) TDO (0003b00004001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003c40080009000000003) TDO (0003c00040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003c800c4000000000003) TDO (0003c40080009000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003cc0080008000000083) TDO (0003c800c4000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0003d00080000000000003) TDO (0003cc0080008000000081) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004000000040000500023) TDO (0003d00080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004040000400000500003) TDO (0004000000040000500021) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004084000000040d00003) TDO (0004040000400000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00040c4400000000e00003) TDO (0004084000000040d00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004100800000000e00003) TDO (00040c4400000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004201000040000280007) TDO (0004100800000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004240000080000280003) TDO (0004201000040000280005) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004280000000000280003) TDO (0004240000080000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00042c0000000000080003) TDO (0004280000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004300000000000000003) TDO (00042c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004400420000000000007) TDO (0004300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004448000080000080003) TDO (0004400420000000000005) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004480800080000080003) TDO (0004448000080000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00044c0000000000080003) TDO (0004480800080000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004501000000000080003) TDO (00044c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004800000000000000003) TDO (0004501000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004840000080000000003) TDO (0004800000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004888000080000000003) TDO (0004840000080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00048c0000400000000003) TDO (0004888000080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004902000000000000003) TDO (00048c0000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004a00040080000000003) TDO (0004902000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004a42000100000000003) TDO (0004a00040080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004a84000140000000003) TDO (0004a42000100000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004ac4000100000000003) TDO (0004a84000140000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004b00800000000000003) TDO (0004ac4000100000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004c00000000400000003) TDO (0004b00800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004c40000000000000003) TDO (0004c00000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004c80000000000000003) TDO (0004c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004cc0800000000000003) TDO (0004c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0004d0a000000000000003) TDO (0004cc0800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005000000440000000003) TDO (0004d0a000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005040000000000000003) TDO (0005000000440000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005080000000000000003) TDO (0005040000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00050c0000000000080003) TDO (0005080000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005100000000000000003) TDO (00050c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005200000040000000003) TDO (0005100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005240000080080000003) TDO (0005200000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005280000000080000003) TDO (0005240000080080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00052c0000000080000003) TDO (0005280000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005300000000000000003) TDO (00052c0000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005400000000000000003) TDO (0005300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005440004080080000003) TDO (0005400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005480004080080000003) TDO (0005440004080080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00054c0000000080000003) TDO (0005480004080080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005500000000000000003) TDO (00054c0000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005800000000000f00003) TDO (0005500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005840000080000f00003) TDO (0005800000000000f00001) MASK (03fffcfcfcfcfcfcfcfcff) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005880000080000f00003) TDO (0005840000080000f00001) MASK (03ffffffffffffffffffff) ; -RUNTEST 1 TCK; -SDR 82 TDI (00058c0000400000e00003) TDO (0005880000080000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005900000000000e00003) TDO (00058c0000400000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005a00000080000280003) TDO (0005900000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005a40000100010a80003) TDO (0005a00000080000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005a80000140000a80003) TDO (0005a40000100010a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005ac0000100000680003) TDO (0005a80000140000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005b00000000000700003) TDO (0005ac0000100000680001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005c00000080400000003) TDO (0005b00000000000700001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005c40000000000880003) TDO (0005c00000080400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005c80000000000880003) TDO (0005c40000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005cc0000000000880003) TDO (0005c80000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0005d00000000000880003) TDO (0005cc0000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006000303010301120313) TDO (0005d00000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006050203020300420303) TDO (0006000303010301120311) ; -RUNTEST 1 TCK; -SDR 82 TDI (00060a0303010301520303) TDO (0006050203020300420301) ; -RUNTEST 1 TCK; -SDR 82 TDI (00060d0303030300020303) TDO (00060a0303010301520301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006120303010301c20303) TDO (00060d0303030300020301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006210103030302030303) TDO (0006120303010301c20301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006260103020300230303) TDO (0006210103030302030301) ; -RUNTEST 1 TCK; -SDR 82 TDI (00062803030103022b0303) TDO (0006260103020300230301) ; -RUNTEST 1 TCK; -SDR 82 TDI (00062f0103000303090303) TDO (00062803030103022b0301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006300000000000000003) TDO (00062f0103000303090301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006400000000020000003) TDO (0006300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006440004000000000003) TDO (0006400000000020000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006480004000000000003) TDO (0006440004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00064c4000000000080003) TDO (0006480004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006500000000000080003) TDO (00064c4000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006830000020002400003) TDO (0006500000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006860100010003100003) TDO (0006830000020002400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006890000020000800003) TDO (0006860100010003100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00068e0000000003e00003) TDO (0006890000020000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006910000020002200003) TDO (00068e0000000003e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006a20200000001280003) TDO (0006910000020002200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006a50200010003880003) TDO (0006a20200000001280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006ab0000060001800003) TDO (0006a50200010003880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006ac0200030000200003) TDO (0006ab0000060001800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006b00000000000200003) TDO (0006ac0200030000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006c00000000400000003) TDO (0006b00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006c40000000000080003) TDO (0006c00000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006c80000000000080003) TDO (0006c40000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006cc0000000000000003) TDO (0006c80000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0006d00000000000000003) TDO (0006cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007000302010001004043) TDO (0006d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007040203020100000003) TDO (0007000302010001004041) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007080103000201000003) TDO (0007040203020100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00070d0303034200000003) TDO (0007080103000201000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007120103000301000003) TDO (00070d0303034200000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007200101020302000003) TDO (0007120103000301000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007260103020200040003) TDO (0007200101020302000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007280301010300000203) TDO (0007260103020200040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00072f0003000301000203) TDO (0007280301010300000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007300000000000000003) TDO (00072f0003000301000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007400000000000802003) TDO (0007300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007440000000000000003) TDO (0007400000000000802001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007480000000000000003) TDO (0007440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00074c0000000000000083) TDO (0007480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007500000000000000003) TDO (00074c0000000000000081) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007830001020002000003) TDO (0007500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007870103010003000003) TDO (0007830001020002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00078b0202030000000003) TDO (0007870103010003000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00078e1000000003000003) TDO (00078b0202030000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007910200030002000003) TDO (00078e1000000003000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007a30202010001000003) TDO (0007910200030002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007a40208010003000003) TDO (0007a30202010001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007ab0002060003000003) TDO (0007a40208010003000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007ac0301030002000003) TDO (0007ab0002060003000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007b00000000000000003) TDO (0007ac0301030002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007c00000000000000003) TDO (0007b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007c40000000000000003) TDO (0007c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007c80000000000000003) TDO (0007c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007cc4000000000000003) TDO (0007c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0007d00000000000000003) TDO (0007cc4000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000800030601004100000b) TDO (0007d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008040017000100000003) TDO (0008000306010041000009) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008080107800001000003) TDO (0008040017000100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00080d1313030200000003) TDO (0008080107800001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008120085000201000003) TDO (00080d1313030200000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008200001000322000003) TDO (0008120085000201000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008260143020040000003) TDO (0008200001000322000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008280301010280000003) TDO (0008260143020040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00082f0007000201000003) TDO (0008280301010280000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008300000000000000003) TDO (00082f0007000201000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008400080000008000003) TDO (0008300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008440044000048000003) TDO (0008400080000008000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008480000000088000003) TDO (0008440044000048000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00084c0000000000000003) TDO (0008480000000088000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008500000000000000003) TDO (00084c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008830009000002300007) TDO (0008500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008850380030003300003) TDO (0008830009000002300005) ; -RUNTEST 1 TCK; -SDR 82 TDI (00088b0280130000300003) TDO (0008850380030003300001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00088e0080000223200003) TDO (00088b0280130000300001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008910200030002200003) TDO (00088e0080000223200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008a302000300c1200043) TDO (0008910200030002200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008a40200010003300003) TDO (0008a302000300c1200041) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008ab0000020003300003) TDO (0008a40200010003300001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008ac0300030002100003) TDO (0008ab0000020003300001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008b00000000000100003) TDO (0008ac0300030002100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008c000040000d0101003) TDO (0008b00000000000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008c40000000000100003) TDO (0008c000040000d0101001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008c80000040000100003) TDO (0008c40000000000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008cc4040004000100003) TDO (0008c80000040000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0008d00020000000100003) TDO (0008cc4040004000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009000302010201000003) TDO (0008d00020000000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009040006000000000003) TDO (0009000302010201000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000908000c080001000003) TDO (0009040006000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00090d1216038000000003) TDO (000908000c080001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000912001400d001000003) TDO (00090d1216038000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009220000008002000203) TDO (000912001400d001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009250102028e08800203) TDO (0009220000008002000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009280321110e00800003) TDO (0009250102028e08800201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00092f0003000201200203) TDO (0009280321110e00800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009300010008000200003) TDO (00092f0003000201200201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009400000000000000003) TDO (0009300010008000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009440040001000000003) TDO (0009400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009480050080000000003) TDO (0009440040001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00094c00a0000c00000003) TDO (0009480050080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009500080000000000003) TDO (00094c00a0000c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009830005080202000003) TDO (0009500080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009850118038003000003) TDO (0009830005080202000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00098b0310439000000003) TDO (0009850118038003000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00098e0000001803000003) TDO (00098b0310439000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00099100a0020802000003) TDO (00098e0000001803000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009a30200130401000203) TDO (00099100a0020802000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009a50200010202000283) TDO (0009a30200130401000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009ab00000a0001000003) TDO (0009a50200010202000281) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009ac0210038002000203) TDO (0009ab00000a0001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009b00000004000000003) TDO (0009ac0210038002000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009c000c0088000000003) TDO (0009b00000004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009c40090008000000003) TDO (0009c000c0088000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009c800a0000800000003) TDO (0009c40090008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009cc4000000000000003) TDO (0009c800a0000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0009d00000008000500003) TDO (0009cc4000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a000302090000100003) TDO (0009d00000008000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a040000000000400003) TDO (000a000302090000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a080000400001500003) TDO (000a040000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a0d0202030000000003) TDO (000a080000400001500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a120000000000c00003) TDO (000a0d0202030000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a200000100002000003) TDO (000a120000000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a240102020000200003) TDO (000a200000100002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a280100090000280003) TDO (000a240102020000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a2f0002000001080003) TDO (000a280100090000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a300000000000000003) TDO (000a2f0002000001080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a400000080000000003) TDO (000a300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a440000000000000003) TDO (000a400000080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a480000000000000003) TDO (000a440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a4c0000000000080003) TDO (000a480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a500000000000080003) TDO (000a4c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a830001000003400003) TDO (000a500000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a850100090003100003) TDO (000a830001000003400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a8b0300020000800003) TDO (000a850100090003100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a8e0000000003e00003) TDO (000a8b0300020000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000a910000020003200003) TDO (000a8e0000000003e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000aa20000000001280003) TDO (000a910000020003200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000aa40200110002880003) TDO (000aa20000000001280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000aab0200020001800003) TDO (000aa40200110002880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000aac0200032002200003) TDO (000aab0200020001800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ab00000000000200003) TDO (000aac0200032002200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ac00000000000000003) TDO (000ab00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ac40000080000080003) TDO (000ac00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ac80000000000080003) TDO (000ac40000080000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000acc4000000000000003) TDO (000ac80000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ad00000000000000003) TDO (000acc4000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b000104001001001103) TDO (000ad00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b040006011a00000003) TDO (000b000104001001001101) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b080004001e01000003) TDO (000b040006011a00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b0d0306021c00000003) TDO (000b080004001e01000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b130003001c01000003) TDO (000b0d0306021c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b210001010400001003) TDO (000b130003001c01000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b270042000c00000003) TDO (000b210001010400001001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b290240008c06000003) TDO (000b270042000c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b2f0005009500020003) TDO (000b290240008c06000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b300084009400000003) TDO (000b2f0005009500020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b400000001000000003) TDO (000b300084009400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b440000001800000003) TDO (000b400000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b480080009800000003) TDO (000b440000001800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b4c00c0009800000003) TDO (000b480080009800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b500000009000000003) TDO (000b4c00c0009800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b800100010001000003) TDO (000b500000009000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b840040000000000003) TDO (000b800100010001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b8a0000020001000003) TDO (000b840040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b8d0200260000000003) TDO (000b8a0000020001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000b920000000000000003) TDO (000b8d0200260000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ba00000000002000003) TDO (000b920000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ba40082000000000003) TDO (000ba00000000002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ba90200010000000003) TDO (000ba40082000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000baf0000000001000003) TDO (000ba90200010000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000bb00000000000000003) TDO (000baf0000000001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000bc00000000000000003) TDO (000bb00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000bc40000400000000003) TDO (000bc00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000bc80000000000000003) TDO (000bc40000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000bcc4000000000000003) TDO (000bc80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000bd00000800000000003) TDO (000bcc4000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c001300010040000003) TDO (000bd00000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c040100018440000003) TDO (000c001300010040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c080000008001000003) TDO (000c040100018440000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c0d0200038800000003) TDO (000c080000008001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c130000028801000003) TDO (000c0d0200038800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c200000000002000003) TDO (000c130000028801000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c240002000800000003) TDO (000c200000000002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c280100011800000003) TDO (000c240002000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c2f0002010001000003) TDO (000c280100011800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c300000000000000003) TDO (000c2f0002010001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c400000400000000003) TDO (000c300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c440000000000000003) TDO (000c400000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c480000000000000003) TDO (000c440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c4c0000000000000003) TDO (000c480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c500000000000000003) TDO (000c4c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c830001020422000003) TDO (000c500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c850300010802000003) TDO (000c830001020422000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c880100010800000003) TDO (000c850300010802000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c8c0000000001000083) TDO (000c880100010800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000c910200030001000003) TDO (000c8c0000000001000081) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ca30000020001000003) TDO (000c910200030001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ca40000001002000003) TDO (000ca30000020001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ca80002000002000003) TDO (000ca40000001002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000cac0100010000000003) TDO (000ca80002000002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000cb00000000400000003) TDO (000cac0100010000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000cc00000000000000003) TDO (000cb00000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000cc40008000000000003) TDO (000cc00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000cc80000000000000003) TDO (000cc40008000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ccc0000001000000043) TDO (000cc80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000cd00000000000000003) TDO (000ccc0000001000000041) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d000703010301c20303) TDO (000cd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d054703034300c20303) TDO (000d000703010301c20301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d0a0303030301c20303) TDO (000d054703034300c20301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d0d0303030300c20303) TDO (000d0a0303030301c20301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d130303030301c20303) TDO (000d0d0303030300c20301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d230103030306430303) TDO (000d130303030301c20301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d270103020304c30303) TDO (000d230103030306430301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d290303010302c30303) TDO (000d270103020304c30301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d2f0103010303430303) TDO (000d290303010302c30301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d304000000000400003) TDO (000d2f0103010303430301) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d400000000000400003) TDO (000d304000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d440000000000400083) TDO (000d400000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d480000000000400003) TDO (000d440000000000400081) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d4c0000000000400003) TDO (000d480000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d500000000000400003) TDO (000d4c0000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d802000000000000003) TDO (000d500000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d842000000000000003) TDO (000d802000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d882c00000000000003) TDO (000d842000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d8c2c00000000000003) TDO (000d882c00000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000d902c00000000000003) TDO (000d8c2c00000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000da09800000000000003) TDO (000d902c00000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000da49800000000000003) TDO (000da09800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000da89800000000000003) TDO (000da49800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000dac9c00000000000003) TDO (000da89800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000db09c00000000000003) TDO (000dac9c00000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000dc08400000000000083) TDO (000db09c00000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000dc48404000000000003) TDO (000dc08400000000000081) ; -RUNTEST 1 TCK; -SDR 82 TDI (000dc89404000000000003) TDO (000dc48404000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000dcc9400000000000003) TDO (000dc89404000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000dd09400000000000003) TDO (000dcc9400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e002000000040000003) TDO (000dd09400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e042018000040000003) TDO (000e002000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e08e018000000000003) TDO (000e042018000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e0c6410000000000003) TDO (000e08e018000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e106cb4000000000003) TDO (000e0c6410000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e209800000000000003) TDO (000e106cb4000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e24b800000000000003) TDO (000e209800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e289820000000000003) TDO (000e24b800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e2c9800000000000003) TDO (000e289820000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e309800000000000003) TDO (000e2c9800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e4044c0000000000003) TDO (000e309800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e44e4d0000000000003) TDO (000e4044c0000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e48ec50000000000003) TDO (000e44e4d0000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e4cac00000000000003) TDO (000e48ec50000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e50f480000000000003) TDO (000e4cac00000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e804060000000c00003) TDO (000e50f480000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e840000000000c00003) TDO (000e804060000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e880000000000c00003) TDO (000e840000000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e8c0000000000c00003) TDO (000e880000000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000e900000000000c00003) TDO (000e8c0000000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ea00010000000400003) TDO (000e900000000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ea44000000000400003) TDO (000ea00010000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ea80000000000400003) TDO (000ea44000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000eac0004000000400003) TDO (000ea80000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000eb00004000000400003) TDO (000eac0004000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ec00000000008400003) TDO (000eb00004000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ec40000004000400083) TDO (000ec00000000008400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ec80000000000400003) TDO (000ec40000004000400081) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ecc0000000000400003) TDO (000ec80000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000ed00000000000400003) TDO (000ecc0000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f000000000000000003) TDO (000ed00000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f050300038300000003) TDO (000f000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f0a0200028000000003) TDO (000f050300038300000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f0c0000008000000003) TDO (000f0a0200028000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f110302038100000003) TDO (000f0c0000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f230102038100000003) TDO (000f110302038100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f240000008000800003) TDO (000f230102038100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f290102000002800003) TDO (000f240000008000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f2c0100010001200003) TDO (000f290102000002800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f300000000000200003) TDO (000f2c0100010001200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f400000008000000003) TDO (000f300000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f440000008000000003) TDO (000f400000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f480000000000000003) TDO (000f440000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f4c0000000000000003) TDO (000f480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f500000000000000003) TDO (000f4c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f800000008000000003) TDO (000f500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f840000000880000003) TDO (000f800000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f880000240800000003) TDO (000f840000000880000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f8c0000000800000003) TDO (000f880000240800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000f900000800800000003) TDO (000f8c0000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fa00000000000000003) TDO (000f900000800800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fa40000000800000003) TDO (000fa00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fa80000000800000003) TDO (000fa40000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fac0000000000000003) TDO (000fa80000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fb00000000000000003) TDO (000fac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fc00000000000000803) TDO (000fb00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fc40000000000500003) TDO (000fc00000000000000801) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fc80000001000000003) TDO (000fc40000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fcc0000800000000003) TDO (000fc80000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (000fd00000000000000003) TDO (000fcc0000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010000200200400000003) TDO (000fd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010050300138200000003) TDO (0010000200200400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00100a0200128400000003) TDO (0010050300138200000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00100c2000008c00000003) TDO (00100a0200128400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010110300028c00000203) TDO (00100c2000008c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010210102038500000003) TDO (0010110300028c00000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010240000008c00000003) TDO (0010210102038500000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010290100009c82000003) TDO (0010240000008c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00102c0900218480000003) TDO (0010290100009c82000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010300000008000080003) TDO (00102c0900218480000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010400000808000000003) TDO (0010300000008000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010440000048000000003) TDO (0010400000808000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010480000048000000003) TDO (0010440000048000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00104ca000108000000003) TDO (0010480000048000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010500000008000000003) TDO (00104ca000108000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010800100810301700313) TDO (0010500000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010840000240c00d00203) TDO (0010800100810301700311) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010880100250b01f00203) TDO (0010840000240c00d00201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00108d0300a70300e00303) TDO (0010880100250b01f00201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010920002a50201e00103) TDO (00108d0300a70300e00301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010a20000a01282292303) TDO (0010920002a50201e00101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010a70100820380a80303) TDO (0010a20000a01282292301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010a80200010300a80103) TDO (0010a70100820380a80301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010af00000003032a0303) TDO (0010a80200010300a80101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010b00000000000600003) TDO (0010af00000003032a0301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010c00000340000000003) TDO (0010b00000000000600001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010c40000c00000080003) TDO (0010c00000340000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010c80000800000880003) TDO (0010c40000c00000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010cc0000801000080003) TDO (0010c80000800000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0010d00000800000880003) TDO (0010cc0000801000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011000003000000020003) TDO (0010d00000800000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011040403000100000103) TDO (0011000003000000020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011080003000000020103) TDO (0011040403000100000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (00110c0003000000020003) TDO (0011080003000000020101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011100401000100020003) TDO (00110c0003000000020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011200001000000020003) TDO (0011100401000100020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011240003000000030003) TDO (0011200001000000020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011280003000080030203) TDO (0011240003000000030001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00112c0003000080010003) TDO (0011280003000080030201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011300000000000000003) TDO (00112c0003000080010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011408000000000000003) TDO (0011300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011440004000080000003) TDO (0011408000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011480004000000000003) TDO (0011440004000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00114c0000000000000003) TDO (0011480004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011500000000000000003) TDO (00114c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011800400000000000003) TDO (0011500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011840002000000020003) TDO (0011800400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011880002000000000103) TDO (0011840002000000020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00118c0000000000020103) TDO (0011880002000000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011900000010000000003) TDO (00118c0000000000020101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011a00000200000000003) TDO (0011900000010000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011a40000000080000003) TDO (0011a00000200000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011a80002200000030003) TDO (0011a40000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011ac0001200000010003) TDO (0011a80002200000030001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011b00400000000000003) TDO (0011ac0001200000010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011c00000000400000003) TDO (0011b00400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011c40000000000000003) TDO (0011c00000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011c80000000080000003) TDO (0011c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011cc0000000080000003) TDO (0011c80000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0011d00000000000000003) TDO (0011cc0000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012000000000000000003) TDO (0011d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012040000000000000003) TDO (0012000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012080000000000000003) TDO (0012040000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00120c0000000000000003) TDO (0012080000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012100000000000000003) TDO (00120c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012200000000000000003) TDO (0012100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012240000000040000003) TDO (0012200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012280000000040000003) TDO (0012240000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00122c0000000000000003) TDO (0012280000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012300000000000000003) TDO (00122c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012400000000000000003) TDO (0012300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012440004000060000003) TDO (0012400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012480004000040000003) TDO (0012440004000060000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00124c0000000000000003) TDO (0012480004000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012500000000000000003) TDO (00124c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012800000000204000003) TDO (0012500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012840000000000000003) TDO (0012800000000204000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012880000000000000003) TDO (0012840000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00128c0000000000000003) TDO (0012880000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012900000000000000003) TDO (00128c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012a20000000000000203) TDO (0012900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012a50000000200000203) TDO (0012a20000000000000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012a80000000000000003) TDO (0012a50000000200000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012ac0000000000000203) TDO (0012a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012b00000000000000003) TDO (0012ac0000000000000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012c00000000004000003) TDO (0012b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012c40000000000000003) TDO (0012c00000000004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012c80000000000000003) TDO (0012c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012cc0000000000000003) TDO (0012c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0012d00000000000000003) TDO (0012cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013000000000040000003) TDO (0012d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013040000000040000003) TDO (0013000000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013080000000000000003) TDO (0013040000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00130c0000000000000003) TDO (0013080000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013100000000000080003) TDO (00130c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013200000000000000003) TDO (0013100000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013240000000000000003) TDO (0013200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013280000004000000003) TDO (0013240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00132c0000000000000003) TDO (0013280000004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013300000000000040003) TDO (00132c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013400000000000000003) TDO (0013300000000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013440000002400000003) TDO (0013400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013480000000400000003) TDO (0013440000002400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00134c0000000400000003) TDO (0013480000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013500000000000000003) TDO (00134c0000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013800002000100f00003) TDO (0013500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013840001000000f00003) TDO (0013800002000100f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013880100010101f40003) TDO (0013840001000000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00138c0201010300e00003) TDO (0013880100010101f40001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013900000000200e00103) TDO (00138c0201010300e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013a00001000200280103) TDO (0013900000000200e00101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013a40100020100e80003) TDO (0013a00001000200280101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013a80201000200b80003) TDO (0013a40100020100e80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013ae00020002006a0003) TDO (0013a80201000200b80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013b00000000000700003) TDO (0013ae00020002006a0001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013c00000000000000003) TDO (0013b00000000000700001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013c40000000008880003) TDO (0013c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013c80000000000880003) TDO (0013c40000000008880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013cc0000000000880003) TDO (0013c80000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0013d00004000000880003) TDO (0013cc0000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014000000000000000003) TDO (0013d00004000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014040000000000000003) TDO (0014000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014080080000000000003) TDO (0014040000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00140c0040000000000003) TDO (0014080080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014100000000000000003) TDO (00140c0040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014200000000000000003) TDO (0014100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014240000000000000003) TDO (0014200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014280080000000000003) TDO (0014240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00142c0000000000000003) TDO (0014280080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014300000000000000003) TDO (00142c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014400000000000000003) TDO (0014300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014440004000000000003) TDO (0014400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014480004000000000003) TDO (0014440004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00144c0000000000000003) TDO (0014480004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014500000000000000003) TDO (00144c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014800000000000000003) TDO (0014500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014840000000800000003) TDO (0014800000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014880000000800000003) TDO (0014840000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00148c0000000800000003) TDO (0014880000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014900000000c00000003) TDO (00148c0000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014a00000000000000003) TDO (0014900000000c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014a40040000800000003) TDO (0014a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014a80040008800000003) TDO (0014a40040000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014ac0000008400000003) TDO (0014a80040008800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014b00080008400000003) TDO (0014ac0000008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014c00000001400000003) TDO (0014b00080008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014c40000000800000003) TDO (0014c00000001400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014c80000001800000003) TDO (0014c40000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014cc0040001800000003) TDO (0014c80000001800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0014d00000001000000003) TDO (0014cc0040001800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015000000000000080003) TDO (0014d00000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015040000000100000003) TDO (0015000000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015080000000000000003) TDO (0015040000000100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00150c0000000000000003) TDO (0015080000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015100002000000000003) TDO (00150c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015228000000008000003) TDO (0015100002000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015240000000000000003) TDO (0015228000000008000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015281000000000000003) TDO (0015240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00152c0000200000000003) TDO (0015281000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015300000000000000003) TDO (00152c0000200000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015404000000000000003) TDO (0015300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015440000000000000003) TDO (0015404000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015480400002000000003) TDO (0015440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00154c0000100000000003) TDO (0015480400002000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015500000000000000003) TDO (00154c0000100000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015800000000000f00003) TDO (0015500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015840000000000f00003) TDO (0015800000000000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015880000000000f00003) TDO (0015840000000000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00158c0000000000e00003) TDO (0015880000000000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015900000000000e00003) TDO (00158c0000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015a00400000000280003) TDO (0015900000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015a40020000000a80003) TDO (0015a00400000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015a80000000000a80003) TDO (0015a40020000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015ac0000000000680003) TDO (0015a80000000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015b00000000000700003) TDO (0015ac0000000000680001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015c00000000000000003) TDO (0015b00000000000700001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015c40000000000880003) TDO (0015c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015c80000000000880003) TDO (0015c40000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015cc0000000000880003) TDO (0015c80000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0015d00000000000880003) TDO (0015cc0000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016000000000000100003) TDO (0015d00000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016050303030300400003) TDO (0016000000000000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00160a0202020000500003) TDO (0016050303030300400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00160c0000000000000003) TDO (00160a0202020000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016110302030100c00003) TDO (00160c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016230102030100000003) TDO (0016110302030100c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016240000000000200003) TDO (0016230102030100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016290102000002280003) TDO (0016240000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00162c0101010001080003) TDO (0016290102000002280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016300000000000000003) TDO (00162c0101010001080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016400000000000000003) TDO (0016300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016440000000000000003) TDO (0016400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016480000000000000003) TDO (0016440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00164c0000000000080003) TDO (0016480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016500000000000080003) TDO (00164c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016830303030303420303) TDO (0016500000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016870303030303120303) TDO (0016830303030303420301) ; -RUNTEST 1 TCK; -SDR 82 TDI (00168b0303030301820303) TDO (0016870303030303120301) ; -RUNTEST 1 TCK; -SDR 82 TDI (00168f0303030303e20303) TDO (00168b0303030301820301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016930303030303220303) TDO (00168f0303030303e20301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016a303030303032b0303) TDO (0016930303030303220301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016a703030303038b0303) TDO (0016a303030303032b0301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016ab0303030303830303) TDO (0016a703030303038b0301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016af0303030303210303) TDO (0016ab0303030303830301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016b00000000000200003) TDO (0016af0303030303210301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016c00000000000000003) TDO (0016b00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016c40000000000080003) TDO (0016c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016c80000004000080003) TDO (0016c40000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016cc0000000000000003) TDO (0016c80000004000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0016d00000000000000003) TDO (0016cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017030303030003588003) TDO (0016d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017070303030103580003) TDO (0017030303030003588001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00170b0303070201d80003) TDO (0017070303030103580001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00170f0303070203e80003) TDO (00170b0303070201d80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017130303070303ec0003) TDO (00170f0303070203e80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017230303030303288003) TDO (0017130303070303ec0001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017260303030203280003) TDO (0017230303030303288001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00172b03030303032c0203) TDO (0017260303030203280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00172f03030303030c0203) TDO (00172b03030303032c0201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00173000000000000c0003) TDO (00172f03030303030c0201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017400000000000000003) TDO (00173000000000000c0001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017440000000400080003) TDO (0017400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017480000800008080003) TDO (0017440000000400080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00174c0000000000080003) TDO (0017480000800008080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00175000000000000c0003) TDO (00174c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017830303010003000003) TDO (00175000000000000c0001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017850303070103040003) TDO (0017830303010003000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00178b2303030001000003) TDO (0017850303070103040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00178f0303030203000003) TDO (00178b2303030001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017930201030203000003) TDO (00178f0303030203000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017a30201030303400003) TDO (0017930201030203000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017a60303030003900003) TDO (0017a30201030303400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017ab0b01034203800003) TDO (0017a60303030003900001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017af0303030203200003) TDO (0017ab0b01034203800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017b08000000000200003) TDO (0017af0303030203200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017c00000000000000003) TDO (0017b08000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017c40000800000000003) TDO (0017c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017c82000000400000003) TDO (0017c40000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017cc0000800000000003) TDO (0017c82000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0017d00000800000000003) TDO (0017cc0000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018030303010203900003) TDO (0017d00000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001805013e038003a00003) TDO (0018030303010203900001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00180b0310038001f00003) TDO (001805013e038003a00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00180f0202030803a00003) TDO (00180b0310038001f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00181300a0025803a00003) TDO (00180f0202030803a00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018230200030003000203) TDO (00181300a0025803a00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018250302030602080203) TDO (0018230200030003000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00182b0301030601040003) TDO (0018250302030602080201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00182f02030302030c0203) TDO (00182b0301030601040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018300010008000000003) TDO (00182f02030302030c0201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00184000c000a000000003) TDO (0018300010008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018440090009400000003) TDO (00184000c000a000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018480000000000080003) TDO (0018440090009400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00184c00a0000c00800003) TDO (0018480000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018500000000000880003) TDO (00184c00a0000c00800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018830307011043600003) TDO (0018500000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018850100011043500003) TDO (0018830307011043600001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00188b0308021001040003) TDO (0018850100011043500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00188f0212039003440003) TDO (00188b0308021001040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018930014028003440003) TDO (00188f0212039003440001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018a20000008403280003) TDO (0018930014028003440001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018a40302038802e00003) TDO (0018a20000008403280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018ab0330038801f80003) TDO (0018a40302038802e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018af0212038003700003) TDO (0018ab0330038801f80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018b00000004000700003) TDO (0018af0212038003700001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018c00000000000000003) TDO (0018b00000004000700001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018c40060000808880003) TDO (0018c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018c800f0008c08800003) TDO (0018c40060000808880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018cc0000008000080003) TDO (0018c800f0008c08800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0018d00080008000000003) TDO (0018cc0000008000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019004100000101000003) TDO (0018d00080008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019054101010000000003) TDO (0019004100000101000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019094001000100000003) TDO (0019054101010000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00190c4000000000000303) TDO (0019094001000100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019104101010101000003) TDO (00190c4000000000000301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019200000000000000003) TDO (0019104101010101000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019244000000000000003) TDO (0019200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019284000000000000003) TDO (0019244000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00192c4000000000000003) TDO (0019284000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019304000000000000003) TDO (00192c4000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019404000000000000003) TDO (0019304000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019446000000000000003) TDO (0019404000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019486000000000000003) TDO (0019446000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00194c2000000000000003) TDO (0019486000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019506000000000000003) TDO (00194c2000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019830000030302000003) TDO (0019506000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019860000020202000003) TDO (0019830000030302000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00198b0800030302020003) TDO (0019860000020202000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00198c0000000000000003) TDO (00198b0800030302020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019900001000100020003) TDO (00198c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019a00000000000000003) TDO (0019900001000100020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019a40000000000000003) TDO (0019a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019a80000000000000003) TDO (0019a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019ac0400000000000003) TDO (0019a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019b00000000000000003) TDO (0019ac0400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019c00000000000000003) TDO (0019b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019c40000000000000003) TDO (0019c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019c81000000000000003) TDO (0019c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019cc0000000000000003) TDO (0019c81000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0019d00000000000000003) TDO (0019cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a000300010001000003) TDO (0019d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a050202000100000103) TDO (001a000300010001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a090102010100000103) TDO (001a050202000100000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a0c0000000000000003) TDO (001a090102010100000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a100303010001000103) TDO (001a0c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a202000000000000003) TDO (001a100303010001000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a242000000000800003) TDO (001a202000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a280000000000800003) TDO (001a242000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a2c0000000000200003) TDO (001a280000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a300000000000200003) TDO (001a2c0000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a400000000000000003) TDO (001a300000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a440000000010000003) TDO (001a400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a480000000080000003) TDO (001a440000000010000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a4c0000000080000003) TDO (001a480000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a500000000000000003) TDO (001a4c0000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a820000000100000103) TDO (001a500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a870203020100000103) TDO (001a820000000100000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a8a0203000100000103) TDO (001a870203020100000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a8c0000000000000003) TDO (001a8a0203000100000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001a930103010101000103) TDO (001a8c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001aa00000000000000003) TDO (001a930103010101000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001aa40000000000000003) TDO (001aa00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001aa80000000000000003) TDO (001aa40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001aac0000000000000003) TDO (001aa80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ab00000000000000003) TDO (001aac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ac00000000080500003) TDO (001ab00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ac40000000080000003) TDO (001ac00000000080500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ac80000000000000003) TDO (001ac40000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001acc0000000000000003) TDO (001ac80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ad00000000000000003) TDO (001acc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b000100000303000103) TDO (001ad00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b050001000000000003) TDO (001b000100000303000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b090301000202000003) TDO (001b050001000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b0c0000000000000003) TDO (001b090301000202000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b100001010203000003) TDO (001b0c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b200000000000000003) TDO (001b100001010203000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b240000000000000003) TDO (001b200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b280000000000000003) TDO (001b240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b2c0000000000000003) TDO (001b280000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b300000000000000003) TDO (001b2c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b4000000000000000c3) TDO (001b300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b440000000000000003) TDO (001b4000000000000000c1) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b480000000000000003) TDO (001b440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b4c0000000000000003) TDO (001b480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b500000000000000003) TDO (001b4c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b800000000001000003) TDO (001b500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b840003000000000003) TDO (001b800000000001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b880003000301000003) TDO (001b840003000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b8c0000000000000003) TDO (001b880003000301000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001b900103010300000003) TDO (001b8c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ba00000000000000003) TDO (001b900103010300000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ba40000000000000003) TDO (001ba00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ba80000000000000003) TDO (001ba40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001bac0000000000000003) TDO (001ba80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001bb00000000000000003) TDO (001bac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001bc00000000000000003) TDO (001bb00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001bc40000000000000003) TDO (001bc00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001bc80000000000000003) TDO (001bc40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001bcc0000000000000003) TDO (001bc80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001bd00000000000000003) TDO (001bcc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c011100010200f00103) TDO (001bd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c050000000000f00103) TDO (001c011100010200f00101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c090101010201f00003) TDO (001c050000000000f00101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c0e0000020002e00003) TDO (001c090101010201f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c110101010300e00303) TDO (001c0e0000020002e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c200000000000a80003) TDO (001c110101010300e00301) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c240000000000280003) TDO (001c200000000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c280000000000280003) TDO (001c240000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c2c0000000000480003) TDO (001c280000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c300000000000500003) TDO (001c2c0000000000480001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c408800000000000003) TDO (001c300000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c440000000000880003) TDO (001c408800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c480000000000880003) TDO (001c440000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c4c00000000008c0003) TDO (001c480000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c500000000000880003) TDO (001c4c00000000008c0001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c820100030203002103) TDO (001c500000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c842000020000010003) TDO (001c820100030203002101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c8a0101010203000103) TDO (001c842000020000010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c8c0000000000000003) TDO (001c8a0101010203000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001c930001010201000103) TDO (001c8c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ca00000000000000003) TDO (001c930001010201000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ca40800004000000003) TDO (001ca00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ca80000000000000003) TDO (001ca40800004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001cac0000000000000003) TDO (001ca80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001cb00400000000000003) TDO (001cac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001cc00000000808000003) TDO (001cb00400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001cc42000000008000003) TDO (001cc00000000808000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001cc80000000008040003) TDO (001cc42000000008000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ccc0000000000000003) TDO (001cc80000000008040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001cd00000000000000003) TDO (001ccc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d000040440201010003) TDO (001cd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d040050410000010003) TDO (001d000040440201010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d080051000200010003) TDO (001d040050410000010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d0c0150000100000103) TDO (001d080051000200010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d110051400201010003) TDO (001d0c0150000100000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d200000040000000003) TDO (001d110051400201010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d240004000000000003) TDO (001d200000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d280000000000000003) TDO (001d240004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d2c0000100000000003) TDO (001d280000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d300000000000000003) TDO (001d2c0000100000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d400000000000000003) TDO (001d300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d440020080000000003) TDO (001d400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d480020080000000003) TDO (001d440020080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d4c0020000000000003) TDO (001d480020080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d500020000000000003) TDO (001d4c0020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d820110010003000003) TDO (001d500020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d8400000a0101000103) TDO (001d820110010003000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d8a01010b0102000103) TDO (001d8400000a0101000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d8c0000400000000003) TDO (001d8a01010b0102000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001d930301010303000103) TDO (001d8c0000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001da00084000000000003) TDO (001d930301010303000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001da40040100000000003) TDO (001da00084000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001da80040140000000003) TDO (001da40040100000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001dac0000000000000003) TDO (001da80040140000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001db00000000000000003) TDO (001dac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001dc00000000000000003) TDO (001db00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001dc40000000000000003) TDO (001dc00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001dc80000000000000003) TDO (001dc40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001dcc0040000000000003) TDO (001dc80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001dd00000000000000003) TDO (001dcc0040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e000000010002000003) TDO (001dd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e048002810000000003) TDO (001e000000010002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e088001800003020003) TDO (001e048002810000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e0e0020000200000003) TDO (001e088001800003020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e110003000002020003) TDO (001e0e0020000200000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e202000000000000003) TDO (001e110003000002020001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e242000000000000003) TDO (001e202000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e280000200000000003) TDO (001e242000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e2c0000000000000003) TDO (001e280000200000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e300000000000000003) TDO (001e2c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e400000000000000003) TDO (001e300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e440000000000000003) TDO (001e400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e480000300000000003) TDO (001e440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e4c0000000000000003) TDO (001e480000300000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e500000000000000003) TDO (001e4c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e820100210202000003) TDO (001e500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e840002340100010003) TDO (001e820100210202000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e8a0103250302000003) TDO (001e840002340100010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e8c0000a40000000003) TDO (001e8a0103250302000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001e930103a50302000003) TDO (001e8c0000a40000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ea00020000000000003) TDO (001e930103a50302000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ea40000802000000003) TDO (001ea00020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ea80000000000000003) TDO (001ea40000802000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001eac0000200000000003) TDO (001ea80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001eb00000000000000003) TDO (001eac0000200000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ec00000800000000003) TDO (001eb00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ec40000c40000000003) TDO (001ec00000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ec80000800000000003) TDO (001ec40000c40000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ecc0000900000000003) TDO (001ec80000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001ed00000800000000003) TDO (001ecc0000900000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f020100010102500003) TDO (001ed00000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f040200030200500103) TDO (001f020100010102500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f080000000102d00003) TDO (001f040200030200500101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f0d0000000000e00003) TDO (001f080000000102d00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f120201030300e00103) TDO (001f0d0000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f200000000000280003) TDO (001f120201030300e00101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f240000000000280003) TDO (001f200000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f280000000000280003) TDO (001f240000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f2c0000000000080003) TDO (001f280000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f300000000000000003) TDO (001f2c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f400000000000000003) TDO (001f300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f440000000040080003) TDO (001f400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f480000000040080003) TDO (001f440000000040080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f4c0000000000080003) TDO (001f480000000040080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f500000000000080003) TDO (001f4c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f800100000000000003) TDO (001f500000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f850002010000000103) TDO (001f800100000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f890302010302000303) TDO (001f850002010000000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f8c0000000000000003) TDO (001f890302010302000301) ; -RUNTEST 1 TCK; -SDR 82 TDI (001f910102030301000303) TDO (001f8c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fa00000000000000003) TDO (001f910102030301000301) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fa40000000000000003) TDO (001fa00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fa80000000000000003) TDO (001fa40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fac0000000000000003) TDO (001fa80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fb00000000000000003) TDO (001fac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fc00008000040000003) TDO (001fb00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fc40000000000000003) TDO (001fc00008000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fc80000000000000003) TDO (001fc40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fcc0000000000000003) TDO (001fc80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (001fd00000000000000003) TDO (001fcc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020000200030001000003) TDO (001fd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020070300030100000003) TDO (0020000200030001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020090100000100000003) TDO (0020070300030100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00200c0000000000000003) TDO (0020090100000100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020120200020001000303) TDO (00200c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020200000000000000003) TDO (0020120200020001000301) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020240000000004000003) TDO (0020200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020280000000004000003) TDO (0020240000000004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00202c0000000000000003) TDO (0020280000000004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020300000000000000003) TDO (00202c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020400000400000000003) TDO (0020300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020440000000000000003) TDO (0020400000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020480000000000000003) TDO (0020440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00204c0000000000000003) TDO (0020480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020500000000000000003) TDO (00204c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020800000020203000003) TDO (0020500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020840002010003010003) TDO (0020800000020203000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020880003020003010003) TDO (0020840002010003010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00208c0000000000000003) TDO (0020880003020003010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020900203030303010003) TDO (00208c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020a00000000000000003) TDO (0020900203030303010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020a40000000000000003) TDO (0020a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020a80000000000000003) TDO (0020a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020ac0000000000000003) TDO (0020a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020b00000000000000003) TDO (0020ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020c00000000000000003) TDO (0020b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020c40000000000000003) TDO (0020c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020c80000000000000003) TDO (0020c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020cc0000000000000003) TDO (0020c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0020d00000000000000003) TDO (0020cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021001002031302020103) TDO (0020d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021040200038a02030103) TDO (0021001002031302020101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021090002021703010003) TDO (0021040200038a02030101) ; -RUNTEST 1 TCK; -SDR 82 TDI (00210c0000008800000003) TDO (0021090002021703010001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021120203031302000103) TDO (00210c0000008800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021200000008000800003) TDO (0021120203031302000101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021240000000c40000003) TDO (0021200000008000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021280000000040000003) TDO (0021240000000c40000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00212c0000001000000003) TDO (0021280000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021300000000000000003) TDO (00212c0000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021400800008800000003) TDO (0021300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021440000000060000003) TDO (0021400800008800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021480800008040000003) TDO (0021440000000060000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00214c0800000000000003) TDO (0021480800008040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021500000008000000003) TDO (00214c0800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021838200008806040003) TDO (0021500000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021870202000100000003) TDO (0021838200008806040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021890502034102000003) TDO (0021870202000100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00218c0800000000000003) TDO (0021890502034102000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021930303010300000203) TDO (00218c0800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021a04000000000140013) TDO (0021930303010300000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021a40000000000000003) TDO (0021a04000000000140011) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021a80000000000000003) TDO (0021a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021ac0000000400000003) TDO (0021a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021b00000000400000003) TDO (0021ac0000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021c02000000000080003) TDO (0021b00000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021c40000000000000003) TDO (0021c02000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021c80000000000000003) TDO (0021c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021cc1000000000000003) TDO (0021c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0021d00000001000000003) TDO (0021cc1000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022020100020302000003) TDO (0021d00000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022060200020002000003) TDO (0022020100020302000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00220a0b00020302080003) TDO (0022060200020002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00220c0800000080000003) TDO (00220a0b00020302080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022120900020302000203) TDO (00220c0800000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022200800000000000003) TDO (0022120900020302000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022240800000000000003) TDO (0022200800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022280800000000000003) TDO (0022240800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00222c0800000000000003) TDO (0022280800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022300800000000000003) TDO (00222c0800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022400400000000000003) TDO (0022300800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022440400000000000003) TDO (0022400400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022480400000000000003) TDO (0022440400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00224c0400000000000003) TDO (0022480400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022500400000000000003) TDO (00224c0400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022804800020002f00003) TDO (0022500400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022844900012101f00003) TDO (0022804800020002f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022880002030103f00003) TDO (0022844900012101f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00228c0000000000e00003) TDO (0022880002030103f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022900002000000e00003) TDO (00228c0000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022a00000000000280003) TDO (0022900002000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022a40000000010a80003) TDO (0022a00000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022a80400000000a80003) TDO (0022a40000000010a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022ac4000000000680003) TDO (0022a80400000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022b00000000000700003) TDO (0022ac4000000000680001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022c01000000000000003) TDO (0022b00000000000700001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022c41000000000880003) TDO (0022c01000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022c80000000000880003) TDO (0022c41000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022cc0000000000880003) TDO (0022c80000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0022d00000000000880003) TDO (0022cc0000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023000100010000000003) TDO (0022d00000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023040200020002000003) TDO (0023000100010000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023080102030002000003) TDO (0023040200020002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00230c0000000000000003) TDO (0023080102030002000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023120302010200000203) TDO (00230c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023200000000000000003) TDO (0023120302010200000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023240000000040000003) TDO (0023200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023280000000040000003) TDO (0023240000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00232c0000000000000003) TDO (0023280000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023300000000000000003) TDO (00232c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023400000000000000003) TDO (0023300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023440000000060000003) TDO (0023400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023480000000040000003) TDO (0023440000000060000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00234c0000000000000003) TDO (0023480000000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023500000000000000003) TDO (00234c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002381030101010d000003) TDO (0023500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023840203000100000003) TDO (002381030101010d000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00238b0103010101000003) TDO (0023840203000100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00238c0000000000000003) TDO (00238b0103010101000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023920201000100000003) TDO (00238c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023a00000000000000003) TDO (0023920201000100000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023a40000000000000003) TDO (0023a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023a80000000000000003) TDO (0023a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023ac0000000000000003) TDO (0023a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023b00000000000000003) TDO (0023ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023c00000000004000003) TDO (0023b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023c40000000000000003) TDO (0023c00000000004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023c80000000000000003) TDO (0023c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023cc0000000000000003) TDO (0023c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0023d00000000000000003) TDO (0023cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024020000020000600203) TDO (0023d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024040002008202500003) TDO (0024020000020000600201) ; -RUNTEST 1 TCK; -SDR 82 TDI (00240a0002038203000003) TDO (0024040002008202500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00240c4000008800400003) TDO (00240a0002038203000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002410080200ca02400003) TDO (00240c4000008800400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002420000000c000280003) TDO (002410080200ca02400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002424000000c840200003) TDO (002420000000c000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024280000004840280003) TDO (002424000000c840200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00242c0000004000440003) TDO (0024280000004840280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024300000004000500003) TDO (00242c0000004000440001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002440000000a000000003) TDO (0024300000004000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002444800400a060880003) TDO (002440000000a000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024480004002440800003) TDO (002444800400a060880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00244c0800002400080003) TDO (0024480004002440800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024501000002000000003) TDO (00244c0800002400080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002483020203011e900003) TDO (0024501000002000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024840001000001a10003) TDO (002483020203011e900001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00248b0200030503f00003) TDO (0024840001000001a10001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00248c0000000400a00003) TDO (00248b0200030503f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024902002000400a40003) TDO (00248c0000000400a00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024a00000000000000003) TDO (0024902002000400a40001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024a40000000000080003) TDO (0024a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024a80000000000000003) TDO (0024a40000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024ac0000001000080003) TDO (0024a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024b00800001000000003) TDO (0024ac0000001000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024c00000001004000003) TDO (0024b00800001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024c40000000400000003) TDO (0024c00000001004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024c80800000000080003) TDO (0024c40000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024cc0000000000800003) TDO (0024c80800000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0024d0a000000000880003) TDO (0024cc0000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025000202000080a00003) TDO (0024d0a000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025040300010301a40003) TDO (0025000202000080a00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025080102010301240003) TDO (0025040300010301a40001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00250c0000000000040003) TDO (0025080102010301240001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025100202000200000203) TDO (00250c0000000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025200000000000400003) TDO (0025100202000200000201) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025240000000000500003) TDO (0025200000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025280000000000500003) TDO (0025240000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00252c0000000000500003) TDO (0025280000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025300000000000500003) TDO (00252c0000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025400800000000000003) TDO (0025300000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025440000000000800003) TDO (0025400800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025480000000000800003) TDO (0025440000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00254c0000000000800003) TDO (0025480000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025500000000000800003) TDO (00254c0000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025810000000000000003) TDO (0025500000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025850000020000000003) TDO (0025810000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025890200000000000003) TDO (0025850000020000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00258c0000000000000003) TDO (0025890200000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025910000020000000003) TDO (00258c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025a00000400000004003) TDO (0025910000020000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025a40000000000000003) TDO (0025a00000400000004001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025a80000000000800003) TDO (0025a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025ac0000000000000003) TDO (0025a80000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025b00000000000200003) TDO (0025ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025c00000000000000003) TDO (0025b00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025c40000000000000003) TDO (0025c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025c80000000000000003) TDO (0025c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025cc0000000000000003) TDO (0025c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0025d00000000000000003) TDO (0025cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026030000020301000003) TDO (0025d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026040002000000000003) TDO (0026030000020301000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00260b0202020303000003) TDO (0026040002000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00260c0000000000000003) TDO (00260b0202020303000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026110002000301000003) TDO (00260c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026202000000000000003) TDO (0026110002000301000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026242000000000800003) TDO (0026202000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026280000000000800003) TDO (0026242000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00262c0000000000200003) TDO (0026280000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026300000000000200003) TDO (00262c0000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026400000000000000003) TDO (0026300000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026440000000010000003) TDO (0026400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026480000000000000003) TDO (0026440000000010000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00264c0000000000000003) TDO (0026480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026500000000000000003) TDO (00264c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026800000000000000003) TDO (0026500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026840000000000000003) TDO (0026800000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026880000000000000003) TDO (0026840000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00268c0000000000000003) TDO (0026880000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026900000000000000003) TDO (00268c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026a00000000000000003) TDO (0026900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026a40000000000000003) TDO (0026a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026a80000040000000003) TDO (0026a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026ac0000000000000003) TDO (0026a80000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026b00000000000000003) TDO (0026ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026c00000000000000003) TDO (0026b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026c40000000000000003) TDO (0026c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026c80000000000500003) TDO (0026c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026cc0000000000000003) TDO (0026c80000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0026d00000000000000003) TDO (0026cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027010101010101010103) TDO (0026d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027050501010001000003) TDO (0027010101010101010101) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027080000000000000003) TDO (0027050501010001000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00270c0080000000040003) TDO (0027080000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027100040000000000003) TDO (00270c0080000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027200000000000000003) TDO (0027100040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027250101010141010103) TDO (0027200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027280000000040400003) TDO (0027250101010141010101) ; -RUNTEST 1 TCK; -SDR 82 TDI (00272c0080000000100003) TDO (0027280000000040400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027300000000000000003) TDO (00272c0080000000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027400000000000000003) TDO (0027300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027440004000020000003) TDO (0027400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027480004000000000003) TDO (0027440004000020000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00274c0000000000000003) TDO (0027480004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027500000000000000003) TDO (00274c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027800400000000000003) TDO (0027500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027840000000800000003) TDO (0027800400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027880000000800000003) TDO (0027840000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00278c0000000800000003) TDO (0027880000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027900000000c00080003) TDO (00278c0000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027a00000000000000003) TDO (0027900000000c00080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027a40040000800000003) TDO (0027a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027a80040008800000003) TDO (0027a40040000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027ac0000008400000003) TDO (0027a80040008800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027b00080008400000003) TDO (0027ac0000008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027c00000001000000003) TDO (0027b00080008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027c40000000800000003) TDO (0027c00000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027c80000001800000003) TDO (0027c40000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027cc0040001800000003) TDO (0027c80000001800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0027d00000001000000003) TDO (0027cc0040001800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028000000a01000000003) TDO (0027d00000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028040000801000000003) TDO (0028000000a01000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028080000801400000003) TDO (0028040000801000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00280c0000001400000003) TDO (0028080000801400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028100000001000000003) TDO (00280c0000001400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028200000000400000003) TDO (0028100000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028240000000440000003) TDO (0028200000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028280000000440000003) TDO (0028240000000440000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00282c0000001000000003) TDO (0028280000000440000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028300000001000000003) TDO (00282c0000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028400000a00000000003) TDO (0028300000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028440000041060000003) TDO (0028400000a00000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028480000248040000003) TDO (0028440000041060000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00284c0000008000000003) TDO (0028480000248040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028500000008000000003) TDO (00284c0000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002880000010001c000003) TDO (0028500000008000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028840000240000100003) TDO (002880000010001c000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028880000240000100003) TDO (0028840000240000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00288c0000240000c00003) TDO (0028880000240000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028900000240000e00003) TDO (00288c0000240000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028a00008a0000000000b) TDO (0028900000240000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028a40000000000800003) TDO (0028a00008a00000000009) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028a80000200000a00003) TDO (0028a40000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028ac0000000000200003) TDO (0028a80000200000a00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028b00000000000200003) TDO (0028ac0000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028c0000014000400000b) TDO (0028b00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028c40000800000080003) TDO (0028c00000140004000009) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028c80000900000080003) TDO (0028c40000800000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028cc0000800000080003) TDO (0028c80000900000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0028d00000800000080003) TDO (0028cc0000800000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00290010c4001000000003) TDO (0028d00000800000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00290400d4009400000003) TDO (00290010c4001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00290800d4009400000003) TDO (00290400d4009400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00290c00d4009c00000003) TDO (00290800d4009400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00291000d4009c00000003) TDO (00290c00d4009c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029200000009400000003) TDO (00291000d4009c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029240080009c00000003) TDO (0029200000009400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029280084008c00000003) TDO (0029240080009c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00292c0084009400000003) TDO (0029280084008c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029300004009000000003) TDO (00292c0084009400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00294008c0009000000003) TDO (0029300004009000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00294400e0009800000003) TDO (00294008c0009000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00294808e0009800000003) TDO (00294400e0009800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00294c08a0008800000003) TDO (00294808e0009800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00295000a0009000000003) TDO (00294c08a0008800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029800000000000000003) TDO (00295000a0009000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029840000000800000003) TDO (0029800000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029880000000800000003) TDO (0029840000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00298c0000000000000003) TDO (0029880000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029900000000000000003) TDO (00298c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029a00000000000000023) TDO (0029900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029a40044000000000003) TDO (0029a00000000000000021) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029a80040001000000003) TDO (0029a40044000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029ac0000000000000003) TDO (0029a80040001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029b00000000400000003) TDO (0029ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029c00000000000000003) TDO (0029b00000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029c40000000000000003) TDO (0029c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029c80000000000000003) TDO (0029c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029cc0040000000000003) TDO (0029c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0029d00000000000000003) TDO (0029cc0040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a000004000000000003) TDO (0029d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a040004000000000003) TDO (002a000004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a080004000000000003) TDO (002a040004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a0c0004000000000003) TDO (002a080004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a100000000000000003) TDO (002a0c0004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a200000040000000003) TDO (002a100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a240000000000000003) TDO (002a200000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a280000040000000003) TDO (002a240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a2c0004000000000003) TDO (002a280000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a300004000000000003) TDO (002a2c0004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a400000000000000003) TDO (002a300004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a440000080000000003) TDO (002a400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a480080080000000003) TDO (002a440000080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a4c0080000000500003) TDO (002a480080080000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a500000000000000003) TDO (002a4c0080000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a800080040000000003) TDO (002a500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a840000000000000003) TDO (002a800080040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a880000000000000003) TDO (002a840000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a8c0000000000000003) TDO (002a880000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002a900000400000000003) TDO (002a8c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002aa00000100020000003) TDO (002a900000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002aa40000000000800003) TDO (002aa00000100020000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002aa80080000000800003) TDO (002aa40000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002aac0080100000200003) TDO (002aa80080000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ab00000000000200003) TDO (002aac0080100000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ac00000000400000003) TDO (002ab00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ac40000000000000003) TDO (002ac00000000400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ac80000000000000003) TDO (002ac40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002acc0000000000000003) TDO (002ac80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ad00000000000000003) TDO (002acc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b000000000000000003) TDO (002ad00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b040010000000000003) TDO (002b000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b080010000000000003) TDO (002b040010000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b0c0010000000000003) TDO (002b080010000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b100014000000000003) TDO (002b0c0010000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b200000000000000003) TDO (002b100014000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b240000000000000003) TDO (002b200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b280000000000000003) TDO (002b240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b2c0000000000000003) TDO (002b280000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b300000000000000003) TDO (002b2c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b400080000000004003) TDO (002b300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b440080000000000003) TDO (002b400080000000004001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b480000000000000003) TDO (002b440080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b4c0000000000000003) TDO (002b480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b500080000000000003) TDO (002b4c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b800000004000000003) TDO (002b500080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b840040000000000003) TDO (002b800000004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b880040000000000003) TDO (002b840040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b8c0040000000000003) TDO (002b880040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002b900040000000000003) TDO (002b8c0040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ba00000000000000003) TDO (002b900040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ba40000000080000003) TDO (002ba00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ba80000000080000003) TDO (002ba40000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002bac0000000080000003) TDO (002ba80000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002bb00000000000000003) TDO (002bac0000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002bc00000100000040003) TDO (002bb00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002bc40800000080000003) TDO (002bc00000100000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002bc80000100080000003) TDO (002bc40800000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002bcc0000100080000003) TDO (002bc80000100080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002bd00000000000000003) TDO (002bcc0000100080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c000000040000100003) TDO (002bd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c048000000000400003) TDO (002c000000040000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c080000000000500003) TDO (002c048000000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c0c0000000000000003) TDO (002c080000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c100000000000c00003) TDO (002c0c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c202000040000000003) TDO (002c100000000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c240000000040200003) TDO (002c202000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c280000000040280003) TDO (002c240000000040200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c2c0000004000080003) TDO (002c280000000040280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c300000000000080003) TDO (002c2c0000004000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c400000000000000003) TDO (002c300000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c440004000060000003) TDO (002c400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c480004000040000003) TDO (002c440004000060000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c4c0000000000080003) TDO (002c480004000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c500000000000080003) TDO (002c4c0000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c80002000001cc00003) TDO (002c500000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c840020000000300003) TDO (002c80002000001cc00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c880020000000800003) TDO (002c840020000000300001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c8c0020000000e00003) TDO (002c880020000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002c900000000000200003) TDO (002c8c0020000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ca0000000200028000b) TDO (002c900000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ca40000000000880003) TDO (002ca00000002000280009) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ca80000040000800003) TDO (002ca40000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002cac0000000000600003) TDO (002ca80000040000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002cb00000000000300003) TDO (002cac0000000000600001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002cc00004000004000003) TDO (002cb00000000000300001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002cc40000000000880003) TDO (002cc00004000004000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002cc80000000000080003) TDO (002cc40000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ccc0000000000800003) TDO (002cc80000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002cd00000000000000003) TDO (002ccc0000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d002000000000000003) TDO (002cd00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d042800000000000003) TDO (002d002000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d082804000000000003) TDO (002d042800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d0c2804004000000003) TDO (002d082804000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d102800000000000003) TDO (002d0c2804004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d201800000000000003) TDO (002d102800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d241800000040040003) TDO (002d201800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d281810000040000003) TDO (002d241800000040040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d2c1800000000000003) TDO (002d281810000040000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d301800000000000003) TDO (002d2c1800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d401400000000000003) TDO (002d301800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d440420000000000003) TDO (002d401400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d481400000000000003) TDO (002d440420000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d4c1400000000000003) TDO (002d481400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d501400000000000003) TDO (002d4c1400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d800800000000000003) TDO (002d501400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d840000000000000003) TDO (002d800800000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d880028000000000003) TDO (002d840000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d8c0010000000000003) TDO (002d880028000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002d900014000000000003) TDO (002d8c0010000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002da00000000040000083) TDO (002d900014000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002da44400000000000003) TDO (002da00000000040000081) ; -RUNTEST 1 TCK; -SDR 82 TDI (002da84020000000000003) TDO (002da44400000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002dac0000000000000003) TDO (002da84020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002db04000000000000003) TDO (002dac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002dc00010000000800003) TDO (002db04000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002dc40040000000000003) TDO (002dc00010000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002dc80050000000000003) TDO (002dc40040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002dcc0000000000000003) TDO (002dc80050000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002dd00080000000000003) TDO (002dcc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e000000000000000003) TDO (002dd00080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e040000000000000003) TDO (002e000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e080000000000000003) TDO (002e040000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e0c0000000000000003) TDO (002e080000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e100000000000000003) TDO (002e0c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e200000000000000003) TDO (002e100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e240000000000000003) TDO (002e200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e280000000000000003) TDO (002e240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e2c0000000000000003) TDO (002e280000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e300000000000000003) TDO (002e2c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e400000000000000003) TDO (002e300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e440000000000000003) TDO (002e400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e480000000000000003) TDO (002e440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e4c0000000000000003) TDO (002e480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e500000000000000003) TDO (002e4c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e800000000000500003) TDO (002e500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e840000000000500003) TDO (002e800000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e880000240000d00003) TDO (002e840000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e8c0000000000e00003) TDO (002e880000240000d00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002e900000800000e00003) TDO (002e8c0000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ea00000000000280003) TDO (002e900000800000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ea40000000000a80003) TDO (002ea00000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ea80000002000a80003) TDO (002ea40000000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002eac0000000000280003) TDO (002ea80000002000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002eb00000000000200003) TDO (002eac0000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ec00000000000000003) TDO (002eb00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ec40000000000080003) TDO (002ec00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ec80000000000080003) TDO (002ec40000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ecc0000800000080003) TDO (002ec80000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002ed00000000000080003) TDO (002ecc0000800000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f008000001000000007) TDO (002ed00000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f040000001000000003) TDO (002f008000001000000005) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f080400000000040003) TDO (002f040000001000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f0c0800000020040003) TDO (002f080400000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f100000000000000003) TDO (002f0c0800000020040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f2040000000c0000043) TDO (002f100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f240038000000400003) TDO (002f2040000000c0000041) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f280000008000540003) TDO (002f240038000000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f2c0000000000100003) TDO (002f280000008000540001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f300000000000000003) TDO (002f2c0000000000100001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f4000080020d0000003) TDO (002f300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f440000000c00000003) TDO (002f4000080020d0000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f480000008400000003) TDO (002f440000000c00000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f4c1004008400000003) TDO (002f480000008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f500000000000000003) TDO (002f4c1004008400000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f800000000000d80003) TDO (002f500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f840000000040f80003) TDO (002f800000000000d80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f880000000000f80003) TDO (002f840000000040f80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f8c0000248000e80003) TDO (002f880000000000f80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002f900000008000e40003) TDO (002f8c0000248000e80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fa0002800c000280003) TDO (002f900000008000e40001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fa4000000c800a80003) TDO (002fa0002800c000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fa80000000840a80003) TDO (002fa4000000c800a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fac0000004080280003) TDO (002fa80000000840a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fb000000040002c0003) TDO (002fac0000004080280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fc00000000000000003) TDO (002fb000000040002c0001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fc40018402000080003) TDO (002fc00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fc80010002040080003) TDO (002fc40018402000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fcc0000002080880003) TDO (002fc80010002040080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (002fd000048020008c0003) TDO (002fcc0000002080880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00300000c0000000000003) TDO (002fd000048020008c0001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00300408d0000000000003) TDO (00300000c0000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00300800d0000000000003) TDO (00300408d0000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00300c00d0000000000003) TDO (00300800d0000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00301000d0000000000003) TDO (00300c00d0000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030200084000000000003) TDO (00301000d0000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030240080000000000003) TDO (0030200084000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030280080000000000003) TDO (0030240080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00302c0080000000000003) TDO (0030280080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030300000000000000003) TDO (00302c0080000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030400040000000000003) TDO (0030300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030440060000000000003) TDO (0030400040000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030480060040000000003) TDO (0030440060000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00304c0020000000000003) TDO (0030480060040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030500020000000000003) TDO (00304c0020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030800810000000000003) TDO (0030500020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030840000240000000003) TDO (0030800810000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030880000240000000003) TDO (0030840000240000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00308c0000a40000000003) TDO (0030880000240000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030900000a40000000003) TDO (00308c0000a40000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030a00000000000000003) TDO (0030900000a40000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030a40040800000000003) TDO (0030a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030a80044000000000003) TDO (0030a40040800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030ac0000000000000003) TDO (0030a80044000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030b00000000000000003) TDO (0030ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030c00000000000000003) TDO (0030b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030c41000c00000000003) TDO (0030c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030c80000800000000003) TDO (0030c41000c00000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030cc0000800000000003) TDO (0030c80000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0030d00000800000000003) TDO (0030cc0000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031000000000000800003) TDO (0030d00000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031040000000080a00003) TDO (0031000000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031080000000000200003) TDO (0031040000000080a00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00310c0000000000000003) TDO (0031080000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031100000000000000003) TDO (00310c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031200000000000000003) TDO (0031100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031240000400000000003) TDO (0031200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031288000000000000003) TDO (0031240000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00312c1000000000000003) TDO (0031288000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031300000000000000003) TDO (00312c1000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031400000000000800023) TDO (0031300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031440000000000040003) TDO (0031400000000000800021) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031484000000000000003) TDO (0031440000000000040001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00314c0400002000800003) TDO (0031484000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031500000000000800003) TDO (00314c0400002000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031800000000080000003) TDO (0031500000000000800001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031840000000000000003) TDO (0031800000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031880000000000000003) TDO (0031840000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00318c0000000000000003) TDO (0031880000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031900000000000000003) TDO (00318c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031a00000000000000003) TDO (0031900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031a40000000080000003) TDO (0031a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031a80000000080000003) TDO (0031a40000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031ac0000000080000003) TDO (0031a80000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031b00000000000000003) TDO (0031ac0000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031c00000000000000003) TDO (0031b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031c40000000080000003) TDO (0031c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031c80000000080000003) TDO (0031c40000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031cc0000000080000003) TDO (0031c80000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0031d00000000000000003) TDO (0031cc0000000080000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032002000000000000003) TDO (0031d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032040000000000080003) TDO (0032002000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032080000000000000003) TDO (0032040000000000080001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00320c0000000000000003) TDO (0032080000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032100000000000000003) TDO (00320c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032200800004000000003) TDO (0032100000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032248000400000000003) TDO (0032200800004000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032280000000000000003) TDO (0032248000400000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00322c0000000000000003) TDO (0032280000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032300000000000000003) TDO (00322c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032400000000000000003) TDO (0032300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032444000000000000003) TDO (0032400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032480000000000000003) TDO (0032444000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00324c0000000000000003) TDO (0032480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032500000000000000003) TDO (00324c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032800000000000f00003) TDO (0032500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032840000000000f00003) TDO (0032800000000000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032880000000000f00003) TDO (0032840000000000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00328c0000000000e00003) TDO (0032880000000000f00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032900000000000e00003) TDO (00328c0000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032a00010000000280003) TDO (0032900000000000e00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032a40010000000a80003) TDO (0032a00010000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032a80010000000a80003) TDO (0032a40010000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032ac0010000000680003) TDO (0032a80010000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032b00010000000700003) TDO (0032ac0010000000680001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032c00000000000000003) TDO (0032b00010000000700001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032c40000000000880003) TDO (0032c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032c80000000000880003) TDO (0032c40000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032cc0000000000880003) TDO (0032c80000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0032d00000000000880003) TDO (0032cc0000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033000000000000000003) TDO (0032d00000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033040008000000000003) TDO (0033000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033080008100000000003) TDO (0033040008000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00330c0000000000000003) TDO (0033080008100000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033100020000000000003) TDO (00330c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033200000000000000003) TDO (0033100020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033240000240008000003) TDO (0033200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033280020000000000003) TDO (0033240000240008000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00332c0000000000000003) TDO (0033280020000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033300000000000000003) TDO (00332c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033400000000000000003) TDO (0033300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033440000300000000003) TDO (0033400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033480000040000000003) TDO (0033440000300000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00334c0000000000000003) TDO (0033480000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033500000000000000003) TDO (00334c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033800000000000000003) TDO (0033500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033840000800000000003) TDO (0033800000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033880000000000000003) TDO (0033840000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00338c0000000000000003) TDO (0033880000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033900000000000000003) TDO (00338c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033a00000000000000003) TDO (0033900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033a40000000000000003) TDO (0033a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033a80000000000000003) TDO (0033a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033ac0000000000000003) TDO (0033a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033b00000000000000003) TDO (0033ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033c00000000000000013) TDO (0033b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033c40000000000000003) TDO (0033c00000000000000011) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033c80000000000000003) TDO (0033c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033cc0000000000000003) TDO (0033c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0033d00000000000000003) TDO (0033cc0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034000000000000000003) TDO (0033d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034040000000800000003) TDO (0034000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034080000000800000003) TDO (0034040000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00340c0000000800000003) TDO (0034080000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034100000000800000003) TDO (00340c0000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034200000000000000003) TDO (0034100000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034240000000800000003) TDO (0034200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034280000000800000003) TDO (0034240000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00342c0000000000000003) TDO (0034280000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034300000000000000003) TDO (00342c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034400000000000000003) TDO (0034300000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034440000000000000003) TDO (0034400000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034480000000000000003) TDO (0034440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00344c0000000000000003) TDO (0034480000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034500000000000000003) TDO (00344c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034800000000800000003) TDO (0034500000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034840000000000000003) TDO (0034800000000800000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034880000000000000003) TDO (0034840000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00348c0000000000000003) TDO (0034880000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034900000000000000003) TDO (00348c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034a00000000000000003) TDO (0034900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034a40000000000000003) TDO (0034a00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034a80000000000000003) TDO (0034a40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034ac0000000000000003) TDO (0034a80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034b00000000000000003) TDO (0034ac0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034c00000000000000003) TDO (0034b00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034c40000000000000003) TDO (0034c00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034c80000000000000003) TDO (0034c40000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034cc0004000000000003) TDO (0034c80000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0034d00000000000000003) TDO (0034cc0004000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035000000000000000003) TDO (0034d00000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035040000000000000003) TDO (0035000000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035080000040000000003) TDO (0035040000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00350c0000040000000003) TDO (0035080000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035100000040000000003) TDO (00350c0000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035200000000000000003) TDO (0035100000040000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035240000000000000003) TDO (0035200000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035280000000000000003) TDO (0035240000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00352c8000000000000003) TDO (0035280000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035301000000000000003) TDO (00352c8000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035400000000020000003) TDO (0035301000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035440000000000000003) TDO (0035400000000020000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035480000800000000003) TDO (0035440000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00354c0000000000000003) TDO (0035480000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035504400002000000003) TDO (00354c0000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035800000000000500003) TDO (0035504400002000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035840000040000400003) TDO (0035800000000000500001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035880000000000c00003) TDO (0035840000040000400001) ; -RUNTEST 1 TCK; -SDR 82 TDI (00358c0000000000200003) TDO (0035880000000000c00001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035900000000000000003) TDO (00358c0000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035a00000000000280003) TDO (0035900000000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035a40000000000a80003) TDO (0035a00000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035a80000000000880003) TDO (0035a40000000000a80001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035ac0000000000280003) TDO (0035a80000000000880001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035b00000000000200003) TDO (0035ac0000000000280001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035c00000804000000003) TDO (0035b00000000000200001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035c40010800000000003) TDO (0035c00000804000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035c80010000000000003) TDO (0035c40010800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035cc0000800000000003) TDO (0035c80010000000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035d00000800000000003) TDO (0035cc0000800000000001) ; -RUNTEST 1 TCK; -SDR 82 TDI (0035d00000800000000003) TDO (0035d00000800000000001) ; -//Loading device with 'ispen' instruction. -SIR 8 TDI (e8) ; -SDR 6 TDI (05) SMASK (3f) ; -//Loading device with 'bypass' instruction. -SIR 8 TDI (ff) ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (f0) ; -RUNTEST 100 TCK; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -SIR 8 TDI (ff) ; -SDR 1 TDI (00) SMASK (01) ; diff --git a/cpld/XC95144XL/MXSE.tim b/cpld/XC95144XL/MXSE.tim deleted file mode 100644 index e69de29..0000000 diff --git a/cpld/XC95144XL/MXSE.vm6 b/cpld/XC95144XL/MXSE.vm6 deleted file mode 100644 index 25e775d..0000000 --- a/cpld/XC95144XL/MXSE.vm6 +++ /dev/null @@ -1,8524 +0,0 @@ -NDS Database: version P.20131013 - -NDS_INFO | xc9500xl | 95144XL100 | XC95144XL-10-TQ100 - -DEVICE | 95144XL | 95144XL100 | - -NETWORK | MXSE | 0 | 0 | 16391 - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_9_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<9> | 10013 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_8_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<8> | 10014 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_15_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<15> | 10015 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_14_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<14> | 10016 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_13_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<13> | 10017 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_12_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<12> | 10018 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_11_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<11> | 10019 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_10_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<10> | 10020 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_23_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<23> | 10021 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_22_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<22> | 10022 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_21_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<21> | 10023 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_20_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<20> | 10024 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_19_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<19> | 10025 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_18_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<18> | 10026 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_17_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<17> | 10027 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_16_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<16> | 10028 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | CLK2X_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | CLK2X_IOB | 10029 | PI | 426 | 0 | MXSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV - -MACROCELL_INSTANCE | PrldLow+Tff+PinTrst+OptxMapped | nVMA_IOBout | MXSE_COPY_0_COPY_0 | 2155893760 | 11 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArf | 9919 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArr | 9920 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nVMA_IOBout$Q | 9829 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | nVMA_IOBout$OE | 9831 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.BUFOE.OUT | nVMA_IOBout | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | nVMA_IOBout.SI | nVMA_IOBout | 0 | 10 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArf | 9919 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArr | 9920 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nVMA_IOBout.D1 | 10053 | ? | 504 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nVMA_IOBout.D2 | 10054 | ? | 504 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 6 | IV_FALSE | nVMA_IOBout | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> -SPPTERM | 9 | IV_TRUE | nVMA_IOBout | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | nVMA_IOBout.TRST | 10056 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG - -SRFF_INSTANCE | nVMA_IOBout.REG | nVMA_IOBout | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nVMA_IOBout.D | 10052 | ? | 504 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nVMA_IOBout.Q | 10057 | ? | 524 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -BUF_INSTANCE | nVMA_IOBout.BUFOE | nVMA_IOBout | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | nVMA_IOBout.TRST | 10056 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | nVMA_IOBout.BUFOE.OUT | 10055 | ? | 0 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | PrldLow+PinTrst+OptxMapped+Ce | nAS_IOBout | MXSE_COPY_0_COPY_0 | 2424325120 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nAS_IOBout$Q | 9832 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | nAS_IOBout | 9833 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | nAS_IOBout$OE | 9834 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.BUFOE.OUT | nAS_IOBout | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | nAS_IOBout.SI | nAS_IOBout | 0 | 4 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nAS_IOBout.D1 | 10059 | ? | 506 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nAS_IOBout.D2 | 10060 | ? | 506 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | nAS_IOBout.TRST | 10062 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG - -SRFF_INSTANCE | nAS_IOBout.REG | nAS_IOBout | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nAS_IOBout.D | 10058 | ? | 506 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nAS_IOBout.Q | 10063 | ? | 536 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -BUF_INSTANCE | nAS_IOBout.BUFOE | nAS_IOBout | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | nAS_IOBout.TRST | 10062 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | nAS_IOBout.BUFOE.OUT | 10061 | ? | 0 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | nLDS_IOBout | MXSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOL0 | 9850 | ? | 508 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nLDS_IOBout | 9835 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.Q | nLDS_IOBout | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | nLDS_IOBout$OE | 9836 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.BUFOE.OUT | nLDS_IOBout | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | nLDS_IOBout.SI | nLDS_IOBout | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOL0 | 9850 | ? | 508 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nLDS_IOBout.D1 | 10065 | ? | 508 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nLDS_IOBout.D2 | 10066 | ? | 508 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | IOL0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | IOL0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 4 | IV_FALSE | IORW0 | IV_TRUE | IOL0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | nLDS_IOBout.TRST | 10068 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG - -SRFF_INSTANCE | nLDS_IOBout.REG | nLDS_IOBout | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nLDS_IOBout.D | 10064 | ? | 508 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nLDS_IOBout.Q | 10069 | ? | 0 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -BUF_INSTANCE | nLDS_IOBout.BUFOE | nLDS_IOBout | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | nLDS_IOBout.TRST | 10068 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | nLDS_IOBout.BUFOE.OUT | 10067 | ? | 0 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | nUDS_IOBout | MXSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOU0 | 9851 | ? | 509 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nUDS_IOBout | 9837 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.Q | nUDS_IOBout | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | nUDS_IOBout$OE | 9838 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.BUFOE.OUT | nUDS_IOBout | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | nUDS_IOBout.SI | nUDS_IOBout | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOU0 | 9851 | ? | 509 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nUDS_IOBout.D1 | 10071 | ? | 509 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nUDS_IOBout.D2 | 10072 | ? | 509 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | IOU0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | IOU0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 4 | IV_FALSE | IORW0 | IV_TRUE | IOU0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | nUDS_IOBout.TRST | 10074 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG - -SRFF_INSTANCE | nUDS_IOBout.REG | nUDS_IOBout | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nUDS_IOBout.D | 10070 | ? | 509 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nUDS_IOBout.Q | 10075 | ? | 0 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -BUF_INSTANCE | nUDS_IOBout.BUFOE | nUDS_IOBout | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | nUDS_IOBout.TRST | 10074 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | iobm/BG -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | nUDS_IOBout.BUFOE.OUT | 10073 | ? | 0 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.BUFOE | 0 | 10 | BUF_OUT - -INPUT_INSTANCE | 0 | 0 | NULL | CLK_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | CLK_FSB | 10030 | PI | 427 | 0 | MXSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV -NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV - -INPUT_INSTANCE | 0 | 0 | NULL | nAS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nAS_FSB | 10036 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/Once | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/Once.SI | ram/Once | 0 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/Once.D1 | 10077 | ? | 437 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/Once.D2 | 10078 | ? | 437 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | ram/Once | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | ram/Once.REG | ram/Once | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/Once.D | 10076 | ? | 437 | 0 | ram/Once | NULL | NULL | ram/Once.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/Once.Q | 10079 | ? | 499 | 0 | ram/Once | NULL | NULL | ram/Once.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | cnt/RefDone | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefDone.SI | cnt/RefDone | 0 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefDone.D1 | 10081 | ? | 439 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefDone.D2 | 10082 | ? | 439 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | cnt/RefDone | IV_FALSE | RefAck -SPPTERM | 8 | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> - -SRFF_INSTANCE | cnt/RefDone.REG | cnt/RefDone | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefDone.D | 10080 | ? | 439 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefDone.Q | 10083 | ? | 499 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | nWE_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nWE_FSB | 10031 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | SW_1_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | SW<1> | 10037 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Once | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP35_.EXP | 10645 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Park.EXP | 10646 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/Once.SI | iobs/Once | 0 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP35_.EXP | 10645 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Park.EXP | 10646 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/Once.D1 | 10085 | ? | 440 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/Once.D2 | 10086 | ? | 440 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP35_.EXP -SPPTERM | 1 | IV_TRUE | Park.EXP -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 -SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | ALE1 - -SRFF_INSTANCE | iobs/Once.REG | iobs/Once | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/Once.D | 10084 | ? | 440 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/Once.Q | 10087 | ? | 493 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 3 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cs/nOverlay1.D1 | 10089 | ? | 441 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cs/nOverlay1.D2 | 10090 | ? | 441 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cs/nOverlay0 -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cs/nOverlay1.CE | 10091 | ? | 442 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cs/nOverlay1.D | 10088 | ? | 441 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cs/nOverlay1.CE | 10091 | ? | 442 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cs/nOverlay1.Q | 10092 | ? | 499 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | BERR_IOBS | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | BERR_IOBS.SI | BERR_IOBS | 0 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | BERR_IOBS.D1 | 10094 | ? | 443 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | BERR_IOBS.D2 | 10095 | ? | 443 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | BERR_IOBS | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | BERR_IOBS | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | BERR_IOBS | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 - -SRFF_INSTANCE | BERR_IOBS.REG | BERR_IOBS | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | BERR_IOBS.D | 10093 | ? | 443 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | BERR_IOBS.Q | 10096 | ? | 467 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | IORW0 | MXSE_COPY_0_COPY_0 | 2155877632 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP31_.EXP | 10635 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP36_.EXP | 10647 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IORW0.SI | IORW0 | 0 | 12 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP31_.EXP | 10635 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP36_.EXP | 10647 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IORW0.D1 | 10098 | ? | 444 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IORW0.D2 | 10099 | ? | 444 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP31_.EXP -SPPTERM | 1 | IV_TRUE | EXP36_.EXP -SPPTERM | 3 | IV_FALSE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ALE1 - -SRFF_INSTANCE | IORW0.REG | IORW0 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IORW0.D | 10097 | ? | 444 | 0 | IORW0 | NULL | NULL | IORW0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IORW0.Q | 10100 | ? | 535 | 0 | IORW0 | NULL | NULL | IORW0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | nRES_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nRES | 10032 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay0 | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cs/nOverlay0.SI | cs/nOverlay0 | 0 | 8 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cs/nOverlay0.D1 | 10102 | ? | 445 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cs/nOverlay0.D2 | 10103 | ? | 445 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_FALSE | nAS_FSB_IBUF -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_TRUE | fsb/ASrf -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | cs/nOverlay0.RSTF | 10104 | ? | 446 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | nRES_IBUF - -SRFF_INSTANCE | cs/nOverlay0.REG | cs/nOverlay0 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cs/nOverlay0.D | 10101 | ? | 445 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | cs/nOverlay0.RSTF | 10104 | ? | 446 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | nRES_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cs/nOverlay0.Q | 10105 | ? | 445 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | nLDS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nLDS_FSB | 10033 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | IOL0 | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOL1 | 9862 | ? | 447 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IOL0 | 9850 | ? | 508 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IOL0.SI | IOL0 | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOL1 | 9862 | ? | 447 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IOL0.D1 | 10107 | ? | 447 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IOL0.D2 | 10108 | ? | 447 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | nLDS_FSB_IBUF | IV_TRUE | ALE1 -SPPTERM | 2 | IV_TRUE | iobs/IOL1 | IV_FALSE | ALE1 -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | IOL0.CE | 10109 | ? | 448 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 - -SRFF_INSTANCE | IOL0.REG | IOL0 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IOL0.D | 10106 | ? | 447 | 0 | IOL0 | NULL | NULL | IOL0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | IOL0.CE | 10109 | ? | 448 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IOL0.Q | 10110 | ? | 508 | 0 | IOL0 | NULL | NULL | IOL0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | nUDS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nUDS_FSB | 10034 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | IOU0 | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOU1 | 9866 | ? | 449 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IOU0 | 9851 | ? | 509 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IOU0.SI | IOU0 | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOU1 | 9866 | ? | 449 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IOU0.D1 | 10112 | ? | 449 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IOU0.D2 | 10113 | ? | 449 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | nUDS_FSB_IBUF | IV_TRUE | ALE1 -SPPTERM | 2 | IV_TRUE | iobs/IOU1 | IV_FALSE | ALE1 -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | IOU0.CE | 10114 | ? | 450 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 - -SRFF_INSTANCE | IOU0.REG | IOU0 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IOU0.D | 10111 | ? | 449 | 0 | IOU0 | NULL | NULL | IOU0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | IOU0.CE | 10114 | ? | 450 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IOU0.Q | 10115 | ? | 509 | 0 | IOU0 | NULL | NULL | IOU0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutA | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | TimeoutA.SI | TimeoutA | 0 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | TimeoutA.D1 | 10117 | ? | 451 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | TimeoutA.D2 | 10118 | ? | 451 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | TimeoutA | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> -SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | TimeoutA.REG | TimeoutA | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | TimeoutA.D | 10116 | ? | 451 | 0 | TimeoutA | NULL | NULL | TimeoutA.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | TimeoutA.Q | 10119 | ? | 467 | 0 | TimeoutA | NULL | NULL | TimeoutA.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutB | MXSE_COPY_0_COPY_0 | 2155877376 | 16 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_2_IBUF | 9936 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | TimeoutB.EXP | 10613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | TimeoutB.SI | TimeoutB | 0 | 15 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_2_IBUF | 9936 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | TimeoutB.D1 | 10121 | ? | 452 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | TimeoutB.D2 | 10122 | ? | 452 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | TimeoutB | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> -SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | TimeoutB.EXP | 10603 | ? | 0 | 0 | TimeoutB | NULL | NULL | TimeoutB.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | A_FSB_11_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_2_IBUF - -SRFF_INSTANCE | TimeoutB.REG | TimeoutB | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | TimeoutB.D | 10120 | ? | 452 | 0 | TimeoutB | NULL | NULL | TimeoutB.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | TimeoutB.Q | 10123 | ? | 467 | 0 | TimeoutB | NULL | NULL | TimeoutB.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/TimeoutBPre | MXSE_COPY_0_COPY_0 | 2155877376 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/TimeoutBPre.SI | cnt/TimeoutBPre | 0 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/TimeoutBPre.D1 | 10125 | ? | 453 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/TimeoutBPre.D2 | 10126 | ? | 453 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/TimeoutBPre | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> -SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | cnt/TimeoutBPre.REG | cnt/TimeoutBPre | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/TimeoutBPre.D | 10124 | ? | 453 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/TimeoutBPre.Q | 10127 | ? | 453 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR0r | MXSE_COPY_0_COPY_0 | 2155873536 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | fsb/BERR0r.SI | fsb/BERR0r | 0 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/BERR0r.D1 | 10129 | ? | 454 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/BERR0r.D2 | 10130 | ? | 454 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/BERR0r - -SRFF_INSTANCE | fsb/BERR0r.REG | fsb/BERR0r | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/BERR0r.D | 10128 | ? | 454 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/BERR0r.Q | 10131 | ? | 467 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR1r | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | fsb/BERR1r.SI | fsb/BERR1r | 0 | 4 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/BERR1r.D1 | 10133 | ? | 455 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/BERR1r.D2 | 10134 | ? | 455 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR1r -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | fsb/BERR1r.REG | fsb/BERR1r | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/BERR1r.D | 10132 | ? | 455 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/BERR1r.Q | 10135 | ? | 467 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | MXSE_COPY_0_COPY_0 | 2155873536 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/Ready0r.D1 | 10137 | ? | 456 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/Ready0r.D2 | 10138 | ? | 456 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady - -SRFF_INSTANCE | fsb/Ready0r.REG | fsb/Ready0r | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/Ready0r.D | 10136 | ? | 456 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/Ready0r.Q | 10139 | ? | 467 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1.EXP | 10569 | ? | 457 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | fsb/Ready1r.EXP | 10556 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 11 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1.EXP | 10569 | ? | 457 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/Ready1r.D1 | 10141 | ? | 457 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/Ready1r.D2 | 10142 | ? | 457 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/Clear1.EXP -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | fsb/Ready1r.EXP | 10542 | ? | 462 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 - -SRFF_INSTANCE | fsb/Ready1r.REG | fsb/Ready1r | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/Ready1r.D | 10140 | ? | 457 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/Ready1r.Q | 10143 | ? | 467 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready2r | MXSE_COPY_0_COPY_0 | 2155873536 | 21 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP16_.EXP | 10560 | ? | 458 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | fsb/Ready2r.EXP | 10559 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | fsb/Ready2r.SI | fsb/Ready2r | 0 | 20 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP16_.EXP | 10560 | ? | 458 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/Ready2r.D1 | 10145 | ? | 458 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/Ready2r.D2 | 10146 | ? | 458 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP16_.EXP -SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r -SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r -SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r -SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | fsb/Ready2r.EXP | 10545 | ? | 462 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF - -SRFF_INSTANCE | fsb/Ready2r.REG | fsb/Ready2r | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/Ready2r.D | 10144 | ? | 458 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/Ready2r.Q | 10147 | ? | 467 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | MXSE_COPY_0_COPY_0 | 2155873280 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP22_.EXP | 10566 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP23_.EXP | 10567 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP22_.EXP | 10566 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP23_.EXP | 10567 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/VPA.D1 | 10149 | ? | 459 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/VPA.D2 | 10150 | ? | 459 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP22_.EXP -SPPTERM | 1 | IV_TRUE | EXP23_.EXP -SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 3 | IV_TRUE | fsb/BERR0r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 3 | IV_TRUE | fsb/BERR1r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_FALSE | Disable | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM | IV_TRUE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM - -SRFF_INSTANCE | fsb/VPA.REG | fsb/VPA | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/VPA.D | 10148 | ? | 459 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/VPA.Q | 10151 | ? | 459 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL1 | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOL1 | 9862 | ? | 447 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IOL1.SI | iobs/IOL1 | 0 | 2 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOL1.D1 | 10153 | ? | 460 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOL1.D2 | 10154 | ? | 460 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nLDS_FSB_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | iobs/IOL1.CE | 10155 | ? | 461 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | iobs/Load1 - -SRFF_INSTANCE | iobs/IOL1.REG | iobs/IOL1 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOL1.D | 10152 | ? | 460 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | iobs/IOL1.CE | 10155 | ? | 461 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | iobs/Load1 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOL1.Q | 10156 | ? | 447 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | MXSE_COPY_0_COPY_0 | 2155877632 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP14_.EXP | 10557 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP15_.EXP | 10558 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP14_.EXP | 10557 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP15_.EXP | 10558 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IORW1.D1 | 10158 | ? | 462 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IORW1.D2 | 10159 | ? | 462 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/Once -SPPTERM | 1 | IV_FALSE | ALE1 -SPPTERM | 1 | IV_TRUE | EXP14_.EXP -SPPTERM | 1 | IV_TRUE | EXP15_.EXP -SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | iobs/IORW1 -SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1 -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/IORW1 - -SRFF_INSTANCE | iobs/IORW1.REG | iobs/IORW1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IORW1.D | 10157 | ? | 462 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IORW1.Q | 10160 | ? | 462 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOReady.D1 | 10162 | ? | 463 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOReady.D2 | 10163 | ? | 463 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobs/IOReady | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 - -SRFF_INSTANCE | iobs/IOReady.REG | iobs/IOReady | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOReady.D | 10161 | ? | 463 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOReady.Q | 10164 | ? | 467 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU1 | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOU1 | 9866 | ? | 449 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IOU1.SI | iobs/IOU1 | 0 | 2 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOU1.D1 | 10166 | ? | 464 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOU1.D2 | 10167 | ? | 464 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nUDS_FSB_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | iobs/IOU1.CE | 10168 | ? | 465 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | iobs/Load1 - -SRFF_INSTANCE | iobs/IOU1.REG | iobs/IOU1 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOU1.D | 10165 | ? | 464 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | iobs/IOU1.CE | 10168 | ? | 465 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | iobs/Load1 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOU1.Q | 10169 | ? | 449 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RAMDIS2 | MXSE_COPY_0_COPY_0 | 2155877376 | 16 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nCAS_OBUF.EXP | 10585 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RAMDIS2.SI | ram/RAMDIS2 | 0 | 15 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nCAS_OBUF.EXP | 10585 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RAMDIS2.D1 | 10171 | ? | 466 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RAMDIS2.D2 | 10172 | ? | 466 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nCAS_OBUF.EXP -SPPTERM | 3 | IV_TRUE | ram/RAMDIS2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 10 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 10 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf -SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | ram/RAMDIS2.REG | ram/RAMDIS2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RAMDIS2.D | 10170 | ? | 466 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RAMDIS2.Q | 10173 | ? | 466 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | CLK_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | CLK_IOB | 10035 | PI | 428 | 0 | MXSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV -NODE | CLK_IOB_IBUF/FCLK- | 9869 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV - -INPUT_INSTANCE | 0 | 0 | NULL | nBERR_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nBERR_IOB | 10038 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | nDTACK_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP18_.EXP | 10562 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP19_.EXP | 10563 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nDTACK_FSB_OBUF | 9873 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | nDTACK_FSB_OBUF.SI | nDTACK_FSB_OBUF | 0 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP18_.EXP | 10562 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP19_.EXP | 10563 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nDTACK_FSB_OBUF.D1 | 10175 | ? | 467 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nDTACK_FSB_OBUF.D2 | 10176 | ? | 467 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP18_.EXP -SPPTERM | 1 | IV_TRUE | EXP19_.EXP -SPPTERM | 2 | IV_TRUE | BERR_IOBS | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 2 | IV_TRUE | fsb/BERR0r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 2 | IV_TRUE | fsb/BERR1r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 2 | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | Disable -SPPTERM | 2 | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_TRUE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM - -SRFF_INSTANCE | nDTACK_FSB_OBUF.REG | nDTACK_FSB_OBUF | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nDTACK_FSB_OBUF.D | 10174 | ? | 467 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nDTACK_FSB_OBUF.Q | 10177 | ? | 467 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RASEL | MXSE_COPY_0_COPY_0 | 2155873280 | 14 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMCS_OBUF.EXP | 10583 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP27_.EXP | 10595 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RASEL.SI | ram/RASEL | 0 | 13 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMCS_OBUF.EXP | 10583 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP27_.EXP | 10595 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RASEL.D1 | 10179 | ? | 468 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RASEL.D2 | 10180 | ? | 468 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nROMCS_OBUF.EXP -SPPTERM | 1 | IV_TRUE | EXP27_.EXP -SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 -SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> - -SRFF_INSTANCE | ram/RASEL.REG | ram/RASEL | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RASEL.D | 10178 | ? | 468 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RASEL.Q | 10181 | ? | 500 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155877632 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP29_.EXP | 10619 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | ram/RS_FSM_FFd2.EXP | 10620 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | ram/RS_FSM_FFd2.SI | ram/RS_FSM_FFd2 | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP29_.EXP | 10619 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 10183 | ? | 469 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 10184 | ? | 469 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP29_.EXP -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 3 | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_TRUE | ram/BACTr -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr | IV_FALSE | cnt/RefCnt<7> -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | ram/RS_FSM_FFd2.EXP | 10610 | ? | 499 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | cnt/RefDone | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> - -SRFF_INSTANCE | ram/RS_FSM_FFd2.REG | ram/RS_FSM_FFd2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RS_FSM_FFd2.D | 10182 | ? | 469 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RS_FSM_FFd2.Q | 10185 | ? | 499 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 10187 | ? | 470 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 10188 | ? | 470 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | ram/RS_FSM_FFd1.REG | ram/RS_FSM_FFd1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RS_FSM_FFd1.D | 10186 | ? | 470 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RS_FSM_FFd1.Q | 10189 | ? | 499 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155877632 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK25EN_OBUF.EXP | 10616 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK20EN_OBUF$BUF0.EXP | 10617 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK25EN_OBUF.EXP | 10616 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK20EN_OBUF$BUF0.EXP | 10617 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 10191 | ? | 471 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 10192 | ? | 471 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | CLK25EN_OBUF.EXP -SPPTERM | 1 | IV_TRUE | CLK20EN_OBUF$BUF0.EXP -SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_TRUE | ram/Once | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> -SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> -SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7> - -SRFF_INSTANCE | ram/RS_FSM_FFd3.REG | ram/RS_FSM_FFd3 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RS_FSM_FFd3.D | 10190 | ? | 471 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RS_FSM_FFd3.Q | 10193 | ? | 499 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 6 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 10195 | ? | 510 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 10196 | ? | 510 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 -SPPTERM | 5 | IV_FALSE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOREQr | IV_FALSE | iobm/BG - -SRFF_INSTANCE | iobm/IOS_FSM_FFd3.REG | iobm/IOS_FSM_FFd3 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOS_FSM_FFd3.D | 10194 | ? | 510 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOS_FSM_FFd3.Q | 10197 | ? | 535 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/IOS_FSM_FFd1.SI | iobm/IOS_FSM_FFd1 | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 10199 | ? | 511 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 10200 | ? | 511 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 -SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 - -SRFF_INSTANCE | iobm/IOS_FSM_FFd1.REG | iobm/IOS_FSM_FFd1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOS_FSM_FFd1.D | 10198 | ? | 511 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOS_FSM_FFd1.Q | 10201 | ? | 534 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155877376 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/IOS_FSM_FFd2.SI | iobm/IOS_FSM_FFd2 | 0 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 10203 | ? | 512 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 10204 | ? | 512 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 -SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/ETACK -SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr -SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr -SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr - -SRFF_INSTANCE | iobm/IOS_FSM_FFd2.REG | iobm/IOS_FSM_FFd2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOS_FSM_FFd2.D | 10202 | ? | 512 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOS_FSM_FFd2.Q | 10205 | ? | 535 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/PS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP32_.EXP | 10637 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAS_OBUF.EXP | 10638 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 12 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP32_.EXP | 10637 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAS_OBUF.EXP | 10638 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 10207 | ? | 472 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 10208 | ? | 472 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP32_.EXP -SPPTERM | 1 | IV_TRUE | nRAS_OBUF.EXP -SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr -SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/IOACTr -SPPTERM | 4 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 - -SRFF_INSTANCE | iobs/PS_FSM_FFd2.REG | iobs/PS_FSM_FFd2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/PS_FSM_FFd2.D | 10206 | ? | 472 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/PS_FSM_FFd2.Q | 10209 | ? | 497 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobm/ES<0> | MXSE_COPY_0_COPY_0 | 2155877632 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/ES<0>.SI | iobm/ES<0> | 0 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<0>.D1 | 10211 | ? | 513 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<0>.D2 | 10212 | ? | 513 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 -SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/Er -SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_FALSE | iobm/Er2 - -SRFF_INSTANCE | iobm/ES<0>.REG | iobm/ES<0> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<0>.D | 10210 | ? | 513 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<0>.Q | 10213 | ? | 524 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<1> | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/ES<1>.SI | iobm/ES<1> | 0 | 4 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<1>.D1 | 10215 | ? | 514 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<1>.D2 | 10216 | ? | 514 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> -SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> -SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 - -SRFF_INSTANCE | iobm/ES<1>.REG | iobm/ES<1> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<1>.D | 10214 | ? | 514 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<1>.Q | 10217 | ? | 524 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<2> | MXSE_COPY_0_COPY_0 | 2155873536 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/ES<2>.SI | iobm/ES<2> | 0 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<2>.D1 | 10219 | ? | 515 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<2>.D2 | 10220 | ? | 515 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<2> -SPPTERM | 2 | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> -SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 -SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> -SPPTERM | 3 | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> - -SRFF_INSTANCE | iobm/ES<2>.REG | iobm/ES<2> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<2>.D | 10218 | ? | 515 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<2>.Q | 10221 | ? | 524 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 10223 | ? | 473 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 10224 | ? | 473 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2 -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr - -SRFF_INSTANCE | iobs/PS_FSM_FFd1.REG | iobs/PS_FSM_FFd1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/PS_FSM_FFd1.D | 10222 | ? | 473 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/PS_FSM_FFd1.Q | 10225 | ? | 497 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<3> | MXSE_COPY_0_COPY_0 | 2155877376 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/ES<3>.SI | iobm/ES<3> | 0 | 6 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<3>.D1 | 10227 | ? | 516 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<3>.D2 | 10228 | ? | 516 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 -SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/Er -SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/Er2 - -SRFF_INSTANCE | iobm/ES<3>.REG | iobm/ES<3> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<3>.D | 10226 | ? | 516 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<3>.Q | 10229 | ? | 524 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<4> | MXSE_COPY_0_COPY_0 | 2155877376 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/ES<4>.SI | iobm/ES<4> | 0 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<4>.D1 | 10231 | ? | 517 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<4>.D2 | 10232 | ? | 517 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobm/ES<4> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 -SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_TRUE | iobm/Er -SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er2 -SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> - -SRFF_INSTANCE | iobm/ES<4>.REG | iobm/ES<4> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<4>.D | 10230 | ? | 517 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<4>.Q | 10233 | ? | 524 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<0> | MXSE_COPY_0_COPY_0 | 2155877376 | 1 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefCnt<0>.SI | cnt/RefCnt<0> | 0 | 0 | 2 -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<0>.D1 | 10235 | ? | 474 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<0>.D2 | 10236 | ? | 474 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 0 | IV_DC - -SRFF_INSTANCE | cnt/RefCnt<0>.REG | cnt/RefCnt<0> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<0>.D | 10234 | ? | 474 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<0>.Q | 10237 | ? | 486 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<5> | MXSE_COPY_0_COPY_0 | 2155877376 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefCnt<5>.SI | cnt/RefCnt<5> | 0 | 5 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<5>.D1 | 10239 | ? | 475 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<5>.D2 | 10240 | ? | 475 | 4096 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 5 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4> - -SRFF_INSTANCE | cnt/RefCnt<5>.REG | cnt/RefCnt<5> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<5>.D | 10238 | ? | 475 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<5>.Q | 10241 | ? | 499 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<6> | MXSE_COPY_0_COPY_0 | 2155877376 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefCnt<6>.SI | cnt/RefCnt<6> | 0 | 6 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<6>.D1 | 10243 | ? | 476 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<6>.D2 | 10244 | ? | 476 | 4096 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 6 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4> - -SRFF_INSTANCE | cnt/RefCnt<6>.REG | cnt/RefCnt<6> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<6>.D | 10242 | ? | 476 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<6>.Q | 10245 | ? | 499 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOACTr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IOACTr.SI | iobs/IOACTr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOACTr.D1 | 10247 | ? | 477 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOACTr.D2 | 10248 | ? | 477 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | IOACT - -SRFF_INSTANCE | iobs/IOACTr.REG | iobs/IOACTr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOACTr.D | 10246 | ? | 477 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOACTr.Q | 10249 | ? | 493 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<1> | MXSE_COPY_0_COPY_0 | 2155877376 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefCnt<1>.SI | cnt/RefCnt<1> | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<1>.D1 | 10251 | ? | 478 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<1>.D2 | 10252 | ? | 478 | 4096 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cnt/RefCnt<0> - -SRFF_INSTANCE | cnt/RefCnt<1>.REG | cnt/RefCnt<1> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<1>.D | 10250 | ? | 478 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<1>.Q | 10253 | ? | 486 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<2> | MXSE_COPY_0_COPY_0 | 2155877376 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefCnt<2>.SI | cnt/RefCnt<2> | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<2>.D1 | 10255 | ? | 479 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<2>.D2 | 10256 | ? | 479 | 4096 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> - -SRFF_INSTANCE | cnt/RefCnt<2>.REG | cnt/RefCnt<2> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<2>.D | 10254 | ? | 479 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<2>.Q | 10257 | ? | 486 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<3> | MXSE_COPY_0_COPY_0 | 2155877376 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefCnt<3>.SI | cnt/RefCnt<3> | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<3>.D1 | 10259 | ? | 480 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<3>.D2 | 10260 | ? | 480 | 4096 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> - -SRFF_INSTANCE | cnt/RefCnt<3>.REG | cnt/RefCnt<3> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<3>.D | 10258 | ? | 480 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<3>.Q | 10261 | ? | 486 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<4> | MXSE_COPY_0_COPY_0 | 2155877376 | 5 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/RefCnt<4>.SI | cnt/RefCnt<4> | 0 | 4 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<4>.D1 | 10263 | ? | 481 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<4>.D2 | 10264 | ? | 481 | 4096 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> - -SRFF_INSTANCE | cnt/RefCnt<4>.REG | cnt/RefCnt<4> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<4>.D | 10262 | ? | 481 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<4>.Q | 10265 | ? | 486 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_5_OBUF.EXP | 10591 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_2_OBUF.EXP | 10592 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_5_OBUF.EXP | 10591 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_2_OBUF.EXP | 10592 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/Load1.D1 | 10267 | ? | 482 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/Load1.D2 | 10268 | ? | 482 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/Once -SPPTERM | 1 | IV_FALSE | ALE1 -SPPTERM | 1 | IV_TRUE | RA_5_OBUF.EXP -SPPTERM | 1 | IV_TRUE | RA_2_OBUF.EXP -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 - -SRFF_INSTANCE | iobs/Load1.REG | iobs/Load1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/Load1.D | 10266 | ? | 482 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/Load1.Q | 10269 | ? | 503 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | MXSE_COPY_0_COPY_0 | 2155873536 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/BACTr.D1 | 10271 | ? | 483 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/BACTr.D2 | 10272 | ? | 483 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | ram/BACTr.REG | ram/BACTr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/BACTr.D | 10270 | ? | 483 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/BACTr.Q | 10273 | ? | 499 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOACT | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nADoutLE0_OBUF.EXP | 10600 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDinLE_OBUF.EXP | 10601 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IOACT.SI | IOACT | 0 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nADoutLE0_OBUF.EXP | 10600 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDinLE_OBUF.EXP | 10601 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IOACT.D1 | 10275 | ? | 518 | 4096 | IOACT | NULL | NULL | IOACT.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IOACT.D2 | 10276 | ? | 518 | 4096 | IOACT | NULL | NULL | IOACT.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nADoutLE0_OBUF.EXP -SPPTERM | 1 | IV_TRUE | nDinLE_OBUF.EXP -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr -SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BG -SPPTERM | 4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/ETACK -SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr - -SRFF_INSTANCE | IOACT.REG | IOACT | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IOACT.D | 10274 | ? | 518 | 0 | IOACT | NULL | NULL | IOACT.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IOACT.Q | 10277 | ? | 504 | 0 | IOACT | NULL | NULL | IOACT.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | IOBERR | MXSE_COPY_0_COPY_0 | 2155877376 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK.EXP | 10599 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IOBERR.SI | IOBERR | 0 | 12 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK.EXP | 10599 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IOBERR.D1 | 10279 | ? | 519 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IOBERR.D2 | 10280 | ? | 519 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobm/ETACK.EXP -SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR -SPPTERM | 7 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/ETACK -SPPTERM | 7 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/ETACK -SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr -SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr - -SRFF_INSTANCE | IOBERR.REG | IOBERR | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IOBERR.D | 10278 | ? | 519 | 0 | IOBERR | NULL | NULL | IOBERR.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IOBERR.Q | 10281 | ? | 519 | 0 | IOBERR | NULL | NULL | IOBERR.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr0 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | RESr0.SI | RESr0 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RESr0.D1 | 10283 | ? | 484 | 4096 | RESr0 | NULL | NULL | RESr0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RESr0.D2 | 10284 | ? | 484 | 4096 | RESr0 | NULL | NULL | RESr0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nRES_IBUF - -SRFF_INSTANCE | RESr0.REG | RESr0 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RESr0.D | 10282 | ? | 484 | 0 | RESr0 | NULL | NULL | RESr0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RESr0.Q | 10285 | ? | 502 | 0 | RESr0 | NULL | NULL | RESr0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr1 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | RESr1.SI | RESr1 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RESr1.D1 | 10287 | ? | 485 | 4096 | RESr1 | NULL | NULL | RESr1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RESr1.D2 | 10288 | ? | 485 | 4096 | RESr1 | NULL | NULL | RESr1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RESr0 - -SRFF_INSTANCE | RESr1.REG | RESr1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RESr1.D | 10286 | ? | 485 | 0 | RESr1 | NULL | NULL | RESr1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RESr1.Q | 10289 | ? | 502 | 0 | RESr1 | NULL | NULL | RESr1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<7> | MXSE_COPY_0_COPY_0 | 2155877376 | 14 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | cnt/RefCnt<7>.EXP | 10584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | cnt/RefCnt<7>.SI | cnt/RefCnt<7> | 0 | 13 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefCnt<7>.D1 | 10291 | ? | 486 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefCnt<7>.D2 | 10292 | ? | 486 | 4096 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4> -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | cnt/RefCnt<7>.EXP | 10571 | ? | 0 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | SW_1_IBUF -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay1 - -SRFF_INSTANCE | cnt/RefCnt<7>.REG | cnt/RefCnt<7> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefCnt<7>.D | 10290 | ? | 486 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefCnt<7>.Q | 10293 | ? | 499 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | E_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | E_IOB | 10039 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | E_IOB_IBUF | 9904 | ? | 435 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/Er | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IOB_IBUF | 9904 | ? | 435 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF/FCLK- | 9869 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/Er.SI | iobm/Er | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IOB_IBUF | 9904 | ? | 435 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/Er.D1 | 10295 | ? | 435 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/Er.D2 | 10296 | ? | 435 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | E_IOB_IBUF - -SRFF_INSTANCE | iobm/Er.REG | iobm/Er | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/Er.D | 10294 | ? | 435 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_IOB_IBUF/FCLK- | 9869 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/Er.Q | 10297 | ? | 525 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/IOREQr | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOREQ | 9924 | ? | 520 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/IOREQr.SI | iobm/IOREQr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOREQ | 9924 | ? | 520 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOREQr.D1 | 10299 | ? | 520 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOREQr.D2 | 10300 | ? | 520 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | IOREQ - -SRFF_INSTANCE | iobm/IOREQr.REG | iobm/IOREQr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOREQr.D | 10298 | ? | 520 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOREQr.Q | 10301 | ? | 528 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -INPUT_INSTANCE | 0 | 0 | NULL | nIPL2_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nIPL2 | 10040 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nIPL2_IBUF | 9907 | ? | 487 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | IPL2r0 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nIPL2_IBUF | 9907 | ? | 487 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IPL2r0.SI | IPL2r0 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nIPL2_IBUF | 9907 | ? | 487 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IPL2r0.D1 | 10303 | ? | 487 | 4096 | IPL2r0 | NULL | NULL | IPL2r0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IPL2r0.D2 | 10304 | ? | 487 | 4096 | IPL2r0 | NULL | NULL | IPL2r0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nIPL2_IBUF - -SRFF_INSTANCE | IPL2r0.REG | IPL2r0 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IPL2r0.D | 10302 | ? | 487 | 0 | IPL2r0 | NULL | NULL | IPL2r0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IPL2r0.Q | 10305 | ? | 502 | 0 | IPL2r0 | NULL | NULL | IPL2r0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr2 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | RESr2.SI | RESr2 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RESr2.D1 | 10307 | ? | 488 | 4096 | RESr2 | NULL | NULL | RESr2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RESr2.D2 | 10308 | ? | 488 | 4096 | RESr2 | NULL | NULL | RESr2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RESr1 - -SRFF_INSTANCE | RESr2.REG | RESr2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RESr2.D | 10306 | ? | 488 | 0 | RESr2 | NULL | NULL | RESr2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RESr2.Q | 10309 | ? | 502 | 0 | RESr2 | NULL | NULL | RESr2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | RefAck | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | RefAck.SI | RefAck | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RefAck.D1 | 10311 | ? | 489 | 4096 | RefAck | NULL | NULL | RefAck.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RefAck.D2 | 10312 | ? | 489 | 4096 | RefAck | NULL | NULL | RefAck.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 - -SRFF_INSTANCE | RefAck.REG | RefAck | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RefAck.D | 10310 | ? | 489 | 0 | RefAck | NULL | NULL | RefAck.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RefAck.Q | 10313 | ? | 439 | 0 | RefAck | NULL | NULL | RefAck.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | nBG_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nBG_IOB | 10041 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nBG_IOB_IBUF | 9911 | ? | 521 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BGr0 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBG_IOB_IBUF | 9911 | ? | 521 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/BGr0.SI | iobm/BGr0 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBG_IOB_IBUF | 9911 | ? | 521 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/BGr0.D1 | 10315 | ? | 521 | 4096 | iobm/BGr0 | NULL | NULL | iobm/BGr0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/BGr0.D2 | 10316 | ? | 521 | 4096 | iobm/BGr0 | NULL | NULL | iobm/BGr0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nBG_IOB_IBUF - -SRFF_INSTANCE | iobm/BGr0.REG | iobm/BGr0 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/BGr0.D | 10314 | ? | 521 | 0 | iobm/BGr0 | NULL | NULL | iobm/BGr0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/BGr0.Q | 10317 | ? | 536 | 0 | iobm/BGr0 | NULL | NULL | iobm/BGr0.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -INPUT_INSTANCE | 0 | 0 | NULL | nDTACK_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nDTACK_IOB | 10042 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/DTACKrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/DTACKrf.SI | iobm/DTACKrf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/DTACKrf.D1 | 10319 | ? | 522 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/DTACKrf.D2 | 10320 | ? | 522 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF - -SRFF_INSTANCE | iobm/DTACKrf.REG | iobm/DTACKrf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/DTACKrf.D | 10318 | ? | 522 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/DTACKrf.Q | 10321 | ? | 519 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DTACKrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/DTACKrr.SI | iobm/DTACKrr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/DTACKrr.D1 | 10323 | ? | 523 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/DTACKrr.D2 | 10324 | ? | 523 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF - -SRFF_INSTANCE | iobm/DTACKrr.REG | iobm/DTACKrr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/DTACKrr.D | 10322 | ? | 523 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/DTACKrr.Q | 10325 | ? | 519 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | MXSE_COPY_0_COPY_0 | 2155873280 | 19 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobm/ETACK.EXP | 10599 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 18 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ETACK.D1 | 10327 | ? | 524 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ETACK.D2 | 10328 | ? | 524 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 6 | IV_FALSE | nVMA_IOBout | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobm/ETACK.EXP | 10596 | ? | 519 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr -SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr -SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr -SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr - -SRFF_INSTANCE | iobm/ETACK.REG | iobm/ETACK | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ETACK.D | 10326 | ? | 524 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ETACK.Q | 10329 | ? | 519 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/Er2 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/Er2.SI | iobm/Er2 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/Er2.D1 | 10331 | ? | 525 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/Er2.D2 | 10332 | ? | 525 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobm/Er - -SRFF_INSTANCE | iobm/Er2.REG | iobm/Er2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/Er2.D | 10330 | ? | 525 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/Er2.Q | 10333 | ? | 517 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -INPUT_INSTANCE | 0 | 0 | NULL | nVPA_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nVPA_IOB | 10043 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/VPArf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/VPArf | 9919 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/VPArf.SI | iobm/VPArf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/VPArf.D1 | 10335 | ? | 526 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/VPArf.D2 | 10336 | ? | 526 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF - -SRFF_INSTANCE | iobm/VPArf.REG | iobm/VPArf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/VPArf.D | 10334 | ? | 526 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/VPArf.Q | 10337 | ? | 504 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/VPArr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/VPArr | 9920 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/VPArr.SI | iobm/VPArr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/VPArr.D1 | 10339 | ? | 527 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/VPArr.D2 | 10340 | ? | 527 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF - -SRFF_INSTANCE | iobm/VPArr.REG | iobm/VPArr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/VPArr.D | 10338 | ? | 527 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/VPArr.Q | 10341 | ? | 504 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | RESDone | MXSE_COPY_0_COPY_0 | 2155873280 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | RESDone | 9921 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RESDone.EXP | 10640 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RESDone.SI | RESDone | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RESDone.D1 | 10343 | ? | 490 | 4096 | RESDone | NULL | NULL | RESDone.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RESDone.D2 | 10344 | ? | 490 | 6144 | RESDone | NULL | NULL | RESDone.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 0 | IV_DC -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RESDone.EXP | 10627 | ? | 0 | 0 | RESDone | NULL | NULL | RESDone.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | RESDone.CE | 10345 | ? | 491 | 4096 | RESDone | NULL | NULL | RESDone.SI | 10 | 9 | MC_SI_CE -SPPTERM | 3 | IV_FALSE | RESr0 | IV_FALSE | RESr1 | IV_TRUE | RESr2 - -SRFF_INSTANCE | RESDone.REG | RESDone | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RESDone.D | 10342 | ? | 490 | 0 | RESDone | NULL | NULL | RESDone.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | RESDone.CE | 10345 | ? | 491 | 4096 | RESDone | NULL | NULL | RESDone.SI | 10 | 9 | MC_SI_CE -SPPTERM | 3 | IV_FALSE | RESr0 | IV_FALSE | RESr1 | IV_TRUE | RESr2 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RESDone.Q | 10346 | ? | 502 | 0 | RESDone | NULL | NULL | RESDone.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ALE0M | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ALE0M | 9922 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ALE0M.SI | ALE0M | 0 | 5 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ALE0M.D1 | 10348 | ? | 528 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ALE0M.D2 | 10349 | ? | 528 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 -SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOREQr | IV_FALSE | iobm/BG - -SRFF_INSTANCE | ALE0M.REG | ALE0M | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ALE0M.D | 10347 | ? | 528 | 0 | ALE0M | NULL | NULL | ALE0M.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ALE0M.Q | 10350 | ? | 0 | 0 | ALE0M | NULL | NULL | ALE0M.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ALE0S | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ALE0S | 9923 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ALE0S.SI | ALE0S | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ALE0S.D1 | 10352 | ? | 492 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ALE0S.D2 | 10353 | ? | 492 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 - -SRFF_INSTANCE | ALE0S.REG | ALE0S | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ALE0S.D | 10351 | ? | 492 | 0 | ALE0S | NULL | NULL | ALE0S.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ALE0S.Q | 10354 | ? | 0 | 0 | ALE0S | NULL | NULL | ALE0S.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOREQ | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAMUWE_OBUF.EXP | 10641 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP33_.EXP | 10642 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IOREQ | 9924 | ? | 520 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IOREQ.SI | IOREQ | 0 | 12 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAMUWE_OBUF.EXP | 10641 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP33_.EXP | 10642 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IOREQ.D1 | 10356 | ? | 493 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IOREQ.D2 | 10357 | ? | 493 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nRAMUWE_OBUF.EXP -SPPTERM | 1 | IV_TRUE | EXP33_.EXP -SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr -SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 - -SRFF_INSTANCE | IOREQ.REG | IOREQ | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IOREQ.D | 10355 | ? | 493 | 0 | IOREQ | NULL | NULL | IOREQ.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IOREQ.Q | 10358 | ? | 520 | 0 | IOREQ | NULL | NULL | IOREQ.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | IPL2r1 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | IPL2r1 | 9925 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | IPL2r1.SI | IPL2r1 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | IPL2r1.D1 | 10360 | ? | 494 | 4096 | IPL2r1 | NULL | NULL | IPL2r1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | IPL2r1.D2 | 10361 | ? | 494 | 4096 | IPL2r1 | NULL | NULL | IPL2r1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | IPL2r0 - -SRFF_INSTANCE | IPL2r1.REG | IPL2r1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | IPL2r1.D | 10359 | ? | 494 | 0 | IPL2r1 | NULL | NULL | IPL2r1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | IPL2r1.Q | 10362 | ? | 502 | 0 | IPL2r1 | NULL | NULL | IPL2r1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | fsb/ASrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | fsb/ASrf.SI | fsb/ASrf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/ASrf.D1 | 10364 | ? | 495 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/ASrf.D2 | 10365 | ? | 495 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nAS_FSB_IBUF - -SRFF_INSTANCE | fsb/ASrf.REG | fsb/ASrf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/ASrf.D | 10363 | ? | 495 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/ASrf.Q | 10366 | ? | 499 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/BERRrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/BERRrf.SI | iobm/BERRrf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/BERRrf.D1 | 10368 | ? | 529 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/BERRrf.D2 | 10369 | ? | 529 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF - -SRFF_INSTANCE | iobm/BERRrf.REG | iobm/BERRrf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/BERRrf.D | 10367 | ? | 529 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/BERRrf.Q | 10370 | ? | 519 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BERRrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/BERRrr.SI | iobm/BERRrr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/BERRrr.D1 | 10372 | ? | 530 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/BERRrr.D2 | 10373 | ? | 530 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF - -SRFF_INSTANCE | iobm/BERRrr.REG | iobm/BERRrr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/BERRrr.D | 10371 | ? | 530 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/BERRrr.Q | 10374 | ? | 519 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BGr1 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/BGr1 | 9929 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/BGr1.SI | iobm/BGr1 | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/BGr1.D1 | 10376 | ? | 531 | 4096 | iobm/BGr1 | NULL | NULL | iobm/BGr1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/BGr1.D2 | 10377 | ? | 531 | 4096 | iobm/BGr1 | NULL | NULL | iobm/BGr1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobm/BGr0 - -SRFF_INSTANCE | iobm/BGr1.REG | iobm/BGr1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/BGr1.D | 10375 | ? | 531 | 0 | iobm/BGr1 | NULL | NULL | iobm/BGr1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/BGr1.Q | 10378 | ? | 536 | 0 | iobm/BGr1 | NULL | NULL | iobm/BGr1.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/RESrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/RESrf.SI | iobm/RESrf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/RESrf.D1 | 10380 | ? | 532 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/RESrf.D2 | 10381 | ? | 532 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nRES_IBUF - -SRFF_INSTANCE | iobm/RESrf.REG | iobm/RESrf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/RESrf.D | 10379 | ? | 532 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/RESrf.Q | 10382 | ? | 519 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/RESrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/RESrr.SI | iobm/RESrr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/RESrr.D1 | 10384 | ? | 533 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/RESrr.D2 | 10385 | ? | 533 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nRES_IBUF - -SRFF_INSTANCE | iobm/RESrr.REG | iobm/RESrr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/RESrr.D | 10383 | ? | 533 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/RESrr.Q | 10386 | ? | 519 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | MXSE_COPY_0_COPY_0 | 2155873280 | 17 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/Clear1 | 9932 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobs/Clear1.EXP | 10569 | ? | 457 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 16 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/Clear1.D1 | 10388 | ? | 497 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/Clear1.D2 | 10389 | ? | 497 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobs/Clear1.EXP | 10555 | ? | 457 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 11 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady -SPPTERM | 11 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady -SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 -SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 - -SRFF_INSTANCE | iobs/Clear1.REG | iobs/Clear1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/Clear1.D | 10387 | ? | 497 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/Clear1.Q | 10390 | ? | 503 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMDIS1 | MXSE_COPY_0_COPY_0 | 2155873280 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP24_.EXP | 10587 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_4_OBUF.EXP | 10588 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RAMDIS1.SI | ram/RAMDIS1 | 0 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP24_.EXP | 10587 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_4_OBUF.EXP | 10588 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RAMDIS1.D1 | 10392 | ? | 498 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RAMDIS1.D2 | 10393 | ? | 498 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP24_.EXP -SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 -SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 -SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | ram/RAMDIS1.REG | ram/RAMDIS1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RAMDIS1.D | 10391 | ? | 498 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RAMDIS1.Q | 10394 | ? | 0 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RAMReady | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_1_OBUF.EXP | 10612 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP30_.EXP | 10621 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RAMReady.SI | ram/RAMReady | 0 | 12 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_1_OBUF.EXP | 10612 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP30_.EXP | 10621 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RAMReady.D1 | 10396 | ? | 499 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RAMReady.D2 | 10397 | ? | 499 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RA_1_OBUF.EXP -SPPTERM | 1 | IV_TRUE | EXP30_.EXP -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 - -SRFF_INSTANCE | ram/RAMReady.REG | ram/RAMReady | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RAMReady.D | 10395 | ? | 499 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RAMReady.Q | 10398 | ? | 467 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_1_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<1> | 10044 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_1_IBUF | 9935 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_2_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<2> | 10045 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_2_IBUF | 9936 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_3_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<3> | 10046 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_3_IBUF | 9937 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_4_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<4> | 10047 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_4_IBUF | 9938 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_5_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<5> | 10048 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_5_IBUF | 9939 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_6_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<6> | 10049 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_6_IBUF | 9940 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_7_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<7> | 10050 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_7_IBUF | 9941 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | OptxMapped | RA_0_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_1_IBUF | 9935 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_0_OBUF | 9942 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | RA_0_OBUF.SI | RA_0_OBUF | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_1_IBUF | 9935 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_0_OBUF.D1 | 10400 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_0_OBUF.D2 | 10401 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_1_IBUF - -SRFF_INSTANCE | RA_0_OBUF.REG | RA_0_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_0_OBUF.D | 10399 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_0_OBUF.Q | 10402 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_1_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB.EXP | 10613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_1_OBUF | 9943 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_1_OBUF.EXP | 10612 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RA_1_OBUF.SI | RA_1_OBUF | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB.EXP | 10613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_1_OBUF.D1 | 10404 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_1_OBUF.D2 | 10405 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | TimeoutB.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_1_OBUF.EXP | 10602 | ? | 499 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 -SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | RA_1_OBUF.REG | RA_1_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_1_OBUF.D | 10403 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_1_OBUF.Q | 10406 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_2_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_6_OBUF.EXP | 10593 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_2_OBUF | 9944 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_2_OBUF.EXP | 10592 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RA_2_OBUF.SI | RA_2_OBUF | 0 | 11 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_6_OBUF.EXP | 10593 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_2_OBUF.D1 | 10408 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_2_OBUF.D2 | 10409 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RA_6_OBUF.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_2_OBUF.EXP | 10579 | ? | 482 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF -SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 - -SRFF_INSTANCE | RA_2_OBUF.REG | RA_2_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_2_OBUF.D | 10407 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_2_OBUF.Q | 10410 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_3_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 5 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_4_IBUF | 9938 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_6_IBUF | 9940 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_3_OBUF | 9945 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_3_OBUF.EXP | 10590 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RA_3_OBUF.SI | RA_3_OBUF | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_4_IBUF | 9938 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_6_IBUF | 9940 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_3_OBUF.D1 | 10412 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_3_OBUF.D2 | 10413 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_4_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_3_OBUF.EXP | 10577 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_6_IBUF - -SRFF_INSTANCE | RA_3_OBUF.REG | RA_3_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_3_OBUF.D | 10411 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_3_OBUF.Q | 10414 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_4_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 15 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP25_.EXP | 10589 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_4_OBUF | 9946 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_4_OBUF.EXP | 10588 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RA_4_OBUF.SI | RA_4_OBUF | 0 | 15 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP25_.EXP | 10589 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_4_OBUF.D1 | 10416 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_4_OBUF.D2 | 10417 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP25_.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_4_OBUF.EXP | 10575 | ? | 498 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 6 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | RA_4_OBUF.REG | RA_4_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_4_OBUF.D | 10415 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_4_OBUF.Q | 10418 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_3_OBUF.EXP | 10590 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_5_OBUF | 9947 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_5_OBUF.EXP | 10591 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 8 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_3_OBUF.EXP | 10590 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_5_OBUF.D1 | 10420 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_5_OBUF.D2 | 10421 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RA_3_OBUF.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_5_OBUF.EXP | 10578 | ? | 482 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF - -SRFF_INSTANCE | RA_5_OBUF.REG | RA_5_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_5_OBUF.D | 10419 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_5_OBUF.Q | 10422 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 5 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_7_IBUF | 9941 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_3_IBUF | 9937 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_6_OBUF | 9948 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_6_OBUF.EXP | 10593 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_7_IBUF | 9941 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_3_IBUF | 9937 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_6_OBUF.D1 | 10424 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_6_OBUF.D2 | 10425 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_7_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_6_OBUF.EXP | 10580 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | A_FSB_12_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_3_IBUF - -SRFF_INSTANCE | RA_6_OBUF.REG | RA_6_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_6_OBUF.D | 10423 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_6_OBUF.Q | 10426 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_7_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_7_OBUF | 9949 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | RA_7_OBUF.SI | RA_7_OBUF | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_7_OBUF.D1 | 10428 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_7_OBUF.D2 | 10429 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | ram/RASEL -SPPTERM | 2 | IV_TRUE | A_FSB_17_IBUF | IV_FALSE | ram/RASEL - -SRFF_INSTANCE | RA_7_OBUF.REG | RA_7_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_7_OBUF.D | 10427 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_7_OBUF.Q | 10430 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF$BUF0.EXP | 10614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_8_OBUF | 9950 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF$BUF0.EXP | 10614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_8_OBUF.D1 | 10432 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_8_OBUF.D2 | 10433 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF$BUF0.EXP -SPPTERM | 2 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_18_IBUF -SPPTERM | 2 | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_18_IBUF -SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | cs/nOverlay1 -SPPTERM | 3 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | cs/nOverlay1 - -SRFF_INSTANCE | RA_8_OBUF.REG | RA_8_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_8_OBUF.D | 10431 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_8_OBUF.Q | 10434 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | RA_9_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_9_OBUF | 9951 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_9_OBUF.EXP | 10615 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | RA_9_OBUF.SI | RA_9_OBUF | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_9_OBUF.D1 | 10436 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_9_OBUF.D2 | 10437 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | ram/RASEL -SPPTERM | 2 | IV_TRUE | A_FSB_19_IBUF | IV_FALSE | ram/RASEL -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_9_OBUF.EXP | 10605 | ? | 467 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady - -SRFF_INSTANCE | RA_9_OBUF.REG | RA_9_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_9_OBUF.D | 10435 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_9_OBUF.Q | 10438 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | nBERR_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 12 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP34_.EXP | 10643 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nBERR_FSB_OBUF | 9952 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nBERR_FSB_OBUF.EXP | 10644 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nBERR_FSB_OBUF.SI | nBERR_FSB_OBUF | 0 | 12 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP34_.EXP | 10643 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nBERR_FSB_OBUF.D1 | 10440 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nBERR_FSB_OBUF.D2 | 10441 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nAS_FSB_IBUF -SPPTERM | 1 | IV_TRUE | EXP34_.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nBERR_FSB_OBUF.EXP | 10631 | ? | 440 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_TRUE | nWE_FSB_IBUF -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_TRUE | SW_1_IBUF -SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 - -SRFF_INSTANCE | nBERR_FSB_OBUF.REG | nBERR_FSB_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nBERR_FSB_OBUF.D | 10439 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nBERR_FSB_OBUF.Q | 10442 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nOE_OBUF | 9953 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nOE_OBUF.EXP | 10586 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 10 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nOE_OBUF.D1 | 10444 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nOE_OBUF.D2 | 10445 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nOE_OBUF.EXP | 10573 | ? | 498 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> - -SRFF_INSTANCE | nOE_OBUF.REG | nOE_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nOE_OBUF.D | 10443 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nOE_OBUF.Q | 10446 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 26 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nROMWE_OBUF | 9954 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nROMWE_OBUF.EXP | 10568 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 26 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nROMWE_OBUF.D1 | 10448 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nROMWE_OBUF.D2 | 10449 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nROMWE_OBUF.EXP | 10554 | ? | 459 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | Disable | IV_FALSE | $OpTx$FX_DC$708.UIM | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM -SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | Disable | IV_FALSE | $OpTx$FX_DC$708.UIM | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM - -SRFF_INSTANCE | nROMWE_OBUF.REG | nROMWE_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nROMWE_OBUF.D | 10447 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nROMWE_OBUF.Q | 10450 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | Inv+OptxMapped | nVPA_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nVPA_FSB_OBUF | 9955 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | nVPA_FSB_OBUF.SI | nVPA_FSB_OBUF | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 10452 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 10453 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF - -SRFF_INSTANCE | nVPA_FSB_OBUF.REG | nVPA_FSB_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nVPA_FSB_OBUF.D | 10451 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nVPA_FSB_OBUF.Q | 10454 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE0M | 9922 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE0S | 9923 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nADoutLE0_OBUF | 9956 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nADoutLE0_OBUF.EXP | 10600 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 7 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE0M | 9922 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE0S | 9923 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nADoutLE0_OBUF.D1 | 10456 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nADoutLE0_OBUF.D2 | 10457 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | ALE0M | IV_FALSE | ALE0S -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nADoutLE0_OBUF.EXP | 10597 | ? | 518 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr - -SRFF_INSTANCE | nADoutLE0_OBUF.REG | nADoutLE0_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nADoutLE0_OBUF.D | 10455 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nADoutLE0_OBUF.Q | 10458 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nCAS_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 17 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nCAS_OBUF | 9957 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nCAS_OBUF.EXP | 10585 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nCAS_OBUF.SI | nCAS_OBUF | 0 | 16 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nCAS_OBUF.D1 | 10460 | ? | 500 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nCAS_OBUF.D2 | 10461 | ? | 500 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | ram/RASEL -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nCAS_OBUF.EXP | 10572 | ? | 466 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | nCAS_OBUF.REG | nCAS_OBUF | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nCAS_OBUF.D | 10459 | ? | 500 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nCAS_OBUF.Q | 10462 | ? | 0 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nDinLE_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nDinLE_OBUF | 9958 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nDinLE_OBUF.EXP | 10601 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nDinLE_OBUF.SI | nDinLE_OBUF | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nDinLE_OBUF.D1 | 10464 | ? | 534 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nDinLE_OBUF.D2 | 10465 | ? | 534 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nDinLE_OBUF.EXP | 10598 | ? | 518 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr - -SRFF_INSTANCE | nDinLE_OBUF.REG | nDinLE_OBUF | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nDinLE_OBUF.D | 10463 | ? | 534 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nDinLE_OBUF.Q | 10466 | ? | 0 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | OptxMapped | nDinOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nDinOE_OBUF | 9959 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | nDinOE_OBUF.SI | nDinOE_OBUF | 0 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nDinOE_OBUF.D1 | 10468 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nDinOE_OBUF.D2 | 10469 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | SW_1_IBUF - -SRFF_INSTANCE | nDinOE_OBUF.REG | nDinOE_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nDinOE_OBUF.D | 10467 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nDinOE_OBUF.Q | 10470 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped | nDoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nDoutOE_OBUF | 9960 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | nDoutOE_OBUF.SI | nDoutOE_OBUF | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nDoutOE_OBUF.D1 | 10472 | ? | 535 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nDoutOE_OBUF.D2 | 10473 | ? | 535 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | IORW0 -SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 - -SRFF_INSTANCE | nDoutOE_OBUF.REG | nDoutOE_OBUF | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nDoutOE_OBUF.D | 10471 | ? | 535 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nDoutOE_OBUF.Q | 10474 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 14 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAMLWE_OBUF.EXP | 10639 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nRAS_OBUF | 9961 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nRAS_OBUF.EXP | 10638 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 14 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAMLWE_OBUF.EXP | 10639 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nRAS_OBUF.D1 | 10476 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nRAS_OBUF.D2 | 10477 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nRAMLWE_OBUF.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nRAS_OBUF.EXP | 10625 | ? | 472 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 7 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 - -SRFF_INSTANCE | nRAS_OBUF.REG | nRAS_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nRAS_OBUF.D | 10475 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nRAS_OBUF.Q | 10478 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | A_FSB_19_IBUF$BUF0 | 9962 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | A_FSB_19_IBUF$BUF0.EXP | 10636 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 7 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 10480 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 10481 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10623 | ? | 444 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2 -SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd1 -SPPTERM | 2 | IV_TRUE | iobs/Once | IV_TRUE | ALE1 -SPPTERM | 3 | IV_TRUE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | ALE1 - -SRFF_INSTANCE | A_FSB_19_IBUF$BUF0.REG | A_FSB_19_IBUF$BUF0 | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | A_FSB_19_IBUF$BUF0.D | 10479 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | A_FSB_19_IBUF$BUF0.Q | 10482 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | A_FSB_21_IBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 6 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | A_FSB_21_IBUF$BUF0 | 9963 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | A_FSB_21_IBUF$BUF0.EXP | 10614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | A_FSB_21_IBUF$BUF0.SI | A_FSB_21_IBUF$BUF0 | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 10484 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 10485 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | A_FSB_21_IBUF$BUF0.EXP | 10604 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/RASEL -SPPTERM | 6 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/RASEL - -SRFF_INSTANCE | A_FSB_21_IBUF$BUF0.REG | A_FSB_21_IBUF$BUF0 | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | A_FSB_21_IBUF$BUF0.D | 10483 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | A_FSB_21_IBUF$BUF0.Q | 10486 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q - -INPUT_INSTANCE | 0 | 0 | NULL | CLK20EN_OBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | SW<0> | 10051 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | OptxMapped | CLK20EN_OBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | CLK20EN_OBUF$BUF0 | 9965 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.Q | CLK20EN_OBUF$BUF0 | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | CLK20EN_OBUF$BUF0.EXP | 10617 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | CLK20EN_OBUF$BUF0.SI | CLK20EN_OBUF$BUF0 | 0 | 10 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | CLK20EN_OBUF$BUF0.D1 | 10488 | ? | 0 | 4096 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | CLK20EN_OBUF$BUF0.D2 | 10489 | ? | 0 | 4096 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | CLK20EN_OBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | CLK20EN_OBUF$BUF0.EXP | 10607 | ? | 471 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf - -SRFF_INSTANCE | CLK20EN_OBUF$BUF0.REG | CLK20EN_OBUF$BUF0 | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | CLK20EN_OBUF$BUF0.D | 10487 | ? | 0 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | CLK20EN_OBUF$BUF0.Q | 10490 | ? | 0 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | OptxMapped | CLK25EN_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | CLK25EN_OBUF | 9966 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.Q | CLK25EN_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | CLK25EN_OBUF.EXP | 10616 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | CLK25EN_OBUF.SI | CLK25EN_OBUF | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | CLK25EN_OBUF.D1 | 10492 | ? | 0 | 4096 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | CLK25EN_OBUF.D2 | 10493 | ? | 0 | 4096 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | CLK20EN_OBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | CLK25EN_OBUF.EXP | 10606 | ? | 471 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | CLK25EN_OBUF.REG | CLK25EN_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | CLK25EN_OBUF.D | 10491 | ? | 0 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | CLK25EN_OBUF.Q | 10494 | ? | 0 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldHigh+OptxMapped | Park | MXSE_COPY_0_COPY_0 | 2155872768 | 14 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESDone | 9921 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IPL2r1 | 9925 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | Park | 9967 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | Park.EXP | 10646 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | Park.SI | Park | 0 | 13 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESDone | 9921 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IPL2r1 | 9925 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | Park.D1 | 10496 | ? | 501 | 4096 | Park | NULL | NULL | Park.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | Park.D2 | 10497 | ? | 501 | 6144 | Park | NULL | NULL | Park.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | Park.EXP | 10633 | ? | 440 | 0 | Park | NULL | NULL | Park.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/Once -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/Once -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/Once -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/Once -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | Park.CE | 10498 | ? | 502 | 4096 | Park | NULL | NULL | Park.SI | 10 | 9 | MC_SI_CE -SPPTERM | 6 | IV_TRUE | RESr0 | IV_TRUE | RESr1 | IV_TRUE | IPL2r0 | IV_TRUE | RESr2 | IV_FALSE | RESDone | IV_TRUE | IPL2r1 - -SRFF_INSTANCE | Park.REG | Park | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | Park.D | 10495 | ? | 501 | 0 | Park | NULL | NULL | Park.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | Park.CE | 10498 | ? | 502 | 4096 | Park | NULL | NULL | Park.SI | 10 | 9 | MC_SI_CE -SPPTERM | 6 | IV_TRUE | RESr0 | IV_TRUE | RESr1 | IV_TRUE | IPL2r0 | IV_TRUE | RESr2 | IV_FALSE | RESDone | IV_TRUE | IPL2r1 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | Park.Q | 10499 | ? | 467 | 0 | Park | NULL | NULL | Park.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | nADoutLE1_OBUF | MXSE_COPY_0_COPY_0 | 2155873024 | 4 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1 | 9932 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nADoutLE1_OBUF | 9969 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | nADoutLE1_OBUF.SI | nADoutLE1_OBUF | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1 | 9932 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nADoutLE1_OBUF.D1 | 10501 | ? | 503 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nADoutLE1_OBUF.D2 | 10502 | ? | 503 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/Load1 -SPPTERM | 2 | IV_FALSE | iobs/Clear1 | IV_FALSE | ALE1 - -SRFF_INSTANCE | nADoutLE1_OBUF.REG | nADoutLE1_OBUF | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nADoutLE1_OBUF.D | 10500 | ? | 503 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nADoutLE1_OBUF.Q | 10503 | ? | 503 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldHigh+OptxMapped | nAoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872768 | 5 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BGr1 | 9929 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_IOBout | 9833 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nAoutOE_OBUF$Q | 9971 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 4 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BGr1 | 9929 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_IOBout | 9833 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nAoutOE_OBUF.D1 | 10505 | ? | 536 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nAoutOE_OBUF.D2 | 10506 | ? | 536 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | iobm/BGr0 | IV_FALSE | iobm/BGr1 -SPPTERM | 2 | IV_FALSE | iobm/BGr1 | IV_TRUE | iobm/BG -SPPTERM | 3 | IV_FALSE | nAS_IOBout | IV_FALSE | iobm/BGr0 | IV_FALSE | iobm/BG - -SRFF_INSTANCE | nAoutOE_OBUF.REG | nAoutOE_OBUF | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nAoutOE_OBUF.D | 10504 | ? | 536 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nAoutOE_OBUF.Q | 10507 | ? | 536 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nRAMLWE_OBUF | 9973 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nRAMLWE_OBUF.EXP | 10639 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 10 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nRAMLWE_OBUF.D1 | 10509 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nRAMLWE_OBUF.D2 | 10510 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nRAMLWE_OBUF.EXP | 10626 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | RefAck -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 - -SRFF_INSTANCE | nRAMLWE_OBUF.REG | nRAMLWE_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nRAMLWE_OBUF.D | 10508 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nRAMLWE_OBUF.Q | 10511 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESDone.EXP | 10640 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nRAMUWE_OBUF | 9974 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nRAMUWE_OBUF.EXP | 10641 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 10 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RESDone.EXP | 10640 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nRAMUWE_OBUF.D1 | 10513 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nRAMUWE_OBUF.D2 | 10514 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RESDone.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nRAMUWE_OBUF.EXP | 10628 | ? | 493 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 - -SRFF_INSTANCE | nRAMUWE_OBUF.REG | nRAMUWE_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nRAMUWE_OBUF.D | 10512 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nRAMUWE_OBUF.Q | 10515 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 13 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7>.EXP | 10584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nROMCS_OBUF | 9975 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nROMCS_OBUF.EXP | 10583 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 13 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7>.EXP | 10584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nROMCS_OBUF.D1 | 10517 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nROMCS_OBUF.D2 | 10518 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cnt/RefCnt<7>.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nROMCS_OBUF.EXP | 10570 | ? | 468 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf -SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | nROMCS_OBUF.REG | nROMCS_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nROMCS_OBUF.D | 10516 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nROMCS_OBUF.Q | 10519 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q - -OUTPUT_INSTANCE | 0 | nVMA_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nVMA_IOBout$Q | 9829 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | nVMA_IOBout$OE | 9831 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.BUFOE.OUT | nVMA_IOBout | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nVMA_IOB | 9976 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nAS_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nAS_IOBout$Q | 9832 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | nAS_IOBout$OE | 9834 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.BUFOE.OUT | nAS_IOBout | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nAS_IOB | 9977 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nLDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nLDS_IOBout | 9835 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.Q | nLDS_IOBout | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | nLDS_IOBout$OE | 9836 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.BUFOE.OUT | nLDS_IOBout | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nLDS_IOB | 9978 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nUDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nUDS_IOBout | 9837 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.Q | nUDS_IOBout | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | nUDS_IOBout$OE | 9838 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.BUFOE.OUT | nUDS_IOBout | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nUDS_IOB | 9979 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nDTACK_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nDTACK_FSB_OBUF | 9873 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDTACK_FSB | 9980 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<0> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_0_OBUF | 9942 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<0> | 9981 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<1> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_1_OBUF | 9943 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<1> | 9982 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<2> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_2_OBUF | 9944 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<2> | 9983 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<3> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_3_OBUF | 9945 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<3> | 9984 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<4> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_4_OBUF | 9946 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<4> | 9985 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<5> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_5_OBUF | 9947 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<5> | 9986 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<6> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_6_OBUF | 9948 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<6> | 9987 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<7> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_7_OBUF | 9949 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<7> | 9988 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<8> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_8_OBUF | 9950 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<8> | 9989 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<9> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_9_OBUF | 9951 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<9> | 9990 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nBERR_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nBERR_FSB_OBUF | 9952 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nBERR_FSB | 9991 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nOE_OBUF | 9953 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nOE | 9992 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nROMWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nROMWE_OBUF | 9954 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nROMWE | 9993 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nVPA_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nVPA_FSB_OBUF | 9955 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nVPA_FSB | 9994 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nADoutLE0 | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nADoutLE0_OBUF | 9956 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nADoutLE0 | 9995 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nCAS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nCAS_OBUF | 9957 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nCAS | 9996 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nDinLE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nDinLE_OBUF | 9958 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDinLE | 9997 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nDinOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nDinOE_OBUF | 9959 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDinOE | 9998 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nDoutOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nDoutOE_OBUF | 9960 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDoutOE | 9999 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nRAS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nRAS_OBUF | 9961 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nRAS | 10000 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<11> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | A_FSB_19_IBUF$BUF0 | 9962 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<11> | 10001 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | RA<10> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | A_FSB_21_IBUF$BUF0 | 9963 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<10> | 10002 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | CLK20EN | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | CLK20EN_OBUF$BUF0 | 9965 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.Q | CLK20EN_OBUF$BUF0 | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | CLK20EN | 10003 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | CLK25EN | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | CLK25EN_OBUF | 9966 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.Q | CLK25EN_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | CLK25EN | 10004 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK25EN | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nBR_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | Park | 9967 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nBR_IOB | 10005 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBR_IOB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nADoutLE1 | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nADoutLE1_OBUF | 9969 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nADoutLE1 | 10006 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nAoutOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nAoutOE_OBUF$Q | 9971 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nAoutOE | 10007 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nRAMLWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nRAMLWE_OBUF | 9973 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nRAMLWE | 10008 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nRAMUWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nRAMUWE_OBUF | 9974 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nRAMUWE | 10009 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nROMCS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nROMCS_OBUF | 9975 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nROMCS | 10010 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT - -MACROCELL_INSTANCE | SoftPfbk | $OpTx$FX_DC$708 | MXSE_COPY_0_COPY_0 | 2181038080 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | $OpTx$FX_DC$708.SI | $OpTx$FX_DC$708 | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | $OpTx$FX_DC$708.D1 | 10521 | ? | 459 | 4096 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | $OpTx$FX_DC$708.D2 | 10522 | ? | 459 | 4096 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | $OpTx$FX_DC$708.REG | $OpTx$FX_DC$708 | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | $OpTx$FX_DC$708.D | 10520 | ? | 459 | 0 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | $OpTx$FX_DC$708.Q | 10523 | ? | 459 | 0 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | SoftPfbk | $OpTx$$OpTx$FX_DC$182_INV$783 | MXSE_COPY_0_COPY_0 | 2181038080 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_9_OBUF.EXP | 10615 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | $OpTx$$OpTx$FX_DC$182_INV$783.SI | $OpTx$$OpTx$FX_DC$182_INV$783 | 0 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_9_OBUF.EXP | 10615 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | $OpTx$$OpTx$FX_DC$182_INV$783.D1 | 10525 | ? | 467 | 4096 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | $OpTx$$OpTx$FX_DC$182_INV$783.D2 | 10526 | ? | 467 | 4096 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RA_9_OBUF.EXP -SPPTERM | 2 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | TimeoutB -SPPTERM | 2 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | TimeoutB -SPPTERM | 2 | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | TimeoutB -SPPTERM | 2 | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | TimeoutB -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady - -SRFF_INSTANCE | $OpTx$$OpTx$FX_DC$182_INV$783.REG | $OpTx$$OpTx$FX_DC$182_INV$783 | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.D | 10524 | ? | 467 | 0 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.Q | 10527 | ? | 467 | 0 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | NULL | EXP14_ | MXSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r.EXP | 10556 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP14_.EXP | 10557 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r.EXP | 10556 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP14_.EXP | 10543 | ? | 462 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | fsb/Ready1r.EXP -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF - -MACROCELL_INSTANCE | NULL | EXP15_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r.EXP | 10559 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP15_.EXP | 10558 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r.EXP | 10559 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP15_.EXP | 10544 | ? | 462 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | fsb/Ready2r.EXP -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF - -MACROCELL_INSTANCE | NULL | EXP16_ | MXSE_COPY_0_COPY_0 | 2147483648 | 21 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP16_.EXP | 10560 | ? | 458 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 21 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP16_.EXP | 10546 | ? | 458 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r -SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r -SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r -SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r - -MACROCELL_INSTANCE | NULL | EXP17_ | MXSE_COPY_0_COPY_0 | 2147483648 | 21 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP17_.EXP | 10561 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 21 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP17_.EXP | 10547 | ? | 467 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM - -MACROCELL_INSTANCE | NULL | EXP18_ | MXSE_COPY_0_COPY_0 | 2147483648 | 18 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP17_.EXP | 10561 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP18_.EXP | 10562 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 18 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP17_.EXP | 10561 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP18_.EXP | 10548 | ? | 467 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | EXP17_.EXP -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM - -MACROCELL_INSTANCE | NULL | EXP19_ | MXSE_COPY_0_COPY_0 | 2147483648 | 25 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP20_.EXP | 10564 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP19_.EXP | 10563 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 25 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP20_.EXP | 10564 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP19_.EXP | 10549 | ? | 467 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | EXP20_.EXP -SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1 -SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM - -MACROCELL_INSTANCE | NULL | EXP20_ | MXSE_COPY_0_COPY_0 | 2147483648 | 28 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP20_.EXP | 10564 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 28 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP20_.EXP | 10550 | ? | 467 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM -SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | Disable | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM -SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | Disable | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM - -MACROCELL_INSTANCE | NULL | EXP21_ | MXSE_COPY_0_COPY_0 | 2147483648 | 22 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP21_.EXP | 10565 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 22 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP21_.EXP | 10551 | ? | 459 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM - -MACROCELL_INSTANCE | NULL | EXP22_ | MXSE_COPY_0_COPY_0 | 2147483648 | 18 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP21_.EXP | 10565 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP22_.EXP | 10566 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 18 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP21_.EXP | 10565 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP22_.EXP | 10552 | ? | 459 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | EXP21_.EXP -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM - -MACROCELL_INSTANCE | NULL | EXP23_ | MXSE_COPY_0_COPY_0 | 2147483648 | 26 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMWE_OBUF.EXP | 10568 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP23_.EXP | 10567 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 26 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMWE_OBUF.EXP | 10568 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP23_.EXP | 10553 | ? | 459 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | nROMWE_OBUF.EXP -SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM -SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM - -MACROCELL_INSTANCE | NULL | EXP24_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nOE_OBUF.EXP | 10586 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP24_.EXP | 10587 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nOE_OBUF.EXP | 10586 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP24_.EXP | 10574 | ? | 498 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | nOE_OBUF.EXP -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr - -MACROCELL_INSTANCE | NULL | EXP25_ | MXSE_COPY_0_COPY_0 | 2147483648 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_5_IBUF | 9939 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP25_.EXP | 10589 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_5_IBUF | 9939 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP25_.EXP | 10576 | ? | 0 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_5_IBUF - -MACROCELL_INSTANCE | NULL | EXP26_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP26_.EXP | 10594 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP26_.EXP | 10581 | ? | 468 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> -SPPTERM | 8 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> - -MACROCELL_INSTANCE | NULL | EXP27_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP26_.EXP | 10594 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP27_.EXP | 10595 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP26_.EXP | 10594 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP27_.EXP | 10582 | ? | 468 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | EXP26_.EXP -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr - -MACROCELL_INSTANCE | NULL | EXP28_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP28_.EXP | 10618 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP28_.EXP | 10608 | ? | 469 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf - -MACROCELL_INSTANCE | NULL | EXP29_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP28_.EXP | 10618 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP29_.EXP | 10619 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP29_.SI | EXP29_ | 0 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP28_.EXP | 10618 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP29_.EXP | 10609 | ? | 469 | 0 | EXP29_ | NULL | NULL | EXP29_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | EXP28_.EXP -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_TRUE | ram/BACTr -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | fsb/ASrf -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | fsb/ASrf -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 - -MACROCELL_INSTANCE | NULL | EXP30_ | MXSE_COPY_0_COPY_0 | 2147483648 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2.EXP | 10620 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP30_.EXP | 10621 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP30_.SI | EXP30_ | 0 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2.EXP | 10620 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP30_.EXP | 10611 | ? | 499 | 0 | EXP30_ | NULL | NULL | EXP30_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd2.EXP -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf - -MACROCELL_INSTANCE | NULL | EXP31_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF$BUF0.EXP | 10636 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP31_.EXP | 10635 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP31_.SI | EXP31_ | 0 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF$BUF0.EXP | 10636 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP31_.EXP | 10622 | ? | 444 | 0 | EXP31_ | NULL | NULL | EXP31_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP -SPPTERM | 3 | IV_TRUE | IORW0 | IV_TRUE | iobs/IORW1 | IV_FALSE | ALE1 -SPPTERM | 3 | IV_FALSE | IORW0 | IV_FALSE | iobs/IORW1 | IV_FALSE | ALE1 -SPPTERM | 3 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | IORW0 | IV_TRUE | ALE1 - -MACROCELL_INSTANCE | NULL | EXP32_ | MXSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP32_.EXP | 10637 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP32_.SI | EXP32_ | 0 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP32_.EXP | 10624 | ? | 472 | 0 | EXP32_ | NULL | NULL | EXP32_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 - -MACROCELL_INSTANCE | NULL | EXP33_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP33_.EXP | 10642 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP33_.SI | EXP33_ | 0 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP33_.EXP | 10629 | ? | 493 | 0 | EXP33_ | NULL | NULL | EXP33_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1 - -MACROCELL_INSTANCE | NULL | EXP34_ | MXSE_COPY_0_COPY_0 | 2147483648 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP34_.EXP | 10643 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP34_.SI | EXP34_ | 0 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP34_.EXP | 10630 | ? | 0 | 0 | EXP34_ | NULL | NULL | EXP34_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | BERR_IOBS | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r - -MACROCELL_INSTANCE | NULL | EXP35_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_FSB_OBUF.EXP | 10644 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP35_.EXP | 10645 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP35_.SI | EXP35_ | 0 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_FSB_OBUF.EXP | 10644 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP35_.EXP | 10632 | ? | 440 | 0 | EXP35_ | NULL | NULL | EXP35_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | nBERR_FSB_OBUF.EXP -SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 -SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/Once -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_FALSE | cs/nOverlay1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once - -MACROCELL_INSTANCE | NULL | EXP36_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP36_.EXP | 10647 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP36_.SI | EXP36_ | 0 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP36_.EXP | 10634 | ? | 444 | 0 | EXP36_ | NULL | NULL | EXP36_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_TRUE | ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF | IV_TRUE | ALE1 - -FB_INSTANCE | FOOBAR1_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | ram/BACTr | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | iobm/RESrr | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152 -FBPIN | 3 | iobm/RESrf | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152 -FBPIN | 4 | fsb/ASrf | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | cnt/RefCnt<2> | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152 -FBPIN | 6 | cnt/RefCnt<1> | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152 -FBPIN | 7 | RefAck | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | RESr2 | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152 -FBPIN | 9 | RESr1 | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152 -FBPIN | 10 | RESr0 | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | IPL2r1 | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152 -FBPIN | 12 | IPL2r0 | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152 -FBPIN | 13 | ALE0S | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | $OpTx$FX_DC$708 | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152 -FBPIN | 15 | iobs/IOU1 | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152 -FBPIN | 16 | iobs/IOL1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | iobm/IOS_FSM_FFd1 | 1 | CLK2X_IOB_IBUF | 0 | NULL | 0 | 22 | 57344 -FBPIN | 18 | IOU0 | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | FOOBAR2_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 6 | iobs/IOACTr | 1 | A_FSB_5_IBUF | 1 | NULL | 0 | 2 | 53248 -FBPIN | 7 | iobm/VPArr | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | iobm/VPArf | 1 | A_FSB_6_IBUF | 1 | NULL | 0 | 3 | 53248 -FBPIN | 9 | iobm/IOREQr | 1 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248 -FBPIN | 10 | iobm/Er2 | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | iobm/Er | 1 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152 -FBPIN | 12 | iobm/DTACKrr | 1 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152 -FBPIN | 13 | iobm/DTACKrf | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | iobm/BGr1 | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152 -FBPIN | 15 | iobm/BGr0 | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152 -FBPIN | 16 | iobm/BERRrr | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | iobm/BERRrf | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152 -FBPIN | 18 | cnt/RefCnt<0> | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | FOOBAR3_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | fsb/Ready1r | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | EXP14_ | 1 | CLK_IOB_IBUF | 1 | NULL | 0 | 23 | 57344 -FBPIN | 3 | iobs/IORW1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | EXP15_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | fsb/Ready2r | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152 -FBPIN | 6 | EXP16_ | 1 | E_IOB_IBUF | 1 | NULL | 0 | 25 | 49152 -FBPIN | 7 | EXP17_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | EXP18_ | 1 | CLK_FSB_IBUF | 0 | NULL | 0 | 27 | 57344 -FBPIN | 9 | nDTACK_FSB_OBUF | 1 | NULL | 0 | nDTACK_FSB | 1 | 28 | 49152 -FBPIN | 10 | EXP19_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | EXP20_ | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152 -FBPIN | 12 | NULL | 0 | nLDS_FSB_IBUF | 1 | NULL | 0 | 30 | 49152 -FBPIN | 13 | EXP21_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | EXP22_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152 -FBPIN | 15 | fsb/VPA | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 33 | 49152 -FBPIN | 16 | EXP23_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | nROMWE_OBUF | 1 | NULL | 0 | nROMWE | 1 | 34 | 49152 -FBPIN | 18 | iobs/Clear1 | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | FOOBAR4_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | cnt/RefCnt<6> | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | nAoutOE_OBUF | 1 | NULL | 0 | nAoutOE | 1 | 87 | 49152 -FBPIN | 3 | cnt/RefCnt<5> | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | cnt/RefCnt<4> | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | nDoutOE_OBUF | 1 | NULL | 0 | nDoutOE | 1 | 89 | 49152 -FBPIN | 6 | nDinOE_OBUF | 1 | NULL | 0 | nDinOE | 1 | 90 | 49152 -FBPIN | 7 | cnt/RefCnt<3> | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | iobs/PS_FSM_FFd1 | 1 | nRES_IBUF | 1 | NULL | 0 | 91 | 49152 -FBPIN | 9 | fsb/BERR1r | 1 | nIPL2_IBUF | 1 | NULL | 0 | 92 | 49152 -FBPIN | 10 | cs/nOverlay1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | nVPA_FSB_OBUF | 1 | NULL | 0 | nVPA_FSB | 1 | 93 | 49152 -FBPIN | 12 | cnt/RefDone | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152 -FBPIN | 13 | cs/nOverlay0 | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | cnt/TimeoutBPre | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152 -FBPIN | 15 | TimeoutA | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152 -FBPIN | 16 | IOL0 | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | iobs/IOReady | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152 -FBPIN | 18 | BERR_IOBS | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | FOOBAR5_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | ram/RASEL | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | nROMCS_OBUF | 1 | NULL | 0 | nROMCS | 1 | 35 | 49152 -FBPIN | 3 | cnt/RefCnt<7> | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | ram/RAMDIS2 | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | nCAS_OBUF | 1 | NULL | 0 | nCAS | 1 | 36 | 49152 -FBPIN | 6 | nOE_OBUF | 1 | NULL | 0 | nOE | 1 | 37 | 49152 -FBPIN | 7 | EXP24_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | ram/RAMDIS1 | 1 | NULL | 0 | NULL | 0 | 39 | 49152 -FBPIN | 9 | RA_4_OBUF | 1 | NULL | 0 | RA<4> | 1 | 40 | 49152 -FBPIN | 10 | EXP25_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | RA_3_OBUF | 1 | NULL | 0 | RA<3> | 1 | 41 | 49152 -FBPIN | 12 | RA_5_OBUF | 1 | NULL | 0 | RA<5> | 1 | 42 | 49152 -FBPIN | 13 | iobs/Load1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | RA_2_OBUF | 1 | NULL | 0 | RA<2> | 1 | 43 | 49152 -FBPIN | 15 | RA_6_OBUF | 1 | NULL | 0 | RA<6> | 1 | 46 | 49152 -FBPIN | 16 | ram/Once | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | EXP26_ | 1 | NULL | 0 | NULL | 0 | 49 | 49152 -FBPIN | 18 | EXP27_ | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | FOOBAR6_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | iobm/ETACK | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | nVMA_IOBout | 1 | NULL | 0 | nVMA_IOB | 1 | 74 | 49152 -FBPIN | 3 | iobm/IOS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | iobm/ES<3> | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | iobm/ES<1> | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 76 | 49152 -FBPIN | 6 | iobm/ES<0> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 77 | 49152 -FBPIN | 7 | ALE0M | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | iobm/ES<4> | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 78 | 49152 -FBPIN | 9 | nLDS_IOBout | 1 | NULL | 0 | nLDS_IOB | 1 | 79 | 49152 -FBPIN | 10 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | nUDS_IOBout | 1 | NULL | 0 | nUDS_IOB | 1 | 80 | 49152 -FBPIN | 12 | nAS_IOBout | 1 | NULL | 0 | nAS_IOB | 1 | 81 | 49152 -FBPIN | 13 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | nADoutLE1_OBUF | 1 | NULL | 0 | nADoutLE1 | 1 | 82 | 49152 -FBPIN | 15 | nADoutLE0_OBUF | 1 | NULL | 0 | nADoutLE0 | 1 | 85 | 49152 -FBPIN | 16 | IOACT | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | nDinLE_OBUF | 1 | NULL | 0 | nDinLE | 1 | 86 | 49152 -FBPIN | 18 | IOBERR | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | FOOBAR7_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | ram/RAMReady | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | RA_1_OBUF | 1 | NULL | 0 | RA<1> | 1 | 50 | 49152 -FBPIN | 3 | TimeoutB | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | fsb/Ready0r | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | RA_7_OBUF | 1 | NULL | 0 | RA<7> | 1 | 52 | 49152 -FBPIN | 6 | RA_0_OBUF | 1 | NULL | 0 | RA<0> | 1 | 53 | 49152 -FBPIN | 7 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | RA_8_OBUF | 1 | NULL | 0 | RA<8> | 1 | 54 | 49152 -FBPIN | 9 | A_FSB_21_IBUF$BUF0 | 1 | NULL | 0 | RA<10> | 1 | 55 | 49152 -FBPIN | 10 | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | RA_9_OBUF | 1 | NULL | 0 | RA<9> | 1 | 56 | 49152 -FBPIN | 12 | CLK25EN_OBUF | 1 | NULL | 0 | CLK25EN | 1 | 58 | 49152 -FBPIN | 13 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | CLK20EN_OBUF$BUF0 | 1 | NULL | 0 | CLK20EN | 1 | 59 | 49152 -FBPIN | 15 | EXP28_ | 1 | SW_1_IBUF | 1 | NULL | 0 | 60 | 49152 -FBPIN | 16 | EXP29_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | ram/RS_FSM_FFd2 | 1 | CLK20EN_OBUF | 1 | NULL | 0 | 61 | 49152 -FBPIN | 18 | EXP30_ | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | FOOBAR8_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | EXP31_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | A_FSB_19_IBUF$BUF0 | 1 | NULL | 0 | RA<11> | 1 | 63 | 49152 -FBPIN | 3 | EXP32_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | nRAS_OBUF | 1 | NULL | 0 | nRAS | 1 | 64 | 49152 -FBPIN | 6 | nRAMLWE_OBUF | 1 | NULL | 0 | nRAMLWE | 1 | 65 | 49152 -FBPIN | 7 | RESDone | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | nRAMUWE_OBUF | 1 | NULL | 0 | nRAMUWE | 1 | 66 | 49152 -FBPIN | 9 | IOREQ | 1 | NULL | 0 | NULL | 0 | 67 | 49152 -FBPIN | 10 | EXP33_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | EXP34_ | 1 | NULL | 0 | NULL | 0 | 68 | 49152 -FBPIN | 12 | nBERR_FSB_OBUF | 1 | NULL | 0 | nBERR_FSB | 1 | 70 | 49152 -FBPIN | 13 | EXP35_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | iobs/Once | 1 | NULL | 0 | NULL | 0 | 71 | 49152 -FBPIN | 15 | Park | 1 | NULL | 0 | nBR_IOB | 1 | 72 | 49152 -FBPIN | 16 | fsb/BERR0r | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | EXP36_ | 1 | nBG_IOB_IBUF | 1 | NULL | 0 | 73 | 49152 -FBPIN | 18 | IORW0 | 1 | NULL | 0 | NULL | 0 - -FB_INSTANCE | INPUTPINS_FOOBAR9_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0 - -BUSINFO | A_FSB<23:1> | 23 | 0 | 0 | A_FSB<10> | 13 | A_FSB<11> | 12 | A_FSB<12> | 11 | A_FSB<13> | 10 | A_FSB<14> | 9 | A_FSB<15> | 8 | A_FSB<16> | 7 | A_FSB<17> | 6 | A_FSB<18> | 5 | A_FSB<19> | 4 | A_FSB<1> | 22 | A_FSB<20> | 3 | A_FSB<21> | 2 | A_FSB<22> | 1 | A_FSB<23> | 0 | A_FSB<2> | 21 | A_FSB<3> | 20 | A_FSB<4> | 19 | A_FSB<5> | 18 | A_FSB<6> | 17 | A_FSB<7> | 16 | A_FSB<8> | 15 | A_FSB<9> | 14 -BUSINFO | RA<11:0> | 12 | 0 | 1 | RA<0> | 11 | RA<10> | 1 | RA<11> | 0 | RA<1> | 10 | RA<2> | 9 | RA<3> | 8 | RA<4> | 7 | RA<5> | 6 | RA<6> | 5 | RA<7> | 4 | RA<8> | 3 | RA<9> | 2 -BUSINFO | SW<2:0> | 3 | 0 | 0 | SW<0> | 2 | SW<1> | 1 | SW<2> | 0 - -FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | nLDS_FSB | 30 | 2 | iobm/IOS_FSM_FFd3 | NULL | 3 | iobs/PS_FSM_FFd2 | NULL | 4 | nRES | 91 | 6 | ram/RS_FSM_FFd1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 7 | iobs/PS_FSM_FFd1 | NULL | 8 | nAS_FSB | 32 | 9 | iobm/IOS_FSM_FFd2 | NULL | 12 | iobs/Load1 | NULL | 13 | ALE1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 14 | iobs/IOU1 | NULL | 16 | ram/RS_FSM_FFd2 | NULL | 27 | nUDS_FSB | 33 | 33 | RESr1 | NULL | 40 | cnt/RefCnt<0> | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 41 | IPL2r0 | NULL | 44 | cnt/RefCnt<1> | NULL | 45 | iobm/IOS_FSM_FFd1 | NULL | 47 | fsb/ASrf | NULL | 49 | nIPL2 | 92 -FB_ORDER_OF_INPUTS | FOOBAR1_ | 51 | RESr0 | NULL - -FB_IMUX_INDEX | FOOBAR1_ | 260 | -1 | 92 | 129 | 148 | -1 | 114 | 61 | 268 | 99 | -1 | -1 | 84 | 103 | 14 | -1 | 124 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 272 | -1 | -1 | -1 | -1 | -1 | 8 | -1 | -1 | -1 | -1 | -1 | -1 | 35 | 11 | -1 | -1 | 5 | 16 | -1 | 3 | -1 | 150 | -1 | 9 | -1 | -1 - - -FB_ORDER_OF_INPUTS | FOOBAR2_ | 7 | nDTACK_IOB | 78 | 8 | IOREQ | NULL | 11 | nVPA_IOB | 77 | 15 | IOACT | NULL | 16 | E_IOB | 25 -FB_ORDER_OF_INPUTS | FOOBAR2_ | 23 | nBERR_IOB | 76 | 28 | iobm/Er | NULL | 37 | iobm/BGr0 | NULL | 43 | nBG_IOB | 73 - -FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 167 | 134 | -1 | -1 | 171 | -1 | -1 | -1 | 105 | 242 | -1 | -1 | -1 | -1 | -1 | -1 | 175 | -1 | -1 | -1 | -1 | 28 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 32 | -1 | -1 | -1 | -1 | -1 | 183 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 - - -FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | fsb/Ready1r | NULL | 2 | iobs/IORW1 | NULL | 3 | fsb/ASrf | NULL | 4 | fsb/Ready2r | NULL | 5 | A_FSB<16> | 14 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 6 | A_FSB<10> | 8 | 7 | iobs/PS_FSM_FFd1 | NULL | 8 | nDTACK_FSB_OBUF.UIM | NULL | 9 | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | NULL | 10 | A_FSB<11> | 9 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 13 | $OpTx$FX_DC$708.UIM | NULL | 14 | fsb/VPA | NULL | 15 | fsb/BERR0r | NULL | 16 | A_FSB<13> | 11 | 19 | A_FSB<20> | 18 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 21 | A_FSB<19> | 17 | 22 | A_FSB<12> | 10 | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20 | 26 | BERR_IOBS | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 28 | nWE_FSB | 29 | 31 | TimeoutA | NULL | 33 | nAS_FSB | 32 | 34 | A_FSB<17> | 15 | 36 | cs/nOverlay1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 37 | iobs/IOReady | NULL | 38 | fsb/BERR1r | NULL | 39 | SW<1> | 60 | 40 | A_FSB<8> | 6 | 42 | Disable | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 43 | iobs/Once | NULL | 44 | A_FSB<14> | 12 | 45 | iobs/PS_FSM_FFd2 | NULL | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 49 | ALE1 | NULL | 50 | A_FSB<18> | 16 | 53 | A_FSB<9> | 7 - -FB_IMUX_INDEX | FOOBAR3_ | 36 | -1 | 38 | 3 | 40 | 214 | 198 | 61 | 44 | 117 | 202 | -1 | -1 | 13 | 50 | 141 | 208 | -1 | -1 | 226 | -1 | 222 | 206 | 240 | 230 | -1 | 71 | -1 | 256 | -1 | -1 | 68 | -1 | 268 | 216 | -1 | 63 | 70 | 62 | 215 | 194 | -1 | 140 | 139 | 210 | 129 | 212 | 228 | -1 | 103 | 218 | -1 | -1 | 196 - - -FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | cnt/RefCnt<6> | NULL | 1 | iobm/BG | NULL | 2 | A_FSB<21> | 19 | 3 | iobs/PS_FSM_FFd2 | NULL | 4 | nRES | 91 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 5 | iobs/IOACTr | NULL | 6 | RefAck | NULL | 8 | nAS_FSB | 32 | 9 | iobm/IOS_FSM_FFd2 | NULL | 11 | nAS_IOBout | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 12 | cs/nOverlay0 | NULL | 13 | iobm/BGr1 | NULL | 14 | A_FSB<23> | 24 | 15 | iobs/IOL1 | NULL | 16 | iobs/IOReady | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 17 | IOBERR | NULL | 18 | cnt/RefCnt<4> | NULL | 19 | A_FSB<20> | 18 | 21 | IORW0 | NULL | 23 | SW<1> | 60 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 24 | A_FSB<22> | 20 | 26 | BERR_IOBS | NULL | 28 | nWE_FSB | 29 | 31 | TimeoutA | NULL | 32 | iobm/BGr0 | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 33 | cnt/RefCnt<5> | NULL | 34 | iobs/PS_FSM_FFd1 | NULL | 35 | cnt/RefCnt<3> | NULL | 36 | cnt/RefCnt<2> | NULL | 37 | nLDS_FSB | 30 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 38 | fsb/BERR1r | NULL | 39 | cnt/RefCnt<7> | NULL | 40 | cnt/RefCnt<0> | NULL | 42 | fsb/VPA | NULL | 43 | iobs/Once | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 44 | cnt/RefCnt<1> | NULL | 45 | cnt/TimeoutBPre | NULL | 47 | fsb/ASrf | NULL | 49 | ALE1 | NULL | 51 | iobm/IOS_FSM_FFd3 | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 53 | cnt/RefDone | NULL - -FB_IMUX_INDEX | FOOBAR4_ | 54 | 55 | 228 | 129 | 148 | 23 | 6 | -1 | 268 | 99 | -1 | 101 | 66 | 31 | 240 | 15 | 70 | 107 | 57 | 226 | -1 | 143 | -1 | 215 | 230 | -1 | 71 | -1 | 256 | -1 | -1 | 68 | 32 | 56 | 61 | 60 | 4 | 260 | 62 | 74 | 35 | -1 | 50 | 139 | 5 | 67 | -1 | 3 | -1 | 103 | -1 | 92 | -1 | 65 - - -FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | ram/RASEL | NULL | 1 | A_FSB<14> | 12 | 2 | cnt/RefCnt<5> | NULL | 3 | fsb/ASrf | NULL | 4 | cnt/RefCnt<2> | NULL -FB_ORDER_OF_INPUTS | FOOBAR5_ | 5 | cnt/RefCnt<1> | NULL | 6 | cnt/RefCnt<3> | NULL | 7 | iobs/PS_FSM_FFd1 | NULL | 8 | A_FSB<3> | 96 | 9 | cs/nOverlay1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR5_ | 10 | A_FSB<6> | 3 | 11 | cnt/RefDone | NULL | 12 | ram/RS_FSM_FFd3 | NULL | 13 | ALE1 | NULL | 14 | A_FSB<7> | 4 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 15 | ram/Once | NULL | 16 | ram/RS_FSM_FFd2 | NULL | 17 | cnt/RefCnt<0> | NULL | 19 | A_FSB<20> | 18 | 20 | cnt/RefCnt<6> | NULL -FB_ORDER_OF_INPUTS | FOOBAR5_ | 21 | A_FSB<19> | 17 | 22 | A_FSB<12> | 10 | 23 | SW<1> | 60 | 24 | A_FSB<22> | 20 | 28 | nWE_FSB | 29 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 30 | A_FSB<4> | 97 | 33 | nAS_FSB | 32 | 34 | A_FSB<5> | 2 | 36 | A_FSB<23> | 24 | 39 | cnt/RefCnt<7> | NULL -FB_ORDER_OF_INPUTS | FOOBAR5_ | 40 | ram/BACTr | NULL | 41 | ram/RS_FSM_FFd1 | NULL | 42 | cnt/RefCnt<4> | NULL | 43 | iobs/Once | NULL | 44 | A_FSB<13> | 11 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 45 | iobs/PS_FSM_FFd2 | NULL | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19 | 49 | A_FSB<17> | 15 | 50 | A_FSB<18> | 16 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 52 | ram/RAMDIS2 | NULL | 53 | A_FSB<16> | 14 - -FB_IMUX_INDEX | FOOBAR5_ | 72 | 210 | 56 | 3 | 4 | 5 | 60 | 61 | 168 | 63 | 186 | 65 | 120 | 103 | 190 | 87 | 124 | 35 | -1 | 226 | 54 | 222 | 206 | 215 | 230 | -1 | -1 | -1 | 256 | -1 | 172 | -1 | -1 | 268 | 182 | -1 | 240 | -1 | -1 | 74 | 0 | 114 | 57 | 139 | 208 | 129 | 212 | 228 | -1 | 216 | 218 | -1 | 75 | 214 - - -FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/ETACK | NULL | 1 | iobm/RESrr | NULL | 2 | iobm/RESrf | NULL | 3 | iobm/ES<3> | NULL | 4 | iobm/ES<1> | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/ES<0> | NULL | 6 | iobm/VPArr | NULL | 7 | iobm/VPArf | NULL | 8 | iobm/IOREQr | NULL | 9 | iobm/Er2 | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 10 | iobm/Er | NULL | 11 | iobm/DTACKrr | NULL | 12 | ALE0S | NULL | 15 | iobm/BERRrr | NULL | 16 | iobm/IOS_FSM_FFd1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 17 | IOU0 | NULL | 21 | IORW0 | NULL | 23 | nBERR_IOB | 76 | 29 | iobm/ES<2> | NULL | 30 | iobm/IOS_FSM_FFd3 | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 32 | ALE0M | NULL | 37 | iobs/Load1 | NULL | 38 | IOACT | NULL | 40 | iobm/IOS_FSM_FFd2 | NULL | 42 | iobm/ES<4> | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 43 | IOL0 | NULL | 44 | nVMA_IOBout | NULL | 46 | iobm/BERRrf | NULL | 47 | iobm/DTACKrf | NULL | 48 | CLK_IOB | 23 -FB_ORDER_OF_INPUTS | FOOBAR6_ | 49 | ALE1 | NULL | 50 | iobs/Clear1 | NULL | 51 | iobm/BG | NULL | 53 | IOBERR | NULL - -FB_IMUX_INDEX | FOOBAR6_ | 90 | 1 | 2 | 93 | 94 | 95 | 24 | 25 | 26 | 27 | 28 | 29 | 12 | -1 | -1 | 33 | 16 | 17 | -1 | -1 | -1 | 143 | -1 | 175 | -1 | -1 | -1 | -1 | -1 | 102 | 92 | -1 | 96 | -1 | -1 | -1 | -1 | 84 | 105 | -1 | 99 | -1 | 97 | 69 | 91 | -1 | 34 | 30 | 238 | 103 | 53 | 55 | -1 | 107 - - -FB_ORDER_OF_INPUTS | FOOBAR7_ | 0 | ram/RAMReady | NULL | 2 | cnt/RefCnt<5> | NULL | 3 | fsb/ASrf | NULL | 4 | SW<0> | 61 | 5 | cnt/RefCnt<1> | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 6 | cnt/RefCnt<3> | NULL | 7 | A_FSB<17> | 15 | 8 | nAS_FSB | 32 | 9 | cs/nOverlay1 | NULL | 11 | cnt/RefDone | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 12 | A_FSB<1> | 94 | 13 | cnt/TimeoutBPre | NULL | 14 | A_FSB<23> | 24 | 17 | cnt/RefCnt<0> | NULL | 18 | cnt/RefCnt<4> | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 19 | A_FSB<2> | 95 | 20 | cnt/RefCnt<6> | NULL | 21 | A_FSB<19> | 17 | 24 | A_FSB<22> | 20 | 29 | ram/RS_FSM_FFd2 | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 30 | A_FSB<20> | 18 | 31 | A_FSB<10> | 8 | 36 | cnt/RefCnt<2> | NULL | 39 | cnt/RefCnt<7> | NULL | 40 | A_FSB<8> | 6 -FB_ORDER_OF_INPUTS | FOOBAR7_ | 41 | ram/RS_FSM_FFd1 | NULL | 42 | ram/BACTr | NULL | 43 | ram/Once | NULL | 44 | TimeoutB | NULL | 45 | A_FSB<21> | 19 -FB_ORDER_OF_INPUTS | FOOBAR7_ | 47 | ram/RASEL | NULL | 48 | ram/RS_FSM_FFd3 | NULL | 50 | A_FSB<18> | 16 | 51 | fsb/Ready0r | NULL | 52 | A_FSB<11> | 9 -FB_ORDER_OF_INPUTS | FOOBAR7_ | 53 | A_FSB<9> | 7 - -FB_IMUX_INDEX | FOOBAR7_ | 108 | -1 | 56 | 3 | 213 | 5 | 60 | 216 | 268 | 63 | -1 | 65 | 156 | 67 | 240 | -1 | -1 | 35 | 57 | 164 | 54 | 222 | -1 | -1 | 230 | -1 | -1 | -1 | -1 | 124 | 226 | 198 | -1 | -1 | -1 | -1 | 4 | -1 | -1 | 74 | 194 | 114 | 0 | 87 | 110 | 228 | -1 | 72 | 120 | -1 | 218 | 111 | 202 | 196 - - -FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | A_FSB<20> | 18 | 1 | A_FSB<14> | 12 | 2 | A_FSB<21> | 19 | 3 | ram/RAMDIS2 | NULL | 4 | A_FSB<22> | 20 -FB_ORDER_OF_INPUTS | FOOBAR8_ | 6 | RESDone | NULL | 7 | RESr2 | NULL | 8 | RESr1 | NULL | 9 | RESr0 | NULL | 10 | IPL2r1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR8_ | 11 | IPL2r0 | NULL | 12 | nUDS_FSB | 33 | 13 | ALE1 | NULL | 14 | A_FSB<23> | 24 | 16 | A_FSB<13> | 11 -FB_ORDER_OF_INPUTS | FOOBAR8_ | 17 | IORW0 | NULL | 21 | A_FSB<19> | 17 | 23 | SW<1> | 60 | 25 | iobs/Once | NULL | 26 | BERR_IOBS | NULL -FB_ORDER_OF_INPUTS | FOOBAR8_ | 28 | nWE_FSB | 29 | 30 | fsb/BERR0r | NULL | 33 | nAS_FSB | 32 | 34 | iobs/PS_FSM_FFd1 | NULL | 36 | cs/nOverlay1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR8_ | 37 | nLDS_FSB | 30 | 38 | fsb/BERR1r | NULL | 39 | iobs/IORW1 | NULL | 41 | ram/RAMDIS1 | NULL | 43 | RefAck | NULL -FB_ORDER_OF_INPUTS | FOOBAR8_ | 44 | TimeoutB | NULL | 45 | iobs/PS_FSM_FFd2 | NULL | 47 | fsb/ASrf | NULL | 48 | iobs/IOACTr | NULL | 49 | A_FSB<17> | 15 -FB_ORDER_OF_INPUTS | FOOBAR8_ | 50 | A_FSB<18> | 16 | 53 | A_FSB<16> | 14 - -FB_IMUX_INDEX | FOOBAR8_ | 226 | 210 | 228 | 75 | 230 | -1 | 132 | 7 | 8 | 9 | 10 | 11 | 272 | 103 | 240 | -1 | 208 | 143 | -1 | -1 | -1 | 222 | -1 | 215 | -1 | 139 | 71 | -1 | 256 | -1 | 141 | -1 | -1 | 268 | 61 | -1 | 63 | 260 | 62 | 38 | -1 | 79 | -1 | 6 | 110 | 129 | -1 | 3 | 23 | 216 | 218 | -1 | -1 | 214 - - -GLOBAL_FCLK | CLK2X_IOB | 0 | 0 | CLK_IOB | 1 | 1 | CLK_FSB | 2 | 2 - -TIME_TSPEC | TS_CLK_IOB | PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS | CLK_IOB | 10003 | 1428 | 714 | NULL - -TIME_TSPEC | TS_CLK_FSB | PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS | CLK_FSB | 10003 | 400 | 200 | NULL - -TIME_TSPEC | TS_CLK2X_IOB | PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS | CLK2X_IOB | 10003 | 666 | 333 | NULL diff --git a/cpld/XC95144XL/MXSE.xml b/cpld/XC95144XL/MXSE.xml deleted file mode 100644 index 0e546e8..0000000 --- a/cpld/XC95144XL/MXSE.xml +++ /dev/null @@ -1,3 +0,0 @@ - - -MXSE.rptC:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chpMXSE.mfd
Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'MXSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC constraint 'P22'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC constraint 'P27'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC constraint 'P23'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.Cpld:1007 - Removing unused input(s) 'SW<2>'. The input(s) are unused after optimization. Please verify functionality via simulation. diff --git a/cpld/XC95144XL/MXSE_html/fit/ascii.htm b/cpld/XC95144XL/MXSE_html/fit/ascii.htm deleted file mode 100644 index 63b6e4b..0000000 --- a/cpld/XC95144XL/MXSE_html/fit/ascii.htm +++ /dev/null @@ -1,1824 +0,0 @@ - -
- 
-cpldfit:  version P.20131013                        Xilinx Inc.
-                                  Fitter Report
-Design Name: MXSE                                Date:  3-27-2022, 10:08AM
-Device Used: XC95144XL-10-TQ100
-Fitting Status: Successful
-
-*************************  Mapped Resource Summary  **************************
-
-Macrocells     Product Terms    Function Block   Registers      Pins           
-Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-115/144 ( 80%) 458 /720  ( 64%) 258/432 ( 60%)   89 /144 ( 62%) 74 /81  ( 91%)
-
-** Function Block Resources **
-
-Function    Mcells      FB Inps     Pterms      IO          
-Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1          18/18*      21/54       23/90      11/11*
-FB2          13/18        9/54       12/90       8/10
-FB3           7/18       38/54       81/90      10/10*
-FB4          18/18*      41/54       41/90      10/10*
-FB5          14/18       42/54       81/90       8/10
-FB6          18/18*      34/54       64/90      10/10*
-FB7          15/18       36/54       75/90      10/10*
-FB8          12/18       37/54       81/90       7/10
-             -----       -----       -----      -----    
-            115/144     258/432     458/720     74/81 
-
-* - Resource is exhausted
-
-** Global Control Resources **
-
-Signal 'CLK2X_IOB' mapped onto global clock net GCK1.
-Signal 'CLK_IOB' mapped onto global clock net GCK2.
-Signal 'CLK_FSB' mapped onto global clock net GCK3.
-Global output enable net(s) unused.
-Global set/reset net(s) unused.
-
-** Pin Resources **
-
-Signal Type    Required     Mapped  |  Pin Type            Used    Total 
-------------------------------------|------------------------------------
-Input         :   36          36    |  I/O              :    68      73
-Output        :   35          35    |  GCK/IO           :     3       3
-Bidirectional :    0           0    |  GTS/IO           :     3       4
-GCK           :    3           3    |  GSR/IO           :     0       1
-GTS           :    0           0    |
-GSR           :    0           0    |
-                 ----        ----
-        Total     74          74
-
-** Power Data **
-
-There are 115 macrocells in high performance mode (MCHP).
-There are 0 macrocells in low power mode (MCLP).
-End of Mapped Resource Summary
-**************************  Errors and Warnings  ***************************
-
-WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
-   use the default filename of 'MXSE.ise'.
-INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC
-   constraint 'P22'. It is recommended that you declare this BUFG explicitedly
-   in your design. Note that for certain device families the output of a BUFG
-   constraint can not drive a gated clock, and the BUFG constraint will be
-   ignored.
-INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC
-   constraint 'P27'. It is recommended that you declare this BUFG explicitedly
-   in your design. Note that for certain device families the output of a BUFG
-   constraint can not drive a gated clock, and the BUFG constraint will be
-   ignored.
-INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC
-   constraint 'P23'. It is recommended that you declare this BUFG explicitedly
-   in your design. Note that for certain device families the output of a BUFG
-   constraint can not drive a gated clock, and the BUFG constraint will be
-   ignored.
-WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'.  The input(s) are unused
-   after optimization. Please verify functionality via simulation.
-*************************  Summary of Mapped Logic  ************************
-
-** 35 Outputs **
-
-Signal                         Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
-Name                           Pts   Inps          No.  Type    Use     Mode Rate State
-nDTACK_FSB                     23    32    FB3_9   28   I/O     O       STD  FAST RESET
-nROMWE                         1     2     FB3_17  34   I/O     O       STD  FAST 
-nAoutOE                        3     4     FB4_2   87   I/O     O       STD  FAST SET
-nDoutOE                        2     3     FB4_5   89   I/O     O       STD  FAST RESET
-nDinOE                         3     7     FB4_6   90   I/O     O       STD  FAST 
-nVPA_FSB                       1     2     FB4_11  93   I/O     O       STD  FAST 
-nROMCS                         3     6     FB5_2   35   I/O     O       STD  FAST 
-nCAS                           1     1     FB5_5   36   I/O     O       STD  FAST RESET
-nOE                            1     2     FB5_6   37   I/O     O       STD  FAST 
-RA<4>                          2     3     FB5_9   40   I/O     O       STD  FAST 
-RA<3>                          2     3     FB5_11  41   I/O     O       STD  FAST 
-RA<5>                          2     3     FB5_12  42   I/O     O       STD  FAST 
-RA<2>                          2     3     FB5_14  43   I/O     O       STD  FAST 
-RA<6>                          2     3     FB5_15  46   I/O     O       STD  FAST 
-nVMA_IOB                       3     10    FB6_2   74   I/O     O       STD  FAST RESET
-nLDS_IOB                       4     6     FB6_9   79   I/O     O       STD  FAST RESET
-nUDS_IOB                       4     6     FB6_11  80   I/O     O       STD  FAST RESET
-nAS_IOB                        3     4     FB6_12  81   I/O     O       STD  FAST RESET
-nADoutLE1                      2     3     FB6_14  82   I/O     O       STD  FAST SET
-nADoutLE0                      1     2     FB6_15  85   I/O     O       STD  FAST 
-nDinLE                         1     2     FB6_17  86   I/O     O       STD  FAST RESET
-RA<1>                          2     3     FB7_2   50   I/O     O       STD  FAST 
-RA<7>                          2     3     FB7_5   52   I/O     O       STD  FAST 
-RA<0>                          2     3     FB7_6   53   I/O     O       STD  FAST 
-RA<8>                          7     7     FB7_8   54   I/O     O       STD  FAST 
-RA<10>                         1     1     FB7_9   55   I/O     O       STD  FAST 
-RA<9>                          2     3     FB7_11  56   I/O     O       STD  FAST 
-CLK25EN                        1     1     FB7_12  58   I/O     O       STD  FAST 
-CLK20EN                        1     1     FB7_14  59   I/O     O       STD  FAST 
-RA<11>                         1     1     FB8_2   63   I/O     O       STD  FAST 
-nRAS                           3     8     FB8_5   64   I/O     O       STD  FAST 
-nRAMLWE                        1     5     FB8_6   65   I/O     O       STD  FAST 
-nRAMUWE                        1     5     FB8_8   66   I/O     O       STD  FAST 
-nBERR_FSB                      3     9     FB8_12  70   I/O     O       STD  FAST 
-nBR_IOB                        1     6     FB8_15  72   I/O     O       STD  FAST SET
-
-** 80 Buried Nodes **
-
-Signal                         Total Total Loc     Pwr  Reg Init
-Name                           Pts   Inps          Mode State
-ram/BACTr                      1     2     FB1_1   STD  RESET
-iobm/RESrr                     1     1     FB1_2   STD  RESET
-iobm/RESrf                     1     1     FB1_3   STD  RESET
-fsb/ASrf                       1     1     FB1_4   STD  RESET
-cnt/RefCnt<2>                  1     2     FB1_5   STD  RESET
-cnt/RefCnt<1>                  1     1     FB1_6   STD  RESET
-RefAck                         1     2     FB1_7   STD  RESET
-RESr2                          1     1     FB1_8   STD  RESET
-RESr1                          1     1     FB1_9   STD  RESET
-RESr0                          1     1     FB1_10  STD  RESET
-IPL2r1                         1     1     FB1_11  STD  RESET
-IPL2r0                         1     1     FB1_12  STD  RESET
-ALE0S                          1     2     FB1_13  STD  RESET
-$OpTx$FX_DC$708                1     2     FB1_14  STD  
-iobs/IOU1                      2     2     FB1_15  STD  RESET
-iobs/IOL1                      2     2     FB1_16  STD  RESET
-iobm/IOS_FSM_FFd1              2     3     FB1_17  STD  RESET
-IOU0                           3     5     FB1_18  STD  RESET
-iobs/IOACTr                    1     1     FB2_6   STD  RESET
-iobm/VPArr                     1     1     FB2_7   STD  RESET
-iobm/VPArf                     1     1     FB2_8   STD  RESET
-iobm/IOREQr                    1     1     FB2_9   STD  RESET
-iobm/Er2                       1     1     FB2_10  STD  RESET
-iobm/Er                        1     1     FB2_11  STD  RESET
-iobm/DTACKrr                   1     1     FB2_12  STD  RESET
-iobm/DTACKrf                   1     1     FB2_13  STD  RESET
-iobm/BGr1                      1     1     FB2_14  STD  RESET
-iobm/BGr0                      1     1     FB2_15  STD  RESET
-iobm/BERRrr                    1     1     FB2_16  STD  RESET
-iobm/BERRrf                    1     1     FB2_17  STD  RESET
-cnt/RefCnt<0>                  0     0     FB2_18  STD  RESET
-fsb/Ready1r                    8     18    FB3_1   STD  RESET
-iobs/IORW1                     17    20    FB3_3   STD  RESET
-fsb/Ready2r                    9     22    FB3_5   STD  RESET
-fsb/VPA                        22    31    FB3_15  STD  RESET
-iobs/Clear1                    1     3     FB3_18  STD  RESET
-cnt/RefCnt<6>                  1     6     FB4_1   STD  RESET
-cnt/RefCnt<5>                  1     5     FB4_3   STD  RESET
-cnt/RefCnt<4>                  1     4     FB4_4   STD  RESET
-cnt/RefCnt<3>                  1     3     FB4_7   STD  RESET
-
-Signal                         Total Total Loc     Pwr  Reg Init
-Name                           Pts   Inps          Mode State
-iobs/PS_FSM_FFd1               2     3     FB4_8   STD  RESET
-fsb/BERR1r                     2     4     FB4_9   STD  RESET
-cs/nOverlay1                   2     3     FB4_10  STD  RESET
-cnt/RefDone                    2     10    FB4_12  STD  RESET
-cs/nOverlay0                   3     8     FB4_13  STD  RESET
-cnt/TimeoutBPre                3     11    FB4_14  STD  RESET
-TimeoutA                       3     10    FB4_15  STD  RESET
-IOL0                           3     5     FB4_16  STD  RESET
-iobs/IOReady                   4     8     FB4_17  STD  RESET
-BERR_IOBS                      4     8     FB4_18  STD  RESET
-ram/RASEL                      20    15    FB5_1   STD  RESET
-cnt/RefCnt<7>                  1     7     FB5_3   STD  RESET
-ram/RAMDIS2                    7     15    FB5_4   STD  RESET
-ram/RAMDIS1                    18    15    FB5_8   STD  RESET
-iobs/Load1                     15    19    FB5_13  STD  RESET
-ram/Once                       5     10    FB5_16  STD  RESET
-iobm/ETACK                     1     6     FB6_1   STD  RESET
-iobm/IOS_FSM_FFd3              3     6     FB6_3   STD  RESET
-iobm/ES<3>                     3     6     FB6_4   STD  RESET
-iobm/ES<1>                     3     4     FB6_5   STD  RESET
-iobm/ES<0>                     3     7     FB6_6   STD  RESET
-ALE0M                          3     5     FB6_7   STD  RESET
-iobm/ES<4>                     4     7     FB6_8   STD  RESET
-iobm/IOS_FSM_FFd2              5     11    FB6_10  STD  RESET
-iobm/ES<2>                     5     7     FB6_13  STD  RESET
-IOACT                          7     13    FB6_16  STD  RESET
-IOBERR                         9     13    FB6_18  STD  RESET
-ram/RAMReady                   16    15    FB7_1   STD  RESET
-TimeoutB                       3     12    FB7_3   STD  RESET
-fsb/Ready0r                    3     8     FB7_4   STD  RESET
-ram/RS_FSM_FFd1                5     10    FB7_7   STD  RESET
-$OpTx$$OpTx$FX_DC$182_INV$783  6     8     FB7_10  STD  
-ram/RS_FSM_FFd3                11    14    FB7_13  STD  RESET
-ram/RS_FSM_FFd2                13    14    FB7_17  STD  RESET
-iobs/PS_FSM_FFd2               15    20    FB8_4   STD  RESET
-RESDone                        1     3     FB8_7   STD  RESET
-IOREQ                          15    20    FB8_9   STD  RESET
-iobs/Once                      18    19    FB8_14  STD  RESET
-fsb/BERR0r                     3     8     FB8_16  STD  RESET
-IORW0                          19    21    FB8_18  STD  RESET
-
-** 39 Inputs **
-
-Signal                         Loc     Pin  Pin     Pin     
-Name                                   No.  Type    Use     
-A_FSB<13>                      FB1_2   11   I/O     I
-A_FSB<14>                      FB1_3   12   I/O     I
-A_FSB<15>                      FB1_5   13   I/O     I
-A_FSB<16>                      FB1_6   14   I/O     I
-A_FSB<17>                      FB1_8   15   I/O     I
-A_FSB<18>                      FB1_9   16   I/O     I
-A_FSB<19>                      FB1_11  17   I/O     I
-A_FSB<20>                      FB1_12  18   I/O     I
-A_FSB<21>                      FB1_14  19   I/O     I
-A_FSB<22>                      FB1_15  20   I/O     I
-CLK2X_IOB                      FB1_17  22   GCK/I/O GCK
-A_FSB<5>                       FB2_6   2    GTS/I/O I
-A_FSB<6>                       FB2_8   3    GTS/I/O I
-A_FSB<7>                       FB2_9   4    GTS/I/O I
-A_FSB<8>                       FB2_11  6    I/O     I
-A_FSB<9>                       FB2_12  7    I/O     I
-A_FSB<10>                      FB2_14  8    I/O     I
-A_FSB<11>                      FB2_15  9    I/O     I
-A_FSB<12>                      FB2_17  10   I/O     I
-CLK_IOB                        FB3_2   23   GCK/I/O GCK/I
-A_FSB<23>                      FB3_5   24   I/O     I
-E_IOB                          FB3_6   25   I/O     I
-CLK_FSB                        FB3_8   27   GCK/I/O GCK
-nWE_FSB                        FB3_11  29   I/O     I
-nLDS_FSB                       FB3_12  30   I/O     I
-nAS_FSB                        FB3_14  32   I/O     I
-nUDS_FSB                       FB3_15  33   I/O     I
-nRES                           FB4_8   91   I/O     I
-nIPL2                          FB4_9   92   I/O     I
-A_FSB<1>                       FB4_12  94   I/O     I
-A_FSB<2>                       FB4_14  95   I/O     I
-A_FSB<3>                       FB4_15  96   I/O     I
-A_FSB<4>                       FB4_17  97   I/O     I
-nBERR_IOB                      FB6_5   76   I/O     I
-nVPA_IOB                       FB6_6   77   I/O     I
-nDTACK_IOB                     FB6_8   78   I/O     I
-SW<1>                          FB7_15  60   I/O     I
-SW<0>                          FB7_17  61   I/O     I
-nBG_IOB                        FB8_17  73   I/O     I
-
-Legend:
-Pin No. - ~ - User Assigned
-**************************  Function Block Details  ************************
-Legend:
-Total Pt     - Total product terms used by the macrocell signal
-Imp Pt       - Product terms imported from other macrocells
-Exp Pt       - Product terms exported to other macrocells
-               in direction shown
-Unused Pt    - Unused local product terms remaining in macrocell
-Loc          - Location where logic was mapped in device
-Pin Type/Use - I  - Input             GCK - Global Clock
-               O  - Output            GTS - Global Output Enable
-              (b) - Buried macrocell  GSR - Global Set/Reset
-X            - Signal used as input to the macrocell logic.
-Pin No.      - ~  - User Assigned
-*********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               21/33
-Number of signals used by logic mapping into function block:  21
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/BACTr             1       0     0   4     FB1_1         (b)     (b)
-iobm/RESrr            1       0     0   4     FB1_2   11    I/O     I
-iobm/RESrf            1       0     0   4     FB1_3   12    I/O     I
-fsb/ASrf              1       0     0   4     FB1_4         (b)     (b)
-cnt/RefCnt<2>         1       0     0   4     FB1_5   13    I/O     I
-cnt/RefCnt<1>         1       0     0   4     FB1_6   14    I/O     I
-RefAck                1       0     0   4     FB1_7         (b)     (b)
-RESr2                 1       0     0   4     FB1_8   15    I/O     I
-RESr1                 1       0     0   4     FB1_9   16    I/O     I
-RESr0                 1       0     0   4     FB1_10        (b)     (b)
-IPL2r1                1       0     0   4     FB1_11  17    I/O     I
-IPL2r0                1       0     0   4     FB1_12  18    I/O     I
-ALE0S                 1       0     0   4     FB1_13        (b)     (b)
-$OpTx$FX_DC$708       1       0     0   4     FB1_14  19    I/O     I
-iobs/IOU1             2       0     0   3     FB1_15  20    I/O     I
-iobs/IOL1             2       0     0   3     FB1_16        (b)     (b)
-iobm/IOS_FSM_FFd1     2       0     0   3     FB1_17  22    GCK/I/O GCK
-IOU0                  3       0     0   2     FB1_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: IPL2r0              8: iobm/IOS_FSM_FFd2  15: nAS_FSB 
-  2: RESr0               9: iobm/IOS_FSM_FFd3  16: nIPL2 
-  3: RESr1              10: iobs/IOU1          17: nLDS_FSB 
-  4: cnt/RefCnt<0>      11: iobs/Load1         18: nRES 
-  5: cnt/RefCnt<1>      12: iobs/PS_FSM_FFd1   19: nUDS_FSB 
-  6: fsb/ASrf           13: iobs/PS_FSM_FFd2   20: ram/RS_FSM_FFd1 
-  7: iobm/IOS_FSM_FFd1  14: nADoutLE1          21: ram/RS_FSM_FFd2 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/BACTr            .....X........X......................... 2
-iobm/RESrr           .................X...................... 1
-iobm/RESrf           .................X...................... 1
-fsb/ASrf             ..............X......................... 1
-cnt/RefCnt<2>        ...XX................................... 2
-cnt/RefCnt<1>        ...X.................................... 1
-RefAck               ...................XX................... 2
-RESr2                ..X..................................... 1
-RESr1                .X...................................... 1
-RESr0                .................X...................... 1
-IPL2r1               X....................................... 1
-IPL2r0               ...............X........................ 1
-ALE0S                ...........XX........................... 2
-$OpTx$FX_DC$708      .....X........X......................... 2
-iobs/IOU1            ..........X.......X..................... 2
-iobs/IOL1            ..........X.....X....................... 2
-iobm/IOS_FSM_FFd1    ......XXX............................... 3
-IOU0                 .........X.XXX....X..................... 5
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               9/45
-Number of signals used by logic mapping into function block:  9
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0     0   5     FB2_1         (b)     
-(unused)              0       0     0   5     FB2_2   99    GSR/I/O 
-(unused)              0       0     0   5     FB2_3         (b)     
-(unused)              0       0     0   5     FB2_4         (b)     
-(unused)              0       0     0   5     FB2_5   1     GTS/I/O 
-iobs/IOACTr           1       0     0   4     FB2_6   2     GTS/I/O I
-iobm/VPArr            1       0     0   4     FB2_7         (b)     (b)
-iobm/VPArf            1       0     0   4     FB2_8   3     GTS/I/O I
-iobm/IOREQr           1       0     0   4     FB2_9   4     GTS/I/O I
-iobm/Er2              1       0     0   4     FB2_10        (b)     (b)
-iobm/Er               1       0     0   4     FB2_11  6     I/O     I
-iobm/DTACKrr          1       0     0   4     FB2_12  7     I/O     I
-iobm/DTACKrf          1       0     0   4     FB2_13        (b)     (b)
-iobm/BGr1             1       0     0   4     FB2_14  8     I/O     I
-iobm/BGr0             1       0     0   4     FB2_15  9     I/O     I
-iobm/BERRrr           1       0     0   4     FB2_16        (b)     (b)
-iobm/BERRrf           1       0     0   4     FB2_17  10    I/O     I
-cnt/RefCnt<0>         0       0     0   5     FB2_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: E_IOB              4: iobm/BGr0          7: nBG_IOB 
-  2: IOACT              5: iobm/Er            8: nDTACK_IOB 
-  3: IOREQ              6: nBERR_IOB          9: nVPA_IOB 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-iobs/IOACTr          .X...................................... 1
-iobm/VPArr           ........X............................... 1
-iobm/VPArf           ........X............................... 1
-iobm/IOREQr          ..X..................................... 1
-iobm/Er2             ....X................................... 1
-iobm/Er              X....................................... 1
-iobm/DTACKrr         .......X................................ 1
-iobm/DTACKrf         .......X................................ 1
-iobm/BGr1            ...X.................................... 1
-iobm/BGr0            ......X................................. 1
-iobm/BERRrr          .....X.................................. 1
-iobm/BERRrf          .....X.................................. 1
-cnt/RefCnt<0>        ........................................ 0
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               38/16
-Number of signals used by logic mapping into function block:  38
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-fsb/Ready1r           8       4<- \/1   0     FB3_1         (b)     (b)
-(unused)              0       0   \/5   0     FB3_2   23    GCK/I/O GCK/I
-iobs/IORW1           17      12<-   0   0     FB3_3         (b)     (b)
-(unused)              0       0   /\5   0     FB3_4         (b)     (b)
-fsb/Ready2r           9       5<- /\1   0     FB3_5   24    I/O     I
-(unused)              0       0   /\5   0     FB3_6   25    I/O     I
-(unused)              0       0   \/3   2     FB3_7         (b)     (b)
-(unused)              0       0   \/5   0     FB3_8   27    GCK/I/O GCK
-nDTACK_FSB           23      18<-   0   0     FB3_9   28    I/O     O
-(unused)              0       0   /\5   0     FB3_10        (b)     (b)
-(unused)              0       0   /\5   0     FB3_11  29    I/O     I
-(unused)              0       0     0   5     FB3_12  30    I/O     I
-(unused)              0       0   \/5   0     FB3_13        (b)     (b)
-(unused)              0       0   \/5   0     FB3_14  32    I/O     I
-fsb/VPA              22      17<-   0   0     FB3_15  33    I/O     I
-(unused)              0       0   /\5   0     FB3_16        (b)     (b)
-nROMWE                1       0   /\2   2     FB3_17  34    I/O     O
-iobs/Clear1           1       0   \/4   0     FB3_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: $OpTx$$OpTx$FX_DC$182_INV$783  14: A_FSB<21>         27: fsb/Ready2r 
-  2: $OpTx$FX_DC$708                15: A_FSB<22>         28: fsb/VPA 
-  3: A_FSB<10>                      16: A_FSB<23>         29: iobs/IORW1 
-  4: A_FSB<11>                      17: A_FSB<8>          30: iobs/IOReady 
-  5: A_FSB<12>                      18: A_FSB<9>          31: iobs/Once 
-  6: A_FSB<13>                      19: BERR_IOBS         32: iobs/PS_FSM_FFd1 
-  7: A_FSB<14>                      20: SW<1>             33: iobs/PS_FSM_FFd2 
-  8: A_FSB<15>                      21: TimeoutA          34: nADoutLE1 
-  9: A_FSB<16>                      22: cs/nOverlay1      35: nAS_FSB 
- 10: A_FSB<17>                      23: fsb/ASrf          36: nBR_IOB 
- 11: A_FSB<18>                      24: fsb/BERR0r        37: nDTACK_FSB 
- 12: A_FSB<19>                      25: fsb/BERR1r        38: nWE_FSB 
- 13: A_FSB<20>                      26: fsb/Ready1r      
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-fsb/Ready1r          .....XX.XXXXXXXX...X.XX..X...X...XX..X.. 18
-iobs/IORW1           .....XX.XXXXXXXX...X.XX.....X.XXXXX..X.. 20
-fsb/Ready2r          ..XXXXXXXXXXXXXXXX..XXX...X.......X..X.. 22
-nDTACK_FSB           X.XXXXXXXXXXXXXXXXXXXXXXXXX..X...XXXXX.. 32
-fsb/VPA              XXXXXXXXXXXXXXXXXXXXXX.XXXXX.X...X.X.X.. 31
-nROMWE               ..................................X..X.. 2
-iobs/Clear1          ...............................XXX...... 3
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               41/13
-Number of signals used by logic mapping into function block:  41
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-cnt/RefCnt<6>         1       0     0   4     FB4_1         (b)     (b)
-nAoutOE               3       0     0   2     FB4_2   87    I/O     O
-cnt/RefCnt<5>         1       0     0   4     FB4_3         (b)     (b)
-cnt/RefCnt<4>         1       0     0   4     FB4_4         (b)     (b)
-nDoutOE               2       0     0   3     FB4_5   89    I/O     O
-nDinOE                3       0     0   2     FB4_6   90    I/O     O
-cnt/RefCnt<3>         1       0     0   4     FB4_7         (b)     (b)
-iobs/PS_FSM_FFd1      2       0     0   3     FB4_8   91    I/O     I
-fsb/BERR1r            2       0     0   3     FB4_9   92    I/O     I
-cs/nOverlay1          2       0     0   3     FB4_10        (b)     (b)
-nVPA_FSB              1       0     0   4     FB4_11  93    I/O     O
-cnt/RefDone           2       0     0   3     FB4_12  94    I/O     I
-cs/nOverlay0          3       0     0   2     FB4_13        (b)     (b)
-cnt/TimeoutBPre       3       0     0   2     FB4_14  95    I/O     I
-TimeoutA              3       0     0   2     FB4_15  96    I/O     I
-IOL0                  3       0     0   2     FB4_16        (b)     (b)
-iobs/IOReady          4       0     0   1     FB4_17  97    I/O     I
-BERR_IOBS             4       0     0   1     FB4_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<20>         15: cnt/RefCnt<4>      29: iobs/IOACTr 
-  2: A_FSB<21>         16: cnt/RefCnt<5>      30: iobs/IOL1 
-  3: A_FSB<22>         17: cnt/RefCnt<6>      31: iobs/IOReady 
-  4: A_FSB<23>         18: cnt/RefCnt<7>      32: iobs/Once 
-  5: BERR_IOBS         19: cnt/RefDone        33: iobs/PS_FSM_FFd1 
-  6: IOBERR            20: cnt/TimeoutBPre    34: iobs/PS_FSM_FFd2 
-  7: IORW0             21: cs/nOverlay0       35: nADoutLE1 
-  8: RefAck            22: fsb/ASrf           36: nAS_FSB 
-  9: SW<1>             23: fsb/BERR1r         37: nAS_IOB 
- 10: TimeoutA          24: fsb/VPA            38: nAoutOE 
- 11: cnt/RefCnt<0>     25: iobm/BGr0          39: nLDS_FSB 
- 12: cnt/RefCnt<1>     26: iobm/BGr1          40: nRES 
- 13: cnt/RefCnt<2>     27: iobm/IOS_FSM_FFd2  41: nWE_FSB 
- 14: cnt/RefCnt<3>     28: iobm/IOS_FSM_FFd3 
-
-Signal                        1         2         3         4         5 FB
-Name                0----+----0----+----0----+----0----+----0----+----0 Inputs
-cnt/RefCnt<6>        ..........XXXXXX.................................. 6
-nAoutOE              ........................XX..........XX............ 4
-cnt/RefCnt<5>        ..........XXXXX................................... 5
-cnt/RefCnt<4>        ..........XXXX.................................... 4
-nDoutOE              ......X...................XX...................... 3
-nDinOE               XXXX....X..........................X....X......... 7
-cnt/RefCnt<3>        ..........XXX..................................... 3
-iobs/PS_FSM_FFd1     ............................X...XX................ 3
-fsb/BERR1r           ....X................XX............X.............. 4
-cs/nOverlay1         ....................XX.............X.............. 3
-nVPA_FSB             .......................X...........X.............. 2
-cnt/RefDone          .......X..XXXXXXXXX............................... 10
-cs/nOverlay0         XXXX................XX.............X...X.......... 8
-cnt/TimeoutBPre      ..........XXXXXXXX.X.X.............X.............. 11
-TimeoutA             .........XXXXXXXX....X.............X.............. 10
-IOL0                 .............................X..XXX...X........... 5
-iobs/IOReady         .....X...............X......X.XX.XXX.............. 8
-BERR_IOBS            ....XX...............X......X..X.XXX.............. 8
-                    0----+----1----+----2----+----3----+----4----+----5
-                              0         0         0         0         0
-*********************************** FB5  ***********************************
-Number of function block inputs used/remaining:               42/12
-Number of signals used by logic mapping into function block:  42
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/RASEL            20      15<-   0   0     FB5_1         (b)     (b)
-nROMCS                3       3<- /\5   0     FB5_2   35    I/O     O
-cnt/RefCnt<7>         1       0   /\3   1     FB5_3         (b)     (b)
-ram/RAMDIS2           7       2<-   0   0     FB5_4         (b)     (b)
-nCAS                  1       0   /\2   2     FB5_5   36    I/O     O
-nOE                   1       0   \/3   1     FB5_6   37    I/O     O
-(unused)              0       0   \/5   0     FB5_7         (b)     (b)
-ram/RAMDIS1          18      13<-   0   0     FB5_8   39    I/O     (b)
-RA<4>                 2       2<- /\5   0     FB5_9   40    I/O     O
-(unused)              0       0   /\2   3     FB5_10        (b)     (b)
-RA<3>                 2       0   \/2   1     FB5_11  41    I/O     O
-RA<5>                 2       2<- \/5   0     FB5_12  42    I/O     O
-iobs/Load1           15      10<-   0   0     FB5_13        (b)     (b)
-RA<2>                 2       2<- /\5   0     FB5_14  43    I/O     O
-RA<6>                 2       0   /\2   1     FB5_15  46    I/O     O
-ram/Once              5       0     0   0     FB5_16        (b)     (b)
-(unused)              0       0   \/5   0     FB5_17  49    I/O     (b)
-(unused)              0       0   \/5   0     FB5_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<12>         15: A_FSB<5>          29: fsb/ASrf 
-  2: A_FSB<13>         16: A_FSB<6>          30: iobs/Once 
-  3: A_FSB<14>         17: A_FSB<7>          31: iobs/PS_FSM_FFd1 
-  4: A_FSB<15>         18: SW<1>             32: iobs/PS_FSM_FFd2 
-  5: A_FSB<16>         19: cnt/RefCnt<0>     33: nADoutLE1 
-  6: A_FSB<17>         20: cnt/RefCnt<1>     34: nAS_FSB 
-  7: A_FSB<18>         21: cnt/RefCnt<2>     35: nWE_FSB 
-  8: A_FSB<19>         22: cnt/RefCnt<3>     36: ram/BACTr 
-  9: A_FSB<20>         23: cnt/RefCnt<4>     37: ram/Once 
- 10: A_FSB<21>         24: cnt/RefCnt<5>     38: ram/RAMDIS2 
- 11: A_FSB<22>         25: cnt/RefCnt<6>     39: ram/RASEL 
- 12: A_FSB<23>         26: cnt/RefCnt<7>     40: ram/RS_FSM_FFd1 
- 13: A_FSB<3>          27: cnt/RefDone       41: ram/RS_FSM_FFd2 
- 14: A_FSB<4>          28: cs/nOverlay1      42: ram/RS_FSM_FFd3 
-
-Signal                        1         2         3         4         5 FB
-Name                0----+----0----+----0----+----0----+----0----+----0 Inputs
-ram/RASEL            .........XXX...........XXXXXX....X.XX..XXX........ 15
-nROMCS               ........XXXX.....X.........X...................... 6
-cnt/RefCnt<7>        ..................XXXXXXX......................... 7
-ram/RAMDIS2          .........XXX...........XXXXXX....X..XX.XXX........ 15
-nCAS                 ......................................X........... 1
-nOE                  .................................XX............... 2
-ram/RAMDIS1          .........XXX...........XXXXXX....X.XX..XXX........ 15
-RA<4>                ..X...........X.......................X........... 3
-RA<3>                .X...........X........................X........... 3
-RA<5>                ...X...........X......................X........... 3
-iobs/Load1           .XX.XXXXXXXX.....X.........XXXXXXXX............... 19
-RA<2>                X...........X.........................X........... 3
-RA<6>                ....X...........X.....................X........... 3
-ram/Once             .........XXX...............XX....X..X..XXX........ 10
-                    0----+----1----+----2----+----3----+----4----+----5
-                              0         0         0         0         0
-*********************************** FB6  ***********************************
-Number of function block inputs used/remaining:               34/20
-Number of signals used by logic mapping into function block:  34
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/ETACK            1       0   /\4   0     FB6_1         (b)     (b)
-nVMA_IOB              3       0     0   2     FB6_2   74    I/O     O
-iobm/IOS_FSM_FFd3     3       0     0   2     FB6_3         (b)     (b)
-iobm/ES<3>            3       0     0   2     FB6_4         (b)     (b)
-iobm/ES<1>            3       0     0   2     FB6_5   76    I/O     I
-iobm/ES<0>            3       0     0   2     FB6_6   77    I/O     I
-ALE0M                 3       0     0   2     FB6_7         (b)     (b)
-iobm/ES<4>            4       0     0   1     FB6_8   78    I/O     I
-nLDS_IOB              4       0     0   1     FB6_9   79    I/O     O
-iobm/IOS_FSM_FFd2     5       0     0   0     FB6_10        (b)     (b)
-nUDS_IOB              4       0     0   1     FB6_11  80    I/O     O
-nAS_IOB               3       0     0   2     FB6_12  81    I/O     O
-iobm/ES<2>            5       0     0   0     FB6_13        (b)     (b)
-nADoutLE1             2       0     0   3     FB6_14  82    I/O     O
-nADoutLE0             1       0   \/1   3     FB6_15  85    I/O     O
-IOACT                 7       2<-   0   0     FB6_16        (b)     (b)
-nDinLE                1       0   /\1   3     FB6_17  86    I/O     O
-IOBERR                9       4<-   0   0     FB6_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: ALE0M             13: iobm/ES<0>         24: iobm/IOS_FSM_FFd3 
-  2: ALE0S             14: iobm/ES<1>         25: iobm/RESrf 
-  3: CLK_IOB           15: iobm/ES<2>         26: iobm/RESrr 
-  4: IOACT             16: iobm/ES<3>         27: iobm/VPArf 
-  5: IOBERR            17: iobm/ES<4>         28: iobm/VPArr 
-  6: IOL0              18: iobm/ETACK         29: iobs/Clear1 
-  7: IORW0             19: iobm/Er            30: iobs/Load1 
-  8: IOU0              20: iobm/Er2           31: nADoutLE1 
-  9: iobm/BERRrf       21: iobm/IOREQr        32: nAoutOE 
- 10: iobm/BERRrr       22: iobm/IOS_FSM_FFd1  33: nBERR_IOB 
- 11: iobm/DTACKrf      23: iobm/IOS_FSM_FFd2  34: nVMA_IOB 
- 12: iobm/DTACKrr     
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/ETACK           ............XXXXX................X...... 6
-nVMA_IOB             ...X........XXXXX.........XX...X.X...... 10
-iobm/IOS_FSM_FFd3    ..X.................XXXX.......X........ 6
-iobm/ES<3>           ............XXXX..XX.................... 6
-iobm/ES<1>           ............XX....XX.................... 4
-iobm/ES<0>           ............XXXXX.XX.................... 7
-ALE0M                ....................XXXX.......X........ 5
-iobm/ES<4>           ............XXXXX.XX.................... 7
-nLDS_IOB             .....XX..............XXX.......X........ 6
-iobm/IOS_FSM_FFd2    ..X.....XXXX.....X...XXXXX.............. 11
-nUDS_IOB             ......XX.............XXX.......X........ 6
-nAS_IOB              .....................XXX.......X........ 4
-iobm/ES<2>           ............XXXXX.XX.................... 7
-nADoutLE1            ............................XXX......... 3
-nADoutLE0            XX...................................... 2
-IOACT                ..X.....XXXX.....X..XXXXXX.....X........ 13
-nDinLE               .....................XX................. 2
-IOBERR               ..X.X...XXXX.....X...XXXXX......X....... 13
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB7  ***********************************
-Number of function block inputs used/remaining:               36/18
-Number of signals used by logic mapping into function block:  36
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/RAMReady         16      11<-   0   0     FB7_1         (b)     (b)
-RA<1>                 2       2<- /\5   0     FB7_2   50    I/O     O
-TimeoutB              3       0   /\2   0     FB7_3         (b)     (b)
-fsb/Ready0r           3       0     0   2     FB7_4         (b)     (b)
-RA<7>                 2       0     0   3     FB7_5   52    I/O     O
-RA<0>                 2       0     0   3     FB7_6   53    I/O     O
-ram/RS_FSM_FFd1       5       0     0   0     FB7_7         (b)     (b)
-RA<8>                 7       2<-   0   0     FB7_8   54    I/O     O
-RA<10>                1       0   /\2   2     FB7_9   55    I/O     O
-$OpTx$$OpTx$FX_DC$182_INV$783
-                      6       1<-   0   0     FB7_10        (b)     (b)
-RA<9>                 2       0   /\1   2     FB7_11  56    I/O     O
-CLK25EN               1       0   \/4   0     FB7_12  58    I/O     O
-ram/RS_FSM_FFd3      11       6<-   0   0     FB7_13        (b)     (b)
-CLK20EN               1       0   /\2   2     FB7_14  59    I/O     O
-(unused)              0       0   \/4   1     FB7_15  60    I/O     I
-(unused)              0       0   \/5   0     FB7_16        (b)     (b)
-ram/RS_FSM_FFd2      13       9<- \/1   0     FB7_17  61    I/O     I
-(unused)              0       0   \/5   0     FB7_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<10>         13: A_FSB<9>          25: cnt/TimeoutBPre 
-  2: A_FSB<11>         14: SW<0>             26: cs/nOverlay1 
-  3: A_FSB<17>         15: TimeoutB          27: fsb/ASrf 
-  4: A_FSB<18>         16: cnt/RefCnt<0>     28: fsb/Ready0r 
-  5: A_FSB<19>         17: cnt/RefCnt<1>     29: nAS_FSB 
-  6: A_FSB<1>          18: cnt/RefCnt<2>     30: ram/BACTr 
-  7: A_FSB<20>         19: cnt/RefCnt<3>     31: ram/Once 
-  8: A_FSB<21>         20: cnt/RefCnt<4>     32: ram/RAMReady 
-  9: A_FSB<22>         21: cnt/RefCnt<5>     33: ram/RASEL 
- 10: A_FSB<23>         22: cnt/RefCnt<6>     34: ram/RS_FSM_FFd1 
- 11: A_FSB<2>          23: cnt/RefCnt<7>     35: ram/RS_FSM_FFd2 
- 12: A_FSB<8>          24: cnt/RefDone       36: ram/RS_FSM_FFd3 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RAMReady         .......XXX..........XXXX.XX.XXX..XXX.... 15
-RA<1>                .X........X.....................X....... 3
-TimeoutB             ..............XXXXXXXXX.X.X.X........... 12
-fsb/Ready0r          .......XXX...............XXXX..X........ 8
-RA<7>                ..X........X....................X....... 3
-RA<0>                X....X..........................X....... 3
-ram/RS_FSM_FFd1      .......XXX...............XX.X.X..XXX.... 10
-RA<8>                ...X...XXX..X............X......X....... 7
-RA<10>               .......X................................ 1
-$OpTx$$OpTx$FX_DC$182_INV$783 
-                     ......XXXX....X..........X.X...X........ 8
-RA<9>                ....X.X.........................X....... 3
-CLK25EN              .............X.......................... 1
-ram/RS_FSM_FFd3      .......XXX..........XXXX.XX.X.X..XXX.... 14
-CLK20EN              .............X.......................... 1
-ram/RS_FSM_FFd2      .......XXX..........XXXX.XX.XX...XXX.... 14
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB8  ***********************************
-Number of function block inputs used/remaining:               37/17
-Number of signals used by logic mapping into function block:  37
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   /\5   0     FB8_1         (b)     (b)
-RA<11>                1       0   /\4   0     FB8_2   63    I/O     O
-(unused)              0       0   \/5   0     FB8_3         (b)     (b)
-iobs/PS_FSM_FFd2     15      10<-   0   0     FB8_4         (b)     (b)
-nRAS                  3       3<- /\5   0     FB8_5   64    I/O     O
-nRAMLWE               1       0   /\3   1     FB8_6   65    I/O     O
-RESDone               1       0   \/1   3     FB8_7         (b)     (b)
-nRAMUWE               1       1<- \/5   0     FB8_8   66    I/O     O
-IOREQ                15      10<-   0   0     FB8_9   67    I/O     (b)
-(unused)              0       0   /\5   0     FB8_10        (b)     (b)
-(unused)              0       0   \/2   3     FB8_11  68    I/O     (b)
-nBERR_FSB             3       2<- \/4   0     FB8_12  70    I/O     O
-(unused)              0       0   \/5   0     FB8_13        (b)     (b)
-iobs/Once            18      13<-   0   0     FB8_14  71    I/O     (b)
-nBR_IOB               1       0   /\4   0     FB8_15  72    I/O     O
-fsb/BERR0r            3       0     0   2     FB8_16        (b)     (b)
-(unused)              0       0   \/5   0     FB8_17  73    I/O     I
-IORW0                19      14<-   0   0     FB8_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<13>         14: IPL2r1            26: iobs/IOACTr 
-  2: A_FSB<14>         15: RESDone           27: iobs/IORW1 
-  3: A_FSB<16>         16: RESr0             28: iobs/Once 
-  4: A_FSB<17>         17: RESr1             29: iobs/PS_FSM_FFd1 
-  5: A_FSB<18>         18: RESr2             30: iobs/PS_FSM_FFd2 
-  6: A_FSB<19>         19: RefAck            31: nADoutLE1 
-  7: A_FSB<20>         20: SW<1>             32: nAS_FSB 
-  8: A_FSB<21>         21: TimeoutB          33: nLDS_FSB 
-  9: A_FSB<22>         22: cs/nOverlay1      34: nUDS_FSB 
- 10: A_FSB<23>         23: fsb/ASrf          35: nWE_FSB 
- 11: BERR_IOBS         24: fsb/BERR0r        36: ram/RAMDIS1 
- 12: IORW0             25: fsb/BERR1r        37: ram/RAMDIS2 
- 13: IPL2r0           
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-RA<11>               .....X.................................. 1
-iobs/PS_FSM_FFd2     XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20
-nRAS                 .......XXX........X..X.........X...XX... 8
-nRAMLWE              ...............................XX.XXX... 5
-RESDone              ...............XXX...................... 3
-nRAMUWE              ...............................X.XXXX... 5
-IOREQ                XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20
-nBERR_FSB            ......XXXXX.........X..XX......X........ 9
-iobs/Once            XXXXXXXXXX.........X.XX....XXXXX..X..... 19
-nBR_IOB              ............XXXXXX...................... 6
-fsb/BERR0r           ......XXXX..........X.XX.......X........ 8
-IORW0                XXXXXXXXXX.X.......X.XX...XXXXXX..X..... 21
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*******************************  Equations  ********************************
-
-********** Mapped Logic **********
-
-
-$OpTx$$OpTx$FX_DC$182_INV$783 <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady)
-	OR (A_FSB(23) AND TimeoutB)
-	OR (NOT A_FSB(22) AND TimeoutB)
-	OR (A_FSB(21) AND TimeoutB)
-	OR (NOT A_FSB(20) AND TimeoutB)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND NOT ram/RAMReady));
-
-
-$OpTx$FX_DC$708 <= (nAS_FSB AND NOT fsb/ASrf);
-
-FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0');
-ALE0M_D <= ((iobm/IOS_FSM_FFd2)
-	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd1 AND iobm/IOREQr AND NOT nAoutOE));
-
-FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0');
-ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0');
-BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
-	OR (iobs/Once AND BERR_IOBS AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1)
-	OR (iobs/Once AND NOT BERR_IOBS AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND IOBERR AND nADoutLE1)
-	OR (iobs/Once AND NOT BERR_IOBS AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1));
-
-
-CLK20EN <= SW(0);
-
-
-CLK25EN <= NOT SW(0);
-
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-FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0');
-IOACT_D <= ((CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/DTACKrf AND iobm/DTACKrr)
-	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/RESrf AND iobm/RESrr)
-	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND 
-	NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND nAoutOE)
-	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/ETACK)
-	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/BERRrf AND iobm/BERRrr));
-
-FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0');
-IOBERR_T <= ((CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND 
-	iobm/RESrr)
-	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND 
-	iobm/BERRrr)
-	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND 
-	iobm/RESrr)
-	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
-	NOT iobm/IOS_FSM_FFd2 AND IOBERR)
-	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK)
-	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK)
-	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND 
-	iobm/BERRrr));
-
-FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
-IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1)
-	OR (iobs/IOL1 AND NOT nADoutLE1));
-IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
-IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1)
-	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)
-	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND 
-	nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1));
-
-FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0');
-IORW0_T <= ((A_FSB_19_IBUF$BUF0.EXP)
-	OR (IORW0 AND iobs/IORW1 AND NOT nADoutLE1)
-	OR (NOT IORW0 AND NOT iobs/IORW1 AND NOT nADoutLE1)
-	OR (nAS_FSB AND NOT fsb/ASrf AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT IORW0 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND nADoutLE1)
-	OR (NOT IORW0 AND NOT nWE_FSB AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND nADoutLE1)
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-	nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1 AND nADoutLE1));
-
-FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE);
-IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1)
-	OR (iobs/IOU1 AND NOT nADoutLE1));
-IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-FDCPE_IPL2r0: FDCPE port map (IPL2r0,NOT nIPL2,CLK_FSB,'0','0');
-
-FDCPE_IPL2r1: FDCPE port map (IPL2r1,IPL2r0,CLK_FSB,'0','0');
-
-
-RA(0) <= ((A_FSB(10) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(1)));
-
-
-RA(1) <= ((A_FSB(11) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(2)));
-
-
-RA(2) <= ((A_FSB(12) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(3)));
-
-
-RA(3) <= ((A_FSB(13) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(4)));
-
-
-RA(4) <= ((A_FSB(14) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(5)));
-
-
-RA(5) <= ((A_FSB(15) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(6)));
-
-
-RA(6) <= ((A_FSB(16) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(7)));
-
-
-RA(7) <= ((A_FSB(8) AND ram/RASEL)
-	OR (A_FSB(17) AND NOT ram/RASEL));
-
-
-RA(8) <= ((A_FSB(9) AND NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	ram/RASEL)
-	OR (A_FSB(9) AND NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/RASEL)
-	OR (A_FSB(23) AND A_FSB(18))
-	OR (A_FSB(18) AND NOT ram/RASEL)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(18))
-	OR (A_FSB(22) AND A_FSB(18) AND cs/nOverlay1)
-	OR (NOT A_FSB(22) AND A_FSB(18) AND NOT cs/nOverlay1));
-
-
-RA(9) <= ((A_FSB(20) AND ram/RASEL)
-	OR (A_FSB(19) AND NOT ram/RASEL));
-
-
-RA(10) <= A_FSB(21);
-
-
-RA(11) <= A_FSB(19);
-
-FDCPE_RESDone: FDCPE port map (RESDone,'1',CLK_FSB,'0','0',RESDone_CE);
-RESDone_CE <= (NOT RESr0 AND NOT RESr1 AND RESr2);
-
-FDCPE_RESr0: FDCPE port map (RESr0,NOT nRES,CLK_FSB,'0','0');
-
-FDCPE_RESr1: FDCPE port map (RESr1,RESr0,CLK_FSB,'0','0');
-
-FDCPE_RESr2: FDCPE port map (RESr2,RESr1,CLK_FSB,'0','0');
-
-FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0');
-RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1);
-
-FTCPE_TimeoutA: FTCPE port map (TimeoutA,TimeoutA_T,CLK_FSB,'0','0');
-TimeoutA_T <= ((TimeoutA AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT TimeoutA AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4))
-	OR (NOT TimeoutA AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-	NOT cnt/RefCnt(4) AND fsb/ASrf));
-
-FTCPE_TimeoutB: FTCPE port map (TimeoutB,TimeoutB_T,CLK_FSB,'0','0');
-TimeoutB_T <= ((TimeoutB AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT nAS_FSB AND 
-	NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND 
-	NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-
-FTCPE_cnt/RefCnt0: FTCPE port map (cnt/RefCnt(0),'1',CLK_FSB,'0','0');
-
-FTCPE_cnt/RefCnt1: FTCPE port map (cnt/RefCnt(1),cnt/RefCnt(0),CLK_FSB,'0','0');
-
-FTCPE_cnt/RefCnt2: FTCPE port map (cnt/RefCnt(2),cnt/RefCnt_T(2),CLK_FSB,'0','0');
-cnt/RefCnt_T(2) <= (cnt/RefCnt(0) AND cnt/RefCnt(1));
-
-FTCPE_cnt/RefCnt3: FTCPE port map (cnt/RefCnt(3),cnt/RefCnt_T(3),CLK_FSB,'0','0');
-cnt/RefCnt_T(3) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2));
-
-FTCPE_cnt/RefCnt4: FTCPE port map (cnt/RefCnt(4),cnt/RefCnt_T(4),CLK_FSB,'0','0');
-cnt/RefCnt_T(4) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-	cnt/RefCnt(3));
-
-FTCPE_cnt/RefCnt5: FTCPE port map (cnt/RefCnt(5),cnt/RefCnt_T(5),CLK_FSB,'0','0');
-cnt/RefCnt_T(5) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-	cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FTCPE_cnt/RefCnt6: FTCPE port map (cnt/RefCnt(6),cnt/RefCnt_T(6),CLK_FSB,'0','0');
-cnt/RefCnt_T(6) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(1) AND 
-	cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FTCPE_cnt/RefCnt7: FTCPE port map (cnt/RefCnt(7),cnt/RefCnt_T(7),CLK_FSB,'0','0');
-cnt/RefCnt_T(7) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(1) AND cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FDCPE_cnt/RefDone: FDCPE port map (cnt/RefDone,cnt/RefDone_D,CLK_FSB,'0','0');
-cnt/RefDone_D <= ((NOT cnt/RefDone AND NOT RefAck)
-	OR (NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND 
-	NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND 
-	NOT cnt/RefCnt(7)));
-
-FTCPE_cnt/TimeoutBPre: FTCPE port map (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,'0','0');
-cnt/TimeoutBPre_T <= ((cnt/TimeoutBPre AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT cnt/TimeoutBPre AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-	OR (NOT cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-	NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-
-FTCPE_cs/nOverlay0: FTCPE port map (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,NOT nRES,'0');
-cs/nOverlay0_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay0 AND NOT nAS_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay0 AND fsb/ASrf));
-
-FDCPE_cs/nOverlay1: FDCPE port map (cs/nOverlay1,cs/nOverlay0,CLK_FSB,'0','0',cs/nOverlay1_CE);
-cs/nOverlay1_CE <= (nAS_FSB AND NOT fsb/ASrf);
-
-FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT CLK_FSB,'0','0');
-
-FDCPE_fsb/BERR0r: FDCPE port map (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,'0','0');
-fsb/BERR0r_D <= ((NOT TimeoutB AND NOT fsb/BERR0r)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-	NOT fsb/BERR0r));
-
-FDCPE_fsb/BERR1r: FDCPE port map (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,'0','0');
-fsb/BERR1r_D <= ((NOT BERR_IOBS AND NOT fsb/BERR1r)
-	OR (nAS_FSB AND NOT fsb/ASrf));
-
-FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,'0','0');
-fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND NOT ram/RAMReady)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady));
-
-FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
-fsb/Ready1r_D <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	NOT nADoutLE1)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady AND NOT SW(1)));
-
-FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
-fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
-
-FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0');
-fsb/VPA_D <= ((EXP21_.EXP)
-	OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND 
-	NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND 
-	NOT iobs/IOReady AND NOT SW(1) AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
-	OR (nROMWE_OBUF.EXP)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	fsb/VPA AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	fsb/VPA AND NOT $OpTx$FX_DC$708)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	fsb/VPA AND NOT $OpTx$FX_DC$708)
-	OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$708)
-	OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
-	OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
-	OR (fsb/VPA AND NOT nBR_IOB AND NOT $OpTx$FX_DC$708)
-	OR (fsb/VPA AND NOT $OpTx$FX_DC$708 AND 
-	$OpTx$$OpTx$FX_DC$182_INV$783));
-
-FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/BGr0: FDCPE port map (iobm/BGr0,NOT nBG_IOB,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/BGr1: FDCPE port map (iobm/BGr1,iobm/BGr0,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0');
-
-FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),CLK2X_IOB,'0','0');
-iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2)
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er)
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2));
-
-FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),CLK2X_IOB,'0','0');
-iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1))
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1))
-	OR (NOT iobm/Er AND iobm/Er2));
-
-FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),CLK2X_IOB,'0','0');
-iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2))
-	OR (NOT iobm/ES(1) AND NOT iobm/ES(2))
-	OR (NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2))
-	OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4)));
-
-FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),CLK2X_IOB,'0','0');
-iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2));
-
-FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),CLK2X_IOB,'0','0');
-iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	iobm/ES(3) AND iobm/Er)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	iobm/ES(3) AND NOT iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND iobm/ES(4)));
-
-FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,'0','0');
-iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND iobm/ES(4));
-
-FDCPE_iobm/Er: FDCPE port map (iobm/Er,E_IOB,NOT CLK_IOB,'0','0');
-
-FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2));
-
-FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/IOS_FSM_FFd2 AND iobm/ETACK)
-	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr)
-	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
-	iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr));
-
-FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
-	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (NOT CLK_IOB AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND 
-	iobm/IOREQr AND NOT nAoutOE));
-
-FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,CLK2X_IOB,'0','0');
-
-FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,CLK_FSB,'0','0');
-iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1);
-
-FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,CLK_FSB,'0','0');
-
-FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-
-FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0');
-iobs/IORW1_T <= ((iobs/Once)
-	OR (NOT nADoutLE1)
-	OR (fsb/Ready1r.EXP)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
-	OR (fsb/Ready2r.EXP)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
-	OR (nWE_FSB AND iobs/IORW1)
-	OR (NOT nWE_FSB AND NOT iobs/IORW1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1));
-
-FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0');
-iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf)
-	OR (iobs/Once AND iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/IOACTr AND IOBERR AND nADoutLE1)
-	OR (iobs/Once AND NOT iobs/IOReady AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1)
-	OR (iobs/Once AND NOT iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/IOACTr AND NOT IOBERR AND fsb/ASrf AND nADoutLE1));
-
-FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-
-FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0');
-iobs/Load1_D <= ((iobs/Once)
-	OR (NOT nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1));
-
-FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0');
-iobs/Once_D <= ((nBERR_FSB_OBUF.EXP)
-	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT iobs/Once AND 
-	NOT cs/nOverlay1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1));
-
-FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0');
-iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
-	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr));
-
-FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0');
-iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-	iobs/IOACTr)
-	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-	NOT iobs/IOACTr)
-	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	nADoutLE1)
-	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	NOT fsb/ASrf AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
-
-
-nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);
-
-FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0');
-nADoutLE1_D <= ((iobs/Load1)
-	OR (NOT iobs/Clear1 AND NOT nADoutLE1));
-
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT CLK2X_IOB,'0','0');
-nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2)
-	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2));
-nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z';
-nAS_IOB_OE <= NOT nAoutOE;
-
-FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,CLK2X_IOB,'0','0');
-nAoutOE_D <= ((NOT iobm/BGr0 AND NOT iobm/BGr1)
-	OR (NOT iobm/BGr1 AND nAoutOE)
-	OR (NOT nAS_IOB AND NOT iobm/BGr0 AND NOT nAoutOE));
-
-
-nBERR_FSB <= ((nAS_FSB)
-	OR (NOT BERR_IOBS AND NOT TimeoutB AND NOT fsb/BERR0r AND NOT fsb/BERR1r)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-	NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r));
-
-FDCPE_nBR_IOB: FDCPE port map (nBR_IOB,'0',CLK_FSB,'0','0',nBR_IOB_CE);
-nBR_IOB_CE <= (RESr0 AND RESr1 AND IPL2r0 AND RESr2 AND NOT RESDone AND 
-	IPL2r1);
-
-FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0');
-
-FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
-nDTACK_FSB_D <= ((EXP17_.EXP)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady AND nDTACK_FSB)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady AND NOT SW(1) AND nDTACK_FSB)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR (EXP20_.EXP)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB AND NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB AND NOT nADoutLE1)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	nDTACK_FSB)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	nDTACK_FSB)
-	OR (BERR_IOBS AND nDTACK_FSB)
-	OR (fsb/BERR0r AND nDTACK_FSB)
-	OR (fsb/BERR1r AND nDTACK_FSB)
-	OR (nDTACK_FSB AND NOT nBR_IOB)
-	OR (nDTACK_FSB AND $OpTx$$OpTx$FX_DC$182_INV$783));
-
-FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0');
-nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2);
-
-
-nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND 
-	NOT nAS_FSB)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND nWE_FSB AND NOT nAS_FSB AND 
-	NOT SW(1)));
-
-FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0');
-nDoutOE_D <= ((NOT IORW0)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2));
-
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT CLK2X_IOB,'0','0');
-nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
-	OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
-	OR (NOT IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd1));
-nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z';
-nLDS_IOB_OE <= NOT nAoutOE;
-
-
-nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
-
-
-nRAMLWE <= NOT ((NOT nWE_FSB AND NOT nLDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RAMDIS1));
-
-
-nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RAMDIS1));
-
-
-nRAS <= NOT (((RefAck)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)));
-
-
-nROMCS <= NOT (((A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT SW(1))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	SW(1))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay1)));
-
-
-nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
-
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT CLK2X_IOB,'0','0');
-nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
-	OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
-	OR (NOT IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd1));
-nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z';
-nUDS_IOB_OE <= NOT nAoutOE;
-
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,'0','0');
-nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4))
-	OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr));
-nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z';
-nVMA_IOB_OE <= NOT nAoutOE;
-
-
-nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
-
-FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,CLK_FSB,'0','0');
-ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf);
-
-FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0');
-ram/Once_T <= ((ram/Once AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
-	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
-	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
-
-FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
-ram/RAMDIS1_D <= ((nOE_OBUF.EXP)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND NOT fsb/ASrf)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/BACTr AND fsb/ASrf));
-
-FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0');
-ram/RAMDIS2_T <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
-	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
-	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7) AND fsb/ASrf)
-	OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf)
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
-	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
-	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf));
-
-FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0');
-ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1)
-	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/BACTr AND fsb/ASrf)
-	OR (ram/RS_FSM_FFd2.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
-	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
-	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
-
-FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
-ram/RASEL_D <= ((A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND 
-	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (EXP26_.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)));
-
-FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
-	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
-	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
-
-FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd2_T <= ((EXP28_.EXP)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(5) AND ram/BACTr)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(5) AND NOT fsb/ASrf)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(6) AND NOT fsb/ASrf)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(7) AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-	OR (cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(6) AND ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND ram/BACTr AND 
-	NOT cnt/RefCnt(7)));
-
-FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
-	OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND 
-	ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf)
-	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(5))
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6))
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7)));
-
-Register Legend:
- FDCPE (Q,D,C,CLR,PRE,CE); 
- FTCPE (Q,D,C,CLR,PRE,CE); 
- LDCP  (Q,D,G,CLR,PRE); 
-
-******************************  Device Pin Out *****************************
-
-Device : XC95144XL-10-TQ100
-
-
-   --------------------------------------------------  
-  /100 98  96  94  92  90  88  86  84  82  80  78  76  \
- |   99  97  95  93  91  89  87  85  83  81  79  77    |
- | 1                                               75  | 
- | 2                                               74  | 
- | 3                                               73  | 
- | 4                                               72  | 
- | 5                                               71  | 
- | 6                                               70  | 
- | 7                                               69  | 
- | 8                                               68  | 
- | 9                                               67  | 
- | 10                                              66  | 
- | 11                                              65  | 
- | 12                                              64  | 
- | 13              XC95144XL-10-TQ100              63  | 
- | 14                                              62  | 
- | 15                                              61  | 
- | 16                                              60  | 
- | 17                                              59  | 
- | 18                                              58  | 
- | 19                                              57  | 
- | 20                                              56  | 
- | 21                                              55  | 
- | 22                                              54  | 
- | 23                                              53  | 
- | 24                                              52  | 
- | 25                                              51  | 
- |   27  29  31  33  35  37  39  41  43  45  47  49    |
-  \26  28  30  32  34  36  38  40  42  44  46  48  50  /
-   --------------------------------------------------  
-
-
-Pin Signal                         Pin Signal                        
-No. Name                           No. Name                          
-  1 KPR                              51 VCC                           
-  2 A_FSB<5>                         52 RA<7>                         
-  3 A_FSB<6>                         53 RA<0>                         
-  4 A_FSB<7>                         54 RA<8>                         
-  5 VCC                              55 RA<10>                        
-  6 A_FSB<8>                         56 RA<9>                         
-  7 A_FSB<9>                         57 VCC                           
-  8 A_FSB<10>                        58 CLK25EN                       
-  9 A_FSB<11>                        59 CLK20EN                       
- 10 A_FSB<12>                        60 SW<1>                         
- 11 A_FSB<13>                        61 SW<0>                         
- 12 A_FSB<14>                        62 GND                           
- 13 A_FSB<15>                        63 RA<11>                        
- 14 A_FSB<16>                        64 nRAS                          
- 15 A_FSB<17>                        65 nRAMLWE                       
- 16 A_FSB<18>                        66 nRAMUWE                       
- 17 A_FSB<19>                        67 KPR                           
- 18 A_FSB<20>                        68 KPR                           
- 19 A_FSB<21>                        69 GND                           
- 20 A_FSB<22>                        70 nBERR_FSB                     
- 21 GND                              71 KPR                           
- 22 CLK2X_IOB                        72 nBR_IOB                       
- 23 CLK_IOB                          73 nBG_IOB                       
- 24 A_FSB<23>                        74 nVMA_IOB                      
- 25 E_IOB                            75 GND                           
- 26 VCC                              76 nBERR_IOB                     
- 27 CLK_FSB                          77 nVPA_IOB                      
- 28 nDTACK_FSB                       78 nDTACK_IOB                    
- 29 nWE_FSB                          79 nLDS_IOB                      
- 30 nLDS_FSB                         80 nUDS_IOB                      
- 31 GND                              81 nAS_IOB                       
- 32 nAS_FSB                          82 nADoutLE1                     
- 33 nUDS_FSB                         83 TDO                           
- 34 nROMWE                           84 GND                           
- 35 nROMCS                           85 nADoutLE0                     
- 36 nCAS                             86 nDinLE                        
- 37 nOE                              87 nAoutOE                       
- 38 VCC                              88 VCC                           
- 39 KPR                              89 nDoutOE                       
- 40 RA<4>                            90 nDinOE                        
- 41 RA<3>                            91 nRES                          
- 42 RA<5>                            92 nIPL2                         
- 43 RA<2>                            93 nVPA_FSB                      
- 44 GND                              94 A_FSB<1>                      
- 45 TDI                              95 A_FSB<2>                      
- 46 RA<6>                            96 A_FSB<3>                      
- 47 TMS                              97 A_FSB<4>                      
- 48 TCK                              98 VCC                           
- 49 KPR                              99 KPR                           
- 50 RA<1>                           100 GND                           
-
-
-Legend :  NC  = Not Connected, unbonded pin
-         PGND = Unused I/O configured as additional Ground pin
-         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
-         KPR  = Unused I/O with weak keeper (leave unconnected)
-         VCC  = Dedicated Power Pin
-         GND  = Dedicated Ground Pin
-         TDI  = Test Data In, JTAG pin
-         TDO  = Test Data Out, JTAG pin
-         TCK  = Test Clock, JTAG pin
-         TMS  = Test Mode Select, JTAG pin
-  PROHIBITED  = User reserved pin
-****************************  Compiler Options  ****************************
-
-Following is a list of all global compiler options used by the fitter run.
-
-Device(s) Specified                         : xc95144xl-10-TQ100
-Optimization Method                         : SPEED
-Multi-Level Logic Optimization              : ON
-Ignore Timing Specifications                : OFF
-Default Register Power Up Value             : LOW
-Keep User Location Constraints              : ON
-What-You-See-Is-What-You-Get                : OFF
-Exhaustive Fitting                          : OFF
-Keep Unused Inputs                          : OFF
-Slew Rate                                   : FAST
-Power Mode                                  : STD
-Ground on Unused IOs                        : OFF
-Set I/O Pin Termination                     : KEEPER
-Global Clock Optimization                   : ON
-Global Set/Reset Optimization               : ON
-Global Ouput Enable Optimization            : ON
-Input Limit                                 : 54
-Pterm Limit                                 : 25
-
-
- - -
- diff --git a/cpld/XC95144XL/MXSE_html/fit/defeqns.htm b/cpld/XC95144XL/MXSE_html/fit/defeqns.htm deleted file mode 100644 index 0f13545..0000000 --- a/cpld/XC95144XL/MXSE_html/fit/defeqns.htm +++ /dev/null @@ -1,990 +0,0 @@ - -

Equations

- - -
-
-********** Mapped Logic ********** -
-
-$OpTx$$OpTx$FX_DC$182_INV$783 <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady) -
      OR (A_FSB(23) AND TimeoutB) -
      OR (NOT A_FSB(22) AND TimeoutB) -
      OR (A_FSB(21) AND TimeoutB) -
      OR (NOT A_FSB(20) AND TimeoutB) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND -
      NOT fsb/Ready0r AND NOT ram/RAMReady)); -
-
-$OpTx$FX_DC$708 <= (nAS_FSB AND NOT fsb/ASrf); -
-FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0'); -
     ALE0M_D <= ((iobm/IOS_FSM_FFd2) -
      OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1) -
      OR (NOT iobm/IOS_FSM_FFd1 AND iobm/IOREQr AND NOT nAoutOE)); -
-FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0'); -
     ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -
-FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0'); -
     BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf) -
      OR (iobs/Once AND BERR_IOBS AND NOT iobs/PS_FSM_FFd2 AND -
      NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) -
      OR (iobs/Once AND NOT BERR_IOBS AND NOT nAS_FSB AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND IOBERR AND nADoutLE1) -
      OR (iobs/Once AND NOT BERR_IOBS AND NOT iobs/PS_FSM_FFd2 AND -
      NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1)); -
-
-CLK20EN <= SW(0); -
-
-CLK25EN <= NOT SW(0); -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0'); -
     IOACT_D <= ((CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/DTACKrf AND iobm/DTACKrr) -
      OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/RESrf AND iobm/RESrr) -
      OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) -
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND -
      NOT iobm/IOREQr) -
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND nAoutOE) -
      OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/ETACK) -
      OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/BERRrf AND iobm/BERRrr)); -
-FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0'); -
     IOBERR_T <= ((CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND -
      iobm/RESrr) -
      OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND -
      iobm/DTACKrr) -
      OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND -
      iobm/BERRrr) -
      OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND -
      iobm/RESrr) -
      OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND -
      NOT iobm/IOS_FSM_FFd2 AND IOBERR) -
      OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK) -
      OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK) -
      OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND -
      iobm/DTACKrr) -
      OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND -
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND -
      iobm/BERRrr)); -
-FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE); -
     IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1) -
      OR (iobs/IOL1 AND NOT nADoutLE1)); -
     IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -
-FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0'); -
     IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1) -
      OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr) -
      OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1) -
      OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND -
      nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND -
      NOT iobs/PS_FSM_FFd2 AND nADoutLE1)); -
-FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0'); -
     IORW0_T <= ((A_FSB_19_IBUF$BUF0.EXP) -
      OR (IORW0 AND iobs/IORW1 AND NOT nADoutLE1) -
      OR (NOT IORW0 AND NOT iobs/IORW1 AND NOT nADoutLE1) -
      OR (nAS_FSB AND NOT fsb/ASrf AND nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT IORW0 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND nADoutLE1) -
      OR (NOT IORW0 AND NOT nWE_FSB AND nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND -
      nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND nADoutLE1) -
      OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND -
      nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      cs/nOverlay1 AND nADoutLE1)); -
-FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE); -
     IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1) -
      OR (iobs/IOU1 AND NOT nADoutLE1)); -
     IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -
-FDCPE_IPL2r0: FDCPE port map (IPL2r0,NOT nIPL2,CLK_FSB,'0','0'); -
-FDCPE_IPL2r1: FDCPE port map (IPL2r1,IPL2r0,CLK_FSB,'0','0'); -
-
-RA(0) <= ((A_FSB(10) AND NOT ram/RASEL) -
      OR (ram/RASEL AND A_FSB(1))); -
-
-RA(1) <= ((A_FSB(11) AND NOT ram/RASEL) -
      OR (ram/RASEL AND A_FSB(2))); -
-
-RA(2) <= ((A_FSB(12) AND NOT ram/RASEL) -
      OR (ram/RASEL AND A_FSB(3))); -
-
-RA(3) <= ((A_FSB(13) AND NOT ram/RASEL) -
      OR (ram/RASEL AND A_FSB(4))); -
-
-RA(4) <= ((A_FSB(14) AND NOT ram/RASEL) -
      OR (ram/RASEL AND A_FSB(5))); -
-
-RA(5) <= ((A_FSB(15) AND NOT ram/RASEL) -
      OR (ram/RASEL AND A_FSB(6))); -
-
-RA(6) <= ((A_FSB(16) AND NOT ram/RASEL) -
      OR (ram/RASEL AND A_FSB(7))); -
-
-RA(7) <= ((A_FSB(8) AND ram/RASEL) -
      OR (A_FSB(17) AND NOT ram/RASEL)); -
-
-RA(8) <= ((A_FSB(9) AND NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND -
      ram/RASEL) -
      OR (A_FSB(9) AND NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      NOT cs/nOverlay1 AND ram/RASEL) -
      OR (A_FSB(23) AND A_FSB(18)) -
      OR (A_FSB(18) AND NOT ram/RASEL) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(18)) -
      OR (A_FSB(22) AND A_FSB(18) AND cs/nOverlay1) -
      OR (NOT A_FSB(22) AND A_FSB(18) AND NOT cs/nOverlay1)); -
-
-RA(9) <= ((A_FSB(20) AND ram/RASEL) -
      OR (A_FSB(19) AND NOT ram/RASEL)); -
-
-RA(10) <= A_FSB(21); -
-
-RA(11) <= A_FSB(19); -
-FDCPE_RESDone: FDCPE port map (RESDone,'1',CLK_FSB,'0','0',RESDone_CE); -
     RESDone_CE <= (NOT RESr0 AND NOT RESr1 AND RESr2); -
-FDCPE_RESr0: FDCPE port map (RESr0,NOT nRES,CLK_FSB,'0','0'); -
-FDCPE_RESr1: FDCPE port map (RESr1,RESr0,CLK_FSB,'0','0'); -
-FDCPE_RESr2: FDCPE port map (RESr2,RESr1,CLK_FSB,'0','0'); -
-FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0'); -
     RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1); -
-FTCPE_TimeoutA: FTCPE port map (TimeoutA,TimeoutA_T,CLK_FSB,'0','0'); -
     TimeoutA_T <= ((TimeoutA AND nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT TimeoutA AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND -
      NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND -
      NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4)) -
      OR (NOT TimeoutA AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND -
      NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND -
      NOT cnt/RefCnt(4) AND fsb/ASrf)); -
-FTCPE_TimeoutB: FTCPE port map (TimeoutB,TimeoutB_T,CLK_FSB,'0','0'); -
     TimeoutB_T <= ((TimeoutB AND nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT nAS_FSB AND -
      NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND -
      NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7)) -
      OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND -
      NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND -
      NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf)); -
-FTCPE_cnt/RefCnt0: FTCPE port map (cnt/RefCnt(0),'1',CLK_FSB,'0','0'); -
-FTCPE_cnt/RefCnt1: FTCPE port map (cnt/RefCnt(1),cnt/RefCnt(0),CLK_FSB,'0','0'); -
-FTCPE_cnt/RefCnt2: FTCPE port map (cnt/RefCnt(2),cnt/RefCnt_T(2),CLK_FSB,'0','0'); -
     cnt/RefCnt_T(2) <= (cnt/RefCnt(0) AND cnt/RefCnt(1)); -
-FTCPE_cnt/RefCnt3: FTCPE port map (cnt/RefCnt(3),cnt/RefCnt_T(3),CLK_FSB,'0','0'); -
     cnt/RefCnt_T(3) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2)); -
-FTCPE_cnt/RefCnt4: FTCPE port map (cnt/RefCnt(4),cnt/RefCnt_T(4),CLK_FSB,'0','0'); -
     cnt/RefCnt_T(4) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND -
      cnt/RefCnt(3)); -
-FTCPE_cnt/RefCnt5: FTCPE port map (cnt/RefCnt(5),cnt/RefCnt_T(5),CLK_FSB,'0','0'); -
     cnt/RefCnt_T(5) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND -
      cnt/RefCnt(3) AND cnt/RefCnt(4)); -
-FTCPE_cnt/RefCnt6: FTCPE port map (cnt/RefCnt(6),cnt/RefCnt_T(6),CLK_FSB,'0','0'); -
     cnt/RefCnt_T(6) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(1) AND -
      cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4)); -
-FTCPE_cnt/RefCnt7: FTCPE port map (cnt/RefCnt(7),cnt/RefCnt_T(7),CLK_FSB,'0','0'); -
     cnt/RefCnt_T(7) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND -
      cnt/RefCnt(1) AND cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4)); -
-FDCPE_cnt/RefDone: FDCPE port map (cnt/RefDone,cnt/RefDone_D,CLK_FSB,'0','0'); -
     cnt/RefDone_D <= ((NOT cnt/RefDone AND NOT RefAck) -
      OR (NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND -
      NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND -
      NOT cnt/RefCnt(7))); -
-FTCPE_cnt/TimeoutBPre: FTCPE port map (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,'0','0'); -
     cnt/TimeoutBPre_T <= ((cnt/TimeoutBPre AND nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT cnt/TimeoutBPre AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND -
      NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND -
      NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7)) -
      OR (NOT cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND -
      NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND -
      NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf)); -
-FTCPE_cs/nOverlay0: FTCPE port map (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,NOT nRES,'0'); -
     cs/nOverlay0_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND -
      NOT cs/nOverlay0 AND NOT nAS_FSB) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND -
      NOT cs/nOverlay0 AND fsb/ASrf)); -
-FDCPE_cs/nOverlay1: FDCPE port map (cs/nOverlay1,cs/nOverlay0,CLK_FSB,'0','0',cs/nOverlay1_CE); -
     cs/nOverlay1_CE <= (nAS_FSB AND NOT fsb/ASrf); -
-FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT CLK_FSB,'0','0'); -
-FDCPE_fsb/BERR0r: FDCPE port map (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,'0','0'); -
     fsb/BERR0r_D <= ((NOT TimeoutB AND NOT fsb/BERR0r) -
      OR (nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND -
      NOT fsb/BERR0r)); -
-FDCPE_fsb/BERR1r: FDCPE port map (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,'0','0'); -
     fsb/BERR1r_D <= ((NOT BERR_IOBS AND NOT fsb/BERR1r) -
      OR (nAS_FSB AND NOT fsb/ASrf)); -
-FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,'0','0'); -
     fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND -
      NOT fsb/Ready0r AND NOT ram/RAMReady) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady)); -
-FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0'); -
     fsb/Ready1r_D <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND -
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND -
      NOT fsb/Ready1r AND NOT iobs/IOReady) -
      OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND -
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND -
      NOT fsb/Ready1r AND NOT iobs/IOReady) -
      OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND -
      A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND -
      cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND -
      NOT nADoutLE1) -
      OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND -
      A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND -
      cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND -
      NOT nADoutLE1) -
      OR (nAS_FSB AND NOT fsb/ASrf) -
      OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND -
      NOT iobs/IOReady) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND -
      NOT iobs/IOReady AND NOT SW(1))); -
-FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0'); -
     fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf) -
      OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) -
      OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) -
      OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND -
      NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) -
      OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND -
      NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) -
      OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) -
      OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) -
      OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND -
      NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r) -
      OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND -
      NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)); -
-FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0'); -
     fsb/VPA_D <= ((EXP21_.EXP) -
      OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND -
      NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND -
      fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND -
      NOT iobs/IOReady AND NOT SW(1) AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND -
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND -
      NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND -
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND -
      NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708) -
      OR (nROMWE_OBUF.EXP) -
      OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND -
      A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND -
      cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND -
      NOT nADoutLE1 AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND -
      A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND -
      cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND -
      NOT nADoutLE1 AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND -
      fsb/VPA AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND -
      fsb/VPA AND NOT $OpTx$FX_DC$708) -
      OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND -
      NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND -
      fsb/VPA AND NOT $OpTx$FX_DC$708) -
      OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$708) -
      OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$708) -
      OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$708) -
      OR (fsb/VPA AND NOT nBR_IOB AND NOT $OpTx$FX_DC$708) -
      OR (fsb/VPA AND NOT $OpTx$FX_DC$708 AND -
      $OpTx$$OpTx$FX_DC$182_INV$783)); -
-FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0'); -
-FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0'); -
-FDCPE_iobm/BGr0: FDCPE port map (iobm/BGr0,NOT nBG_IOB,CLK2X_IOB,'0','0'); -
-FDCPE_iobm/BGr1: FDCPE port map (iobm/BGr1,iobm/BGr0,CLK2X_IOB,'0','0'); -
-FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0'); -
-FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0'); -
-FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),CLK2X_IOB,'0','0'); -
     iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2) -
      OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND -
      NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er) -
      OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND -
      NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2)); -
-FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),CLK2X_IOB,'0','0'); -
     iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1)) -
      OR (NOT iobm/ES(0) AND NOT iobm/ES(1)) -
      OR (NOT iobm/Er AND iobm/Er2)); -
-FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),CLK2X_IOB,'0','0'); -
     iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2)) -
      OR (NOT iobm/ES(1) AND NOT iobm/ES(2)) -
      OR (NOT iobm/Er AND iobm/Er2) -
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2)) -
      OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4))); -
-FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),CLK2X_IOB,'0','0'); -
     iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2) -
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er) -
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2)); -
-FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),CLK2X_IOB,'0','0'); -
     iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2) -
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND -
      iobm/ES(3) AND iobm/Er) -
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND -
      iobm/ES(3) AND NOT iobm/Er2) -
      OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND -
      NOT iobm/ES(3) AND iobm/ES(4))); -
-FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,'0','0'); -
     iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND -
      NOT iobm/ES(3) AND iobm/ES(4)); -
-FDCPE_iobm/Er: FDCPE port map (iobm/Er,E_IOB,NOT CLK_IOB,'0','0'); -
-FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0'); -
-FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0'); -
-FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,'0','0'); -
     iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1) -
      OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)); -
-FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,'0','0'); -
     iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND -
      NOT iobm/IOS_FSM_FFd2) -
      OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/IOS_FSM_FFd2 AND iobm/ETACK) -
      OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr) -
      OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr) -
      OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND -
      iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr)); -
-FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0'); -
     iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) -
      OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND -
      NOT iobm/IOS_FSM_FFd2) -
      OR (NOT CLK_IOB AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND -
      iobm/IOREQr AND NOT nAoutOE)); -
-FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0'); -
-FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES,CLK2X_IOB,'0','0'); -
-FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT CLK2X_IOB,'0','0'); -
-FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,CLK2X_IOB,'0','0'); -
-FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,CLK_FSB,'0','0'); -
     iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1); -
-FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,CLK_FSB,'0','0'); -
-FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Load1); -
-FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0'); -
     iobs/IORW1_T <= ((iobs/Once) -
      OR (NOT nADoutLE1) -
      OR (fsb/Ready1r.EXP) -
      OR (nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20)) -
      OR (fsb/Ready2r.EXP) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16)) -
      OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1)) -
      OR (nWE_FSB AND iobs/IORW1) -
      OR (NOT nWE_FSB AND NOT iobs/IORW1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1)); -
-FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0'); -
     iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf) -
      OR (iobs/Once AND iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND -
      NOT iobs/IOACTr AND IOBERR AND nADoutLE1) -
      OR (iobs/Once AND NOT iobs/IOReady AND NOT nAS_FSB AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) -
      OR (iobs/Once AND NOT iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND -
      NOT iobs/IOACTr AND NOT IOBERR AND fsb/ASrf AND nADoutLE1)); -
-FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,CLK_FSB,'0','0',iobs/Load1); -
-FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0'); -
     iobs/Load1_D <= ((iobs/Once) -
      OR (NOT nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18)) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB) -
      OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1)) -
      OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21)) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      cs/nOverlay1) -
      OR (nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)); -
-FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0'); -
     iobs/Once_D <= ((nBERR_FSB_OBUF.EXP) -
      OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1) -
      OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT iobs/Once AND -
      NOT cs/nOverlay1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND NOT iobs/Once) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once) -
      OR (nAS_FSB AND NOT fsb/ASrf) -
      OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2) -
      OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2) -
      OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1) -
      OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)); -
-FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0'); -
     iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2) -
      OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)); -
-FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0'); -
     iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) -
      OR (iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND -
      iobs/IOACTr) -
      OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND -
      NOT iobs/IOACTr) -
      OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND -
      nADoutLE1) -
      OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND -
      NOT fsb/ASrf AND nADoutLE1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND -
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)); -
-
-nADoutLE0 <= (NOT ALE0M AND NOT ALE0S); -
-FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0'); -
     nADoutLE1_D <= ((iobs/Load1) -
      OR (NOT iobs/Clear1 AND NOT nADoutLE1)); -
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT CLK2X_IOB,'0','0'); -
     nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2) -
      OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)); -
     nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z'; -
     nAS_IOB_OE <= NOT nAoutOE; -
-FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,CLK2X_IOB,'0','0'); -
     nAoutOE_D <= ((NOT iobm/BGr0 AND NOT iobm/BGr1) -
      OR (NOT iobm/BGr1 AND nAoutOE) -
      OR (NOT nAS_IOB AND NOT iobm/BGr0 AND NOT nAoutOE)); -
-
-nBERR_FSB <= ((nAS_FSB) -
      OR (NOT BERR_IOBS AND NOT TimeoutB AND NOT fsb/BERR0r AND NOT fsb/BERR1r) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND -
      NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r)); -
-FDCPE_nBR_IOB: FDCPE port map (nBR_IOB,'0',CLK_FSB,'0','0',nBR_IOB_CE); -
     nBR_IOB_CE <= (RESr0 AND RESr1 AND IPL2r0 AND RESr2 AND NOT RESDone AND -
      IPL2r1); -
-FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0'); -
-FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0'); -
     nDTACK_FSB_D <= ((EXP17_.EXP) -
      OR (nAS_FSB AND NOT fsb/ASrf) -
      OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND -
      nDTACK_FSB) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND -
      NOT iobs/IOReady AND nDTACK_FSB) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND -
      NOT iobs/IOReady AND NOT SW(1) AND nDTACK_FSB) -
      OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND -
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND -
      NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB) -
      OR (EXP20_.EXP) -
      OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND -
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND -
      NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB) -
      OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND -
      A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND -
      cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND -
      nDTACK_FSB AND NOT nADoutLE1) -
      OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND -
      A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND -
      cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND -
      nDTACK_FSB AND NOT nADoutLE1) -
      OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND -
      nDTACK_FSB) -
      OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND -
      A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND -
      A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND -
      A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND -
      nDTACK_FSB) -
      OR (BERR_IOBS AND nDTACK_FSB) -
      OR (fsb/BERR0r AND nDTACK_FSB) -
      OR (fsb/BERR1r AND nDTACK_FSB) -
      OR (nDTACK_FSB AND NOT nBR_IOB) -
      OR (nDTACK_FSB AND $OpTx$$OpTx$FX_DC$182_INV$783)); -
-FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0'); -
     nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2); -
-
-nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND -
      NOT nAS_FSB) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND nWE_FSB AND NOT nAS_FSB AND -
      NOT SW(1))); -
-FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0'); -
     nDoutOE_D <= ((NOT IORW0) -
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2)); -
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT CLK2X_IOB,'0','0'); -
     nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) -
      OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) -
      OR (NOT IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND -
      NOT iobm/IOS_FSM_FFd1)); -
     nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z'; -
     nLDS_IOB_OE <= NOT nAoutOE; -
-
-nOE <= NOT ((nWE_FSB AND NOT nAS_FSB)); -
-
-nRAMLWE <= NOT ((NOT nWE_FSB AND NOT nLDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND -
      NOT ram/RAMDIS1)); -
-
-nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND -
      NOT ram/RAMDIS1)); -
-
-nRAS <= NOT (((RefAck) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND -
      NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND -
      NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1))); -
-
-nROMCS <= NOT (((A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND -
      NOT SW(1)) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND -
      SW(1)) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND -
      NOT cs/nOverlay1))); -
-
-nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB)); -
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT CLK2X_IOB,'0','0'); -
     nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) -
      OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) -
      OR (NOT IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND -
      NOT iobm/IOS_FSM_FFd1)); -
     nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z'; -
     nUDS_IOB_OE <= NOT nAoutOE; -
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,'0','0'); -
     nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND -
      NOT iobm/ES(3) AND NOT iobm/ES(4)) -
      OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND -
      NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr)); -
     nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z'; -
     nVMA_IOB_OE <= NOT nAoutOE; -
-
-nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB)); -
-FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,CLK_FSB,'0','0'); -
     ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf); -
-FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0'); -
     ram/Once_T <= ((ram/Once AND nAS_FSB AND NOT fsb/ASrf) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND -
      NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND -
      NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3 AND fsb/ASrf)); -
-FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0'); -
     ram/RAMDIS1_D <= ((nOE_OBUF.EXP) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND -
      cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) -
      OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND -
      cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) -
      OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3 AND -
      cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) -
      OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd1 AND -
      cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND NOT fsb/ASrf) -
      OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1) -
      OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) -
      OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/BACTr AND fsb/ASrf)); -
-FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0'); -
     ram/RAMDIS2_T <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND -
      NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND -
      cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND -
      NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND -
      cnt/RefCnt(7) AND fsb/ASrf) -
      OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf) -
      OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND -
      ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND -
      cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)) -
      OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND -
      ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND -
      cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND -
      cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND -
      cnt/RefCnt(7)) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND -
      cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND -
      fsb/ASrf)); -
-FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0'); -
     ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3) -
      OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1) -
      OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/BACTr AND fsb/ASrf) -
      OR (ram/RS_FSM_FFd2.EXP) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd1 AND fsb/ASrf) -
      OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND -
      NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf) -
      OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND -
      NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)); -
-FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0'); -
     ram/RASEL_D <= ((A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND -
      NOT fsb/ASrf) -
      OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND -
      ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND -
      NOT fsb/ASrf) -
      OR (EXP26_.EXP) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) -
      OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf) -
      OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))); -
-FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0'); -
     ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND -
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND -
      NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3) -
      OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND -
      NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3 AND fsb/ASrf)); -
-FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0'); -
     ram/RS_FSM_FFd2_T <= ((EXP28_.EXP) -
      OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND -
      NOT cnt/RefCnt(5) AND ram/BACTr) -
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND -
      NOT cnt/RefCnt(5) AND NOT fsb/ASrf) -
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND -
      NOT cnt/RefCnt(6) AND NOT fsb/ASrf) -
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND -
      NOT cnt/RefCnt(7) AND NOT fsb/ASrf) -
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT nAS_FSB AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) -
      OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3) -
      OR (cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) -
      OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND -
      NOT cnt/RefCnt(6) AND ram/BACTr) -
      OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND ram/BACTr AND -
      NOT cnt/RefCnt(7))); -
-FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0'); -
     ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) -
      OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) -
      OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) -
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf) -
      OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND -
      ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND -
      cnt/RefCnt(7)) -
      OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND -
      ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND -
      fsb/ASrf) -
      OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3) -
      OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND -
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3) -
      OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(5)) -
      OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6)) -
      OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND -
      NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7))); -
-Register Legend: -
      FDCPE (Q,D,C,CLR,PRE,CE); -
      FTCPE (Q,D,C,CLR,PRE,CE); -
      LDCP (Q,D,G,CLR,PRE); -
-
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- diff --git a/cpld/XC95144XL/MXSE_html/fit/time.htm b/cpld/XC95144XL/MXSE_html/fit/time.htm deleted file mode 100644 index f8cf5e6..0000000 --- a/cpld/XC95144XL/MXSE_html/fit/time.htm +++ /dev/null @@ -1,4 +0,0 @@ - -
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- diff --git a/cpld/XC95144XL/MXSE_html/tim/timing_report.htm b/cpld/XC95144XL/MXSE_html/tim/timing_report.htm deleted file mode 100644 index 45f4a36..0000000 --- a/cpld/XC95144XL/MXSE_html/tim/timing_report.htm +++ /dev/null @@ -1,2993 +0,0 @@ - - - - - - - -Timing report for MXSE - - - -

Timing Report

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Need help reading this report?

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Design NameMXSE
Device, Speed (SpeedFile Version)XC95144XL, -10 (3.0)
Date Created Sun Mar 27 10:09:02 2022 -
Created By Timing Report Generator: version P.20131013
Copyright Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
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Summary

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Performance Summary
Min. Clock Period20.100 ns.
Max. Clock Frequency (fSYSTEM)49.751 MHz.
Limited by Cycle Time for CLK_FSB
Clock to Setup (tCYC)20.100 ns.
Pad to Pad Delay (tPD)11.000 ns.
Setup to Clock at the Pad (tSU)16.600 ns.
Clock Pad to Output Pad Delay (tCO)14.500 ns.
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Timing Constraints

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Constraint NameRequirement (ns)Delay (ns)PathsPaths Failing
TS_CLK_IOB142.80.000
TS_CLK_FSB40.020.12870
TS_CLK2X_IOB66.611.01050
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Constraint: TS_CLK_IOB

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Description: PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS
PathRequirement (ns)Delay (ns)Slack (ns)
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Constraint: TS_CLK_FSB

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Description: PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS
PathRequirement (ns)Delay (ns)Slack (ns)
cs/nOverlay1.Q to fsb/VPA.D40.00020.10019.900
cs/nOverlay1.Q to nDTACK_FSB.D40.00020.10019.900
fsb/Ready0r.Q to fsb/VPA.D40.00020.10019.900
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Constraint: TS_CLK2X_IOB

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Description: PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS
PathRequirement (ns)Delay (ns)Slack (ns)
IOBERR.Q to IOBERR.D66.60011.00055.600
iobm/BERRrf.Q to IOBERR.D33.30011.00022.300
iobm/BERRrr.Q to IOBERR.D66.60011.00055.600
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Number of constraints not met: 0
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Data Sheet Report

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Maximum External Clock Speeds

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ClockfEXT (MHz)Reason
CLK_IOB111.111Limited by Clock Pulse Width for CLK_IOB
CLK_FSB49.751Limited by Cycle Time for CLK_FSB
CLK2X_IOB90.909Limited by Cycle Time for CLK2X_IOB
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Setup/Hold Times for Clocks

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Setup/Hold Times for Clock CLK_IOB
Source PadSetup to clk (edge) Hold to clk (edge)
E_IOB6.5000.000

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Setup/Hold Times for Clock CLK_FSB
Source PadSetup to clk (edge) Hold to clk (edge)
A_FSB<10>7.9000.000
A_FSB<11>7.9000.000
A_FSB<12>7.9000.000
A_FSB<13>7.9000.000
A_FSB<14>7.9000.000
A_FSB<15>7.9000.000
A_FSB<16>7.9000.000
A_FSB<17>7.9000.000
A_FSB<18>7.9000.000
A_FSB<19>7.9000.000
A_FSB<20>15.6000.000
A_FSB<21>16.6000.000
A_FSB<22>16.6000.000
A_FSB<23>16.6000.000
A_FSB<8>7.9000.000
A_FSB<9>7.9000.000
SW<1>7.9000.000
nAS_FSB15.6000.000
nIPL26.5000.000
nLDS_FSB6.5000.000
nRES6.5000.000
nUDS_FSB6.5000.000
nWE_FSB7.9000.000

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Setup/Hold Times for Clock CLK2X_IOB
Source PadSetup to clk (edge) Hold to clk (edge)
CLK_IOB7.5000.000
nBERR_IOB7.5000.000
nBG_IOB6.5000.000
nDTACK_IOB6.5000.000
nRES6.5000.000
nVPA_IOB6.5000.000

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Clock to Pad Timing

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Clock CLK_FSB to Pad
Destination PadClock (edge) to Pad
RA<1>14.500
RA<2>14.500
RA<4>14.500
RA<5>14.500
RA<8>14.500
nBERR_FSB14.500
nRAMUWE14.500
nRAS14.500
nROMCS14.500
RA<0>13.500
RA<3>13.500
RA<6>13.500
RA<7>13.500
RA<9>13.500
nADoutLE013.500
nRAMLWE13.500
nVPA_FSB13.500
nADoutLE15.800
nBR_IOB5.800
nCAS5.800
nDTACK_FSB5.800

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Clock CLK2X_IOB to Pad
Destination PadClock (edge) to Pad
nAS_IOB14.500
nLDS_IOB14.500
nUDS_IOB14.500
nVMA_IOB14.500
nADoutLE013.500
nAoutOE5.800
nDinLE5.800
nDoutOE5.800

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- -

Clock to Setup Times for Clocks

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Clock to Setup for clock CLK_FSB
SourceDestinationDelay
cs/nOverlay1.Qfsb/VPA.D20.100
cs/nOverlay1.QnDTACK_FSB.D20.100
fsb/Ready0r.Qfsb/VPA.D20.100
fsb/Ready0r.QnDTACK_FSB.D20.100
ram/RAMReady.Qfsb/VPA.D20.100
ram/RAMReady.QnDTACK_FSB.D20.100
TimeoutB.Qfsb/VPA.D19.100
TimeoutB.QnDTACK_FSB.D19.100
fsb/ASrf.Qfsb/VPA.D19.100
BERR_IOBS.Qfsb/VPA.D11.400
BERR_IOBS.QnDTACK_FSB.D11.400
IORW0.QIORW0.D11.400
TimeoutA.Qfsb/VPA.D11.400
TimeoutA.QnDTACK_FSB.D11.400
cnt/RefCnt<5>.Qram/RAMDIS1.D11.400
cnt/RefCnt<5>.Qram/RAMReady.D11.400
cnt/RefCnt<5>.Qram/RASEL.D11.400
cnt/RefCnt<5>.Qram/RS_FSM_FFd2.D11.400
cnt/RefCnt<6>.Qram/RAMDIS1.D11.400
cnt/RefCnt<6>.Qram/RAMReady.D11.400
cnt/RefCnt<6>.Qram/RASEL.D11.400
cnt/RefCnt<6>.Qram/RS_FSM_FFd2.D11.400
cnt/RefCnt<7>.Qram/RAMDIS1.D11.400
cnt/RefCnt<7>.Qram/RAMReady.D11.400
cnt/RefCnt<7>.Qram/RASEL.D11.400
cnt/RefCnt<7>.Qram/RS_FSM_FFd2.D11.400
cnt/RefDone.Qram/RAMDIS1.D11.400
cnt/RefDone.Qram/RAMReady.D11.400
cnt/RefDone.Qram/RASEL.D11.400
cnt/RefDone.Qram/RS_FSM_FFd2.D11.400
cs/nOverlay1.Qiobs/IORW1.D11.400
cs/nOverlay1.Qiobs/Once.D11.400
cs/nOverlay1.Qram/RAMDIS1.D11.400
cs/nOverlay1.Qram/RASEL.D11.400
cs/nOverlay1.Qram/RS_FSM_FFd2.D11.400
fsb/ASrf.Qram/RASEL.D11.400
fsb/ASrf.Qram/RS_FSM_FFd2.D11.400
fsb/BERR0r.Qfsb/VPA.D11.400
fsb/BERR0r.QnDTACK_FSB.D11.400
fsb/BERR1r.Qfsb/VPA.D11.400
fsb/BERR1r.QnDTACK_FSB.D11.400
fsb/Ready1r.Qfsb/VPA.D11.400
fsb/Ready1r.QnDTACK_FSB.D11.400
fsb/Ready2r.Qfsb/VPA.D11.400
fsb/Ready2r.QnDTACK_FSB.D11.400
fsb/VPA.Qfsb/VPA.D11.400
iobs/IOReady.Qfsb/VPA.D11.400
iobs/IOReady.QnDTACK_FSB.D11.400
iobs/Once.QIORW0.D11.400
iobs/Once.Qiobs/Once.D11.400
iobs/PS_FSM_FFd1.QIORW0.D11.400
iobs/PS_FSM_FFd2.QIORW0.D11.400
nADoutLE1.QIORW0.D11.400
nBR_IOB.Qfsb/VPA.D11.400
nBR_IOB.QnDTACK_FSB.D11.400
nDTACK_FSB.QnDTACK_FSB.D11.400
ram/Once.Qram/RASEL.D11.400
ram/RS_FSM_FFd1.Qram/RAMDIS1.D11.400
ram/RS_FSM_FFd1.Qram/RASEL.D11.400
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd2.D11.400
ram/RS_FSM_FFd2.Qram/RASEL.D11.400
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd2.D11.400
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd2.D11.400
TimeoutA.Qfsb/Ready2r.D11.000
cnt/RefCnt<5>.Qram/RAMDIS2.D11.000
cnt/RefCnt<5>.Qram/RS_FSM_FFd3.D11.000
cnt/RefCnt<6>.Qram/RAMDIS2.D11.000
cnt/RefCnt<6>.Qram/RS_FSM_FFd3.D11.000
cnt/RefCnt<7>.Qram/RAMDIS2.D11.000
cnt/RefCnt<7>.Qram/RS_FSM_FFd3.D11.000
cnt/RefDone.Qram/RAMDIS2.D11.000
cnt/RefDone.Qram/RS_FSM_FFd3.D11.000
cs/nOverlay1.QIOREQ.D11.000
cs/nOverlay1.Qfsb/Ready1r.D11.000
cs/nOverlay1.Qfsb/Ready2r.D11.000
cs/nOverlay1.Qiobs/Load1.D11.000
cs/nOverlay1.Qiobs/PS_FSM_FFd2.D11.000
cs/nOverlay1.Qram/RAMDIS2.D11.000
cs/nOverlay1.Qram/RAMReady.D11.000
cs/nOverlay1.Qram/RS_FSM_FFd3.D11.000
fsb/ASrf.QIORW0.D11.000
fsb/ASrf.Qfsb/Ready2r.D11.000
fsb/ASrf.Qiobs/IORW1.D11.000
fsb/ASrf.QnDTACK_FSB.D11.000
fsb/ASrf.Qram/RAMDIS1.D11.000
fsb/ASrf.Qram/RAMDIS2.D11.000
fsb/ASrf.Qram/RAMReady.D11.000
fsb/ASrf.Qram/RS_FSM_FFd3.D11.000
fsb/Ready1r.Qfsb/Ready1r.D11.000
fsb/Ready2r.Qfsb/Ready2r.D11.000
iobs/IORW1.QIORW0.D11.000
iobs/IOReady.Qfsb/Ready1r.D11.000
iobs/PS_FSM_FFd1.Qiobs/IORW1.D11.000
iobs/PS_FSM_FFd1.Qiobs/Once.D11.000
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd2.D11.000
iobs/PS_FSM_FFd2.QIOREQ.D11.000
iobs/PS_FSM_FFd2.Qiobs/IORW1.D11.000
iobs/PS_FSM_FFd2.Qiobs/PS_FSM_FFd2.D11.000
nADoutLE1.QIOREQ.D11.000
nADoutLE1.Qfsb/Ready1r.D11.000
nADoutLE1.Qfsb/VPA.D11.000
nADoutLE1.Qiobs/Once.D11.000
nADoutLE1.Qiobs/PS_FSM_FFd2.D11.000
nADoutLE1.QnDTACK_FSB.D11.000
ram/BACTr.Qram/RAMDIS1.D11.000
ram/BACTr.Qram/RAMReady.D11.000
ram/BACTr.Qram/RASEL.D11.000
ram/BACTr.Qram/RS_FSM_FFd2.D11.000
ram/Once.Qram/RAMDIS1.D11.000
ram/Once.Qram/RAMDIS2.D11.000
ram/Once.Qram/RAMReady.D11.000
ram/RAMDIS2.Qram/RAMDIS2.D11.000
ram/RS_FSM_FFd1.Qram/RAMDIS2.D11.000
ram/RS_FSM_FFd1.Qram/RAMReady.D11.000
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd3.D11.000
ram/RS_FSM_FFd2.Qram/RAMDIS1.D11.000
ram/RS_FSM_FFd2.Qram/RAMDIS2.D11.000
ram/RS_FSM_FFd2.Qram/RAMReady.D11.000
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd3.D11.000
ram/RS_FSM_FFd3.Qram/RAMDIS1.D11.000
ram/RS_FSM_FFd3.Qram/RAMDIS2.D11.000
ram/RS_FSM_FFd3.Qram/RAMReady.D11.000
ram/RS_FSM_FFd3.Qram/RASEL.D11.000
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd3.D11.000
BERR_IOBS.QBERR_IOBS.D10.000
BERR_IOBS.Qfsb/BERR1r.D10.000
IPL2r0.QIPL2r1.D10.000
IPL2r0.QnBR_IOB.CE10.000
IPL2r1.QnBR_IOB.CE10.000
RESDone.QnBR_IOB.CE10.000
RESr0.QRESDone.CE10.000
RESr0.QRESr1.D10.000
RESr0.QnBR_IOB.CE10.000
RESr1.QRESDone.CE10.000
RESr1.QRESr2.D10.000
RESr1.QnBR_IOB.CE10.000
RESr2.QRESDone.CE10.000
RESr2.QnBR_IOB.CE10.000
RefAck.Qcnt/RefDone.D10.000
TimeoutA.QTimeoutA.D10.000
TimeoutB.QTimeoutB.D10.000
TimeoutB.Qfsb/BERR0r.D10.000
cnt/RefCnt<0>.QTimeoutA.D10.000
cnt/RefCnt<0>.QTimeoutB.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<1>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<2>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<3>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<0>.Qcnt/RefDone.D10.000
cnt/RefCnt<0>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<1>.QTimeoutA.D10.000
cnt/RefCnt<1>.QTimeoutB.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<2>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<3>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<1>.Qcnt/RefDone.D10.000
cnt/RefCnt<1>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<2>.QTimeoutA.D10.000
cnt/RefCnt<2>.QTimeoutB.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<3>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<2>.Qcnt/RefDone.D10.000
cnt/RefCnt<2>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<3>.QTimeoutA.D10.000
cnt/RefCnt<3>.QTimeoutB.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<3>.Qcnt/RefDone.D10.000
cnt/RefCnt<3>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<4>.QTimeoutA.D10.000
cnt/RefCnt<4>.QTimeoutB.D10.000
cnt/RefCnt<4>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<4>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<4>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<4>.Qcnt/RefDone.D10.000
cnt/RefCnt<4>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<5>.QTimeoutA.D10.000
cnt/RefCnt<5>.QTimeoutB.D10.000
cnt/RefCnt<5>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<5>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<5>.Qcnt/RefDone.D10.000
cnt/RefCnt<5>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<6>.QTimeoutA.D10.000
cnt/RefCnt<6>.QTimeoutB.D10.000
cnt/RefCnt<6>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<6>.Qcnt/RefDone.D10.000
cnt/RefCnt<6>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<7>.QTimeoutB.D10.000
cnt/RefCnt<7>.Qcnt/RefDone.D10.000
cnt/RefCnt<7>.Qcnt/TimeoutBPre.D10.000
cnt/RefDone.Qcnt/RefDone.D10.000
cnt/TimeoutBPre.QTimeoutB.D10.000
cnt/TimeoutBPre.Qcnt/TimeoutBPre.D10.000
cs/nOverlay0.Qcs/nOverlay0.D10.000
cs/nOverlay0.Qcs/nOverlay1.D10.000
cs/nOverlay1.QIORW0.D10.000
cs/nOverlay1.Qfsb/Ready0r.D10.000
cs/nOverlay1.Qram/Once.D10.000
cs/nOverlay1.Qram/RS_FSM_FFd1.D10.000
fsb/ASrf.QBERR_IOBS.D10.000
fsb/ASrf.QIOREQ.D10.000
fsb/ASrf.QTimeoutA.D10.000
fsb/ASrf.QTimeoutB.D10.000
fsb/ASrf.Qcnt/TimeoutBPre.D10.000
fsb/ASrf.Qcs/nOverlay0.D10.000
fsb/ASrf.Qcs/nOverlay1.CE10.000
fsb/ASrf.Qfsb/BERR0r.D10.000
fsb/ASrf.Qfsb/BERR1r.D10.000
fsb/ASrf.Qfsb/Ready0r.D10.000
fsb/ASrf.Qfsb/Ready1r.D10.000
fsb/ASrf.Qiobs/IOReady.D10.000
fsb/ASrf.Qiobs/Load1.D10.000
fsb/ASrf.Qiobs/Once.D10.000
fsb/ASrf.Qiobs/PS_FSM_FFd2.D10.000
fsb/ASrf.Qram/BACTr.D10.000
fsb/ASrf.Qram/Once.D10.000
fsb/ASrf.Qram/RS_FSM_FFd1.D10.000
fsb/BERR0r.Qfsb/BERR0r.D10.000
fsb/BERR1r.Qfsb/BERR1r.D10.000
fsb/Ready0r.Qfsb/Ready0r.D10.000
iobs/Clear1.QnADoutLE1.D10.000
iobs/IOACTr.QBERR_IOBS.D10.000
iobs/IOACTr.QIOREQ.D10.000
iobs/IOACTr.Qiobs/IOReady.D10.000
iobs/IOACTr.Qiobs/PS_FSM_FFd1.D10.000
iobs/IOACTr.Qiobs/PS_FSM_FFd2.D10.000
iobs/IOL1.QIOL0.D10.000
iobs/IORW1.Qiobs/IORW1.D10.000
iobs/IOReady.Qiobs/IOReady.D10.000
iobs/IOU1.QIOU0.D10.000
iobs/Load1.Qiobs/IOL1.CE10.000
iobs/Load1.Qiobs/IOU1.CE10.000
iobs/Load1.QnADoutLE1.D10.000
iobs/Once.QBERR_IOBS.D10.000
iobs/Once.QIOREQ.D10.000
iobs/Once.Qiobs/IORW1.D10.000
iobs/Once.Qiobs/IOReady.D10.000
iobs/Once.Qiobs/Load1.D10.000
iobs/Once.Qiobs/PS_FSM_FFd2.D10.000
iobs/PS_FSM_FFd1.QALE0S.D10.000
iobs/PS_FSM_FFd1.QIOL0.CE10.000
iobs/PS_FSM_FFd1.QIOREQ.D10.000
iobs/PS_FSM_FFd1.QIOU0.CE10.000
iobs/PS_FSM_FFd1.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd1.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd1.D10.000
iobs/PS_FSM_FFd2.QALE0S.D10.000
iobs/PS_FSM_FFd2.QBERR_IOBS.D10.000
iobs/PS_FSM_FFd2.QIOL0.CE10.000
iobs/PS_FSM_FFd2.QIOU0.CE10.000
iobs/PS_FSM_FFd2.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd2.Qiobs/IOReady.D10.000
iobs/PS_FSM_FFd2.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd2.Qiobs/Once.D10.000
iobs/PS_FSM_FFd2.Qiobs/PS_FSM_FFd1.D10.000
nADoutLE1.QBERR_IOBS.D10.000
nADoutLE1.QIOL0.D10.000
nADoutLE1.QIOU0.D10.000
nADoutLE1.Qiobs/Clear1.D10.000
nADoutLE1.Qiobs/IORW1.D10.000
nADoutLE1.Qiobs/IOReady.D10.000
nADoutLE1.Qiobs/Load1.D10.000
nADoutLE1.QnADoutLE1.D10.000
ram/Once.Qram/Once.D10.000
ram/Once.Qram/RS_FSM_FFd1.D10.000
ram/Once.Qram/RS_FSM_FFd3.D10.000
ram/RAMReady.Qfsb/Ready0r.D10.000
ram/RASEL.QnCAS.D10.000
ram/RS_FSM_FFd1.QRefAck.D10.000
ram/RS_FSM_FFd1.Qram/Once.D10.000
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd1.D10.000
ram/RS_FSM_FFd2.QRefAck.D10.000
ram/RS_FSM_FFd2.Qram/Once.D10.000
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd1.D10.000
ram/RS_FSM_FFd3.Qram/Once.D10.000
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd1.D10.000

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Clock to Setup for clock CLK2X_IOB
SourceDestinationDelay
IOBERR.QIOBERR.D11.000
iobm/BERRrf.QIOBERR.D11.000
iobm/BERRrr.QIOBERR.D11.000
iobm/DTACKrf.QIOACT.D11.000
iobm/DTACKrf.QIOBERR.D11.000
iobm/DTACKrr.QIOACT.D11.000
iobm/DTACKrr.QIOBERR.D11.000
iobm/IOS_FSM_FFd1.QIOACT.D11.000
iobm/IOS_FSM_FFd1.QIOBERR.D11.000
iobm/IOS_FSM_FFd2.QIOBERR.D11.000
iobm/IOS_FSM_FFd3.QIOACT.D11.000
iobm/IOS_FSM_FFd3.QIOBERR.D11.000
iobm/RESrf.QIOACT.D11.000
iobm/RESrf.QIOBERR.D11.000
iobm/RESrr.QIOACT.D11.000
iobm/RESrr.QIOBERR.D11.000
IOACT.QnVMA_IOB.D10.000
iobm/BERRrf.QIOACT.D10.000
iobm/BERRrf.Qiobm/IOS_FSM_FFd2.D10.000
iobm/BERRrr.QIOACT.D10.000
iobm/BERRrr.Qiobm/IOS_FSM_FFd2.D10.000
iobm/BGr0.Qiobm/BGr1.D10.000
iobm/BGr0.QnAoutOE.D10.000
iobm/BGr1.QnAoutOE.D10.000
iobm/DTACKrf.Qiobm/IOS_FSM_FFd2.D10.000
iobm/DTACKrr.Qiobm/IOS_FSM_FFd2.D10.000
iobm/ES<0>.Qiobm/ES<0>.D10.000
iobm/ES<0>.Qiobm/ES<1>.D10.000
iobm/ES<0>.Qiobm/ES<2>.D10.000
iobm/ES<0>.Qiobm/ES<3>.D10.000
iobm/ES<0>.Qiobm/ES<4>.D10.000
iobm/ES<0>.Qiobm/ETACK.D10.000
iobm/ES<0>.QnVMA_IOB.D10.000
iobm/ES<1>.Qiobm/ES<0>.D10.000
iobm/ES<1>.Qiobm/ES<1>.D10.000
iobm/ES<1>.Qiobm/ES<2>.D10.000
iobm/ES<1>.Qiobm/ES<3>.D10.000
iobm/ES<1>.Qiobm/ES<4>.D10.000
iobm/ES<1>.Qiobm/ETACK.D10.000
iobm/ES<1>.QnVMA_IOB.D10.000
iobm/ES<2>.Qiobm/ES<0>.D10.000
iobm/ES<2>.Qiobm/ES<2>.D10.000
iobm/ES<2>.Qiobm/ES<3>.D10.000
iobm/ES<2>.Qiobm/ES<4>.D10.000
iobm/ES<2>.Qiobm/ETACK.D10.000
iobm/ES<2>.QnVMA_IOB.D10.000
iobm/ES<3>.Qiobm/ES<0>.D10.000
iobm/ES<3>.Qiobm/ES<2>.D10.000
iobm/ES<3>.Qiobm/ES<3>.D10.000
iobm/ES<3>.Qiobm/ES<4>.D10.000
iobm/ES<3>.Qiobm/ETACK.D10.000
iobm/ES<3>.QnVMA_IOB.D10.000
iobm/ES<4>.Qiobm/ES<0>.D10.000
iobm/ES<4>.Qiobm/ES<2>.D10.000
iobm/ES<4>.Qiobm/ES<4>.D10.000
iobm/ES<4>.Qiobm/ETACK.D10.000
iobm/ES<4>.QnVMA_IOB.D10.000
iobm/ETACK.QIOACT.D10.000
iobm/ETACK.QIOBERR.D10.000
iobm/ETACK.Qiobm/IOS_FSM_FFd2.D10.000
iobm/Er2.Qiobm/ES<0>.D10.000
iobm/Er2.Qiobm/ES<1>.D10.000
iobm/Er2.Qiobm/ES<2>.D10.000
iobm/Er2.Qiobm/ES<3>.D10.000
iobm/Er2.Qiobm/ES<4>.D10.000
iobm/IOREQr.QALE0M.D10.000
iobm/IOREQr.QIOACT.D10.000
iobm/IOREQr.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd1.QALE0M.D10.000
iobm/IOS_FSM_FFd1.Qiobm/IOS_FSM_FFd1.D10.000
iobm/IOS_FSM_FFd1.Qiobm/IOS_FSM_FFd2.D10.000
iobm/IOS_FSM_FFd1.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd1.QnAS_IOB.D10.000
iobm/IOS_FSM_FFd1.QnDinLE.D10.000
iobm/IOS_FSM_FFd1.QnLDS_IOB.D10.000
iobm/IOS_FSM_FFd1.QnUDS_IOB.D10.000
iobm/IOS_FSM_FFd2.QALE0M.D10.000
iobm/IOS_FSM_FFd2.QIOACT.D10.000
iobm/IOS_FSM_FFd2.Qiobm/IOS_FSM_FFd1.D10.000
iobm/IOS_FSM_FFd2.Qiobm/IOS_FSM_FFd2.D10.000
iobm/IOS_FSM_FFd2.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd2.QnAS_IOB.D10.000
iobm/IOS_FSM_FFd2.QnDinLE.D10.000
iobm/IOS_FSM_FFd2.QnDoutOE.D10.000
iobm/IOS_FSM_FFd2.QnLDS_IOB.D10.000
iobm/IOS_FSM_FFd2.QnUDS_IOB.D10.000
iobm/IOS_FSM_FFd3.QALE0M.D10.000
iobm/IOS_FSM_FFd3.Qiobm/IOS_FSM_FFd1.D10.000
iobm/IOS_FSM_FFd3.Qiobm/IOS_FSM_FFd2.D10.000
iobm/IOS_FSM_FFd3.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd3.QnAS_IOB.D10.000
iobm/IOS_FSM_FFd3.QnDoutOE.D10.000
iobm/IOS_FSM_FFd3.QnLDS_IOB.D10.000
iobm/IOS_FSM_FFd3.QnUDS_IOB.D10.000
iobm/RESrf.Qiobm/IOS_FSM_FFd2.D10.000
iobm/RESrr.Qiobm/IOS_FSM_FFd2.D10.000
iobm/VPArf.QnVMA_IOB.D10.000
iobm/VPArr.QnVMA_IOB.D10.000
nAS_IOB.QnAoutOE.D10.000
nAoutOE.QALE0M.D10.000
nAoutOE.QIOACT.D10.000
nAoutOE.Qiobm/IOS_FSM_FFd3.D10.000
nAoutOE.QnAoutOE.D10.000
nVMA_IOB.Qiobm/ETACK.D10.000
nVMA_IOB.QnVMA_IOB.D10.000

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Pad to Pad List

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Source PadDestination PadDelay
A_FSB<11>RA<1>11.000
A_FSB<12>RA<2>11.000
A_FSB<14>RA<4>11.000
A_FSB<15>RA<5>11.000
A_FSB<20>nBERR_FSB11.000
A_FSB<20>nROMCS11.000
A_FSB<21>RA<8>11.000
A_FSB<21>nBERR_FSB11.000
A_FSB<21>nRAS11.000
A_FSB<21>nROMCS11.000
A_FSB<22>RA<8>11.000
A_FSB<22>nBERR_FSB11.000
A_FSB<22>nRAS11.000
A_FSB<22>nROMCS11.000
A_FSB<23>RA<8>11.000
A_FSB<23>nBERR_FSB11.000
A_FSB<23>nRAS11.000
A_FSB<23>nROMCS11.000
A_FSB<2>RA<1>11.000
A_FSB<3>RA<2>11.000
A_FSB<5>RA<4>11.000
A_FSB<6>RA<5>11.000
A_FSB<9>RA<8>11.000
SW<1>nROMCS11.000
nAS_FSBnRAMUWE11.000
nAS_FSBnRAS11.000
nUDS_FSBnRAMUWE11.000
nWE_FSBnRAMUWE11.000
A_FSB<10>RA<0>10.000
A_FSB<13>RA<3>10.000
A_FSB<16>RA<6>10.000
A_FSB<17>RA<7>10.000
A_FSB<18>RA<8>10.000
A_FSB<19>RA<11>10.000
A_FSB<19>RA<9>10.000
A_FSB<1>RA<0>10.000
A_FSB<20>RA<9>10.000
A_FSB<20>nDinOE10.000
A_FSB<21>RA<10>10.000
A_FSB<21>nDinOE10.000
A_FSB<22>nDinOE10.000
A_FSB<23>nDinOE10.000
A_FSB<4>RA<3>10.000
A_FSB<7>RA<6>10.000
A_FSB<8>RA<7>10.000
SW<0>CLK20EN10.000
SW<0>CLK25EN10.000
SW<1>nDinOE10.000
nAS_FSBnBERR_FSB10.000
nAS_FSBnDinOE10.000
nAS_FSBnOE10.000
nAS_FSBnRAMLWE10.000
nAS_FSBnROMWE10.000
nAS_FSBnVPA_FSB10.000
nLDS_FSBnRAMLWE10.000
nWE_FSBnDinOE10.000
nWE_FSBnOE10.000
nWE_FSBnRAMLWE10.000
nWE_FSBnROMWE10.000
-
-
-
Number of paths analyzed: -392 -
Number of Timing errors: -0 -
Analysis Completed: Sun Mar 27 10:09:05 2022 - -
- diff --git a/cpld/XC95144XL/MXSE_summary.html b/cpld/XC95144XL/MXSE_summary.html deleted file mode 100644 index 49c2e8a..0000000 --- a/cpld/XC95144XL/MXSE_summary.html +++ /dev/null @@ -1,102 +0,0 @@ -Xilinx Design Summary - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
MXSE Project Status (03/27/2022 - 10:12:15)
Project File:WarpSE.xiseParser Errors: No Errors
Module Name:MXSEImplementation State:Fitted
Target Device:xc95144xl-10TQ100
  • Errors:
 -No Errors
Product Version:ISE 14.7
  • Warnings:
5 Warnings (0 new)
Design Goal:Balanced
  • Routing Results:
 - 
Design Strategy:Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: - -System Settings -
  • Final Timing Score:
  
- - - - 
- - -
Current Errors [-]
No Errors Found
- - - - 
- - - - - - - -
Current Warnings [-]
Synthesis WarningsNew
WARNING:Xst:647: - Input <SW<2>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. 
WARNING:Xst:1426: - The value init of the FF/Latch 0 hinder the constant cleaning in the block RESDone. You should achieve better results by setting this init to 1. 
WARNING:Xst:1426: - The value init of the FF/Latch 0 hinder the constant cleaning in the block Disable. You should achieve better results by setting this init to 1. 
WARNING:Xst:1426: - The value init of the FF/Latch RESDone hinder the constant cleaning in the block MXSE. You should achieve better results by setting this init to 1. 
WARNING:Xst:1426: - The value init of the FF/Latch Disable hinder the constant cleaning in the block MXSE. You should achieve better results by setting this init to 1. 
- - - - - - - - - - - - - - 
- - - - - - - -
Detailed Reports [-]
Report NameStatusGeneratedErrorsWarningsInfos
Synthesis ReportCurrentSun Mar 27 10:07:11 202205 Warnings (0 new)0
Translation ReportCurrentSun Mar 27 10:07:43 2022000
CPLD Fitter Report (Text)CurrentSun Mar 27 10:08:18 202202 Warnings (1 new)3 Infos (3 new)
Power Report     
- 
- - - -
Secondary Reports [-]
Report NameStatusGenerated
Post-Fit Simulation Model Report  
- - -
Date Generated: 03/27/2022 - 10:12:16
- \ No newline at end of file diff --git a/cpld/XC95144XL/MXSE.bld b/cpld/XC95144XL/WarpSE.bld similarity index 59% rename from cpld/XC95144XL/MXSE.bld rename to cpld/XC95144XL/WarpSE.bld index c60fa0b..d9b29ae 100644 --- a/cpld/XC95144XL/MXSE.bld +++ b/cpld/XC95144XL/WarpSE.bld @@ -2,15 +2,15 @@ Release 14.7 ngdbuild P.20131013 (nt) Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. Command Line: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt\unwrapped\ngdbuild.exe -intstyle -ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p -xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd +ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 +WarpSE.ngc WarpSE.ngd -Reading NGO file "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.ngc" ... +Reading NGO file "Z:/Warp-SE/cpld/XC95144XL/WarpSE.ngc" ... Gathering constraint information from source properties... Done. Annotating constraints to design from ucf file -"//192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf" ... +"Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf" ... Resolving constraint associations... Checking Constraint Associations... Done... @@ -28,10 +28,10 @@ NGDBUILD Design Results Summary: Number of errors: 0 Number of warnings: 0 -Total memory usage is 118196 kilobytes +Total memory usage is 117172 kilobytes -Writing NGD file "MXSE.ngd" ... -Total REAL time to NGDBUILD completion: 18 sec -Total CPU time to NGDBUILD completion: 17 sec +Writing NGD file "WarpSE.ngd" ... +Total REAL time to NGDBUILD completion: 17 sec +Total CPU time to NGDBUILD completion: 16 sec -Writing NGDBUILD log file "MXSE.bld"... +Writing NGDBUILD log file "WarpSE.bld"... diff --git a/cpld/XC95144XL/WarpSE.cmd_log b/cpld/XC95144XL/WarpSE.cmd_log new file mode 100644 index 0000000..55c92dc --- /dev/null +++ b/cpld/XC95144XL/WarpSE.cmd_log @@ -0,0 +1,24 @@ +xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" +ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd +tsim -intstyle ise WarpSE WarpSE.nga +taengine -intstyle ise -f WarpSE -l WarpSE.tim -e {Z:\Warp-SE\cpld\XC95144XL\taengine.err} +xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" +ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd +tsim -intstyle ise WarpSE WarpSE.nga +taengine -intstyle ise -f WarpSE -l WarpSE.tim -e {Z:\Warp-SE\cpld\XC95144XL\taengine.err} +xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" +xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" +ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +XSLTProcess WarpSE_build.xml +tsim -intstyle ise WarpSE WarpSE.nga +taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm +-cwd "Z:/Warp-SE/cpld/XC95144XL" timingan_cpld -intstyle ise "Z:/Warp-SE/cpld/XC95144XL/WarpSE.vm6" +xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" +ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +XSLTProcess WarpSE_build.xml +tsim -intstyle ise WarpSE WarpSE.nga +taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm diff --git a/cpld/XC95144XL/WarpSE.data b/cpld/XC95144XL/WarpSE.data new file mode 100644 index 0000000..71df4b5 --- /dev/null +++ b/cpld/XC95144XL/WarpSE.data @@ -0,0 +1,1387 @@ +MODELDATA +MODELDATA_VERSION "v1998.8" +DESIGN "WarpSE"; + +/* port drive, load, max capacitance and max transition in data file */ +PORTDATA +A_FSB<9>: MAXTRANS(0.0); +A_FSB<8>: MAXTRANS(0.0); +A_FSB<15>: MAXTRANS(0.0); +A_FSB<14>: MAXTRANS(0.0); +A_FSB<13>: MAXTRANS(0.0); +A_FSB<12>: MAXTRANS(0.0); +A_FSB<11>: MAXTRANS(0.0); +A_FSB<10>: MAXTRANS(0.0); +A_FSB<23>: MAXTRANS(0.0); +A_FSB<22>: MAXTRANS(0.0); +A_FSB<21>: MAXTRANS(0.0); +A_FSB<20>: MAXTRANS(0.0); +A_FSB<19>: MAXTRANS(0.0); +A_FSB<18>: MAXTRANS(0.0); +A_FSB<17>: MAXTRANS(0.0); +A_FSB<16>: MAXTRANS(0.0); +CLK2X_IOB: MAXTRANS(0.0); +CLK_FSB: MAXTRANS(0.0); +nAS_FSB: MAXTRANS(0.0); +nWE_FSB: MAXTRANS(0.0); +SW<1>: MAXTRANS(0.0); +nRES: MAXTRANS(0.0); +nLDS_FSB: MAXTRANS(0.0); +nUDS_FSB: MAXTRANS(0.0); +CLK_IOB: MAXTRANS(0.0); +nBERR_IOB: MAXTRANS(0.0); +E_IOB: MAXTRANS(0.0); +nIPL2: MAXTRANS(0.0); +nBG_IOB: MAXTRANS(0.0); +nDTACK_IOB: MAXTRANS(0.0); +nVPA_IOB: MAXTRANS(0.0); +A_FSB<1>: MAXTRANS(0.0); +A_FSB<2>: MAXTRANS(0.0); +A_FSB<3>: MAXTRANS(0.0); +A_FSB<4>: MAXTRANS(0.0); +A_FSB<5>: MAXTRANS(0.0); +A_FSB<6>: MAXTRANS(0.0); +A_FSB<7>: MAXTRANS(0.0); +SW<0>: MAXTRANS(0.0); +nVMA_IOB: MAXTRANS(0.0); +nAS_IOB: MAXTRANS(0.0); +nLDS_IOB: MAXTRANS(0.0); +nUDS_IOB: MAXTRANS(0.0); +nDTACK_FSB: MAXTRANS(0.0); +RA<0>: MAXTRANS(0.0); +RA<1>: MAXTRANS(0.0); +RA<2>: MAXTRANS(0.0); +RA<3>: MAXTRANS(0.0); +RA<4>: MAXTRANS(0.0); +RA<5>: MAXTRANS(0.0); +RA<6>: MAXTRANS(0.0); +RA<7>: MAXTRANS(0.0); +RA<8>: MAXTRANS(0.0); +RA<9>: MAXTRANS(0.0); +nBERR_FSB: MAXTRANS(0.0); +nOE: MAXTRANS(0.0); +nROMWE: MAXTRANS(0.0); +nVPA_FSB: MAXTRANS(0.0); +nADoutLE0: MAXTRANS(0.0); +nCAS: MAXTRANS(0.0); +nDinLE: MAXTRANS(0.0); +nDinOE: MAXTRANS(0.0); +nDoutOE: MAXTRANS(0.0); +nRAS: MAXTRANS(0.0); +RA<11>: MAXTRANS(0.0); +RA<10>: MAXTRANS(0.0); +CLK20EN: MAXTRANS(0.0); +CLK25EN: MAXTRANS(0.0); +nBR_IOB: MAXTRANS(0.0); +nADoutLE1: MAXTRANS(0.0); +nAoutOE: MAXTRANS(0.0); +nRAMLWE: MAXTRANS(0.0); +nRAMUWE: MAXTRANS(0.0); +nROMCS: MAXTRANS(0.0); +ENDPORTDATA + +/* timing arc data */ +TIMINGDATA + +ARCDATA +SW<0>_CLK20EN_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +SW<0>_CLK25EN_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<1>_RA<0>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<10>_RA<0>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_RA<10>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<19>_RA<11>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<11>_RA<1>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<2>_RA<1>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<3>_RA<2>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<12>_RA<2>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<4>_RA<3>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<13>_RA<3>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<5>_RA<4>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<14>_RA<4>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<6>_RA<5>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<15>_RA<5>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<7>_RA<6>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<16>_RA<6>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<17>_RA<7>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<8>_RA<7>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_RA<8>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<9>_RA<8>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<23>_RA<8>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<22>_RA<8>_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<18>_RA<8>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<20>_RA<9>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<19>_RA<9>_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nBERR_FSB_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<20>_nBERR_FSB_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<22>_nBERR_FSB_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<23>_nBERR_FSB_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_nBERR_FSB_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<20>_nDinOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<23>_nDinOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<22>_nDinOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_nDinOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nDinOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nWE_FSB_nDinOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +SW<1>_nDinOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nWE_FSB_nOE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nLDS_FSB_nRAMLWE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nWE_FSB_nRAMLWE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nRAMLWE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nWE_FSB_nRAMUWE_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +nUDS_FSB_nRAMUWE_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nRAMUWE_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<23>_nRAS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nRAS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_nRAS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<22>_nRAS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<22>_nROMCS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<23>_nROMCS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +SW<1>_nROMCS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<20>_nROMCS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_nROMCS_delay: +CELL_RISE(scalar) { + VALUES("11"); +} +CELL_FALL(scalar) { + VALUES("11"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nROMWE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nWE_FSB_nROMWE_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_nVPA_FSB_delay: +CELL_RISE(scalar) { + VALUES("10"); +} +CELL_FALL(scalar) { + VALUES("10"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nDTACK_FSB_delay: +CELL_RISE(scalar) { + VALUES("5.8"); +} +CELL_FALL(scalar) { + VALUES("5.8"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<0>_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<1>_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<2>_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<3>_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<4>_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<5>_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<6>_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<7>_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<8>_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_RA<9>_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nBERR_FSB_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nVPA_FSB_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nADoutLE0_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nCAS_delay: +CELL_RISE(scalar) { + VALUES("5.8"); +} +CELL_FALL(scalar) { + VALUES("5.8"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nRAS_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nBR_IOB_delay: +CELL_RISE(scalar) { + VALUES("5.8"); +} +CELL_FALL(scalar) { + VALUES("5.8"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nADoutLE1_delay: +CELL_RISE(scalar) { + VALUES("5.8"); +} +CELL_FALL(scalar) { + VALUES("5.8"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nRAMLWE_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nRAMUWE_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK_FSB_nROMCS_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nVMA_IOB_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nAS_IOB_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nLDS_IOB_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nUDS_IOB_delay: +CELL_RISE(scalar) { + VALUES("14.5"); +} +CELL_FALL(scalar) { + VALUES("14.5"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nADoutLE0_delay: +CELL_RISE(scalar) { + VALUES("13.5"); +} +CELL_FALL(scalar) { + VALUES("13.5"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nDinLE_delay: +CELL_RISE(scalar) { + VALUES("5.8"); +} +CELL_FALL(scalar) { + VALUES("5.8"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nDoutOE_delay: +CELL_RISE(scalar) { + VALUES("5.8"); +} +CELL_FALL(scalar) { + VALUES("5.8"); +} +ENDARCDATA + +ARCDATA +CLK2X_IOB_nAoutOE_delay: +CELL_RISE(scalar) { + VALUES("5.8"); +} +CELL_FALL(scalar) { + VALUES("5.8"); +} +ENDARCDATA + +ARCDATA +E_IOB_CLK_IOB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +E_IOB_CLK_IOB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +A_FSB<10>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<11>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<12>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<13>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<14>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<15>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<16>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<17>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<18>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<19>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<20>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("18.6"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("19.6"); +} +ENDARCDATA + +ARCDATA +A_FSB<22>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("19.6"); +} +ENDARCDATA + +ARCDATA +A_FSB<23>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("19.6"); +} +ENDARCDATA + +ARCDATA +A_FSB<8>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<9>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +SW<1>_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("18.6"); +} +ENDARCDATA + +ARCDATA +nIPL2_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +nLDS_FSB_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +nRES_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +nUDS_FSB_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +nWE_FSB_CLK_FSB_setup: +CONSTRAINT(scalar) { + VALUES("10.9"); +} +ENDARCDATA + +ARCDATA +A_FSB<10>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<11>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<12>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<13>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<14>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<15>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<16>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<17>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<18>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<19>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<20>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-12.1"); +} +ENDARCDATA + +ARCDATA +A_FSB<21>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-13.1"); +} +ENDARCDATA + +ARCDATA +A_FSB<22>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-13.1"); +} +ENDARCDATA + +ARCDATA +A_FSB<23>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-13.1"); +} +ENDARCDATA + +ARCDATA +A_FSB<8>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +A_FSB<9>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +SW<1>_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +nAS_FSB_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-12.1"); +} +ENDARCDATA + +ARCDATA +nIPL2_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +nLDS_FSB_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +nRES_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +nUDS_FSB_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +nWE_FSB_CLK_FSB_hold: +CONSTRAINT(scalar) { + VALUES("-4.4"); +} +ENDARCDATA + +ARCDATA +CLK_IOB_CLK2X_IOB_setup: +CONSTRAINT(scalar) { + VALUES("10.5"); +} +ENDARCDATA + +ARCDATA +nBERR_IOB_CLK2X_IOB_setup: +CONSTRAINT(scalar) { + VALUES("10.5"); +} +ENDARCDATA + +ARCDATA +nBG_IOB_CLK2X_IOB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +nDTACK_IOB_CLK2X_IOB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +nRES_CLK2X_IOB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +nVPA_IOB_CLK2X_IOB_setup: +CONSTRAINT(scalar) { + VALUES("9.5"); +} +ENDARCDATA + +ARCDATA +CLK_IOB_CLK2X_IOB_hold: +CONSTRAINT(scalar) { + VALUES("-4"); +} +ENDARCDATA + +ARCDATA +nBERR_IOB_CLK2X_IOB_hold: +CONSTRAINT(scalar) { + VALUES("-4"); +} +ENDARCDATA + +ARCDATA +nBG_IOB_CLK2X_IOB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +nDTACK_IOB_CLK2X_IOB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +nRES_CLK2X_IOB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ARCDATA +nVPA_IOB_CLK2X_IOB_hold: +CONSTRAINT(scalar) { + VALUES("-3"); +} +ENDARCDATA + +ENDTIMINGDATA +ENDMODELDATA diff --git a/cpld/XC95144XL/WarpSE.gise b/cpld/XC95144XL/WarpSE.gise index 132ad68..99188c7 100644 --- a/cpld/XC95144XL/WarpSE.gise +++ b/cpld/XC95144XL/WarpSE.gise @@ -22,37 +22,45 @@ - + - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -62,95 +70,69 @@ - + - + - + - - - - - - - - - - + + + + + + + + + - + - + - - - + + + - + - - - - - - - - - - - - - + + + + + + + + + + + + + - + - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/cpld/XC95144XL/WarpSE.gyd b/cpld/XC95144XL/WarpSE.gyd new file mode 100644 index 0000000..1aad900 --- /dev/null +++ b/cpld/XC95144XL/WarpSE.gyd @@ -0,0 +1,122 @@ +Pin Freeze File: version P.20131013 + +95144XL100 XC95144XL-10-TQ100 +A_FSB<10> S:PIN8 +A_FSB<11> S:PIN9 +A_FSB<12> S:PIN10 +A_FSB<13> S:PIN11 +A_FSB<14> S:PIN12 +A_FSB<15> S:PIN13 +A_FSB<16> S:PIN14 +A_FSB<17> S:PIN15 +A_FSB<18> S:PIN16 +A_FSB<19> S:PIN17 +A_FSB<1> S:PIN94 +A_FSB<20> S:PIN18 +A_FSB<21> S:PIN19 +A_FSB<22> S:PIN20 +A_FSB<23> S:PIN24 +A_FSB<2> S:PIN95 +A_FSB<3> S:PIN96 +A_FSB<4> S:PIN97 +A_FSB<5> S:PIN2 +A_FSB<6> S:PIN3 +A_FSB<7> S:PIN4 +A_FSB<8> S:PIN6 +A_FSB<9> S:PIN7 +SW<0> S:PIN61 +CLK2X_IOB S:PIN22 +CLK_FSB S:PIN27 +CLK_IOB S:PIN23 +E_IOB S:PIN25 +SW<1> S:PIN60 +nAS_FSB S:PIN32 +nBERR_IOB S:PIN76 +nBG_IOB S:PIN73 +nDTACK_IOB S:PIN78 +nIPL2 S:PIN92 +nLDS_FSB S:PIN30 +nRES S:PIN91 +nUDS_FSB S:PIN33 +nVPA_IOB S:PIN77 +nWE_FSB S:PIN29 +RA<11> S:PIN63 +RA<10> S:PIN55 +CLK20EN S:PIN59 +CLK25EN S:PIN58 +nBR_IOB S:PIN72 +RA<0> S:PIN53 +RA<1> S:PIN50 +RA<2> S:PIN43 +RA<3> S:PIN41 +RA<4> S:PIN40 +RA<5> S:PIN42 +RA<6> S:PIN46 +RA<7> S:PIN52 +RA<8> S:PIN54 +RA<9> S:PIN56 +nDTACK_FSB S:PIN28 +nAS_IOB S:PIN81 +nDinLE S:PIN86 +nDoutOE S:PIN89 +nLDS_IOB S:PIN79 +nUDS_IOB S:PIN80 +nVMA_IOB S:PIN74 +nADoutLE0 S:PIN85 +nADoutLE1 S:PIN82 +nAoutOE S:PIN87 +nBERR_FSB S:PIN70 +nDinOE S:PIN90 +nOE S:PIN37 +nRAMLWE S:PIN65 +nRAMUWE S:PIN66 +nRAS S:PIN64 +nROMCS S:PIN35 +nROMWE S:PIN34 +nVPA_FSB S:PIN93 +nCAS S:PIN36 + + +;The remaining section of the .gyd file is for documentation purposes only. +;It shows where your internal equations were placed in the last successful fit. + +PARTITION FB1_1 ram/RefRAS ram/BACTr iobm/RESrr iobm/RESrf + iobm/BERRrf fsb/ASrf cnt/RefCnt<1> RESr2 + RESr1 RESr0 IPL2r1 IPL2r0 + $OpTx$FX_DC$591 iobs/IOU1 iobs/IOL1 iobm/IOS_FSM_FFd1 + fsb/BERR1r cs/nOverlay1 +PARTITION FB2_7 iobs/IOACTr iobm/VPArr iobm/VPArf iobm/IOREQr + iobm/Er2 iobm/Er iobm/DTACKrr iobm/DTACKrf + iobm/BGr1 iobm/BGr0 iobm/BERRrr cnt/RefCnt<0> + +PARTITION FB3_1 fsb/VPA EXP14_ EXP15_ fsb/Ready0r + EXP16_ EXP17_ EXP18_ EXP19_ + fsb/nDTACK EXP20_ EXP21_ fsb/BERR0r + cs/nOverlay0 EXP22_ fsb/Ready1r fsb/Ready2r + nROMWE_OBUF EXP23_ +PARTITION FB4_1 iobs/Clear1 nAoutOE_OBUF iobs/ALE0 cnt/RefCnt<7> + iobm/nDoutOE nDinOE_OBUF cnt/RefCnt<6> cnt/RefCnt<5> + cnt/RefCnt<4> cnt/RefCnt<3> nVPA_FSB_OBUF cnt/RefCnt<2> + iobs/PS_FSM_FFd1 cnt/RefDone iobs/IOU0 cnt/TimeoutA + iobs/IOReady ram/RS_FSM_FFd1 +PARTITION FB5_1 EXP24_ nROMCS_OBUF ram/RAMDIS2 iobs/IOL0 + ram/nCAS nOE_OBUF iobs/Once EXP25_ + RA_4_OBUF ram/Once RA_3_OBUF RA_5_OBUF + iobs/Load1 RA_2_OBUF RA_6_OBUF EXP26_ + EXP27_ ram/RASEL +PARTITION FB6_1 iobm/ETACK iobm/nVMA iobm/IOS_FSM_FFd3 iobm/ES<3> + iobm/ES<1> iobm/ES<0> iobm/ALE0 iobm/ES<4> + iobm/nLDS iobm/IOS_FSM_FFd2 iobm/nUDS iobm/nASout + iobm/ES<2> nADoutLE1_OBUF nADoutLE0_OBUF iobm/IOACT + iobm/nDinLE iobm/IOBERR +PARTITION FB7_1 EXP28_ RA_1_OBUF EXP29_ ram/RS_FSM_FFd3 + RA_7_OBUF RA_0_OBUF cnt/TimeoutBPre RA_8_OBUF + A_FSB_21_IBUF$BUF0 ram/RS_FSM_FFd2 RA_9_OBUF CLK25EN_OBUF + cnt/TimeoutB CLK20EN_OBUF$BUF0 ram/RAMReady EXP30_ + EXP31_ ram/RAMDIS1 +PARTITION FB8_1 EXP32_ A_FSB_19_IBUF$BUF0 EXP33_ iobs/PS_FSM_FFd2 + nRAS_OBUF nRAMLWE_OBUF RESDone nRAMUWE_OBUF + iobs/IOREQ EXP34_ EXP35_ nBERR_FSB_OBUF + EXP36_ iobs/IORW1 Park iobs/BERR + EXP37_ iobs/IORW0 + diff --git a/cpld/XC95144XL/WarpSE.lso b/cpld/XC95144XL/WarpSE.lso new file mode 100644 index 0000000..22de730 --- /dev/null +++ b/cpld/XC95144XL/WarpSE.lso @@ -0,0 +1 @@ +work diff --git a/cpld/XC95144XL/WarpSE.mfd b/cpld/XC95144XL/WarpSE.mfd new file mode 100644 index 0000000..655b48a --- /dev/null +++ b/cpld/XC95144XL/WarpSE.mfd @@ -0,0 +1,2914 @@ +MDF Database: version 1.0 +MDF_INFO | WarpSE | XC95144XL-10-TQ100 +MACROCELL | 5 | 1 | iobm/nVMA +ATTRIBUTES | 4622082 | 0 +OUTPUTMC | 2 | 5 | 1 | 5 | 0 +INPUTS | 10 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | iobm/IOACT | iobm/VPArf | iobm/VPArr | nAoutOE +INPUTMC | 10 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 1 | 8 | 1 | 7 | 3 | 1 +EQ | 7 | + nVMA_IOB.T = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & + !iobm/ES<3> & !iobm/ES<4> + # nVMA_IOB & iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & + !iobm/ES<3> & !iobm/ES<4> & iobm/IOACT & iobm/VPArf & + iobm/VPArr; + nVMA_IOB.CLK = CLK2X_IOB; // GCK + nVMA_IOB.OE = !nAoutOE; +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 11 | iobm/nASout +ATTRIBUTES | 8816386 | 0 +OUTPUTMC | 1 | 3 | 1 +INPUTS | 4 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | nAoutOE +INPUTMC | 4 | 0 | 15 | 5 | 9 | 5 | 2 | 3 | 1 +EQ | 4 | + nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 + # iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2; + !nAS_IOB.CLK = CLK2X_IOB; // GCK + nAS_IOB.OE = !nAoutOE; +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 8 | iobm/nLDS +ATTRIBUTES | 8685314 | 0 +INPUTS | 6 | iobs/IOL0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | iobs/IORW0 | nAoutOE +INPUTMC | 6 | 4 | 3 | 5 | 2 | 5 | 9 | 0 | 15 | 7 | 17 | 3 | 1 +EQ | 8 | + !nLDS_IOB.D = iobs/IOL0 & !iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd2 + # iobs/IOL0 & iobm/IOS_FSM_FFd1 & + iobm/IOS_FSM_FFd2 + # !iobs/IORW0 & iobs/IOL0 & iobm/IOS_FSM_FFd3 & + !iobm/IOS_FSM_FFd1; + !nLDS_IOB.CLK = CLK2X_IOB; // GCK + nLDS_IOB.OE = !nAoutOE; +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 10 | iobm/nUDS +ATTRIBUTES | 8685314 | 0 +INPUTS | 6 | iobs/IOU0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | iobs/IORW0 | nAoutOE +INPUTMC | 6 | 3 | 14 | 5 | 2 | 5 | 9 | 0 | 15 | 7 | 17 | 3 | 1 +EQ | 8 | + !nUDS_IOB.D = iobs/IOU0 & !iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd2 + # iobs/IOU0 & iobm/IOS_FSM_FFd1 & + iobm/IOS_FSM_FFd2 + # !iobs/IORW0 & iobs/IOU0 & iobm/IOS_FSM_FFd3 & + !iobm/IOS_FSM_FFd1; + !nUDS_IOB.CLK = CLK2X_IOB; // GCK + nUDS_IOB.OE = !nAoutOE; +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 3 | 13 | cnt/RefDone +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 20 | 3 | 13 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 2 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 13 | 6 | 15 | 6 | 16 +INPUTS | 10 | cnt/RefDone | ram/RefRAS | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<7> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> +INPUTMC | 10 | 3 | 13 | 0 | 0 | 3 | 7 | 3 | 6 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 +EQ | 5 | + !cnt/RefDone.D = !cnt/RefDone & !ram/RefRAS + # !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<0> & + !cnt/RefCnt<7> & !cnt/RefCnt<1> & !cnt/RefCnt<3> & !cnt/RefCnt<2> & + !cnt/RefCnt<4>; + cnt/RefDone.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 4 | 9 | ram/Once +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 12 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 16 | 6 | 3 | 6 | 15 | 6 | 13 | 3 | 0 | 3 | 16 | 4 | 1 | 4 | 15 | 6 | 0 +INPUTS | 10 | ram/Once | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | A_FSB<21> +INPUTMC | 6 | 4 | 9 | 0 | 5 | 0 | 17 | 3 | 17 | 6 | 9 | 6 | 3 +INPUTP | 4 | 54 | 36 | 30 | 29 +EQ | 13 | + ram/Once.T = ram/Once & nAS_FSB & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & fsb/ASrf; + ram/Once.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 4 | 6 | iobs/Once +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 11 | 4 | 6 | 7 | 15 | 7 | 1 | 7 | 13 | 3 | 16 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 5 | 4 | 7 | 4 | 8 +INPUTS | 10 | A_FSB<22> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | nADoutLE1 | nOE_OBUF.EXP | EXP25_.EXP +INPUTMC | 7 | 4 | 6 | 7 | 3 | 3 | 12 | 0 | 5 | 5 | 13 | 4 | 5 | 4 | 7 +INPUTP | 3 | 30 | 54 | 36 +IMPORTS | 2 | 4 | 5 | 4 | 7 +EQ | 25 | + !iobs/Once.D = nAS_FSB & !fsb/ASrf + # A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd2 + # A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd2 + # A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd1 + # !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1 +;Imported pterms FB5_6 + # A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1 + # !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once + # !A_FSB<23> & !A_FSB<22> & !iobs/Once & + !cs/nOverlay1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once +;Imported pterms FB5_8 + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & nWE_FSB & !iobs/Once +;Imported pterms FB5_9 + # !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + !iobs/Once + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & + cs/nOverlay1; + iobs/Once.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 17 | cs/nOverlay1 +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 44 | 4 | 9 | 4 | 5 | 7 | 17 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 12 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 16 | 6 | 6 | 6 | 3 | 7 | 3 | 4 | 12 | 7 | 8 | 6 | 16 | 6 | 13 | 6 | 7 | 6 | 15 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 12 | 2 | 14 | 2 | 16 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 8 | 4 | 13 | 4 | 15 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 10 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11 +INPUTS | 3 | cs/nOverlay0 | nAS_FSB | fsb/ASrf +INPUTMC | 2 | 2 | 12 | 0 | 5 +INPUTP | 1 | 54 +EQ | 3 | + cs/nOverlay1.D = cs/nOverlay0; + cs/nOverlay1.CLK = CLK_FSB; // GCK + cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf; +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 7 | 15 | iobs/BERR +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 9 | 7 | 15 | 0 | 16 | 2 | 0 | 2 | 5 | 7 | 11 | 2 | 3 | 2 | 10 | 2 | 11 | 7 | 10 +INPUTS | 8 | iobs/BERR | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1 +INPUTMC | 7 | 7 | 15 | 0 | 5 | 4 | 6 | 7 | 3 | 1 | 6 | 5 | 17 | 5 | 13 +INPUTP | 1 | 54 +EQ | 8 | + iobs/BERR.T = iobs/BERR & nAS_FSB & !fsb/ASrf + # iobs/Once & iobs/BERR & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & !iobm/IOBERR & nADoutLE1 + # iobs/Once & !iobs/BERR & !nAS_FSB & + !iobs/PS_FSM_FFd2 & !iobs/IOACTr & iobm/IOBERR & nADoutLE1 + # iobs/Once & !iobs/BERR & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & iobm/IOBERR & fsb/ASrf & nADoutLE1; + iobs/BERR.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 7 | 17 | iobs/IORW0 +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 6 | 5 | 8 | 5 | 10 | 7 | 17 | 3 | 4 | 7 | 0 | 7 | 1 +INPUTS | 12 | A_FSB<14> | A_FSB<13> | A_FSB<23> | A_FSB<21> | nADoutLE1 | A_FSB<22> | cs/nOverlay1 | A_FSB<20> | nWE_FSB | iobs/IORW0 | EXP32_.EXP | EXP37_.EXP +INPUTMC | 5 | 5 | 13 | 0 | 17 | 7 | 17 | 7 | 0 | 7 | 16 +INPUTP | 7 | 19 | 18 | 36 | 29 | 30 | 28 | 47 +IMPORTS | 2 | 7 | 0 | 7 | 16 +EQ | 26 | + !iobs/IORW0.T = !nWE_FSB & !iobs/IORW0 & nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & + nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & nADoutLE1 + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + nADoutLE1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 & nADoutLE1 +;Imported pterms FB8_1 + # iobs/IORW0 & iobs/IORW1 & !nADoutLE1 + # !iobs/IORW0 & !iobs/IORW1 & !nADoutLE1 + # nAS_FSB & !fsb/ASrf & nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !iobs/IORW0 & nADoutLE1 +;Imported pterms FB8_2 + # iobs/PS_FSM_FFd2 + # iobs/PS_FSM_FFd1 + # iobs/Once & nADoutLE1 + # nWE_FSB & iobs/IORW0 & nADoutLE1 +;Imported pterms FB8_17 + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1 + # !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1; + iobs/IORW0.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 2 | 12 | cs/nOverlay0 +ATTRIBUTES | 4358928 | 0 +OUTPUTMC | 3 | 0 | 17 | 2 | 12 | 2 | 13 +INPUTS | 19 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay0 | nAS_FSB | fsb/ASrf | nRES | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | iobs/IOReady | nADoutLE1 | A_FSB<13> +INPUTMC | 6 | 2 | 12 | 0 | 5 | 0 | 17 | 2 | 14 | 3 | 16 | 5 | 13 +INPUTP | 13 | 36 | 30 | 29 | 28 | 54 | 145 | 19 | 26 | 24 | 23 | 22 | 47 | 18 +EXPORTS | 1 | 2 | 13 +EQ | 12 | + cs/nOverlay0.T = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & + !cs/nOverlay0 & !nAS_FSB + # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & + !cs/nOverlay0 & fsb/ASrf; + cs/nOverlay0.CLK = CLK_FSB; // GCK + cs/nOverlay0.AR = !nRES; + cs/nOverlay0.EXP = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 15 | cnt/TimeoutA +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 8 | 3 | 15 | 2 | 15 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 7 | 2 | 14 | 2 | 16 +INPUTS | 10 | cnt/TimeoutA | nAS_FSB | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> +INPUTMC | 9 | 3 | 15 | 0 | 5 | 3 | 7 | 3 | 6 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 +INPUTP | 1 | 54 +EQ | 8 | + cnt/TimeoutA.T = cnt/TimeoutA & nAS_FSB & !fsb/ASrf + # !cnt/TimeoutA & !nAS_FSB & !cnt/RefCnt<5> & + !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<1> & !cnt/RefCnt<3> & + !cnt/RefCnt<2> & !cnt/RefCnt<4> + # !cnt/TimeoutA & !cnt/RefCnt<5> & !cnt/RefCnt<6> & + !cnt/RefCnt<0> & !cnt/RefCnt<1> & !cnt/RefCnt<3> & !cnt/RefCnt<2> & + !cnt/RefCnt<4> & fsb/ASrf; + cnt/TimeoutA.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 6 | 12 | cnt/TimeoutB +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 10 | 6 | 12 | 2 | 11 | 2 | 0 | 2 | 6 | 7 | 11 | 2 | 3 | 2 | 5 | 2 | 10 | 2 | 17 | 6 | 13 +INPUTS | 13 | cnt/TimeoutB | nAS_FSB | fsb/ASrf | cnt/TimeoutBPre | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<7> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> | SW<0> +INPUTMC | 11 | 6 | 12 | 0 | 5 | 6 | 6 | 3 | 7 | 3 | 6 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 +INPUTP | 2 | 54 | 98 +EXPORTS | 1 | 6 | 13 +EQ | 9 | + cnt/TimeoutB.T = cnt/TimeoutB & nAS_FSB & !fsb/ASrf + # !cnt/TimeoutB & cnt/TimeoutBPre & !nAS_FSB & + !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<7> & + !cnt/RefCnt<1> & !cnt/RefCnt<3> & !cnt/RefCnt<2> & !cnt/RefCnt<4> + # !cnt/TimeoutB & cnt/TimeoutBPre & !cnt/RefCnt<5> & + !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<7> & !cnt/RefCnt<1> & + !cnt/RefCnt<3> & !cnt/RefCnt<2> & !cnt/RefCnt<4> & fsb/ASrf; + cnt/TimeoutB.CLK = CLK_FSB; // GCK + cnt/TimeoutB.EXP = SW<0> +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 6 | 6 | cnt/TimeoutBPre +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 3 | 6 | 12 | 6 | 6 | 6 | 7 +INPUTS | 17 | cnt/TimeoutBPre | nAS_FSB | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<7> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> | A_FSB<9> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RASEL | A_FSB<21> +INPUTMC | 12 | 6 | 6 | 0 | 5 | 3 | 7 | 3 | 6 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 | 0 | 17 | 4 | 17 +INPUTP | 5 | 54 | 12 | 36 | 30 | 29 +EXPORTS | 1 | 6 | 7 +EQ | 12 | + cnt/TimeoutBPre.T = cnt/TimeoutBPre & nAS_FSB & !fsb/ASrf + # !cnt/TimeoutBPre & !nAS_FSB & !cnt/RefCnt<5> & + !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<7> & !cnt/RefCnt<1> & + !cnt/RefCnt<3> & !cnt/RefCnt<2> & !cnt/RefCnt<4> + # !cnt/TimeoutBPre & !cnt/RefCnt<5> & !cnt/RefCnt<6> & + !cnt/RefCnt<0> & !cnt/RefCnt<7> & !cnt/RefCnt<1> & !cnt/RefCnt<3> & + !cnt/RefCnt<2> & !cnt/RefCnt<4> & fsb/ASrf; + cnt/TimeoutBPre.CLK = CLK_FSB; // GCK + cnt/TimeoutBPre.EXP = A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + ram/RASEL + # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & ram/RASEL +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 2 | 11 | fsb/BERR0r +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 7 | 2 | 11 | 2 | 0 | 2 | 5 | 7 | 11 | 2 | 3 | 2 | 10 | 7 | 10 +INPUTS | 24 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | fsb/BERR0r | cnt/TimeoutB | nAS_FSB | fsb/ASrf | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/BERR | fsb/BERR1r | fsb/Ready1r | nBR_IOB +INPUTMC | 7 | 2 | 11 | 6 | 12 | 0 | 5 | 7 | 15 | 0 | 16 | 2 | 14 | 7 | 14 +INPUTP | 17 | 36 | 30 | 29 | 28 | 54 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 26 | 24 | 23 | 22 +EXPORTS | 1 | 2 | 10 +EQ | 10 | + !fsb/BERR0r.D = !cnt/TimeoutB & !fsb/BERR0r + # nAS_FSB & !fsb/ASrf + # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & + !fsb/BERR0r; + fsb/BERR0r.CLK = CLK_FSB; // GCK + fsb/BERR0r.EXP = A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 16 | fsb/BERR1r +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 8 | 0 | 16 | 2 | 0 | 2 | 5 | 7 | 11 | 2 | 3 | 2 | 10 | 2 | 11 | 7 | 10 +INPUTS | 4 | iobs/BERR | fsb/BERR1r | nAS_FSB | fsb/ASrf +INPUTMC | 3 | 7 | 15 | 0 | 16 | 0 | 5 +INPUTP | 1 | 54 +EQ | 3 | + !fsb/BERR1r.D = !iobs/BERR & !fsb/BERR1r + # nAS_FSB & !fsb/ASrf; + fsb/BERR1r.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 2 | 3 | fsb/Ready0r +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 5 | 2 | 3 | 2 | 6 | 2 | 1 | 2 | 9 | 2 | 2 +INPUTS | 32 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cnt/TimeoutA | fsb/Ready2r | fsb/VPA | $OpTx$FX_DC$591 | A_FSB<9> | iobs/BERR | cnt/TimeoutB | fsb/BERR0r | fsb/BERR1r | fsb/Ready1r | nBR_IOB | iobs/IOReady | EXP16_.EXP +INPUTMC | 15 | 0 | 17 | 2 | 3 | 6 | 14 | 3 | 15 | 2 | 15 | 2 | 0 | 0 | 12 | 7 | 15 | 6 | 12 | 2 | 11 | 0 | 16 | 2 | 14 | 7 | 14 | 3 | 16 | 2 | 4 +INPUTP | 17 | 36 | 30 | 29 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 28 | 26 | 24 | 23 | 22 | 47 | 12 +EXPORTS | 1 | 2 | 2 +IMPORTS | 1 | 2 | 4 +EQ | 24 | + !fsb/Ready0r.D = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !fsb/Ready0r & !ram/RAMReady + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady +;Imported pterms FB3_5 + # nAS_FSB & !fsb/ASrf; + fsb/Ready0r.CLK = CLK_FSB; // GCK + fsb/Ready0r.EXP = A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB & + !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB & + !$OpTx$FX_DC$591 +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 2 | 14 | fsb/Ready1r +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 11 | 2 | 13 | 2 | 7 | 2 | 1 | 2 | 3 | 2 | 6 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 16 | 2 | 17 | 2 | 15 +INPUTS | 22 | nAS_FSB | fsb/ASrf | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | EXP22_.EXP +INPUTMC | 5 | 0 | 5 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 13 +INPUTP | 17 | 54 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 +EXPORTS | 1 | 2 | 15 +IMPORTS | 1 | 2 | 13 +EQ | 37 | + !fsb/Ready1r.D = nAS_FSB & !fsb/ASrf +;Imported pterms FB3_14 + # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady + # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & + !iobs/IOReady + # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & + !iobs/IOReady & !SW<1> + # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady + # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady +;Imported pterms FB3_13 + # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1; + fsb/Ready1r.CLK = CLK_FSB; // GCK + fsb/Ready1r.EXP = nAS_FSB & !fsb/ASrf + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 2 | 15 | fsb/Ready2r +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 7 | 2 | 15 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 7 | 2 | 14 | 2 | 16 +INPUTS | 21 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | A_FSB<8> | fsb/Ready1r.EXP +INPUTMC | 4 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 14 +INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11 +IMPORTS | 1 | 2 | 14 +EQ | 43 | + !fsb/Ready2r.D = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r +;Imported pterms FB3_15 + # nAS_FSB & !fsb/ASrf + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r; + fsb/Ready2r.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 2 | 0 | fsb/VPA +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 7 | 2 | 0 | 3 | 10 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 16 | 2 | 17 +INPUTS | 10 | fsb/VPA | nBR_IOB | $OpTx$FX_DC$591 | fsb/BERR0r | fsb/BERR1r | iobs/BERR | A_FSB<20> | cnt/TimeoutB | EXP14_.EXP | EXP23_.EXP +INPUTMC | 9 | 2 | 0 | 7 | 14 | 0 | 12 | 2 | 11 | 0 | 16 | 7 | 15 | 6 | 12 | 2 | 1 | 2 | 17 +INPUTP | 1 | 28 +IMPORTS | 2 | 2 | 1 | 2 | 17 +EQ | 95 | + fsb/VPA.D = iobs/BERR & fsb/VPA & !$OpTx$FX_DC$591 + # fsb/BERR0r & fsb/VPA & !$OpTx$FX_DC$591 + # fsb/BERR1r & fsb/VPA & !$OpTx$FX_DC$591 + # fsb/VPA & !nBR_IOB & !$OpTx$FX_DC$591 + # !A_FSB<20> & cnt/TimeoutB & fsb/VPA & + !$OpTx$FX_DC$591 +;Imported pterms FB3_2 + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !fsb/Ready0r & fsb/VPA & !ram/RAMReady & !$OpTx$FX_DC$591 + # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA & + !iobs/IOReady & !SW<1> & !$OpTx$FX_DC$591 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !ram/RAMReady & + !$OpTx$FX_DC$591 + # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591 + # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591 +;Imported pterms FB3_3 + # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 +;Imported pterms FB3_4 + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB & + !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB & + !$OpTx$FX_DC$591 +;Imported pterms FB3_18 + # A_FSB<23> & cnt/TimeoutB & fsb/VPA & + !$OpTx$FX_DC$591 + # !A_FSB<22> & cnt/TimeoutB & fsb/VPA & + !$OpTx$FX_DC$591 + # A_FSB<21> & cnt/TimeoutB & fsb/VPA & + !$OpTx$FX_DC$591 + # A_FSB<23> & !fsb/Ready1r & fsb/VPA & + !iobs/IOReady & !$OpTx$FX_DC$591 + # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & + fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591 +;Imported pterms FB3_17 + # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & + !nADoutLE1 & !$OpTx$FX_DC$591 + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & + !nADoutLE1 & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591; + fsb/VPA.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 4 | 3 | iobs/IOL0 +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 1 | 5 | 8 +INPUTS | 5 | iobs/IOL1 | nADoutLE1 | nLDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 +INPUTMC | 4 | 0 | 14 | 5 | 13 | 7 | 3 | 3 | 12 +INPUTP | 1 | 49 +EQ | 4 | + iobs/IOL0.D = !nLDS_FSB & nADoutLE1 + # iobs/IOL1 & !nADoutLE1; + iobs/IOL0.CLK = CLK_FSB; // GCK + iobs/IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 14 | iobs/IOL1 +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 1 | 4 | 3 +INPUTS | 2 | nLDS_FSB | iobs/Load1 +INPUTMC | 1 | 4 | 12 +INPUTP | 1 | 49 +EQ | 3 | + iobs/IOL1.D = !nLDS_FSB; + iobs/IOL1.CLK = CLK_FSB; // GCK + iobs/IOL1.CE = iobs/Load1; +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 7 | 13 | iobs/IORW1 +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 2 | 7 | 0 | 7 | 13 +INPUTS | 8 | A_FSB<23> | A_FSB<21> | iobs/IORW1 | nADoutLE1 | iobs/Once | nWE_FSB | EXP36_.EXP | Park.EXP +INPUTMC | 5 | 7 | 13 | 5 | 13 | 4 | 6 | 7 | 12 | 7 | 14 +INPUTP | 3 | 36 | 29 | 47 +IMPORTS | 2 | 7 | 12 | 7 | 14 +EQ | 22 | + !iobs/IORW1.T = iobs/Once + # !nADoutLE1 + # nWE_FSB & iobs/IORW1 + # !nWE_FSB & !iobs/IORW1 + # !A_FSB<23> & A_FSB<21> & !iobs/IORW1 +;Imported pterms FB8_13 + # nAS_FSB & !fsb/ASrf + # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> +;Imported pterms FB8_12 + # !A_FSB<23> & !A_FSB<20> & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 +;Imported pterms FB8_15 + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> + # !A_FSB<23> & A_FSB<21> & !A_FSB<16>; + iobs/IORW1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 16 | iobs/IOReady +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 12 | 2 | 13 | 2 | 7 | 3 | 16 | 2 | 1 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 12 | 2 | 16 | 2 | 17 | 3 | 17 +INPUTS | 18 | iobs/IOReady | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1 | A_FSB<23> | A_FSB<22> | cnt/RefDone | ram/Once | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> +INPUTMC | 15 | 3 | 16 | 0 | 5 | 4 | 6 | 7 | 3 | 1 | 6 | 5 | 17 | 5 | 13 | 3 | 13 | 4 | 9 | 0 | 17 | 3 | 17 | 6 | 9 | 3 | 7 | 3 | 6 | 3 | 3 +INPUTP | 3 | 54 | 36 | 30 +EXPORTS | 1 | 3 | 17 +EQ | 11 | + iobs/IOReady.T = iobs/IOReady & nAS_FSB & !fsb/ASrf + # iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & iobm/IOBERR & nADoutLE1 + # iobs/Once & !iobs/IOReady & !nAS_FSB & + !iobs/PS_FSM_FFd2 & !iobs/IOACTr & !iobm/IOBERR & nADoutLE1 + # iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & !iobm/IOBERR & fsb/ASrf & nADoutLE1; + iobs/IOReady.CLK = CLK_FSB; // GCK + iobs/IOReady.EXP = !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once & + cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 14 | iobs/IOU0 +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 1 | 5 | 10 +INPUTS | 5 | iobs/IOU1 | nADoutLE1 | nUDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 +INPUTMC | 4 | 0 | 13 | 5 | 13 | 7 | 3 | 3 | 12 +INPUTP | 1 | 56 +EQ | 4 | + iobs/IOU0.D = !nUDS_FSB & nADoutLE1 + # iobs/IOU1 & !nADoutLE1; + iobs/IOU0.CLK = CLK_FSB; // GCK + iobs/IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 13 | iobs/IOU1 +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 1 | 3 | 14 +INPUTS | 2 | nUDS_FSB | iobs/Load1 +INPUTMC | 1 | 4 | 12 +INPUTP | 1 | 56 +EQ | 3 | + iobs/IOU1.D = !nUDS_FSB; + iobs/IOU1.CLK = CLK_FSB; // GCK + iobs/IOU1.CE = iobs/Load1; +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 4 | 2 | ram/RAMDIS2 +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 4 | 4 | 2 | 4 | 1 | 7 | 5 | 7 | 6 +INPUTS | 15 | ram/RAMDIS2 | nAS_FSB | fsb/ASrf | cnt/RefDone | ram/Once | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nROMCS_OBUF.EXP +INPUTMC | 12 | 4 | 2 | 0 | 5 | 3 | 13 | 4 | 9 | 3 | 17 | 6 | 9 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 17 | 4 | 1 +INPUTP | 3 | 54 | 36 | 30 +IMPORTS | 1 | 4 | 1 +EQ | 23 | + ram/RAMDIS2.T = ram/RAMDIS2 & nAS_FSB & !fsb/ASrf + # !cnt/RefDone & ram/Once & !ram/RAMDIS2 & !nAS_FSB & + ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !cnt/RefDone & ram/Once & !ram/RAMDIS2 & + ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once & + cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once & + cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf +;Imported pterms FB5_2 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & + fsb/ASrf; + ram/RAMDIS2.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 2 | 8 | fsb/nDTACK +ATTRIBUTES | 8815362 | 0 +OUTPUTMC | 5 | 2 | 8 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 10 +INPUTS | 23 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | nDTACK_FSB | A_FSB<8> | EXP19_.EXP | EXP20_.EXP +INPUTMC | 6 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 8 | 2 | 7 | 2 | 9 +INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11 +IMPORTS | 2 | 2 | 7 | 2 | 9 +EQ | 90 | + nDTACK_FSB.D = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB +;Imported pterms FB3_8 + # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB + # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & + !nADoutLE1 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB +;Imported pterms FB3_7 + # A_FSB<23> & cnt/TimeoutB & nDTACK_FSB + # !A_FSB<22> & cnt/TimeoutB & nDTACK_FSB + # !A_FSB<20> & cnt/TimeoutB & nDTACK_FSB + # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & + nDTACK_FSB + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady +;Imported pterms FB3_6 + # nAS_FSB & !fsb/ASrf + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB +;Imported pterms FB3_10 + # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & + !iobs/IOReady & nDTACK_FSB + # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & + !iobs/IOReady & nDTACK_FSB & !SW<1> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady + # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & + !nADoutLE1 +;Imported pterms FB3_11 + # iobs/BERR & nDTACK_FSB + # fsb/BERR0r & nDTACK_FSB + # fsb/BERR1r & nDTACK_FSB + # nDTACK_FSB & !nBR_IOB + # A_FSB<21> & cnt/TimeoutB & nDTACK_FSB +;Imported pterms FB3_12 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB; + nDTACK_FSB.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 17 | ram/RS_FSM_FFd1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 21 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 0 | 0 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 13 | 6 | 15 | 6 | 16 +INPUTS | 15 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefDone | nAS_FSB | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | iobs/Clear1.EXP | iobs/IOReady.EXP +INPUTMC | 12 | 3 | 17 | 6 | 9 | 6 | 3 | 3 | 13 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5 | 4 | 9 | 0 | 17 | 3 | 0 | 3 | 16 +INPUTP | 3 | 54 | 36 | 30 +IMPORTS | 2 | 3 | 0 | 3 | 16 +EQ | 21 | + ram/RS_FSM_FFd1.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 + # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 + # !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once & + cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> +;Imported pterms FB4_1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf +;Imported pterms FB4_17 + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once & + cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf; + ram/RS_FSM_FFd1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 4 | 17 | ram/RASEL +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 10 | 6 | 5 | 6 | 1 | 6 | 6 | 4 | 10 | 4 | 8 | 4 | 4 | 4 | 14 | 6 | 4 | 6 | 7 | 6 | 11 +INPUTS | 13 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd1 | A_FSB<23> | cnt/RefDone | nAS_FSB | ram/BACTr | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | EXP24_.EXP | EXP27_.EXP +INPUTMC | 11 | 6 | 9 | 6 | 3 | 3 | 17 | 3 | 13 | 0 | 1 | 0 | 5 | 3 | 7 | 3 | 6 | 3 | 3 | 4 | 0 | 4 | 16 +INPUTP | 2 | 36 | 54 +IMPORTS | 2 | 4 | 0 | 4 | 16 +EQ | 44 | + ram/RASEL.D = !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 + # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 + # A_FSB<23> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr + # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf + # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf +;Imported pterms FB5_1 + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> +;Imported pterms FB5_17 + # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf +;Imported pterms FB5_16 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7>; + ram/RASEL.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 6 | 9 | ram/RS_FSM_FFd2 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 18 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 0 | 0 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 2 | 6 | 8 | 6 | 10 +INPUTS | 10 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | nAS_FSB | ram/RS_FSM_FFd3 | fsb/ASrf | cnt/RefDone | cnt/RefCnt<7> | ram/BACTr | A_FSB_21_IBUF$BUF0.EXP | RA_9_OBUF.EXP +INPUTMC | 9 | 3 | 17 | 6 | 9 | 6 | 3 | 0 | 5 | 3 | 13 | 3 | 3 | 0 | 1 | 6 | 8 | 6 | 10 +INPUTP | 1 | 54 +IMPORTS | 2 | 6 | 8 | 6 | 10 +EQ | 27 | + !ram/RS_FSM_FFd2.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 + # cnt/RefDone & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 + # !nAS_FSB & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 + # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf + # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<7> & ram/BACTr +;Imported pterms FB7_9 + # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<5> & ram/BACTr + # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<6> & ram/BACTr + # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<5> & !fsb/ASrf + # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<7> & !fsb/ASrf +;Imported pterms FB7_11 + # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<6> & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf; + ram/RS_FSM_FFd2.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 5 | 2 | iobm/IOS_FSM_FFd3 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 13 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 6 | 3 | 4 | 5 | 0 | 5 | 14 | 5 | 16 +INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | CLK_IOB | iobm/IOREQr | nAoutOE +INPUTMC | 5 | 0 | 15 | 5 | 9 | 5 | 2 | 1 | 9 | 3 | 1 +INPUTP | 1 | 35 +EQ | 6 | + iobm/IOS_FSM_FFd3.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 + # iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & + !iobm/IOS_FSM_FFd2 + # !CLK_IOB & !iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 & + iobm/IOREQr & !nAoutOE; + iobm/IOS_FSM_FFd3.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 0 | 15 | iobm/IOS_FSM_FFd1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 6 | 5 | 16 | 5 | 0 | 5 | 14 +INPUTS | 3 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 +INPUTMC | 3 | 5 | 2 | 5 | 9 | 0 | 15 +EQ | 3 | + iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 + # !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2; + iobm/IOS_FSM_FFd1.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd2 +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 6 | 5 | 16 | 3 | 4 | 5 | 0 +INPUTS | 11 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | CLK_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/RESrf | iobm/RESrr +INPUTMC | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 0 | 0 | 4 | 1 | 16 | 1 | 13 | 1 | 12 | 0 | 3 | 0 | 2 +INPUTP | 1 | 35 +EQ | 11 | + iobm/IOS_FSM_FFd2.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & + !iobm/IOS_FSM_FFd2 + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/IOS_FSM_FFd2 & iobm/ETACK + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/IOS_FSM_FFd2 & iobm/BERRrf & iobm/BERRrr + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/IOS_FSM_FFd2 & iobm/DTACKrf & iobm/DTACKrr + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/IOS_FSM_FFd2 & iobm/RESrf & iobm/RESrr; + iobm/IOS_FSM_FFd2.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 6 | 3 | ram/RS_FSM_FFd3 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 16 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 6 | 17 | 6 | 14 | 4 | 1 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 8 | 6 | 10 | 6 | 16 +INPUTS | 12 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd3 | fsb/ASrf | A_FSB<21> | EXP29_.EXP | RA_7_OBUF.EXP +INPUTMC | 8 | 3 | 17 | 6 | 9 | 4 | 9 | 0 | 17 | 6 | 3 | 0 | 5 | 6 | 2 | 6 | 4 +INPUTP | 4 | 36 | 30 | 54 | 29 +IMPORTS | 2 | 6 | 2 | 6 | 4 +EQ | 30 | + ram/RS_FSM_FFd3.D = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf +;Imported pterms FB7_3 + # !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & + fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & + cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & + cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> +;Imported pterms FB7_5 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf; + ram/RS_FSM_FFd3.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 7 | 3 | iobs/PS_FSM_FFd2 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 17 | 4 | 6 | 7 | 15 | 7 | 9 | 4 | 3 | 7 | 12 | 3 | 16 | 3 | 14 | 7 | 3 | 3 | 12 | 4 | 12 | 3 | 2 | 3 | 0 | 7 | 8 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7 +INPUTS | 12 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | EXP33_.EXP | nRAS_OBUF.EXP +INPUTMC | 9 | 7 | 3 | 3 | 12 | 1 | 6 | 4 | 6 | 5 | 13 | 0 | 5 | 0 | 17 | 7 | 2 | 7 | 4 +INPUTP | 3 | 54 | 36 | 30 +IMPORTS | 2 | 7 | 2 | 7 | 4 +EQ | 33 | + !iobs/PS_FSM_FFd2.D = iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & + iobs/IOACTr + # !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & + !iobs/IOACTr + # iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + nADoutLE1 + # nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + !fsb/ASrf & nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 +;Imported pterms FB8_3 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 +;Imported pterms FB8_5 + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & + !iobs/PS_FSM_FFd1 & SW<1> & nADoutLE1 + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1; + iobs/PS_FSM_FFd2.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 7 | cnt/RefCnt<5> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 22 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 8 | 6 | 2 | 3 | 6 | 3 | 3 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4 +INPUTS | 5 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> +INPUTMC | 5 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 +EQ | 3 | + cnt/RefCnt<5>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<3> & + cnt/RefCnt<2> & cnt/RefCnt<4>; + cnt/RefCnt<5>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 6 | cnt/RefCnt<6> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 22 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 8 | 6 | 2 | 3 | 3 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 10 +INPUTS | 6 | cnt/RefCnt<5> | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> +INPUTMC | 6 | 3 | 7 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 +EQ | 3 | + cnt/RefCnt<6>.T = cnt/RefCnt<5> & cnt/RefCnt<0> & cnt/RefCnt<1> & + cnt/RefCnt<3> & cnt/RefCnt<2> & cnt/RefCnt<4>; + cnt/RefCnt<6>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 5 | 5 | iobm/ES<0> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 +INPUTS | 7 | iobm/ES<0> | iobm/Er | iobm/Er2 | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> +INPUTMC | 7 | 5 | 5 | 1 | 11 | 1 | 10 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 +EQ | 6 | + !iobm/ES<0>.T = iobm/ES<0> & !iobm/Er & iobm/Er2 + # !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & + !iobm/ES<3> & !iobm/ES<4> & iobm/Er + # !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & + !iobm/ES<3> & !iobm/ES<4> & !iobm/Er2; + iobm/ES<0>.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 3 | 12 | iobs/PS_FSM_FFd1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 14 | 4 | 6 | 7 | 4 | 4 | 3 | 7 | 12 | 3 | 14 | 7 | 3 | 3 | 12 | 4 | 12 | 3 | 2 | 3 | 0 | 7 | 8 | 4 | 5 | 7 | 1 | 7 | 2 +INPUTS | 3 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr +INPUTMC | 3 | 7 | 3 | 3 | 12 | 1 | 6 +EQ | 3 | + iobs/PS_FSM_FFd1.D = iobs/PS_FSM_FFd2 + # iobs/PS_FSM_FFd1 & iobs/IOACTr; + iobs/PS_FSM_FFd1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 5 | 4 | iobm/ES<1> +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 +INPUTS | 4 | iobm/ES<0> | iobm/ES<1> | iobm/Er | iobm/Er2 +INPUTMC | 4 | 5 | 5 | 5 | 4 | 1 | 11 | 1 | 10 +EQ | 4 | + !iobm/ES<1>.D = iobm/ES<0> & iobm/ES<1> + # !iobm/ES<0> & !iobm/ES<1> + # !iobm/Er & iobm/Er2; + iobm/ES<1>.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 17 | cnt/RefCnt<0> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 11 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 +INPUTS | 0 +EQ | 2 | + cnt/RefCnt<0>.T = Vcc; + cnt/RefCnt<0>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 3 | cnt/RefCnt<7> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 20 | 3 | 13 | 6 | 12 | 6 | 6 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 2 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 8 +INPUTS | 7 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> +INPUTMC | 7 | 3 | 7 | 3 | 6 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 +EQ | 3 | + cnt/RefCnt<7>.T = cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<0> & + cnt/RefCnt<1> & cnt/RefCnt<3> & cnt/RefCnt<2> & cnt/RefCnt<4>; + cnt/RefCnt<7>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 5 | 12 | iobm/ES<2> +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 +INPUTS | 7 | iobm/ES<0> | iobm/ES<2> | iobm/ES<1> | iobm/Er | iobm/Er2 | iobm/ES<3> | iobm/ES<4> +INPUTMC | 7 | 5 | 5 | 5 | 12 | 5 | 4 | 1 | 11 | 1 | 10 | 5 | 3 | 5 | 7 +EQ | 6 | + !iobm/ES<2>.D = !iobm/ES<0> & !iobm/ES<2> + # !iobm/ES<1> & !iobm/ES<2> + # !iobm/Er & iobm/Er2 + # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> + # !iobm/ES<2> & !iobm/ES<3> & iobm/ES<4>; + iobm/ES<2>.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 3 | iobm/ES<3> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 +INPUTS | 6 | iobm/ES<3> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> +INPUTMC | 6 | 5 | 3 | 1 | 11 | 1 | 10 | 5 | 5 | 5 | 4 | 5 | 12 +EQ | 4 | + iobm/ES<3>.T = iobm/ES<3> & !iobm/Er & iobm/Er2 + # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & iobm/Er + # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & !iobm/Er2; + iobm/ES<3>.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 7 | iobm/ES<4> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 5 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 7 | 5 | 0 +INPUTS | 7 | iobm/ES<4> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> +INPUTMC | 7 | 5 | 7 | 1 | 11 | 1 | 10 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 +EQ | 8 | + iobm/ES<4>.T = iobm/ES<4> & !iobm/Er & iobm/Er2 + # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & + iobm/ES<3> & iobm/Er + # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & + iobm/ES<3> & !iobm/Er2 + # iobm/ES<0> & iobm/ES<1> & !iobm/ES<2> & + !iobm/ES<3> & iobm/ES<4>; + iobm/ES<4>.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 0 | 6 | cnt/RefCnt<1> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 10 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 9 | 3 | 11 | 3 | 8 +INPUTS | 1 | cnt/RefCnt<0> +INPUTMC | 1 | 1 | 17 +EQ | 2 | + cnt/RefCnt<1>.T = cnt/RefCnt<0>; + cnt/RefCnt<1>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 9 | cnt/RefCnt<3> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 8 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 8 +INPUTS | 3 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<2> +INPUTMC | 3 | 1 | 17 | 0 | 6 | 3 | 11 +EQ | 2 | + cnt/RefCnt<3>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2>; + cnt/RefCnt<3>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 1 | 6 | iobs/IOACTr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 5 | 7 | 15 | 3 | 16 | 7 | 3 | 3 | 12 | 7 | 8 +INPUTS | 1 | iobm/IOACT +INPUTMC | 1 | 5 | 15 +EQ | 2 | + iobs/IOACTr.D = iobm/IOACT; + iobs/IOACTr.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 11 | cnt/RefCnt<2> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 9 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 9 | 3 | 8 +INPUTS | 2 | cnt/RefCnt<0> | cnt/RefCnt<1> +INPUTMC | 2 | 1 | 17 | 0 | 6 +EQ | 2 | + cnt/RefCnt<2>.T = cnt/RefCnt<0> & cnt/RefCnt<1>; + cnt/RefCnt<2>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 8 | cnt/RefCnt<4> +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 7 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 +INPUTS | 4 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> +INPUTMC | 4 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 +EQ | 3 | + cnt/RefCnt<4>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<3> & + cnt/RefCnt<2>; + cnt/RefCnt<4>.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 4 | 12 | iobs/Load1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 0 | 14 | 0 | 13 | 5 | 13 +INPUTS | 11 | nADoutLE1 | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | RA_5_OBUF.EXP | RA_2_OBUF.EXP +INPUTMC | 8 | 5 | 13 | 4 | 6 | 7 | 3 | 3 | 12 | 0 | 5 | 0 | 17 | 4 | 11 | 4 | 13 +INPUTP | 3 | 54 | 36 | 30 +IMPORTS | 2 | 4 | 11 | 4 | 13 +EQ | 19 | + !iobs/Load1.D = iobs/Once + # !nADoutLE1 + # nAS_FSB & !fsb/ASrf + # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 +;Imported pterms FB5_12 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> +;Imported pterms FB5_14 + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> + # !A_FSB<23> & A_FSB<21> & nWE_FSB + # !A_FSB<23> & !A_FSB<20> & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1; + iobs/Load1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 1 | ram/BACTr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 11 | 4 | 17 | 6 | 9 | 6 | 17 | 6 | 14 | 4 | 0 | 4 | 16 | 6 | 0 | 6 | 8 | 6 | 13 | 6 | 15 | 6 | 16 +INPUTS | 2 | nAS_FSB | fsb/ASrf +INPUTMC | 1 | 0 | 5 +INPUTP | 1 | 54 +EQ | 2 | + !ram/BACTr.D = nAS_FSB & !fsb/ASrf; + ram/BACTr.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 9 | RESr0 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 0 | 8 | 7 | 6 | 7 | 14 +INPUTS | 1 | nRES +INPUTP | 1 | 145 +EQ | 2 | + RESr0.D = !nRES; + RESr0.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 8 | RESr1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 0 | 7 | 7 | 6 | 7 | 14 +INPUTS | 1 | RESr0 +INPUTMC | 1 | 0 | 9 +EQ | 2 | + RESr1.D = RESr0; + RESr1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 5 | 17 | iobm/IOBERR +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 4 | 7 | 15 | 3 | 16 | 5 | 17 | 5 | 0 +INPUTS | 12 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | CLK_IOB | nBERR_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/ETACK.EXP +INPUTMC | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 0 | 0 | 4 | 1 | 16 | 1 | 13 | 1 | 12 | 5 | 0 +INPUTP | 2 | 35 | 123 +IMPORTS | 1 | 5 | 0 +EQ | 26 | + iobm/IOBERR.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & + !iobm/IOS_FSM_FFd2 & iobm/IOBERR + # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/ETACK + # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/ETACK + # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/BERRrf & + iobm/BERRrr + # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/DTACKrf & + iobm/DTACKrr +;Imported pterms FB6_1 + # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & + iobm/RESrr + # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf & + iobm/BERRrr + # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf & + iobm/DTACKrr + # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf & + iobm/RESrr; + iobm/IOBERR.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 0 | 11 | IPL2r0 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 0 | 10 | 7 | 14 +INPUTS | 1 | nIPL2 +INPUTP | 1 | 146 +EQ | 2 | + IPL2r0.D = !nIPL2; + IPL2r0.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 7 | RESr2 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 7 | 6 | 7 | 14 +INPUTS | 1 | RESr1 +INPUTMC | 1 | 0 | 8 +EQ | 2 | + RESr2.D = RESr1; + RESr2.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 1 | 15 | iobm/BGr0 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 1 | 14 | 3 | 1 +INPUTS | 1 | nBG_IOB +INPUTP | 1 | 117 +EQ | 2 | + iobm/BGr0.D = !nBG_IOB; + iobm/BGr0.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 0 | iobm/ETACK +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 5 | 9 | 5 | 17 | 5 | 15 +INPUTS | 18 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | CLK_IOB | nBERR_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | iobm/RESrf | iobm/RESrr | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr +INPUTMC | 16 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 0 | 3 | 0 | 2 | 0 | 4 | 1 | 16 | 1 | 13 | 1 | 12 +INPUTP | 2 | 35 | 123 +EXPORTS | 1 | 5 | 17 +EQ | 15 | + iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & + !iobm/ES<3> & iobm/ES<4>; + iobm/ETACK.CLK = CLK2X_IOB; // GCK + iobm/ETACK.EXP = CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & + iobm/RESrr + # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf & + iobm/BERRrr + # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf & + iobm/DTACKrr + # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf & + iobm/RESrr +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 11 | iobm/Er +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 6 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 1 | 10 +INPUTS | 1 | E_IOB +INPUTP | 1 | 37 +EQ | 2 | + iobm/Er.D = E_IOB; + !iobm/Er.CLK = CLK_IOB; // GCK +GLOBALS | 1 | 2 | CLK_IOB + +MACROCELL | 5 | 15 | iobm/IOACT +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 5 | 1 | 1 | 6 +INPUTS | 11 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr | nAoutOE | CLK_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | nADoutLE0_OBUF.EXP | iobm/nDinLE.EXP +INPUTMC | 10 | 0 | 15 | 5 | 9 | 5 | 2 | 1 | 9 | 3 | 1 | 5 | 0 | 0 | 4 | 1 | 16 | 5 | 14 | 5 | 16 +INPUTP | 1 | 35 +IMPORTS | 2 | 5 | 14 | 5 | 16 +EQ | 15 | + !iobm/IOACT.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 + # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & + !iobm/IOREQr + # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & nAoutOE + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/ETACK + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/BERRrf & iobm/BERRrr +;Imported pterms FB6_15 + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/DTACKrf & iobm/DTACKrr +;Imported pterms FB6_17 + # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/RESrf & iobm/RESrr; + iobm/IOACT.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 9 | iobm/IOREQr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 5 | 2 | 5 | 15 | 5 | 6 +INPUTS | 1 | iobs/IOREQ +INPUTMC | 1 | 7 | 8 +EQ | 2 | + iobm/IOREQr.D = iobs/IOREQ; + !iobm/IOREQr.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 0 | 0 | ram/RefRAS +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 3 | 13 | 7 | 5 +INPUTS | 2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 +INPUTMC | 2 | 3 | 17 | 6 | 9 +EQ | 2 | + ram/RefRAS.D = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2; + ram/RefRAS.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 7 | 6 | RESDone +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 2 | 7 | 14 | 7 | 7 +INPUTS | 8 | RESr0 | RESr1 | RESr2 | nWE_FSB | nUDS_FSB | ram/RAMDIS2 | nAS_FSB | ram/RAMDIS1 +INPUTMC | 5 | 0 | 9 | 0 | 8 | 0 | 7 | 4 | 2 | 6 | 17 +INPUTP | 3 | 47 | 56 | 54 +EXPORTS | 1 | 7 | 7 +EQ | 5 | + RESDone.D = Vcc; + RESDone.CLK = CLK_FSB; // GCK + RESDone.CE = !RESr0 & !RESr1 & RESr2; + RESDone.EXP = !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & + !ram/RAMDIS1 +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 10 | IPL2r1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 7 | 14 +INPUTS | 1 | IPL2r0 +INPUTMC | 1 | 0 | 11 +EQ | 2 | + IPL2r1.D = IPL2r0; + IPL2r1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 0 | 5 | fsb/ASrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 41 | 4 | 9 | 4 | 6 | 0 | 17 | 7 | 15 | 7 | 0 | 2 | 12 | 3 | 15 | 6 | 12 | 6 | 6 | 2 | 11 | 0 | 16 | 0 | 12 | 2 | 14 | 2 | 4 | 7 | 12 | 3 | 16 | 4 | 2 | 2 | 5 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 7 | 3 | 4 | 12 | 0 | 1 | 7 | 8 | 6 | 17 | 6 | 14 | 3 | 0 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 2 | 6 | 4 | 6 | 8 | 6 | 10 | 6 | 13 | 6 | 15 | 6 | 16 +INPUTS | 1 | nAS_FSB +INPUTP | 1 | 54 +EQ | 2 | + fsb/ASrf.D = !nAS_FSB; + !fsb/ASrf.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 5 | 6 | iobm/ALE0 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 5 | 14 +INPUTS | 5 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOREQr | nAoutOE +INPUTMC | 5 | 5 | 9 | 5 | 2 | 0 | 15 | 1 | 9 | 3 | 1 +EQ | 4 | + iobm/ALE0.D = iobm/IOS_FSM_FFd2 + # iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 + # !iobm/IOS_FSM_FFd1 & iobm/IOREQr & !nAoutOE; + iobm/ALE0.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 0 | 4 | iobm/BERRrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 0 +INPUTS | 1 | nBERR_IOB +INPUTP | 1 | 123 +EQ | 2 | + iobm/BERRrf.D = !nBERR_IOB; + !iobm/BERRrf.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 16 | iobm/BERRrr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 0 +INPUTS | 1 | nBERR_IOB +INPUTP | 1 | 123 +EQ | 2 | + iobm/BERRrr.D = !nBERR_IOB; + iobm/BERRrr.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 14 | iobm/BGr1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 3 | 1 +INPUTS | 1 | iobm/BGr0 +INPUTMC | 1 | 1 | 15 +EQ | 2 | + iobm/BGr1.D = iobm/BGr0; + iobm/BGr1.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 13 | iobm/DTACKrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 14 | 5 | 0 +INPUTS | 1 | nDTACK_IOB +INPUTP | 1 | 127 +EQ | 2 | + iobm/DTACKrf.D = !nDTACK_IOB; + !iobm/DTACKrf.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 12 | iobm/DTACKrr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 14 | 5 | 0 +INPUTS | 1 | nDTACK_IOB +INPUTP | 1 | 127 +EQ | 2 | + iobm/DTACKrr.D = !nDTACK_IOB; + iobm/DTACKrr.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 10 | iobm/Er2 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 5 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 +INPUTS | 1 | iobm/Er +INPUTMC | 1 | 1 | 11 +EQ | 2 | + iobm/Er2.D = iobm/Er; + iobm/Er2.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 0 | 3 | iobm/RESrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 0 +INPUTS | 1 | nRES +INPUTP | 1 | 145 +EQ | 2 | + iobm/RESrf.D = !nRES; + !iobm/RESrf.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 0 | 2 | iobm/RESrr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 0 +INPUTS | 1 | nRES +INPUTP | 1 | 145 +EQ | 2 | + iobm/RESrr.D = !nRES; + iobm/RESrr.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 8 | iobm/VPArf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 5 | 1 +INPUTS | 1 | nVPA_IOB +INPUTP | 1 | 125 +EQ | 2 | + iobm/VPArf.D = !nVPA_IOB; + !iobm/VPArf.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 1 | 7 | iobm/VPArr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 5 | 1 +INPUTS | 1 | nVPA_IOB +INPUTP | 1 | 125 +EQ | 2 | + iobm/VPArr.D = !nVPA_IOB; + iobm/VPArr.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 3 | 2 | iobs/ALE0 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 5 | 14 +INPUTS | 2 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 +INPUTMC | 2 | 7 | 3 | 3 | 12 +EQ | 2 | + iobs/ALE0.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; + iobs/ALE0.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 0 | iobs/Clear1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 5 | 13 | 3 | 17 +INPUTS | 16 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cnt/RefDone | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf +INPUTMC | 12 | 7 | 3 | 3 | 12 | 5 | 13 | 3 | 13 | 4 | 9 | 0 | 17 | 3 | 17 | 6 | 9 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5 +INPUTP | 4 | 36 | 30 | 29 | 54 +EXPORTS | 1 | 3 | 17 +EQ | 8 | + iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1; + iobs/Clear1.CLK = CLK_FSB; // GCK + iobs/Clear1.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 7 | 8 | iobs/IOREQ +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 1 | 9 +INPUTS | 12 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nRAMUWE_OBUF.EXP | EXP34_.EXP +INPUTMC | 9 | 7 | 3 | 3 | 12 | 1 | 6 | 4 | 6 | 5 | 13 | 0 | 5 | 0 | 17 | 7 | 7 | 7 | 9 +INPUTP | 3 | 54 | 36 | 30 +IMPORTS | 2 | 7 | 7 | 7 | 9 +EQ | 30 | + !iobs/IOREQ.D = !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 + # iobs/PS_FSM_FFd1 & iobs/IOACTr + # iobs/Once & !iobs/PS_FSM_FFd2 & nADoutLE1 + # nAS_FSB & !iobs/PS_FSM_FFd2 & !fsb/ASrf & + nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & + !iobs/PS_FSM_FFd2 & nADoutLE1 +;Imported pterms FB8_8 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & + !iobs/PS_FSM_FFd2 & nADoutLE1 +;Imported pterms FB8_10 + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & nWE_FSB & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & + SW<1> & nADoutLE1 + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1; + iobs/IOREQ.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 6 | 17 | ram/RAMDIS1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 7 | 6 | 7 | 5 +INPUTS | 13 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd2 | A_FSB<23> | cnt/RefDone | nAS_FSB | ram/BACTr | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | EXP28_.EXP | EXP31_.EXP +INPUTMC | 11 | 3 | 17 | 6 | 3 | 6 | 9 | 3 | 13 | 0 | 1 | 0 | 5 | 3 | 7 | 3 | 6 | 3 | 3 | 6 | 0 | 6 | 16 +INPUTP | 2 | 36 | 54 +IMPORTS | 2 | 6 | 0 | 6 | 16 +EQ | 40 | + ram/RAMDIS1.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 + # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 + # A_FSB<23> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr + # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf + # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> +;Imported pterms FB7_1 + # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf + # !cnt/RefDone & ram/Once & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & + !fsb/ASrf +;Imported pterms FB7_2 + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> +;Imported pterms FB7_17 + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr; + ram/RAMDIS1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 6 | 14 | ram/RAMReady +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 2 | 3 | 2 | 6 | 2 | 1 | 2 | 9 +INPUTS | 13 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd2 | cnt/RefDone | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<23> | nAS_FSB | ram/RS_FSM_FFd1 | ram/BACTr | fsb/ASrf | CLK20EN_OBUF$BUF0.EXP | EXP30_.EXP +INPUTMC | 11 | 6 | 3 | 6 | 9 | 3 | 13 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 17 | 0 | 1 | 0 | 5 | 6 | 13 | 6 | 15 +INPUTP | 2 | 36 | 54 +IMPORTS | 2 | 6 | 13 | 6 | 15 +EQ | 31 | + !ram/RAMReady.D = ram/RS_FSM_FFd2 + # ram/RS_FSM_FFd3 + # !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # A_FSB<23> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/BACTr + # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & + !ram/BACTr & fsb/ASrf +;Imported pterms FB7_14 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & fsb/ASrf + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/BACTr + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr +;Imported pterms FB7_16 + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf; + ram/RAMReady.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 6 | 5 | RA_0_OBUF +ATTRIBUTES | 264962 | 0 +INPUTS | 3 | A_FSB<10> | ram/RASEL | A_FSB<1> +INPUTMC | 1 | 4 | 17 +INPUTP | 2 | 13 | 149 +EQ | 2 | + RA<0> = A_FSB<10> & !ram/RASEL + # ram/RASEL & A_FSB<1>; + +MACROCELL | 6 | 1 | RA_1_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 6 | 0 +INPUTS | 11 | A_FSB<11> | ram/RASEL | A_FSB<2> | A_FSB<22> | cnt/RefDone | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> +INPUTMC | 8 | 4 | 17 | 3 | 13 | 0 | 17 | 3 | 17 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 +INPUTP | 3 | 15 | 153 | 30 +EXPORTS | 1 | 6 | 0 +EQ | 8 | + RA<1> = A_FSB<11> & !ram/RASEL + # ram/RASEL & A_FSB<2>; + RA_1_OBUF.EXP = A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + +MACROCELL | 4 | 13 | RA_2_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 4 | 12 +INPUTS | 11 | A_FSB<23> | A_FSB<21> | A_FSB<18> | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 | RA_6_OBUF.EXP +INPUTMC | 2 | 0 | 17 | 4 | 14 +INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30 +EXPORTS | 1 | 4 | 12 +IMPORTS | 1 | 4 | 14 +EQ | 9 | + RA<2> = ;Imported pterms FB5_15 + A_FSB<12> & !ram/RASEL + # ram/RASEL & A_FSB<3>; + RA_2_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> + # !A_FSB<23> & A_FSB<21> & nWE_FSB + # !A_FSB<23> & !A_FSB<20> & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 + +MACROCELL | 4 | 10 | RA_3_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 4 | 11 +INPUTS | 5 | A_FSB<13> | ram/RASEL | A_FSB<4> | A_FSB<15> | A_FSB<6> +INPUTMC | 1 | 4 | 17 +INPUTP | 4 | 18 | 157 | 21 | 6 +EXPORTS | 1 | 4 | 11 +EQ | 4 | + RA<3> = A_FSB<13> & !ram/RASEL + # ram/RASEL & A_FSB<4>; + RA_3_OBUF.EXP = A_FSB<15> & !ram/RASEL + # ram/RASEL & A_FSB<6> + +MACROCELL | 4 | 8 | RA_4_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 4 | 7 +INPUTS | 11 | A_FSB<14> | ram/RASEL | A_FSB<5> | A_FSB<23> | A_FSB<20> | iobs/Once | SW<1> | A_FSB<13> | A_FSB<21> | A_FSB<22> | cs/nOverlay1 +INPUTMC | 3 | 4 | 17 | 4 | 6 | 0 | 17 +INPUTP | 8 | 19 | 4 | 36 | 28 | 97 | 18 | 29 | 30 +EXPORTS | 1 | 4 | 7 +EQ | 7 | + RA<4> = A_FSB<14> & !ram/RASEL + # ram/RASEL & A_FSB<5>; + RA_4_OBUF.EXP = !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + !iobs/Once + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & + cs/nOverlay1 + +MACROCELL | 4 | 11 | RA_5_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 4 | 12 +INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> | RA_3_OBUF.EXP +INPUTMC | 1 | 4 | 10 +INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22 +EXPORTS | 1 | 4 | 12 +IMPORTS | 1 | 4 | 10 +EQ | 8 | + RA<5> = ;Imported pterms FB5_11 + A_FSB<15> & !ram/RASEL + # ram/RASEL & A_FSB<6>; + RA_5_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> + +MACROCELL | 4 | 14 | RA_6_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 4 | 13 +INPUTS | 5 | A_FSB<16> | ram/RASEL | A_FSB<7> | A_FSB<12> | A_FSB<3> +INPUTMC | 1 | 4 | 17 +INPUTP | 4 | 22 | 8 | 17 | 155 +EXPORTS | 1 | 4 | 13 +EQ | 4 | + RA<6> = A_FSB<16> & !ram/RASEL + # ram/RASEL & A_FSB<7>; + RA_6_OBUF.EXP = A_FSB<12> & !ram/RASEL + # ram/RASEL & A_FSB<3> + +MACROCELL | 6 | 4 | RA_7_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 6 | 3 +INPUTS | 14 | A_FSB<17> | ram/RASEL | A_FSB<8> | A_FSB<23> | A_FSB<22> | A_FSB<21> | cnt/RefDone | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf +INPUTMC | 9 | 4 | 17 | 3 | 13 | 0 | 17 | 3 | 17 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5 +INPUTP | 5 | 23 | 11 | 36 | 30 | 29 +EXPORTS | 1 | 6 | 3 +EQ | 5 | + RA<7> = A_FSB<8> & ram/RASEL + # A_FSB<17> & !ram/RASEL; + RA_7_OBUF.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf + +MACROCELL | 6 | 7 | RA_8_OBUF +ATTRIBUTES | 264962 | 0 +INPUTS | 7 | A_FSB<23> | A_FSB<18> | ram/RASEL | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | cnt/TimeoutBPre.EXP +INPUTMC | 3 | 4 | 17 | 0 | 17 | 6 | 6 +INPUTP | 4 | 36 | 24 | 30 | 29 +IMPORTS | 1 | 6 | 6 +EQ | 10 | + RA<8> = A_FSB<23> & A_FSB<18> + # A_FSB<18> & !ram/RASEL + # A_FSB<22> & !A_FSB<21> & A_FSB<18> + # A_FSB<22> & A_FSB<18> & cs/nOverlay1 + # !A_FSB<22> & A_FSB<18> & !cs/nOverlay1 +;Imported pterms FB7_7 + # A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + ram/RASEL + # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & ram/RASEL; + +MACROCELL | 6 | 10 | RA_9_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 6 | 9 +INPUTS | 10 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<6> | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21> | CLK25EN_OBUF.EXP +INPUTMC | 6 | 6 | 9 | 6 | 3 | 3 | 6 | 0 | 5 | 0 | 17 | 6 | 11 +INPUTP | 4 | 54 | 36 | 30 | 29 +EXPORTS | 1 | 6 | 9 +IMPORTS | 1 | 6 | 11 +EQ | 13 | + RA<9> = ;Imported pterms FB7_12 + A_FSB<20> & ram/RASEL + # A_FSB<19> & !ram/RASEL; + RA_9_OBUF.EXP = nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<6> & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf + +MACROCELL | 7 | 11 | nBERR_FSB_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 7 | 12 +INPUTS | 14 | nAS_FSB | iobs/BERR | cnt/TimeoutB | fsb/BERR0r | fsb/BERR1r | A_FSB<23> | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<21> | A_FSB<22> | cs/nOverlay1 | EXP35_.EXP +INPUTMC | 6 | 7 | 15 | 6 | 12 | 2 | 11 | 0 | 16 | 0 | 17 | 7 | 10 +INPUTP | 8 | 54 | 36 | 28 | 97 | 19 | 18 | 29 | 30 +EXPORTS | 1 | 7 | 12 +IMPORTS | 1 | 7 | 10 +EQ | 10 | + nBERR_FSB = nAS_FSB + # !iobs/BERR & !cnt/TimeoutB & !fsb/BERR0r & + !fsb/BERR1r +;Imported pterms FB8_11 + # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & + !iobs/BERR & !fsb/BERR0r & !fsb/BERR1r; + nBERR_FSB_OBUF.EXP = !A_FSB<23> & !A_FSB<20> & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 + +MACROCELL | 4 | 5 | nOE_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 4 | 6 +INPUTS | 9 | A_FSB<23> | iobs/Once | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB<20> | ram/nCAS.EXP +INPUTMC | 5 | 4 | 6 | 3 | 12 | 5 | 13 | 0 | 17 | 4 | 4 +INPUTP | 4 | 36 | 30 | 29 | 28 +EXPORTS | 1 | 4 | 6 +IMPORTS | 1 | 4 | 4 +EQ | 8 | + !nOE = ;Imported pterms FB5_5 + nWE_FSB & !nAS_FSB; + nOE_OBUF.EXP = A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1 + # !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once + # !A_FSB<23> & !A_FSB<22> & !iobs/Once & + !cs/nOverlay1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once + +MACROCELL | 2 | 16 | nROMWE_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 2 | 17 +INPUTS | 26 | nWE_FSB | nAS_FSB | A_FSB<14> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | fsb/Ready1r | fsb/VPA | iobs/IOReady | nADoutLE1 | $OpTx$FX_DC$591 | A_FSB<13> | A_FSB<9> | A_FSB<15> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | cnt/TimeoutA | fsb/Ready2r | A_FSB<8> +INPUTMC | 8 | 0 | 17 | 2 | 14 | 2 | 0 | 3 | 16 | 5 | 13 | 0 | 12 | 3 | 15 | 2 | 15 +INPUTP | 18 | 47 | 54 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 18 | 12 | 21 | 17 | 15 | 13 | 36 | 11 +EXPORTS | 1 | 2 | 17 +EQ | 19 | + !nROMWE = !nWE_FSB & !nAS_FSB; + nROMWE_OBUF.EXP = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & + !nADoutLE1 & !$OpTx$FX_DC$591 + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & + !nADoutLE1 & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + +MACROCELL | 3 | 10 | nVPA_FSB_OBUF +ATTRIBUTES | 264962 | 0 +INPUTS | 2 | fsb/VPA | nAS_FSB +INPUTMC | 1 | 2 | 0 +INPUTP | 1 | 54 +EQ | 1 | + !nVPA_FSB = fsb/VPA & !nAS_FSB; + +MACROCELL | 5 | 16 | iobm/nDinLE +ATTRIBUTES | 8684290 | 0 +OUTPUTMC | 1 | 5 | 15 +INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | CLK_IOB | iobm/IOS_FSM_FFd3 | iobm/RESrf | iobm/RESrr +INPUTMC | 5 | 0 | 15 | 5 | 9 | 5 | 2 | 0 | 3 | 0 | 2 +INPUTP | 1 | 35 +EXPORTS | 1 | 5 | 15 +EQ | 4 | + nDinLE.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2; + !nDinLE.CLK = CLK2X_IOB; // GCK + iobm/nDinLE.EXP = CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/RESrf & iobm/RESrr +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 3 | 4 | iobm/nDoutOE +ATTRIBUTES | 8684290 | 0 +INPUTS | 3 | iobs/IORW0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 +INPUTMC | 3 | 7 | 17 | 5 | 2 | 5 | 9 +EQ | 3 | + nDoutOE.D = !iobs/IORW0 + # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2; + nDoutOE.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 5 | 14 | nADoutLE0_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 5 | 15 +INPUTS | 7 | iobm/ALE0 | iobs/ALE0 | CLK_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/DTACKrf | iobm/DTACKrr +INPUTMC | 6 | 5 | 6 | 3 | 2 | 5 | 2 | 0 | 15 | 1 | 13 | 1 | 12 +INPUTP | 1 | 35 +EXPORTS | 1 | 5 | 15 +EQ | 3 | + nADoutLE0 = !iobm/ALE0 & !iobs/ALE0; + nADoutLE0_OBUF.EXP = CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/DTACKrf & iobm/DTACKrr + +MACROCELL | 3 | 5 | nDinOE_OBUF +ATTRIBUTES | 264962 | 0 +INPUTS | 7 | A_FSB<23> | nWE_FSB | nAS_FSB | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> +INPUTP | 7 | 36 | 47 | 54 | 30 | 29 | 28 | 97 +EQ | 5 | + nDinOE = A_FSB<23> & nWE_FSB & !nAS_FSB + # A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & + !nAS_FSB + # A_FSB<22> & !A_FSB<21> & nWE_FSB & !nAS_FSB & + !SW<1>; + +MACROCELL | 7 | 4 | nRAS_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 7 | 3 +INPUTS | 14 | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 | nRAMLWE_OBUF.EXP +INPUTMC | 5 | 7 | 3 | 3 | 12 | 5 | 13 | 0 | 17 | 7 | 5 +INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30 +EXPORTS | 1 | 7 | 3 +IMPORTS | 1 | 7 | 5 +EQ | 16 | + !nRAS = ;Imported pterms FB8_6 + ram/RefRAS + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1; + nRAS_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & + !iobs/PS_FSM_FFd1 & SW<1> & nADoutLE1 + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + +MACROCELL | 4 | 4 | ram/nCAS +ATTRIBUTES | 8684290 | 0 +OUTPUTMC | 1 | 4 | 5 +INPUTS | 3 | ram/RASEL | nWE_FSB | nAS_FSB +INPUTMC | 1 | 4 | 17 +INPUTP | 2 | 47 | 54 +EXPORTS | 1 | 4 | 5 +EQ | 3 | + nCAS.D = !ram/RASEL; + !nCAS.CLK = CLK_FSB; // GCK + ram/nCAS.EXP = nWE_FSB & !nAS_FSB +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0 +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 7 | 0 +INPUTS | 7 | A_FSB<19> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/Once | nADoutLE1 | nWE_FSB | iobs/IORW0 +INPUTMC | 5 | 7 | 3 | 3 | 12 | 4 | 6 | 5 | 13 | 7 | 17 +INPUTP | 2 | 26 | 47 +EXPORTS | 1 | 7 | 0 +EQ | 5 | + RA<11> = A_FSB<19>; + A_FSB_19_IBUF$BUF0.EXP = iobs/PS_FSM_FFd2 + # iobs/PS_FSM_FFd1 + # iobs/Once & nADoutLE1 + # nWE_FSB & iobs/IORW0 & nADoutLE1 + +MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0 +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 6 | 9 +INPUTS | 9 | A_FSB<21> | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | ram/BACTr | cnt/RefCnt<6> | nAS_FSB | fsb/ASrf | cnt/RefCnt<7> +INPUTMC | 7 | 6 | 9 | 6 | 3 | 3 | 7 | 0 | 1 | 3 | 6 | 0 | 5 | 3 | 3 +INPUTP | 2 | 29 | 54 +EXPORTS | 1 | 6 | 9 +EQ | 9 | + RA<10> = A_FSB<21>; + A_FSB_21_IBUF$BUF0.EXP = !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<5> & ram/BACTr + # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<6> & ram/BACTr + # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<5> & !fsb/ASrf + # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !cnt/RefCnt<7> & !fsb/ASrf + +MACROCELL | 6 | 13 | CLK20EN_OBUF$BUF0 +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 6 | 14 +INPUTS | 11 | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | fsb/ASrf | A_FSB<21> | cnt/RefDone | ram/BACTr | cnt/TimeoutB.EXP +INPUTMC | 7 | 4 | 9 | 0 | 17 | 3 | 17 | 0 | 5 | 3 | 13 | 0 | 1 | 6 | 12 +INPUTP | 4 | 36 | 30 | 54 | 29 +EXPORTS | 1 | 6 | 14 +IMPORTS | 1 | 6 | 12 +EQ | 12 | + CLK20EN = ;Imported pterms FB7_13 + SW<0>; + CLK20EN_OBUF$BUF0.EXP = !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & fsb/ASrf + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/BACTr + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr + +MACROCELL | 6 | 11 | CLK25EN_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 6 | 10 +INPUTS | 4 | SW<0> | A_FSB<20> | ram/RASEL | A_FSB<19> +INPUTMC | 1 | 4 | 17 +INPUTP | 3 | 98 | 28 | 26 +EXPORTS | 1 | 6 | 10 +EQ | 3 | + CLK25EN = !SW<0>; + CLK25EN_OBUF.EXP = A_FSB<20> & ram/RASEL + # A_FSB<19> & !ram/RASEL + +MACROCELL | 7 | 14 | Park +ATTRIBUTES | 8815430 | 0 +OUTPUTMC | 6 | 2 | 0 | 2 | 5 | 2 | 3 | 2 | 10 | 2 | 11 | 7 | 13 +INPUTS | 12 | RESr0 | RESr1 | IPL2r0 | RESr2 | RESDone | IPL2r1 | A_FSB<23> | A_FSB<21> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> +INPUTMC | 6 | 0 | 9 | 0 | 8 | 0 | 11 | 0 | 7 | 7 | 6 | 0 | 10 +INPUTP | 6 | 36 | 29 | 26 | 24 | 23 | 22 +EXPORTS | 1 | 7 | 13 +EQ | 8 | + nBR_IOB.D = Gnd; + nBR_IOB.CLK = CLK_FSB; // GCK + nBR_IOB.CE = RESr0 & RESr1 & IPL2r0 & RESr2 & !RESDone & + IPL2r1; + Park.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 5 | 13 | nADoutLE1_OBUF +ATTRIBUTES | 8815366 | 0 +OUTPUTMC | 24 | 4 | 6 | 7 | 15 | 7 | 17 | 2 | 12 | 5 | 13 | 4 | 3 | 7 | 13 | 3 | 16 | 3 | 14 | 2 | 7 | 7 | 3 | 4 | 12 | 3 | 0 | 7 | 8 | 2 | 9 | 2 | 16 | 4 | 5 | 7 | 0 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 +INPUTS | 3 | iobs/Clear1 | nADoutLE1 | iobs/Load1 +INPUTMC | 3 | 3 | 0 | 5 | 13 | 4 | 12 +EQ | 3 | + !nADoutLE1.D = iobs/Load1 + # !iobs/Clear1 & !nADoutLE1; + nADoutLE1.CLK = CLK_FSB; // GCK +GLOBALS | 1 | 2 | CLK_FSB + +MACROCELL | 3 | 1 | nAoutOE_OBUF +ATTRIBUTES | 8815366 | 0 +OUTPUTMC | 8 | 5 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 5 | 15 | 5 | 6 | 3 | 1 +INPUTS | 4 | iobm/BGr1 | nAoutOE | iobm/BGr0 | nAS_IOB +INPUTMC | 4 | 1 | 14 | 3 | 1 | 1 | 15 | 5 | 11 +EQ | 4 | + nAoutOE.D = !iobm/BGr0 & !iobm/BGr1 + # !iobm/BGr1 & nAoutOE + # !nAS_IOB & !iobm/BGr0 & !nAoutOE; + nAoutOE.CLK = CLK2X_IOB; // GCK +GLOBALS | 1 | 2 | CLK2X_IOB + +MACROCELL | 7 | 5 | nRAMLWE_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 7 | 4 +INPUTS | 10 | nWE_FSB | nLDS_FSB | ram/RAMDIS2 | nAS_FSB | ram/RAMDIS1 | ram/RefRAS | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21> +INPUTMC | 4 | 4 | 2 | 6 | 17 | 0 | 0 | 0 | 17 +INPUTP | 6 | 47 | 49 | 54 | 36 | 30 | 29 +EXPORTS | 1 | 7 | 4 +EQ | 7 | + !nRAMLWE = !nWE_FSB & !nLDS_FSB & !ram/RAMDIS2 & !nAS_FSB & + !ram/RAMDIS1; + nRAMLWE_OBUF.EXP = ram/RefRAS + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1 + +MACROCELL | 7 | 7 | nRAMUWE_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 7 | 8 +INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | nADoutLE1 | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> | RESDone.EXP +INPUTMC | 3 | 7 | 3 | 5 | 13 | 7 | 6 +INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22 +EXPORTS | 1 | 7 | 8 +IMPORTS | 1 | 7 | 6 +EQ | 13 | + !nRAMUWE = ;Imported pterms FB8_7 + !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & + !ram/RAMDIS1; + nRAMUWE_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + +MACROCELL | 4 | 1 | nROMCS_OBUF +ATTRIBUTES | 264962 | 0 +OUTPUTMC | 1 | 4 | 2 +INPUTS | 16 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | cs/nOverlay1 | cnt/RefDone | ram/Once | ram/RAMDIS2 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf +INPUTMC | 10 | 0 | 17 | 3 | 13 | 4 | 9 | 4 | 2 | 6 | 9 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5 +INPUTP | 6 | 36 | 30 | 29 | 28 | 97 | 54 +EXPORTS | 1 | 4 | 2 +EQ | 14 | + !nROMCS = A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & + !SW<1> + # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & + SW<1> + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & + !cs/nOverlay1; + nROMCS_OBUF.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & + fsb/ASrf + +MACROCELL | 0 | 12 | $OpTx$FX_DC$591 +ATTRIBUTES | 133888 | 0 +OUTPUTMC | 6 | 2 | 0 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 16 | 2 | 17 +INPUTS | 2 | nAS_FSB | fsb/ASrf +INPUTMC | 1 | 0 | 5 +INPUTP | 1 | 54 +EQ | 1 | + $OpTx$FX_DC$591 = nAS_FSB & !fsb/ASrf; + +MACROCELL | 2 | 1 | EXP14_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 0 +INPUTS | 20 | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | fsb/Ready0r | fsb/VPA | ram/RAMReady | $OpTx$FX_DC$591 | A_FSB<21> | fsb/Ready1r | iobs/IOReady | SW<1> | A_FSB<14> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | A_FSB<13> | EXP15_.EXP +INPUTMC | 8 | 0 | 17 | 2 | 3 | 2 | 0 | 6 | 14 | 0 | 12 | 2 | 14 | 3 | 16 | 2 | 2 +INPUTP | 12 | 36 | 30 | 29 | 97 | 19 | 28 | 26 | 24 | 23 | 22 | 47 | 18 +EXPORTS | 1 | 2 | 0 +IMPORTS | 1 | 2 | 2 +EQ | 57 | + EXP14_.EXP = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !fsb/Ready0r & fsb/VPA & !ram/RAMReady & !$OpTx$FX_DC$591 + # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA & + !iobs/IOReady & !SW<1> & !$OpTx$FX_DC$591 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !ram/RAMReady & + !$OpTx$FX_DC$591 + # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591 + # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591 +;Imported pterms FB3_3 + # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 +;Imported pterms FB3_4 + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB & + !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB & + !$OpTx$FX_DC$591 + +MACROCELL | 2 | 2 | EXP15_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 1 +INPUTS | 23 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | fsb/VPA | $OpTx$FX_DC$591 | A_FSB<8> | fsb/Ready0r.EXP +INPUTMC | 6 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 0 | 0 | 12 | 2 | 3 +INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11 +EXPORTS | 1 | 2 | 1 +IMPORTS | 1 | 2 | 3 +EQ | 43 | + EXP15_.EXP = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 +;Imported pterms FB3_4 + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB & + !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB & + !$OpTx$FX_DC$591 + +MACROCELL | 2 | 4 | EXP16_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 3 +INPUTS | 2 | nAS_FSB | fsb/ASrf +INPUTMC | 1 | 0 | 5 +INPUTP | 1 | 54 +EXPORTS | 1 | 2 | 3 +EQ | 1 | + EXP16_.EXP = nAS_FSB & !fsb/ASrf + +MACROCELL | 2 | 5 | EXP17_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 6 +INPUTS | 24 | nAS_FSB | fsb/ASrf | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/BERR | cnt/TimeoutB | fsb/BERR0r | fsb/BERR1r | iobs/IOReady | nBR_IOB +INPUTMC | 7 | 0 | 5 | 7 | 15 | 6 | 12 | 2 | 11 | 0 | 16 | 3 | 16 | 7 | 14 +INPUTP | 17 | 54 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 +EXPORTS | 1 | 2 | 6 +EQ | 6 | + EXP17_.EXP = nAS_FSB & !fsb/ASrf + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB + +MACROCELL | 2 | 6 | EXP18_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 7 +INPUTS | 11 | A_FSB<23> | cnt/TimeoutB | nDTACK_FSB | A_FSB<22> | A_FSB<20> | fsb/Ready1r | iobs/IOReady | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | EXP17_.EXP +INPUTMC | 8 | 6 | 12 | 2 | 8 | 2 | 14 | 3 | 16 | 0 | 17 | 2 | 3 | 6 | 14 | 2 | 5 +INPUTP | 3 | 36 | 30 | 28 +EXPORTS | 1 | 2 | 7 +IMPORTS | 1 | 2 | 5 +EQ | 14 | + EXP18_.EXP = A_FSB<23> & cnt/TimeoutB & nDTACK_FSB + # !A_FSB<22> & cnt/TimeoutB & nDTACK_FSB + # !A_FSB<20> & cnt/TimeoutB & nDTACK_FSB + # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & + nDTACK_FSB + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady +;Imported pterms FB3_6 + # nAS_FSB & !fsb/ASrf + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB + +MACROCELL | 2 | 7 | EXP19_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 8 +INPUTS | 24 | A_FSB<14> | A_FSB<22> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | A_FSB<21> | nADoutLE1 | A_FSB<8> | A_FSB<15> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | cnt/TimeoutA | fsb/Ready2r | EXP18_.EXP +INPUTMC | 8 | 0 | 17 | 2 | 14 | 3 | 16 | 2 | 8 | 5 | 13 | 3 | 15 | 2 | 15 | 2 | 6 +INPUTP | 16 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 29 | 11 | 21 | 18 | 17 | 15 | 13 | 36 +EXPORTS | 1 | 2 | 8 +IMPORTS | 1 | 2 | 6 +EQ | 37 | + EXP19_.EXP = A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB + # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & + !nADoutLE1 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB + # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & + !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & nDTACK_FSB +;Imported pterms FB3_7 + # A_FSB<23> & cnt/TimeoutB & nDTACK_FSB + # !A_FSB<22> & cnt/TimeoutB & nDTACK_FSB + # !A_FSB<20> & cnt/TimeoutB & nDTACK_FSB + # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & + nDTACK_FSB + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady +;Imported pterms FB3_6 + # nAS_FSB & !fsb/ASrf + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB + +MACROCELL | 2 | 9 | EXP20_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 8 +INPUTS | 19 | A_FSB<22> | A_FSB<21> | A_FSB<20> | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | SW<1> | A_FSB<23> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | A_FSB<13> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | nADoutLE1 | EXP21_.EXP +INPUTMC | 8 | 2 | 14 | 3 | 16 | 2 | 8 | 0 | 17 | 2 | 3 | 6 | 14 | 5 | 13 | 2 | 10 +INPUTP | 11 | 30 | 29 | 28 | 97 | 36 | 18 | 26 | 24 | 23 | 22 | 47 +EXPORTS | 1 | 2 | 8 +IMPORTS | 1 | 2 | 10 +EQ | 25 | + EXP20_.EXP = A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & + !iobs/IOReady & nDTACK_FSB + # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & + !iobs/IOReady & nDTACK_FSB & !SW<1> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + !cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady + # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & + !nADoutLE1 +;Imported pterms FB3_11 + # iobs/BERR & nDTACK_FSB + # fsb/BERR0r & nDTACK_FSB + # fsb/BERR1r & nDTACK_FSB + # nDTACK_FSB & !nBR_IOB + # A_FSB<21> & cnt/TimeoutB & nDTACK_FSB +;Imported pterms FB3_12 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB + +MACROCELL | 2 | 10 | EXP21_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 9 +INPUTS | 8 | iobs/BERR | nDTACK_FSB | fsb/BERR0r | fsb/BERR1r | nBR_IOB | A_FSB<21> | cnt/TimeoutB | fsb/BERR0r.EXP +INPUTMC | 7 | 7 | 15 | 2 | 8 | 2 | 11 | 0 | 16 | 7 | 14 | 6 | 12 | 2 | 11 +INPUTP | 1 | 29 +EXPORTS | 1 | 2 | 9 +IMPORTS | 1 | 2 | 11 +EQ | 11 | + EXP21_.EXP = iobs/BERR & nDTACK_FSB + # fsb/BERR0r & nDTACK_FSB + # fsb/BERR1r & nDTACK_FSB + # nDTACK_FSB & !nBR_IOB + # A_FSB<21> & cnt/TimeoutB & nDTACK_FSB +;Imported pterms FB3_12 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB & + !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB + +MACROCELL | 2 | 13 | EXP22_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 14 +INPUTS | 16 | A_FSB<23> | fsb/Ready1r | iobs/IOReady | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | A_FSB<13> | cs/nOverlay0.EXP +INPUTMC | 4 | 2 | 14 | 3 | 16 | 0 | 17 | 2 | 12 +INPUTP | 12 | 36 | 30 | 29 | 28 | 97 | 19 | 26 | 24 | 23 | 22 | 47 | 18 +EXPORTS | 1 | 2 | 14 +IMPORTS | 1 | 2 | 12 +EQ | 18 | + EXP22_.EXP = A_FSB<23> & !fsb/Ready1r & !iobs/IOReady + # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & + !iobs/IOReady + # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & + !iobs/IOReady & !SW<1> + # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady + # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & + !fsb/Ready1r & !iobs/IOReady +;Imported pterms FB3_13 + # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 + +MACROCELL | 2 | 17 | EXP23_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 0 +INPUTS | 10 | A_FSB<23> | cnt/TimeoutB | fsb/VPA | $OpTx$FX_DC$591 | A_FSB<22> | A_FSB<21> | fsb/Ready1r | iobs/IOReady | A_FSB<20> | nROMWE_OBUF.EXP +INPUTMC | 6 | 6 | 12 | 2 | 0 | 0 | 12 | 2 | 14 | 3 | 16 | 2 | 16 +INPUTP | 4 | 36 | 30 | 29 | 28 +EXPORTS | 1 | 2 | 0 +IMPORTS | 1 | 2 | 16 +EQ | 29 | + EXP23_.EXP = A_FSB<23> & cnt/TimeoutB & fsb/VPA & + !$OpTx$FX_DC$591 + # !A_FSB<22> & cnt/TimeoutB & fsb/VPA & + !$OpTx$FX_DC$591 + # A_FSB<21> & cnt/TimeoutB & fsb/VPA & + !$OpTx$FX_DC$591 + # A_FSB<23> & !fsb/Ready1r & fsb/VPA & + !iobs/IOReady & !$OpTx$FX_DC$591 + # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & + fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591 +;Imported pterms FB3_17 + # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & + !nADoutLE1 & !$OpTx$FX_DC$591 + # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & + A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & + cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & + !nADoutLE1 & !$OpTx$FX_DC$591 + # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & + A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & + A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & + A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA & + !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591 + +MACROCELL | 4 | 0 | EXP24_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 4 | 17 +INPUTS | 12 | A_FSB<22> | cnt/RefDone | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/BACTr | fsb/ASrf | A_FSB<21> | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> +INPUTMC | 9 | 3 | 13 | 0 | 17 | 3 | 17 | 6 | 9 | 0 | 1 | 0 | 5 | 3 | 7 | 3 | 6 | 3 | 3 +INPUTP | 3 | 30 | 54 | 29 +EXPORTS | 1 | 4 | 17 +EQ | 11 | + EXP24_.EXP = A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + +MACROCELL | 4 | 7 | EXP25_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 4 | 6 +INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<19> | iobs/Once | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | RA_4_OBUF.EXP +INPUTMC | 2 | 4 | 6 | 4 | 8 +INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 47 +EXPORTS | 1 | 4 | 6 +IMPORTS | 1 | 4 | 8 +EQ | 11 | + EXP25_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once + # !A_FSB<23> & A_FSB<21> & nWE_FSB & !iobs/Once +;Imported pterms FB5_9 + # !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + !iobs/Once + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & + cs/nOverlay1 + +MACROCELL | 4 | 15 | EXP26_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 4 | 16 +INPUTS | 13 | A_FSB<23> | A_FSB<22> | A_FSB<21> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | fsb/ASrf | cnt/RefDone | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> +INPUTMC | 9 | 4 | 9 | 0 | 17 | 3 | 17 | 6 | 9 | 0 | 5 | 3 | 13 | 3 | 7 | 3 | 6 | 3 | 3 +INPUTP | 4 | 36 | 30 | 29 | 54 +EXPORTS | 1 | 4 | 16 +EQ | 10 | + EXP26_.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + +MACROCELL | 4 | 16 | EXP27_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 4 | 17 +INPUTS | 15 | A_FSB<23> | cnt/RefDone | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | fsb/ASrf | A_FSB<21> | ram/BACTr | EXP26_.EXP +INPUTMC | 11 | 3 | 13 | 3 | 17 | 6 | 9 | 3 | 7 | 3 | 6 | 3 | 3 | 4 | 9 | 0 | 17 | 0 | 5 | 0 | 1 | 4 | 15 +INPUTP | 4 | 36 | 30 | 54 | 29 +EXPORTS | 1 | 4 | 17 +IMPORTS | 1 | 4 | 15 +EQ | 21 | + EXP27_.EXP = A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 + # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf +;Imported pterms FB5_16 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + +MACROCELL | 6 | 0 | EXP28_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 6 | 17 +INPUTS | 15 | A_FSB<23> | cnt/RefDone | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<22> | cs/nOverlay1 | ram/BACTr | fsb/ASrf | ram/Once | A_FSB<21> | nAS_FSB | RA_1_OBUF.EXP +INPUTMC | 11 | 3 | 13 | 3 | 17 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 17 | 0 | 1 | 0 | 5 | 4 | 9 | 6 | 1 +INPUTP | 4 | 36 | 30 | 29 | 54 +EXPORTS | 1 | 6 | 17 +IMPORTS | 1 | 6 | 1 +EQ | 19 | + EXP28_.EXP = A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf + # !cnt/RefDone & ram/Once & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & + !fsb/ASrf +;Imported pterms FB7_2 + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + +MACROCELL | 6 | 2 | EXP29_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 6 | 3 +INPUTS | 13 | cnt/RefDone | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21> +INPUTMC | 9 | 3 | 13 | 3 | 17 | 6 | 9 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5 | 0 | 17 +INPUTP | 4 | 54 | 36 | 30 | 29 +EXPORTS | 1 | 6 | 3 +EQ | 15 | + EXP29_.EXP = !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd1 & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & + cnt/RefCnt<7> + # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & + fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & + cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & + cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & + cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> + +MACROCELL | 6 | 15 | EXP30_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 6 | 14 +INPUTS | 10 | A_FSB<22> | A_FSB<21> | cnt/RefDone | ram/RS_FSM_FFd1 | ram/BACTr | fsb/ASrf | cs/nOverlay1 | A_FSB<23> | ram/Once | nAS_FSB +INPUTMC | 6 | 3 | 13 | 3 | 17 | 0 | 1 | 0 | 5 | 0 | 17 | 4 | 9 +INPUTP | 4 | 30 | 29 | 36 | 54 +EXPORTS | 1 | 6 | 14 +EQ | 10 | + EXP30_.EXP = A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & + !cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf + +MACROCELL | 6 | 16 | EXP31_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 6 | 17 +INPUTS | 9 | A_FSB<22> | A_FSB<21> | cnt/RefDone | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | ram/BACTr | fsb/ASrf | cs/nOverlay1 +INPUTMC | 6 | 3 | 13 | 3 | 17 | 6 | 3 | 0 | 1 | 0 | 5 | 0 | 17 +INPUTP | 3 | 30 | 29 | 54 +EXPORTS | 1 | 6 | 17 +EQ | 10 | + EXP31_.EXP = A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr + # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr + # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf + # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & + !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr + +MACROCELL | 7 | 0 | EXP32_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 7 | 17 +INPUTS | 9 | iobs/IORW0 | iobs/IORW1 | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB_19_IBUF$BUF0.EXP +INPUTMC | 5 | 7 | 17 | 7 | 13 | 5 | 13 | 0 | 5 | 7 | 1 +INPUTP | 4 | 54 | 36 | 30 | 29 +EXPORTS | 1 | 7 | 17 +IMPORTS | 1 | 7 | 1 +EQ | 10 | + EXP32_.EXP = iobs/IORW0 & iobs/IORW1 & !nADoutLE1 + # !iobs/IORW0 & !iobs/IORW1 & !nADoutLE1 + # nAS_FSB & !fsb/ASrf & nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !iobs/IORW0 & nADoutLE1 +;Imported pterms FB8_2 + # iobs/PS_FSM_FFd2 + # iobs/PS_FSM_FFd1 + # iobs/Once & nADoutLE1 + # nWE_FSB & iobs/IORW0 & nADoutLE1 + +MACROCELL | 7 | 2 | EXP33_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 7 | 3 +INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> +INPUTMC | 3 | 7 | 3 | 3 | 12 | 5 | 13 +INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22 +EXPORTS | 1 | 7 | 3 +EQ | 10 | + EXP33_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + +MACROCELL | 7 | 9 | EXP34_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 7 | 8 +INPUTS | 12 | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | nADoutLE1 | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 +INPUTMC | 3 | 7 | 3 | 5 | 13 | 0 | 17 +INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30 +EXPORTS | 1 | 7 | 8 +EQ | 10 | + EXP34_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & nWE_FSB & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & + SW<1> & nADoutLE1 + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & + !iobs/PS_FSM_FFd2 & nADoutLE1 + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1 + +MACROCELL | 7 | 10 | EXP35_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 7 | 11 +INPUTS | 7 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | iobs/BERR | fsb/BERR0r | fsb/BERR1r +INPUTMC | 3 | 7 | 15 | 2 | 11 | 0 | 16 +INPUTP | 4 | 36 | 30 | 29 | 28 +EXPORTS | 1 | 7 | 11 +EQ | 2 | + EXP35_.EXP = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & + !iobs/BERR & !fsb/BERR0r & !fsb/BERR1r + +MACROCELL | 7 | 12 | EXP36_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 7 | 13 +INPUTS | 10 | nAS_FSB | fsb/ASrf | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB<20> | nBERR_FSB_OBUF.EXP +INPUTMC | 5 | 0 | 5 | 7 | 3 | 3 | 12 | 0 | 17 | 7 | 11 +INPUTP | 5 | 54 | 36 | 30 | 29 | 28 +EXPORTS | 1 | 7 | 13 +IMPORTS | 1 | 7 | 11 +EQ | 10 | + EXP36_.EXP = nAS_FSB & !fsb/ASrf + # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<20> +;Imported pterms FB8_12 + # !A_FSB<23> & !A_FSB<20> & SW<1> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> + # !A_FSB<23> & A_FSB<22> & A_FSB<21> & + cs/nOverlay1 + +MACROCELL | 7 | 16 | EXP37_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 7 | 17 +INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<19> | nADoutLE1 | A_FSB<18> | A_FSB<17> | A_FSB<16> | A_FSB<20> | SW<1> +INPUTMC | 1 | 5 | 13 +INPUTP | 8 | 36 | 29 | 26 | 24 | 23 | 22 | 28 | 97 +EXPORTS | 1 | 7 | 17 +EQ | 5 | + EXP37_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1 + # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1 + # !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1 + +PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 8 | 2 | 15 | 6 | 6 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 11 | 2 | 16 +PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 10 | 2 | 15 | 6 | 4 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16 +PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 10 | 2 | 15 | 4 | 10 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16 +PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 18 | 2 | 16 | 7 | 17 | 2 | 13 | 2 | 15 | 4 | 8 | 7 | 11 | 2 | 8 | 4 | 13 | 2 | 14 | 7 | 4 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 12 | 7 | 9 +PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 20 | 2 | 16 | 7 | 17 | 2 | 13 | 2 | 15 | 4 | 10 | 7 | 11 | 2 | 8 | 4 | 13 | 4 | 8 | 7 | 4 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 9 +PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 10 | 2 | 15 | 2 | 16 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 4 | 14 +PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 10 | 2 | 15 | 6 | 1 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16 +PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 10 | 2 | 15 | 6 | 5 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16 +PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 58 | 4 | 9 | 4 | 6 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 13 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 17 | 6 | 6 | 6 | 3 | 7 | 3 | 4 | 12 | 7 | 8 | 6 | 17 | 6 | 14 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 1 | 2 | 2 | 2 | 5 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 14 | 2 | 16 | 2 | 17 | 3 | 0 | 3 | 16 | 4 | 5 | 4 | 7 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 2 | 6 | 4 | 6 | 10 | 6 | 13 | 6 | 15 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16 +PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 54 | 4 | 9 | 4 | 6 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 12 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 16 | 6 | 6 | 6 | 3 | 7 | 3 | 4 | 12 | 7 | 8 | 6 | 16 | 6 | 13 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 1 | 2 | 2 | 2 | 5 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 14 | 2 | 16 | 2 | 17 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 5 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 15 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 10 | 6 | 15 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11 +PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 51 | 4 | 9 | 4 | 5 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 13 | 4 | 0 | 2 | 8 | 3 | 0 | 4 | 16 | 6 | 6 | 6 | 3 | 7 | 2 | 4 | 11 | 7 | 7 | 6 | 16 | 6 | 13 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 0 | 6 | 8 | 2 | 1 | 2 | 2 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 10 | 2 | 14 | 2 | 16 | 2 | 17 | 4 | 7 | 4 | 8 | 4 | 13 | 4 | 15 | 6 | 0 | 6 | 2 | 6 | 4 | 6 | 10 | 6 | 15 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16 +PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 32 | 4 | 5 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 13 | 2 | 15 | 2 | 0 | 7 | 12 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 4 | 13 | 7 | 10 | 3 | 5 | 4 | 1 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 14 | 2 | 16 | 2 | 17 | 4 | 8 | 6 | 11 | 7 | 4 | 7 | 9 | 7 | 11 | 7 | 16 +PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 21 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 7 | 1 | 6 | 11 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 4 | 7 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14 +PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 20 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 6 | 7 | 7 | 9 | 2 | 8 | 4 | 13 | 4 | 7 | 7 | 4 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14 +PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 20 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 6 | 4 | 4 | 7 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14 +PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 20 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 4 | 14 | 4 | 7 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14 +PIN | CLK2X_IOB | 4096 | 0 | N/A | 33 | 31 | 5 | 1 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 17 | 1 | 15 | 5 | 0 | 5 | 15 | 5 | 6 | 1 | 16 | 1 | 14 | 1 | 12 | 1 | 10 | 0 | 2 | 1 | 7 | 3 | 4 | 3 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 1 | 9 | 0 | 4 | 1 | 13 | 0 | 3 | 1 | 8 | 5 | 16 +PIN | nWE_FSB | 64 | 0 | N/A | 47 | 22 | 2 | 14 | 7 | 17 | 2 | 13 | 2 | 15 | 7 | 6 | 7 | 13 | 2 | 8 | 7 | 1 | 4 | 7 | 7 | 4 | 4 | 4 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 7 | 2 | 9 | 2 | 12 | 4 | 13 | 7 | 9 +PIN | CLK_FSB | 16384 | 0 | N/A | 42 | 57 | 3 | 13 | 4 | 9 | 4 | 6 | 0 | 17 | 7 | 15 | 7 | 17 | 2 | 12 | 3 | 15 | 6 | 12 | 6 | 6 | 2 | 11 | 0 | 16 | 2 | 3 | 2 | 14 | 2 | 15 | 2 | 0 | 4 | 3 | 0 | 14 | 7 | 13 | 3 | 16 | 3 | 14 | 0 | 13 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 7 | 3 | 3 | 7 | 3 | 6 | 3 | 12 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 1 | 6 | 3 | 11 | 3 | 8 | 4 | 12 | 0 | 1 | 0 | 9 | 0 | 8 | 0 | 11 | 0 | 7 | 0 | 0 | 7 | 6 | 0 | 10 | 3 | 2 | 3 | 0 | 7 | 8 | 6 | 17 | 6 | 14 | 7 | 14 | 5 | 13 | 0 | 5 | 4 | 4 +PIN | nAS_FSB | 64 | 0 | N/A | 54 | 48 | 4 | 9 | 4 | 6 | 0 | 17 | 7 | 15 | 6 | 16 | 2 | 12 | 3 | 15 | 6 | 12 | 6 | 6 | 2 | 11 | 0 | 16 | 0 | 12 | 2 | 14 | 2 | 4 | 7 | 12 | 3 | 16 | 4 | 2 | 2 | 5 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 7 | 3 | 4 | 12 | 0 | 1 | 0 | 5 | 7 | 8 | 6 | 17 | 6 | 14 | 7 | 11 | 4 | 4 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 0 | 7 | 5 | 7 | 6 | 3 | 0 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 2 | 6 | 8 | 6 | 10 | 6 | 13 | 6 | 15 +PIN | SW<1> | 64 | 0 | N/A | 97 | 11 | 2 | 9 | 7 | 16 | 2 | 13 | 4 | 1 | 7 | 11 | 2 | 1 | 4 | 13 | 4 | 8 | 7 | 4 | 3 | 5 | 7 | 9 +PIN | nRES | 64 | 0 | N/A | 145 | 4 | 2 | 12 | 0 | 9 | 0 | 3 | 0 | 2 +PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 4 | 3 | 0 | 14 | 7 | 5 +PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 3 | 14 | 0 | 13 | 7 | 6 +PIN | CLK_IOB | 8256 | 0 | N/A | 35 | 8 | 5 | 2 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 0 | 5 | 14 | 5 | 16 | 1 | 11 +PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 4 | 5 | 17 | 0 | 4 | 1 | 16 | 5 | 0 +PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 0 | 11 +PIN | nBG_IOB | 64 | 0 | N/A | 117 | 1 | 1 | 15 +PIN | E_IOB | 64 | 0 | N/A | 37 | 1 | 1 | 11 +PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 1 | 13 | 1 | 12 +PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 8 | 1 | 7 +PIN | A_FSB<1> | 64 | 0 | N/A | 149 | 1 | 6 | 5 +PIN | A_FSB<2> | 64 | 0 | N/A | 153 | 1 | 6 | 1 +PIN | A_FSB<3> | 64 | 0 | N/A | 155 | 1 | 4 | 14 +PIN | A_FSB<4> | 64 | 0 | N/A | 157 | 1 | 4 | 10 +PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 8 +PIN | A_FSB<6> | 64 | 0 | N/A | 6 | 1 | 4 | 10 +PIN | A_FSB<7> | 64 | 0 | N/A | 8 | 1 | 4 | 14 +PIN | SW<0> | 64 | 0 | N/A | 98 | 2 | 6 | 12 | 6 | 11 +PIN | nVMA_IOB | 536871040 | 0 | N/A | 118 +PIN | nAS_IOB | 536871040 | 0 | N/A | 135 +PIN | nLDS_IOB | 536871040 | 0 | N/A | 130 +PIN | nUDS_IOB | 536871040 | 0 | N/A | 134 +PIN | nDTACK_FSB | 536871040 | 0 | N/A | 44 +PIN | RA<0> | 536871040 | 0 | N/A | 86 +PIN | RA<1> | 536871040 | 0 | N/A | 79 +PIN | RA<2> | 536871040 | 0 | N/A | 69 +PIN | RA<3> | 536871040 | 0 | N/A | 64 +PIN | RA<4> | 536871040 | 0 | N/A | 63 +PIN | RA<5> | 536871040 | 0 | N/A | 68 +PIN | RA<6> | 536871040 | 0 | N/A | 72 +PIN | RA<7> | 536871040 | 0 | N/A | 82 +PIN | RA<8> | 536871040 | 0 | N/A | 88 +PIN | RA<9> | 536871040 | 0 | N/A | 92 +PIN | nBERR_FSB | 536871040 | 0 | N/A | 112 +PIN | nOE | 536871040 | 0 | N/A | 60 +PIN | nROMWE | 536871040 | 0 | N/A | 57 +PIN | nVPA_FSB | 536871040 | 0 | N/A | 147 +PIN | nDinLE | 536871040 | 0 | N/A | 140 +PIN | nDoutOE | 536871040 | 0 | N/A | 143 +PIN | nADoutLE0 | 536871040 | 0 | N/A | 139 +PIN | nDinOE | 536871040 | 0 | N/A | 144 +PIN | nRAS | 536871040 | 0 | N/A | 103 +PIN | nCAS | 536871040 | 0 | N/A | 59 +PIN | RA<11> | 536871040 | 0 | N/A | 102 +PIN | RA<10> | 536871040 | 0 | N/A | 90 +PIN | CLK20EN | 536871040 | 0 | N/A | 96 +PIN | CLK25EN | 536871040 | 0 | N/A | 95 +PIN | nBR_IOB | 536871040 | 0 | N/A | 116 +PIN | nADoutLE1 | 536871040 | 0 | N/A | 136 +PIN | nAoutOE | 536871040 | 0 | N/A | 141 +PIN | nRAMLWE | 536871040 | 0 | N/A | 104 +PIN | nRAMUWE | 536871040 | 0 | N/A | 105 +PIN | nROMCS | 536871040 | 0 | N/A | 58 diff --git a/cpld/XC95144XL/WarpSE.mod b/cpld/XC95144XL/WarpSE.mod new file mode 100644 index 0000000..868140c --- /dev/null +++ b/cpld/XC95144XL/WarpSE.mod @@ -0,0 +1,233 @@ +MODEL +MODEL_VERSION "v1998.8"; +DESIGN "WarpSE"; + +/* port names and type */ +INPUT S:PIN7 = A_FSB<9>; +INPUT S:PIN6 = A_FSB<8>; +INPUT S:PIN13 = A_FSB<15>; +INPUT S:PIN12 = A_FSB<14>; +INPUT S:PIN11 = A_FSB<13>; +INPUT S:PIN10 = A_FSB<12>; +INPUT S:PIN9 = A_FSB<11>; +INPUT S:PIN8 = A_FSB<10>; +INPUT S:PIN24 = A_FSB<23>; +INPUT S:PIN20 = A_FSB<22>; +INPUT S:PIN19 = A_FSB<21>; +INPUT S:PIN18 = A_FSB<20>; +INPUT S:PIN17 = A_FSB<19>; +INPUT S:PIN16 = A_FSB<18>; +INPUT S:PIN15 = A_FSB<17>; +INPUT S:PIN14 = A_FSB<16>; +INPUT S:PIN22 = CLK2X_IOB; +INPUT S:PIN27 = CLK_FSB; +INPUT S:PIN32 = nAS_FSB; +INPUT S:PIN29 = nWE_FSB; +INPUT S:PIN60 = SW<1>; +INPUT S:PIN91 = nRES; +INPUT S:PIN30 = nLDS_FSB; +INPUT S:PIN33 = nUDS_FSB; +INPUT S:PIN23 = CLK_IOB; +INPUT S:PIN76 = nBERR_IOB; +INPUT S:PIN25 = E_IOB; +INPUT S:PIN92 = nIPL2; +INPUT S:PIN73 = nBG_IOB; +INPUT S:PIN78 = nDTACK_IOB; +INPUT S:PIN77 = nVPA_IOB; +INPUT S:PIN94 = A_FSB<1>; +INPUT S:PIN95 = A_FSB<2>; +INPUT S:PIN96 = A_FSB<3>; +INPUT S:PIN97 = A_FSB<4>; +INPUT S:PIN2 = A_FSB<5>; +INPUT S:PIN3 = A_FSB<6>; +INPUT S:PIN4 = A_FSB<7>; +INPUT S:PIN61 = SW<0>; +TRIOUT S:PIN74 = nVMA_IOB; +TRIOUT S:PIN81 = nAS_IOB; +TRIOUT S:PIN79 = nLDS_IOB; +TRIOUT S:PIN80 = nUDS_IOB; +OUTPUT S:PIN28 = nDTACK_FSB; +OUTPUT S:PIN53 = RA<0>; +OUTPUT S:PIN50 = RA<1>; +OUTPUT S:PIN43 = RA<2>; +OUTPUT S:PIN41 = RA<3>; +OUTPUT S:PIN40 = RA<4>; +OUTPUT S:PIN42 = RA<5>; +OUTPUT S:PIN46 = RA<6>; +OUTPUT S:PIN52 = RA<7>; +OUTPUT S:PIN54 = RA<8>; +OUTPUT S:PIN56 = RA<9>; +OUTPUT S:PIN70 = nBERR_FSB; +OUTPUT S:PIN37 = nOE; +OUTPUT S:PIN34 = nROMWE; +OUTPUT S:PIN93 = nVPA_FSB; +OUTPUT S:PIN85 = nADoutLE0; +OUTPUT S:PIN36 = nCAS; +OUTPUT S:PIN86 = nDinLE; +OUTPUT S:PIN90 = nDinOE; +OUTPUT S:PIN89 = nDoutOE; +OUTPUT S:PIN64 = nRAS; +OUTPUT S:PIN63 = RA<11>; +OUTPUT S:PIN55 = RA<10>; +OUTPUT S:PIN59 = CLK20EN; +OUTPUT S:PIN58 = CLK25EN; +OUTPUT S:PIN72 = nBR_IOB; +OUTPUT S:PIN82 = nADoutLE1; +OUTPUT S:PIN87 = nAoutOE; +OUTPUT S:PIN65 = nRAMLWE; +OUTPUT S:PIN66 = nRAMUWE; +OUTPUT S:PIN35 = nROMCS; + +/* timing arc definitions */ +SW<0>_CLK20EN_delay: DELAY SW<0> CLK20EN; +SW<0>_CLK25EN_delay: DELAY SW<0> CLK25EN; +A_FSB<1>_RA<0>_delay: DELAY A_FSB<1> RA<0>; +A_FSB<10>_RA<0>_delay: DELAY A_FSB<10> RA<0>; +A_FSB<21>_RA<10>_delay: DELAY A_FSB<21> RA<10>; +A_FSB<19>_RA<11>_delay: DELAY A_FSB<19> RA<11>; +A_FSB<11>_RA<1>_delay: DELAY A_FSB<11> RA<1>; +A_FSB<2>_RA<1>_delay: DELAY A_FSB<2> RA<1>; +A_FSB<3>_RA<2>_delay: DELAY A_FSB<3> RA<2>; +A_FSB<12>_RA<2>_delay: DELAY A_FSB<12> RA<2>; +A_FSB<4>_RA<3>_delay: DELAY A_FSB<4> RA<3>; +A_FSB<13>_RA<3>_delay: DELAY A_FSB<13> RA<3>; +A_FSB<5>_RA<4>_delay: DELAY A_FSB<5> RA<4>; +A_FSB<14>_RA<4>_delay: DELAY A_FSB<14> RA<4>; +A_FSB<6>_RA<5>_delay: DELAY A_FSB<6> RA<5>; +A_FSB<15>_RA<5>_delay: DELAY A_FSB<15> RA<5>; +A_FSB<7>_RA<6>_delay: DELAY A_FSB<7> RA<6>; +A_FSB<16>_RA<6>_delay: DELAY A_FSB<16> RA<6>; +A_FSB<17>_RA<7>_delay: DELAY A_FSB<17> RA<7>; +A_FSB<8>_RA<7>_delay: DELAY A_FSB<8> RA<7>; +A_FSB<21>_RA<8>_delay: DELAY A_FSB<21> RA<8>; +A_FSB<9>_RA<8>_delay: DELAY A_FSB<9> RA<8>; +A_FSB<23>_RA<8>_delay: DELAY A_FSB<23> RA<8>; +A_FSB<22>_RA<8>_delay: DELAY A_FSB<22> RA<8>; +A_FSB<18>_RA<8>_delay: DELAY A_FSB<18> RA<8>; +A_FSB<20>_RA<9>_delay: DELAY A_FSB<20> RA<9>; +A_FSB<19>_RA<9>_delay: DELAY A_FSB<19> RA<9>; +nAS_FSB_nBERR_FSB_delay: DELAY nAS_FSB nBERR_FSB; +A_FSB<20>_nBERR_FSB_delay: DELAY A_FSB<20> nBERR_FSB; +A_FSB<22>_nBERR_FSB_delay: DELAY A_FSB<22> nBERR_FSB; +A_FSB<23>_nBERR_FSB_delay: DELAY A_FSB<23> nBERR_FSB; +A_FSB<21>_nBERR_FSB_delay: DELAY A_FSB<21> nBERR_FSB; +A_FSB<20>_nDinOE_delay: DELAY A_FSB<20> nDinOE; +A_FSB<23>_nDinOE_delay: DELAY A_FSB<23> nDinOE; +A_FSB<22>_nDinOE_delay: DELAY A_FSB<22> nDinOE; +A_FSB<21>_nDinOE_delay: DELAY A_FSB<21> nDinOE; +nAS_FSB_nDinOE_delay: DELAY nAS_FSB nDinOE; +nWE_FSB_nDinOE_delay: DELAY nWE_FSB nDinOE; +SW<1>_nDinOE_delay: DELAY SW<1> nDinOE; +nAS_FSB_nOE_delay: DELAY nAS_FSB nOE; +nWE_FSB_nOE_delay: DELAY nWE_FSB nOE; +nLDS_FSB_nRAMLWE_delay: DELAY nLDS_FSB nRAMLWE; +nWE_FSB_nRAMLWE_delay: DELAY nWE_FSB nRAMLWE; +nAS_FSB_nRAMLWE_delay: DELAY nAS_FSB nRAMLWE; +nWE_FSB_nRAMUWE_delay: DELAY nWE_FSB nRAMUWE; +nUDS_FSB_nRAMUWE_delay: DELAY nUDS_FSB nRAMUWE; +nAS_FSB_nRAMUWE_delay: DELAY nAS_FSB nRAMUWE; +A_FSB<23>_nRAS_delay: DELAY A_FSB<23> nRAS; +nAS_FSB_nRAS_delay: DELAY nAS_FSB nRAS; +A_FSB<21>_nRAS_delay: DELAY A_FSB<21> nRAS; +A_FSB<22>_nRAS_delay: DELAY A_FSB<22> nRAS; +A_FSB<22>_nROMCS_delay: DELAY A_FSB<22> nROMCS; +A_FSB<23>_nROMCS_delay: DELAY A_FSB<23> nROMCS; +SW<1>_nROMCS_delay: DELAY SW<1> nROMCS; +A_FSB<20>_nROMCS_delay: DELAY A_FSB<20> nROMCS; +A_FSB<21>_nROMCS_delay: DELAY A_FSB<21> nROMCS; +nAS_FSB_nROMWE_delay: DELAY nAS_FSB nROMWE; +nWE_FSB_nROMWE_delay: DELAY nWE_FSB nROMWE; +nAS_FSB_nVPA_FSB_delay: DELAY nAS_FSB nVPA_FSB; +CLK_FSB_nDTACK_FSB_delay: DELAY CLK_FSB nDTACK_FSB; +CLK_FSB_RA<0>_delay: DELAY CLK_FSB RA<0>; +CLK_FSB_RA<1>_delay: DELAY CLK_FSB RA<1>; +CLK_FSB_RA<2>_delay: DELAY CLK_FSB RA<2>; +CLK_FSB_RA<3>_delay: DELAY CLK_FSB RA<3>; +CLK_FSB_RA<4>_delay: DELAY CLK_FSB RA<4>; +CLK_FSB_RA<5>_delay: DELAY CLK_FSB RA<5>; +CLK_FSB_RA<6>_delay: DELAY CLK_FSB RA<6>; +CLK_FSB_RA<7>_delay: DELAY CLK_FSB RA<7>; +CLK_FSB_RA<8>_delay: DELAY CLK_FSB RA<8>; +CLK_FSB_RA<9>_delay: DELAY CLK_FSB RA<9>; +CLK_FSB_nBERR_FSB_delay: DELAY CLK_FSB nBERR_FSB; +CLK_FSB_nVPA_FSB_delay: DELAY CLK_FSB nVPA_FSB; +CLK_FSB_nADoutLE0_delay: DELAY CLK_FSB nADoutLE0; +CLK_FSB_nCAS_delay: DELAY CLK_FSB nCAS; +CLK_FSB_nRAS_delay: DELAY CLK_FSB nRAS; +CLK_FSB_nBR_IOB_delay: DELAY CLK_FSB nBR_IOB; +CLK_FSB_nADoutLE1_delay: DELAY CLK_FSB nADoutLE1; +CLK_FSB_nRAMLWE_delay: DELAY CLK_FSB nRAMLWE; +CLK_FSB_nRAMUWE_delay: DELAY CLK_FSB nRAMUWE; +CLK_FSB_nROMCS_delay: DELAY CLK_FSB nROMCS; +CLK2X_IOB_nVMA_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nVMA_IOB; +CLK2X_IOB_nAS_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nAS_IOB; +CLK2X_IOB_nLDS_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nLDS_IOB; +CLK2X_IOB_nUDS_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nUDS_IOB; +CLK2X_IOB_nADoutLE0_delay: DELAY CLK2X_IOB nADoutLE0; +CLK2X_IOB_nDinLE_delay: DELAY CLK2X_IOB nDinLE; +CLK2X_IOB_nDoutOE_delay: DELAY CLK2X_IOB nDoutOE; +CLK2X_IOB_nAoutOE_delay: DELAY CLK2X_IOB nAoutOE; + +/* timing check arc definitions */ +E_IOB_CLK_IOB_setup: SETUP(POSEDGE) E_IOB CLK_IOB; +E_IOB_CLK_IOB_hold: HOLD(POSEDGE) E_IOB CLK_IOB; +A_FSB<10>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<10> CLK_FSB; +A_FSB<11>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<11> CLK_FSB; +A_FSB<12>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<12> CLK_FSB; +A_FSB<13>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<13> CLK_FSB; +A_FSB<14>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<14> CLK_FSB; +A_FSB<15>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<15> CLK_FSB; +A_FSB<16>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<16> CLK_FSB; +A_FSB<17>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<17> CLK_FSB; +A_FSB<18>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<18> CLK_FSB; +A_FSB<19>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<19> CLK_FSB; +A_FSB<20>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<20> CLK_FSB; +A_FSB<21>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<21> CLK_FSB; +A_FSB<22>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<22> CLK_FSB; +A_FSB<23>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<23> CLK_FSB; +A_FSB<8>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<8> CLK_FSB; +A_FSB<9>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<9> CLK_FSB; +SW<1>_CLK_FSB_setup: SETUP(POSEDGE) SW<1> CLK_FSB; +nAS_FSB_CLK_FSB_setup: SETUP(POSEDGE) nAS_FSB CLK_FSB; +nIPL2_CLK_FSB_setup: SETUP(POSEDGE) nIPL2 CLK_FSB; +nLDS_FSB_CLK_FSB_setup: SETUP(POSEDGE) nLDS_FSB CLK_FSB; +nRES_CLK_FSB_setup: SETUP(POSEDGE) nRES CLK_FSB; +nUDS_FSB_CLK_FSB_setup: SETUP(POSEDGE) nUDS_FSB CLK_FSB; +nWE_FSB_CLK_FSB_setup: SETUP(POSEDGE) nWE_FSB CLK_FSB; +A_FSB<10>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<10> CLK_FSB; +A_FSB<11>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<11> CLK_FSB; +A_FSB<12>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<12> CLK_FSB; +A_FSB<13>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<13> CLK_FSB; +A_FSB<14>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<14> CLK_FSB; +A_FSB<15>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<15> CLK_FSB; +A_FSB<16>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<16> CLK_FSB; +A_FSB<17>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<17> CLK_FSB; +A_FSB<18>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<18> CLK_FSB; +A_FSB<19>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<19> CLK_FSB; +A_FSB<20>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<20> CLK_FSB; +A_FSB<21>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<21> CLK_FSB; +A_FSB<22>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<22> CLK_FSB; +A_FSB<23>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<23> CLK_FSB; +A_FSB<8>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<8> CLK_FSB; +A_FSB<9>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<9> CLK_FSB; +SW<1>_CLK_FSB_hold: HOLD(POSEDGE) SW<1> CLK_FSB; +nAS_FSB_CLK_FSB_hold: HOLD(POSEDGE) nAS_FSB CLK_FSB; +nIPL2_CLK_FSB_hold: HOLD(POSEDGE) nIPL2 CLK_FSB; +nLDS_FSB_CLK_FSB_hold: HOLD(POSEDGE) nLDS_FSB CLK_FSB; +nRES_CLK_FSB_hold: HOLD(POSEDGE) nRES CLK_FSB; +nUDS_FSB_CLK_FSB_hold: HOLD(POSEDGE) nUDS_FSB CLK_FSB; +nWE_FSB_CLK_FSB_hold: HOLD(POSEDGE) nWE_FSB CLK_FSB; +CLK_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) CLK_IOB CLK2X_IOB; +nBERR_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nBERR_IOB CLK2X_IOB; +nBG_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nBG_IOB CLK2X_IOB; +nDTACK_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nDTACK_IOB CLK2X_IOB; +nRES_CLK2X_IOB_setup: SETUP(POSEDGE) nRES CLK2X_IOB; +nVPA_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nVPA_IOB CLK2X_IOB; +CLK_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) CLK_IOB CLK2X_IOB; +nBERR_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nBERR_IOB CLK2X_IOB; +nBG_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nBG_IOB CLK2X_IOB; +nDTACK_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nDTACK_IOB CLK2X_IOB; +nRES_CLK2X_IOB_hold: HOLD(POSEDGE) nRES CLK2X_IOB; +nVPA_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nVPA_IOB CLK2X_IOB; + +ENDMODEL diff --git a/cpld/XC95144XL/WarpSE.nga b/cpld/XC95144XL/WarpSE.nga new file mode 100644 index 0000000..2e656dd --- /dev/null +++ b/cpld/XC95144XL/WarpSE.nga @@ -0,0 +1,3 @@ +XILINX-XDB 0.1 STUB 0.1 ASCII +XILINX-XDM V1.6e +$75747<,Fz_t)HW_EA'1<7)L880(B~[x%D[[AE#=0;%H.E025>"Hx]r/JUQKC%7:5+W6;2.D|Yv+FY]GG!3>9'_BA85+Rdt'3>.7290;%k5'0;294,&/83:1<$??;)3345<689:1==>?)018,470890:=:>?:03445/682":;=>51623>4178 ;;7%?70182<56=91:;%<>4(3:34?4?89094=>&119+75672::;<7=?01+15>.489:1?=>?:2234,&/;<:;6>;?0;1645/682"89=>53423>6378 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6412>;0b><::078yv0c2909wS8k;<677?503-99:79>;o111?713ty8>54?:3y]77><58l<684>;|q:e?6=;rT8>:5Q9`9>=f<69l1vqpsr@AAx50372kl<958<7|BCF~6zHIZpqMN \ No newline at end of file diff --git a/cpld/XC95144XL/MXSE.pad b/cpld/XC95144XL/WarpSE.pad similarity index 95% rename from cpld/XC95144XL/MXSE.pad rename to cpld/XC95144XL/WarpSE.pad index dfd44ed..a901585 100644 --- a/cpld/XC95144XL/MXSE.pad +++ b/cpld/XC95144XL/WarpSE.pad @@ -1,15 +1,15 @@ Release 8.1i - Fit P.20131013 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved - 3-27-2022 10:08AM + 3-28-2022 9:46AM NOTE: This file is designed to be imported into a spreadsheet program such as Microsoft Excel for viewing, printing and sorting. The pipe '|' character is used as the data field separator. This file is also designed to support parsing. -Input file: MXSE.ngd -output file: MXSE.pad +Input file: WarpSE.ngd +output file: WarpSE.pad Part type: xc95144xl Speed grade: -10 Package: tq100 diff --git a/cpld/XC95144XL/MXSE.pnx b/cpld/XC95144XL/WarpSE.pnx similarity index 83% rename from cpld/XC95144XL/MXSE.pnx rename to cpld/XC95144XL/WarpSE.pnx index cc10036..a3ae130 100644 --- a/cpld/XC95144XL/MXSE.pnx +++ b/cpld/XC95144XL/WarpSE.pnx @@ -15,4 +15,4 @@ sr (SLOW|FAST|slow|fast) "SLOW" dir (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR"> ]> - + diff --git a/cpld/XC95144XL/MXSE.prj b/cpld/XC95144XL/WarpSE.prj similarity index 81% rename from cpld/XC95144XL/MXSE.prj rename to cpld/XC95144XL/WarpSE.prj index 82f2aaf..dc97722 100644 --- a/cpld/XC95144XL/MXSE.prj +++ b/cpld/XC95144XL/WarpSE.prj @@ -4,4 +4,4 @@ verilog work "../IOBM.v" verilog work "../FSB.v" verilog work "../CS.v" verilog work "../CNT.v" -verilog work "../MXSE.v" +verilog work "../WarpSE.v" diff --git a/cpld/XC95144XL/WarpSE.rpt b/cpld/XC95144XL/WarpSE.rpt new file mode 100644 index 0000000..cf5d9fd --- /dev/null +++ b/cpld/XC95144XL/WarpSE.rpt @@ -0,0 +1,1836 @@ + +cpldfit: version P.20131013 Xilinx Inc. + Fitter Report +Design Name: WarpSE Date: 3-28-2022, 9:46AM +Device Used: XC95144XL-10-TQ100 +Fitting Status: Successful + +************************* Mapped Resource Summary ************************** + +Macrocells Product Terms Function Block Registers Pins +Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot +114/144 ( 79%) 463 /720 ( 64%) 253/432 ( 59%) 89 /144 ( 62%) 74 /81 ( 91%) + +** Function Block Resources ** + +Function Mcells FB Inps Pterms IO +Block Used/Tot Used/Tot Used/Tot Used/Tot +FB1 18/18* 20/54 23/90 11/11* +FB2 12/18 9/54 11/90 8/10 +FB3 8/18 38/54 82/90 10/10* +FB4 18/18* 41/54 39/90 10/10* +FB5 14/18 39/54 82/90 8/10 +FB6 18/18* 34/54 64/90 10/10* +FB7 14/18 34/54 81/90 10/10* +FB8 12/18 38/54 81/90 7/10 + ----- ----- ----- ----- + 114/144 253/432 463/720 74/81 + +* - Resource is exhausted + +** Global Control Resources ** + +Signal 'CLK2X_IOB' mapped onto global clock net GCK1. +Signal 'CLK_IOB' mapped onto global clock net GCK2. +Signal 'CLK_FSB' mapped onto global clock net GCK3. +Global output enable net(s) unused. +Global set/reset net(s) unused. + +** Pin Resources ** + +Signal Type Required Mapped | Pin Type Used Total +------------------------------------|------------------------------------ +Input : 36 36 | I/O : 68 73 +Output : 35 35 | GCK/IO : 3 3 +Bidirectional : 0 0 | GTS/IO : 3 4 +GCK : 3 3 | GSR/IO : 0 1 +GTS : 0 0 | +GSR : 0 0 | + ---- ---- + Total 74 74 + +** Power Data ** + +There are 114 macrocells in high performance mode (MCHP). +There are 0 macrocells in low power mode (MCLP). +End of Mapped Resource Summary + ************************** Errors and Warnings *************************** + +WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will + use the default filename of 'WarpSE.ise'. +INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC + constraint 'P22'. It is recommended that you declare this BUFG explicitedly + in your design. Note that for certain device families the output of a BUFG + constraint can not drive a gated clock, and the BUFG constraint will be + ignored. +INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC + constraint 'P27'. It is recommended that you declare this BUFG explicitedly + in your design. Note that for certain device families the output of a BUFG + constraint can not drive a gated clock, and the BUFG constraint will be + ignored. +INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC + constraint 'P23'. It is recommended that you declare this BUFG explicitedly + in your design. Note that for certain device families the output of a BUFG + constraint can not drive a gated clock, and the BUFG constraint will be + ignored. +WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'. The input(s) are unused + after optimization. Please verify functionality via simulation. + ************************* Summary of Mapped Logic ************************ + +** 35 Outputs ** + +Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init +Name Pts Inps No. Type Use Mode Rate State +nDTACK_FSB 28 34 FB3_9 28 I/O O STD FAST RESET +nROMWE 1 2 FB3_17 34 I/O O STD FAST +nAoutOE 3 4 FB4_2 87 I/O O STD FAST SET +nDoutOE 2 3 FB4_5 89 I/O O STD FAST RESET +nDinOE 3 7 FB4_6 90 I/O O STD FAST +nVPA_FSB 1 2 FB4_11 93 I/O O STD FAST +nROMCS 3 6 FB5_2 35 I/O O STD FAST +nCAS 1 1 FB5_5 36 I/O O STD FAST RESET +nOE 1 2 FB5_6 37 I/O O STD FAST +RA<4> 2 3 FB5_9 40 I/O O STD FAST +RA<3> 2 3 FB5_11 41 I/O O STD FAST +RA<5> 2 3 FB5_12 42 I/O O STD FAST +RA<2> 2 3 FB5_14 43 I/O O STD FAST +RA<6> 2 3 FB5_15 46 I/O O STD FAST +nVMA_IOB 3 10 FB6_2 74 I/O O STD FAST RESET +nLDS_IOB 4 6 FB6_9 79 I/O O STD FAST RESET +nUDS_IOB 4 6 FB6_11 80 I/O O STD FAST RESET +nAS_IOB 3 4 FB6_12 81 I/O O STD FAST RESET +nADoutLE1 2 3 FB6_14 82 I/O O STD FAST SET +nADoutLE0 1 2 FB6_15 85 I/O O STD FAST +nDinLE 1 2 FB6_17 86 I/O O STD FAST RESET +RA<1> 2 3 FB7_2 50 I/O O STD FAST +RA<7> 2 3 FB7_5 52 I/O O STD FAST +RA<0> 2 3 FB7_6 53 I/O O STD FAST +RA<8> 7 7 FB7_8 54 I/O O STD FAST +RA<10> 1 1 FB7_9 55 I/O O STD FAST +RA<9> 2 3 FB7_11 56 I/O O STD FAST +CLK25EN 1 1 FB7_12 58 I/O O STD FAST +CLK20EN 1 1 FB7_14 59 I/O O STD FAST +RA<11> 1 1 FB8_2 63 I/O O STD FAST +nRAS 3 8 FB8_5 64 I/O O STD FAST +nRAMLWE 1 5 FB8_6 65 I/O O STD FAST +nRAMUWE 1 5 FB8_8 66 I/O O STD FAST +nBERR_FSB 3 9 FB8_12 70 I/O O STD FAST +nBR_IOB 1 6 FB8_15 72 I/O O STD FAST SET + +** 79 Buried Nodes ** + +Signal Total Total Loc Pwr Reg Init +Name Pts Inps Mode State +ram/RefRAS 1 2 FB1_1 STD RESET +ram/BACTr 1 2 FB1_2 STD RESET +iobm/RESrr 1 1 FB1_3 STD RESET +iobm/RESrf 1 1 FB1_4 STD RESET +iobm/BERRrf 1 1 FB1_5 STD RESET +fsb/ASrf 1 1 FB1_6 STD RESET +cnt/RefCnt<1> 1 1 FB1_7 STD RESET +RESr2 1 1 FB1_8 STD RESET +RESr1 1 1 FB1_9 STD RESET +RESr0 1 1 FB1_10 STD RESET +IPL2r1 1 1 FB1_11 STD RESET +IPL2r0 1 1 FB1_12 STD RESET +$OpTx$FX_DC$591 1 2 FB1_13 STD +iobs/IOU1 2 2 FB1_14 STD RESET +iobs/IOL1 2 2 FB1_15 STD RESET +iobm/IOS_FSM_FFd1 2 3 FB1_16 STD RESET +fsb/BERR1r 2 4 FB1_17 STD RESET +cs/nOverlay1 2 3 FB1_18 STD RESET +iobs/IOACTr 1 1 FB2_7 STD RESET +iobm/VPArr 1 1 FB2_8 STD RESET +iobm/VPArf 1 1 FB2_9 STD RESET +iobm/IOREQr 1 1 FB2_10 STD RESET +iobm/Er2 1 1 FB2_11 STD RESET +iobm/Er 1 1 FB2_12 STD RESET +iobm/DTACKrr 1 1 FB2_13 STD RESET +iobm/DTACKrf 1 1 FB2_14 STD RESET +iobm/BGr1 1 1 FB2_15 STD RESET +iobm/BGr0 1 1 FB2_16 STD RESET +iobm/BERRrr 1 1 FB2_17 STD RESET +cnt/RefCnt<0> 0 0 FB2_18 STD RESET +fsb/VPA 27 33 FB3_1 STD RESET +fsb/Ready0r 3 8 FB3_4 STD RESET +fsb/BERR0r 3 8 FB3_12 STD RESET +cs/nOverlay0 3 8 FB3_13 STD RESET +fsb/Ready1r 8 18 FB3_15 STD RESET +fsb/Ready2r 9 22 FB3_16 STD RESET +iobs/Clear1 1 3 FB4_1 STD RESET +iobs/ALE0 1 2 FB4_3 STD RESET +cnt/RefCnt<7> 1 7 FB4_4 STD RESET +cnt/RefCnt<6> 1 6 FB4_7 STD RESET + +Signal Total Total Loc Pwr Reg Init +Name Pts Inps Mode State +cnt/RefCnt<5> 1 5 FB4_8 STD RESET +cnt/RefCnt<4> 1 4 FB4_9 STD RESET +cnt/RefCnt<3> 1 3 FB4_10 STD RESET +cnt/RefCnt<2> 1 2 FB4_12 STD RESET +iobs/PS_FSM_FFd1 2 3 FB4_13 STD RESET +cnt/RefDone 2 10 FB4_14 STD RESET +iobs/IOU0 3 5 FB4_15 STD RESET +cnt/TimeoutA 3 10 FB4_16 STD RESET +iobs/IOReady 4 8 FB4_17 STD RESET +ram/RS_FSM_FFd1 8 14 FB4_18 STD RESET +ram/RAMDIS2 7 15 FB5_3 STD RESET +iobs/IOL0 3 5 FB5_4 STD RESET +iobs/Once 18 19 FB5_7 STD RESET +ram/Once 5 10 FB5_10 STD RESET +iobs/Load1 15 19 FB5_13 STD RESET +ram/RASEL 19 15 FB5_18 STD RESET +iobm/ETACK 1 6 FB6_1 STD RESET +iobm/IOS_FSM_FFd3 3 6 FB6_3 STD RESET +iobm/ES<3> 3 6 FB6_4 STD RESET +iobm/ES<1> 3 4 FB6_5 STD RESET +iobm/ES<0> 3 7 FB6_6 STD RESET +iobm/ALE0 3 5 FB6_7 STD RESET +iobm/ES<4> 4 7 FB6_8 STD RESET +iobm/IOS_FSM_FFd2 5 11 FB6_10 STD RESET +iobm/ES<2> 5 7 FB6_13 STD RESET +iobm/IOACT 7 13 FB6_16 STD RESET +iobm/IOBERR 9 13 FB6_18 STD RESET +ram/RS_FSM_FFd3 11 14 FB7_4 STD RESET +cnt/TimeoutBPre 3 11 FB7_7 STD RESET +ram/RS_FSM_FFd2 14 14 FB7_10 STD RESET +cnt/TimeoutB 3 12 FB7_13 STD RESET +ram/RAMReady 15 15 FB7_15 STD RESET +ram/RAMDIS1 17 15 FB7_18 STD RESET +iobs/PS_FSM_FFd2 15 20 FB8_4 STD RESET +RESDone 1 3 FB8_7 STD RESET +iobs/IOREQ 15 20 FB8_9 STD RESET +iobs/IORW1 17 20 FB8_14 STD RESET +iobs/BERR 4 8 FB8_16 STD RESET +iobs/IORW0 19 21 FB8_18 STD RESET + +** 39 Inputs ** + +Signal Loc Pin Pin Pin +Name No. Type Use +A_FSB<13> FB1_2 11 I/O I +A_FSB<14> FB1_3 12 I/O I +A_FSB<15> FB1_5 13 I/O I +A_FSB<16> FB1_6 14 I/O I +A_FSB<17> FB1_8 15 I/O I +A_FSB<18> FB1_9 16 I/O I +A_FSB<19> FB1_11 17 I/O I +A_FSB<20> FB1_12 18 I/O I +A_FSB<21> FB1_14 19 I/O I +A_FSB<22> FB1_15 20 I/O I +CLK2X_IOB FB1_17 22 GCK/I/O GCK +A_FSB<5> FB2_6 2 GTS/I/O I +A_FSB<6> FB2_8 3 GTS/I/O I +A_FSB<7> FB2_9 4 GTS/I/O I +A_FSB<8> FB2_11 6 I/O I +A_FSB<9> FB2_12 7 I/O I +A_FSB<10> FB2_14 8 I/O I +A_FSB<11> FB2_15 9 I/O I +A_FSB<12> FB2_17 10 I/O I +CLK_IOB FB3_2 23 GCK/I/O GCK/I +A_FSB<23> FB3_5 24 I/O I +E_IOB FB3_6 25 I/O I +CLK_FSB FB3_8 27 GCK/I/O GCK +nWE_FSB FB3_11 29 I/O I +nLDS_FSB FB3_12 30 I/O I +nAS_FSB FB3_14 32 I/O I +nUDS_FSB FB3_15 33 I/O I +nRES FB4_8 91 I/O I +nIPL2 FB4_9 92 I/O I +A_FSB<1> FB4_12 94 I/O I +A_FSB<2> FB4_14 95 I/O I +A_FSB<3> FB4_15 96 I/O I +A_FSB<4> FB4_17 97 I/O I +nBERR_IOB FB6_5 76 I/O I +nVPA_IOB FB6_6 77 I/O I +nDTACK_IOB FB6_8 78 I/O I +SW<1> FB7_15 60 I/O I +SW<0> FB7_17 61 I/O I +nBG_IOB FB8_17 73 I/O I + +Legend: +Pin No. - ~ - User Assigned + ************************** Function Block Details ************************ +Legend: +Total Pt - Total product terms used by the macrocell signal +Imp Pt - Product terms imported from other macrocells +Exp Pt - Product terms exported to other macrocells + in direction shown +Unused Pt - Unused local product terms remaining in macrocell +Loc - Location where logic was mapped in device +Pin Type/Use - I - Input GCK - Global Clock + O - Output GTS - Global Output Enable + (b) - Buried macrocell GSR - Global Set/Reset +X - Signal used as input to the macrocell logic. +Pin No. - ~ - User Assigned + *********************************** FB1 *********************************** +Number of function block inputs used/remaining: 20/34 +Number of signals used by logic mapping into function block: 20 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +ram/RefRAS 1 0 0 4 FB1_1 (b) (b) +ram/BACTr 1 0 0 4 FB1_2 11 I/O I +iobm/RESrr 1 0 0 4 FB1_3 12 I/O I +iobm/RESrf 1 0 0 4 FB1_4 (b) (b) +iobm/BERRrf 1 0 0 4 FB1_5 13 I/O I +fsb/ASrf 1 0 0 4 FB1_6 14 I/O I +cnt/RefCnt<1> 1 0 0 4 FB1_7 (b) (b) +RESr2 1 0 0 4 FB1_8 15 I/O I +RESr1 1 0 0 4 FB1_9 16 I/O I +RESr0 1 0 0 4 FB1_10 (b) (b) +IPL2r1 1 0 0 4 FB1_11 17 I/O I +IPL2r0 1 0 0 4 FB1_12 18 I/O I +$OpTx$FX_DC$591 1 0 0 4 FB1_13 (b) (b) +iobs/IOU1 2 0 0 3 FB1_14 19 I/O I +iobs/IOL1 2 0 0 3 FB1_15 20 I/O I +iobm/IOS_FSM_FFd1 2 0 0 3 FB1_16 (b) (b) +fsb/BERR1r 2 0 0 3 FB1_17 22 GCK/I/O GCK +cs/nOverlay1 2 0 0 3 FB1_18 (b) (b) + +Signals Used by Logic in Function Block + 1: IPL2r0 8: iobm/IOS_FSM_FFd1 15: nIPL2 + 2: RESr0 9: iobm/IOS_FSM_FFd2 16: nLDS_FSB + 3: RESr1 10: iobm/IOS_FSM_FFd3 17: nRES + 4: cnt/RefCnt<0> 11: iobs/BERR 18: nUDS_FSB + 5: cs/nOverlay0 12: iobs/Load1 19: ram/RS_FSM_FFd1 + 6: fsb/ASrf 13: nAS_FSB 20: ram/RS_FSM_FFd2 + 7: fsb/BERR1r 14: nBERR_IOB + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +ram/RefRAS ..................XX.................... 2 +ram/BACTr .....X......X........................... 2 +iobm/RESrr ................X....................... 1 +iobm/RESrf ................X....................... 1 +iobm/BERRrf .............X.......................... 1 +fsb/ASrf ............X........................... 1 +cnt/RefCnt<1> ...X.................................... 1 +RESr2 ..X..................................... 1 +RESr1 .X...................................... 1 +RESr0 ................X....................... 1 +IPL2r1 X....................................... 1 +IPL2r0 ..............X......................... 1 +$OpTx$FX_DC$591 .....X......X........................... 2 +iobs/IOU1 ...........X.....X...................... 2 +iobs/IOL1 ...........X...X........................ 2 +iobm/IOS_FSM_FFd1 .......XXX.............................. 3 +fsb/BERR1r .....XX...X.X........................... 4 +cs/nOverlay1 ....XX......X........................... 3 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB2 *********************************** +Number of function block inputs used/remaining: 9/45 +Number of signals used by logic mapping into function block: 9 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +(unused) 0 0 0 5 FB2_1 (b) +(unused) 0 0 0 5 FB2_2 99 GSR/I/O +(unused) 0 0 0 5 FB2_3 (b) +(unused) 0 0 0 5 FB2_4 (b) +(unused) 0 0 0 5 FB2_5 1 GTS/I/O +(unused) 0 0 0 5 FB2_6 2 GTS/I/O I +iobs/IOACTr 1 0 0 4 FB2_7 (b) (b) +iobm/VPArr 1 0 0 4 FB2_8 3 GTS/I/O I +iobm/VPArf 1 0 0 4 FB2_9 4 GTS/I/O I +iobm/IOREQr 1 0 0 4 FB2_10 (b) (b) +iobm/Er2 1 0 0 4 FB2_11 6 I/O I +iobm/Er 1 0 0 4 FB2_12 7 I/O I +iobm/DTACKrr 1 0 0 4 FB2_13 (b) (b) +iobm/DTACKrf 1 0 0 4 FB2_14 8 I/O I +iobm/BGr1 1 0 0 4 FB2_15 9 I/O I +iobm/BGr0 1 0 0 4 FB2_16 (b) (b) +iobm/BERRrr 1 0 0 4 FB2_17 10 I/O I +cnt/RefCnt<0> 0 0 0 5 FB2_18 (b) (b) + +Signals Used by Logic in Function Block + 1: E_IOB 4: iobm/IOACT 7: nBG_IOB + 2: iobm/BGr0 5: iobs/IOREQ 8: nDTACK_IOB + 3: iobm/Er 6: nBERR_IOB 9: nVPA_IOB + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +iobs/IOACTr ...X.................................... 1 +iobm/VPArr ........X............................... 1 +iobm/VPArf ........X............................... 1 +iobm/IOREQr ....X................................... 1 +iobm/Er2 ..X..................................... 1 +iobm/Er X....................................... 1 +iobm/DTACKrr .......X................................ 1 +iobm/DTACKrf .......X................................ 1 +iobm/BGr1 .X...................................... 1 +iobm/BGr0 ......X................................. 1 +iobm/BERRrr .....X.................................. 1 +cnt/RefCnt<0> ........................................ 0 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB3 *********************************** +Number of function block inputs used/remaining: 38/16 +Number of signals used by logic mapping into function block: 38 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +fsb/VPA 27 22<- 0 0 FB3_1 (b) (b) +(unused) 0 0 /\5 0 FB3_2 23 GCK/I/O GCK/I +(unused) 0 0 /\5 0 FB3_3 (b) (b) +fsb/Ready0r 3 1<- /\3 0 FB3_4 (b) (b) +(unused) 0 0 /\1 4 FB3_5 24 I/O I +(unused) 0 0 \/2 3 FB3_6 25 I/O I +(unused) 0 0 \/5 0 FB3_7 (b) (b) +(unused) 0 0 \/5 0 FB3_8 27 GCK/I/O GCK +nDTACK_FSB 28 23<- 0 0 FB3_9 28 I/O O +(unused) 0 0 /\5 0 FB3_10 (b) (b) +(unused) 0 0 /\5 0 FB3_11 29 I/O I +fsb/BERR0r 3 0 /\1 1 FB3_12 30 I/O I +cs/nOverlay0 3 0 \/2 0 FB3_13 (b) (b) +(unused) 0 0 \/5 0 FB3_14 32 I/O I +fsb/Ready1r 8 7<- \/4 0 FB3_15 33 I/O I +fsb/Ready2r 9 4<- 0 0 FB3_16 (b) (b) +nROMWE 1 0 \/4 0 FB3_17 34 I/O O +(unused) 0 0 \/5 0 FB3_18 (b) (b) + +Signals Used by Logic in Function Block + 1: $OpTx$FX_DC$591 14: A_FSB<22> 27: fsb/Ready1r + 2: A_FSB<10> 15: A_FSB<23> 28: fsb/Ready2r + 3: A_FSB<11> 16: A_FSB<8> 29: fsb/VPA + 4: A_FSB<12> 17: A_FSB<9> 30: iobs/BERR + 5: A_FSB<13> 18: SW<1> 31: iobs/IOReady + 6: A_FSB<14> 19: cnt/TimeoutA 32: nADoutLE1 + 7: A_FSB<15> 20: cnt/TimeoutB 33: nAS_FSB + 8: A_FSB<16> 21: cs/nOverlay0 34: nBR_IOB + 9: A_FSB<17> 22: cs/nOverlay1 35: nDTACK_FSB + 10: A_FSB<18> 23: fsb/ASrf 36: nRES + 11: A_FSB<19> 24: fsb/BERR0r 37: nWE_FSB + 12: A_FSB<20> 25: fsb/BERR1r 38: ram/RAMReady + 13: A_FSB<21> 26: fsb/Ready0r + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +fsb/VPA XXXXXXXXXXXXXXXXXXXX.X.XXXXXXXXX.X..XX.. 33 +fsb/Ready0r ............XXX......XX..X......X....X.. 8 +nDTACK_FSB .XXXXXXXXXXXXXXXXXXX.XXXXXXX.XXXXXX.XX.. 34 +fsb/BERR0r ...........XXXX....X..XX........X....... 8 +cs/nOverlay0 ...........XXXX.....X.X.........X..X.... 8 +fsb/Ready1r ....XX.XXXXXXXX..X...XX...X...XXX...X... 18 +fsb/Ready2r .XXXXXXXXXXXXXXXX.X..XX....X....X...X... 22 +nROMWE ................................X...X... 2 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB4 *********************************** +Number of function block inputs used/remaining: 41/13 +Number of signals used by logic mapping into function block: 41 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +iobs/Clear1 1 0 /\2 2 FB4_1 (b) (b) +nAoutOE 3 0 0 2 FB4_2 87 I/O O +iobs/ALE0 1 0 0 4 FB4_3 (b) (b) +cnt/RefCnt<7> 1 0 0 4 FB4_4 (b) (b) +nDoutOE 2 0 0 3 FB4_5 89 I/O O +nDinOE 3 0 0 2 FB4_6 90 I/O O +cnt/RefCnt<6> 1 0 0 4 FB4_7 (b) (b) +cnt/RefCnt<5> 1 0 0 4 FB4_8 91 I/O I +cnt/RefCnt<4> 1 0 0 4 FB4_9 92 I/O I +cnt/RefCnt<3> 1 0 0 4 FB4_10 (b) (b) +nVPA_FSB 1 0 0 4 FB4_11 93 I/O O +cnt/RefCnt<2> 1 0 0 4 FB4_12 94 I/O I +iobs/PS_FSM_FFd1 2 0 0 3 FB4_13 (b) (b) +cnt/RefDone 2 0 0 3 FB4_14 95 I/O I +iobs/IOU0 3 0 0 2 FB4_15 96 I/O I +cnt/TimeoutA 3 0 0 2 FB4_16 (b) (b) +iobs/IOReady 4 0 \/1 0 FB4_17 97 I/O I +ram/RS_FSM_FFd1 8 3<- 0 0 FB4_18 (b) (b) + +Signals Used by Logic in Function Block + 1: A_FSB<20> 15: cnt/TimeoutA 29: iobs/PS_FSM_FFd1 + 2: A_FSB<21> 16: cs/nOverlay1 30: iobs/PS_FSM_FFd2 + 3: A_FSB<22> 17: fsb/ASrf 31: nADoutLE1 + 4: A_FSB<23> 18: fsb/VPA 32: nAS_FSB + 5: SW<1> 19: iobm/BGr0 33: nAS_IOB + 6: cnt/RefCnt<0> 20: iobm/BGr1 34: nAoutOE + 7: cnt/RefCnt<1> 21: iobm/IOBERR 35: nUDS_FSB + 8: cnt/RefCnt<2> 22: iobm/IOS_FSM_FFd2 36: nWE_FSB + 9: cnt/RefCnt<3> 23: iobm/IOS_FSM_FFd3 37: ram/Once + 10: cnt/RefCnt<4> 24: iobs/IOACTr 38: ram/RS_FSM_FFd1 + 11: cnt/RefCnt<5> 25: iobs/IORW0 39: ram/RS_FSM_FFd2 + 12: cnt/RefCnt<6> 26: iobs/IOReady 40: ram/RS_FSM_FFd3 + 13: cnt/RefCnt<7> 27: iobs/IOU1 41: ram/RefRAS + 14: cnt/RefDone 28: iobs/Once + +Signal 1 2 3 4 5 FB +Name 0----+----0----+----0----+----0----+----0----+----0 Inputs +iobs/Clear1 ............................XXX................... 3 +nAoutOE ..................XX............XX................ 4 +iobs/ALE0 ............................XX.................... 2 +cnt/RefCnt<7> .....XXXXXXX...................................... 7 +nDoutOE .....................XX.X......................... 3 +nDinOE XXXXX..........................X...X.............. 7 +cnt/RefCnt<6> .....XXXXXX....................................... 6 +cnt/RefCnt<5> .....XXXXX........................................ 5 +cnt/RefCnt<4> .....XXXX......................................... 4 +cnt/RefCnt<3> .....XXX.......................................... 3 +nVPA_FSB .................X.............X.................. 2 +cnt/RefCnt<2> .....XX........................................... 2 +iobs/PS_FSM_FFd1 .......................X....XX.................... 3 +cnt/RefDone .....XXXXXXXXX..........................X......... 10 +iobs/IOU0 ..........................X.XXX...X............... 5 +cnt/TimeoutA .....XXXXXXX..X.X..............X.................. 10 +iobs/IOReady ................X...X..X.X.X.XXX.................. 8 +ram/RS_FSM_FFd1 .XXX......XXXX.XX..............X....XXXX.......... 14 + 0----+----1----+----2----+----3----+----4----+----5 + 0 0 0 0 0 + *********************************** FB5 *********************************** +Number of function block inputs used/remaining: 39/15 +Number of signals used by logic mapping into function block: 39 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +(unused) 0 0 /\5 0 FB5_1 (b) (b) +nROMCS 3 0 \/2 0 FB5_2 35 I/O O +ram/RAMDIS2 7 2<- 0 0 FB5_3 (b) (b) +iobs/IOL0 3 0 0 2 FB5_4 (b) (b) +nCAS 1 0 \/1 3 FB5_5 36 I/O O +nOE 1 1<- \/5 0 FB5_6 37 I/O O +iobs/Once 18 13<- 0 0 FB5_7 (b) (b) +(unused) 0 0 /\5 0 FB5_8 39 I/O (b) +RA<4> 2 0 /\3 0 FB5_9 40 I/O O +ram/Once 5 0 0 0 FB5_10 (b) (b) +RA<3> 2 0 \/2 1 FB5_11 41 I/O O +RA<5> 2 2<- \/5 0 FB5_12 42 I/O O +iobs/Load1 15 10<- 0 0 FB5_13 (b) (b) +RA<2> 2 2<- /\5 0 FB5_14 43 I/O O +RA<6> 2 0 /\2 1 FB5_15 46 I/O O +(unused) 0 0 \/4 1 FB5_16 (b) (b) +(unused) 0 0 \/5 0 FB5_17 49 I/O (b) +ram/RASEL 19 14<- 0 0 FB5_18 (b) (b) + +Signals Used by Logic in Function Block + 1: A_FSB<12> 14: A_FSB<4> 27: iobs/PS_FSM_FFd1 + 2: A_FSB<13> 15: A_FSB<5> 28: iobs/PS_FSM_FFd2 + 3: A_FSB<14> 16: A_FSB<6> 29: nADoutLE1 + 4: A_FSB<15> 17: A_FSB<7> 30: nAS_FSB + 5: A_FSB<16> 18: SW<1> 31: nLDS_FSB + 6: A_FSB<17> 19: cnt/RefCnt<5> 32: nWE_FSB + 7: A_FSB<18> 20: cnt/RefCnt<6> 33: ram/BACTr + 8: A_FSB<19> 21: cnt/RefCnt<7> 34: ram/Once + 9: A_FSB<20> 22: cnt/RefDone 35: ram/RAMDIS2 + 10: A_FSB<21> 23: cs/nOverlay1 36: ram/RASEL + 11: A_FSB<22> 24: fsb/ASrf 37: ram/RS_FSM_FFd1 + 12: A_FSB<23> 25: iobs/IOL1 38: ram/RS_FSM_FFd2 + 13: A_FSB<3> 26: iobs/Once 39: ram/RS_FSM_FFd3 + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +nROMCS ........XXXX.....X....X................. 6 +ram/RAMDIS2 .........XXX......XXXXXX.....X...XX.XXX. 15 +iobs/IOL0 ........................X.XXX.X......... 5 +nCAS ...................................X.... 1 +nOE .............................X.X........ 2 +iobs/Once .XX.XXXXXXXX.....X....XX.XXXXX.X........ 19 +RA<4> ..X...........X....................X.... 3 +ram/Once .........XXX..........XX.....X...X..XXX. 10 +RA<3> .X...........X.....................X.... 3 +RA<5> ...X...........X...................X.... 3 +iobs/Load1 .XX.XXXXXXXX.....X....XX.XXXXX.X........ 19 +RA<2> X...........X......................X.... 3 +RA<6> ....X...........X..................X.... 3 +ram/RASEL .........XXX......XXXXXX.....X..XX..XXX. 15 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB6 *********************************** +Number of function block inputs used/remaining: 34/20 +Number of signals used by logic mapping into function block: 34 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +iobm/ETACK 1 0 /\4 0 FB6_1 (b) (b) +nVMA_IOB 3 0 0 2 FB6_2 74 I/O O +iobm/IOS_FSM_FFd3 3 0 0 2 FB6_3 (b) (b) +iobm/ES<3> 3 0 0 2 FB6_4 (b) (b) +iobm/ES<1> 3 0 0 2 FB6_5 76 I/O I +iobm/ES<0> 3 0 0 2 FB6_6 77 I/O I +iobm/ALE0 3 0 0 2 FB6_7 (b) (b) +iobm/ES<4> 4 0 0 1 FB6_8 78 I/O I +nLDS_IOB 4 0 0 1 FB6_9 79 I/O O +iobm/IOS_FSM_FFd2 5 0 0 0 FB6_10 (b) (b) +nUDS_IOB 4 0 0 1 FB6_11 80 I/O O +nAS_IOB 3 0 0 2 FB6_12 81 I/O O +iobm/ES<2> 5 0 0 0 FB6_13 (b) (b) +nADoutLE1 2 0 0 3 FB6_14 82 I/O O +nADoutLE0 1 0 \/1 3 FB6_15 85 I/O O +iobm/IOACT 7 2<- 0 0 FB6_16 (b) (b) +nDinLE 1 0 /\1 3 FB6_17 86 I/O O +iobm/IOBERR 9 4<- 0 0 FB6_18 (b) (b) + +Signals Used by Logic in Function Block + 1: CLK_IOB 13: iobm/Er 24: iobm/VPArr + 2: iobm/ALE0 14: iobm/Er2 25: iobs/ALE0 + 3: iobm/BERRrf 15: iobm/IOACT 26: iobs/Clear1 + 4: iobm/BERRrr 16: iobm/IOBERR 27: iobs/IOL0 + 5: iobm/DTACKrf 17: iobm/IOREQr 28: iobs/IORW0 + 6: iobm/DTACKrr 18: iobm/IOS_FSM_FFd1 29: iobs/IOU0 + 7: iobm/ES<0> 19: iobm/IOS_FSM_FFd2 30: iobs/Load1 + 8: iobm/ES<1> 20: iobm/IOS_FSM_FFd3 31: nADoutLE1 + 9: iobm/ES<2> 21: iobm/RESrf 32: nAoutOE + 10: iobm/ES<3> 22: iobm/RESrr 33: nBERR_IOB + 11: iobm/ES<4> 23: iobm/VPArf 34: nVMA_IOB + 12: iobm/ETACK + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +iobm/ETACK ......XXXXX......................X...... 6 +nVMA_IOB ......XXXXX...X.......XX.......X.X...... 10 +iobm/IOS_FSM_FFd3 X...............XXXX...........X........ 6 +iobm/ES<3> ......XXXX..XX.......................... 6 +iobm/ES<1> ......XX....XX.......................... 4 +iobm/ES<0> ......XXXXX.XX.......................... 7 +iobm/ALE0 ................XXXX...........X........ 5 +iobm/ES<4> ......XXXXX.XX.......................... 7 +nLDS_IOB .................XXX......XX...X........ 6 +iobm/IOS_FSM_FFd2 X.XXXX.....X.....XXXXX.................. 11 +nUDS_IOB .................XXX.......XX..X........ 6 +nAS_IOB .................XXX...........X........ 4 +iobm/ES<2> ......XXXXX.XX.......................... 7 +nADoutLE1 .........................X...XX......... 3 +nADoutLE0 .X......................X............... 2 +iobm/IOACT X.XXXX.....X....XXXXXX.........X........ 13 +nDinLE .................XX..................... 2 +iobm/IOBERR X.XXXX.....X...X.XXXXX..........X....... 13 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB7 *********************************** +Number of function block inputs used/remaining: 34/20 +Number of signals used by logic mapping into function block: 34 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +(unused) 0 0 /\5 0 FB7_1 (b) (b) +RA<1> 2 0 /\2 1 FB7_2 50 I/O O +(unused) 0 0 \/5 0 FB7_3 (b) (b) +ram/RS_FSM_FFd3 11 6<- 0 0 FB7_4 (b) (b) +RA<7> 2 0 /\1 2 FB7_5 52 I/O O +RA<0> 2 0 0 3 FB7_6 53 I/O O +cnt/TimeoutBPre 3 0 \/2 0 FB7_7 (b) (b) +RA<8> 7 2<- 0 0 FB7_8 54 I/O O +RA<10> 1 0 \/4 0 FB7_9 55 I/O O +ram/RS_FSM_FFd2 14 9<- 0 0 FB7_10 (b) (b) +RA<9> 2 2<- /\5 0 FB7_11 56 I/O O +CLK25EN 1 0 /\2 2 FB7_12 58 I/O O +cnt/TimeoutB 3 0 \/1 1 FB7_13 (b) (b) +CLK20EN 1 1<- \/5 0 FB7_14 59 I/O O +ram/RAMReady 15 10<- 0 0 FB7_15 60 I/O I +(unused) 0 0 /\5 0 FB7_16 (b) (b) +(unused) 0 0 \/5 0 FB7_17 61 I/O I +ram/RAMDIS1 17 12<- 0 0 FB7_18 (b) (b) + +Signals Used by Logic in Function Block + 1: A_FSB<10> 13: A_FSB<9> 24: cnt/TimeoutB + 2: A_FSB<11> 14: SW<0> 25: cnt/TimeoutBPre + 3: A_FSB<17> 15: cnt/RefCnt<0> 26: cs/nOverlay1 + 4: A_FSB<18> 16: cnt/RefCnt<1> 27: fsb/ASrf + 5: A_FSB<19> 17: cnt/RefCnt<2> 28: nAS_FSB + 6: A_FSB<1> 18: cnt/RefCnt<3> 29: ram/BACTr + 7: A_FSB<20> 19: cnt/RefCnt<4> 30: ram/Once + 8: A_FSB<21> 20: cnt/RefCnt<5> 31: ram/RASEL + 9: A_FSB<22> 21: cnt/RefCnt<6> 32: ram/RS_FSM_FFd1 + 10: A_FSB<23> 22: cnt/RefCnt<7> 33: ram/RS_FSM_FFd2 + 11: A_FSB<2> 23: cnt/RefDone 34: ram/RS_FSM_FFd3 + 12: A_FSB<8> + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +RA<1> .X........X...................X......... 3 +ram/RS_FSM_FFd3 .......XXX.........XXXX..XXX.X.XXX...... 14 +RA<7> ..X........X..................X......... 3 +RA<0> X....X........................X......... 3 +cnt/TimeoutBPre ..............XXXXXXXX..X.XX............ 11 +RA<8> ...X...XXX..X............X....X......... 7 +RA<10> .......X................................ 1 +ram/RS_FSM_FFd2 .......XXX.........XXXX..XXXX..XXX...... 14 +RA<9> ....X.X.......................X......... 3 +CLK25EN .............X.......................... 1 +cnt/TimeoutB ..............XXXXXXXX.XX.XX............ 12 +CLK20EN .............X.......................... 1 +ram/RAMReady .......XXX.........XXXX..XXXXX.XXX...... 15 +ram/RAMDIS1 .......XXX.........XXXX..XXXXX.XXX...... 15 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB8 *********************************** +Number of function block inputs used/remaining: 38/16 +Number of signals used by logic mapping into function block: 38 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +(unused) 0 0 /\5 0 FB8_1 (b) (b) +RA<11> 1 0 /\4 0 FB8_2 63 I/O O +(unused) 0 0 \/5 0 FB8_3 (b) (b) +iobs/PS_FSM_FFd2 15 10<- 0 0 FB8_4 (b) (b) +nRAS 3 3<- /\5 0 FB8_5 64 I/O O +nRAMLWE 1 0 /\3 1 FB8_6 65 I/O O +RESDone 1 0 \/1 3 FB8_7 (b) (b) +nRAMUWE 1 1<- \/5 0 FB8_8 66 I/O O +iobs/IOREQ 15 10<- 0 0 FB8_9 67 I/O (b) +(unused) 0 0 /\5 0 FB8_10 (b) (b) +(unused) 0 0 \/1 4 FB8_11 68 I/O (b) +nBERR_FSB 3 1<- \/3 0 FB8_12 70 I/O O +(unused) 0 0 \/5 0 FB8_13 (b) (b) +iobs/IORW1 17 12<- 0 0 FB8_14 71 I/O (b) +nBR_IOB 1 0 /\4 0 FB8_15 72 I/O O +iobs/BERR 4 0 0 1 FB8_16 (b) (b) +(unused) 0 0 \/5 0 FB8_17 73 I/O I +iobs/IORW0 19 14<- 0 0 FB8_18 (b) (b) + +Signals Used by Logic in Function Block + 1: A_FSB<13> 14: RESr0 27: iobs/IORW1 + 2: A_FSB<14> 15: RESr1 28: iobs/Once + 3: A_FSB<16> 16: RESr2 29: iobs/PS_FSM_FFd1 + 4: A_FSB<17> 17: SW<1> 30: iobs/PS_FSM_FFd2 + 5: A_FSB<18> 18: cnt/TimeoutB 31: nADoutLE1 + 6: A_FSB<19> 19: cs/nOverlay1 32: nAS_FSB + 7: A_FSB<20> 20: fsb/ASrf 33: nLDS_FSB + 8: A_FSB<21> 21: fsb/BERR0r 34: nUDS_FSB + 9: A_FSB<22> 22: fsb/BERR1r 35: nWE_FSB + 10: A_FSB<23> 23: iobm/IOBERR 36: ram/RAMDIS1 + 11: IPL2r0 24: iobs/BERR 37: ram/RAMDIS2 + 12: IPL2r1 25: iobs/IOACTr 38: ram/RefRAS + 13: RESDone 26: iobs/IORW0 + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +RA<11> .....X.................................. 1 +iobs/PS_FSM_FFd2 XXXXXXXXXX......X.XX....X..XXXXX..X..... 20 +nRAS .......XXX........X............X...XXX.. 8 +nRAMLWE ...............................XX.XXX... 5 +RESDone .............XXX........................ 3 +nRAMUWE ...............................X.XXXX... 5 +iobs/IOREQ XXXXXXXXXX......X.XX....X..XXXXX..X..... 20 +nBERR_FSB ......XXXX.......X..XX.X.......X........ 9 +iobs/IORW1 XXXXXXXXXX......X.XX......XXXXXX..X..... 20 +nBR_IOB ..........XXXXXX........................ 6 +iobs/BERR ...................X..XXX..X.XXX........ 8 +iobs/IORW0 XXXXXXXXXX......X.XX.....XXXXXXX..X..... 21 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + ******************************* Equations ******************************** + +********** Mapped Logic ********** + + +assign $OpTx$FX_DC$591 = (nAS_FSB && !fsb/ASrf); + + +assign CLK20EN = SW[0]; + + +assign CLK25EN = !SW[0]; + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +FDCPE FDCPE_IPL2r0 (IPL2r0,!nIPL2,CLK_FSB,1'b0,1'b0); + +FDCPE FDCPE_IPL2r1 (IPL2r1,IPL2r0,CLK_FSB,1'b0,1'b0); + + +assign RA[0] = ((A_FSB[10] && !ram/RASEL) + || (ram/RASEL && A_FSB[1])); + + +assign RA[1] = ((A_FSB[11] && !ram/RASEL) + || (ram/RASEL && A_FSB[2])); + + +assign RA[2] = ((A_FSB[12] && !ram/RASEL) + || (ram/RASEL && A_FSB[3])); + + +assign RA[3] = ((A_FSB[13] && !ram/RASEL) + || (ram/RASEL && A_FSB[4])); + + +assign RA[4] = ((A_FSB[14] && !ram/RASEL) + || (ram/RASEL && A_FSB[5])); + + +assign RA[5] = ((A_FSB[15] && !ram/RASEL) + || (ram/RASEL && A_FSB[6])); + + +assign RA[6] = ((A_FSB[16] && !ram/RASEL) + || (ram/RASEL && A_FSB[7])); + + +assign RA[7] = ((A_FSB[8] && ram/RASEL) + || (A_FSB[17] && !ram/RASEL)); + + +assign RA[8] = ((A_FSB[9] && !A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && + ram/RASEL) + || (A_FSB[9] && !A_FSB[23] && A_FSB[22] && A_FSB[21] && + !cs/nOverlay1 && ram/RASEL) + || (A_FSB[23] && A_FSB[18]) + || (A_FSB[18] && !ram/RASEL) + || (A_FSB[22] && !A_FSB[21] && A_FSB[18]) + || (A_FSB[22] && A_FSB[18] && cs/nOverlay1) + || (!A_FSB[22] && A_FSB[18] && !cs/nOverlay1)); + + +assign RA[9] = ((A_FSB[20] && ram/RASEL) + || (A_FSB[19] && !ram/RASEL)); + + +assign RA[10] = A_FSB[21]; + + +assign RA[11] = A_FSB[19]; + +FDCPE FDCPE_RESDone (RESDone,1'b1,CLK_FSB,1'b0,1'b0,RESDone_CE); +assign RESDone_CE = (!RESr0 && !RESr1 && RESr2); + +FDCPE FDCPE_RESr0 (RESr0,!nRES,CLK_FSB,1'b0,1'b0); + +FDCPE FDCPE_RESr1 (RESr1,RESr0,CLK_FSB,1'b0,1'b0); + +FDCPE FDCPE_RESr2 (RESr2,RESr1,CLK_FSB,1'b0,1'b0); + +FTCPE FTCPE_cnt/RefCnt0 (cnt/RefCnt[0],1'b1,CLK_FSB,1'b0,1'b0); + +FTCPE FTCPE_cnt/RefCnt1 (cnt/RefCnt[1],cnt/RefCnt[0],CLK_FSB,1'b0,1'b0); + +FTCPE FTCPE_cnt/RefCnt2 (cnt/RefCnt[2],cnt/RefCnt_T[2],CLK_FSB,1'b0,1'b0); +assign cnt/RefCnt_T[2] = (cnt/RefCnt[0] && cnt/RefCnt[1]); + +FTCPE FTCPE_cnt/RefCnt3 (cnt/RefCnt[3],cnt/RefCnt_T[3],CLK_FSB,1'b0,1'b0); +assign cnt/RefCnt_T[3] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[2]); + +FTCPE FTCPE_cnt/RefCnt4 (cnt/RefCnt[4],cnt/RefCnt_T[4],CLK_FSB,1'b0,1'b0); +assign cnt/RefCnt_T[4] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[3] && + cnt/RefCnt[2]); + +FTCPE FTCPE_cnt/RefCnt5 (cnt/RefCnt[5],cnt/RefCnt_T[5],CLK_FSB,1'b0,1'b0); +assign cnt/RefCnt_T[5] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[3] && + cnt/RefCnt[2] && cnt/RefCnt[4]); + +FTCPE FTCPE_cnt/RefCnt6 (cnt/RefCnt[6],cnt/RefCnt_T[6],CLK_FSB,1'b0,1'b0); +assign cnt/RefCnt_T[6] = (cnt/RefCnt[5] && cnt/RefCnt[0] && cnt/RefCnt[1] && + cnt/RefCnt[3] && cnt/RefCnt[2] && cnt/RefCnt[4]); + +FTCPE FTCPE_cnt/RefCnt7 (cnt/RefCnt[7],cnt/RefCnt_T[7],CLK_FSB,1'b0,1'b0); +assign cnt/RefCnt_T[7] = (cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[0] && + cnt/RefCnt[1] && cnt/RefCnt[3] && cnt/RefCnt[2] && cnt/RefCnt[4]); + +FDCPE FDCPE_cnt/RefDone (cnt/RefDone,cnt/RefDone_D,CLK_FSB,1'b0,1'b0); +assign cnt/RefDone_D = ((!cnt/RefDone && !ram/RefRAS) + || (!cnt/RefCnt[5] && !cnt/RefCnt[6] && !cnt/RefCnt[0] && + !cnt/RefCnt[7] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && + !cnt/RefCnt[4])); + +FTCPE FTCPE_cnt/TimeoutA (cnt/TimeoutA,cnt/TimeoutA_T,CLK_FSB,1'b0,1'b0); +assign cnt/TimeoutA_T = ((cnt/TimeoutA && nAS_FSB && !fsb/ASrf) + || (!cnt/TimeoutA && !nAS_FSB && !cnt/RefCnt[5] && + !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && + !cnt/RefCnt[2] && !cnt/RefCnt[4]) + || (!cnt/TimeoutA && !cnt/RefCnt[5] && !cnt/RefCnt[6] && + !cnt/RefCnt[0] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && + !cnt/RefCnt[4] && fsb/ASrf)); + +FTCPE FTCPE_cnt/TimeoutB (cnt/TimeoutB,cnt/TimeoutB_T,CLK_FSB,1'b0,1'b0); +assign cnt/TimeoutB_T = ((cnt/TimeoutB && nAS_FSB && !fsb/ASrf) + || (!cnt/TimeoutB && cnt/TimeoutBPre && !nAS_FSB && + !cnt/RefCnt[5] && !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && + !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4]) + || (!cnt/TimeoutB && cnt/TimeoutBPre && !cnt/RefCnt[5] && + !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && + !cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4] && fsb/ASrf)); + +FTCPE FTCPE_cnt/TimeoutBPre (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,1'b0,1'b0); +assign cnt/TimeoutBPre_T = ((cnt/TimeoutBPre && nAS_FSB && !fsb/ASrf) + || (!cnt/TimeoutBPre && !nAS_FSB && !cnt/RefCnt[5] && + !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && + !cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4]) + || (!cnt/TimeoutBPre && !cnt/RefCnt[5] && !cnt/RefCnt[6] && + !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && + !cnt/RefCnt[2] && !cnt/RefCnt[4] && fsb/ASrf)); + +FTCPE FTCPE_cs/nOverlay0 (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,!nRES,1'b0); +assign cs/nOverlay0_T = ((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && + !cs/nOverlay0 && !nAS_FSB) + || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && + !cs/nOverlay0 && fsb/ASrf)); + +FDCPE FDCPE_cs/nOverlay1 (cs/nOverlay1,cs/nOverlay0,CLK_FSB,1'b0,1'b0,cs/nOverlay1_CE); +assign cs/nOverlay1_CE = (nAS_FSB && !fsb/ASrf); + +FDCPE FDCPE_fsb/ASrf (fsb/ASrf,!nAS_FSB,!CLK_FSB,1'b0,1'b0); + +FDCPE FDCPE_fsb/BERR0r (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,1'b0,1'b0); +assign fsb/BERR0r_D = ((!cnt/TimeoutB && !fsb/BERR0r) + || (nAS_FSB && !fsb/ASrf) + || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && A_FSB[20] && + !fsb/BERR0r)); + +FDCPE FDCPE_fsb/BERR1r (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,1'b0,1'b0); +assign fsb/BERR1r_D = ((!iobs/BERR && !fsb/BERR1r) + || (nAS_FSB && !fsb/ASrf)); + +FDCPE FDCPE_fsb/Ready0r (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,1'b0,1'b0); +assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf) + || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && + !fsb/Ready0r && !ram/RAMReady) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + !cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady)); + +FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,1'b0,1'b0); +assign fsb/Ready1r_D = ((cs/nOverlay0.EXP) + || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady) + || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && + !iobs/IOReady) + || (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && + !iobs/IOReady && !SW[1]) + || (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && + A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && + !fsb/Ready1r && !iobs/IOReady) + || (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && + A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && + !fsb/Ready1r && !iobs/IOReady) + || (nAS_FSB && !fsb/ASrf)); + +FDCPE FDCPE_fsb/Ready2r (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,1'b0,1'b0); +assign fsb/Ready2r_D = ((nAS_FSB && !fsb/ASrf) + || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r) + || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r) + || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r) + || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r) + || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r) + || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r) + || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r) + || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r)); + +FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,CLK_FSB,1'b0,1'b0); +assign fsb/VPA_D = ((EXP15_.EXP) + || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && + !fsb/Ready0r && fsb/VPA && !ram/RAMReady && !$OpTx$FX_DC$591) + || (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && fsb/VPA && + !iobs/IOReady && !SW[1] && !$OpTx$FX_DC$591) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !ram/RAMReady && + !$OpTx$FX_DC$591) + || (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && + A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && + !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591) + || (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && + A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && + !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591) + || (nROMWE_OBUF.EXP) + || (A_FSB[23] && cnt/TimeoutB && fsb/VPA && + !$OpTx$FX_DC$591) + || (!A_FSB[22] && cnt/TimeoutB && fsb/VPA && + !$OpTx$FX_DC$591) + || (A_FSB[21] && cnt/TimeoutB && fsb/VPA && + !$OpTx$FX_DC$591) + || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && + !iobs/IOReady && !$OpTx$FX_DC$591) + || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && + fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591) + || (iobs/BERR && fsb/VPA && !$OpTx$FX_DC$591) + || (fsb/BERR0r && fsb/VPA && !$OpTx$FX_DC$591) + || (fsb/BERR1r && fsb/VPA && !$OpTx$FX_DC$591) + || (fsb/VPA && !nBR_IOB && !$OpTx$FX_DC$591) + || (!A_FSB[20] && cnt/TimeoutB && fsb/VPA && + !$OpTx$FX_DC$591)); + +FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,CLK2X_IOB,1'b0,1'b0); +assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd2) + || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1) + || (!iobm/IOS_FSM_FFd1 && iobm/IOREQr && !nAoutOE)); + +FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/BGr0 (iobm/BGr0,!nBG_IOB,CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/BGr1 (iobm/BGr1,iobm/BGr0,CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,CLK2X_IOB,1'b0,1'b0); + +FTCPE FTCPE_iobm/ES0 (iobm/ES[0],iobm/ES_T[0],CLK2X_IOB,1'b0,1'b0); +assign iobm/ES_T[0] = ((iobm/ES[0] && !iobm/Er && iobm/Er2) + || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && + !iobm/ES[3] && !iobm/ES[4] && iobm/Er) + || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && + !iobm/ES[3] && !iobm/ES[4] && !iobm/Er2)); + +FDCPE FDCPE_iobm/ES1 (iobm/ES[1],iobm/ES_D[1],CLK2X_IOB,1'b0,1'b0); +assign iobm/ES_D[1] = ((iobm/ES[0] && iobm/ES[1]) + || (!iobm/ES[0] && !iobm/ES[1]) + || (!iobm/Er && iobm/Er2)); + +FDCPE FDCPE_iobm/ES2 (iobm/ES[2],iobm/ES_D[2],CLK2X_IOB,1'b0,1'b0); +assign iobm/ES_D[2] = ((!iobm/ES[0] && !iobm/ES[2]) + || (!iobm/ES[1] && !iobm/ES[2]) + || (!iobm/Er && iobm/Er2) + || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2]) + || (!iobm/ES[2] && !iobm/ES[3] && iobm/ES[4])); + +FTCPE FTCPE_iobm/ES3 (iobm/ES[3],iobm/ES_T[3],CLK2X_IOB,1'b0,1'b0); +assign iobm/ES_T[3] = ((iobm/ES[3] && !iobm/Er && iobm/Er2) + || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && iobm/Er) + || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && !iobm/Er2)); + +FTCPE FTCPE_iobm/ES4 (iobm/ES[4],iobm/ES_T[4],CLK2X_IOB,1'b0,1'b0); +assign iobm/ES_T[4] = ((iobm/ES[4] && !iobm/Er && iobm/Er2) + || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && + iobm/ES[3] && iobm/Er) + || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && + iobm/ES[3] && !iobm/Er2) + || (iobm/ES[0] && iobm/ES[1] && !iobm/ES[2] && + !iobm/ES[3] && iobm/ES[4])); + +FDCPE FDCPE_iobm/ETACK (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,1'b0,1'b0); +assign iobm/ETACK_D = (!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && + !iobm/ES[3] && iobm/ES[4]); + +FDCPE FDCPE_iobm/Er (iobm/Er,E_IOB,!CLK_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/Er2 (iobm/Er2,iobm/Er,CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/IOACT (iobm/IOACT,iobm/IOACT_D,CLK2X_IOB,1'b0,1'b0); +assign iobm/IOACT_D = ((CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/DTACKrf && iobm/DTACKrr) + || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/RESrf && iobm/RESrr) + || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) + || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && + !iobm/IOREQr) + || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && nAoutOE) + || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/ETACK) + || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/BERRrf && iobm/BERRrr)); + +FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,CLK2X_IOB,1'b0,1'b0); +assign iobm/IOBERR_T = ((CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && + iobm/RESrr) + || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && + iobm/BERRrr) + || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/DTACKrf && + iobm/DTACKrr) + || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && + iobm/RESrr) + || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && + !iobm/IOS_FSM_FFd2 && iobm/IOBERR) + || (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/ETACK) + || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/ETACK) + || (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/BERRrf && + iobm/BERRrr) + || (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/DTACKrf && + iobm/DTACKrr)); + +FDCPE FDCPE_iobm/IOREQr (iobm/IOREQr,iobs/IOREQ,!CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/IOS_FSM_FFd1 (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,1'b0,1'b0); +assign iobm/IOS_FSM_FFd1_D = ((iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1) + || (!iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd2)); + +FTCPE FTCPE_iobm/IOS_FSM_FFd2 (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,1'b0,1'b0); +assign iobm/IOS_FSM_FFd2_T = ((iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && + !iobm/IOS_FSM_FFd2) + || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/IOS_FSM_FFd2 && iobm/ETACK) + || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/IOS_FSM_FFd2 && iobm/BERRrf && iobm/BERRrr) + || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/IOS_FSM_FFd2 && iobm/DTACKrf && iobm/DTACKrr) + || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && + iobm/IOS_FSM_FFd2 && iobm/RESrf && iobm/RESrr)); + +FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,1'b0,1'b0); +assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2) + || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && + !iobm/IOS_FSM_FFd2) + || (!CLK_IOB && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && + iobm/IOREQr && !nAoutOE)); + +FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES,!CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/RESrr (iobm/RESrr,!nRES,CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,CLK2X_IOB,1'b0,1'b0); + +FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,CLK_FSB,1'b0,1'b0); +assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); + +FTCPE FTCPE_iobs/BERR (iobs/BERR,iobs/BERR_T,CLK_FSB,1'b0,1'b0); +assign iobs/BERR_T = ((iobs/BERR && nAS_FSB && !fsb/ASrf) + || (iobs/Once && iobs/BERR && !iobs/PS_FSM_FFd2 && + !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) + || (iobs/Once && !iobs/BERR && !nAS_FSB && + !iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1) + || (iobs/Once && !iobs/BERR && !iobs/PS_FSM_FFd2 && + !iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1)); + +FDCPE FDCPE_iobs/Clear1 (iobs/Clear1,iobs/Clear1_D,CLK_FSB,1'b0,1'b0); +assign iobs/Clear1_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1); + +FDCPE FDCPE_iobs/IOACTr (iobs/IOACTr,iobm/IOACT,CLK_FSB,1'b0,1'b0); + +FDCPE FDCPE_iobs/IOL0 (iobs/IOL0,iobs/IOL0_D,CLK_FSB,1'b0,1'b0,iobs/IOL0_CE); +assign iobs/IOL0_D = ((!nLDS_FSB && nADoutLE1) + || (iobs/IOL1 && !nADoutLE1)); +assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); + +FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,CLK_FSB,1'b0,1'b0,iobs/Load1); + +FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,CLK_FSB,1'b0,1'b0); +assign iobs/IOREQ_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && nWE_FSB && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && + SW[1] && nADoutLE1) + || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && + !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + cs/nOverlay1 && !iobs/PS_FSM_FFd2 && nADoutLE1) + || (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1) + || (iobs/PS_FSM_FFd1 && iobs/IOACTr) + || (iobs/Once && !iobs/PS_FSM_FFd2 && nADoutLE1) + || (nAS_FSB && !iobs/PS_FSM_FFd2 && !fsb/ASrf && + nADoutLE1) + || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && + !iobs/PS_FSM_FFd2 && nADoutLE1)); + +FTCPE FTCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_T,CLK_FSB,1'b0,1'b0); +assign iobs/IORW0_T = ((A_FSB_19_IBUF$BUF0.EXP) + || (iobs/IORW0 && iobs/IORW1 && !nADoutLE1) + || (!iobs/IORW0 && !iobs/IORW1 && !nADoutLE1) + || (nAS_FSB && !fsb/ASrf && nADoutLE1) + || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !iobs/IORW0 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && nADoutLE1) + || (!A_FSB[23] && !A_FSB[20] && SW[1] && nADoutLE1) + || (!nWE_FSB && !iobs/IORW0 && nADoutLE1) + || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && + nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && nADoutLE1) + || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && + nADoutLE1) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + cs/nOverlay1 && nADoutLE1)); + +FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,CLK_FSB,1'b0,1'b0); +assign iobs/IORW1_T = ((iobs/Once) + || (!nADoutLE1) + || (nBERR_FSB_OBUF.EXP) + || (nAS_FSB && !fsb/ASrf) + || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) + || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) + || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[20]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[19]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[18]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[17]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[16]) + || (nWE_FSB && iobs/IORW1) + || (!nWE_FSB && !iobs/IORW1) + || (!A_FSB[23] && A_FSB[21] && !iobs/IORW1)); + +FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,CLK_FSB,1'b0,1'b0); +assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf) + || (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && + !iobs/IOACTr && iobm/IOBERR && nADoutLE1) + || (iobs/Once && !iobs/IOReady && !nAS_FSB && + !iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) + || (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && + !iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)); + +FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,CLK_FSB,1'b0,1'b0,iobs/IOU0_CE); +assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1) + || (iobs/IOU1 && !nADoutLE1)); +assign iobs/IOU0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); + +FDCPE FDCPE_iobs/IOU1 (iobs/IOU1,!nUDS_FSB,CLK_FSB,1'b0,1'b0,iobs/Load1); + +FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,CLK_FSB,1'b0,1'b0); +assign iobs/Load1_D = ((iobs/Once) + || (!nADoutLE1) + || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[20]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[19]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[17]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[16]) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[18]) + || (!A_FSB[23] && A_FSB[21] && nWE_FSB) + || (!A_FSB[23] && !A_FSB[20] && SW[1]) + || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21]) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + cs/nOverlay1) + || (nAS_FSB && !fsb/ASrf) + || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) + || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)); + +FDCPE FDCPE_iobs/Once (iobs/Once,iobs/Once_D,CLK_FSB,1'b0,1'b0); +assign iobs/Once_D = ((A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd1) + || (!iobs/Once && iobs/PS_FSM_FFd1 && !nADoutLE1) + || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !iobs/Once) + || (!A_FSB[23] && !A_FSB[22] && !iobs/Once && + !cs/nOverlay1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && !iobs/Once) + || (RA_4_OBUF.EXP) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && !iobs/Once) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && !iobs/Once) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && !iobs/Once) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && !iobs/Once) + || (!A_FSB[23] && A_FSB[21] && nWE_FSB && !iobs/Once) + || (nAS_FSB && !fsb/ASrf) + || (A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd2) + || (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd2) + || (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd1) + || (!iobs/Once && iobs/PS_FSM_FFd2 && !nADoutLE1)); + +FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,1'b0,1'b0); +assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2) + || (iobs/PS_FSM_FFd1 && iobs/IOACTr)); + +FDCPE FDCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,1'b0,1'b0); +assign iobs/PS_FSM_FFd2_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && A_FSB[21] && nWE_FSB && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && + !iobs/PS_FSM_FFd1 && SW[1] && nADoutLE1) + || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) + || (iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && + iobs/IOACTr) + || (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && + !iobs/IOACTr) + || (iobs/Once && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && + nADoutLE1) + || (nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && + !fsb/ASrf && nADoutLE1) + || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && + !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)); + + +assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0); + +FDCPE FDCPE_nADoutLE1 (nADoutLE1,nADoutLE1_D,CLK_FSB,1'b0,1'b0); +assign nADoutLE1_D = ((iobs/Load1) + || (!iobs/Clear1 && !nADoutLE1)); + +FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!CLK2X_IOB,1'b0,1'b0); +assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2) + || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)); +assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ; +assign nAS_IOB_OE = !nAoutOE; + +FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,CLK2X_IOB,1'b0,1'b0); +assign nAoutOE_D = ((!iobm/BGr0 && !iobm/BGr1) + || (!iobm/BGr1 && nAoutOE) + || (!nAS_IOB && !iobm/BGr0 && !nAoutOE)); + + +assign nBERR_FSB = ((nAS_FSB) + || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && A_FSB[20] && + !iobs/BERR && !fsb/BERR0r && !fsb/BERR1r) + || (!iobs/BERR && !cnt/TimeoutB && !fsb/BERR0r && + !fsb/BERR1r)); + +FDCPE FDCPE_nBR_IOB (nBR_IOB,1'b0,CLK_FSB,1'b0,1'b0,nBR_IOB_CE); +assign nBR_IOB_CE = (RESr0 && RESr1 && IPL2r0 && RESr2 && !RESDone && + IPL2r1); + +FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!CLK_FSB,1'b0,1'b0); + +FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,1'b0,1'b0); +assign nDTACK_FSB_D = ((EXP18_.EXP) + || (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && + A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && + !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB) + || (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && + A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && + cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && + !nADoutLE1) + || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB) + || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB) + || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB) + || (EXP21_.EXP) + || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && + !iobs/IOReady && nDTACK_FSB) + || (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && + !iobs/IOReady && nDTACK_FSB && !SW[1]) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + !cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) + || (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && + A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && + !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB) + || (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && + A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && + cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && + !nADoutLE1) + || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB) + || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && + A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB) + || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB) + || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB) + || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && + !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && + A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && + A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && + !fsb/Ready2r && nDTACK_FSB)); + +FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!CLK2X_IOB,1'b0,1'b0); +assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2); + + +assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB) + || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && + !nAS_FSB) + || (A_FSB[22] && !A_FSB[21] && nWE_FSB && !nAS_FSB && + !SW[1])); + +FDCPE FDCPE_nDoutOE (nDoutOE,nDoutOE_D,CLK2X_IOB,1'b0,1'b0); +assign nDoutOE_D = ((!iobs/IORW0) + || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2)); + +FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!CLK2X_IOB,1'b0,1'b0); +assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd2) + || (iobs/IOL0 && iobm/IOS_FSM_FFd1 && + iobm/IOS_FSM_FFd2) + || (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && + !iobm/IOS_FSM_FFd1)); +assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ; +assign nLDS_IOB_OE = !nAoutOE; + + +assign nOE = !((nWE_FSB && !nAS_FSB)); + + +assign nRAMLWE = !((!nWE_FSB && !nLDS_FSB && !ram/RAMDIS2 && !nAS_FSB && + !ram/RAMDIS1)); + + +assign nRAMUWE = !((!nWE_FSB && !nUDS_FSB && !ram/RAMDIS2 && !nAS_FSB && + !ram/RAMDIS1)); + + +assign nRAS = !(((ram/RefRAS) + || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && + !ram/RAMDIS2 && !nAS_FSB && !ram/RAMDIS1) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + !cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && !ram/RAMDIS1))); + + +assign nROMCS = !(((A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !A_FSB[20] && + !SW[1]) + || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && + SW[1]) + || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !A_FSB[20] && + !cs/nOverlay1))); + + +assign nROMWE = !((!nWE_FSB && !nAS_FSB)); + +FDCPE FDCPE_nUDS_IOB (nUDS_IOB_I,nUDS_IOB,!CLK2X_IOB,1'b0,1'b0); +assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 && + iobm/IOS_FSM_FFd2) + || (iobs/IOU0 && iobm/IOS_FSM_FFd1 && + iobm/IOS_FSM_FFd2) + || (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && + !iobm/IOS_FSM_FFd1)); +assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ; +assign nUDS_IOB_OE = !nAoutOE; + +FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,1'b0,1'b0); +assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && + !iobm/ES[3] && !iobm/ES[4]) + || (nVMA_IOB && iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && + !iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && + iobm/VPArr)); +assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ; +assign nVMA_IOB_OE = !nAoutOE; + + +assign nVPA_FSB = !((fsb/VPA && !nAS_FSB)); + +FDCPE FDCPE_ram/BACTr (ram/BACTr,ram/BACTr_D,CLK_FSB,1'b0,1'b0); +assign ram/BACTr_D = (nAS_FSB && !fsb/ASrf); + +FTCPE FTCPE_ram/Once (ram/Once,ram/Once_T,CLK_FSB,1'b0,1'b0); +assign ram/Once_T = ((ram/Once && nAS_FSB && !fsb/ASrf) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + !ram/RS_FSM_FFd3) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && + !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + !ram/RS_FSM_FFd3) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && + !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + !ram/RS_FSM_FFd3 && fsb/ASrf)); + +FDCPE FDCPE_ram/RAMDIS1 (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,1'b0,1'b0); +assign ram/RAMDIS1_D = ((RA_1_OBUF.EXP) + || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) + || (!cnt/RefDone && ram/Once && !ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && + cnt/RefCnt[7]) + || (!cnt/RefDone && nAS_FSB && !ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && + !fsb/ASrf) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) + || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) + || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) + || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) + || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3) + || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) + || (A_FSB[23] && !cnt/RefDone && !nAS_FSB && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) + || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) + || (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])); + +FTCPE FTCPE_ram/RAMDIS2 (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,1'b0,1'b0); +assign ram/RAMDIS2_T = ((!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && + ram/Once && !cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && + !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && + cnt/RefCnt[7]) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && + ram/Once && !cs/nOverlay1 && !ram/RAMDIS2 && !ram/RS_FSM_FFd2 && + !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && + fsb/ASrf) + || (ram/RAMDIS2 && nAS_FSB && !fsb/ASrf) + || (!cnt/RefDone && ram/Once && !ram/RAMDIS2 && !nAS_FSB && + ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!cnt/RefDone && ram/Once && !ram/RAMDIS2 && + ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) + || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && + cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && !ram/RS_FSM_FFd2 && + !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && + cs/nOverlay1 && !ram/RAMDIS2 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)); + +FDCPE FDCPE_ram/RAMReady (ram/RAMReady,ram/RAMReady_D,CLK_FSB,1'b0,1'b0); +assign ram/RAMReady_D = ((ram/RS_FSM_FFd2) + || (ram/RS_FSM_FFd3) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !ram/RS_FSM_FFd1 && fsb/ASrf) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && + !ram/RS_FSM_FFd1 && !ram/BACTr) + || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/BACTr) + || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/BACTr) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && + !ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf) + || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf) + || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && + !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && + !cs/nOverlay1 && !ram/RS_FSM_FFd1 && fsb/ASrf) + || (!cnt/RefDone && cnt/RefCnt[5] && cnt/RefCnt[6] && + cnt/RefCnt[7]) + || (A_FSB[23] && !cnt/RefDone && !nAS_FSB && + !ram/RS_FSM_FFd1 && !ram/BACTr) + || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && + !ram/BACTr && fsb/ASrf)); + +FDCPE FDCPE_ram/RASEL (ram/RASEL,ram/RASEL_D,CLK_FSB,1'b0,1'b0); +assign ram/RASEL_D = ((A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) + || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) + || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) + || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && + cnt/RefCnt[7]) + || (EXP26_.EXP) + || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && fsb/ASrf) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) + || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) + || (!ram/RS_FSM_FFd2 && ram/RS_FSM_FFd3) + || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && + !ram/RS_FSM_FFd3) + || (A_FSB[23] && !cnt/RefDone && !nAS_FSB && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) + || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) + || (!cnt/RefDone && nAS_FSB && !ram/RS_FSM_FFd2 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && !fsb/ASrf)); + +FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,CLK_FSB,1'b0,1'b0); +assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && + ram/Once && !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && + ram/Once && !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) + || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && + cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) + || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) + || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3) + || (!cnt/RefDone && !nAS_FSB && ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) + || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && + cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])); + +FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,CLK_FSB,1'b0,1'b0); +assign ram/RS_FSM_FFd2_D = ((!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + !cnt/RefCnt[5] && ram/BACTr) + || (!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + !cnt/RefCnt[6] && ram/BACTr) + || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + !cnt/RefCnt[5] && !fsb/ASrf) + || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + !cnt/RefCnt[7] && !fsb/ASrf) + || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + !cnt/RefCnt[6] && !fsb/ASrf) + || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && + !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) + || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && + !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && + !cs/nOverlay1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) + || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) + || (cnt/RefDone && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) + || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) + || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) + || (!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && + !cnt/RefCnt[7] && ram/BACTr)); + +FDCPE FDCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_D,CLK_FSB,1'b0,1'b0); +assign ram/RS_FSM_FFd3_D = ((!cnt/RefDone && !nAS_FSB && ram/RS_FSM_FFd1 && + !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && + cnt/RefCnt[7]) + || (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && + !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && + fsb/ASrf) + || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && + cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && + cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && + !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && + !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && + cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) + || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) + || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && + !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && + !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) + || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && + !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf)); + +FDCPE FDCPE_ram/RefRAS (ram/RefRAS,ram/RefRAS_D,CLK_FSB,1'b0,1'b0); +assign ram/RefRAS_D = (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2); + +Register Legend: + FDCPE (Q,D,C,CLR,PRE,CE); + FTCPE (Q,D,C,CLR,PRE,CE); + LDCP (Q,D,G,CLR,PRE); + + ****************************** Device Pin Out ***************************** + +Device : XC95144XL-10-TQ100 + + + -------------------------------------------------- + /100 98 96 94 92 90 88 86 84 82 80 78 76 \ + | 99 97 95 93 91 89 87 85 83 81 79 77 | + | 1 75 | + | 2 74 | + | 3 73 | + | 4 72 | + | 5 71 | + | 6 70 | + | 7 69 | + | 8 68 | + | 9 67 | + | 10 66 | + | 11 65 | + | 12 64 | + | 13 XC95144XL-10-TQ100 63 | + | 14 62 | + | 15 61 | + | 16 60 | + | 17 59 | + | 18 58 | + | 19 57 | + | 20 56 | + | 21 55 | + | 22 54 | + | 23 53 | + | 24 52 | + | 25 51 | + | 27 29 31 33 35 37 39 41 43 45 47 49 | + \26 28 30 32 34 36 38 40 42 44 46 48 50 / + -------------------------------------------------- + + +Pin Signal Pin Signal +No. Name No. Name + 1 KPR 51 VCC + 2 A_FSB<5> 52 RA<7> + 3 A_FSB<6> 53 RA<0> + 4 A_FSB<7> 54 RA<8> + 5 VCC 55 RA<10> + 6 A_FSB<8> 56 RA<9> + 7 A_FSB<9> 57 VCC + 8 A_FSB<10> 58 CLK25EN + 9 A_FSB<11> 59 CLK20EN + 10 A_FSB<12> 60 SW<1> + 11 A_FSB<13> 61 SW<0> + 12 A_FSB<14> 62 GND + 13 A_FSB<15> 63 RA<11> + 14 A_FSB<16> 64 nRAS + 15 A_FSB<17> 65 nRAMLWE + 16 A_FSB<18> 66 nRAMUWE + 17 A_FSB<19> 67 KPR + 18 A_FSB<20> 68 KPR + 19 A_FSB<21> 69 GND + 20 A_FSB<22> 70 nBERR_FSB + 21 GND 71 KPR + 22 CLK2X_IOB 72 nBR_IOB + 23 CLK_IOB 73 nBG_IOB + 24 A_FSB<23> 74 nVMA_IOB + 25 E_IOB 75 GND + 26 VCC 76 nBERR_IOB + 27 CLK_FSB 77 nVPA_IOB + 28 nDTACK_FSB 78 nDTACK_IOB + 29 nWE_FSB 79 nLDS_IOB + 30 nLDS_FSB 80 nUDS_IOB + 31 GND 81 nAS_IOB + 32 nAS_FSB 82 nADoutLE1 + 33 nUDS_FSB 83 TDO + 34 nROMWE 84 GND + 35 nROMCS 85 nADoutLE0 + 36 nCAS 86 nDinLE + 37 nOE 87 nAoutOE + 38 VCC 88 VCC + 39 KPR 89 nDoutOE + 40 RA<4> 90 nDinOE + 41 RA<3> 91 nRES + 42 RA<5> 92 nIPL2 + 43 RA<2> 93 nVPA_FSB + 44 GND 94 A_FSB<1> + 45 TDI 95 A_FSB<2> + 46 RA<6> 96 A_FSB<3> + 47 TMS 97 A_FSB<4> + 48 TCK 98 VCC + 49 KPR 99 KPR + 50 RA<1> 100 GND + + +Legend : NC = Not Connected, unbonded pin + PGND = Unused I/O configured as additional Ground pin + TIE = Unused I/O floating -- must tie to VCC, GND or other signal + KPR = Unused I/O with weak keeper (leave unconnected) + VCC = Dedicated Power Pin + GND = Dedicated Ground Pin + TDI = Test Data In, JTAG pin + TDO = Test Data Out, JTAG pin + TCK = Test Clock, JTAG pin + TMS = Test Mode Select, JTAG pin + PROHIBITED = User reserved pin + **************************** Compiler Options **************************** + +Following is a list of all global compiler options used by the fitter run. + +Device(s) Specified : xc95144xl-10-TQ100 +Optimization Method : SPEED +Multi-Level Logic Optimization : ON +Ignore Timing Specifications : OFF +Default Register Power Up Value : LOW +Keep User Location Constraints : ON +What-You-See-Is-What-You-Get : OFF +Exhaustive Fitting : OFF +Keep Unused Inputs : OFF +Slew Rate : FAST +Power Mode : STD +Ground on Unused IOs : OFF +Set I/O Pin Termination : KEEPER +Global Clock Optimization : ON +Global Set/Reset Optimization : ON +Global Ouput Enable Optimization : ON +Input Limit : 54 +Pterm Limit : 50 diff --git a/cpld/XC95144XL/MXSE.lfp b/cpld/XC95144XL/WarpSE.stx similarity index 100% rename from cpld/XC95144XL/MXSE.lfp rename to cpld/XC95144XL/WarpSE.stx diff --git a/cpld/XC95144XL/MXSE.syr b/cpld/XC95144XL/WarpSE.syr similarity index 82% rename from cpld/XC95144XL/MXSE.syr rename to cpld/XC95144XL/WarpSE.syr index 21736cd..50a806d 100644 --- a/cpld/XC95144XL/MXSE.syr +++ b/cpld/XC95144XL/WarpSE.syr @@ -4,15 +4,15 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. Total REAL time to Xst completion: 1.00 secs -Total CPU time to Xst completion: 0.96 secs +Total CPU time to Xst completion: 0.84 secs --> Parameter xsthdpdir set to xst Total REAL time to Xst completion: 1.00 secs -Total CPU time to Xst completion: 0.98 secs +Total CPU time to Xst completion: 0.87 secs ---> Reading design: MXSE.prj +--> Reading design: WarpSE.prj TABLE OF CONTENTS 1) Synthesis Options Summary @@ -31,17 +31,17 @@ TABLE OF CONTENTS * Synthesis Options Summary * ========================================================================= ---- Source Parameters -Input File Name : "MXSE.prj" +Input File Name : "WarpSE.prj" Input Format : mixed Ignore Synthesis Constraint File : NO ---- Target Parameters -Output File Name : "MXSE" +Output File Name : "WarpSE" Output Format : NGC Target Device : XC9500XL CPLDs ---- Source Options -Top Module Name : MXSE +Top Module Name : WarpSE Automatic FSM Extraction : YES FSM Encoding Algorithm : Auto Safe Implementation : No @@ -56,8 +56,8 @@ Equivalent register Removal : YES ---- General Options Optimization Goal : Speed -Optimization Effort : 1 -Keep Hierarchy : Yes +Optimization Effort : 2 +Keep Hierarchy : No Netlist Hierarchy : As_Optimized RTL Output : Yes Hierarchy Separator : / @@ -86,17 +86,17 @@ Compiling verilog file "../CS.v" in library work Module compiled Compiling verilog file "../CNT.v" in library work Module compiled -Compiling verilog file "../MXSE.v" in library work +Compiling verilog file "../WarpSE.v" in library work Module compiled -Module compiled +Module compiled No errors in compilation -Analysis of file <"MXSE.prj"> succeeded. +Analysis of file <"WarpSE.prj"> succeeded. ========================================================================= * Design Hierarchy Analysis * ========================================================================= -Analyzing hierarchy for module in library . +Analyzing hierarchy for module in library . Analyzing hierarchy for module in library . @@ -114,8 +114,8 @@ Analyzing hierarchy for module in library . ========================================================================= * HDL Analysis * ========================================================================= -Analyzing top module . -Module is correct for synthesis. +Analyzing top module . +Module is correct for synthesis. Analyzing module in library . Module is correct for synthesis. @@ -284,8 +284,8 @@ Synthesizing Unit . Unit synthesized. -Synthesizing Unit . - Related source file is "../MXSE.v". +Synthesizing Unit . + Related source file is "../WarpSE.v". WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. Found 1-bit tristate buffer for signal . Found 1-bit tristate buffer for signal . @@ -301,7 +301,7 @@ WARNING:Xst:647 - Input > is never used. This port will be preserved and l Summary: inferred 7 D-type flip-flop(s). inferred 4 Tristate(s). -Unit synthesized. +Unit synthesized. ========================================================================= @@ -347,17 +347,17 @@ Optimizing FSM on signal with johnson encoding. 01 | 10 ------------------- Analyzing FSM for best encoding. -Optimizing FSM on signal with user encoding. +Optimizing FSM on signal with compact encoding. ------------------- State | Encoding ------------------- 000 | 000 010 | 010 - 101 | 101 - 001 | 001 + 101 | 001 + 001 | 101 011 | 011 - 100 | 100 - 111 | 111 + 100 | 111 + 111 | 100 110 | 110 ------------------- WARNING:Xst:1426 - The value init of the FF/Latch 0 hinder the constant cleaning in the block RESDone. @@ -381,12 +381,12 @@ Macro Statistics ========================================================================= * Low Level Synthesis * ========================================================================= -WARNING:Xst:1426 - The value init of the FF/Latch RESDone hinder the constant cleaning in the block MXSE. +WARNING:Xst:1426 - The value init of the FF/Latch RESDone hinder the constant cleaning in the block WarpSE. You should achieve better results by setting this init to 1. -WARNING:Xst:1426 - The value init of the FF/Latch Disable hinder the constant cleaning in the block MXSE. +WARNING:Xst:1426 - The value init of the FF/Latch Disable hinder the constant cleaning in the block WarpSE. You should achieve better results by setting this init to 1. -Optimizing unit ... +Optimizing unit ... implementation constraint: INIT=r : RESr0 implementation constraint: INIT=r : RESr1 implementation constraint: INIT=r : RESr2 @@ -394,51 +394,39 @@ Optimizing unit ... implementation constraint: INIT=r : IPL2r1 implementation constraint: INIT=r : Disable implementation constraint: INIT=r : RESDone - -Optimizing unit ... - implementation constraint: INIT=r : nOverlay0 - implementation constraint: INIT=r : nOverlay1 - -Optimizing unit ... - implementation constraint: INIT=r : RAMReady - implementation constraint: INIT=r : RASEL - implementation constraint: INIT=r : RAMDIS1 - implementation constraint: INIT=r : RefRAS - implementation constraint: INIT=r : RAMDIS2 - implementation constraint: INIT=r : Once - implementation constraint: INIT=r : RS_FSM_FFd1 - implementation constraint: INIT=r : RS_FSM_FFd2 - implementation constraint: INIT=r : RS_FSM_FFd3 - -Optimizing unit ... - implementation constraint: INIT=r : IOACTr - implementation constraint: INIT=r : PS_FSM_FFd2 - implementation constraint: INIT=r : Once - implementation constraint: INIT=r : PS_FSM_FFd1 - -Optimizing unit ... - implementation constraint: INIT=r : ASrf - -Optimizing unit ... - implementation constraint: INIT=r : IOREQr - implementation constraint: INIT=r : ETACK - implementation constraint: INIT=r : BGr0 - implementation constraint: INIT=r : BGr1 - implementation constraint: INIT=r : BG - implementation constraint: INIT=r : IOS_FSM_FFd1 - implementation constraint: INIT=r : IOS_FSM_FFd2 - implementation constraint: INIT=r : IOS_FSM_FFd3 - -Optimizing unit ... - implementation constraint: INIT=r : RefDone - implementation constraint: INIT=r : RefCnt_7 - implementation constraint: INIT=r : RefCnt_6 - implementation constraint: INIT=r : RefCnt_5 - implementation constraint: INIT=r : RefCnt_4 - implementation constraint: INIT=r : RefCnt_3 - implementation constraint: INIT=r : RefCnt_2 - implementation constraint: INIT=r : RefCnt_1 - implementation constraint: INIT=r : RefCnt_0 + implementation constraint: INIT=r : ram/RAMReady + implementation constraint: INIT=r : ram/RASEL + implementation constraint: INIT=r : ram/RAMDIS1 + implementation constraint: INIT=r : ram/RefRAS + implementation constraint: INIT=r : ram/RAMDIS2 + implementation constraint: INIT=r : ram/Once + implementation constraint: INIT=r : iobs/IOACTr + implementation constraint: INIT=r : ram/RS_FSM_FFd1 + implementation constraint: INIT=r : iobs/Once + implementation constraint: INIT=r : cs/nOverlay0 + implementation constraint: INIT=r : cs/nOverlay1 + implementation constraint: INIT=r : iobs/PS_FSM_FFd1 + implementation constraint: INIT=r : iobs/PS_FSM_FFd2 + implementation constraint: INIT=r : iobm/ETACK + implementation constraint: INIT=r : iobm/BGr0 + implementation constraint: INIT=r : iobm/BGr1 + implementation constraint: INIT=r : iobm/BG + implementation constraint: INIT=r : iobm/IOREQr + implementation constraint: INIT=r : fsb/ASrf + implementation constraint: INIT=r : ram/RS_FSM_FFd2 + implementation constraint: INIT=r : cnt/RefDone + implementation constraint: INIT=r : cnt/RefCnt_0 + implementation constraint: INIT=r : cnt/RefCnt_1 + implementation constraint: INIT=r : cnt/RefCnt_2 + implementation constraint: INIT=r : cnt/RefCnt_3 + implementation constraint: INIT=r : cnt/RefCnt_4 + implementation constraint: INIT=r : cnt/RefCnt_5 + implementation constraint: INIT=r : cnt/RefCnt_6 + implementation constraint: INIT=r : cnt/RefCnt_7 + implementation constraint: INIT=r : ram/RS_FSM_FFd3 + implementation constraint: INIT=r : iobm/IOS_FSM_FFd1 + implementation constraint: INIT=r : iobm/IOS_FSM_FFd2 + implementation constraint: INIT=r : iobm/IOS_FSM_FFd3 ========================================================================= * Partition Report * @@ -455,11 +443,11 @@ Partition Implementation Status * Final Report * ========================================================================= Final Results -RTL Top Level Output File Name : MXSE.ngr -Top Level Output File Name : MXSE +RTL Top Level Output File Name : WarpSE.ngr +Top Level Output File Name : WarpSE Output Format : NGC Optimization Goal : Speed -Keep Hierarchy : Yes +Keep Hierarchy : No Target Technology : XC9500XL CPLDs Macro Preserve : YES XOR Preserve : YES @@ -470,20 +458,20 @@ Design Statistics # IOs : 75 Cell Usage : -# BELS : 606 -# AND2 : 168 -# AND3 : 27 -# AND4 : 12 -# AND5 : 1 -# AND6 : 2 +# BELS : 596 +# AND2 : 165 +# AND3 : 25 +# AND4 : 15 +# AND5 : 3 +# AND6 : 1 # AND7 : 1 # AND8 : 3 -# GND : 7 -# INV : 260 -# OR2 : 99 -# OR3 : 11 +# GND : 1 +# INV : 265 +# OR2 : 98 +# OR3 : 5 # OR4 : 1 -# VCC : 2 +# VCC : 1 # XOR2 : 12 # FlipFlops/Latches : 89 # FD : 60 @@ -497,12 +485,12 @@ Cell Usage : ========================================================================= -Total REAL time to Xst completion: 29.00 secs -Total CPU time to Xst completion: 29.19 secs +Total REAL time to Xst completion: 39.00 secs +Total CPU time to Xst completion: 38.76 secs --> -Total memory usage is 205076 kilobytes +Total memory usage is 236884 kilobytes Number of errors : 0 ( 0 filtered) Number of warnings : 5 ( 0 filtered) diff --git a/cpld/XC95144XL/WarpSE.tim b/cpld/XC95144XL/WarpSE.tim new file mode 100644 index 0000000..45fff9d --- /dev/null +++ b/cpld/XC95144XL/WarpSE.tim @@ -0,0 +1,919 @@ + Performance Summary Report + -------------------------- + +Design: WarpSE +Device: XC95144XL-10-TQ100 +Speed File: Version 3.0 +Program: Timing Report Generator: version P.20131013 +Date: Mon Mar 28 09:28:06 2022 + +Timing Constraint Summary: + +TS_CLK_IOB=PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS N/A +TS_CLK_FSB=PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS Met +TS_CLK2X_IOB=PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS Met + +Performance Summary: + +Pad to Pad (tPD) : 11.0ns (1 macrocell levels) +Pad 'A_FSB<11>' to Pad 'RA<1>' + +Clock net 'CLK_IOB' path delays: + +Setup to Clock at the Pad (tSU) : 6.5ns (0 macrocell levels) +Data signal 'E_IOB' to DFF D input Pin at 'iobm/Er.D' +Clock pad 'CLK_IOB' (GCK) + + Minimum Clock Period: 9.0ns + Maximum Internal Clock Speed: 111.1Mhz + (Limited by Clock Pulse Width) + +Clock net 'CLK_FSB' path delays: + +Clock Pad to Output Pad (tCO) : 14.5ns (2 macrocell levels) +Clock Pad 'CLK_FSB' to Output Pad 'RA<1>' (GCK) + +Clock to Setup (tCYC) : 20.1ns (2 macrocell levels) +Clock to Q, net 'cs/nOverlay1.Q' to DFF Setup(D) at 'fsb/VPA.D' (GCK) +Target FF drives output net 'fsb/VPA' + +Setup to Clock at the Pad (tSU) : 16.6ns (1 macrocell levels) +Data signal 'A_FSB<23>' to DFF D input Pin at 'fsb/VPA.D' +Clock pad 'CLK_FSB' (GCK) + + Minimum Clock Period: 20.1ns + Maximum Internal Clock Speed: 49.7Mhz + (Limited by Cycle Time) + +Clock net 'CLK2X_IOB' path delays: + +Clock Pad to Output Pad (tCO) : 14.5ns (2 macrocell levels) +Clock Pad 'CLK2X_IOB' to Output Pad 'nVMA_IOB' (GCK) + +Clock to Setup (tCYC) : 11.0ns (1 macrocell levels) +Clock to Q, net 'iobm/IOS_FSM_FFd3.Q' to DFF Setup(D) at 'IOACT.D' (GCK) +Target FF drives output net 'IOACT' + +Setup to Clock at the Pad (tSU) : 7.5ns (0 macrocell levels) +Data signal 'CLK_IOB' to DFF D input Pin at 'IOACT.D' +Clock pad 'CLK2X_IOB' (GCK) + + Minimum Clock Period: 11.0ns + Maximum Internal Clock Speed: 90.9Mhz + (Limited by Cycle Time) + +-------------------------------------------------------------------------------- + Pad to Pad (tPD) (nsec) + +\ From A A A A A A A A A A A + \ _ _ _ _ _ _ _ _ _ _ _ + \ F F F F F F F F F F F + \ S S S S S S S S S S S + \ B B B B B B B B B B B + \ < < < < < < < < < < < + \ 1 1 1 1 1 1 1 1 1 1 1 + \ 0 1 2 3 4 5 6 7 8 9 > + \ > > > > > > > > > > + To \------------------------------------------------------------------ + +CLK20EN +CLK25EN +RA<0> 10.0 10.0 +RA<10> +RA<11> 10.0 +RA<1> 11.0 +RA<2> 11.0 +RA<3> 10.0 +RA<4> 11.0 +RA<5> 11.0 +RA<6> 10.0 +RA<7> 10.0 +RA<8> 10.0 +RA<9> 10.0 +nBERR_FSB +nDinOE +nOE +nRAMLWE +nRAMUWE +nRAS +nROMCS +nROMWE +nVPA_FSB + +-------------------------------------------------------------------------------- + Pad to Pad (tPD) (nsec) + +\ From A A A A A A A A A A A + \ _ _ _ _ _ _ _ _ _ _ _ + \ F F F F F F F F F F F + \ S S S S S S S S S S S + \ B B B B B B B B B B B + \ < < < < < < < < < < < + \ 2 2 2 2 2 3 4 5 6 7 8 + \ 0 1 2 3 > > > > > > > + \ > > > > + To \------------------------------------------------------------------ + +CLK20EN +CLK25EN +RA<0> +RA<10> 10.0 +RA<11> +RA<1> 11.0 +RA<2> 11.0 +RA<3> 10.0 +RA<4> 11.0 +RA<5> 11.0 +RA<6> 10.0 +RA<7> 10.0 +RA<8> 11.0 11.0 11.0 +RA<9> 10.0 +nBERR_FSB 11.0 11.0 11.0 11.0 +nDinOE 10.0 10.0 10.0 10.0 +nOE +nRAMLWE +nRAMUWE +nRAS 11.0 11.0 11.0 +nROMCS 11.0 11.0 11.0 11.0 +nROMWE +nVPA_FSB + +-------------------------------------------------------------------------------- + Pad to Pad (tPD) (nsec) + +\ From A S S n n n n + \ _ W W A L U W + \ F < < S D D E + \ S 0 1 _ S S _ + \ B > > F _ _ F + \ < S F F S + \ 9 B S S B + \ > B B + \ + To \------------------------------------------ + +CLK20EN 10.0 +CLK25EN 10.0 +RA<0> +RA<10> +RA<11> +RA<1> +RA<2> +RA<3> +RA<4> +RA<5> +RA<6> +RA<7> +RA<8> 11.0 +RA<9> +nBERR_FSB 10.0 +nDinOE 10.0 10.0 10.0 +nOE 10.0 10.0 +nRAMLWE 10.0 10.0 10.0 +nRAMUWE 11.0 11.0 11.0 +nRAS 11.0 +nROMCS 11.0 +nROMWE 10.0 10.0 +nVPA_FSB 10.0 + +-------------------------------------------------------------------------------- + Clock Pad to Output Pad (tCO) (nsec) + +\ From C C + \ L L + \ K K + \ 2 _ + \ X F + \ _ S + \ I B + \ O + \ B + \ + To \------------ + +RA<0> 13.5 +RA<1> 14.5 +RA<2> 14.5 +RA<3> 13.5 +RA<4> 14.5 +RA<5> 14.5 +RA<6> 13.5 +RA<7> 13.5 +RA<8> 14.5 +RA<9> 13.5 +nADoutLE0 13.5 13.5 +nADoutLE1 5.8 +nAS_IOB 14.5 +nAoutOE 5.8 +nBERR_FSB 14.5 +nBR_IOB 5.8 +nCAS 5.8 +nDTACK_FSB 5.8 +nDinLE 5.8 +nDoutOE 5.8 +nLDS_IOB 14.5 +nRAMLWE 13.5 +nRAMUWE 14.5 +nRAS 14.5 +nROMCS 14.5 +nUDS_IOB 14.5 +nVMA_IOB 14.5 +nVPA_FSB 13.5 + +-------------------------------------------------------------------------------- + Setup to Clock at Pad (tSU or tSUF) (nsec) + +\ From C C C + \ L L L + \ K K K + \ 2 _ _ + \ X F I + \ _ S O + \ I B B + \ O + \ B + \ + To \------------------ + +A_FSB<10> 7.9 +A_FSB<11> 7.9 +A_FSB<12> 7.9 +A_FSB<13> 7.9 +A_FSB<14> 7.9 +A_FSB<15> 7.9 +A_FSB<16> 7.9 +A_FSB<17> 7.9 +A_FSB<18> 7.9 +A_FSB<19> 7.9 +A_FSB<20> 15.6 +A_FSB<21> 16.6 +A_FSB<22> 16.6 +A_FSB<23> 16.6 +A_FSB<8> 7.9 +A_FSB<9> 7.9 +CLK_IOB 7.5 +E_IOB 6.5 +SW<1> 7.9 +nAS_FSB 15.6 +nBERR_IOB 7.5 +nBG_IOB 6.5 +nDTACK_IOB 6.5 +nIPL2 6.5 +nLDS_FSB 6.5 +nRES 6.5 6.5 +nUDS_FSB 6.5 +nVPA_IOB 6.5 +nWE_FSB 7.9 + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK_FSB) + +\ From B I I I R R R R R T + \ E O P P E E E E e i + \ R R L L S S S S f m + \ R W 2 2 D r r r A e + \ _ 0 r r o 0 1 2 c o + \ I . 0 1 n . . . k u + \ O Q . . e Q Q Q . t + \ B Q Q . Q A + \ S Q . + \ . Q + \ Q + \ + \ + \ + \ + \ + \ + \ + To \------------------------------------------------------------ + +ALE0S.D +BERR_IOBS.D 10.0 +IOL0.CE +IOL0.D +IOREQ.D +IORW0.D 11.4 +IOU0.CE +IOU0.D +IPL2r1.D 10.0 +RESDone.CE 10.0 10.0 10.0 +RESr1.D 10.0 +RESr2.D 10.0 +RefAck.D +TimeoutA.D 10.0 +TimeoutB.D +cnt/RefCnt<1>.D +cnt/RefCnt<2>.D +cnt/RefCnt<3>.D +cnt/RefCnt<4>.D +cnt/RefCnt<5>.D +cnt/RefCnt<6>.D +cnt/RefCnt<7>.D +cnt/RefDone.D 10.0 +cnt/TimeoutBPre.D +cs/nOverlay0.D +cs/nOverlay1.CE +cs/nOverlay1.D +fsb/BERR0r.D +fsb/BERR1r.D 10.0 +fsb/Ready0r.D +fsb/Ready1r.D +fsb/Ready2r.D 11.0 +fsb/VPA.D 11.4 11.4 +iobs/Clear1.D +iobs/IOL1.CE +iobs/IORW1.D +iobs/IOReady.D +iobs/IOU1.CE +iobs/Load1.D +iobs/Once.D +iobs/PS_FSM_FFd1.D +iobs/PS_FSM_FFd2.D +nADoutLE1.D +nBR_IOB.CE 10.0 10.0 10.0 10.0 10.0 10.0 +nCAS.D +nDTACK_FSB.D 11.4 11.4 +ram/BACTr.D +ram/Once.D +ram/RAMDIS1.D +ram/RAMDIS2.D +ram/RAMReady.D +ram/RASEL.D +ram/RS_FSM_FFd1.D +ram/RS_FSM_FFd2.D +ram/RS_FSM_FFd3.D + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK_FSB) + +\ From T c c c c c c c c c + \ i n n n n n n n n n + \ m t t t t t t t t t + \ e / / / / / / / / / + \ o R R R R R R R R R + \ u e e e e e e e e e + \ t f f f f f f f f f + \ B C C C C C C C C D + \ . n n n n n n n n o + \ Q t t t t t t t t n + \ < < < < < < < < e + \ 0 1 2 3 4 5 6 7 . + \ > > > > > > > > Q + \ . . . . . . . . + \ Q Q Q Q Q Q Q Q + \ + \ + \ + To \------------------------------------------------------------ + +ALE0S.D +BERR_IOBS.D +IOL0.CE +IOL0.D +IOREQ.D +IORW0.D +IOU0.CE +IOU0.D +IPL2r1.D +RESDone.CE +RESr1.D +RESr2.D +RefAck.D +TimeoutA.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 +TimeoutB.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 +cnt/RefCnt<1>.D 10.0 +cnt/RefCnt<2>.D 10.0 10.0 +cnt/RefCnt<3>.D 10.0 10.0 10.0 +cnt/RefCnt<4>.D 10.0 10.0 10.0 10.0 +cnt/RefCnt<5>.D 10.0 10.0 10.0 10.0 10.0 +cnt/RefCnt<6>.D 10.0 10.0 10.0 10.0 10.0 10.0 +cnt/RefCnt<7>.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 +cnt/RefDone.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 +cnt/TimeoutBPre.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 +cs/nOverlay0.D +cs/nOverlay1.CE +cs/nOverlay1.D +fsb/BERR0r.D 10.0 +fsb/BERR1r.D +fsb/Ready0r.D +fsb/Ready1r.D +fsb/Ready2r.D +fsb/VPA.D 19.1 +iobs/Clear1.D +iobs/IOL1.CE +iobs/IORW1.D +iobs/IOReady.D +iobs/IOU1.CE +iobs/Load1.D +iobs/Once.D +iobs/PS_FSM_FFd1.D +iobs/PS_FSM_FFd2.D +nADoutLE1.D +nBR_IOB.CE +nCAS.D +nDTACK_FSB.D 19.1 +ram/BACTr.D +ram/Once.D +ram/RAMDIS1.D 11.4 11.4 11.4 11.4 +ram/RAMDIS2.D 11.0 11.0 11.0 11.0 +ram/RAMReady.D 11.4 11.4 11.4 11.4 +ram/RASEL.D 11.4 11.4 11.4 11.4 +ram/RS_FSM_FFd1.D +ram/RS_FSM_FFd2.D 11.4 11.4 11.4 11.4 +ram/RS_FSM_FFd3.D 11.0 11.0 11.0 11.0 + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK_FSB) + +\ From c c c f f f f f f f + \ n s s s s s s s s s + \ t / / b b b b b b b + \ / n n / / / / / / / + \ T O O A B B R R R V + \ i v v S E E e e e P + \ m e e r R R a a a A + \ e r r f R R d d d . + \ o l l . 0 1 y y y Q + \ u a a Q r r 0 1 2 + \ t y y . . r r r + \ B 0 1 Q Q . . . + \ P . . Q Q Q + \ r Q Q + \ e + \ . + \ Q + \ + To \------------------------------------------------------------ + +ALE0S.D +BERR_IOBS.D 10.0 +IOL0.CE +IOL0.D +IOREQ.D 11.0 10.0 +IORW0.D 10.0 11.0 +IOU0.CE +IOU0.D +IPL2r1.D +RESDone.CE +RESr1.D +RESr2.D +RefAck.D +TimeoutA.D 10.0 +TimeoutB.D 10.0 10.0 +cnt/RefCnt<1>.D +cnt/RefCnt<2>.D +cnt/RefCnt<3>.D +cnt/RefCnt<4>.D +cnt/RefCnt<5>.D +cnt/RefCnt<6>.D +cnt/RefCnt<7>.D +cnt/RefDone.D +cnt/TimeoutBPre.D 10.0 10.0 +cs/nOverlay0.D 10.0 10.0 +cs/nOverlay1.CE 10.0 +cs/nOverlay1.D 10.0 +fsb/BERR0r.D 10.0 10.0 +fsb/BERR1r.D 10.0 10.0 +fsb/Ready0r.D 10.0 10.0 10.0 +fsb/Ready1r.D 11.0 10.0 11.0 +fsb/Ready2r.D 11.0 11.0 11.0 +fsb/VPA.D 20.1 19.1 11.4 11.4 20.1 11.4 11.4 11.4 +iobs/Clear1.D +iobs/IOL1.CE +iobs/IORW1.D 11.4 11.0 +iobs/IOReady.D 10.0 +iobs/IOU1.CE +iobs/Load1.D 11.0 10.0 +iobs/Once.D 11.4 10.0 +iobs/PS_FSM_FFd1.D +iobs/PS_FSM_FFd2.D 11.0 10.0 +nADoutLE1.D +nBR_IOB.CE +nCAS.D +nDTACK_FSB.D 20.1 11.0 11.4 11.4 20.1 11.4 11.4 +ram/BACTr.D 10.0 +ram/Once.D 10.0 10.0 +ram/RAMDIS1.D 11.4 11.0 +ram/RAMDIS2.D 11.0 11.0 +ram/RAMReady.D 11.0 11.0 +ram/RASEL.D 11.4 11.4 +ram/RS_FSM_FFd1.D 10.0 10.0 +ram/RS_FSM_FFd2.D 11.4 11.4 +ram/RS_FSM_FFd3.D 11.0 11.0 + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK_FSB) + +\ From i i i i i i i i i i + \ o o o o o o o o o o + \ b b b b b b b b b b + \ s s s s s s s s s s + \ / / / / / / / / / / + \ C I I I I I L O P P + \ l O O O O O o n S S + \ e A L R R U a c _ _ + \ a C 1 W e 1 d e F F + \ r T . 1 a . 1 . S S + \ 1 r Q . d Q . Q M M + \ . . Q y Q _ _ + \ Q Q . F F + \ Q F F + \ d d + \ 1 2 + \ . . + \ Q Q + To \------------------------------------------------------------ + +ALE0S.D 10.0 10.0 +BERR_IOBS.D 10.0 10.0 10.0 +IOL0.CE 10.0 10.0 +IOL0.D 10.0 +IOREQ.D 10.0 10.0 10.0 11.0 +IORW0.D 11.0 11.4 11.4 11.4 +IOU0.CE 10.0 10.0 +IOU0.D 10.0 +IPL2r1.D +RESDone.CE +RESr1.D +RESr2.D +RefAck.D +TimeoutA.D +TimeoutB.D +cnt/RefCnt<1>.D +cnt/RefCnt<2>.D +cnt/RefCnt<3>.D +cnt/RefCnt<4>.D +cnt/RefCnt<5>.D +cnt/RefCnt<6>.D +cnt/RefCnt<7>.D +cnt/RefDone.D +cnt/TimeoutBPre.D +cs/nOverlay0.D +cs/nOverlay1.CE +cs/nOverlay1.D +fsb/BERR0r.D +fsb/BERR1r.D +fsb/Ready0r.D +fsb/Ready1r.D 11.0 +fsb/Ready2r.D +fsb/VPA.D 11.4 +iobs/Clear1.D 10.0 10.0 +iobs/IOL1.CE 10.0 +iobs/IORW1.D 10.0 10.0 11.0 11.0 +iobs/IOReady.D 10.0 10.0 10.0 10.0 +iobs/IOU1.CE 10.0 +iobs/Load1.D 10.0 10.0 10.0 +iobs/Once.D 11.4 11.0 10.0 +iobs/PS_FSM_FFd1.D 10.0 10.0 10.0 +iobs/PS_FSM_FFd2.D 10.0 10.0 11.0 11.0 +nADoutLE1.D 10.0 10.0 +nBR_IOB.CE +nCAS.D +nDTACK_FSB.D 11.4 +ram/BACTr.D +ram/Once.D +ram/RAMDIS1.D +ram/RAMDIS2.D +ram/RAMReady.D +ram/RASEL.D +ram/RS_FSM_FFd1.D +ram/RS_FSM_FFd2.D +ram/RS_FSM_FFd3.D + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK_FSB) + +\ From n n n r r r r r r r + \ A B D a a a a a a a + \ D R T m m m m m m m + \ o _ A / / / / / / / + \ u I C B O R R R R R + \ t O K A n A A A S S + \ L B _ C c M M S _ _ + \ E . F T e D R E F F + \ 1 Q S r . I e L S S + \ . B . Q S a . M M + \ Q . Q 2 d Q _ _ + \ Q . y F F + \ Q . F F + \ Q d d + \ 1 2 + \ . . + \ Q Q + \ + To \------------------------------------------------------------ + +ALE0S.D +BERR_IOBS.D 10.0 +IOL0.CE +IOL0.D 10.0 +IOREQ.D 11.0 +IORW0.D 11.4 +IOU0.CE +IOU0.D 10.0 +IPL2r1.D +RESDone.CE +RESr1.D +RESr2.D +RefAck.D 10.0 10.0 +TimeoutA.D +TimeoutB.D +cnt/RefCnt<1>.D +cnt/RefCnt<2>.D +cnt/RefCnt<3>.D +cnt/RefCnt<4>.D +cnt/RefCnt<5>.D +cnt/RefCnt<6>.D +cnt/RefCnt<7>.D +cnt/RefDone.D +cnt/TimeoutBPre.D +cs/nOverlay0.D +cs/nOverlay1.CE +cs/nOverlay1.D +fsb/BERR0r.D +fsb/BERR1r.D +fsb/Ready0r.D 10.0 +fsb/Ready1r.D 11.0 +fsb/Ready2r.D +fsb/VPA.D 11.0 11.4 20.1 +iobs/Clear1.D 10.0 +iobs/IOL1.CE +iobs/IORW1.D 10.0 +iobs/IOReady.D 10.0 +iobs/IOU1.CE +iobs/Load1.D 10.0 +iobs/Once.D 11.0 +iobs/PS_FSM_FFd1.D +iobs/PS_FSM_FFd2.D 11.0 +nADoutLE1.D 10.0 +nBR_IOB.CE +nCAS.D 10.0 +nDTACK_FSB.D 11.0 11.4 11.4 20.1 +ram/BACTr.D +ram/Once.D 10.0 10.0 10.0 +ram/RAMDIS1.D 11.0 11.0 11.4 11.0 +ram/RAMDIS2.D 11.0 11.0 11.0 11.0 +ram/RAMReady.D 11.0 11.0 11.0 11.0 +ram/RASEL.D 11.0 11.4 11.4 11.4 +ram/RS_FSM_FFd1.D 10.0 10.0 10.0 +ram/RS_FSM_FFd2.D 11.0 11.4 11.4 +ram/RS_FSM_FFd3.D 10.0 11.0 11.0 + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK_FSB) + +\ From r + \ a + \ m + \ / + \ R + \ S + \ _ + \ F + \ S + \ M + \ _ + \ F + \ F + \ d + \ 3 + \ . + \ Q + \ + To \------ + +ALE0S.D +BERR_IOBS.D +IOL0.CE +IOL0.D +IOREQ.D +IORW0.D +IOU0.CE +IOU0.D +IPL2r1.D +RESDone.CE +RESr1.D +RESr2.D +RefAck.D +TimeoutA.D +TimeoutB.D +cnt/RefCnt<1>.D +cnt/RefCnt<2>.D +cnt/RefCnt<3>.D +cnt/RefCnt<4>.D +cnt/RefCnt<5>.D +cnt/RefCnt<6>.D +cnt/RefCnt<7>.D +cnt/RefDone.D +cnt/TimeoutBPre.D +cs/nOverlay0.D +cs/nOverlay1.CE +cs/nOverlay1.D +fsb/BERR0r.D +fsb/BERR1r.D +fsb/Ready0r.D +fsb/Ready1r.D +fsb/Ready2r.D +fsb/VPA.D +iobs/Clear1.D +iobs/IOL1.CE +iobs/IORW1.D +iobs/IOReady.D +iobs/IOU1.CE +iobs/Load1.D +iobs/Once.D +iobs/PS_FSM_FFd1.D +iobs/PS_FSM_FFd2.D +nADoutLE1.D +nBR_IOB.CE +nCAS.D +nDTACK_FSB.D +ram/BACTr.D +ram/Once.D 10.0 +ram/RAMDIS1.D 11.0 +ram/RAMDIS2.D 11.0 +ram/RAMReady.D 11.0 +ram/RASEL.D 11.0 +ram/RS_FSM_FFd1.D 10.0 +ram/RS_FSM_FFd2.D 11.4 +ram/RS_FSM_FFd3.D 11.0 + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK2X_IOB) + +\ From I I i i i i i i i i + \ O O o o o o o o o o + \ A B b b b b b b b b + \ C E m m m m m m m m + \ T R / / / / / / / / + \ . R B B B B D D E E + \ Q . E E G G T T S S + \ Q R R r r A A < < + \ R R 0 1 C C 0 1 + \ r r . . K K > > + \ f r Q Q r r . . + \ . . f r Q Q + \ Q Q . . + \ Q Q + \ + \ + \ + \ + \ + To \------------------------------------------------------------ + +ALE0M.D +IOACT.D 10.0 10.0 11.0 11.0 +IOBERR.D 11.0 11.0 11.0 11.0 11.0 +iobm/BGr1.D 10.0 +iobm/ES<0>.D 10.0 10.0 +iobm/ES<1>.D 10.0 10.0 +iobm/ES<2>.D 10.0 10.0 +iobm/ES<3>.D 10.0 10.0 +iobm/ES<4>.D 10.0 10.0 +iobm/ETACK.D 10.0 10.0 +iobm/IOS_FSM_FFd1.D +iobm/IOS_FSM_FFd2.D 10.0 10.0 10.0 10.0 +iobm/IOS_FSM_FFd3.D +nAS_IOB.D +nAoutOE.D 10.0 10.0 +nDinLE.D +nDoutOE.D +nLDS_IOB.D +nUDS_IOB.D +nVMA_IOB.D 10.0 10.0 10.0 + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK2X_IOB) + +\ From i i i i i i i i i i + \ o o o o o o o o o o + \ b b b b b b b b b b + \ m m m m m m m m m m + \ / / / / / / / / / / + \ E E E E E I I I I R + \ S S S T r O O O O E + \ < < < A 2 R S S S S + \ 2 3 4 C . E _ _ _ r + \ > > > K Q Q F F F f + \ . . . . r S S S . + \ Q Q Q Q . M M M Q + \ Q _ _ _ + \ F F F + \ F F F + \ d d d + \ 1 2 3 + \ . . . + \ Q Q Q + To \------------------------------------------------------------ + +ALE0M.D 10.0 10.0 10.0 10.0 +IOACT.D 10.0 10.0 11.0 10.0 11.0 11.0 +IOBERR.D 10.0 11.0 11.0 11.0 11.0 +iobm/BGr1.D +iobm/ES<0>.D 10.0 10.0 10.0 10.0 +iobm/ES<1>.D 10.0 +iobm/ES<2>.D 10.0 10.0 10.0 10.0 +iobm/ES<3>.D 10.0 10.0 10.0 +iobm/ES<4>.D 10.0 10.0 10.0 10.0 +iobm/ETACK.D 10.0 10.0 10.0 +iobm/IOS_FSM_FFd1.D 10.0 10.0 10.0 +iobm/IOS_FSM_FFd2.D 10.0 10.0 10.0 10.0 10.0 +iobm/IOS_FSM_FFd3.D 10.0 10.0 10.0 10.0 +nAS_IOB.D 10.0 10.0 10.0 +nAoutOE.D +nDinLE.D 10.0 10.0 +nDoutOE.D 10.0 10.0 +nLDS_IOB.D 10.0 10.0 10.0 +nUDS_IOB.D 10.0 10.0 10.0 +nVMA_IOB.D 10.0 10.0 10.0 + +-------------------------------------------------------------------------------- + Clock to Setup (tCYC) (nsec) + (Clock: CLK2X_IOB) + +\ From i i i n n n + \ o o o A A V + \ b b b S o M + \ m m m _ u A + \ / / / I t _ + \ R V V O O I + \ E P P B E O + \ S A A . . B + \ r r r Q Q . + \ r f r Q + \ . . . + \ Q Q Q + \ + \ + \ + \ + \ + \ + \ + To \------------------------------------ + +ALE0M.D 10.0 +IOACT.D 11.0 10.0 +IOBERR.D 11.0 +iobm/BGr1.D +iobm/ES<0>.D +iobm/ES<1>.D +iobm/ES<2>.D +iobm/ES<3>.D +iobm/ES<4>.D +iobm/ETACK.D 10.0 +iobm/IOS_FSM_FFd1.D +iobm/IOS_FSM_FFd2.D 10.0 +iobm/IOS_FSM_FFd3.D 10.0 +nAS_IOB.D +nAoutOE.D 10.0 10.0 +nDinLE.D +nDoutOE.D +nLDS_IOB.D +nUDS_IOB.D +nVMA_IOB.D 10.0 10.0 10.0 + +Path Type Definition: + +Pad to Pad (tPD) - Reports pad to pad paths that start + at input pads and end at output pads. + Paths are not traced through + registers. + +Clock Pad to Output Pad (tCO) - Reports paths that start at input + pads trace through clock inputs of + registers and end at output pads. + Paths are not traced through PRE/CLR + inputs of registers. + +Setup to Clock at Pad (tSU or tSUF) - Reports external setup time of data + to clock at pad. Data path starts at + an input pad and ends at register + (Fast Input Register for tSUF) D/T + input. Clock path starts at input pad + and ends at the register clock input. + Paths are not traced through + registers. Pin-to-pin setup + requirement is not reported or + guaranteed for product-term clocks + derived from macrocell feedback + signals. + +Clock to Setup (tCYC) - Register to register cycle time. + Include source register tCO and + destination register tSU. Note that + when the computed Maximum Clock Speed + is limited by tCYC it is computed + assuming that all registers are + rising-edge sensitive. + diff --git a/cpld/XC95144XL/MXSE.tspec b/cpld/XC95144XL/WarpSE.tspec similarity index 65% rename from cpld/XC95144XL/MXSE.tspec rename to cpld/XC95144XL/WarpSE.tspec index cda732a..a315bc9 100644 --- a/cpld/XC95144XL/MXSE.tspec +++ b/cpld/XC95144XL/WarpSE.tspec @@ -13,141 +13,137 @@ TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd2.D:666 TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd2.D:666 TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd2.D:666 TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:IOBERR.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/IOBERR.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOBERR.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOACT.D:666 +TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOACT.D:666 +TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:ram/RefRAS.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefDone.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefDone.D:400 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/Once.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/Once.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/Once.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/Once.D:400 TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/Once.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/Once.D:400 TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/Once.D:400 -TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:RefAck.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefDone.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/RefDone.D:400 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Once.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:400 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:400 +TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Once.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:400 TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:BERR_IOBS.D:400 -TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:BERR_IOBS.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:BERR_IOBS.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:BERR_IOBS.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:BERR_IOBS.D:400 -TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:BERR_IOBS.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IORW0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IORW0.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:IORW0.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IORW0.D:400 -TS_CLK_FSB:FROM:IORW0.Q:TO:IORW0.D:400 -TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:IORW0.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IORW0.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IORW0.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/BERR.D:400 +TS_CLK_FSB:FROM:iobs/BERR.Q:TO:iobs/BERR.D:400 +TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/BERR.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/BERR.D:400 +TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/BERR.D:400 +TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/BERR.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IORW0.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW0.D:400 +TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW0.D:400 +TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW0.D:400 +TS_CLK_FSB:FROM:iobs/IORW0.Q:TO:iobs/IORW0.D:400 +TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:iobs/IORW0.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IORW0.D:400 +TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IORW0.D:400 TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay0.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay0.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOL0.D:400 -TS_CLK_FSB:FROM:iobs/IOL1.Q:TO:IOL0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOL0.CE:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOL0.CE:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOU0.D:400 -TS_CLK_FSB:FROM:iobs/IOU1.Q:TO:IOU0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOU0.CE:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOU0.CE:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:TimeoutA.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutA.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:TimeoutB.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:TimeoutB.D:400 -TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:TimeoutB.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutA.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/TimeoutA.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutB.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/TimeoutB.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:cnt/TimeoutB.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cnt/TimeoutBPre.D:400 TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:cnt/TimeoutBPre.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/TimeoutBPre.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/TimeoutBPre.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/TimeoutBPre.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/TimeoutBPre.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/TimeoutBPre.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/TimeoutBPre.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/TimeoutBPre.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/TimeoutBPre.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/TimeoutBPre.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/TimeoutBPre.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/TimeoutBPre.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/TimeoutBPre.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/TimeoutBPre.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR0r.D:400 -TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/BERR0r.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutB.Q:TO:fsb/BERR0r.D:400 TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/BERR0r.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR1r.D:400 -TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/BERR1r.D:400 +TS_CLK_FSB:FROM:iobs/BERR.Q:TO:fsb/BERR1r.D:400 TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/BERR1r.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready0r.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready0r.D:400 TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/Ready0r.D:400 TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/Ready0r.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/Ready1r.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready1r.D:400 +TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/Ready1r.D:400 TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/Ready1r.D:400 TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/Ready1r.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready1r.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready2r.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready2r.D:400 -TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/Ready2r.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutA.Q:TO:fsb/Ready2r.D:400 TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/Ready2r.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/VPA.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutA.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:fsb/VPA.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/VPA.D:400 +TS_CLK_FSB:FROM:iobs/BERR.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/VPA.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutB.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:Park.Q:TO:fsb/VPA.D:400 +TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/VPA.D:400 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/VPA.D:400 +TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOL0.D:400 +TS_CLK_FSB:FROM:iobs/IOL1.Q:TO:iobs/IOL0.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOL0.CE:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IOL0.CE:400 TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOL1.CE:400 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW1.D:400 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW1.D:400 @@ -162,69 +158,77 @@ TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IOReady.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOReady.D:400 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOReady.D:400 TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/IOReady.D:400 +TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOU0.D:400 +TS_CLK_FSB:FROM:iobs/IOU1.Q:TO:iobs/IOU0.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOU0.CE:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IOU0.CE:400 TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOU1.CE:400 -TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS2.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS2.D:400 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS2.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS2.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS2.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS2.D:400 +TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS2.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS2.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS2.D:400 TS_CLK_FSB:FROM:ram/RAMDIS2.Q:TO:ram/RAMDIS2.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS2.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:TimeoutA.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:nDTACK_FSB_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:Park.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:TimeoutB.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd1.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS2.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:iobs/BERR.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutB.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:Park.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:fsb/nDTACK.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:cnt/TimeoutA.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/nDTACK.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd1.D:400 +TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd1.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd1.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd1.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd1.D:400 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd1.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd1.D:400 TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd1.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd1.D:400 +TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd2.D:400 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd3.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd3.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd3.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd3.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd3.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:400 +TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:400 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd3.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd2.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd2.D:400 @@ -233,30 +237,37 @@ TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/PS_FSM_FFd2.D:400 TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd2.D:400 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/PS_FSM_FFd2.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/PS_FSM_FFd2.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<5>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<5>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<5>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<5>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<5>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<6>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<6>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<6>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<6>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<6>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<6>.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd1.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd1.D:400 TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<5>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<5>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<5>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<5>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<5>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<6>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<6>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<6>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<6>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<6>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<6>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<7>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefCnt<7>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<7>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<7>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<7>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<7>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<7>.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<1>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<2>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<2>.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<3>.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<3>.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<3>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<2>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<2>.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<4>.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<4>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<4>.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<4>.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<4>.D:400 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Load1.D:400 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Load1.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Load1.D:400 @@ -265,55 +276,48 @@ TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Load1.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Load1.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/BACTr.D:400 TS_CLK_FSB:FROM:RESr0.Q:TO:RESr1.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<7>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<7>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefCnt<7>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<7>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<7>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<7>.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<7>.D:400 TS_CLK_FSB:FROM:RESr1.Q:TO:RESr2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:RefAck.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:RefAck.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RefRAS.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RefRAS.D:400 TS_CLK_FSB:FROM:RESr0.Q:TO:RESDone.CE:400 TS_CLK_FSB:FROM:RESr1.Q:TO:RESDone.CE:400 TS_CLK_FSB:FROM:RESr2.Q:TO:RESDone.CE:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:ALE0S.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:ALE0S.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOREQ.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOREQ.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IOREQ.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOREQ.D:400 -TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:IOREQ.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:IOREQ.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IOREQ.D:400 TS_CLK_FSB:FROM:IPL2r0.Q:TO:IPL2r1.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/ALE0.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/ALE0.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Clear1.D:400 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Clear1.D:400 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Clear1.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS1.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOREQ.D:400 +TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOREQ.D:400 +TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IOREQ.D:400 +TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IOREQ.D:400 +TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/IOREQ.D:400 +TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IOREQ.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IOREQ.D:400 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS1.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMDIS1.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS1.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS1.D:400 +TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS1.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS1.D:400 TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMReady.D:400 TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMReady.D:400 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMReady.D:400 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RASEL.Q:TO:nCAS_OBUF.D:400 +TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:400 +TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMReady.D:400 +TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMReady.D:400 +TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMReady.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMReady.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMReady.D:400 +TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMReady.D:400 +TS_CLK_FSB:FROM:ram/RASEL.Q:TO:ram/nCAS.D:400 TS_CLK_FSB:FROM:RESr0.Q:TO:Park.CE:400 TS_CLK_FSB:FROM:RESr1.Q:TO:Park.CE:400 TS_CLK_FSB:FROM:IPL2r0.Q:TO:Park.CE:400 @@ -323,24 +327,24 @@ TS_CLK_FSB:FROM:IPL2r1.Q:TO:Park.CE:400 TS_CLK_FSB:FROM:iobs/Load1.Q:TO:nADoutLE1_OBUF.D:400 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1_OBUF.D:400 TS_CLK_FSB:FROM:iobs/Clear1.Q:TO:nADoutLE1_OBUF.D:400 -TS_CLK2X_IOB:FROM:nVMA_IOBout.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:IOACT.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:nVMA_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nAS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nAS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nAS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nLDS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nLDS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nLDS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nUDS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nUDS_IOBout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nUDS_IOBout.D:666 +TS_CLK2X_IOB:FROM:iobm/nVMA.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/IOACT.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:iobm/nVMA.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nASout.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nASout.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nASout.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nLDS.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nLDS.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nLDS.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nUDS.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nUDS.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nUDS.D:666 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd1.D:666 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd1.D:666 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:666 @@ -370,23 +374,23 @@ TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<4>.D:666 TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<4>.D:666 TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<4>.D:666 TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<4>.D:666 -TS_CLK2X_IOB:FROM:nVMA_IOBout.Q:TO:iobm/ETACK.D:666 +TS_CLK2X_IOB:FROM:iobm/nVMA.Q:TO:iobm/ETACK.D:666 TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ETACK.D:666 TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ETACK.D:666 TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ETACK.D:666 TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ETACK.D:666 TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ETACK.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:ALE0M.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:ALE0M.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:ALE0M.D:666 -TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:ALE0M.D:666 -TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:ALE0M.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/ALE0.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/ALE0.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/ALE0.D:666 +TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:iobm/ALE0.D:666 +TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/ALE0.D:666 TS_CLK2X_IOB:FROM:iobm/BGr0.Q:TO:iobm/BGr1.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nDinLE_OBUF.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDinLE_OBUF.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDoutOE_OBUF.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nDoutOE_OBUF.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nDinLE.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nDinLE.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nDoutOE.D:666 +TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nDoutOE.D:666 TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:nAoutOE_OBUF.D:666 TS_CLK2X_IOB:FROM:iobm/BGr1.Q:TO:nAoutOE_OBUF.D:666 TS_CLK2X_IOB:FROM:iobm/BGr0.Q:TO:nAoutOE_OBUF.D:666 -TS_CLK2X_IOB:FROM:nAS_IOBout.Q:TO:nAoutOE_OBUF.D:666 +TS_CLK2X_IOB:FROM:iobm/nASout.Q:TO:nAoutOE_OBUF.D:666 diff --git a/cpld/XC95144XL/WarpSE.vm6 b/cpld/XC95144XL/WarpSE.vm6 new file mode 100644 index 0000000..ca40c63 --- /dev/null +++ b/cpld/XC95144XL/WarpSE.vm6 @@ -0,0 +1,8813 @@ +NDS Database: version P.20131013 + +NDS_INFO | xc9500xl | 95144XL100 | XC95144XL-10-TQ100 + +DEVICE | 95144XL | 95144XL100 | + +NETWORK | WarpSE | 0 | 0 | 16391 + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_9_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<9> | 9892 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_8_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<8> | 9893 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_15_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<15> | 9894 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_14_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<14> | 9895 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_13_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<13> | 9896 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_12_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<12> | 9897 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_11_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<11> | 9898 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_10_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<10> | 9899 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_23_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<23> | 9900 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_22_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<22> | 9901 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_21_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<21> | 9902 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_20_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<20> | 9903 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_19_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<19> | 9904 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_18_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<18> | 9905 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_17_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<17> | 9906 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_16_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<16> | 9907 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | CLK2X_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | CLK2X_IOB | 9908 | PI | 426 | 0 | WarpSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV + +MACROCELL_INSTANCE | PrldLow+Tff+PinTrst+OptxMapped | iobm/nVMA | WarpSE_COPY_0_COPY_0 | 2155893760 | 11 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nVMA | 9710 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOACT | 9790 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/VPArf | 9808 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/VPArr | 9809 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | iobm/nVMA$Q | 9709 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/nVMA | 9710 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | iobm/nVMA$OE | 9711 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | iobm/nVMA.SI | iobm/nVMA | 0 | 10 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nVMA | 9710 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOACT | 9790 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/VPArf | 9808 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/VPArr | 9809 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/nVMA.D1 | 9932 | ? | 504 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/nVMA.D2 | 9933 | ? | 504 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_FALSE | iobm/nVMA | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> +SPPTERM | 9 | IV_TRUE | iobm/nVMA | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | iobm/nVMA.TRST | 9935 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG + +SRFF_INSTANCE | iobm/nVMA.REG | iobm/nVMA | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/nVMA.D | 9931 | ? | 504 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/nVMA.Q | 9936 | ? | 520 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +BUF_INSTANCE | iobm/nVMA.BUFOE | iobm/nVMA | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | iobm/nVMA.TRST | 9935 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | iobm/nVMA.BUFOE.OUT | 9934 | ? | 0 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.BUFOE | 0 | 10 | BUF_OUT + +MACROCELL_INSTANCE | PrldLow+PinTrst+OptxMapped+Ce | iobm/nASout | WarpSE_COPY_0_COPY_0 | 2424325120 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | iobm/nASout$Q | 9712 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/nASout | 9713 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | iobm/nASout$OE | 9714 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | iobm/nASout.SI | iobm/nASout | 0 | 4 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/nASout.D1 | 9938 | ? | 506 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/nASout.D2 | 9939 | ? | 506 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | iobm/nASout.TRST | 9941 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG + +SRFF_INSTANCE | iobm/nASout.REG | iobm/nASout | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/nASout.D | 9937 | ? | 506 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/nASout.Q | 9942 | ? | 536 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +BUF_INSTANCE | iobm/nASout.BUFOE | iobm/nASout | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | iobm/nASout.TRST | 9941 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | iobm/nASout.BUFOE.OUT | 9940 | ? | 0 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.BUFOE | 0 | 10 | BUF_OUT + +MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | iobm/nLDS | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOL0 | 9739 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | iobm/nLDS | 9715 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | iobm/nLDS$OE | 9716 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | iobm/nLDS.SI | iobm/nLDS | 0 | 6 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOL0 | 9739 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/nLDS.D1 | 9944 | ? | 508 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/nLDS.D2 | 9945 | ? | 508 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobs/IOL0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | iobs/IOL0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/IOL0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | iobm/nLDS.TRST | 9947 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG + +SRFF_INSTANCE | iobm/nLDS.REG | iobm/nLDS | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/nLDS.D | 9943 | ? | 508 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/nLDS.Q | 9948 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +BUF_INSTANCE | iobm/nLDS.BUFOE | iobm/nLDS | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | iobm/nLDS.TRST | 9947 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | iobm/nLDS.BUFOE.OUT | 9946 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.BUFOE | 0 | 10 | BUF_OUT + +MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | iobm/nUDS | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOU0 | 9744 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | iobm/nUDS | 9717 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | iobm/nUDS$OE | 9718 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | iobm/nUDS.SI | iobm/nUDS | 0 | 6 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOU0 | 9744 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/nUDS.D1 | 9950 | ? | 509 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/nUDS.D2 | 9951 | ? | 509 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobs/IOU0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | iobs/IOU0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/IOU0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | iobm/nUDS.TRST | 9953 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG + +SRFF_INSTANCE | iobm/nUDS.REG | iobm/nUDS | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/nUDS.D | 9949 | ? | 509 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/nUDS.Q | 9954 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +BUF_INSTANCE | iobm/nUDS.BUFOE | iobm/nUDS | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | iobm/nUDS.TRST | 9953 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | iobm/BG +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | iobm/nUDS.BUFOE.OUT | 9952 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.BUFOE | 0 | 10 | BUF_OUT + +INPUT_INSTANCE | 0 | 0 | NULL | nWE_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nWE_FSB | 9909 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | CLK_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | CLK_FSB | 9910 | PI | 427 | 0 | WarpSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV +NODE | CLK_FSB_IBUF/FCLK- | 9721 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | cnt/RefDone | WarpSE_COPY_0_COPY_0 | 2155873536 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefRAS | 9792 | ? | 437 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefDone.SI | cnt/RefDone | 0 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefRAS | 9792 | ? | 437 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefDone.D1 | 9956 | ? | 437 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefDone.D2 | 9957 | ? | 437 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RefRAS +SPPTERM | 8 | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<4> + +SRFF_INSTANCE | cnt/RefDone.REG | cnt/RefDone | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefDone.D | 9955 | ? | 437 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefDone.Q | 9958 | ? | 499 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | nAS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nAS_FSB | 9915 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/Once | WarpSE_COPY_0_COPY_0 | 2155877376 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/Once.SI | ram/Once | 0 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/Once.D1 | 9960 | ? | 439 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/Once.D2 | 9961 | ? | 439 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | ram/Once | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf +SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | ram/Once.REG | ram/Once | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/Once.D | 9959 | ? | 439 | 0 | ram/Once | NULL | NULL | ram/Once.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/Once.Q | 9962 | ? | 499 | 0 | ram/Once | NULL | NULL | ram/Once.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | SW_1_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | SW<1> | 9920 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Once | WarpSE_COPY_0_COPY_0 | 2155873536 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nOE_OBUF.EXP | 10466 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP25_.EXP | 10467 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/Once.SI | iobs/Once | 0 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nOE_OBUF.EXP | 10466 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP25_.EXP | 10467 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/Once.D1 | 9964 | ? | 440 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/Once.D2 | 9965 | ? | 440 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nOE_OBUF.EXP +SPPTERM | 1 | IV_TRUE | EXP25_.EXP +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 +SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/ALE1 + +SRFF_INSTANCE | iobs/Once.REG | iobs/Once | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/Once.D | 9963 | ? | 440 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/Once.Q | 9966 | ? | 497 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay0 | 9729 | ? | 445 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 3 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay0 | 9729 | ? | 445 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cs/nOverlay1.D1 | 9968 | ? | 441 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cs/nOverlay1.D2 | 9969 | ? | 441 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cs/nOverlay0 +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cs/nOverlay1.CE | 9970 | ? | 442 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf + +SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cs/nOverlay1.D | 9967 | ? | 441 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cs/nOverlay1.CE | 9970 | ? | 442 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cs/nOverlay1.Q | 9971 | ? | 499 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/BERR | WarpSE_COPY_0_COPY_0 | 2155877376 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/BERR.SI | iobs/BERR | 0 | 8 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/BERR.D1 | 9973 | ? | 443 | 4096 | iobs/BERR | NULL | NULL | iobs/BERR.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/BERR.D2 | 9974 | ? | 443 | 4096 | iobs/BERR | NULL | NULL | iobs/BERR.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobs/BERR | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/BERR | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/BERR | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/BERR | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 + +SRFF_INSTANCE | iobs/BERR.REG | iobs/BERR | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/BERR.D | 9972 | ? | 443 | 0 | iobs/BERR | NULL | NULL | iobs/BERR.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/BERR.Q | 9975 | ? | 467 | 0 | iobs/BERR | NULL | NULL | iobs/BERR.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW0 | WarpSE_COPY_0_COPY_0 | 2155877632 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP32_.EXP | 10518 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP37_.EXP | 10530 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP37_.EXP | EXP37_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IORW0.SI | iobs/IORW0 | 0 | 12 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP32_.EXP | 10518 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP37_.EXP | 10530 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP37_.EXP | EXP37_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IORW0.D1 | 9977 | ? | 444 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IORW0.D2 | 9978 | ? | 444 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP32_.EXP +SPPTERM | 1 | IV_TRUE | EXP37_.EXP +SPPTERM | 3 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | iobs/ALE1 + +SRFF_INSTANCE | iobs/IORW0.REG | iobs/IORW0 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IORW0.D | 9976 | ? | 444 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IORW0.Q | 9979 | ? | 535 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | nRES_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nRES | 9911 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay0 | WarpSE_COPY_0_COPY_0 | 2155877376 | 20 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay0 | 9729 | ? | 445 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cs/nOverlay0 | 9729 | ? | 445 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | cs/nOverlay0.EXP | 10442 | ? | 453 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | cs/nOverlay0.SI | cs/nOverlay0 | 0 | 19 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay0 | 9729 | ? | 445 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cs/nOverlay0.D1 | 9981 | ? | 445 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cs/nOverlay0.D2 | 9982 | ? | 445 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_FALSE | nAS_FSB_IBUF +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_TRUE | fsb/ASrf +OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | cs/nOverlay0.RSTF | 9983 | ? | 446 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | nRES_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | cs/nOverlay0.EXP | 10427 | ? | 453 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1 +SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1 + +SRFF_INSTANCE | cs/nOverlay0.REG | cs/nOverlay0 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cs/nOverlay0.D | 9980 | ? | 445 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 3 | 8 | SRFF_R +SIGNAL | NODE | cs/nOverlay0.RSTF | 9983 | ? | 446 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | nRES_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cs/nOverlay0.Q | 9984 | ? | 445 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/TimeoutA | WarpSE_COPY_0_COPY_0 | 2155877376 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/TimeoutA.SI | cnt/TimeoutA | 0 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/TimeoutA.D1 | 9986 | ? | 447 | 4096 | cnt/TimeoutA | NULL | NULL | cnt/TimeoutA.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/TimeoutA.D2 | 9987 | ? | 447 | 4096 | cnt/TimeoutA | NULL | NULL | cnt/TimeoutA.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | cnt/TimeoutA | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 9 | IV_FALSE | cnt/TimeoutA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<4> +SPPTERM | 9 | IV_FALSE | cnt/TimeoutA | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<4> | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | cnt/TimeoutA.REG | cnt/TimeoutA | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/TimeoutA.D | 9985 | ? | 447 | 0 | cnt/TimeoutA | NULL | NULL | cnt/TimeoutA.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/TimeoutA.Q | 9988 | ? | 467 | 0 | cnt/TimeoutA | NULL | NULL | cnt/TimeoutA.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/TimeoutB | WarpSE_COPY_0_COPY_0 | 2155877376 | 14 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutBPre | 9732 | ? | 449 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK20EN_OBUF | 9844 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | cnt/TimeoutB.EXP | 10501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.EXP | cnt/TimeoutB | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | cnt/TimeoutB.SI | cnt/TimeoutB | 0 | 13 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutBPre | 9732 | ? | 449 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK20EN_OBUF | 9844 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/TimeoutB.D1 | 9990 | ? | 448 | 4096 | cnt/TimeoutB | NULL | NULL | cnt/TimeoutB.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/TimeoutB.D2 | 9991 | ? | 448 | 4096 | cnt/TimeoutB | NULL | NULL | cnt/TimeoutB.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | cnt/TimeoutB | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 11 | IV_FALSE | cnt/TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<4> +SPPTERM | 11 | IV_FALSE | cnt/TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<4> | IV_TRUE | fsb/ASrf +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | cnt/TimeoutB.EXP | 10489 | ? | 0 | 0 | cnt/TimeoutB | NULL | NULL | cnt/TimeoutB.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | CLK20EN_OBUF + +SRFF_INSTANCE | cnt/TimeoutB.REG | cnt/TimeoutB | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/TimeoutB.D | 9989 | ? | 448 | 0 | cnt/TimeoutB | NULL | NULL | cnt/TimeoutB.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/TimeoutB.Q | 9992 | ? | 467 | 0 | cnt/TimeoutB | NULL | NULL | cnt/TimeoutB.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/TimeoutBPre | WarpSE_COPY_0_COPY_0 | 2155877376 | 18 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutBPre | 9732 | ? | 449 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/TimeoutBPre | 9732 | ? | 449 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | cnt/TimeoutBPre.EXP | 10497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.EXP | cnt/TimeoutBPre | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | cnt/TimeoutBPre.SI | cnt/TimeoutBPre | 0 | 17 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutBPre | 9732 | ? | 449 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/TimeoutBPre.D1 | 9994 | ? | 449 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/TimeoutBPre.D2 | 9995 | ? | 449 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | cnt/TimeoutBPre | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<4> +SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<4> | IV_TRUE | fsb/ASrf +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | cnt/TimeoutBPre.EXP | 10485 | ? | 0 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/RASEL +SPPTERM | 6 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/RASEL + +SRFF_INSTANCE | cnt/TimeoutBPre.REG | cnt/TimeoutBPre | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/TimeoutBPre.D | 9993 | ? | 449 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/TimeoutBPre.Q | 9996 | ? | 449 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR0r | WarpSE_COPY_0_COPY_0 | 2155873536 | 25 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | fsb/BERR0r.EXP | 10441 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | fsb/BERR0r.SI | fsb/BERR0r | 0 | 24 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/BERR0r.D1 | 9998 | ? | 450 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/BERR0r.D2 | 9999 | ? | 450 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | cnt/TimeoutB | IV_FALSE | fsb/BERR0r +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/BERR0r +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | fsb/BERR0r.EXP | 10426 | ? | 467 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/BERR | IV_FALSE | cnt/TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | Disable + +SRFF_INSTANCE | fsb/BERR0r.REG | fsb/BERR0r | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/BERR0r.D | 9997 | ? | 450 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/BERR0r.Q | 10000 | ? | 467 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR1r | WarpSE_COPY_0_COPY_0 | 2155873536 | 5 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | fsb/BERR1r.SI | fsb/BERR1r | 0 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/BERR1r.D1 | 10002 | ? | 451 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/BERR1r.D2 | 10003 | ? | 451 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | iobs/BERR | IV_FALSE | fsb/BERR1r +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf + +SRFF_INSTANCE | fsb/BERR1r.REG | fsb/BERR1r | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/BERR1r.D | 10001 | ? | 451 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/BERR1r.Q | 10004 | ? | 467 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | WarpSE_COPY_0_COPY_0 | 2155873536 | 33 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP16_.EXP | 10435 | ? | 452 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | fsb/Ready0r.EXP | 10434 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 32 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP16_.EXP | 10435 | ? | 452 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/Ready0r.D1 | 10006 | ? | 452 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/Ready0r.D2 | 10007 | ? | 452 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP16_.EXP +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | fsb/Ready0r.EXP | 10419 | ? | 455 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/BERR | IV_FALSE | cnt/TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | Disable | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/BERR | IV_FALSE | cnt/TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | Disable | IV_FALSE | $OpTx$FX_DC$591.UIM + +SRFF_INSTANCE | fsb/Ready0r.REG | fsb/Ready0r | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/Ready0r.D | 10005 | ? | 452 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/Ready0r.Q | 10008 | ? | 467 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | WarpSE_COPY_0_COPY_0 | 2155873536 | 23 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP22_.EXP | 10443 | ? | 453 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | fsb/Ready1r.EXP | 10444 | ? | 454 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 22 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP22_.EXP | 10443 | ? | 453 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/Ready1r.D1 | 10010 | ? | 453 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/Ready1r.D2 | 10011 | ? | 453 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP22_.EXP +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | fsb/Ready1r.EXP | 10429 | ? | 454 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r +SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r +SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r + +SRFF_INSTANCE | fsb/Ready1r.REG | fsb/Ready1r | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/Ready1r.D | 10009 | ? | 453 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/Ready1r.Q | 10012 | ? | 467 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready2r | WarpSE_COPY_0_COPY_0 | 2155873536 | 22 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r.EXP | 10444 | ? | 454 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | fsb/Ready2r.SI | fsb/Ready2r | 0 | 21 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r.EXP | 10444 | ? | 454 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/Ready2r.D1 | 10014 | ? | 454 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/Ready2r.D2 | 10015 | ? | 454 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | fsb/Ready1r.EXP +SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r +SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r +SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r +SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r +SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r + +SRFF_INSTANCE | fsb/Ready2r.REG | fsb/Ready2r | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/Ready2r.D | 10013 | ? | 454 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/Ready2r.Q | 10016 | ? | 467 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | WarpSE_COPY_0_COPY_0 | 2155873280 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP14_.EXP | 10432 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP23_.EXP | 10446 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP14_.EXP | 10432 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP23_.EXP | 10446 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/VPA.D1 | 10018 | ? | 455 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/VPA.D2 | 10019 | ? | 455 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP14_.EXP +SPPTERM | 1 | IV_TRUE | EXP23_.EXP +SPPTERM | 3 | IV_TRUE | iobs/BERR | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 3 | IV_TRUE | fsb/BERR0r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 3 | IV_TRUE | fsb/BERR1r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_FALSE | Disable | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 4 | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM + +SRFF_INSTANCE | fsb/VPA.REG | fsb/VPA | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/VPA.D | 10017 | ? | 455 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/VPA.Q | 10020 | ? | 455 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | nLDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nLDS_FSB | 9912 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nLDS_FSB_IBUF | 9740 | ? | 458 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOL1 | 9741 | ? | 456 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9740 | ? | 458 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IOL0 | 9739 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IOL0.SI | iobs/IOL0 | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOL1 | 9741 | ? | 456 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9740 | ? | 458 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOL0.D1 | 10022 | ? | 456 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOL0.D2 | 10023 | ? | 456 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | nLDS_FSB_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 2 | IV_TRUE | iobs/IOL1 | IV_FALSE | iobs/ALE1 +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOL0.CE | 10024 | ? | 457 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 + +SRFF_INSTANCE | iobs/IOL0.REG | iobs/IOL0 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IOL0.D | 10021 | ? | 456 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | iobs/IOL0.CE | 10024 | ? | 457 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IOL0.Q | 10025 | ? | 508 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9740 | ? | 458 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Load1 | 9777 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IOL1 | 9741 | ? | 456 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IOL1.SI | iobs/IOL1 | 0 | 2 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9740 | ? | 458 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Load1 | 9777 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOL1.D1 | 10027 | ? | 458 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOL1.D2 | 10028 | ? | 458 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nLDS_FSB_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOL1.CE | 10029 | ? | 459 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE +SPPTERM | 1 | IV_TRUE | iobs/Load1 + +SRFF_INSTANCE | iobs/IOL1.REG | iobs/IOL1 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IOL1.D | 10026 | ? | 458 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | iobs/IOL1.CE | 10029 | ? | 459 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE +SPPTERM | 1 | IV_TRUE | iobs/Load1 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IOL1.Q | 10030 | ? | 456 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | WarpSE_COPY_0_COPY_0 | 2155877632 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW1 | 9742 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP36_.EXP | 10528 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Park.EXP | 10529 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IORW1 | 9742 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 8 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW1 | 9742 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP36_.EXP | 10528 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Park.EXP | 10529 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IORW1.D1 | 10032 | ? | 460 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IORW1.D2 | 10033 | ? | 460 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/Once +SPPTERM | 1 | IV_FALSE | iobs/ALE1 +SPPTERM | 1 | IV_TRUE | EXP36_.EXP +SPPTERM | 1 | IV_TRUE | Park.EXP +SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | iobs/IORW1 +SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1 +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/IORW1 + +SRFF_INSTANCE | iobs/IORW1.REG | iobs/IORW1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IORW1.D | 10031 | ? | 460 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IORW1.Q | 10034 | ? | 460 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | WarpSE_COPY_0_COPY_0 | 2155877376 | 19 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | iobs/IOReady.EXP | 10450 | ? | 468 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 18 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOReady.D1 | 10036 | ? | 461 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOReady.D2 | 10037 | ? | 461 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobs/IOReady | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | iobs/IOReady.EXP | 10448 | ? | 468 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 11 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | iobs/IOReady.REG | iobs/IOReady | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IOReady.D | 10035 | ? | 461 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IOReady.Q | 10038 | ? | 467 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | nUDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nUDS_FSB | 9913 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nUDS_FSB_IBUF | 9745 | ? | 464 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOU1 | 9746 | ? | 462 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9745 | ? | 464 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IOU0 | 9744 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IOU0.SI | iobs/IOU0 | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOU1 | 9746 | ? | 462 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9745 | ? | 464 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOU0.D1 | 10040 | ? | 462 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOU0.D2 | 10041 | ? | 462 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | nUDS_FSB_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 2 | IV_TRUE | iobs/IOU1 | IV_FALSE | iobs/ALE1 +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOU0.CE | 10042 | ? | 463 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 + +SRFF_INSTANCE | iobs/IOU0.REG | iobs/IOU0 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IOU0.D | 10039 | ? | 462 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | iobs/IOU0.CE | 10042 | ? | 463 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IOU0.Q | 10043 | ? | 509 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9745 | ? | 464 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Load1 | 9777 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IOU1 | 9746 | ? | 462 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IOU1.SI | iobs/IOU1 | 0 | 2 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9745 | ? | 464 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Load1 | 9777 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOU1.D1 | 10045 | ? | 464 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOU1.D2 | 10046 | ? | 464 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nUDS_FSB_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOU1.CE | 10047 | ? | 465 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE +SPPTERM | 1 | IV_TRUE | iobs/Load1 + +SRFF_INSTANCE | iobs/IOU1.REG | iobs/IOU1 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IOU1.D | 10044 | ? | 464 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | iobs/IOU1.CE | 10047 | ? | 465 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE +SPPTERM | 1 | IV_TRUE | iobs/Load1 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IOU1.Q | 10048 | ? | 462 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RAMDIS2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 16 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMCS_OBUF.EXP | 10464 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RAMDIS2.SI | ram/RAMDIS2 | 0 | 15 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMCS_OBUF.EXP | 10464 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RAMDIS2.D1 | 10050 | ? | 466 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RAMDIS2.D2 | 10051 | ? | 466 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nROMCS_OBUF.EXP +SPPTERM | 3 | IV_TRUE | ram/RAMDIS2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 10 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 10 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_FALSE | ram/RAMDIS2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf +SPPTERM | 12 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 12 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | ram/RAMDIS2.REG | ram/RAMDIS2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RAMDIS2.D | 10049 | ? | 466 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RAMDIS2.Q | 10052 | ? | 466 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | CLK_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | CLK_IOB | 9914 | PI | 428 | 0 | WarpSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV +NODE | CLK_IOB_IBUF/FCLK- | 9749 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV + +INPUT_INSTANCE | 0 | 0 | NULL | nBERR_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nBERR_IOB | 9916 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/nDTACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 24 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP19_.EXP | 10438 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP20_.EXP | 10439 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | fsb/nDTACK | 9752 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | fsb/nDTACK.SI | fsb/nDTACK | 0 | 23 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP19_.EXP | 10438 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP20_.EXP | 10439 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/nDTACK.D1 | 10054 | ? | 467 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/nDTACK.D2 | 10055 | ? | 467 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP19_.EXP +SPPTERM | 1 | IV_TRUE | EXP20_.EXP +SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM + +SRFF_INSTANCE | fsb/nDTACK.REG | fsb/nDTACK | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/nDTACK.D | 10053 | ? | 467 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/nDTACK.Q | 10056 | ? | 467 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 16 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Clear1.EXP | 10449 | ? | 468 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady.EXP | 10450 | ? | 468 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 15 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Clear1.EXP | 10449 | ? | 468 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady.EXP | 10450 | ? | 468 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 10058 | ? | 468 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 10059 | ? | 468 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/Clear1.EXP +SPPTERM | 1 | IV_TRUE | iobs/IOReady.EXP +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 +SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf +SPPTERM | 11 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> + +SRFF_INSTANCE | ram/RS_FSM_FFd1.REG | ram/RS_FSM_FFd1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RS_FSM_FFd1.D | 10057 | ? | 468 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RS_FSM_FFd1.Q | 10060 | ? | 499 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RASEL | WarpSE_COPY_0_COPY_0 | 2155873280 | 14 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP24_.EXP | 10463 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP27_.EXP | 10474 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RASEL.SI | ram/RASEL | 0 | 13 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP24_.EXP | 10463 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP27_.EXP | 10474 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RASEL.D1 | 10062 | ? | 469 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RASEL.D2 | 10063 | ? | 469 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP24_.EXP +SPPTERM | 1 | IV_TRUE | EXP27_.EXP +SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf + +SRFF_INSTANCE | ram/RASEL.REG | ram/RASEL | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RASEL.D | 10061 | ? | 469 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RASEL.Q | 10064 | ? | 500 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155873536 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF$BUF0.EXP | 10498 | ? | 470 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_9_OBUF.EXP | 10499 | ? | 470 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RS_FSM_FFd2.SI | ram/RS_FSM_FFd2 | 0 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF$BUF0.EXP | 10498 | ? | 470 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_9_OBUF.EXP | 10499 | ? | 470 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 10066 | ? | 470 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 10067 | ? | 470 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF$BUF0.EXP +SPPTERM | 1 | IV_TRUE | RA_9_OBUF.EXP +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 3 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf +SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | ram/BACTr + +SRFF_INSTANCE | ram/RS_FSM_FFd2.REG | ram/RS_FSM_FFd2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RS_FSM_FFd2.D | 10065 | ? | 470 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RS_FSM_FFd2.Q | 10068 | ? | 499 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9791 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 6 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9791 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 10070 | ? | 510 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 10071 | ? | 510 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 +SPPTERM | 5 | IV_FALSE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOREQr | IV_FALSE | iobm/BG + +SRFF_INSTANCE | iobm/IOS_FSM_FFd3.REG | iobm/IOS_FSM_FFd3 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/IOS_FSM_FFd3.D | 10069 | ? | 510 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/IOS_FSM_FFd3.Q | 10072 | ? | 535 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q +TNAME | CLK_IOB | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/IOS_FSM_FFd1.SI | iobm/IOS_FSM_FFd1 | 0 | 3 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 10074 | ? | 511 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 10075 | ? | 511 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 +SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 + +SRFF_INSTANCE | iobm/IOS_FSM_FFd1.REG | iobm/IOS_FSM_FFd1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/IOS_FSM_FFd1.D | 10073 | ? | 511 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/IOS_FSM_FFd1.Q | 10076 | ? | 534 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9787 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9805 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9806 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/IOS_FSM_FFd2.SI | iobm/IOS_FSM_FFd2 | 0 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9787 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9805 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9806 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 10078 | ? | 512 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 10079 | ? | 512 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 +SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/ETACK +SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr +SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr +SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr + +SRFF_INSTANCE | iobm/IOS_FSM_FFd2.REG | iobm/IOS_FSM_FFd2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/IOS_FSM_FFd2.D | 10077 | ? | 512 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/IOS_FSM_FFd2.Q | 10080 | ? | 535 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q +TNAME | CLK_IOB | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155873280 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP29_.EXP | 10495 | ? | 471 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_7_OBUF.EXP | 10496 | ? | 471 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.EXP | RA_7_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 12 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP29_.EXP | 10495 | ? | 471 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_7_OBUF.EXP | 10496 | ? | 471 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.EXP | RA_7_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 10082 | ? | 471 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 10083 | ? | 471 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP29_.EXP +SPPTERM | 1 | IV_TRUE | RA_7_OBUF.EXP +SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | ram/RS_FSM_FFd3.REG | ram/RS_FSM_FFd3 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RS_FSM_FFd3.D | 10081 | ? | 471 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RS_FSM_FFd3.Q | 10084 | ? | 499 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/PS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155873536 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP33_.EXP | 10520 | ? | 472 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRAS_OBUF.EXP | 10521 | ? | 472 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 12 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP33_.EXP | 10520 | ? | 472 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRAS_OBUF.EXP | 10521 | ? | 472 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 10086 | ? | 472 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 10087 | ? | 472 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP33_.EXP +SPPTERM | 1 | IV_TRUE | nRAS_OBUF.EXP +SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr +SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/IOACTr +SPPTERM | 4 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | fsb/ASrf | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 + +SRFF_INSTANCE | iobs/PS_FSM_FFd2.REG | iobs/PS_FSM_FFd2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/PS_FSM_FFd2.D | 10085 | ? | 472 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/PS_FSM_FFd2.Q | 10088 | ? | 497 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<5> | WarpSE_COPY_0_COPY_0 | 2155877376 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<5>.SI | cnt/RefCnt<5> | 0 | 5 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<5>.D1 | 10090 | ? | 473 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<5>.D2 | 10091 | ? | 473 | 4096 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 5 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<4> + +SRFF_INSTANCE | cnt/RefCnt<5>.REG | cnt/RefCnt<5> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<5>.D | 10089 | ? | 473 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<5>.Q | 10092 | ? | 499 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<6> | WarpSE_COPY_0_COPY_0 | 2155877376 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<6>.SI | cnt/RefCnt<6> | 0 | 6 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<6>.D1 | 10094 | ? | 474 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<6>.D2 | 10095 | ? | 474 | 4096 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<4> + +SRFF_INSTANCE | cnt/RefCnt<6>.REG | cnt/RefCnt<6> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<6>.D | 10093 | ? | 474 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<6>.Q | 10096 | ? | 499 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobm/ES<0> | WarpSE_COPY_0_COPY_0 | 2155877632 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/ES<0>.SI | iobm/ES<0> | 0 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<0>.D1 | 10098 | ? | 513 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<0>.D2 | 10099 | ? | 513 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 +SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/Er +SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_FALSE | iobm/Er2 + +SRFF_INSTANCE | iobm/ES<0>.REG | iobm/ES<0> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/ES<0>.D | 10097 | ? | 513 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/ES<0>.Q | 10100 | ? | 520 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 3 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 10102 | ? | 475 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 10103 | ? | 475 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2 +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr + +SRFF_INSTANCE | iobs/PS_FSM_FFd1.REG | iobs/PS_FSM_FFd1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/PS_FSM_FFd1.D | 10101 | ? | 475 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/PS_FSM_FFd1.Q | 10104 | ? | 497 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<1> | WarpSE_COPY_0_COPY_0 | 2155873536 | 5 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/ES<1>.SI | iobm/ES<1> | 0 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<1>.D1 | 10106 | ? | 514 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<1>.D2 | 10107 | ? | 514 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> +SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> +SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 + +SRFF_INSTANCE | iobm/ES<1>.REG | iobm/ES<1> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/ES<1>.D | 10105 | ? | 514 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/ES<1>.Q | 10108 | ? | 520 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<0> | WarpSE_COPY_0_COPY_0 | 2155877376 | 1 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<0>.SI | cnt/RefCnt<0> | 0 | 0 | 2 +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<0>.D1 | 10110 | ? | 476 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<0>.D2 | 10111 | ? | 476 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 0 | IV_DC + +SRFF_INSTANCE | cnt/RefCnt<0>.REG | cnt/RefCnt<0> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<0>.D | 10109 | ? | 476 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<0>.Q | 10112 | ? | 482 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<7> | WarpSE_COPY_0_COPY_0 | 2155877376 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<7>.SI | cnt/RefCnt<7> | 0 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<7>.D1 | 10114 | ? | 477 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<7>.D2 | 10115 | ? | 477 | 4096 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<4> + +SRFF_INSTANCE | cnt/RefCnt<7>.REG | cnt/RefCnt<7> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<7>.D | 10113 | ? | 477 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<7>.Q | 10116 | ? | 499 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<2> | WarpSE_COPY_0_COPY_0 | 2155873536 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/ES<2>.SI | iobm/ES<2> | 0 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<2>.D1 | 10118 | ? | 515 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<2>.D2 | 10119 | ? | 515 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<2> +SPPTERM | 2 | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> +SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 +SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> +SPPTERM | 3 | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> + +SRFF_INSTANCE | iobm/ES<2>.REG | iobm/ES<2> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/ES<2>.D | 10117 | ? | 515 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/ES<2>.Q | 10120 | ? | 520 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<3> | WarpSE_COPY_0_COPY_0 | 2155877376 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/ES<3>.SI | iobm/ES<3> | 0 | 6 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<3>.D1 | 10122 | ? | 516 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<3>.D2 | 10123 | ? | 516 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 +SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/Er +SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/Er2 + +SRFF_INSTANCE | iobm/ES<3>.REG | iobm/ES<3> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/ES<3>.D | 10121 | ? | 516 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/ES<3>.Q | 10124 | ? | 520 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<4> | WarpSE_COPY_0_COPY_0 | 2155877376 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/ES<4>.SI | iobm/ES<4> | 0 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<4>.D1 | 10126 | ? | 517 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<4>.D2 | 10127 | ? | 517 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobm/ES<4> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 +SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_TRUE | iobm/Er +SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er2 +SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> + +SRFF_INSTANCE | iobm/ES<4>.REG | iobm/ES<4> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/ES<4>.D | 10125 | ? | 517 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/ES<4>.Q | 10128 | ? | 520 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<1> | WarpSE_COPY_0_COPY_0 | 2155877376 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<1>.SI | cnt/RefCnt<1> | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<1>.D1 | 10130 | ? | 478 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<1>.D2 | 10131 | ? | 478 | 4096 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/RefCnt<0> + +SRFF_INSTANCE | cnt/RefCnt<1>.REG | cnt/RefCnt<1> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<1>.D | 10129 | ? | 478 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<1>.Q | 10132 | ? | 482 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<3> | WarpSE_COPY_0_COPY_0 | 2155877376 | 4 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<3>.SI | cnt/RefCnt<3> | 0 | 3 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<3>.D1 | 10134 | ? | 479 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<3>.D2 | 10135 | ? | 479 | 4096 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> + +SRFF_INSTANCE | cnt/RefCnt<3>.REG | cnt/RefCnt<3> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<3>.D | 10133 | ? | 479 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<3>.Q | 10136 | ? | 482 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOACTr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOACT | 9790 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IOACTr.SI | iobs/IOACTr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOACT | 9790 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOACTr.D1 | 10138 | ? | 480 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOACTr.D2 | 10139 | ? | 480 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobm/IOACT + +SRFF_INSTANCE | iobs/IOACTr.REG | iobs/IOACTr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IOACTr.D | 10137 | ? | 480 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IOACTr.Q | 10140 | ? | 497 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<2> | WarpSE_COPY_0_COPY_0 | 2155877376 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<2>.SI | cnt/RefCnt<2> | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<2>.D1 | 10142 | ? | 481 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<2>.D2 | 10143 | ? | 481 | 4096 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> + +SRFF_INSTANCE | cnt/RefCnt<2>.REG | cnt/RefCnt<2> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<2>.D | 10141 | ? | 481 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<2>.Q | 10144 | ? | 482 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<4> | WarpSE_COPY_0_COPY_0 | 2155877376 | 5 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/RefCnt<4> | 9776 | ? | 477 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/RefCnt<4>.SI | cnt/RefCnt<4> | 0 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<0> | 9767 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<1> | 9772 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<3> | 9773 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<2> | 9775 | ? | 482 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/RefCnt<4>.D1 | 10146 | ? | 482 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/RefCnt<4>.D2 | 10147 | ? | 482 | 4096 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<2> + +SRFF_INSTANCE | cnt/RefCnt<4>.REG | cnt/RefCnt<4> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/RefCnt<4>.D | 10145 | ? | 482 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/RefCnt<4>.Q | 10148 | ? | 477 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_5_OBUF.EXP | 10470 | ? | 483 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_2_OBUF.EXP | 10471 | ? | 483 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9777 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_5_OBUF.EXP | 10470 | ? | 483 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_2_OBUF.EXP | 10471 | ? | 483 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/Load1.D1 | 10150 | ? | 483 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/Load1.D2 | 10151 | ? | 483 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/Once +SPPTERM | 1 | IV_FALSE | iobs/ALE1 +SPPTERM | 1 | IV_TRUE | RA_5_OBUF.EXP +SPPTERM | 1 | IV_TRUE | RA_2_OBUF.EXP +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 + +SRFF_INSTANCE | iobs/Load1.REG | iobs/Load1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/Load1.D | 10149 | ? | 483 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/Load1.Q | 10152 | ? | 503 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | WarpSE_COPY_0_COPY_0 | 2155873536 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/BACTr.D1 | 10154 | ? | 484 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/BACTr.D2 | 10155 | ? | 484 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf + +SRFF_INSTANCE | ram/BACTr.REG | ram/BACTr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/BACTr.D | 10153 | ? | 484 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/BACTr.Q | 10156 | ? | 499 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | RESr0 | 9779 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | RESr0.SI | RESr0 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RESr0.D1 | 10158 | ? | 485 | 4096 | RESr0 | NULL | NULL | RESr0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RESr0.D2 | 10159 | ? | 485 | 4096 | RESr0 | NULL | NULL | RESr0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nRES_IBUF + +SRFF_INSTANCE | RESr0.REG | RESr0 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RESr0.D | 10157 | ? | 485 | 0 | RESr0 | NULL | NULL | RESr0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RESr0.Q | 10160 | ? | 502 | 0 | RESr0 | NULL | NULL | RESr0.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr0 | 9779 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | RESr1 | 9780 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | RESr1.SI | RESr1 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr0 | 9779 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RESr1.D1 | 10162 | ? | 486 | 4096 | RESr1 | NULL | NULL | RESr1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RESr1.D2 | 10163 | ? | 486 | 4096 | RESr1 | NULL | NULL | RESr1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RESr0 + +SRFF_INSTANCE | RESr1.REG | RESr1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RESr1.D | 10161 | ? | 486 | 0 | RESr1 | NULL | NULL | RESr1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RESr1.Q | 10164 | ? | 502 | 0 | RESr1 | NULL | NULL | RESr1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOBERR | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9787 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK.EXP | 10478 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/IOBERR.SI | iobm/IOBERR | 0 | 12 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9787 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK.EXP | 10478 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOBERR.D1 | 10166 | ? | 518 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOBERR.D2 | 10167 | ? | 518 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobm/ETACK.EXP +SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR +SPPTERM | 7 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/ETACK +SPPTERM | 7 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/ETACK +SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr +SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr + +SRFF_INSTANCE | iobm/IOBERR.REG | iobm/IOBERR | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/IOBERR.D | 10165 | ? | 518 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/IOBERR.Q | 10168 | ? | 518 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.REG | 0 | 8 | SRFF_Q +TNAME | CLK_IOB | CLK2X_IOB + +INPUT_INSTANCE | 0 | 0 | NULL | nIPL2_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nIPL2 | 9917 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nIPL2_IBUF | 9782 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | IPL2r0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nIPL2_IBUF | 9782 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | IPL2r0 | 9783 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | IPL2r0.SI | IPL2r0 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nIPL2_IBUF | 9782 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IPL2r0.D1 | 10170 | ? | 487 | 4096 | IPL2r0 | NULL | NULL | IPL2r0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | IPL2r0.D2 | 10171 | ? | 487 | 4096 | IPL2r0 | NULL | NULL | IPL2r0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nIPL2_IBUF + +SRFF_INSTANCE | IPL2r0.REG | IPL2r0 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IPL2r0.D | 10169 | ? | 487 | 0 | IPL2r0 | NULL | NULL | IPL2r0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IPL2r0.Q | 10172 | ? | 502 | 0 | IPL2r0 | NULL | NULL | IPL2r0.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr2 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr1 | 9780 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | RESr2 | 9784 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | RESr2.SI | RESr2 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr1 | 9780 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RESr2.D1 | 10174 | ? | 488 | 4096 | RESr2 | NULL | NULL | RESr2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RESr2.D2 | 10175 | ? | 488 | 4096 | RESr2 | NULL | NULL | RESr2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RESr1 + +SRFF_INSTANCE | RESr2.REG | RESr2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RESr2.D | 10173 | ? | 488 | 0 | RESr2 | NULL | NULL | RESr2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RESr2.Q | 10176 | ? | 502 | 0 | RESr2 | NULL | NULL | RESr2.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | nBG_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nBG_IOB | 9918 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nBG_IOB_IBUF | 9785 | ? | 519 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BGr0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBG_IOB_IBUF | 9785 | ? | 519 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/BGr0 | 9786 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/BGr0.SI | iobm/BGr0 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBG_IOB_IBUF | 9785 | ? | 519 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/BGr0.D1 | 10178 | ? | 519 | 4096 | iobm/BGr0 | NULL | NULL | iobm/BGr0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/BGr0.D2 | 10179 | ? | 519 | 4096 | iobm/BGr0 | NULL | NULL | iobm/BGr0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nBG_IOB_IBUF + +SRFF_INSTANCE | iobm/BGr0.REG | iobm/BGr0 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/BGr0.D | 10177 | ? | 519 | 0 | iobm/BGr0 | NULL | NULL | iobm/BGr0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/BGr0.Q | 10180 | ? | 536 | 0 | iobm/BGr0 | NULL | NULL | iobm/BGr0.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 19 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nVMA | 9710 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9805 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9806 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/ETACK | 9787 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | iobm/ETACK.EXP | 10478 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 18 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nVMA | 9710 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<0> | 9764 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<1> | 9766 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9769 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9770 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9771 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOBERR | 9781 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9805 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9806 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ETACK.D1 | 10182 | ? | 520 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ETACK.D2 | 10183 | ? | 520 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_FALSE | iobm/nVMA | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | iobm/ETACK.EXP | 10475 | ? | 518 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr +SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr +SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr +SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr + +SRFF_INSTANCE | iobm/ETACK.REG | iobm/ETACK | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/ETACK.D | 10181 | ? | 520 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/ETACK.Q | 10184 | ? | 521 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +INPUT_INSTANCE | 0 | 0 | NULL | E_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | E_IOB | 9919 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | E_IOB_IBUF | 9788 | ? | 434 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/Er | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | E_IOB_IBUF | 9788 | ? | 434 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF/FCLK- | 9749 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/Er.SI | iobm/Er | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | E_IOB_IBUF | 9788 | ? | 434 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/Er.D1 | 10186 | ? | 434 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/Er.D2 | 10187 | ? | 434 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | E_IOB_IBUF + +SRFF_INSTANCE | iobm/Er.REG | iobm/Er | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/Er.D | 10185 | ? | 434 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_IOB_IBUF/FCLK- | 9749 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/Er.Q | 10188 | ? | 529 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q +TNAME | CLK_IOB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOACT | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9791 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9787 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nADoutLE0_OBUF.EXP | 10479 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nDinLE.EXP | 10480 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/IOACT | 9790 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/IOACT.SI | iobm/IOACT | 0 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9791 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9787 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nADoutLE0_OBUF.EXP | 10479 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nDinLE.EXP | 10480 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOACT.D1 | 10190 | ? | 521 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOACT.D2 | 10191 | ? | 521 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nADoutLE0_OBUF.EXP +SPPTERM | 1 | IV_TRUE | iobm/nDinLE.EXP +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr +SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BG +SPPTERM | 4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/ETACK +SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr + +SRFF_INSTANCE | iobm/IOACT.REG | iobm/IOACT | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/IOACT.D | 10189 | ? | 521 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/IOACT.Q | 10192 | ? | 504 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.REG | 0 | 8 | SRFF_Q +TNAME | CLK_IOB | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/IOREQr | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOREQ | 9812 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/IOREQr | 9791 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/IOREQr.SI | iobm/IOREQr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOREQ | 9812 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOREQr.D1 | 10194 | ? | 522 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOREQr.D2 | 10195 | ? | 522 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/IOREQ + +SRFF_INSTANCE | iobm/IOREQr.REG | iobm/IOREQr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/IOREQr.D | 10193 | ? | 522 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/IOREQr.Q | 10196 | ? | 523 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefRAS | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RefRAS | 9792 | ? | 437 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RefRAS.SI | ram/RefRAS | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RefRAS.D1 | 10198 | ? | 489 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RefRAS.D2 | 10199 | ? | 489 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 + +SRFF_INSTANCE | ram/RefRAS.REG | ram/RefRAS | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RefRAS.D | 10197 | ? | 489 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RefRAS.Q | 10200 | ? | 437 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | RESDone | WarpSE_COPY_0_COPY_0 | 2155873280 | 9 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr0 | 9779 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr1 | 9780 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr2 | 9784 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9745 | ? | 464 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS1 | 9813 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | RESDone | 9793 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RESDone.EXP | 10523 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RESDone.SI | RESDone | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr0 | 9779 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr1 | 9780 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr2 | 9784 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9745 | ? | 464 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS1 | 9813 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RESDone.D1 | 10202 | ? | 490 | 4096 | RESDone | NULL | NULL | RESDone.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RESDone.D2 | 10203 | ? | 490 | 6144 | RESDone | NULL | NULL | RESDone.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 0 | IV_DC +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RESDone.EXP | 10510 | ? | 0 | 0 | RESDone | NULL | NULL | RESDone.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | RESDone.CE | 10204 | ? | 491 | 4096 | RESDone | NULL | NULL | RESDone.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_FALSE | RESr0 | IV_FALSE | RESr1 | IV_TRUE | RESr2 + +SRFF_INSTANCE | RESDone.REG | RESDone | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RESDone.D | 10201 | ? | 490 | 0 | RESDone | NULL | NULL | RESDone.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | RESDone.CE | 10204 | ? | 491 | 4096 | RESDone | NULL | NULL | RESDone.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_FALSE | RESr0 | IV_FALSE | RESr1 | IV_TRUE | RESr2 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RESDone.Q | 10205 | ? | 502 | 0 | RESDone | NULL | NULL | RESDone.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | IPL2r1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IPL2r0 | 9783 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | IPL2r1 | 9794 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | IPL2r1.SI | IPL2r1 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IPL2r0 | 9783 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IPL2r1.D1 | 10207 | ? | 492 | 4096 | IPL2r1 | NULL | NULL | IPL2r1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | IPL2r1.D2 | 10208 | ? | 492 | 4096 | IPL2r1 | NULL | NULL | IPL2r1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | IPL2r0 + +SRFF_INSTANCE | IPL2r1.REG | IPL2r1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IPL2r1.D | 10206 | ? | 492 | 0 | IPL2r1 | NULL | NULL | IPL2r1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IPL2r1.Q | 10209 | ? | 502 | 0 | IPL2r1 | NULL | NULL | IPL2r1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | fsb/ASrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK- | 9721 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | fsb/ASrf.SI | fsb/ASrf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/ASrf.D1 | 10211 | ? | 493 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/ASrf.D2 | 10212 | ? | 493 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nAS_FSB_IBUF + +SRFF_INSTANCE | fsb/ASrf.REG | fsb/ASrf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/ASrf.D | 10210 | ? | 493 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK- | 9721 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/ASrf.Q | 10213 | ? | 499 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ALE0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9791 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/ALE0 | 9797 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/ALE0.SI | iobm/ALE0 | 0 | 5 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9791 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ALE0.D1 | 10215 | ? | 523 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ALE0.D2 | 10216 | ? | 523 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 +SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOREQr | IV_FALSE | iobm/BG + +SRFF_INSTANCE | iobm/ALE0.REG | iobm/ALE0 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/ALE0.D | 10214 | ? | 523 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/ALE0.Q | 10217 | ? | 0 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/BERRrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/BERRrf | 9798 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/BERRrf.SI | iobm/BERRrf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/BERRrf.D1 | 10219 | ? | 524 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/BERRrf.D2 | 10220 | ? | 524 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF + +SRFF_INSTANCE | iobm/BERRrf.REG | iobm/BERRrf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/BERRrf.D | 10218 | ? | 524 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/BERRrf.Q | 10221 | ? | 521 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BERRrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/BERRrr | 9799 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/BERRrr.SI | iobm/BERRrr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9751 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/BERRrr.D1 | 10223 | ? | 525 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/BERRrr.D2 | 10224 | ? | 525 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF + +SRFF_INSTANCE | iobm/BERRrr.REG | iobm/BERRrr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/BERRrr.D | 10222 | ? | 525 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/BERRrr.Q | 10225 | ? | 521 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BGr1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BGr0 | 9786 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/BGr1 | 9800 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/BGr1.SI | iobm/BGr1 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BGr0 | 9786 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/BGr1.D1 | 10227 | ? | 526 | 4096 | iobm/BGr1 | NULL | NULL | iobm/BGr1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/BGr1.D2 | 10228 | ? | 526 | 4096 | iobm/BGr1 | NULL | NULL | iobm/BGr1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobm/BGr0 + +SRFF_INSTANCE | iobm/BGr1.REG | iobm/BGr1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/BGr1.D | 10226 | ? | 526 | 0 | iobm/BGr1 | NULL | NULL | iobm/BGr1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/BGr1.Q | 10229 | ? | 536 | 0 | iobm/BGr1 | NULL | NULL | iobm/BGr1.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +INPUT_INSTANCE | 0 | 0 | NULL | nDTACK_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nDTACK_IOB | 9921 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nDTACK_IOB_IBUF | 9801 | ? | 528 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/DTACKrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nDTACK_IOB_IBUF | 9801 | ? | 528 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/DTACKrf.SI | iobm/DTACKrf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nDTACK_IOB_IBUF | 9801 | ? | 528 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/DTACKrf.D1 | 10231 | ? | 527 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/DTACKrf.D2 | 10232 | ? | 527 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF + +SRFF_INSTANCE | iobm/DTACKrf.REG | iobm/DTACKrf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/DTACKrf.D | 10230 | ? | 527 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/DTACKrf.Q | 10233 | ? | 521 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DTACKrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nDTACK_IOB_IBUF | 9801 | ? | 528 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/DTACKrr.SI | iobm/DTACKrr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nDTACK_IOB_IBUF | 9801 | ? | 528 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/DTACKrr.D1 | 10235 | ? | 528 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/DTACKrr.D2 | 10236 | ? | 528 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF + +SRFF_INSTANCE | iobm/DTACKrr.REG | iobm/DTACKrr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/DTACKrr.D | 10234 | ? | 528 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/DTACKrr.Q | 10237 | ? | 521 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/Er2 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9804 | ? | 517 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/Er2.SI | iobm/Er2 | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/Er | 9789 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/Er2.D1 | 10239 | ? | 529 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/Er2.D2 | 10240 | ? | 529 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobm/Er + +SRFF_INSTANCE | iobm/Er2.REG | iobm/Er2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/Er2.D | 10238 | ? | 529 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/Er2.Q | 10241 | ? | 517 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/RESrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/RESrf | 9805 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/RESrf.SI | iobm/RESrf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/RESrf.D1 | 10243 | ? | 530 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/RESrf.D2 | 10244 | ? | 530 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nRES_IBUF + +SRFF_INSTANCE | iobm/RESrf.REG | iobm/RESrf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/RESrf.D | 10242 | ? | 530 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/RESrf.Q | 10245 | ? | 521 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/RESrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/RESrr | 9806 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/RESrr.SI | iobm/RESrr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRES_IBUF | 9728 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/RESrr.D1 | 10247 | ? | 531 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/RESrr.D2 | 10248 | ? | 531 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nRES_IBUF + +SRFF_INSTANCE | iobm/RESrr.REG | iobm/RESrr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/RESrr.D | 10246 | ? | 531 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/RESrr.Q | 10249 | ? | 521 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +INPUT_INSTANCE | 0 | 0 | NULL | nVPA_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nVPA_IOB | 9922 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nVPA_IOB_IBUF | 9807 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/VPArf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nVPA_IOB_IBUF | 9807 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/VPArf | 9808 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/VPArf.SI | iobm/VPArf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nVPA_IOB_IBUF | 9807 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/VPArf.D1 | 10251 | ? | 532 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/VPArf.D2 | 10252 | ? | 532 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF + +SRFF_INSTANCE | iobm/VPArf.REG | iobm/VPArf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/VPArf.D | 10250 | ? | 532 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/VPArf.Q | 10253 | ? | 504 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/VPArr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nVPA_IOB_IBUF | 9807 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/VPArr | 9809 | ? | 504 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/VPArr.SI | iobm/VPArr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nVPA_IOB_IBUF | 9807 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/VPArr.D1 | 10255 | ? | 533 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/VPArr.D2 | 10256 | ? | 533 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF + +SRFF_INSTANCE | iobm/VPArr.REG | iobm/VPArr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/VPArr.D | 10254 | ? | 533 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/VPArr.Q | 10257 | ? | 504 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/ALE0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/ALE0 | 9810 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/ALE0.SI | iobs/ALE0 | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/ALE0.D1 | 10259 | ? | 495 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/ALE0.D2 | 10260 | ? | 495 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 + +SRFF_INSTANCE | iobs/ALE0.REG | iobs/ALE0 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/ALE0.D | 10258 | ? | 495 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/ALE0.Q | 10261 | ? | 0 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 17 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/Clear1 | 9811 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | iobs/Clear1.EXP | 10449 | ? | 468 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 16 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/Clear1.D1 | 10263 | ? | 496 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/Clear1.D2 | 10264 | ? | 496 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1 +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | iobs/Clear1.EXP | 10447 | ? | 468 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 12 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 12 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | iobs/Clear1.REG | iobs/Clear1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/Clear1.D | 10262 | ? | 496 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/Clear1.Q | 10265 | ? | 503 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/IOREQ | WarpSE_COPY_0_COPY_0 | 2155873536 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRAMUWE_OBUF.EXP | 10524 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP34_.EXP | 10525 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/IOREQ | 9812 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/IOREQ.SI | iobs/IOREQ | 0 | 12 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9774 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRAMUWE_OBUF.EXP | 10524 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP34_.EXP | 10525 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOREQ.D1 | 10267 | ? | 497 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOREQ.D2 | 10268 | ? | 497 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nRAMUWE_OBUF.EXP +SPPTERM | 1 | IV_TRUE | EXP34_.EXP +SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr +SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | fsb/ASrf | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 + +SRFF_INSTANCE | iobs/IOREQ.REG | iobs/IOREQ | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/IOREQ.D | 10266 | ? | 497 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/IOREQ.Q | 10269 | ? | 522 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMDIS1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 14 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP28_.EXP | 10493 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP31_.EXP | 10504 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RAMDIS1 | 9813 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RAMDIS1.SI | ram/RAMDIS1 | 0 | 13 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP28_.EXP | 10493 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP31_.EXP | 10504 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RAMDIS1.D1 | 10271 | ? | 498 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RAMDIS1.D2 | 10272 | ? | 498 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP28_.EXP +SPPTERM | 1 | IV_TRUE | EXP31_.EXP +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> + +SRFF_INSTANCE | ram/RAMDIS1.REG | ram/RAMDIS1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RAMDIS1.D | 10270 | ? | 498 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RAMDIS1.Q | 10273 | ? | 0 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RAMReady | WarpSE_COPY_0_COPY_0 | 2155873536 | 14 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK20EN_OBUF$BUF0.EXP | 10502 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP30_.EXP | 10503 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RAMReady.SI | ram/RAMReady | 0 | 13 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK20EN_OBUF$BUF0.EXP | 10502 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP30_.EXP | 10503 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RAMReady.D1 | 10275 | ? | 499 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RAMReady.D2 | 10276 | ? | 499 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd2 +SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 1 | IV_TRUE | CLK20EN_OBUF$BUF0.EXP +SPPTERM | 1 | IV_TRUE | EXP30_.EXP +SPPTERM | 4 | IV_FALSE | cnt/RefDone | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | ram/RAMReady.REG | ram/RAMReady | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RAMReady.D | 10274 | ? | 499 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RAMReady.Q | 10277 | ? | 467 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_1_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<1> | 9923 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_1_IBUF | 9815 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_2_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<2> | 9924 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_2_IBUF | 9816 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_3_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<3> | 9925 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_3_IBUF | 9817 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_4_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<4> | 9926 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_4_IBUF | 9818 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_5_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<5> | 9927 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_5_IBUF | 9819 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_6_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<6> | 9928 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_6_IBUF | 9820 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_7_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | A_FSB<7> | 9929 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | A_FSB_7_IBUF | 9821 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | OptxMapped | RA_0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_1_IBUF | 9815 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_0_OBUF | 9822 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q + +SIGNAL_INSTANCE | RA_0_OBUF.SI | RA_0_OBUF | 0 | 3 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_1_IBUF | 9815 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_0_OBUF.D1 | 10279 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_0_OBUF.D2 | 10280 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_1_IBUF + +SRFF_INSTANCE | RA_0_OBUF.REG | RA_0_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_0_OBUF.D | 10278 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_0_OBUF.Q | 10281 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_1_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_2_IBUF | 9816 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_1_OBUF | 9823 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_1_OBUF.EXP | 10494 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_1_OBUF.SI | RA_1_OBUF | 0 | 11 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_2_IBUF | 9816 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_1_OBUF.D1 | 10283 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_1_OBUF.D2 | 10284 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | A_FSB_11_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_2_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_1_OBUF.EXP | 10482 | ? | 498 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 8 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> + +SRFF_INSTANCE | RA_1_OBUF.REG | RA_1_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_1_OBUF.D | 10282 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_1_OBUF.Q | 10285 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_2_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_6_OBUF.EXP | 10472 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_2_OBUF | 9824 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_2_OBUF.EXP | 10471 | ? | 483 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_2_OBUF.SI | RA_2_OBUF | 0 | 11 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_6_OBUF.EXP | 10472 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_2_OBUF.D1 | 10287 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_2_OBUF.D2 | 10288 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RA_6_OBUF.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_2_OBUF.EXP | 10459 | ? | 483 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF +SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 + +SRFF_INSTANCE | RA_2_OBUF.REG | RA_2_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_2_OBUF.D | 10286 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_2_OBUF.Q | 10289 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_3_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 5 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_4_IBUF | 9818 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_6_IBUF | 9820 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_3_OBUF | 9825 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_3_OBUF.EXP | 10469 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_3_OBUF.SI | RA_3_OBUF | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_4_IBUF | 9818 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_6_IBUF | 9820 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_3_OBUF.D1 | 10291 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_3_OBUF.D2 | 10292 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_4_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_3_OBUF.EXP | 10457 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_6_IBUF + +SRFF_INSTANCE | RA_3_OBUF.REG | RA_3_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_3_OBUF.D | 10290 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_3_OBUF.Q | 10293 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_4_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_5_IBUF | 9819 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_4_OBUF | 9826 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_4_OBUF.EXP | 10468 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_4_OBUF.SI | RA_4_OBUF | 0 | 11 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_5_IBUF | 9819 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_4_OBUF.D1 | 10295 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_4_OBUF.D2 | 10296 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_5_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_4_OBUF.EXP | 10456 | ? | 440 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_TRUE | SW_1_IBUF +SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 + +SRFF_INSTANCE | RA_4_OBUF.REG | RA_4_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_4_OBUF.D | 10294 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_4_OBUF.Q | 10297 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 8 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_3_OBUF.EXP | 10469 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_5_OBUF | 9827 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_5_OBUF.EXP | 10470 | ? | 483 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 8 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_3_OBUF.EXP | 10469 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_5_OBUF.D1 | 10299 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_5_OBUF.D2 | 10300 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RA_3_OBUF.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_5_OBUF.EXP | 10458 | ? | 483 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF + +SRFF_INSTANCE | RA_5_OBUF.REG | RA_5_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_5_OBUF.D | 10298 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_5_OBUF.Q | 10301 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 5 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_7_IBUF | 9821 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_3_IBUF | 9817 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_6_OBUF | 9828 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_6_OBUF.EXP | 10472 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_7_IBUF | 9821 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_3_IBUF | 9817 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_6_OBUF.D1 | 10303 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_6_OBUF.D2 | 10304 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_7_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_6_OBUF.EXP | 10460 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | A_FSB_12_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_3_IBUF + +SRFF_INSTANCE | RA_6_OBUF.REG | RA_6_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_6_OBUF.D | 10302 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_6_OBUF.Q | 10305 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_7_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 14 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_7_OBUF | 9829 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_7_OBUF.EXP | 10496 | ? | 471 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.EXP | RA_7_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_7_OBUF.SI | RA_7_OBUF | 0 | 14 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_7_OBUF.D1 | 10307 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_7_OBUF.D2 | 10308 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | ram/RASEL +SPPTERM | 2 | IV_TRUE | A_FSB_17_IBUF | IV_FALSE | ram/RASEL +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_7_OBUF.EXP | 10484 | ? | 471 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 11 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | RA_7_OBUF.REG | RA_7_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_7_OBUF.D | 10306 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_7_OBUF.Q | 10309 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutBPre.EXP | 10497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.EXP | cnt/TimeoutBPre | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_8_OBUF | 9830 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q + +SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutBPre.EXP | 10497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.EXP | cnt/TimeoutBPre | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_8_OBUF.D1 | 10311 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_8_OBUF.D2 | 10312 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/TimeoutBPre.EXP +SPPTERM | 2 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_18_IBUF +SPPTERM | 2 | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_18_IBUF +SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | cs/nOverlay1 +SPPTERM | 3 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | cs/nOverlay1 + +SRFF_INSTANCE | RA_8_OBUF.REG | RA_8_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_8_OBUF.D | 10310 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_8_OBUF.Q | 10313 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | RA_9_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK25EN_OBUF.EXP | 10500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | RA_9_OBUF | 9831 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | RA_9_OBUF.EXP | 10499 | ? | 470 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | RA_9_OBUF.SI | RA_9_OBUF | 0 | 10 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK25EN_OBUF.EXP | 10500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_9_OBUF.D1 | 10315 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_9_OBUF.D2 | 10316 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | CLK25EN_OBUF.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_9_OBUF.EXP | 10487 | ? | 470 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | fsb/ASrf +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | RA_9_OBUF.REG | RA_9_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RA_9_OBUF.D | 10314 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RA_9_OBUF.Q | 10317 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | nBERR_FSB_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 14 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP35_.EXP | 10526 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nBERR_FSB_OBUF | 9832 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nBERR_FSB_OBUF.EXP | 10527 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nBERR_FSB_OBUF.SI | nBERR_FSB_OBUF | 0 | 14 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP35_.EXP | 10526 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nBERR_FSB_OBUF.D1 | 10319 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nBERR_FSB_OBUF.D2 | 10320 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nAS_FSB_IBUF +SPPTERM | 1 | IV_TRUE | EXP35_.EXP +SPPTERM | 4 | IV_FALSE | iobs/BERR | IV_FALSE | cnt/TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nBERR_FSB_OBUF.EXP | 10514 | ? | 460 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF +SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 + +SRFF_INSTANCE | nBERR_FSB_OBUF.REG | nBERR_FSB_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nBERR_FSB_OBUF.D | 10318 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nBERR_FSB_OBUF.Q | 10321 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 9 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/nCAS.EXP | 10465 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.EXP | ram/nCAS | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nOE_OBUF | 9833 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nOE_OBUF.EXP | 10466 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 9 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/nCAS.EXP | 10465 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.EXP | ram/nCAS | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nOE_OBUF.D1 | 10323 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nOE_OBUF.D2 | 10324 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | ram/nCAS.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nOE_OBUF.EXP | 10454 | ? | 440 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 +SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/Once +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_FALSE | cs/nOverlay1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once + +SRFF_INSTANCE | nOE_OBUF.REG | nOE_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nOE_OBUF.D | 10322 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nOE_OBUF.Q | 10325 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 26 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nROMWE_OBUF | 9834 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nROMWE_OBUF.EXP | 10445 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 26 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nROMWE_OBUF.D1 | 10327 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nROMWE_OBUF.D2 | 10328 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nROMWE_OBUF.EXP | 10430 | ? | 455 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1 | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1 | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM + +SRFF_INSTANCE | nROMWE_OBUF.REG | nROMWE_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nROMWE_OBUF.D | 10326 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nROMWE_OBUF.Q | 10329 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+OptxMapped | nVPA_FSB_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nVPA_FSB_OBUF | 9835 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q + +SIGNAL_INSTANCE | nVPA_FSB_OBUF.SI | nVPA_FSB_OBUF | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 10331 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 10332 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF + +SRFF_INSTANCE | nVPA_FSB_OBUF.REG | nVPA_FSB_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nVPA_FSB_OBUF.D | 10330 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nVPA_FSB_OBUF.Q | 10333 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/nDinLE | WarpSE_COPY_0_COPY_0 | 2424308736 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9805 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9806 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | iobm/nDinLE | 9836 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | iobm/nDinLE.EXP | 10480 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | iobm/nDinLE.SI | iobm/nDinLE | 0 | 6 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9805 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9806 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/nDinLE.D1 | 10335 | ? | 534 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/nDinLE.D2 | 10336 | ? | 534 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | iobm/nDinLE.EXP | 10477 | ? | 521 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr + +SRFF_INSTANCE | iobm/nDinLE.REG | iobm/nDinLE | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/nDinLE.D | 10334 | ? | 534 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK- | 9708 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/nDinLE.Q | 10337 | ? | 0 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/nDoutOE | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | iobm/nDoutOE | 9837 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDoutOE.Q | iobm/nDoutOE | 0 | 0 | MC_Q + +SIGNAL_INSTANCE | iobm/nDoutOE.SI | iobm/nDoutOE | 0 | 3 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9759 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/nDoutOE.D1 | 10339 | ? | 535 | 4096 | iobm/nDoutOE | NULL | NULL | iobm/nDoutOE.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/nDoutOE.D2 | 10340 | ? | 535 | 4096 | iobm/nDoutOE | NULL | NULL | iobm/nDoutOE.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | iobs/IORW0 +SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 + +SRFF_INSTANCE | iobm/nDoutOE.REG | iobm/nDoutOE | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/nDoutOE.D | 10338 | ? | 535 | 0 | iobm/nDoutOE | NULL | NULL | iobm/nDoutOE.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/nDoutOE.Q | 10341 | ? | 0 | 0 | iobm/nDoutOE | NULL | NULL | iobm/nDoutOE.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ALE0 | 9797 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE0 | 9810 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nADoutLE0_OBUF | 9838 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nADoutLE0_OBUF.EXP | 10479 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 7 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ALE0 | 9797 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE0 | 9810 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_IOB_IBUF | 9748 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9757 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9758 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9802 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9803 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nADoutLE0_OBUF.D1 | 10343 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nADoutLE0_OBUF.D2 | 10344 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | iobm/ALE0 | IV_FALSE | iobs/ALE0 +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nADoutLE0_OBUF.EXP | 10476 | ? | 521 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr + +SRFF_INSTANCE | nADoutLE0_OBUF.REG | nADoutLE0_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nADoutLE0_OBUF.D | 10342 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nADoutLE0_OBUF.Q | 10345 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | nDinOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nDinOE_OBUF | 9839 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q + +SIGNAL_INSTANCE | nDinOE_OBUF.SI | nDinOE_OBUF | 0 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nDinOE_OBUF.D1 | 10347 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nDinOE_OBUF.D2 | 10348 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | SW_1_IBUF + +SRFF_INSTANCE | nDinOE_OBUF.REG | nDinOE_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nDinOE_OBUF.D | 10346 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nDinOE_OBUF.Q | 10349 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 14 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRAMLWE_OBUF.EXP | 10522 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nRAS_OBUF | 9840 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nRAS_OBUF.EXP | 10521 | ? | 472 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 14 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nRAMLWE_OBUF.EXP | 10522 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nRAS_OBUF.D1 | 10351 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nRAS_OBUF.D2 | 10352 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nRAMLWE_OBUF.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nRAS_OBUF.EXP | 10508 | ? | 472 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | SW_1_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 7 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 + +SRFF_INSTANCE | nRAS_OBUF.REG | nRAS_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nRAS_OBUF.D | 10350 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nRAS_OBUF.Q | 10353 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | ram/nCAS | WarpSE_COPY_0_COPY_0 | 2424308736 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK- | 9721 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | ram/nCAS | 9841 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | ram/nCAS.EXP | 10465 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.EXP | ram/nCAS | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | ram/nCAS.SI | ram/nCAS | 0 | 3 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/nCAS.D1 | 10355 | ? | 500 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/nCAS.D2 | 10356 | ? | 500 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | ram/RASEL +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | ram/nCAS.EXP | 10453 | ? | 0 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF + +SRFF_INSTANCE | ram/nCAS.REG | ram/nCAS | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/nCAS.D | 10354 | ? | 500 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK- | 9721 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/nCAS.Q | 10357 | ? | 0 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | A_FSB_19_IBUF$BUF0 | 9842 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | A_FSB_19_IBUF$BUF0.EXP | 10519 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 7 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 10359 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 10360 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10506 | ? | 444 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2 +SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd1 +SPPTERM | 2 | IV_TRUE | iobs/Once | IV_TRUE | iobs/ALE1 +SPPTERM | 3 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | iobs/IORW0 | IV_TRUE | iobs/ALE1 + +SRFF_INSTANCE | A_FSB_19_IBUF$BUF0.REG | A_FSB_19_IBUF$BUF0 | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | A_FSB_19_IBUF$BUF0.D | 10358 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | A_FSB_19_IBUF$BUF0.Q | 10361 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | A_FSB_21_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 9 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | A_FSB_21_IBUF$BUF0 | 9843 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | A_FSB_21_IBUF$BUF0.EXP | 10498 | ? | 470 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | A_FSB_21_IBUF$BUF0.SI | A_FSB_21_IBUF$BUF0 | 0 | 9 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 10363 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 10364 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | A_FSB_21_IBUF$BUF0.EXP | 10486 | ? | 470 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_TRUE | ram/BACTr +SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_TRUE | ram/BACTr +SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | fsb/ASrf +SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf + +SRFF_INSTANCE | A_FSB_21_IBUF$BUF0.REG | A_FSB_21_IBUF$BUF0 | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | A_FSB_21_IBUF$BUF0.D | 10362 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | A_FSB_21_IBUF$BUF0.Q | 10365 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | CLK20EN_OBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | SW<0> | 9930 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | CLK20EN_OBUF | 9844 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | OptxMapped | CLK20EN_OBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB.EXP | 10501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.EXP | cnt/TimeoutB | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | CLK20EN_OBUF$BUF0 | 9845 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.Q | CLK20EN_OBUF$BUF0 | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | CLK20EN_OBUF$BUF0.EXP | 10502 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | CLK20EN_OBUF$BUF0.SI | CLK20EN_OBUF$BUF0 | 0 | 11 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB.EXP | 10501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.EXP | cnt/TimeoutB | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | CLK20EN_OBUF$BUF0.D1 | 10367 | ? | 0 | 4096 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | CLK20EN_OBUF$BUF0.D2 | 10368 | ? | 0 | 4096 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/TimeoutB.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | CLK20EN_OBUF$BUF0.EXP | 10490 | ? | 499 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr +SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr + +SRFF_INSTANCE | CLK20EN_OBUF$BUF0.REG | CLK20EN_OBUF$BUF0 | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | CLK20EN_OBUF$BUF0.D | 10366 | ? | 0 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | CLK20EN_OBUF$BUF0.Q | 10369 | ? | 0 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | OptxMapped | CLK25EN_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK20EN_OBUF | 9844 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | CLK25EN_OBUF | 9846 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.Q | CLK25EN_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | CLK25EN_OBUF.EXP | 10500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | CLK25EN_OBUF.SI | CLK25EN_OBUF | 0 | 4 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK20EN_OBUF | 9844 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9755 | ? | 500 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | CLK25EN_OBUF.D1 | 10371 | ? | 0 | 4096 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | CLK25EN_OBUF.D2 | 10372 | ? | 0 | 4096 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | CLK20EN_OBUF +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | CLK25EN_OBUF.EXP | 10488 | ? | 0 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | ram/RASEL +SPPTERM | 2 | IV_TRUE | A_FSB_19_IBUF | IV_FALSE | ram/RASEL + +SRFF_INSTANCE | CLK25EN_OBUF.REG | CLK25EN_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | CLK25EN_OBUF.D | 10370 | ? | 0 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | CLK25EN_OBUF.Q | 10373 | ? | 0 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldHigh+OptxMapped | Park | WarpSE_COPY_0_COPY_0 | 2155872768 | 13 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr0 | 9779 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr1 | 9780 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IPL2r0 | 9783 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr2 | 9784 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESDone | 9793 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IPL2r1 | 9794 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | Park | 9847 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | Park.EXP | 10529 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | Park.SI | Park | 0 | 12 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr0 | 9779 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr1 | 9780 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IPL2r0 | 9783 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESr2 | 9784 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESDone | 9793 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IPL2r1 | 9794 | ? | 502 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | Park.D1 | 10375 | ? | 501 | 4096 | Park | NULL | NULL | Park.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | Park.D2 | 10376 | ? | 501 | 6144 | Park | NULL | NULL | Park.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | Park.EXP | 10516 | ? | 460 | 0 | Park | NULL | NULL | Park.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | Park.CE | 10377 | ? | 502 | 4096 | Park | NULL | NULL | Park.SI | 10 | 9 | MC_SI_CE +SPPTERM | 6 | IV_TRUE | RESr0 | IV_TRUE | RESr1 | IV_TRUE | IPL2r0 | IV_TRUE | RESr2 | IV_FALSE | RESDone | IV_TRUE | IPL2r1 + +SRFF_INSTANCE | Park.REG | Park | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | Park.D | 10374 | ? | 501 | 0 | Park | NULL | NULL | Park.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | Park.CE | 10377 | ? | 502 | 4096 | Park | NULL | NULL | Park.SI | 10 | 9 | MC_SI_CE +SPPTERM | 6 | IV_TRUE | RESr0 | IV_TRUE | RESr1 | IV_TRUE | IPL2r0 | IV_TRUE | RESr2 | IV_FALSE | RESDone | IV_TRUE | IPL2r1 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | Park.Q | 10378 | ? | 467 | 0 | Park | NULL | NULL | Park.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | nADoutLE1_OBUF | WarpSE_COPY_0_COPY_0 | 2155873024 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Clear1 | 9811 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Load1 | 9777 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nADoutLE1_OBUF | 9849 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | nADoutLE1_OBUF.SI | nADoutLE1_OBUF | 0 | 3 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Clear1 | 9811 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Load1 | 9777 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nADoutLE1_OBUF.D1 | 10380 | ? | 503 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nADoutLE1_OBUF.D2 | 10381 | ? | 503 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/Load1 +SPPTERM | 2 | IV_FALSE | iobs/Clear1 | IV_FALSE | iobs/ALE1 + +SRFF_INSTANCE | nADoutLE1_OBUF.REG | nADoutLE1_OBUF | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nADoutLE1_OBUF.D | 10379 | ? | 503 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK_FSB_IBUF/FCLK | 9720 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nADoutLE1_OBUF.Q | 10382 | ? | 503 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q +TNAME | CLK_FSB + +MACROCELL_INSTANCE | PrldHigh+OptxMapped | nAoutOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872768 | 5 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BGr1 | 9800 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BGr0 | 9786 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nASout | 9713 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nAoutOE_OBUF | 9851 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BGr1 | 9800 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BG | 9852 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BGr0 | 9786 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/nASout | 9713 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nAoutOE_OBUF.D1 | 10384 | ? | 536 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nAoutOE_OBUF.D2 | 10385 | ? | 536 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | iobm/BGr0 | IV_FALSE | iobm/BGr1 +SPPTERM | 2 | IV_FALSE | iobm/BGr1 | IV_TRUE | iobm/BG +SPPTERM | 3 | IV_FALSE | iobm/nASout | IV_FALSE | iobm/BGr0 | IV_FALSE | iobm/BG + +SRFF_INSTANCE | nAoutOE_OBUF.REG | nAoutOE_OBUF | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nAoutOE_OBUF.D | 10383 | ? | 536 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | CLK2X_IOB_IBUF/FCLK | 9707 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nAoutOE_OBUF.Q | 10386 | ? | 536 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q +TNAME | CLK2X_IOB + +MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9740 | ? | 458 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS1 | 9813 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefRAS | 9792 | ? | 437 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nRAMLWE_OBUF | 9853 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nRAMLWE_OBUF.EXP | 10522 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 10 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9740 | ? | 458 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS1 | 9813 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefRAS | 9792 | ? | 437 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nRAMLWE_OBUF.D1 | 10388 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nRAMLWE_OBUF.D2 | 10389 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nRAMLWE_OBUF.EXP | 10509 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | ram/RefRAS +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1 + +SRFF_INSTANCE | nRAMLWE_OBUF.REG | nRAMLWE_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nRAMLWE_OBUF.D | 10387 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nRAMLWE_OBUF.Q | 10390 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESDone.EXP | 10523 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nRAMUWE_OBUF | 9854 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nRAMUWE_OBUF.EXP | 10524 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 10 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RESDone.EXP | 10523 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nRAMUWE_OBUF.D1 | 10392 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nRAMUWE_OBUF.D2 | 10393 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RESDone.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nRAMUWE_OBUF.EXP | 10511 | ? | 497 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 + +SRFF_INSTANCE | nRAMUWE_OBUF.REG | nRAMUWE_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nRAMUWE_OBUF.D | 10391 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nRAMUWE_OBUF.Q | 10394 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 16 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nROMCS_OBUF | 9855 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nROMCS_OBUF.EXP | 10464 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 16 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMDIS2 | 9747 | ? | 466 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nROMCS_OBUF.D1 | 10396 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nROMCS_OBUF.D2 | 10397 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | SW_1_IBUF +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay1 +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nROMCS_OBUF.EXP | 10452 | ? | 466 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | nROMCS_OBUF.REG | nROMCS_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nROMCS_OBUF.D | 10395 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nROMCS_OBUF.Q | 10398 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q + +OUTPUT_INSTANCE | 0 | nVMA_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | iobm/nVMA$Q | 9709 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | iobm/nVMA$OE | 9711 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nVMA_IOB | 9856 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nAS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | iobm/nASout$Q | 9712 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | iobm/nASout$OE | 9714 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nAS_IOB | 9857 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nLDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | iobm/nLDS | 9715 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | iobm/nLDS$OE | 9716 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nLDS_IOB | 9858 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nUDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | iobm/nUDS | 9717 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | iobm/nUDS$OE | 9718 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nUDS_IOB | 9859 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nDTACK_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | fsb/nDTACK | 9752 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nDTACK_FSB | 9860 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<0> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_0_OBUF | 9822 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<0> | 9861 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<1> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_1_OBUF | 9823 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<1> | 9862 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<2> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_2_OBUF | 9824 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<2> | 9863 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<3> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_3_OBUF | 9825 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<3> | 9864 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<4> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_4_OBUF | 9826 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<4> | 9865 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<5> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_5_OBUF | 9827 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<5> | 9866 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<6> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_6_OBUF | 9828 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<6> | 9867 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<7> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_7_OBUF | 9829 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<7> | 9868 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<8> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_8_OBUF | 9830 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<8> | 9869 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<9> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | RA_9_OBUF | 9831 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<9> | 9870 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nBERR_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nBERR_FSB_OBUF | 9832 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nBERR_FSB | 9871 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nOE_OBUF | 9833 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nOE | 9872 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nROMWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nROMWE_OBUF | 9834 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nROMWE | 9873 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nVPA_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nVPA_FSB_OBUF | 9835 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nVPA_FSB | 9874 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nDinLE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | iobm/nDinLE | 9836 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nDinLE | 9875 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nDoutOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | iobm/nDoutOE | 9837 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDoutOE.Q | iobm/nDoutOE | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nDoutOE | 9876 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nADoutLE0 | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nADoutLE0_OBUF | 9838 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nADoutLE0 | 9877 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nDinOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nDinOE_OBUF | 9839 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nDinOE | 9878 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nRAS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nRAS_OBUF | 9840 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nRAS | 9879 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nCAS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | ram/nCAS | 9841 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nCAS | 9880 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<11> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | A_FSB_19_IBUF$BUF0 | 9842 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<11> | 9881 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | RA<10> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | A_FSB_21_IBUF$BUF0 | 9843 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | RA<10> | 9882 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | CLK20EN | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | CLK20EN_OBUF$BUF0 | 9845 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.Q | CLK20EN_OBUF$BUF0 | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | CLK20EN | 9883 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | CLK25EN | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | CLK25EN_OBUF | 9846 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.Q | CLK25EN_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | CLK25EN | 9884 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | CLK25EN | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nBR_IOB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | Park | 9847 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nBR_IOB | 9885 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBR_IOB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nADoutLE1 | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nADoutLE1_OBUF | 9849 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nADoutLE1 | 9886 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nAoutOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nAoutOE_OBUF | 9851 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nAoutOE | 9887 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nRAMLWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nRAMLWE_OBUF | 9853 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nRAMLWE | 9888 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nRAMUWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nRAMUWE_OBUF | 9854 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nRAMUWE | 9889 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nROMCS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nROMCS_OBUF | 9855 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nROMCS | 9890 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT + +MACROCELL_INSTANCE | SoftPfbk | $OpTx$FX_DC$591 | WarpSE_COPY_0_COPY_0 | 2181038080 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | $OpTx$FX_DC$591.SI | $OpTx$FX_DC$591 | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | $OpTx$FX_DC$591.D1 | 10400 | ? | 455 | 4096 | $OpTx$FX_DC$591 | NULL | NULL | $OpTx$FX_DC$591.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | $OpTx$FX_DC$591.D2 | 10401 | ? | 455 | 4096 | $OpTx$FX_DC$591 | NULL | NULL | $OpTx$FX_DC$591.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf + +SRFF_INSTANCE | $OpTx$FX_DC$591.REG | $OpTx$FX_DC$591 | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | $OpTx$FX_DC$591.D | 10399 | ? | 455 | 0 | $OpTx$FX_DC$591 | NULL | NULL | $OpTx$FX_DC$591.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | $OpTx$FX_DC$591.Q | 10402 | ? | 455 | 0 | $OpTx$FX_DC$591 | NULL | NULL | $OpTx$FX_DC$591.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | NULL | EXP14_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 20 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP15_.EXP | 10433 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP14_.EXP | 10432 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 20 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP15_.EXP | 10433 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP14_.EXP | 10417 | ? | 455 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | EXP15_.EXP +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | ram/RAMReady | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | ram/RAMReady | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$591.UIM + +MACROCELL_INSTANCE | NULL | EXP15_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 23 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r.EXP | 10434 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP15_.EXP | 10433 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 23 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r.EXP | 10434 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP15_.EXP | 10418 | ? | 455 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | fsb/Ready0r.EXP +SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM + +MACROCELL_INSTANCE | NULL | EXP16_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP16_.EXP | 10435 | ? | 452 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP16_.EXP | 10420 | ? | 452 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf + +MACROCELL_INSTANCE | NULL | EXP17_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 24 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP17_.EXP | 10436 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 24 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9691 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP17_.EXP | 10421 | ? | 467 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/BERR | IV_FALSE | cnt/TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | Disable + +MACROCELL_INSTANCE | NULL | EXP18_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP17_.EXP | 10436 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP18_.EXP | 10437 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP17_.EXP | 10436 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP18_.EXP | 10422 | ? | 467 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | EXP17_.EXP +SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 3 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 3 | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady + +MACROCELL_INSTANCE | NULL | EXP19_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 24 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP18_.EXP | 10437 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP19_.EXP | 10438 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 24 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9692 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9693 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9696 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9697 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9698 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutA | 9730 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutA.Q | cnt/TimeoutA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready2r | 9737 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP18_.EXP | 10437 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP19_.EXP | 10423 | ? | 467 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | EXP18_.EXP +SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1 +SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/nDTACK.UIM + +MACROCELL_INSTANCE | NULL | EXP20_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 19 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP21_.EXP | 10440 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP20_.EXP | 10439 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 19 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9735 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9814 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP21_.EXP | 10440 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP20_.EXP | 10424 | ? | 467 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | EXP21_.EXP +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | SW_1_IBUF +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady +SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1 + +MACROCELL_INSTANCE | NULL | EXP21_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r.EXP | 10441 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP21_.EXP | 10440 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/nDTACK.UIM | 9753 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Disable | 9848 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r.EXP | 10441 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP21_.EXP | 10425 | ? | 467 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | fsb/BERR0r.EXP +SPPTERM | 2 | IV_TRUE | iobs/BERR | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 2 | IV_TRUE | fsb/BERR0r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 2 | IV_TRUE | fsb/BERR1r | IV_TRUE | fsb/nDTACK.UIM +SPPTERM | 2 | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | Disable +SPPTERM | 3 | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/nDTACK.UIM + +MACROCELL_INSTANCE | NULL | EXP22_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 16 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay0.EXP | 10442 | ? | 453 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP22_.EXP | 10443 | ? | 453 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 16 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay0.EXP | 10442 | ? | 453 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP22_.EXP | 10428 | ? | 453 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | cs/nOverlay0.EXP +SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF +SPPTERM | 11 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady +SPPTERM | 11 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady + +MACROCELL_INSTANCE | NULL | EXP23_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMWE_OBUF.EXP | 10445 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP23_.EXP | 10446 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimeoutB | 9731 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimeoutB.Q | cnt/TimeoutB | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9738 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$FX_DC$591.UIM | 9891 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$591.Q | $OpTx$FX_DC$591 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9736 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9743 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMWE_OBUF.EXP | 10445 | ? | 455 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP23_.EXP | 10431 | ? | 455 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | nROMWE_OBUF.EXP +SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 4 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 4 | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cnt/TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$591.UIM +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$591.UIM + +MACROCELL_INSTANCE | NULL | EXP24_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP24_.EXP | 10463 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP24_.EXP | 10451 | ? | 469 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr +SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> + +MACROCELL_INSTANCE | NULL | EXP25_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_4_OBUF.EXP | 10468 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP25_.EXP | 10467 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9724 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_4_OBUF.EXP | 10468 | ? | 440 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP25_.EXP | 10455 | ? | 440 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/Once +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/Once +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/Once +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/Once +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/Once + +MACROCELL_INSTANCE | NULL | EXP26_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP26_.EXP | 10473 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP26_.EXP | 10461 | ? | 469 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | fsb/ASrf +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 8 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> + +MACROCELL_INSTANCE | NULL | EXP27_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 15 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP26_.EXP | 10473 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP27_.EXP | 10474 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 15 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP26_.EXP | 10473 | ? | 469 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP27_.EXP | 10462 | ? | 469 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | EXP26_.EXP +SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf + +MACROCELL_INSTANCE | NULL | EXP28_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 15 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_1_OBUF.EXP | 10494 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP28_.EXP | 10493 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 15 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_1_OBUF.EXP | 10494 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP28_.EXP | 10481 | ? | 498 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | RA_1_OBUF.EXP +SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf + +MACROCELL_INSTANCE | NULL | EXP29_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP29_.EXP | 10495 | ? | 471 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP29_.SI | EXP29_ | 0 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9756 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<5> | 9762 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<6> | 9763 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefCnt<7> | 9768 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP29_.EXP | 10483 | ? | 471 | 0 | EXP29_ | NULL | NULL | EXP29_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf +SPPTERM | 10 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> +SPPTERM | 10 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf +SPPTERM | 11 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> + +MACROCELL_INSTANCE | NULL | EXP30_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP30_.EXP | 10503 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP30_.SI | EXP30_ | 0 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/Once | 9723 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP30_.EXP | 10491 | ? | 499 | 0 | EXP30_ | NULL | NULL | EXP30_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf + +MACROCELL_INSTANCE | NULL | EXP31_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP31_.EXP | 10504 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP31_.SI | EXP31_ | 0 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/RefDone | 9722 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9754 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9760 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9778 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP31_.EXP | 10492 | ? | 498 | 0 | EXP31_ | NULL | NULL | EXP31_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr +SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/BACTr + +MACROCELL_INSTANCE | NULL | EXP32_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW1 | 9742 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF$BUF0.EXP | 10519 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP32_.EXP | 10518 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP32_.SI | EXP32_ | 0 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW0 | 9727 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW1 | 9742 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF$BUF0.EXP | 10519 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP32_.EXP | 10505 | ? | 444 | 0 | EXP32_ | NULL | NULL | EXP32_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP +SPPTERM | 3 | IV_TRUE | iobs/IORW0 | IV_TRUE | iobs/IORW1 | IV_FALSE | iobs/ALE1 +SPPTERM | 3 | IV_FALSE | iobs/IORW0 | IV_FALSE | iobs/IORW1 | IV_FALSE | iobs/ALE1 +SPPTERM | 3 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1 + +MACROCELL_INSTANCE | NULL | EXP33_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP33_.EXP | 10520 | ? | 472 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP33_.SI | EXP33_ | 0 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP33_.EXP | 10507 | ? | 472 | 0 | EXP33_ | NULL | NULL | EXP33_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 + +MACROCELL_INSTANCE | NULL | EXP34_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP34_.EXP | 10525 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP34_.SI | EXP34_ | 0 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9719 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9694 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9695 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP34_.EXP | 10512 | ? | 497 | 0 | EXP34_ | NULL | NULL | EXP34_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | SW_1_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1 + +MACROCELL_INSTANCE | NULL | EXP35_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP35_.EXP | 10526 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP35_.SI | EXP35_ | 0 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/BERR | 9726 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/BERR.Q | iobs/BERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR0r | 9733 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/BERR1r | 9734 | ? | 467 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP35_.EXP | 10513 | ? | 0 | 0 | EXP35_ | NULL | NULL | EXP35_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/BERR | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r + +MACROCELL_INSTANCE | NULL | EXP36_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_FSB_OBUF.EXP | 10527 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP36_.EXP | 10528 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP36_.SI | EXP36_ | 0 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9750 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9796 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9761 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9765 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9700 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay1 | 9725 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_FSB_OBUF.EXP | 10527 | ? | 460 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP36_.EXP | 10515 | ? | 460 | 0 | EXP36_ | NULL | NULL | EXP36_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | nBERR_FSB_OBUF.EXP +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF + +MACROCELL_INSTANCE | NULL | EXP37_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP37_.EXP | 10530 | ? | 444 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP37_.EXP | EXP37_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP37_.SI | EXP37_ | 0 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9699 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9701 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9703 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/ALE1 | 9850 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9704 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9705 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9706 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9702 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | SW_1_IBUF | 9795 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP37_.EXP | 10517 | ? | 444 | 0 | EXP37_ | NULL | NULL | EXP37_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_TRUE | iobs/ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF | IV_TRUE | iobs/ALE1 + +FB_INSTANCE | FOOBAR1_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 1 | ram/RefRAS | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | ram/BACTr | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152 +FBPIN | 3 | iobm/RESrr | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152 +FBPIN | 4 | iobm/RESrf | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | iobm/BERRrf | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152 +FBPIN | 6 | fsb/ASrf | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152 +FBPIN | 7 | cnt/RefCnt<1> | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | RESr2 | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152 +FBPIN | 9 | RESr1 | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152 +FBPIN | 10 | RESr0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | IPL2r1 | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152 +FBPIN | 12 | IPL2r0 | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152 +FBPIN | 13 | $OpTx$FX_DC$591 | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | iobs/IOU1 | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152 +FBPIN | 15 | iobs/IOL1 | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152 +FBPIN | 16 | iobm/IOS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | fsb/BERR1r | 1 | CLK2X_IOB_IBUF | 0 | NULL | 0 | 22 | 57344 +FBPIN | 18 | cs/nOverlay1 | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | FOOBAR2_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 6 | NULL | 0 | A_FSB_5_IBUF | 1 | NULL | 0 | 2 | 53248 +FBPIN | 7 | iobs/IOACTr | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | iobm/VPArr | 1 | A_FSB_6_IBUF | 1 | NULL | 0 | 3 | 53248 +FBPIN | 9 | iobm/VPArf | 1 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248 +FBPIN | 10 | iobm/IOREQr | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | iobm/Er2 | 1 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152 +FBPIN | 12 | iobm/Er | 1 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152 +FBPIN | 13 | iobm/DTACKrr | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | iobm/DTACKrf | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152 +FBPIN | 15 | iobm/BGr1 | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152 +FBPIN | 16 | iobm/BGr0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | iobm/BERRrr | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152 +FBPIN | 18 | cnt/RefCnt<0> | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | FOOBAR3_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 1 | fsb/VPA | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | EXP14_ | 1 | CLK_IOB_IBUF | 1 | NULL | 0 | 23 | 57344 +FBPIN | 3 | EXP15_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | fsb/Ready0r | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | EXP16_ | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152 +FBPIN | 6 | EXP17_ | 1 | E_IOB_IBUF | 1 | NULL | 0 | 25 | 49152 +FBPIN | 7 | EXP18_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | EXP19_ | 1 | CLK_FSB_IBUF | 0 | NULL | 0 | 27 | 57344 +FBPIN | 9 | fsb/nDTACK | 1 | NULL | 0 | nDTACK_FSB | 1 | 28 | 49152 +FBPIN | 10 | EXP20_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | EXP21_ | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152 +FBPIN | 12 | fsb/BERR0r | 1 | nLDS_FSB_IBUF | 1 | NULL | 0 | 30 | 49152 +FBPIN | 13 | cs/nOverlay0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | EXP22_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152 +FBPIN | 15 | fsb/Ready1r | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 33 | 49152 +FBPIN | 16 | fsb/Ready2r | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | nROMWE_OBUF | 1 | NULL | 0 | nROMWE | 1 | 34 | 49152 +FBPIN | 18 | EXP23_ | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | FOOBAR4_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 1 | iobs/Clear1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | nAoutOE_OBUF | 1 | NULL | 0 | nAoutOE | 1 | 87 | 49152 +FBPIN | 3 | iobs/ALE0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | cnt/RefCnt<7> | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | iobm/nDoutOE | 1 | NULL | 0 | nDoutOE | 1 | 89 | 49152 +FBPIN | 6 | nDinOE_OBUF | 1 | NULL | 0 | nDinOE | 1 | 90 | 49152 +FBPIN | 7 | cnt/RefCnt<6> | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | cnt/RefCnt<5> | 1 | nRES_IBUF | 1 | NULL | 0 | 91 | 49152 +FBPIN | 9 | cnt/RefCnt<4> | 1 | nIPL2_IBUF | 1 | NULL | 0 | 92 | 49152 +FBPIN | 10 | cnt/RefCnt<3> | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | nVPA_FSB_OBUF | 1 | NULL | 0 | nVPA_FSB | 1 | 93 | 49152 +FBPIN | 12 | cnt/RefCnt<2> | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152 +FBPIN | 13 | iobs/PS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | cnt/RefDone | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152 +FBPIN | 15 | iobs/IOU0 | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152 +FBPIN | 16 | cnt/TimeoutA | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | iobs/IOReady | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152 +FBPIN | 18 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | FOOBAR5_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 1 | EXP24_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | nROMCS_OBUF | 1 | NULL | 0 | nROMCS | 1 | 35 | 49152 +FBPIN | 3 | ram/RAMDIS2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | iobs/IOL0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | ram/nCAS | 1 | NULL | 0 | nCAS | 1 | 36 | 49152 +FBPIN | 6 | nOE_OBUF | 1 | NULL | 0 | nOE | 1 | 37 | 49152 +FBPIN | 7 | iobs/Once | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | EXP25_ | 1 | NULL | 0 | NULL | 0 | 39 | 49152 +FBPIN | 9 | RA_4_OBUF | 1 | NULL | 0 | RA<4> | 1 | 40 | 49152 +FBPIN | 10 | ram/Once | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | RA_3_OBUF | 1 | NULL | 0 | RA<3> | 1 | 41 | 49152 +FBPIN | 12 | RA_5_OBUF | 1 | NULL | 0 | RA<5> | 1 | 42 | 49152 +FBPIN | 13 | iobs/Load1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | RA_2_OBUF | 1 | NULL | 0 | RA<2> | 1 | 43 | 49152 +FBPIN | 15 | RA_6_OBUF | 1 | NULL | 0 | RA<6> | 1 | 46 | 49152 +FBPIN | 16 | EXP26_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | EXP27_ | 1 | NULL | 0 | NULL | 0 | 49 | 49152 +FBPIN | 18 | ram/RASEL | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | FOOBAR6_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 1 | iobm/ETACK | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | iobm/nVMA | 1 | NULL | 0 | nVMA_IOB | 1 | 74 | 49152 +FBPIN | 3 | iobm/IOS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | iobm/ES<3> | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | iobm/ES<1> | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 76 | 49152 +FBPIN | 6 | iobm/ES<0> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 77 | 49152 +FBPIN | 7 | iobm/ALE0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | iobm/ES<4> | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 78 | 49152 +FBPIN | 9 | iobm/nLDS | 1 | NULL | 0 | nLDS_IOB | 1 | 79 | 49152 +FBPIN | 10 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | iobm/nUDS | 1 | NULL | 0 | nUDS_IOB | 1 | 80 | 49152 +FBPIN | 12 | iobm/nASout | 1 | NULL | 0 | nAS_IOB | 1 | 81 | 49152 +FBPIN | 13 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | nADoutLE1_OBUF | 1 | NULL | 0 | nADoutLE1 | 1 | 82 | 49152 +FBPIN | 15 | nADoutLE0_OBUF | 1 | NULL | 0 | nADoutLE0 | 1 | 85 | 49152 +FBPIN | 16 | iobm/IOACT | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | iobm/nDinLE | 1 | NULL | 0 | nDinLE | 1 | 86 | 49152 +FBPIN | 18 | iobm/IOBERR | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | FOOBAR7_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 1 | EXP28_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | RA_1_OBUF | 1 | NULL | 0 | RA<1> | 1 | 50 | 49152 +FBPIN | 3 | EXP29_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | RA_7_OBUF | 1 | NULL | 0 | RA<7> | 1 | 52 | 49152 +FBPIN | 6 | RA_0_OBUF | 1 | NULL | 0 | RA<0> | 1 | 53 | 49152 +FBPIN | 7 | cnt/TimeoutBPre | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | RA_8_OBUF | 1 | NULL | 0 | RA<8> | 1 | 54 | 49152 +FBPIN | 9 | A_FSB_21_IBUF$BUF0 | 1 | NULL | 0 | RA<10> | 1 | 55 | 49152 +FBPIN | 10 | ram/RS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | RA_9_OBUF | 1 | NULL | 0 | RA<9> | 1 | 56 | 49152 +FBPIN | 12 | CLK25EN_OBUF | 1 | NULL | 0 | CLK25EN | 1 | 58 | 49152 +FBPIN | 13 | cnt/TimeoutB | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | CLK20EN_OBUF$BUF0 | 1 | NULL | 0 | CLK20EN | 1 | 59 | 49152 +FBPIN | 15 | ram/RAMReady | 1 | SW_1_IBUF | 1 | NULL | 0 | 60 | 49152 +FBPIN | 16 | EXP30_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | EXP31_ | 1 | CLK20EN_OBUF | 1 | NULL | 0 | 61 | 49152 +FBPIN | 18 | ram/RAMDIS1 | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | FOOBAR8_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 +FBPIN | 1 | EXP32_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | A_FSB_19_IBUF$BUF0 | 1 | NULL | 0 | RA<11> | 1 | 63 | 49152 +FBPIN | 3 | EXP33_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | nRAS_OBUF | 1 | NULL | 0 | nRAS | 1 | 64 | 49152 +FBPIN | 6 | nRAMLWE_OBUF | 1 | NULL | 0 | nRAMLWE | 1 | 65 | 49152 +FBPIN | 7 | RESDone | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | nRAMUWE_OBUF | 1 | NULL | 0 | nRAMUWE | 1 | 66 | 49152 +FBPIN | 9 | iobs/IOREQ | 1 | NULL | 0 | NULL | 0 | 67 | 49152 +FBPIN | 10 | EXP34_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | EXP35_ | 1 | NULL | 0 | NULL | 0 | 68 | 49152 +FBPIN | 12 | nBERR_FSB_OBUF | 1 | NULL | 0 | nBERR_FSB | 1 | 70 | 49152 +FBPIN | 13 | EXP36_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | iobs/IORW1 | 1 | NULL | 0 | NULL | 0 | 71 | 49152 +FBPIN | 15 | Park | 1 | NULL | 0 | nBR_IOB | 1 | 72 | 49152 +FBPIN | 16 | iobs/BERR | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | EXP37_ | 1 | nBG_IOB_IBUF | 1 | NULL | 0 | 73 | 49152 +FBPIN | 18 | iobs/IORW0 | 1 | NULL | 0 | NULL | 0 + +FB_INSTANCE | INPUTPINS_FOOBAR9_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 + +BUSINFO | A_FSB<23:1> | 23 | 0 | 0 | A_FSB<10> | 13 | A_FSB<11> | 12 | A_FSB<12> | 11 | A_FSB<13> | 10 | A_FSB<14> | 9 | A_FSB<15> | 8 | A_FSB<16> | 7 | A_FSB<17> | 6 | A_FSB<18> | 5 | A_FSB<19> | 4 | A_FSB<1> | 22 | A_FSB<20> | 3 | A_FSB<21> | 2 | A_FSB<22> | 1 | A_FSB<23> | 0 | A_FSB<2> | 21 | A_FSB<3> | 20 | A_FSB<4> | 19 | A_FSB<5> | 18 | A_FSB<6> | 17 | A_FSB<7> | 16 | A_FSB<8> | 15 | A_FSB<9> | 14 +BUSINFO | RA<11:0> | 12 | 0 | 1 | RA<0> | 11 | RA<10> | 1 | RA<11> | 0 | RA<1> | 10 | RA<2> | 9 | RA<3> | 8 | RA<4> | 7 | RA<5> | 6 | RA<6> | 5 | RA<7> | 4 | RA<8> | 3 | RA<9> | 2 +BUSINFO | SW<2:0> | 3 | 0 | 0 | SW<0> | 2 | SW<1> | 1 | SW<2> | 0 + +FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | nLDS_FSB | 30 | 4 | nRES | 91 | 6 | nIPL2 | 92 | 8 | nAS_FSB | 32 | 9 | iobm/IOS_FSM_FFd2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 12 | cs/nOverlay0 | NULL | 15 | iobs/BERR | NULL | 16 | fsb/BERR1r | NULL | 17 | cnt/RefCnt<0> | NULL | 23 | nBERR_IOB | 76 +FB_ORDER_OF_INPUTS | FOOBAR1_ | 27 | nUDS_FSB | 33 | 30 | iobm/IOS_FSM_FFd3 | NULL | 33 | RESr1 | NULL | 37 | iobs/Load1 | NULL | 41 | IPL2r0 | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 44 | fsb/ASrf | NULL | 47 | ram/RS_FSM_FFd1 | NULL | 49 | ram/RS_FSM_FFd2 | NULL | 50 | iobm/IOS_FSM_FFd1 | NULL | 51 | RESr0 | NULL + +FB_IMUX_INDEX | FOOBAR1_ | 260 | -1 | -1 | -1 | 148 | -1 | 150 | -1 | 268 | 99 | -1 | -1 | 48 | -1 | -1 | 141 | 16 | 35 | -1 | -1 | -1 | -1 | -1 | 175 | -1 | -1 | -1 | 272 | -1 | -1 | 92 | -1 | -1 | 8 | -1 | -1 | -1 | 84 | -1 | -1 | -1 | 11 | -1 | -1 | 5 | -1 | -1 | 71 | -1 | 117 | 15 | 9 | -1 | -1 + + +FB_ORDER_OF_INPUTS | FOOBAR2_ | 7 | nDTACK_IOB | 78 | 8 | iobs/IOREQ | NULL | 11 | nVPA_IOB | 77 | 15 | iobm/IOACT | NULL | 16 | E_IOB | 25 +FB_ORDER_OF_INPUTS | FOOBAR2_ | 23 | nBERR_IOB | 76 | 41 | nBG_IOB | 73 | 43 | iobm/Er | NULL | 52 | iobm/BGr0 | NULL + +FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 167 | 134 | -1 | -1 | 171 | -1 | -1 | -1 | 105 | 242 | -1 | -1 | -1 | -1 | -1 | -1 | 175 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 183 | -1 | 29 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 33 | -1 + + +FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | fsb/VPA | NULL | 1 | A_FSB<14> | 12 | 2 | A_FSB<8> | 6 | 3 | A_FSB<15> | 13 | 4 | nRES | 91 +FB_ORDER_OF_INPUTS | FOOBAR3_ | 5 | fsb/ASrf | NULL | 6 | A_FSB<10> | 8 | 8 | fsb/nDTACK.UIM | NULL | 9 | A_FSB<18> | 16 | 10 | A_FSB<11> | 9 +FB_ORDER_OF_INPUTS | FOOBAR3_ | 11 | fsb/BERR0r | NULL | 12 | $OpTx$FX_DC$591.UIM | NULL | 13 | A_FSB<19> | 17 | 14 | fsb/Ready1r | NULL | 15 | fsb/Ready2r | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 16 | fsb/BERR1r | NULL | 17 | cs/nOverlay1 | NULL | 19 | A_FSB<20> | 18 | 20 | A_FSB<16> | 14 | 22 | A_FSB<12> | 10 +FB_ORDER_OF_INPUTS | FOOBAR3_ | 23 | SW<1> | 60 | 24 | cs/nOverlay0 | NULL | 25 | ram/RAMReady | NULL | 28 | nWE_FSB | 29 | 30 | iobs/BERR | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 33 | nAS_FSB | 32 | 36 | A_FSB<23> | 24 | 37 | iobs/IOReady | NULL | 38 | fsb/Ready0r | NULL | 39 | A_FSB<22> | 20 +FB_ORDER_OF_INPUTS | FOOBAR3_ | 42 | Disable | NULL | 44 | A_FSB<13> | 11 | 46 | iobs/ALE1 | NULL | 47 | A_FSB<21> | 19 | 48 | cnt/TimeoutB | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 49 | A_FSB<17> | 15 | 50 | cnt/TimeoutA | NULL | 53 | A_FSB<9> | 7 + +FB_IMUX_INDEX | FOOBAR3_ | 36 | 210 | 194 | 212 | 148 | 5 | 198 | -1 | 44 | 218 | 202 | 47 | 12 | 222 | 50 | 51 | 16 | 17 | -1 | 226 | 214 | -1 | 206 | 215 | 48 | 122 | -1 | -1 | 256 | -1 | 141 | -1 | -1 | 268 | -1 | -1 | 240 | 70 | 39 | 230 | -1 | -1 | 140 | -1 | 208 | -1 | 103 | 228 | 120 | 216 | 69 | -1 | -1 | 196 + + +FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | ram/RefRAS | NULL | 1 | iobm/BG | NULL | 2 | iobm/IOS_FSM_FFd3 | NULL | 3 | cnt/RefCnt<7> | NULL | 4 | A_FSB<22> | 20 +FB_ORDER_OF_INPUTS | FOOBAR4_ | 5 | fsb/ASrf | NULL | 6 | cnt/RefCnt<1> | NULL | 7 | cnt/RefCnt<5> | NULL | 8 | cnt/RefCnt<4> | NULL | 9 | cnt/RefCnt<3> | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 11 | cnt/RefCnt<2> | NULL | 12 | iobs/PS_FSM_FFd1 | NULL | 13 | iobs/IOU1 | NULL | 14 | iobm/BGr1 | NULL | 15 | iobm/BGr0 | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 16 | iobs/IOReady | NULL | 17 | cs/nOverlay1 | NULL | 19 | A_FSB<20> | 18 | 20 | cnt/RefCnt<0> | NULL | 21 | iobs/IORW0 | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 24 | iobs/Once | NULL | 27 | nUDS_FSB | 33 | 28 | nWE_FSB | 29 | 30 | ram/Once | NULL | 33 | nAS_FSB | 32 +FB_ORDER_OF_INPUTS | FOOBAR4_ | 34 | iobs/PS_FSM_FFd2 | NULL | 35 | cnt/RefCnt<6> | NULL | 36 | A_FSB<23> | 24 | 39 | SW<1> | 60 | 40 | iobm/IOS_FSM_FFd2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 41 | cnt/RefDone | NULL | 42 | iobs/IOACTr | NULL | 44 | fsb/VPA | NULL | 45 | A_FSB<21> | 19 | 46 | iobs/ALE1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 47 | ram/RS_FSM_FFd1 | NULL | 49 | ram/RS_FSM_FFd2 | NULL | 50 | cnt/TimeoutA | NULL | 51 | ram/RS_FSM_FFd3 | NULL | 52 | iobm/nASout | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 53 | iobm/IOBERR | NULL + +FB_IMUX_INDEX | FOOBAR4_ | 0 | 55 | 92 | 57 | 230 | 5 | 6 | 61 | 62 | 63 | -1 | 65 | 66 | 13 | 32 | 33 | 70 | 17 | -1 | 226 | 35 | 143 | -1 | -1 | 78 | -1 | -1 | 272 | 256 | -1 | 81 | -1 | -1 | 268 | 129 | 60 | 240 | -1 | -1 | 215 | 99 | 67 | 24 | -1 | 36 | 228 | 103 | 71 | -1 | 117 | 69 | 111 | 101 | 107 + + +FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | A_FSB<20> | 18 | 1 | ram/BACTr | NULL | 2 | ram/RAMDIS2 | NULL | 3 | A_FSB<15> | 13 | 4 | A_FSB<22> | 20 +FB_ORDER_OF_INPUTS | FOOBAR5_ | 5 | A_FSB<16> | 14 | 6 | cnt/RefCnt<6> | NULL | 7 | A_FSB<17> | 15 | 8 | A_FSB<3> | 96 | 9 | ram/RS_FSM_FFd2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 10 | A_FSB<6> | 3 | 12 | A_FSB<4> | 97 | 13 | iobs/ALE1 | NULL | 14 | iobs/IOL1 | NULL | 16 | A_FSB<13> | 11 +FB_ORDER_OF_INPUTS | FOOBAR5_ | 17 | ram/RS_FSM_FFd1 | NULL | 21 | A_FSB<19> | 17 | 22 | A_FSB<12> | 10 | 23 | SW<1> | 60 | 24 | iobs/Once | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 28 | nWE_FSB | 29 | 30 | ram/Once | NULL | 32 | cnt/RefCnt<5> | NULL | 33 | nAS_FSB | 32 | 34 | cs/nOverlay1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 35 | A_FSB<14> | 12 | 36 | A_FSB<23> | 24 | 37 | nLDS_FSB | 30 | 39 | A_FSB<5> | 2 | 40 | A_FSB<7> | 4 +FB_ORDER_OF_INPUTS | FOOBAR5_ | 41 | cnt/RefDone | NULL | 42 | cnt/RefCnt<7> | NULL | 44 | fsb/ASrf | NULL | 45 | iobs/PS_FSM_FFd2 | NULL | 46 | ram/RASEL | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 47 | A_FSB<21> | 19 | 49 | iobs/PS_FSM_FFd1 | NULL | 50 | A_FSB<18> | 16 | 51 | ram/RS_FSM_FFd3 | NULL + +FB_IMUX_INDEX | FOOBAR5_ | 226 | 1 | 74 | 212 | 230 | 214 | 60 | 216 | 168 | 117 | 186 | -1 | 172 | 103 | 14 | -1 | 208 | 71 | -1 | -1 | -1 | 222 | 206 | 215 | 78 | -1 | -1 | -1 | 256 | -1 | 81 | -1 | 61 | 268 | 17 | 210 | 240 | 260 | -1 | 182 | 190 | 67 | 57 | -1 | 5 | 129 | 89 | 228 | -1 | 66 | 218 | 111 | -1 | -1 + + +FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobs/Clear1 | NULL | 1 | iobm/nVMA | NULL | 2 | iobm/RESrr | NULL | 3 | iobm/RESrf | NULL | 4 | iobm/BERRrf | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/ES<0> | NULL | 6 | iobm/ALE0 | NULL | 7 | iobm/VPArr | NULL | 8 | iobm/VPArf | NULL | 9 | iobm/IOREQr | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 10 | iobm/Er2 | NULL | 11 | iobm/Er | NULL | 12 | iobm/DTACKrr | NULL | 13 | iobm/DTACKrf | NULL | 14 | iobs/IOU0 | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 15 | iobm/IOS_FSM_FFd1 | NULL | 16 | iobm/BERRrr | NULL | 17 | iobs/IORW0 | NULL | 20 | iobm/ES<3> | NULL | 23 | nBERR_IOB | 76 +FB_ORDER_OF_INPUTS | FOOBAR6_ | 24 | iobm/ETACK | NULL | 28 | iobm/ES<1> | NULL | 30 | iobm/IOS_FSM_FFd3 | NULL | 33 | iobs/ALE0 | NULL | 37 | iobs/Load1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 38 | iobm/IOACT | NULL | 40 | iobm/IOS_FSM_FFd2 | NULL | 42 | iobm/ES<4> | NULL | 43 | iobm/ES<2> | NULL | 46 | iobs/ALE1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 48 | CLK_IOB | 23 | 51 | iobm/BG | NULL | 52 | iobs/IOL0 | NULL | 53 | iobm/IOBERR | NULL + +FB_IMUX_INDEX | FOOBAR6_ | 54 | 91 | 2 | 3 | 4 | 95 | 96 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 68 | 15 | 34 | 143 | -1 | -1 | 93 | -1 | -1 | 175 | 90 | -1 | -1 | -1 | 94 | -1 | 92 | -1 | -1 | 56 | -1 | -1 | -1 | 84 | 105 | -1 | 99 | -1 | 97 | 102 | -1 | -1 | 103 | -1 | 238 | -1 | -1 | 55 | 75 | 107 + + +FB_ORDER_OF_INPUTS | FOOBAR7_ | 2 | A_FSB<21> | 19 | 3 | cnt/RefCnt<7> | NULL | 4 | SW<0> | 61 | 5 | fsb/ASrf | NULL | 6 | cnt/TimeoutBPre | NULL +FB_ORDER_OF_INPUTS | FOOBAR7_ | 7 | A_FSB<17> | 15 | 8 | nAS_FSB | 32 | 9 | ram/Once | NULL | 12 | cnt/TimeoutB | NULL | 13 | cnt/RefDone | NULL +FB_ORDER_OF_INPUTS | FOOBAR7_ | 14 | A_FSB<23> | 24 | 17 | cs/nOverlay1 | NULL | 19 | A_FSB<20> | 18 | 20 | cnt/RefCnt<0> | NULL | 21 | A_FSB<19> | 17 +FB_ORDER_OF_INPUTS | FOOBAR7_ | 22 | ram/BACTr | NULL | 26 | A_FSB<9> | 7 | 31 | A_FSB<10> | 8 | 34 | cnt/RefCnt<5> | NULL | 35 | cnt/RefCnt<6> | NULL +FB_ORDER_OF_INPUTS | FOOBAR7_ | 36 | cnt/RefCnt<3> | NULL | 38 | cnt/RefCnt<4> | NULL | 39 | A_FSB<22> | 20 | 40 | A_FSB<8> | 6 | 43 | cnt/RefCnt<1> | NULL +FB_ORDER_OF_INPUTS | FOOBAR7_ | 45 | A_FSB<1> | 94 | 46 | ram/RASEL | NULL | 47 | ram/RS_FSM_FFd1 | NULL | 48 | A_FSB<2> | 95 | 49 | ram/RS_FSM_FFd2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR7_ | 50 | A_FSB<18> | 16 | 51 | ram/RS_FSM_FFd3 | NULL | 52 | A_FSB<11> | 9 | 53 | cnt/RefCnt<2> | NULL + +FB_IMUX_INDEX | FOOBAR7_ | -1 | -1 | 228 | 57 | 213 | 5 | 114 | 216 | 268 | 81 | -1 | -1 | 120 | 67 | 240 | -1 | -1 | 17 | -1 | 226 | 35 | 222 | 1 | -1 | -1 | -1 | 196 | -1 | -1 | -1 | -1 | 198 | -1 | -1 | 61 | 60 | 63 | -1 | 62 | 230 | 194 | -1 | -1 | 6 | -1 | 156 | 89 | 71 | 164 | 117 | 218 | 111 | 202 | 65 + + +FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | A_FSB<20> | 18 | 2 | A_FSB<21> | 19 | 3 | iobs/PS_FSM_FFd2 | NULL | 4 | A_FSB<22> | 20 | 6 | iobs/IOACTr | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 7 | RESr2 | NULL | 8 | RESr1 | NULL | 9 | RESr0 | NULL | 10 | IPL2r1 | NULL | 11 | IPL2r0 | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 12 | iobs/PS_FSM_FFd1 | NULL | 13 | iobs/ALE1 | NULL | 14 | A_FSB<23> | 24 | 15 | iobs/BERR | NULL | 16 | A_FSB<13> | 11 +FB_ORDER_OF_INPUTS | FOOBAR8_ | 17 | iobm/IOBERR | NULL | 18 | A_FSB<19> | 17 | 21 | iobs/IORW0 | NULL | 23 | SW<1> | 60 | 24 | iobs/Once | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 27 | nUDS_FSB | 33 | 28 | nWE_FSB | 29 | 32 | cnt/TimeoutB | NULL | 33 | nAS_FSB | 32 | 34 | cs/nOverlay1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 35 | A_FSB<14> | 12 | 37 | nLDS_FSB | 30 | 39 | ram/RAMDIS2 | NULL | 40 | ram/RAMDIS1 | NULL | 42 | ram/RefRAS | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 43 | iobs/IORW1 | NULL | 44 | fsb/ASrf | NULL | 45 | fsb/BERR1r | NULL | 48 | fsb/BERR0r | NULL | 49 | A_FSB<17> | 15 +FB_ORDER_OF_INPUTS | FOOBAR8_ | 50 | A_FSB<18> | 16 | 51 | RESDone | NULL | 53 | A_FSB<16> | 14 + +FB_IMUX_INDEX | FOOBAR8_ | 226 | -1 | 228 | 129 | 230 | -1 | 24 | 7 | 8 | 9 | 10 | 11 | 66 | 103 | 240 | 141 | 208 | 107 | 222 | -1 | -1 | 143 | -1 | 215 | 78 | -1 | -1 | 272 | 256 | -1 | -1 | -1 | 120 | 268 | 17 | 210 | -1 | 260 | -1 | 74 | 125 | -1 | 0 | 139 | 5 | 16 | -1 | -1 | 47 | 216 | 218 | 132 | -1 | 214 + + +GLOBAL_FCLK | CLK2X_IOB | 0 | 0 | CLK_IOB | 1 | 1 | CLK_FSB | 2 | 2 + +TIME_TSPEC | TS_CLK_IOB | PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS | CLK_IOB | 10003 | 1428 | 714 | NULL + +TIME_TSPEC | TS_CLK_FSB | PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS | CLK_FSB | 10003 | 400 | 200 | NULL + +TIME_TSPEC | TS_CLK2X_IOB | PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS | CLK2X_IOB | 10003 | 666 | 333 | NULL diff --git a/cpld/XC95144XL/WarpSE.xise b/cpld/XC95144XL/WarpSE.xise index 34e521f..c18d7f4 100644 --- a/cpld/XC95144XL/WarpSE.xise +++ b/cpld/XC95144XL/WarpSE.xise @@ -35,17 +35,17 @@ - - - - - - - + + + + + + + @@ -64,7 +64,7 @@ - + @@ -78,6 +78,7 @@ + @@ -96,14 +97,14 @@ - + - - - - + + + + @@ -112,7 +113,7 @@ - + @@ -130,7 +131,7 @@ - + @@ -148,15 +149,15 @@ - + - - - - + + + + @@ -194,7 +195,7 @@ - + @@ -239,8 +240,8 @@ - - + + diff --git a/cpld/XC95144XL/WarpSE.xml b/cpld/XC95144XL/WarpSE.xml new file mode 100644 index 0000000..2b78aa1 --- /dev/null +++ b/cpld/XC95144XL/WarpSE.xml @@ -0,0 +1,3 @@ + + +WarpSE.rptC:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chpWarpSE.mfd
Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'WarpSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC constraint 'P22'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC constraint 'P27'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC constraint 'P23'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.Cpld:1007 - Removing unused input(s) 'SW<2>'. The input(s) are unused after optimization. Please verify functionality via simulation. diff --git a/cpld/XC95144XL/MXSE.xst b/cpld/XC95144XL/WarpSE.xst similarity index 80% rename from cpld/XC95144XL/MXSE.xst rename to cpld/XC95144XL/WarpSE.xst index de9ca6e..b4b1324 100644 --- a/cpld/XC95144XL/MXSE.xst +++ b/cpld/XC95144XL/WarpSE.xst @@ -1,16 +1,16 @@ set -tmpdir "xst/projnav.tmp" set -xsthdpdir "xst" run --ifn MXSE.prj +-ifn WarpSE.prj -ifmt mixed --ofn MXSE +-ofn WarpSE -ofmt NGC -p xc9500xl --top MXSE +-top WarpSE -opt_mode Speed --opt_level 1 +-opt_level 2 -iuc NO --keep_hierarchy Yes +-keep_hierarchy No -netlist_hierarchy As_Optimized -rtlview Yes -hierarchy_separator / diff --git a/cpld/XC95144XL/WarpSE_bld.html b/cpld/XC95144XL/WarpSE_bld.html new file mode 100644 index 0000000..2b90479 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_bld.html @@ -0,0 +1 @@ +Translation Report
Translation Report
Mon Mar 28 09:31:43 2022


Release 14.7 ngdbuild P.20131013 (nt)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.

Command Line: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt\unwrapped\ngdbuild.exe -intstyle
ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10
WarpSE.ngc WarpSE.ngd

Reading NGO file "Z:/Warp-SE/cpld/XC95144XL/WarpSE.ngc" ...
Gathering constraint information from source properties...
Done.

Annotating constraints to design from ucf file
"Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
Done...

Checking expanded design ...

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 117300 kilobytes

Writing NGD file "WarpSE.ngd" ...
Total REAL time to NGDBUILD completion:  17 sec
Total CPU time to NGDBUILD completion:   16 sec

Writing NGDBUILD log file "WarpSE.bld"...
\ No newline at end of file diff --git a/cpld/XC95144XL/MXSE_build.xml b/cpld/XC95144XL/WarpSE_build.xml similarity index 94% rename from cpld/XC95144XL/MXSE_build.xml rename to cpld/XC95144XL/WarpSE_build.xml index 9e2c7fc..017b652 100644 --- a/cpld/XC95144XL/MXSE_build.xml +++ b/cpld/XC95144XL/WarpSE_build.xml @@ -2,10 +2,10 @@ - - + + - + @@ -64,7 +64,7 @@ - + @@ -87,7 +87,7 @@ - + @@ -229,7 +229,7 @@ - - + + diff --git a/cpld/XC95144XL/MXSE_envsettings.html b/cpld/XC95144XL/WarpSE_envsettings.html similarity index 98% rename from cpld/XC95144XL/MXSE_envsettings.html rename to cpld/XC95144XL/WarpSE_envsettings.html index e84a8e8..a438b05 100644 --- a/cpld/XC95144XL/MXSE_envsettings.html +++ b/cpld/XC95144XL/WarpSE_envsettings.html @@ -56,7 +56,7 @@ -ifn   -MXSE.prj +WarpSE.prj   @@ -68,7 +68,7 @@ -ofn   -MXSE +WarpSE   @@ -86,7 +86,7 @@ -top   -MXSE +WarpSE   @@ -98,7 +98,7 @@ -opt_level Optimization Effort -1 +2 1 @@ -110,7 +110,7 @@ -keep_hierarchy Keep Hierarchy -Yes +No YES @@ -206,7 +206,7 @@ -uc   -//192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf +Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf None diff --git a/cpld/XC95144XL/MXSE_html/fit/applet.js b/cpld/XC95144XL/WarpSE_html/fit/applet.js similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/applet.js rename to cpld/XC95144XL/WarpSE_html/fit/applet.js diff --git a/cpld/XC95144XL/MXSE_html/fit/appletref.htm b/cpld/XC95144XL/WarpSE_html/fit/appletref.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/appletref.htm rename to cpld/XC95144XL/WarpSE_html/fit/appletref.htm diff --git a/cpld/XC95144XL/WarpSE_html/fit/ascii.htm b/cpld/XC95144XL/WarpSE_html/fit/ascii.htm new file mode 100644 index 0000000..9e28b5b --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/ascii.htm @@ -0,0 +1,1844 @@ + +
+ 
+cpldfit:  version P.20131013                        Xilinx Inc.
+                                  Fitter Report
+Design Name: WarpSE                              Date:  3-28-2022,  9:46AM
+Device Used: XC95144XL-10-TQ100
+Fitting Status: Successful
+
+*************************  Mapped Resource Summary  **************************
+
+Macrocells     Product Terms    Function Block   Registers      Pins           
+Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
+114/144 ( 79%) 463 /720  ( 64%) 253/432 ( 59%)   89 /144 ( 62%) 74 /81  ( 91%)
+
+** Function Block Resources **
+
+Function    Mcells      FB Inps     Pterms      IO          
+Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
+FB1          18/18*      20/54       23/90      11/11*
+FB2          12/18        9/54       11/90       8/10
+FB3           8/18       38/54       82/90      10/10*
+FB4          18/18*      41/54       39/90      10/10*
+FB5          14/18       39/54       82/90       8/10
+FB6          18/18*      34/54       64/90      10/10*
+FB7          14/18       34/54       81/90      10/10*
+FB8          12/18       38/54       81/90       7/10
+             -----       -----       -----      -----    
+            114/144     253/432     463/720     74/81 
+
+* - Resource is exhausted
+
+** Global Control Resources **
+
+Signal 'CLK2X_IOB' mapped onto global clock net GCK1.
+Signal 'CLK_IOB' mapped onto global clock net GCK2.
+Signal 'CLK_FSB' mapped onto global clock net GCK3.
+Global output enable net(s) unused.
+Global set/reset net(s) unused.
+
+** Pin Resources **
+
+Signal Type    Required     Mapped  |  Pin Type            Used    Total 
+------------------------------------|------------------------------------
+Input         :   36          36    |  I/O              :    68      73
+Output        :   35          35    |  GCK/IO           :     3       3
+Bidirectional :    0           0    |  GTS/IO           :     3       4
+GCK           :    3           3    |  GSR/IO           :     0       1
+GTS           :    0           0    |
+GSR           :    0           0    |
+                 ----        ----
+        Total     74          74
+
+** Power Data **
+
+There are 114 macrocells in high performance mode (MCHP).
+There are 0 macrocells in low power mode (MCLP).
+End of Mapped Resource Summary
+**************************  Errors and Warnings  ***************************
+
+WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
+   use the default filename of 'WarpSE.ise'.
+INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC
+   constraint 'P22'. It is recommended that you declare this BUFG explicitedly
+   in your design. Note that for certain device families the output of a BUFG
+   constraint can not drive a gated clock, and the BUFG constraint will be
+   ignored.
+INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC
+   constraint 'P27'. It is recommended that you declare this BUFG explicitedly
+   in your design. Note that for certain device families the output of a BUFG
+   constraint can not drive a gated clock, and the BUFG constraint will be
+   ignored.
+INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC
+   constraint 'P23'. It is recommended that you declare this BUFG explicitedly
+   in your design. Note that for certain device families the output of a BUFG
+   constraint can not drive a gated clock, and the BUFG constraint will be
+   ignored.
+WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'.  The input(s) are unused
+   after optimization. Please verify functionality via simulation.
+*************************  Summary of Mapped Logic  ************************
+
+** 35 Outputs **
+
+Signal              Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
+Name                Pts   Inps          No.  Type    Use     Mode Rate State
+nDTACK_FSB          28    34    FB3_9   28   I/O     O       STD  FAST RESET
+nROMWE              1     2     FB3_17  34   I/O     O       STD  FAST 
+nAoutOE             3     4     FB4_2   87   I/O     O       STD  FAST SET
+nDoutOE             2     3     FB4_5   89   I/O     O       STD  FAST RESET
+nDinOE              3     7     FB4_6   90   I/O     O       STD  FAST 
+nVPA_FSB            1     2     FB4_11  93   I/O     O       STD  FAST 
+nROMCS              3     6     FB5_2   35   I/O     O       STD  FAST 
+nCAS                1     1     FB5_5   36   I/O     O       STD  FAST RESET
+nOE                 1     2     FB5_6   37   I/O     O       STD  FAST 
+RA<4>               2     3     FB5_9   40   I/O     O       STD  FAST 
+RA<3>               2     3     FB5_11  41   I/O     O       STD  FAST 
+RA<5>               2     3     FB5_12  42   I/O     O       STD  FAST 
+RA<2>               2     3     FB5_14  43   I/O     O       STD  FAST 
+RA<6>               2     3     FB5_15  46   I/O     O       STD  FAST 
+nVMA_IOB            3     10    FB6_2   74   I/O     O       STD  FAST RESET
+nLDS_IOB            4     6     FB6_9   79   I/O     O       STD  FAST RESET
+nUDS_IOB            4     6     FB6_11  80   I/O     O       STD  FAST RESET
+nAS_IOB             3     4     FB6_12  81   I/O     O       STD  FAST RESET
+nADoutLE1           2     3     FB6_14  82   I/O     O       STD  FAST SET
+nADoutLE0           1     2     FB6_15  85   I/O     O       STD  FAST 
+nDinLE              1     2     FB6_17  86   I/O     O       STD  FAST RESET
+RA<1>               2     3     FB7_2   50   I/O     O       STD  FAST 
+RA<7>               2     3     FB7_5   52   I/O     O       STD  FAST 
+RA<0>               2     3     FB7_6   53   I/O     O       STD  FAST 
+RA<8>               7     7     FB7_8   54   I/O     O       STD  FAST 
+RA<10>              1     1     FB7_9   55   I/O     O       STD  FAST 
+RA<9>               2     3     FB7_11  56   I/O     O       STD  FAST 
+CLK25EN             1     1     FB7_12  58   I/O     O       STD  FAST 
+CLK20EN             1     1     FB7_14  59   I/O     O       STD  FAST 
+RA<11>              1     1     FB8_2   63   I/O     O       STD  FAST 
+nRAS                3     8     FB8_5   64   I/O     O       STD  FAST 
+nRAMLWE             1     5     FB8_6   65   I/O     O       STD  FAST 
+nRAMUWE             1     5     FB8_8   66   I/O     O       STD  FAST 
+nBERR_FSB           3     9     FB8_12  70   I/O     O       STD  FAST 
+nBR_IOB             1     6     FB8_15  72   I/O     O       STD  FAST SET
+
+** 79 Buried Nodes **
+
+Signal              Total Total Loc     Pwr  Reg Init
+Name                Pts   Inps          Mode State
+ram/RefRAS          1     2     FB1_1   STD  RESET
+ram/BACTr           1     2     FB1_2   STD  RESET
+iobm/RESrr          1     1     FB1_3   STD  RESET
+iobm/RESrf          1     1     FB1_4   STD  RESET
+iobm/BERRrf         1     1     FB1_5   STD  RESET
+fsb/ASrf            1     1     FB1_6   STD  RESET
+cnt/RefCnt<1>       1     1     FB1_7   STD  RESET
+RESr2               1     1     FB1_8   STD  RESET
+RESr1               1     1     FB1_9   STD  RESET
+RESr0               1     1     FB1_10  STD  RESET
+IPL2r1              1     1     FB1_11  STD  RESET
+IPL2r0              1     1     FB1_12  STD  RESET
+$OpTx$FX_DC$591     1     2     FB1_13  STD  
+iobs/IOU1           2     2     FB1_14  STD  RESET
+iobs/IOL1           2     2     FB1_15  STD  RESET
+iobm/IOS_FSM_FFd1   2     3     FB1_16  STD  RESET
+fsb/BERR1r          2     4     FB1_17  STD  RESET
+cs/nOverlay1        2     3     FB1_18  STD  RESET
+iobs/IOACTr         1     1     FB2_7   STD  RESET
+iobm/VPArr          1     1     FB2_8   STD  RESET
+iobm/VPArf          1     1     FB2_9   STD  RESET
+iobm/IOREQr         1     1     FB2_10  STD  RESET
+iobm/Er2            1     1     FB2_11  STD  RESET
+iobm/Er             1     1     FB2_12  STD  RESET
+iobm/DTACKrr        1     1     FB2_13  STD  RESET
+iobm/DTACKrf        1     1     FB2_14  STD  RESET
+iobm/BGr1           1     1     FB2_15  STD  RESET
+iobm/BGr0           1     1     FB2_16  STD  RESET
+iobm/BERRrr         1     1     FB2_17  STD  RESET
+cnt/RefCnt<0>       0     0     FB2_18  STD  RESET
+fsb/VPA             27    33    FB3_1   STD  RESET
+fsb/Ready0r         3     8     FB3_4   STD  RESET
+fsb/BERR0r          3     8     FB3_12  STD  RESET
+cs/nOverlay0        3     8     FB3_13  STD  RESET
+fsb/Ready1r         8     18    FB3_15  STD  RESET
+fsb/Ready2r         9     22    FB3_16  STD  RESET
+iobs/Clear1         1     3     FB4_1   STD  RESET
+iobs/ALE0           1     2     FB4_3   STD  RESET
+cnt/RefCnt<7>       1     7     FB4_4   STD  RESET
+cnt/RefCnt<6>       1     6     FB4_7   STD  RESET
+
+Signal              Total Total Loc     Pwr  Reg Init
+Name                Pts   Inps          Mode State
+cnt/RefCnt<5>       1     5     FB4_8   STD  RESET
+cnt/RefCnt<4>       1     4     FB4_9   STD  RESET
+cnt/RefCnt<3>       1     3     FB4_10  STD  RESET
+cnt/RefCnt<2>       1     2     FB4_12  STD  RESET
+iobs/PS_FSM_FFd1    2     3     FB4_13  STD  RESET
+cnt/RefDone         2     10    FB4_14  STD  RESET
+iobs/IOU0           3     5     FB4_15  STD  RESET
+cnt/TimeoutA        3     10    FB4_16  STD  RESET
+iobs/IOReady        4     8     FB4_17  STD  RESET
+ram/RS_FSM_FFd1     8     14    FB4_18  STD  RESET
+ram/RAMDIS2         7     15    FB5_3   STD  RESET
+iobs/IOL0           3     5     FB5_4   STD  RESET
+iobs/Once           18    19    FB5_7   STD  RESET
+ram/Once            5     10    FB5_10  STD  RESET
+iobs/Load1          15    19    FB5_13  STD  RESET
+ram/RASEL           19    15    FB5_18  STD  RESET
+iobm/ETACK          1     6     FB6_1   STD  RESET
+iobm/IOS_FSM_FFd3   3     6     FB6_3   STD  RESET
+iobm/ES<3>          3     6     FB6_4   STD  RESET
+iobm/ES<1>          3     4     FB6_5   STD  RESET
+iobm/ES<0>          3     7     FB6_6   STD  RESET
+iobm/ALE0           3     5     FB6_7   STD  RESET
+iobm/ES<4>          4     7     FB6_8   STD  RESET
+iobm/IOS_FSM_FFd2   5     11    FB6_10  STD  RESET
+iobm/ES<2>          5     7     FB6_13  STD  RESET
+iobm/IOACT          7     13    FB6_16  STD  RESET
+iobm/IOBERR         9     13    FB6_18  STD  RESET
+ram/RS_FSM_FFd3     11    14    FB7_4   STD  RESET
+cnt/TimeoutBPre     3     11    FB7_7   STD  RESET
+ram/RS_FSM_FFd2     14    14    FB7_10  STD  RESET
+cnt/TimeoutB        3     12    FB7_13  STD  RESET
+ram/RAMReady        15    15    FB7_15  STD  RESET
+ram/RAMDIS1         17    15    FB7_18  STD  RESET
+iobs/PS_FSM_FFd2    15    20    FB8_4   STD  RESET
+RESDone             1     3     FB8_7   STD  RESET
+iobs/IOREQ          15    20    FB8_9   STD  RESET
+iobs/IORW1          17    20    FB8_14  STD  RESET
+iobs/BERR           4     8     FB8_16  STD  RESET
+iobs/IORW0          19    21    FB8_18  STD  RESET
+
+** 39 Inputs **
+
+Signal              Loc     Pin  Pin     Pin     
+Name                        No.  Type    Use     
+A_FSB<13>           FB1_2   11   I/O     I
+A_FSB<14>           FB1_3   12   I/O     I
+A_FSB<15>           FB1_5   13   I/O     I
+A_FSB<16>           FB1_6   14   I/O     I
+A_FSB<17>           FB1_8   15   I/O     I
+A_FSB<18>           FB1_9   16   I/O     I
+A_FSB<19>           FB1_11  17   I/O     I
+A_FSB<20>           FB1_12  18   I/O     I
+A_FSB<21>           FB1_14  19   I/O     I
+A_FSB<22>           FB1_15  20   I/O     I
+CLK2X_IOB           FB1_17  22   GCK/I/O GCK
+A_FSB<5>            FB2_6   2    GTS/I/O I
+A_FSB<6>            FB2_8   3    GTS/I/O I
+A_FSB<7>            FB2_9   4    GTS/I/O I
+A_FSB<8>            FB2_11  6    I/O     I
+A_FSB<9>            FB2_12  7    I/O     I
+A_FSB<10>           FB2_14  8    I/O     I
+A_FSB<11>           FB2_15  9    I/O     I
+A_FSB<12>           FB2_17  10   I/O     I
+CLK_IOB             FB3_2   23   GCK/I/O GCK/I
+A_FSB<23>           FB3_5   24   I/O     I
+E_IOB               FB3_6   25   I/O     I
+CLK_FSB             FB3_8   27   GCK/I/O GCK
+nWE_FSB             FB3_11  29   I/O     I
+nLDS_FSB            FB3_12  30   I/O     I
+nAS_FSB             FB3_14  32   I/O     I
+nUDS_FSB            FB3_15  33   I/O     I
+nRES                FB4_8   91   I/O     I
+nIPL2               FB4_9   92   I/O     I
+A_FSB<1>            FB4_12  94   I/O     I
+A_FSB<2>            FB4_14  95   I/O     I
+A_FSB<3>            FB4_15  96   I/O     I
+A_FSB<4>            FB4_17  97   I/O     I
+nBERR_IOB           FB6_5   76   I/O     I
+nVPA_IOB            FB6_6   77   I/O     I
+nDTACK_IOB          FB6_8   78   I/O     I
+SW<1>               FB7_15  60   I/O     I
+SW<0>               FB7_17  61   I/O     I
+nBG_IOB             FB8_17  73   I/O     I
+
+Legend:
+Pin No. - ~ - User Assigned
+**************************  Function Block Details  ************************
+Legend:
+Total Pt     - Total product terms used by the macrocell signal
+Imp Pt       - Product terms imported from other macrocells
+Exp Pt       - Product terms exported to other macrocells
+               in direction shown
+Unused Pt    - Unused local product terms remaining in macrocell
+Loc          - Location where logic was mapped in device
+Pin Type/Use - I  - Input             GCK - Global Clock
+               O  - Output            GTS - Global Output Enable
+              (b) - Buried macrocell  GSR - Global Set/Reset
+X            - Signal used as input to the macrocell logic.
+Pin No.      - ~  - User Assigned
+*********************************** FB1  ***********************************
+Number of function block inputs used/remaining:               20/34
+Number of signals used by logic mapping into function block:  20
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+ram/RefRAS            1       0     0   4     FB1_1         (b)     (b)
+ram/BACTr             1       0     0   4     FB1_2   11    I/O     I
+iobm/RESrr            1       0     0   4     FB1_3   12    I/O     I
+iobm/RESrf            1       0     0   4     FB1_4         (b)     (b)
+iobm/BERRrf           1       0     0   4     FB1_5   13    I/O     I
+fsb/ASrf              1       0     0   4     FB1_6   14    I/O     I
+cnt/RefCnt<1>         1       0     0   4     FB1_7         (b)     (b)
+RESr2                 1       0     0   4     FB1_8   15    I/O     I
+RESr1                 1       0     0   4     FB1_9   16    I/O     I
+RESr0                 1       0     0   4     FB1_10        (b)     (b)
+IPL2r1                1       0     0   4     FB1_11  17    I/O     I
+IPL2r0                1       0     0   4     FB1_12  18    I/O     I
+$OpTx$FX_DC$591       1       0     0   4     FB1_13        (b)     (b)
+iobs/IOU1             2       0     0   3     FB1_14  19    I/O     I
+iobs/IOL1             2       0     0   3     FB1_15  20    I/O     I
+iobm/IOS_FSM_FFd1     2       0     0   3     FB1_16        (b)     (b)
+fsb/BERR1r            2       0     0   3     FB1_17  22    GCK/I/O GCK
+cs/nOverlay1          2       0     0   3     FB1_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: IPL2r0             8: iobm/IOS_FSM_FFd1  15: nIPL2 
+  2: RESr0              9: iobm/IOS_FSM_FFd2  16: nLDS_FSB 
+  3: RESr1             10: iobm/IOS_FSM_FFd3  17: nRES 
+  4: cnt/RefCnt<0>     11: iobs/BERR          18: nUDS_FSB 
+  5: cs/nOverlay0      12: iobs/Load1         19: ram/RS_FSM_FFd1 
+  6: fsb/ASrf          13: nAS_FSB            20: ram/RS_FSM_FFd2 
+  7: fsb/BERR1r        14: nBERR_IOB         
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+ram/RefRAS           ..................XX.................... 2
+ram/BACTr            .....X......X........................... 2
+iobm/RESrr           ................X....................... 1
+iobm/RESrf           ................X....................... 1
+iobm/BERRrf          .............X.......................... 1
+fsb/ASrf             ............X........................... 1
+cnt/RefCnt<1>        ...X.................................... 1
+RESr2                ..X..................................... 1
+RESr1                .X...................................... 1
+RESr0                ................X....................... 1
+IPL2r1               X....................................... 1
+IPL2r0               ..............X......................... 1
+$OpTx$FX_DC$591      .....X......X........................... 2
+iobs/IOU1            ...........X.....X...................... 2
+iobs/IOL1            ...........X...X........................ 2
+iobm/IOS_FSM_FFd1    .......XXX.............................. 3
+fsb/BERR1r           .....XX...X.X........................... 4
+cs/nOverlay1         ....XX......X........................... 3
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB2  ***********************************
+Number of function block inputs used/remaining:               9/45
+Number of signals used by logic mapping into function block:  9
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+(unused)              0       0     0   5     FB2_1         (b)     
+(unused)              0       0     0   5     FB2_2   99    GSR/I/O 
+(unused)              0       0     0   5     FB2_3         (b)     
+(unused)              0       0     0   5     FB2_4         (b)     
+(unused)              0       0     0   5     FB2_5   1     GTS/I/O 
+(unused)              0       0     0   5     FB2_6   2     GTS/I/O I
+iobs/IOACTr           1       0     0   4     FB2_7         (b)     (b)
+iobm/VPArr            1       0     0   4     FB2_8   3     GTS/I/O I
+iobm/VPArf            1       0     0   4     FB2_9   4     GTS/I/O I
+iobm/IOREQr           1       0     0   4     FB2_10        (b)     (b)
+iobm/Er2              1       0     0   4     FB2_11  6     I/O     I
+iobm/Er               1       0     0   4     FB2_12  7     I/O     I
+iobm/DTACKrr          1       0     0   4     FB2_13        (b)     (b)
+iobm/DTACKrf          1       0     0   4     FB2_14  8     I/O     I
+iobm/BGr1             1       0     0   4     FB2_15  9     I/O     I
+iobm/BGr0             1       0     0   4     FB2_16        (b)     (b)
+iobm/BERRrr           1       0     0   4     FB2_17  10    I/O     I
+cnt/RefCnt<0>         0       0     0   5     FB2_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: E_IOB              4: iobm/IOACT         7: nBG_IOB 
+  2: iobm/BGr0          5: iobs/IOREQ         8: nDTACK_IOB 
+  3: iobm/Er            6: nBERR_IOB          9: nVPA_IOB 
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+iobs/IOACTr          ...X.................................... 1
+iobm/VPArr           ........X............................... 1
+iobm/VPArf           ........X............................... 1
+iobm/IOREQr          ....X................................... 1
+iobm/Er2             ..X..................................... 1
+iobm/Er              X....................................... 1
+iobm/DTACKrr         .......X................................ 1
+iobm/DTACKrf         .......X................................ 1
+iobm/BGr1            .X...................................... 1
+iobm/BGr0            ......X................................. 1
+iobm/BERRrr          .....X.................................. 1
+cnt/RefCnt<0>        ........................................ 0
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB3  ***********************************
+Number of function block inputs used/remaining:               38/16
+Number of signals used by logic mapping into function block:  38
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+fsb/VPA              27      22<-   0   0     FB3_1         (b)     (b)
+(unused)              0       0   /\5   0     FB3_2   23    GCK/I/O GCK/I
+(unused)              0       0   /\5   0     FB3_3         (b)     (b)
+fsb/Ready0r           3       1<- /\3   0     FB3_4         (b)     (b)
+(unused)              0       0   /\1   4     FB3_5   24    I/O     I
+(unused)              0       0   \/2   3     FB3_6   25    I/O     I
+(unused)              0       0   \/5   0     FB3_7         (b)     (b)
+(unused)              0       0   \/5   0     FB3_8   27    GCK/I/O GCK
+nDTACK_FSB           28      23<-   0   0     FB3_9   28    I/O     O
+(unused)              0       0   /\5   0     FB3_10        (b)     (b)
+(unused)              0       0   /\5   0     FB3_11  29    I/O     I
+fsb/BERR0r            3       0   /\1   1     FB3_12  30    I/O     I
+cs/nOverlay0          3       0   \/2   0     FB3_13        (b)     (b)
+(unused)              0       0   \/5   0     FB3_14  32    I/O     I
+fsb/Ready1r           8       7<- \/4   0     FB3_15  33    I/O     I
+fsb/Ready2r           9       4<-   0   0     FB3_16        (b)     (b)
+nROMWE                1       0   \/4   0     FB3_17  34    I/O     O
+(unused)              0       0   \/5   0     FB3_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: $OpTx$FX_DC$591   14: A_FSB<22>         27: fsb/Ready1r 
+  2: A_FSB<10>         15: A_FSB<23>         28: fsb/Ready2r 
+  3: A_FSB<11>         16: A_FSB<8>          29: fsb/VPA 
+  4: A_FSB<12>         17: A_FSB<9>          30: iobs/BERR 
+  5: A_FSB<13>         18: SW<1>             31: iobs/IOReady 
+  6: A_FSB<14>         19: cnt/TimeoutA      32: nADoutLE1 
+  7: A_FSB<15>         20: cnt/TimeoutB      33: nAS_FSB 
+  8: A_FSB<16>         21: cs/nOverlay0      34: nBR_IOB 
+  9: A_FSB<17>         22: cs/nOverlay1      35: nDTACK_FSB 
+ 10: A_FSB<18>         23: fsb/ASrf          36: nRES 
+ 11: A_FSB<19>         24: fsb/BERR0r        37: nWE_FSB 
+ 12: A_FSB<20>         25: fsb/BERR1r        38: ram/RAMReady 
+ 13: A_FSB<21>         26: fsb/Ready0r      
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+fsb/VPA              XXXXXXXXXXXXXXXXXXXX.X.XXXXXXXXX.X..XX.. 33
+fsb/Ready0r          ............XXX......XX..X......X....X.. 8
+nDTACK_FSB           .XXXXXXXXXXXXXXXXXXX.XXXXXXX.XXXXXX.XX.. 34
+fsb/BERR0r           ...........XXXX....X..XX........X....... 8
+cs/nOverlay0         ...........XXXX.....X.X.........X..X.... 8
+fsb/Ready1r          ....XX.XXXXXXXX..X...XX...X...XXX...X... 18
+fsb/Ready2r          .XXXXXXXXXXXXXXXX.X..XX....X....X...X... 22
+nROMWE               ................................X...X... 2
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB4  ***********************************
+Number of function block inputs used/remaining:               41/13
+Number of signals used by logic mapping into function block:  41
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+iobs/Clear1           1       0   /\2   2     FB4_1         (b)     (b)
+nAoutOE               3       0     0   2     FB4_2   87    I/O     O
+iobs/ALE0             1       0     0   4     FB4_3         (b)     (b)
+cnt/RefCnt<7>         1       0     0   4     FB4_4         (b)     (b)
+nDoutOE               2       0     0   3     FB4_5   89    I/O     O
+nDinOE                3       0     0   2     FB4_6   90    I/O     O
+cnt/RefCnt<6>         1       0     0   4     FB4_7         (b)     (b)
+cnt/RefCnt<5>         1       0     0   4     FB4_8   91    I/O     I
+cnt/RefCnt<4>         1       0     0   4     FB4_9   92    I/O     I
+cnt/RefCnt<3>         1       0     0   4     FB4_10        (b)     (b)
+nVPA_FSB              1       0     0   4     FB4_11  93    I/O     O
+cnt/RefCnt<2>         1       0     0   4     FB4_12  94    I/O     I
+iobs/PS_FSM_FFd1      2       0     0   3     FB4_13        (b)     (b)
+cnt/RefDone           2       0     0   3     FB4_14  95    I/O     I
+iobs/IOU0             3       0     0   2     FB4_15  96    I/O     I
+cnt/TimeoutA          3       0     0   2     FB4_16        (b)     (b)
+iobs/IOReady          4       0   \/1   0     FB4_17  97    I/O     I
+ram/RS_FSM_FFd1       8       3<-   0   0     FB4_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: A_FSB<20>         15: cnt/TimeoutA       29: iobs/PS_FSM_FFd1 
+  2: A_FSB<21>         16: cs/nOverlay1       30: iobs/PS_FSM_FFd2 
+  3: A_FSB<22>         17: fsb/ASrf           31: nADoutLE1 
+  4: A_FSB<23>         18: fsb/VPA            32: nAS_FSB 
+  5: SW<1>             19: iobm/BGr0          33: nAS_IOB 
+  6: cnt/RefCnt<0>     20: iobm/BGr1          34: nAoutOE 
+  7: cnt/RefCnt<1>     21: iobm/IOBERR        35: nUDS_FSB 
+  8: cnt/RefCnt<2>     22: iobm/IOS_FSM_FFd2  36: nWE_FSB 
+  9: cnt/RefCnt<3>     23: iobm/IOS_FSM_FFd3  37: ram/Once 
+ 10: cnt/RefCnt<4>     24: iobs/IOACTr        38: ram/RS_FSM_FFd1 
+ 11: cnt/RefCnt<5>     25: iobs/IORW0         39: ram/RS_FSM_FFd2 
+ 12: cnt/RefCnt<6>     26: iobs/IOReady       40: ram/RS_FSM_FFd3 
+ 13: cnt/RefCnt<7>     27: iobs/IOU1          41: ram/RefRAS 
+ 14: cnt/RefDone       28: iobs/Once         
+
+Signal                        1         2         3         4         5 FB
+Name                0----+----0----+----0----+----0----+----0----+----0 Inputs
+iobs/Clear1          ............................XXX................... 3
+nAoutOE              ..................XX............XX................ 4
+iobs/ALE0            ............................XX.................... 2
+cnt/RefCnt<7>        .....XXXXXXX...................................... 7
+nDoutOE              .....................XX.X......................... 3
+nDinOE               XXXXX..........................X...X.............. 7
+cnt/RefCnt<6>        .....XXXXXX....................................... 6
+cnt/RefCnt<5>        .....XXXXX........................................ 5
+cnt/RefCnt<4>        .....XXXX......................................... 4
+cnt/RefCnt<3>        .....XXX.......................................... 3
+nVPA_FSB             .................X.............X.................. 2
+cnt/RefCnt<2>        .....XX........................................... 2
+iobs/PS_FSM_FFd1     .......................X....XX.................... 3
+cnt/RefDone          .....XXXXXXXXX..........................X......... 10
+iobs/IOU0            ..........................X.XXX...X............... 5
+cnt/TimeoutA         .....XXXXXXX..X.X..............X.................. 10
+iobs/IOReady         ................X...X..X.X.X.XXX.................. 8
+ram/RS_FSM_FFd1      .XXX......XXXX.XX..............X....XXXX.......... 14
+                    0----+----1----+----2----+----3----+----4----+----5
+                              0         0         0         0         0
+*********************************** FB5  ***********************************
+Number of function block inputs used/remaining:               39/15
+Number of signals used by logic mapping into function block:  39
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+(unused)              0       0   /\5   0     FB5_1         (b)     (b)
+nROMCS                3       0   \/2   0     FB5_2   35    I/O     O
+ram/RAMDIS2           7       2<-   0   0     FB5_3         (b)     (b)
+iobs/IOL0             3       0     0   2     FB5_4         (b)     (b)
+nCAS                  1       0   \/1   3     FB5_5   36    I/O     O
+nOE                   1       1<- \/5   0     FB5_6   37    I/O     O
+iobs/Once            18      13<-   0   0     FB5_7         (b)     (b)
+(unused)              0       0   /\5   0     FB5_8   39    I/O     (b)
+RA<4>                 2       0   /\3   0     FB5_9   40    I/O     O
+ram/Once              5       0     0   0     FB5_10        (b)     (b)
+RA<3>                 2       0   \/2   1     FB5_11  41    I/O     O
+RA<5>                 2       2<- \/5   0     FB5_12  42    I/O     O
+iobs/Load1           15      10<-   0   0     FB5_13        (b)     (b)
+RA<2>                 2       2<- /\5   0     FB5_14  43    I/O     O
+RA<6>                 2       0   /\2   1     FB5_15  46    I/O     O
+(unused)              0       0   \/4   1     FB5_16        (b)     (b)
+(unused)              0       0   \/5   0     FB5_17  49    I/O     (b)
+ram/RASEL            19      14<-   0   0     FB5_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: A_FSB<12>         14: A_FSB<4>          27: iobs/PS_FSM_FFd1 
+  2: A_FSB<13>         15: A_FSB<5>          28: iobs/PS_FSM_FFd2 
+  3: A_FSB<14>         16: A_FSB<6>          29: nADoutLE1 
+  4: A_FSB<15>         17: A_FSB<7>          30: nAS_FSB 
+  5: A_FSB<16>         18: SW<1>             31: nLDS_FSB 
+  6: A_FSB<17>         19: cnt/RefCnt<5>     32: nWE_FSB 
+  7: A_FSB<18>         20: cnt/RefCnt<6>     33: ram/BACTr 
+  8: A_FSB<19>         21: cnt/RefCnt<7>     34: ram/Once 
+  9: A_FSB<20>         22: cnt/RefDone       35: ram/RAMDIS2 
+ 10: A_FSB<21>         23: cs/nOverlay1      36: ram/RASEL 
+ 11: A_FSB<22>         24: fsb/ASrf          37: ram/RS_FSM_FFd1 
+ 12: A_FSB<23>         25: iobs/IOL1         38: ram/RS_FSM_FFd2 
+ 13: A_FSB<3>          26: iobs/Once         39: ram/RS_FSM_FFd3 
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+nROMCS               ........XXXX.....X....X................. 6
+ram/RAMDIS2          .........XXX......XXXXXX.....X...XX.XXX. 15
+iobs/IOL0            ........................X.XXX.X......... 5
+nCAS                 ...................................X.... 1
+nOE                  .............................X.X........ 2
+iobs/Once            .XX.XXXXXXXX.....X....XX.XXXXX.X........ 19
+RA<4>                ..X...........X....................X.... 3
+ram/Once             .........XXX..........XX.....X...X..XXX. 10
+RA<3>                .X...........X.....................X.... 3
+RA<5>                ...X...........X...................X.... 3
+iobs/Load1           .XX.XXXXXXXX.....X....XX.XXXXX.X........ 19
+RA<2>                X...........X......................X.... 3
+RA<6>                ....X...........X..................X.... 3
+ram/RASEL            .........XXX......XXXXXX.....X..XX..XXX. 15
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB6  ***********************************
+Number of function block inputs used/remaining:               34/20
+Number of signals used by logic mapping into function block:  34
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+iobm/ETACK            1       0   /\4   0     FB6_1         (b)     (b)
+nVMA_IOB              3       0     0   2     FB6_2   74    I/O     O
+iobm/IOS_FSM_FFd3     3       0     0   2     FB6_3         (b)     (b)
+iobm/ES<3>            3       0     0   2     FB6_4         (b)     (b)
+iobm/ES<1>            3       0     0   2     FB6_5   76    I/O     I
+iobm/ES<0>            3       0     0   2     FB6_6   77    I/O     I
+iobm/ALE0             3       0     0   2     FB6_7         (b)     (b)
+iobm/ES<4>            4       0     0   1     FB6_8   78    I/O     I
+nLDS_IOB              4       0     0   1     FB6_9   79    I/O     O
+iobm/IOS_FSM_FFd2     5       0     0   0     FB6_10        (b)     (b)
+nUDS_IOB              4       0     0   1     FB6_11  80    I/O     O
+nAS_IOB               3       0     0   2     FB6_12  81    I/O     O
+iobm/ES<2>            5       0     0   0     FB6_13        (b)     (b)
+nADoutLE1             2       0     0   3     FB6_14  82    I/O     O
+nADoutLE0             1       0   \/1   3     FB6_15  85    I/O     O
+iobm/IOACT            7       2<-   0   0     FB6_16        (b)     (b)
+nDinLE                1       0   /\1   3     FB6_17  86    I/O     O
+iobm/IOBERR           9       4<-   0   0     FB6_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: CLK_IOB           13: iobm/Er            24: iobm/VPArr 
+  2: iobm/ALE0         14: iobm/Er2           25: iobs/ALE0 
+  3: iobm/BERRrf       15: iobm/IOACT         26: iobs/Clear1 
+  4: iobm/BERRrr       16: iobm/IOBERR        27: iobs/IOL0 
+  5: iobm/DTACKrf      17: iobm/IOREQr        28: iobs/IORW0 
+  6: iobm/DTACKrr      18: iobm/IOS_FSM_FFd1  29: iobs/IOU0 
+  7: iobm/ES<0>        19: iobm/IOS_FSM_FFd2  30: iobs/Load1 
+  8: iobm/ES<1>        20: iobm/IOS_FSM_FFd3  31: nADoutLE1 
+  9: iobm/ES<2>        21: iobm/RESrf         32: nAoutOE 
+ 10: iobm/ES<3>        22: iobm/RESrr         33: nBERR_IOB 
+ 11: iobm/ES<4>        23: iobm/VPArf         34: nVMA_IOB 
+ 12: iobm/ETACK       
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+iobm/ETACK           ......XXXXX......................X...... 6
+nVMA_IOB             ......XXXXX...X.......XX.......X.X...... 10
+iobm/IOS_FSM_FFd3    X...............XXXX...........X........ 6
+iobm/ES<3>           ......XXXX..XX.......................... 6
+iobm/ES<1>           ......XX....XX.......................... 4
+iobm/ES<0>           ......XXXXX.XX.......................... 7
+iobm/ALE0            ................XXXX...........X........ 5
+iobm/ES<4>           ......XXXXX.XX.......................... 7
+nLDS_IOB             .................XXX......XX...X........ 6
+iobm/IOS_FSM_FFd2    X.XXXX.....X.....XXXXX.................. 11
+nUDS_IOB             .................XXX.......XX..X........ 6
+nAS_IOB              .................XXX...........X........ 4
+iobm/ES<2>           ......XXXXX.XX.......................... 7
+nADoutLE1            .........................X...XX......... 3
+nADoutLE0            .X......................X............... 2
+iobm/IOACT           X.XXXX.....X....XXXXXX.........X........ 13
+nDinLE               .................XX..................... 2
+iobm/IOBERR          X.XXXX.....X...X.XXXXX..........X....... 13
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB7  ***********************************
+Number of function block inputs used/remaining:               34/20
+Number of signals used by logic mapping into function block:  34
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+(unused)              0       0   /\5   0     FB7_1         (b)     (b)
+RA<1>                 2       0   /\2   1     FB7_2   50    I/O     O
+(unused)              0       0   \/5   0     FB7_3         (b)     (b)
+ram/RS_FSM_FFd3      11       6<-   0   0     FB7_4         (b)     (b)
+RA<7>                 2       0   /\1   2     FB7_5   52    I/O     O
+RA<0>                 2       0     0   3     FB7_6   53    I/O     O
+cnt/TimeoutBPre       3       0   \/2   0     FB7_7         (b)     (b)
+RA<8>                 7       2<-   0   0     FB7_8   54    I/O     O
+RA<10>                1       0   \/4   0     FB7_9   55    I/O     O
+ram/RS_FSM_FFd2      14       9<-   0   0     FB7_10        (b)     (b)
+RA<9>                 2       2<- /\5   0     FB7_11  56    I/O     O
+CLK25EN               1       0   /\2   2     FB7_12  58    I/O     O
+cnt/TimeoutB          3       0   \/1   1     FB7_13        (b)     (b)
+CLK20EN               1       1<- \/5   0     FB7_14  59    I/O     O
+ram/RAMReady         15      10<-   0   0     FB7_15  60    I/O     I
+(unused)              0       0   /\5   0     FB7_16        (b)     (b)
+(unused)              0       0   \/5   0     FB7_17  61    I/O     I
+ram/RAMDIS1          17      12<-   0   0     FB7_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: A_FSB<10>         13: A_FSB<9>          24: cnt/TimeoutB 
+  2: A_FSB<11>         14: SW<0>             25: cnt/TimeoutBPre 
+  3: A_FSB<17>         15: cnt/RefCnt<0>     26: cs/nOverlay1 
+  4: A_FSB<18>         16: cnt/RefCnt<1>     27: fsb/ASrf 
+  5: A_FSB<19>         17: cnt/RefCnt<2>     28: nAS_FSB 
+  6: A_FSB<1>          18: cnt/RefCnt<3>     29: ram/BACTr 
+  7: A_FSB<20>         19: cnt/RefCnt<4>     30: ram/Once 
+  8: A_FSB<21>         20: cnt/RefCnt<5>     31: ram/RASEL 
+  9: A_FSB<22>         21: cnt/RefCnt<6>     32: ram/RS_FSM_FFd1 
+ 10: A_FSB<23>         22: cnt/RefCnt<7>     33: ram/RS_FSM_FFd2 
+ 11: A_FSB<2>          23: cnt/RefDone       34: ram/RS_FSM_FFd3 
+ 12: A_FSB<8>         
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+RA<1>                .X........X...................X......... 3
+ram/RS_FSM_FFd3      .......XXX.........XXXX..XXX.X.XXX...... 14
+RA<7>                ..X........X..................X......... 3
+RA<0>                X....X........................X......... 3
+cnt/TimeoutBPre      ..............XXXXXXXX..X.XX............ 11
+RA<8>                ...X...XXX..X............X....X......... 7
+RA<10>               .......X................................ 1
+ram/RS_FSM_FFd2      .......XXX.........XXXX..XXXX..XXX...... 14
+RA<9>                ....X.X.......................X......... 3
+CLK25EN              .............X.......................... 1
+cnt/TimeoutB         ..............XXXXXXXX.XX.XX............ 12
+CLK20EN              .............X.......................... 1
+ram/RAMReady         .......XXX.........XXXX..XXXXX.XXX...... 15
+ram/RAMDIS1          .......XXX.........XXXX..XXXXX.XXX...... 15
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB8  ***********************************
+Number of function block inputs used/remaining:               38/16
+Number of signals used by logic mapping into function block:  38
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+(unused)              0       0   /\5   0     FB8_1         (b)     (b)
+RA<11>                1       0   /\4   0     FB8_2   63    I/O     O
+(unused)              0       0   \/5   0     FB8_3         (b)     (b)
+iobs/PS_FSM_FFd2     15      10<-   0   0     FB8_4         (b)     (b)
+nRAS                  3       3<- /\5   0     FB8_5   64    I/O     O
+nRAMLWE               1       0   /\3   1     FB8_6   65    I/O     O
+RESDone               1       0   \/1   3     FB8_7         (b)     (b)
+nRAMUWE               1       1<- \/5   0     FB8_8   66    I/O     O
+iobs/IOREQ           15      10<-   0   0     FB8_9   67    I/O     (b)
+(unused)              0       0   /\5   0     FB8_10        (b)     (b)
+(unused)              0       0   \/1   4     FB8_11  68    I/O     (b)
+nBERR_FSB             3       1<- \/3   0     FB8_12  70    I/O     O
+(unused)              0       0   \/5   0     FB8_13        (b)     (b)
+iobs/IORW1           17      12<-   0   0     FB8_14  71    I/O     (b)
+nBR_IOB               1       0   /\4   0     FB8_15  72    I/O     O
+iobs/BERR             4       0     0   1     FB8_16        (b)     (b)
+(unused)              0       0   \/5   0     FB8_17  73    I/O     I
+iobs/IORW0           19      14<-   0   0     FB8_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: A_FSB<13>         14: RESr0             27: iobs/IORW1 
+  2: A_FSB<14>         15: RESr1             28: iobs/Once 
+  3: A_FSB<16>         16: RESr2             29: iobs/PS_FSM_FFd1 
+  4: A_FSB<17>         17: SW<1>             30: iobs/PS_FSM_FFd2 
+  5: A_FSB<18>         18: cnt/TimeoutB      31: nADoutLE1 
+  6: A_FSB<19>         19: cs/nOverlay1      32: nAS_FSB 
+  7: A_FSB<20>         20: fsb/ASrf          33: nLDS_FSB 
+  8: A_FSB<21>         21: fsb/BERR0r        34: nUDS_FSB 
+  9: A_FSB<22>         22: fsb/BERR1r        35: nWE_FSB 
+ 10: A_FSB<23>         23: iobm/IOBERR       36: ram/RAMDIS1 
+ 11: IPL2r0            24: iobs/BERR         37: ram/RAMDIS2 
+ 12: IPL2r1            25: iobs/IOACTr       38: ram/RefRAS 
+ 13: RESDone           26: iobs/IORW0       
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+RA<11>               .....X.................................. 1
+iobs/PS_FSM_FFd2     XXXXXXXXXX......X.XX....X..XXXXX..X..... 20
+nRAS                 .......XXX........X............X...XXX.. 8
+nRAMLWE              ...............................XX.XXX... 5
+RESDone              .............XXX........................ 3
+nRAMUWE              ...............................X.XXXX... 5
+iobs/IOREQ           XXXXXXXXXX......X.XX....X..XXXXX..X..... 20
+nBERR_FSB            ......XXXX.......X..XX.X.......X........ 9
+iobs/IORW1           XXXXXXXXXX......X.XX......XXXXXX..X..... 20
+nBR_IOB              ..........XXXXXX........................ 6
+iobs/BERR            ...................X..XXX..X.XXX........ 8
+iobs/IORW0           XXXXXXXXXX......X.XX.....XXXXXXX..X..... 21
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*******************************  Equations  ********************************
+
+********** Mapped Logic **********
+
+
+assign $OpTx$FX_DC$591 = (nAS_FSB && !fsb/ASrf);
+
+
+assign CLK20EN = SW[0];
+
+
+assign CLK25EN = !SW[0];
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+FDCPE FDCPE_IPL2r0 (IPL2r0,!nIPL2,CLK_FSB,1'b0,1'b0);
+
+FDCPE FDCPE_IPL2r1 (IPL2r1,IPL2r0,CLK_FSB,1'b0,1'b0);
+
+
+assign RA[0] = ((A_FSB[10] && !ram/RASEL)
+	|| (ram/RASEL && A_FSB[1]));
+
+
+assign RA[1] = ((A_FSB[11] && !ram/RASEL)
+	|| (ram/RASEL && A_FSB[2]));
+
+
+assign RA[2] = ((A_FSB[12] && !ram/RASEL)
+	|| (ram/RASEL && A_FSB[3]));
+
+
+assign RA[3] = ((A_FSB[13] && !ram/RASEL)
+	|| (ram/RASEL && A_FSB[4]));
+
+
+assign RA[4] = ((A_FSB[14] && !ram/RASEL)
+	|| (ram/RASEL && A_FSB[5]));
+
+
+assign RA[5] = ((A_FSB[15] && !ram/RASEL)
+	|| (ram/RASEL && A_FSB[6]));
+
+
+assign RA[6] = ((A_FSB[16] && !ram/RASEL)
+	|| (ram/RASEL && A_FSB[7]));
+
+
+assign RA[7] = ((A_FSB[8] && ram/RASEL)
+	|| (A_FSB[17] && !ram/RASEL));
+
+
+assign RA[8] = ((A_FSB[9] && !A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+	ram/RASEL)
+	|| (A_FSB[9] && !A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	!cs/nOverlay1 && ram/RASEL)
+	|| (A_FSB[23] && A_FSB[18])
+	|| (A_FSB[18] && !ram/RASEL)
+	|| (A_FSB[22] && !A_FSB[21] && A_FSB[18])
+	|| (A_FSB[22] && A_FSB[18] && cs/nOverlay1)
+	|| (!A_FSB[22] && A_FSB[18] && !cs/nOverlay1));
+
+
+assign RA[9] = ((A_FSB[20] && ram/RASEL)
+	|| (A_FSB[19] && !ram/RASEL));
+
+
+assign RA[10] = A_FSB[21];
+
+
+assign RA[11] = A_FSB[19];
+
+FDCPE FDCPE_RESDone (RESDone,1'b1,CLK_FSB,1'b0,1'b0,RESDone_CE);
+assign RESDone_CE = (!RESr0 && !RESr1 && RESr2);
+
+FDCPE FDCPE_RESr0 (RESr0,!nRES,CLK_FSB,1'b0,1'b0);
+
+FDCPE FDCPE_RESr1 (RESr1,RESr0,CLK_FSB,1'b0,1'b0);
+
+FDCPE FDCPE_RESr2 (RESr2,RESr1,CLK_FSB,1'b0,1'b0);
+
+FTCPE FTCPE_cnt/RefCnt0 (cnt/RefCnt[0],1'b1,CLK_FSB,1'b0,1'b0);
+
+FTCPE FTCPE_cnt/RefCnt1 (cnt/RefCnt[1],cnt/RefCnt[0],CLK_FSB,1'b0,1'b0);
+
+FTCPE FTCPE_cnt/RefCnt2 (cnt/RefCnt[2],cnt/RefCnt_T[2],CLK_FSB,1'b0,1'b0);
+assign cnt/RefCnt_T[2] = (cnt/RefCnt[0] && cnt/RefCnt[1]);
+
+FTCPE FTCPE_cnt/RefCnt3 (cnt/RefCnt[3],cnt/RefCnt_T[3],CLK_FSB,1'b0,1'b0);
+assign cnt/RefCnt_T[3] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[2]);
+
+FTCPE FTCPE_cnt/RefCnt4 (cnt/RefCnt[4],cnt/RefCnt_T[4],CLK_FSB,1'b0,1'b0);
+assign cnt/RefCnt_T[4] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[3] && 
+	cnt/RefCnt[2]);
+
+FTCPE FTCPE_cnt/RefCnt5 (cnt/RefCnt[5],cnt/RefCnt_T[5],CLK_FSB,1'b0,1'b0);
+assign cnt/RefCnt_T[5] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[3] && 
+	cnt/RefCnt[2] && cnt/RefCnt[4]);
+
+FTCPE FTCPE_cnt/RefCnt6 (cnt/RefCnt[6],cnt/RefCnt_T[6],CLK_FSB,1'b0,1'b0);
+assign cnt/RefCnt_T[6] = (cnt/RefCnt[5] && cnt/RefCnt[0] && cnt/RefCnt[1] && 
+	cnt/RefCnt[3] && cnt/RefCnt[2] && cnt/RefCnt[4]);
+
+FTCPE FTCPE_cnt/RefCnt7 (cnt/RefCnt[7],cnt/RefCnt_T[7],CLK_FSB,1'b0,1'b0);
+assign cnt/RefCnt_T[7] = (cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[0] && 
+	cnt/RefCnt[1] && cnt/RefCnt[3] && cnt/RefCnt[2] && cnt/RefCnt[4]);
+
+FDCPE FDCPE_cnt/RefDone (cnt/RefDone,cnt/RefDone_D,CLK_FSB,1'b0,1'b0);
+assign cnt/RefDone_D = ((!cnt/RefDone && !ram/RefRAS)
+	|| (!cnt/RefCnt[5] && !cnt/RefCnt[6] && !cnt/RefCnt[0] && 
+	!cnt/RefCnt[7] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && 
+	!cnt/RefCnt[4]));
+
+FTCPE FTCPE_cnt/TimeoutA (cnt/TimeoutA,cnt/TimeoutA_T,CLK_FSB,1'b0,1'b0);
+assign cnt/TimeoutA_T = ((cnt/TimeoutA && nAS_FSB && !fsb/ASrf)
+	|| (!cnt/TimeoutA && !nAS_FSB && !cnt/RefCnt[5] && 
+	!cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && 
+	!cnt/RefCnt[2] && !cnt/RefCnt[4])
+	|| (!cnt/TimeoutA && !cnt/RefCnt[5] && !cnt/RefCnt[6] && 
+	!cnt/RefCnt[0] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && 
+	!cnt/RefCnt[4] && fsb/ASrf));
+
+FTCPE FTCPE_cnt/TimeoutB (cnt/TimeoutB,cnt/TimeoutB_T,CLK_FSB,1'b0,1'b0);
+assign cnt/TimeoutB_T = ((cnt/TimeoutB && nAS_FSB && !fsb/ASrf)
+	|| (!cnt/TimeoutB && cnt/TimeoutBPre && !nAS_FSB && 
+	!cnt/RefCnt[5] && !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && 
+	!cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4])
+	|| (!cnt/TimeoutB && cnt/TimeoutBPre && !cnt/RefCnt[5] && 
+	!cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && 
+	!cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4] && fsb/ASrf));
+
+FTCPE FTCPE_cnt/TimeoutBPre (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,1'b0,1'b0);
+assign cnt/TimeoutBPre_T = ((cnt/TimeoutBPre && nAS_FSB && !fsb/ASrf)
+	|| (!cnt/TimeoutBPre && !nAS_FSB && !cnt/RefCnt[5] && 
+	!cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && 
+	!cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4])
+	|| (!cnt/TimeoutBPre && !cnt/RefCnt[5] && !cnt/RefCnt[6] && 
+	!cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && 
+	!cnt/RefCnt[2] && !cnt/RefCnt[4] && fsb/ASrf));
+
+FTCPE FTCPE_cs/nOverlay0 (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,!nRES,1'b0);
+assign cs/nOverlay0_T = ((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && 
+	!cs/nOverlay0 && !nAS_FSB)
+	|| (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && 
+	!cs/nOverlay0 && fsb/ASrf));
+
+FDCPE FDCPE_cs/nOverlay1 (cs/nOverlay1,cs/nOverlay0,CLK_FSB,1'b0,1'b0,cs/nOverlay1_CE);
+assign cs/nOverlay1_CE = (nAS_FSB && !fsb/ASrf);
+
+FDCPE FDCPE_fsb/ASrf (fsb/ASrf,!nAS_FSB,!CLK_FSB,1'b0,1'b0);
+
+FDCPE FDCPE_fsb/BERR0r (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,1'b0,1'b0);
+assign fsb/BERR0r_D = ((!cnt/TimeoutB && !fsb/BERR0r)
+	|| (nAS_FSB && !fsb/ASrf)
+	|| (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && A_FSB[20] && 
+	!fsb/BERR0r));
+
+FDCPE FDCPE_fsb/BERR1r (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,1'b0,1'b0);
+assign fsb/BERR1r_D = ((!iobs/BERR && !fsb/BERR1r)
+	|| (nAS_FSB && !fsb/ASrf));
+
+FDCPE FDCPE_fsb/Ready0r (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,1'b0,1'b0);
+assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+	!fsb/Ready0r && !ram/RAMReady)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	!cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady));
+
+FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,1'b0,1'b0);
+assign fsb/Ready1r_D = ((cs/nOverlay0.EXP)
+	|| (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady)
+	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
+	!iobs/IOReady)
+	|| (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && 
+	!iobs/IOReady && !SW[1])
+	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady)
+	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady)
+	|| (nAS_FSB && !fsb/ASrf));
+
+FDCPE FDCPE_fsb/Ready2r (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,1'b0,1'b0);
+assign fsb/Ready2r_D = ((nAS_FSB && !fsb/ASrf)
+	|| (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r)
+	|| (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r)
+	|| (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r)
+	|| (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r)
+	|| (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r)
+	|| (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r)
+	|| (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r)
+	|| (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r));
+
+FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,CLK_FSB,1'b0,1'b0);
+assign fsb/VPA_D = ((EXP15_.EXP)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+	!fsb/Ready0r && fsb/VPA && !ram/RAMReady && !$OpTx$FX_DC$591)
+	|| (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && !SW[1] && !$OpTx$FX_DC$591)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	!cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !ram/RAMReady && 
+	!$OpTx$FX_DC$591)
+	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591)
+	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591)
+	|| (nROMWE_OBUF.EXP)
+	|| (A_FSB[23] && cnt/TimeoutB && fsb/VPA && 
+	!$OpTx$FX_DC$591)
+	|| (!A_FSB[22] && cnt/TimeoutB && fsb/VPA && 
+	!$OpTx$FX_DC$591)
+	|| (A_FSB[21] && cnt/TimeoutB && fsb/VPA && 
+	!$OpTx$FX_DC$591)
+	|| (A_FSB[23] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && !$OpTx$FX_DC$591)
+	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
+	fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591)
+	|| (iobs/BERR && fsb/VPA && !$OpTx$FX_DC$591)
+	|| (fsb/BERR0r && fsb/VPA && !$OpTx$FX_DC$591)
+	|| (fsb/BERR1r && fsb/VPA && !$OpTx$FX_DC$591)
+	|| (fsb/VPA && !nBR_IOB && !$OpTx$FX_DC$591)
+	|| (!A_FSB[20] && cnt/TimeoutB && fsb/VPA && 
+	!$OpTx$FX_DC$591));
+
+FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,CLK2X_IOB,1'b0,1'b0);
+assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd2)
+	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1)
+	|| (!iobm/IOS_FSM_FFd1 && iobm/IOREQr && !nAoutOE));
+
+FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/BGr0 (iobm/BGr0,!nBG_IOB,CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/BGr1 (iobm/BGr1,iobm/BGr0,CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,CLK2X_IOB,1'b0,1'b0);
+
+FTCPE FTCPE_iobm/ES0 (iobm/ES[0],iobm/ES_T[0],CLK2X_IOB,1'b0,1'b0);
+assign iobm/ES_T[0] = ((iobm/ES[0] && !iobm/Er && iobm/Er2)
+	|| (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && 
+	!iobm/ES[3] && !iobm/ES[4] && iobm/Er)
+	|| (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && 
+	!iobm/ES[3] && !iobm/ES[4] && !iobm/Er2));
+
+FDCPE FDCPE_iobm/ES1 (iobm/ES[1],iobm/ES_D[1],CLK2X_IOB,1'b0,1'b0);
+assign iobm/ES_D[1] = ((iobm/ES[0] && iobm/ES[1])
+	|| (!iobm/ES[0] && !iobm/ES[1])
+	|| (!iobm/Er && iobm/Er2));
+
+FDCPE FDCPE_iobm/ES2 (iobm/ES[2],iobm/ES_D[2],CLK2X_IOB,1'b0,1'b0);
+assign iobm/ES_D[2] = ((!iobm/ES[0] && !iobm/ES[2])
+	|| (!iobm/ES[1] && !iobm/ES[2])
+	|| (!iobm/Er && iobm/Er2)
+	|| (iobm/ES[0] && iobm/ES[1] && iobm/ES[2])
+	|| (!iobm/ES[2] && !iobm/ES[3] && iobm/ES[4]));
+
+FTCPE FTCPE_iobm/ES3 (iobm/ES[3],iobm/ES_T[3],CLK2X_IOB,1'b0,1'b0);
+assign iobm/ES_T[3] = ((iobm/ES[3] && !iobm/Er && iobm/Er2)
+	|| (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && iobm/Er)
+	|| (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && !iobm/Er2));
+
+FTCPE FTCPE_iobm/ES4 (iobm/ES[4],iobm/ES_T[4],CLK2X_IOB,1'b0,1'b0);
+assign iobm/ES_T[4] = ((iobm/ES[4] && !iobm/Er && iobm/Er2)
+	|| (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && 
+	iobm/ES[3] && iobm/Er)
+	|| (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && 
+	iobm/ES[3] && !iobm/Er2)
+	|| (iobm/ES[0] && iobm/ES[1] && !iobm/ES[2] && 
+	!iobm/ES[3] && iobm/ES[4]));
+
+FDCPE FDCPE_iobm/ETACK (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,1'b0,1'b0);
+assign iobm/ETACK_D = (!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && 
+	!iobm/ES[3] && iobm/ES[4]);
+
+FDCPE FDCPE_iobm/Er (iobm/Er,E_IOB,!CLK_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/Er2 (iobm/Er2,iobm/Er,CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/IOACT (iobm/IOACT,iobm/IOACT_D,CLK2X_IOB,1'b0,1'b0);
+assign iobm/IOACT_D = ((CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/DTACKrf && iobm/DTACKrr)
+	|| (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/RESrf && iobm/RESrr)
+	|| (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)
+	|| (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && 
+	!iobm/IOREQr)
+	|| (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && nAoutOE)
+	|| (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/ETACK)
+	|| (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/BERRrf && iobm/BERRrr));
+
+FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,CLK2X_IOB,1'b0,1'b0);
+assign iobm/IOBERR_T = ((CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && 
+	iobm/RESrr)
+	|| (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && 
+	iobm/BERRrr)
+	|| (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/DTACKrf && 
+	iobm/DTACKrr)
+	|| (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && 
+	iobm/RESrr)
+	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
+	!iobm/IOS_FSM_FFd2 && iobm/IOBERR)
+	|| (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/ETACK)
+	|| (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/ETACK)
+	|| (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/BERRrf && 
+	iobm/BERRrr)
+	|| (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/DTACKrf && 
+	iobm/DTACKrr));
+
+FDCPE FDCPE_iobm/IOREQr (iobm/IOREQr,iobs/IOREQ,!CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/IOS_FSM_FFd1 (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,1'b0,1'b0);
+assign iobm/IOS_FSM_FFd1_D = ((iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1)
+	|| (!iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd2));
+
+FTCPE FTCPE_iobm/IOS_FSM_FFd2 (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,1'b0,1'b0);
+assign iobm/IOS_FSM_FFd2_T = ((iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
+	!iobm/IOS_FSM_FFd2)
+	|| (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/IOS_FSM_FFd2 && iobm/ETACK)
+	|| (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/IOS_FSM_FFd2 && iobm/BERRrf && iobm/BERRrr)
+	|| (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/IOS_FSM_FFd2 && iobm/DTACKrf && iobm/DTACKrr)
+	|| (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && 
+	iobm/IOS_FSM_FFd2 && iobm/RESrf && iobm/RESrr));
+
+FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,1'b0,1'b0);
+assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2)
+	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
+	!iobm/IOS_FSM_FFd2)
+	|| (!CLK_IOB && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && 
+	iobm/IOREQr && !nAoutOE));
+
+FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES,!CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/RESrr (iobm/RESrr,!nRES,CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,CLK2X_IOB,1'b0,1'b0);
+
+FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,CLK_FSB,1'b0,1'b0);
+assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
+
+FTCPE FTCPE_iobs/BERR (iobs/BERR,iobs/BERR_T,CLK_FSB,1'b0,1'b0);
+assign iobs/BERR_T = ((iobs/BERR && nAS_FSB && !fsb/ASrf)
+	|| (iobs/Once && iobs/BERR && !iobs/PS_FSM_FFd2 && 
+	!iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
+	|| (iobs/Once && !iobs/BERR && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1)
+	|| (iobs/Once && !iobs/BERR && !iobs/PS_FSM_FFd2 && 
+	!iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1));
+
+FDCPE FDCPE_iobs/Clear1 (iobs/Clear1,iobs/Clear1_D,CLK_FSB,1'b0,1'b0);
+assign iobs/Clear1_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1);
+
+FDCPE FDCPE_iobs/IOACTr (iobs/IOACTr,iobm/IOACT,CLK_FSB,1'b0,1'b0);
+
+FDCPE FDCPE_iobs/IOL0 (iobs/IOL0,iobs/IOL0_D,CLK_FSB,1'b0,1'b0,iobs/IOL0_CE);
+assign iobs/IOL0_D = ((!nLDS_FSB && nADoutLE1)
+	|| (iobs/IOL1 && !nADoutLE1));
+assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
+
+FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,CLK_FSB,1'b0,1'b0,iobs/Load1);
+
+FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,CLK_FSB,1'b0,1'b0);
+assign iobs/IOREQ_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
+	SW[1] && nADoutLE1)
+	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1)
+	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr)
+	|| (iobs/Once && !iobs/PS_FSM_FFd2 && nADoutLE1)
+	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !fsb/ASrf && 
+	nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
+	!iobs/PS_FSM_FFd2 && nADoutLE1));
+
+FTCPE FTCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_T,CLK_FSB,1'b0,1'b0);
+assign iobs/IORW0_T = ((A_FSB_19_IBUF$BUF0.EXP)
+	|| (iobs/IORW0 && iobs/IORW1 && !nADoutLE1)
+	|| (!iobs/IORW0 && !iobs/IORW1 && !nADoutLE1)
+	|| (nAS_FSB && !fsb/ASrf && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !iobs/IORW0 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[20] && SW[1] && nADoutLE1)
+	|| (!nWE_FSB && !iobs/IORW0 && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
+	nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && nADoutLE1)
+	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && 
+	nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	cs/nOverlay1 && nADoutLE1));
+
+FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,CLK_FSB,1'b0,1'b0);
+assign iobs/IORW1_T = ((iobs/Once)
+	|| (!nADoutLE1)
+	|| (nBERR_FSB_OBUF.EXP)
+	|| (nAS_FSB && !fsb/ASrf)
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[20])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
+	|| (nWE_FSB && iobs/IORW1)
+	|| (!nWE_FSB && !iobs/IORW1)
+	|| (!A_FSB[23] && A_FSB[21] && !iobs/IORW1));
+
+FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,CLK_FSB,1'b0,1'b0);
+assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf)
+	|| (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && 
+	!iobs/IOACTr && iobm/IOBERR && nADoutLE1)
+	|| (iobs/Once && !iobs/IOReady && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
+	|| (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && 
+	!iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1));
+
+FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,CLK_FSB,1'b0,1'b0,iobs/IOU0_CE);
+assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1)
+	|| (iobs/IOU1 && !nADoutLE1));
+assign iobs/IOU0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
+
+FDCPE FDCPE_iobs/IOU1 (iobs/IOU1,!nUDS_FSB,CLK_FSB,1'b0,1'b0,iobs/Load1);
+
+FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,CLK_FSB,1'b0,1'b0);
+assign iobs/Load1_D = ((iobs/Once)
+	|| (!nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[20])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
+	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB)
+	|| (!A_FSB[23] && !A_FSB[20] && SW[1])
+	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21])
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	cs/nOverlay1)
+	|| (nAS_FSB && !fsb/ASrf)
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1));
+
+FDCPE FDCPE_iobs/Once (iobs/Once,iobs/Once_D,CLK_FSB,1'b0,1'b0);
+assign iobs/Once_D = ((A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd1)
+	|| (!iobs/Once && iobs/PS_FSM_FFd1 && !nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !iobs/Once)
+	|| (!A_FSB[23] && !A_FSB[22] && !iobs/Once && 
+	!cs/nOverlay1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && !iobs/Once)
+	|| (RA_4_OBUF.EXP)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && !iobs/Once)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && !iobs/Once)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && !iobs/Once)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && !iobs/Once)
+	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && !iobs/Once)
+	|| (nAS_FSB && !fsb/ASrf)
+	|| (A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd2)
+	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd2)
+	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd1)
+	|| (!iobs/Once && iobs/PS_FSM_FFd2 && !nADoutLE1));
+
+FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,1'b0,1'b0);
+assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2)
+	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr));
+
+FDCPE FDCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,1'b0,1'b0);
+assign iobs/PS_FSM_FFd2_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
+	!iobs/PS_FSM_FFd1 && SW[1] && nADoutLE1)
+	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
+	|| (iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
+	iobs/IOACTr)
+	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
+	!iobs/IOACTr)
+	|| (iobs/Once && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	nADoutLE1)
+	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	!fsb/ASrf && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1));
+
+
+assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0);
+
+FDCPE FDCPE_nADoutLE1 (nADoutLE1,nADoutLE1_D,CLK_FSB,1'b0,1'b0);
+assign nADoutLE1_D = ((iobs/Load1)
+	|| (!iobs/Clear1 && !nADoutLE1));
+
+FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!CLK2X_IOB,1'b0,1'b0);
+assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2)
+	|| (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2));
+assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ;
+assign nAS_IOB_OE = !nAoutOE;
+
+FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,CLK2X_IOB,1'b0,1'b0);
+assign nAoutOE_D = ((!iobm/BGr0 && !iobm/BGr1)
+	|| (!iobm/BGr1 && nAoutOE)
+	|| (!nAS_IOB && !iobm/BGr0 && !nAoutOE));
+
+
+assign nBERR_FSB = ((nAS_FSB)
+	|| (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && A_FSB[20] && 
+	!iobs/BERR && !fsb/BERR0r && !fsb/BERR1r)
+	|| (!iobs/BERR && !cnt/TimeoutB && !fsb/BERR0r && 
+	!fsb/BERR1r));
+
+FDCPE FDCPE_nBR_IOB (nBR_IOB,1'b0,CLK_FSB,1'b0,1'b0,nBR_IOB_CE);
+assign nBR_IOB_CE = (RESr0 && RESr1 && IPL2r0 && RESr2 && !RESDone && 
+	IPL2r1);
+
+FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!CLK_FSB,1'b0,1'b0);
+
+FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,1'b0,1'b0);
+assign nDTACK_FSB_D = ((EXP18_.EXP)
+	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
+	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
+	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
+	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
+	!nADoutLE1)
+	|| (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB)
+	|| (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB)
+	|| (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB)
+	|| (EXP21_.EXP)
+	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
+	!iobs/IOReady && nDTACK_FSB)
+	|| (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && 
+	!iobs/IOReady && nDTACK_FSB && !SW[1])
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	!cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady)
+	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
+	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
+	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
+	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
+	!nADoutLE1)
+	|| (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB)
+	|| (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && 
+	A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB)
+	|| (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB)
+	|| (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB)
+	|| (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && 
+	!A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && 
+	A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && 
+	A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && 
+	!fsb/Ready2r && nDTACK_FSB));
+
+FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!CLK2X_IOB,1'b0,1'b0);
+assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2);
+
+
+assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB)
+	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
+	!nAS_FSB)
+	|| (A_FSB[22] && !A_FSB[21] && nWE_FSB && !nAS_FSB && 
+	!SW[1]));
+
+FDCPE FDCPE_nDoutOE (nDoutOE,nDoutOE_D,CLK2X_IOB,1'b0,1'b0);
+assign nDoutOE_D = ((!iobs/IORW0)
+	|| (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2));
+
+FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!CLK2X_IOB,1'b0,1'b0);
+assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd2)
+	|| (iobs/IOL0 && iobm/IOS_FSM_FFd1 && 
+	iobm/IOS_FSM_FFd2)
+	|| (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && 
+	!iobm/IOS_FSM_FFd1));
+assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ;
+assign nLDS_IOB_OE = !nAoutOE;
+
+
+assign nOE = !((nWE_FSB && !nAS_FSB));
+
+
+assign nRAMLWE = !((!nWE_FSB && !nLDS_FSB && !ram/RAMDIS2 && !nAS_FSB && 
+	!ram/RAMDIS1));
+
+
+assign nRAMUWE = !((!nWE_FSB && !nUDS_FSB && !ram/RAMDIS2 && !nAS_FSB && 
+	!ram/RAMDIS1));
+
+
+assign nRAS = !(((ram/RefRAS)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+	!ram/RAMDIS2 && !nAS_FSB && !ram/RAMDIS1)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	!cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && !ram/RAMDIS1)));
+
+
+assign nROMCS = !(((A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !A_FSB[20] && 
+	!SW[1])
+	|| (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && 
+	SW[1])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !A_FSB[20] && 
+	!cs/nOverlay1)));
+
+
+assign nROMWE = !((!nWE_FSB && !nAS_FSB));
+
+FDCPE FDCPE_nUDS_IOB (nUDS_IOB_I,nUDS_IOB,!CLK2X_IOB,1'b0,1'b0);
+assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd2)
+	|| (iobs/IOU0 && iobm/IOS_FSM_FFd1 && 
+	iobm/IOS_FSM_FFd2)
+	|| (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && 
+	!iobm/IOS_FSM_FFd1));
+assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ;
+assign nUDS_IOB_OE = !nAoutOE;
+
+FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,1'b0,1'b0);
+assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && 
+	!iobm/ES[3] && !iobm/ES[4])
+	|| (nVMA_IOB && iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && 
+	!iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && 
+	iobm/VPArr));
+assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ;
+assign nVMA_IOB_OE = !nAoutOE;
+
+
+assign nVPA_FSB = !((fsb/VPA && !nAS_FSB));
+
+FDCPE FDCPE_ram/BACTr (ram/BACTr,ram/BACTr_D,CLK_FSB,1'b0,1'b0);
+assign ram/BACTr_D = (nAS_FSB && !fsb/ASrf);
+
+FTCPE FTCPE_ram/Once (ram/Once,ram/Once_T,CLK_FSB,1'b0,1'b0);
+assign ram/Once_T = ((ram/Once && nAS_FSB && !fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	!ram/RS_FSM_FFd3)
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && 
+	!cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	!ram/RS_FSM_FFd3)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && 
+	!cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	!ram/RS_FSM_FFd3 && fsb/ASrf));
+
+FDCPE FDCPE_ram/RAMDIS1 (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,1'b0,1'b0);
+assign ram/RAMDIS1_D = ((RA_1_OBUF.EXP)
+	|| (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf)
+	|| (!cnt/RefDone && ram/Once && !ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && 
+	cnt/RefCnt[7])
+	|| (!cnt/RefDone && nAS_FSB && !ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && 
+	!fsb/ASrf)
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr)
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf)
+	|| (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr)
+	|| (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf)
+	|| (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr)
+	|| (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3)
+	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2)
+	|| (A_FSB[23] && !cnt/RefDone && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr)
+	|| (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf)
+	|| (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]));
+
+FTCPE FTCPE_ram/RAMDIS2 (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,1'b0,1'b0);
+assign ram/RAMDIS2_T = ((!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && 
+	ram/Once && !cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && 
+	!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && 
+	cnt/RefCnt[7])
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && 
+	ram/Once && !cs/nOverlay1 && !ram/RAMDIS2 && !ram/RS_FSM_FFd2 && 
+	!ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && 
+	fsb/ASrf)
+	|| (ram/RAMDIS2 && nAS_FSB && !fsb/ASrf)
+	|| (!cnt/RefDone && ram/Once && !ram/RAMDIS2 && !nAS_FSB && 
+	ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!cnt/RefDone && ram/Once && !ram/RAMDIS2 && 
+	ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && 
+	cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && !ram/RS_FSM_FFd2 && 
+	!ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && 
+	cs/nOverlay1 && !ram/RAMDIS2 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf));
+
+FDCPE FDCPE_ram/RAMReady (ram/RAMReady,ram/RAMReady_D,CLK_FSB,1'b0,1'b0);
+assign ram/RAMReady_D = ((ram/RS_FSM_FFd2)
+	|| (ram/RS_FSM_FFd3)
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1)
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/BACTr)
+	|| (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/BACTr)
+	|| (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/BACTr)
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && 
+	!ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf)
+	|| (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf)
+	|| (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && 
+	!cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && 
+	!cs/nOverlay1 && !ram/RS_FSM_FFd1 && fsb/ASrf)
+	|| (!cnt/RefDone && cnt/RefCnt[5] && cnt/RefCnt[6] && 
+	cnt/RefCnt[7])
+	|| (A_FSB[23] && !cnt/RefDone && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/BACTr)
+	|| (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && 
+	!ram/BACTr && fsb/ASrf));
+
+FDCPE FDCPE_ram/RASEL (ram/RASEL,ram/RASEL_D,CLK_FSB,1'b0,1'b0);
+assign ram/RASEL_D = ((A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr)
+	|| (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf)
+	|| (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr)
+	|| (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf)
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && 
+	cnt/RefCnt[7])
+	|| (EXP26_.EXP)
+	|| (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2)
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && fsb/ASrf)
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr)
+	|| (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf)
+	|| (!ram/RS_FSM_FFd2 && ram/RS_FSM_FFd3)
+	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
+	!ram/RS_FSM_FFd3)
+	|| (A_FSB[23] && !cnt/RefDone && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr)
+	|| (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf)
+	|| (!cnt/RefDone && nAS_FSB && !ram/RS_FSM_FFd2 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && !fsb/ASrf));
+
+FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,CLK_FSB,1'b0,1'b0);
+assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && 
+	ram/Once && !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && 
+	ram/Once && !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && 
+	cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)
+	|| (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2)
+	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3)
+	|| (!cnt/RefDone && !nAS_FSB && ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && 
+	cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]));
+
+FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,CLK_FSB,1'b0,1'b0);
+assign ram/RS_FSM_FFd2_D = ((!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	!cnt/RefCnt[5] && ram/BACTr)
+	|| (!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	!cnt/RefCnt[6] && ram/BACTr)
+	|| (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	!cnt/RefCnt[5] && !fsb/ASrf)
+	|| (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	!cnt/RefCnt[7] && !fsb/ASrf)
+	|| (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	!cnt/RefCnt[6] && !fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && 
+	!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	!cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
+	!cs/nOverlay1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf)
+	|| (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2)
+	|| (cnt/RefDone && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3)
+	|| (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3)
+	|| (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf)
+	|| (!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
+	!cnt/RefCnt[7] && ram/BACTr));
+
+FDCPE FDCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_D,CLK_FSB,1'b0,1'b0);
+assign ram/RS_FSM_FFd3_D = ((!cnt/RefDone && !nAS_FSB && ram/RS_FSM_FFd1 && 
+	!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && 
+	cnt/RefCnt[7])
+	|| (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
+	!ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && 
+	fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && 
+	cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && 
+	cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && 
+	!cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && 
+	!cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && 
+	cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)
+	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2)
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3)
+	|| (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && 
+	!cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3)
+	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && 
+	!cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf));
+
+FDCPE FDCPE_ram/RefRAS (ram/RefRAS,ram/RefRAS_D,CLK_FSB,1'b0,1'b0);
+assign ram/RefRAS_D = (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2);
+
+Register Legend:
+ FDCPE (Q,D,C,CLR,PRE,CE); 
+ FTCPE (Q,D,C,CLR,PRE,CE); 
+ LDCP  (Q,D,G,CLR,PRE); 
+
+******************************  Device Pin Out *****************************
+
+Device : XC95144XL-10-TQ100
+
+
+   --------------------------------------------------  
+  /100 98  96  94  92  90  88  86  84  82  80  78  76  \
+ |   99  97  95  93  91  89  87  85  83  81  79  77    |
+ | 1                                               75  | 
+ | 2                                               74  | 
+ | 3                                               73  | 
+ | 4                                               72  | 
+ | 5                                               71  | 
+ | 6                                               70  | 
+ | 7                                               69  | 
+ | 8                                               68  | 
+ | 9                                               67  | 
+ | 10                                              66  | 
+ | 11                                              65  | 
+ | 12                                              64  | 
+ | 13              XC95144XL-10-TQ100              63  | 
+ | 14                                              62  | 
+ | 15                                              61  | 
+ | 16                                              60  | 
+ | 17                                              59  | 
+ | 18                                              58  | 
+ | 19                                              57  | 
+ | 20                                              56  | 
+ | 21                                              55  | 
+ | 22                                              54  | 
+ | 23                                              53  | 
+ | 24                                              52  | 
+ | 25                                              51  | 
+ |   27  29  31  33  35  37  39  41  43  45  47  49    |
+  \26  28  30  32  34  36  38  40  42  44  46  48  50  /
+   --------------------------------------------------  
+
+
+Pin Signal                         Pin Signal                        
+No. Name                           No. Name                          
+  1 KPR                              51 VCC                           
+  2 A_FSB<5>                         52 RA<7>                         
+  3 A_FSB<6>                         53 RA<0>                         
+  4 A_FSB<7>                         54 RA<8>                         
+  5 VCC                              55 RA<10>                        
+  6 A_FSB<8>                         56 RA<9>                         
+  7 A_FSB<9>                         57 VCC                           
+  8 A_FSB<10>                        58 CLK25EN                       
+  9 A_FSB<11>                        59 CLK20EN                       
+ 10 A_FSB<12>                        60 SW<1>                         
+ 11 A_FSB<13>                        61 SW<0>                         
+ 12 A_FSB<14>                        62 GND                           
+ 13 A_FSB<15>                        63 RA<11>                        
+ 14 A_FSB<16>                        64 nRAS                          
+ 15 A_FSB<17>                        65 nRAMLWE                       
+ 16 A_FSB<18>                        66 nRAMUWE                       
+ 17 A_FSB<19>                        67 KPR                           
+ 18 A_FSB<20>                        68 KPR                           
+ 19 A_FSB<21>                        69 GND                           
+ 20 A_FSB<22>                        70 nBERR_FSB                     
+ 21 GND                              71 KPR                           
+ 22 CLK2X_IOB                        72 nBR_IOB                       
+ 23 CLK_IOB                          73 nBG_IOB                       
+ 24 A_FSB<23>                        74 nVMA_IOB                      
+ 25 E_IOB                            75 GND                           
+ 26 VCC                              76 nBERR_IOB                     
+ 27 CLK_FSB                          77 nVPA_IOB                      
+ 28 nDTACK_FSB                       78 nDTACK_IOB                    
+ 29 nWE_FSB                          79 nLDS_IOB                      
+ 30 nLDS_FSB                         80 nUDS_IOB                      
+ 31 GND                              81 nAS_IOB                       
+ 32 nAS_FSB                          82 nADoutLE1                     
+ 33 nUDS_FSB                         83 TDO                           
+ 34 nROMWE                           84 GND                           
+ 35 nROMCS                           85 nADoutLE0                     
+ 36 nCAS                             86 nDinLE                        
+ 37 nOE                              87 nAoutOE                       
+ 38 VCC                              88 VCC                           
+ 39 KPR                              89 nDoutOE                       
+ 40 RA<4>                            90 nDinOE                        
+ 41 RA<3>                            91 nRES                          
+ 42 RA<5>                            92 nIPL2                         
+ 43 RA<2>                            93 nVPA_FSB                      
+ 44 GND                              94 A_FSB<1>                      
+ 45 TDI                              95 A_FSB<2>                      
+ 46 RA<6>                            96 A_FSB<3>                      
+ 47 TMS                              97 A_FSB<4>                      
+ 48 TCK                              98 VCC                           
+ 49 KPR                              99 KPR                           
+ 50 RA<1>                           100 GND                           
+
+
+Legend :  NC  = Not Connected, unbonded pin
+         PGND = Unused I/O configured as additional Ground pin
+         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
+         KPR  = Unused I/O with weak keeper (leave unconnected)
+         VCC  = Dedicated Power Pin
+         GND  = Dedicated Ground Pin
+         TDI  = Test Data In, JTAG pin
+         TDO  = Test Data Out, JTAG pin
+         TCK  = Test Clock, JTAG pin
+         TMS  = Test Mode Select, JTAG pin
+  PROHIBITED  = User reserved pin
+****************************  Compiler Options  ****************************
+
+Following is a list of all global compiler options used by the fitter run.
+
+Device(s) Specified                         : xc95144xl-10-TQ100
+Optimization Method                         : SPEED
+Multi-Level Logic Optimization              : ON
+Ignore Timing Specifications                : OFF
+Default Register Power Up Value             : LOW
+Keep User Location Constraints              : ON
+What-You-See-Is-What-You-Get                : OFF
+Exhaustive Fitting                          : OFF
+Keep Unused Inputs                          : OFF
+Slew Rate                                   : FAST
+Power Mode                                  : STD
+Ground on Unused IOs                        : OFF
+Set I/O Pin Termination                     : KEEPER
+Global Clock Optimization                   : ON
+Global Set/Reset Optimization               : ON
+Global Ouput Enable Optimization            : ON
+Input Limit                                 : 54
+Pterm Limit                                 : 50
+
+
+ + +
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Equations

+ + +
+
+********** Mapped Logic ********** +
+
+assign $OpTx$FX_DC$591 = (nAS_FSB && !fsb/ASrf); +
+
+assign CLK20EN = SW[0]; +
+
+assign CLK25EN = !SW[0]; +
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+FDCPE FDCPE_IPL2r0 (IPL2r0,!nIPL2,CLK_FSB,1'b0,1'b0); +
+FDCPE FDCPE_IPL2r1 (IPL2r1,IPL2r0,CLK_FSB,1'b0,1'b0); +
+
+assign RA[0] = ((A_FSB[10] && !ram/RASEL) +
      || (ram/RASEL && A_FSB[1])); +
+
+assign RA[1] = ((A_FSB[11] && !ram/RASEL) +
      || (ram/RASEL && A_FSB[2])); +
+
+assign RA[2] = ((A_FSB[12] && !ram/RASEL) +
      || (ram/RASEL && A_FSB[3])); +
+
+assign RA[3] = ((A_FSB[13] && !ram/RASEL) +
      || (ram/RASEL && A_FSB[4])); +
+
+assign RA[4] = ((A_FSB[14] && !ram/RASEL) +
      || (ram/RASEL && A_FSB[5])); +
+
+assign RA[5] = ((A_FSB[15] && !ram/RASEL) +
      || (ram/RASEL && A_FSB[6])); +
+
+assign RA[6] = ((A_FSB[16] && !ram/RASEL) +
      || (ram/RASEL && A_FSB[7])); +
+
+assign RA[7] = ((A_FSB[8] && ram/RASEL) +
      || (A_FSB[17] && !ram/RASEL)); +
+
+assign RA[8] = ((A_FSB[9] && !A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && +
      ram/RASEL) +
      || (A_FSB[9] && !A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      !cs/nOverlay1 && ram/RASEL) +
      || (A_FSB[23] && A_FSB[18]) +
      || (A_FSB[18] && !ram/RASEL) +
      || (A_FSB[22] && !A_FSB[21] && A_FSB[18]) +
      || (A_FSB[22] && A_FSB[18] && cs/nOverlay1) +
      || (!A_FSB[22] && A_FSB[18] && !cs/nOverlay1)); +
+
+assign RA[9] = ((A_FSB[20] && ram/RASEL) +
      || (A_FSB[19] && !ram/RASEL)); +
+
+assign RA[10] = A_FSB[21]; +
+
+assign RA[11] = A_FSB[19]; +
+FDCPE FDCPE_RESDone (RESDone,1'b1,CLK_FSB,1'b0,1'b0,RESDone_CE); +
     assign RESDone_CE = (!RESr0 && !RESr1 && RESr2); +
+FDCPE FDCPE_RESr0 (RESr0,!nRES,CLK_FSB,1'b0,1'b0); +
+FDCPE FDCPE_RESr1 (RESr1,RESr0,CLK_FSB,1'b0,1'b0); +
+FDCPE FDCPE_RESr2 (RESr2,RESr1,CLK_FSB,1'b0,1'b0); +
+FTCPE FTCPE_cnt/RefCnt0 (cnt/RefCnt[0],1'b1,CLK_FSB,1'b0,1'b0); +
+FTCPE FTCPE_cnt/RefCnt1 (cnt/RefCnt[1],cnt/RefCnt[0],CLK_FSB,1'b0,1'b0); +
+FTCPE FTCPE_cnt/RefCnt2 (cnt/RefCnt[2],cnt/RefCnt_T[2],CLK_FSB,1'b0,1'b0); +
     assign cnt/RefCnt_T[2] = (cnt/RefCnt[0] && cnt/RefCnt[1]); +
+FTCPE FTCPE_cnt/RefCnt3 (cnt/RefCnt[3],cnt/RefCnt_T[3],CLK_FSB,1'b0,1'b0); +
     assign cnt/RefCnt_T[3] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[2]); +
+FTCPE FTCPE_cnt/RefCnt4 (cnt/RefCnt[4],cnt/RefCnt_T[4],CLK_FSB,1'b0,1'b0); +
     assign cnt/RefCnt_T[4] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[3] && +
      cnt/RefCnt[2]); +
+FTCPE FTCPE_cnt/RefCnt5 (cnt/RefCnt[5],cnt/RefCnt_T[5],CLK_FSB,1'b0,1'b0); +
     assign cnt/RefCnt_T[5] = (cnt/RefCnt[0] && cnt/RefCnt[1] && cnt/RefCnt[3] && +
      cnt/RefCnt[2] && cnt/RefCnt[4]); +
+FTCPE FTCPE_cnt/RefCnt6 (cnt/RefCnt[6],cnt/RefCnt_T[6],CLK_FSB,1'b0,1'b0); +
     assign cnt/RefCnt_T[6] = (cnt/RefCnt[5] && cnt/RefCnt[0] && cnt/RefCnt[1] && +
      cnt/RefCnt[3] && cnt/RefCnt[2] && cnt/RefCnt[4]); +
+FTCPE FTCPE_cnt/RefCnt7 (cnt/RefCnt[7],cnt/RefCnt_T[7],CLK_FSB,1'b0,1'b0); +
     assign cnt/RefCnt_T[7] = (cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[0] && +
      cnt/RefCnt[1] && cnt/RefCnt[3] && cnt/RefCnt[2] && cnt/RefCnt[4]); +
+FDCPE FDCPE_cnt/RefDone (cnt/RefDone,cnt/RefDone_D,CLK_FSB,1'b0,1'b0); +
     assign cnt/RefDone_D = ((!cnt/RefDone && !ram/RefRAS) +
      || (!cnt/RefCnt[5] && !cnt/RefCnt[6] && !cnt/RefCnt[0] && +
      !cnt/RefCnt[7] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && +
      !cnt/RefCnt[4])); +
+FTCPE FTCPE_cnt/TimeoutA (cnt/TimeoutA,cnt/TimeoutA_T,CLK_FSB,1'b0,1'b0); +
     assign cnt/TimeoutA_T = ((cnt/TimeoutA && nAS_FSB && !fsb/ASrf) +
      || (!cnt/TimeoutA && !nAS_FSB && !cnt/RefCnt[5] && +
      !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && +
      !cnt/RefCnt[2] && !cnt/RefCnt[4]) +
      || (!cnt/TimeoutA && !cnt/RefCnt[5] && !cnt/RefCnt[6] && +
      !cnt/RefCnt[0] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && +
      !cnt/RefCnt[4] && fsb/ASrf)); +
+FTCPE FTCPE_cnt/TimeoutB (cnt/TimeoutB,cnt/TimeoutB_T,CLK_FSB,1'b0,1'b0); +
     assign cnt/TimeoutB_T = ((cnt/TimeoutB && nAS_FSB && !fsb/ASrf) +
      || (!cnt/TimeoutB && cnt/TimeoutBPre && !nAS_FSB && +
      !cnt/RefCnt[5] && !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && +
      !cnt/RefCnt[1] && !cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4]) +
      || (!cnt/TimeoutB && cnt/TimeoutBPre && !cnt/RefCnt[5] && +
      !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && +
      !cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4] && fsb/ASrf)); +
+FTCPE FTCPE_cnt/TimeoutBPre (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,1'b0,1'b0); +
     assign cnt/TimeoutBPre_T = ((cnt/TimeoutBPre && nAS_FSB && !fsb/ASrf) +
      || (!cnt/TimeoutBPre && !nAS_FSB && !cnt/RefCnt[5] && +
      !cnt/RefCnt[6] && !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && +
      !cnt/RefCnt[3] && !cnt/RefCnt[2] && !cnt/RefCnt[4]) +
      || (!cnt/TimeoutBPre && !cnt/RefCnt[5] && !cnt/RefCnt[6] && +
      !cnt/RefCnt[0] && !cnt/RefCnt[7] && !cnt/RefCnt[1] && !cnt/RefCnt[3] && +
      !cnt/RefCnt[2] && !cnt/RefCnt[4] && fsb/ASrf)); +
+FTCPE FTCPE_cs/nOverlay0 (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,!nRES,1'b0); +
     assign cs/nOverlay0_T = ((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && +
      !cs/nOverlay0 && !nAS_FSB) +
      || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && +
      !cs/nOverlay0 && fsb/ASrf)); +
+FDCPE FDCPE_cs/nOverlay1 (cs/nOverlay1,cs/nOverlay0,CLK_FSB,1'b0,1'b0,cs/nOverlay1_CE); +
     assign cs/nOverlay1_CE = (nAS_FSB && !fsb/ASrf); +
+FDCPE FDCPE_fsb/ASrf (fsb/ASrf,!nAS_FSB,!CLK_FSB,1'b0,1'b0); +
+FDCPE FDCPE_fsb/BERR0r (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,1'b0,1'b0); +
     assign fsb/BERR0r_D = ((!cnt/TimeoutB && !fsb/BERR0r) +
      || (nAS_FSB && !fsb/ASrf) +
      || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && A_FSB[20] && +
      !fsb/BERR0r)); +
+FDCPE FDCPE_fsb/BERR1r (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,1'b0,1'b0); +
     assign fsb/BERR1r_D = ((!iobs/BERR && !fsb/BERR1r) +
      || (nAS_FSB && !fsb/ASrf)); +
+FDCPE FDCPE_fsb/Ready0r (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,1'b0,1'b0); +
     assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf) +
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && +
      !fsb/Ready0r && !ram/RAMReady) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      !cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady)); +
+FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,1'b0,1'b0); +
     assign fsb/Ready1r_D = ((cs/nOverlay0.EXP) +
      || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady) +
      || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && +
      !iobs/IOReady) +
      || (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && +
      !iobs/IOReady && !SW[1]) +
      || (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && +
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && +
      !fsb/Ready1r && !iobs/IOReady) +
      || (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && +
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && +
      !fsb/Ready1r && !iobs/IOReady) +
      || (nAS_FSB && !fsb/ASrf)); +
+FDCPE FDCPE_fsb/Ready2r (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,1'b0,1'b0); +
     assign fsb/Ready2r_D = ((nAS_FSB && !fsb/ASrf) +
      || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r) +
      || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r) +
      || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r) +
      || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r) +
      || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r) +
      || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r) +
      || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r) +
      || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r)); +
+FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,CLK_FSB,1'b0,1'b0); +
     assign fsb/VPA_D = ((EXP15_.EXP) +
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && +
      !fsb/Ready0r && fsb/VPA && !ram/RAMReady && !$OpTx$FX_DC$591) +
      || (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && fsb/VPA && +
      !iobs/IOReady && !SW[1] && !$OpTx$FX_DC$591) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !ram/RAMReady && +
      !$OpTx$FX_DC$591) +
      || (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && +
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && +
      !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591) +
      || (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && +
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && +
      !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591) +
      || (nROMWE_OBUF.EXP) +
      || (A_FSB[23] && cnt/TimeoutB && fsb/VPA && +
      !$OpTx$FX_DC$591) +
      || (!A_FSB[22] && cnt/TimeoutB && fsb/VPA && +
      !$OpTx$FX_DC$591) +
      || (A_FSB[21] && cnt/TimeoutB && fsb/VPA && +
      !$OpTx$FX_DC$591) +
      || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && +
      !iobs/IOReady && !$OpTx$FX_DC$591) +
      || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && +
      fsb/VPA && !iobs/IOReady && !$OpTx$FX_DC$591) +
      || (iobs/BERR && fsb/VPA && !$OpTx$FX_DC$591) +
      || (fsb/BERR0r && fsb/VPA && !$OpTx$FX_DC$591) +
      || (fsb/BERR1r && fsb/VPA && !$OpTx$FX_DC$591) +
      || (fsb/VPA && !nBR_IOB && !$OpTx$FX_DC$591) +
      || (!A_FSB[20] && cnt/TimeoutB && fsb/VPA && +
      !$OpTx$FX_DC$591)); +
+FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,CLK2X_IOB,1'b0,1'b0); +
     assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd2) +
      || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1) +
      || (!iobm/IOS_FSM_FFd1 && iobm/IOREQr && !nAoutOE)); +
+FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/BGr0 (iobm/BGr0,!nBG_IOB,CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/BGr1 (iobm/BGr1,iobm/BGr0,CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,CLK2X_IOB,1'b0,1'b0); +
+FTCPE FTCPE_iobm/ES0 (iobm/ES[0],iobm/ES_T[0],CLK2X_IOB,1'b0,1'b0); +
     assign iobm/ES_T[0] = ((iobm/ES[0] && !iobm/Er && iobm/Er2) +
      || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && +
      !iobm/ES[3] && !iobm/ES[4] && iobm/Er) +
      || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && +
      !iobm/ES[3] && !iobm/ES[4] && !iobm/Er2)); +
+FDCPE FDCPE_iobm/ES1 (iobm/ES[1],iobm/ES_D[1],CLK2X_IOB,1'b0,1'b0); +
     assign iobm/ES_D[1] = ((iobm/ES[0] && iobm/ES[1]) +
      || (!iobm/ES[0] && !iobm/ES[1]) +
      || (!iobm/Er && iobm/Er2)); +
+FDCPE FDCPE_iobm/ES2 (iobm/ES[2],iobm/ES_D[2],CLK2X_IOB,1'b0,1'b0); +
     assign iobm/ES_D[2] = ((!iobm/ES[0] && !iobm/ES[2]) +
      || (!iobm/ES[1] && !iobm/ES[2]) +
      || (!iobm/Er && iobm/Er2) +
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2]) +
      || (!iobm/ES[2] && !iobm/ES[3] && iobm/ES[4])); +
+FTCPE FTCPE_iobm/ES3 (iobm/ES[3],iobm/ES_T[3],CLK2X_IOB,1'b0,1'b0); +
     assign iobm/ES_T[3] = ((iobm/ES[3] && !iobm/Er && iobm/Er2) +
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && iobm/Er) +
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && !iobm/Er2)); +
+FTCPE FTCPE_iobm/ES4 (iobm/ES[4],iobm/ES_T[4],CLK2X_IOB,1'b0,1'b0); +
     assign iobm/ES_T[4] = ((iobm/ES[4] && !iobm/Er && iobm/Er2) +
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && +
      iobm/ES[3] && iobm/Er) +
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && +
      iobm/ES[3] && !iobm/Er2) +
      || (iobm/ES[0] && iobm/ES[1] && !iobm/ES[2] && +
      !iobm/ES[3] && iobm/ES[4])); +
+FDCPE FDCPE_iobm/ETACK (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,1'b0,1'b0); +
     assign iobm/ETACK_D = (!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && +
      !iobm/ES[3] && iobm/ES[4]); +
+FDCPE FDCPE_iobm/Er (iobm/Er,E_IOB,!CLK_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/Er2 (iobm/Er2,iobm/Er,CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/IOACT (iobm/IOACT,iobm/IOACT_D,CLK2X_IOB,1'b0,1'b0); +
     assign iobm/IOACT_D = ((CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/DTACKrf && iobm/DTACKrr) +
      || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/RESrf && iobm/RESrr) +
      || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) +
      || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && +
      !iobm/IOREQr) +
      || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && nAoutOE) +
      || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/ETACK) +
      || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/BERRrf && iobm/BERRrr)); +
+FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,CLK2X_IOB,1'b0,1'b0); +
     assign iobm/IOBERR_T = ((CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && +
      iobm/RESrr) +
      || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && +
      iobm/BERRrr) +
      || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/DTACKrf && +
      iobm/DTACKrr) +
      || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && +
      iobm/RESrr) +
      || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && +
      !iobm/IOS_FSM_FFd2 && iobm/IOBERR) +
      || (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/ETACK) +
      || (CLK_IOB && !nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/ETACK) +
      || (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/BERRrf && +
      iobm/BERRrr) +
      || (CLK_IOB && nBERR_IOB && iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/DTACKrf && +
      iobm/DTACKrr)); +
+FDCPE FDCPE_iobm/IOREQr (iobm/IOREQr,iobs/IOREQ,!CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/IOS_FSM_FFd1 (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,1'b0,1'b0); +
     assign iobm/IOS_FSM_FFd1_D = ((iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1) +
      || (!iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd2)); +
+FTCPE FTCPE_iobm/IOS_FSM_FFd2 (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,1'b0,1'b0); +
     assign iobm/IOS_FSM_FFd2_T = ((iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && +
      !iobm/IOS_FSM_FFd2) +
      || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/IOS_FSM_FFd2 && iobm/ETACK) +
      || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/IOS_FSM_FFd2 && iobm/BERRrf && iobm/BERRrr) +
      || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/IOS_FSM_FFd2 && iobm/DTACKrf && iobm/DTACKrr) +
      || (CLK_IOB && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +
      iobm/IOS_FSM_FFd2 && iobm/RESrf && iobm/RESrr)); +
+FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,1'b0,1'b0); +
     assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2) +
      || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && +
      !iobm/IOS_FSM_FFd2) +
      || (!CLK_IOB && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && +
      iobm/IOREQr && !nAoutOE)); +
+FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES,!CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/RESrr (iobm/RESrr,!nRES,CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,CLK2X_IOB,1'b0,1'b0); +
+FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,CLK_FSB,1'b0,1'b0); +
     assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); +
+FTCPE FTCPE_iobs/BERR (iobs/BERR,iobs/BERR_T,CLK_FSB,1'b0,1'b0); +
     assign iobs/BERR_T = ((iobs/BERR && nAS_FSB && !fsb/ASrf) +
      || (iobs/Once && iobs/BERR && !iobs/PS_FSM_FFd2 && +
      !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) +
      || (iobs/Once && !iobs/BERR && !nAS_FSB && +
      !iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1) +
      || (iobs/Once && !iobs/BERR && !iobs/PS_FSM_FFd2 && +
      !iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1)); +
+FDCPE FDCPE_iobs/Clear1 (iobs/Clear1,iobs/Clear1_D,CLK_FSB,1'b0,1'b0); +
     assign iobs/Clear1_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1); +
+FDCPE FDCPE_iobs/IOACTr (iobs/IOACTr,iobm/IOACT,CLK_FSB,1'b0,1'b0); +
+FDCPE FDCPE_iobs/IOL0 (iobs/IOL0,iobs/IOL0_D,CLK_FSB,1'b0,1'b0,iobs/IOL0_CE); +
     assign iobs/IOL0_D = ((!nLDS_FSB && nADoutLE1) +
      || (iobs/IOL1 && !nADoutLE1)); +
     assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); +
+FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,CLK_FSB,1'b0,1'b0,iobs/Load1); +
+FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,CLK_FSB,1'b0,1'b0); +
     assign iobs/IOREQ_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && nWE_FSB && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && +
      SW[1] && nADoutLE1) +
      || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && +
      !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      cs/nOverlay1 && !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1) +
      || (iobs/PS_FSM_FFd1 && iobs/IOACTr) +
      || (iobs/Once && !iobs/PS_FSM_FFd2 && nADoutLE1) +
      || (nAS_FSB && !iobs/PS_FSM_FFd2 && !fsb/ASrf && +
      nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && +
      !iobs/PS_FSM_FFd2 && nADoutLE1)); +
+FTCPE FTCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_T,CLK_FSB,1'b0,1'b0); +
     assign iobs/IORW0_T = ((A_FSB_19_IBUF$BUF0.EXP) +
      || (iobs/IORW0 && iobs/IORW1 && !nADoutLE1) +
      || (!iobs/IORW0 && !iobs/IORW1 && !nADoutLE1) +
      || (nAS_FSB && !fsb/ASrf && nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !iobs/IORW0 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[20] && SW[1] && nADoutLE1) +
      || (!nWE_FSB && !iobs/IORW0 && nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && +
      nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && nADoutLE1) +
      || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && +
      nADoutLE1) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      cs/nOverlay1 && nADoutLE1)); +
+FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,CLK_FSB,1'b0,1'b0); +
     assign iobs/IORW1_T = ((iobs/Once) +
      || (!nADoutLE1) +
      || (nBERR_FSB_OBUF.EXP) +
      || (nAS_FSB && !fsb/ASrf) +
      || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) +
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) +
      || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[20]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[19]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[18]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[17]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[16]) +
      || (nWE_FSB && iobs/IORW1) +
      || (!nWE_FSB && !iobs/IORW1) +
      || (!A_FSB[23] && A_FSB[21] && !iobs/IORW1)); +
+FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,CLK_FSB,1'b0,1'b0); +
     assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf) +
      || (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && +
      !iobs/IOACTr && iobm/IOBERR && nADoutLE1) +
      || (iobs/Once && !iobs/IOReady && !nAS_FSB && +
      !iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) +
      || (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && +
      !iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)); +
+FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,CLK_FSB,1'b0,1'b0,iobs/IOU0_CE); +
     assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1) +
      || (iobs/IOU1 && !nADoutLE1)); +
     assign iobs/IOU0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); +
+FDCPE FDCPE_iobs/IOU1 (iobs/IOU1,!nUDS_FSB,CLK_FSB,1'b0,1'b0,iobs/Load1); +
+FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,CLK_FSB,1'b0,1'b0); +
     assign iobs/Load1_D = ((iobs/Once) +
      || (!nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[20]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[19]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[17]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[16]) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[18]) +
      || (!A_FSB[23] && A_FSB[21] && nWE_FSB) +
      || (!A_FSB[23] && !A_FSB[20] && SW[1]) +
      || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21]) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      cs/nOverlay1) +
      || (nAS_FSB && !fsb/ASrf) +
      || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) +
      || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)); +
+FDCPE FDCPE_iobs/Once (iobs/Once,iobs/Once_D,CLK_FSB,1'b0,1'b0); +
     assign iobs/Once_D = ((A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd1) +
      || (!iobs/Once && iobs/PS_FSM_FFd1 && !nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !iobs/Once) +
      || (!A_FSB[23] && !A_FSB[22] && !iobs/Once && +
      !cs/nOverlay1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && !iobs/Once) +
      || (RA_4_OBUF.EXP) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && !iobs/Once) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && !iobs/Once) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && !iobs/Once) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && !iobs/Once) +
      || (!A_FSB[23] && A_FSB[21] && nWE_FSB && !iobs/Once) +
      || (nAS_FSB && !fsb/ASrf) +
      || (A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd2) +
      || (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd2) +
      || (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd1) +
      || (!iobs/Once && iobs/PS_FSM_FFd2 && !nADoutLE1)); +
+FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,1'b0,1'b0); +
     assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2) +
      || (iobs/PS_FSM_FFd1 && iobs/IOACTr)); +
+FDCPE FDCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,1'b0,1'b0); +
     assign iobs/PS_FSM_FFd2_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[20] && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[21] && nWE_FSB && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && +
      !iobs/PS_FSM_FFd1 && SW[1] && nADoutLE1) +
      || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) +
      || (iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && +
      iobs/IOACTr) +
      || (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && +
      !iobs/IOACTr) +
      || (iobs/Once && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && +
      nADoutLE1) +
      || (nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && +
      !fsb/ASrf && nADoutLE1) +
      || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && +
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)); +
+
+assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0); +
+FDCPE FDCPE_nADoutLE1 (nADoutLE1,nADoutLE1_D,CLK_FSB,1'b0,1'b0); +
     assign nADoutLE1_D = ((iobs/Load1) +
      || (!iobs/Clear1 && !nADoutLE1)); +
+FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!CLK2X_IOB,1'b0,1'b0); +
     assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2) +
      || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)); +
     assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ; +
     assign nAS_IOB_OE = !nAoutOE; +
+FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,CLK2X_IOB,1'b0,1'b0); +
     assign nAoutOE_D = ((!iobm/BGr0 && !iobm/BGr1) +
      || (!iobm/BGr1 && nAoutOE) +
      || (!nAS_IOB && !iobm/BGr0 && !nAoutOE)); +
+
+assign nBERR_FSB = ((nAS_FSB) +
      || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && A_FSB[20] && +
      !iobs/BERR && !fsb/BERR0r && !fsb/BERR1r) +
      || (!iobs/BERR && !cnt/TimeoutB && !fsb/BERR0r && +
      !fsb/BERR1r)); +
+FDCPE FDCPE_nBR_IOB (nBR_IOB,1'b0,CLK_FSB,1'b0,1'b0,nBR_IOB_CE); +
     assign nBR_IOB_CE = (RESr0 && RESr1 && IPL2r0 && RESr2 && !RESDone && +
      IPL2r1); +
+FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!CLK_FSB,1'b0,1'b0); +
+FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,1'b0,1'b0); +
     assign nDTACK_FSB_D = ((EXP18_.EXP) +
      || (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && +
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && +
      !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB) +
      || (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && +
      A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && +
      cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && +
      !nADoutLE1) +
      || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB) +
      || (A_FSB[8] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB) +
      || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB) +
      || (EXP21_.EXP) +
      || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && +
      !iobs/IOReady && nDTACK_FSB) +
      || (A_FSB[22] && !A_FSB[21] && !fsb/Ready1r && +
      !iobs/IOReady && nDTACK_FSB && !SW[1]) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      !cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) +
      || (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && +
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && +
      !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB) +
      || (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && +
      A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && +
      cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && +
      !nADoutLE1) +
      || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB) +
      || (A_FSB[9] && A_FSB[15] && A_FSB[14] && A_FSB[13] && +
      A_FSB[12] && A_FSB[11] && A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB) +
      || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB) +
      || (A_FSB[9] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB) +
      || (A_FSB[8] && A_FSB[15] && !A_FSB[14] && A_FSB[13] && +
      !A_FSB[12] && !A_FSB[11] && !A_FSB[10] && !A_FSB[23] && !A_FSB[22] && +
      A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && +
      A_FSB[16] && !nWE_FSB && cs/nOverlay1 && !cnt/TimeoutA && +
      !fsb/Ready2r && nDTACK_FSB)); +
+FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!CLK2X_IOB,1'b0,1'b0); +
     assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2); +
+
+assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB) +
      || (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && +
      !nAS_FSB) +
      || (A_FSB[22] && !A_FSB[21] && nWE_FSB && !nAS_FSB && +
      !SW[1])); +
+FDCPE FDCPE_nDoutOE (nDoutOE,nDoutOE_D,CLK2X_IOB,1'b0,1'b0); +
     assign nDoutOE_D = ((!iobs/IORW0) +
      || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2)); +
+FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!CLK2X_IOB,1'b0,1'b0); +
     assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd2) +
      || (iobs/IOL0 && iobm/IOS_FSM_FFd1 && +
      iobm/IOS_FSM_FFd2) +
      || (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && +
      !iobm/IOS_FSM_FFd1)); +
     assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ; +
     assign nLDS_IOB_OE = !nAoutOE; +
+
+assign nOE = !((nWE_FSB && !nAS_FSB)); +
+
+assign nRAMLWE = !((!nWE_FSB && !nLDS_FSB && !ram/RAMDIS2 && !nAS_FSB && +
      !ram/RAMDIS1)); +
+
+assign nRAMUWE = !((!nWE_FSB && !nUDS_FSB && !ram/RAMDIS2 && !nAS_FSB && +
      !ram/RAMDIS1)); +
+
+assign nRAS = !(((ram/RefRAS) +
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && +
      !ram/RAMDIS2 && !nAS_FSB && !ram/RAMDIS1) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      !cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && !ram/RAMDIS1))); +
+
+assign nROMCS = !(((A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !A_FSB[20] && +
      !SW[1]) +
      || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && +
      SW[1]) +
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !A_FSB[20] && +
      !cs/nOverlay1))); +
+
+assign nROMWE = !((!nWE_FSB && !nAS_FSB)); +
+FDCPE FDCPE_nUDS_IOB (nUDS_IOB_I,nUDS_IOB,!CLK2X_IOB,1'b0,1'b0); +
     assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 && +
      iobm/IOS_FSM_FFd2) +
      || (iobs/IOU0 && iobm/IOS_FSM_FFd1 && +
      iobm/IOS_FSM_FFd2) +
      || (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && +
      !iobm/IOS_FSM_FFd1)); +
     assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ; +
     assign nUDS_IOB_OE = !nAoutOE; +
+FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,1'b0,1'b0); +
     assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && +
      !iobm/ES[3] && !iobm/ES[4]) +
      || (nVMA_IOB && iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && +
      !iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && +
      iobm/VPArr)); +
     assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ; +
     assign nVMA_IOB_OE = !nAoutOE; +
+
+assign nVPA_FSB = !((fsb/VPA && !nAS_FSB)); +
+FDCPE FDCPE_ram/BACTr (ram/BACTr,ram/BACTr_D,CLK_FSB,1'b0,1'b0); +
     assign ram/BACTr_D = (nAS_FSB && !fsb/ASrf); +
+FTCPE FTCPE_ram/Once (ram/Once,ram/Once_T,CLK_FSB,1'b0,1'b0); +
     assign ram/Once_T = ((ram/Once && nAS_FSB && !fsb/ASrf) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      !ram/RS_FSM_FFd3) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && +
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      !ram/RS_FSM_FFd3) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && +
      !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      !ram/RS_FSM_FFd3 && fsb/ASrf)); +
+FDCPE FDCPE_ram/RAMDIS1 (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,1'b0,1'b0); +
     assign ram/RAMDIS1_D = ((RA_1_OBUF.EXP) +
      || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) +
      || (!cnt/RefDone && ram/Once && !ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && +
      cnt/RefCnt[7]) +
      || (!cnt/RefDone && nAS_FSB && !ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && +
      !fsb/ASrf) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) +
      || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) +
      || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) +
      || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) +
      || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3) +
      || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) +
      || (A_FSB[23] && !cnt/RefDone && !nAS_FSB && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && !ram/BACTr) +
      || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd3 && !ram/BACTr && fsb/ASrf) +
      || (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])); +
+FTCPE FTCPE_ram/RAMDIS2 (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,1'b0,1'b0); +
     assign ram/RAMDIS2_T = ((!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && +
      ram/Once && !cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && +
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && +
      cnt/RefCnt[7]) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && +
      ram/Once && !cs/nOverlay1 && !ram/RAMDIS2 && !ram/RS_FSM_FFd2 && +
      !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && +
      fsb/ASrf) +
      || (ram/RAMDIS2 && nAS_FSB && !fsb/ASrf) +
      || (!cnt/RefDone && ram/Once && !ram/RAMDIS2 && !nAS_FSB && +
      ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!cnt/RefDone && ram/Once && !ram/RAMDIS2 && +
      ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) +
      || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && +
      cs/nOverlay1 && !ram/RAMDIS2 && !nAS_FSB && !ram/RS_FSM_FFd2 && +
      !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && +
      cs/nOverlay1 && !ram/RAMDIS2 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf)); +
+FDCPE FDCPE_ram/RAMReady (ram/RAMReady,ram/RAMReady_D,CLK_FSB,1'b0,1'b0); +
     assign ram/RAMReady_D = ((ram/RS_FSM_FFd2) +
      || (ram/RS_FSM_FFd3) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && fsb/ASrf) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && +
      !ram/RS_FSM_FFd1 && !ram/BACTr) +
      || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/BACTr) +
      || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/BACTr) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && +
      !ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf) +
      || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf) +
      || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/BACTr && fsb/ASrf) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && +
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && +
      !cs/nOverlay1 && !ram/RS_FSM_FFd1 && fsb/ASrf) +
      || (!cnt/RefDone && cnt/RefCnt[5] && cnt/RefCnt[6] && +
      cnt/RefCnt[7]) +
      || (A_FSB[23] && !cnt/RefDone && !nAS_FSB && +
      !ram/RS_FSM_FFd1 && !ram/BACTr) +
      || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && +
      !ram/BACTr && fsb/ASrf)); +
+FDCPE FDCPE_ram/RASEL (ram/RASEL,ram/RASEL_D,CLK_FSB,1'b0,1'b0); +
     assign ram/RASEL_D = ((A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) +
      || (A_FSB[22] && !cnt/RefDone && cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) +
      || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) +
      || (!A_FSB[22] && !cnt/RefDone && !cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && +
      cnt/RefCnt[7]) +
      || (EXP26_.EXP) +
      || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && fsb/ASrf) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && !nAS_FSB && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) +
      || (A_FSB[22] && !A_FSB[21] && !cnt/RefDone && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) +
      || (!ram/RS_FSM_FFd2 && ram/RS_FSM_FFd3) +
      || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && +
      !ram/RS_FSM_FFd3) +
      || (A_FSB[23] && !cnt/RefDone && !nAS_FSB && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && !ram/BACTr) +
      || (A_FSB[23] && !cnt/RefDone && !ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd2 && !ram/BACTr && fsb/ASrf) +
      || (!cnt/RefDone && nAS_FSB && !ram/RS_FSM_FFd2 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && !fsb/ASrf)); +
+FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,CLK_FSB,1'b0,1'b0); +
     assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && +
      ram/Once && !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd2 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && +
      ram/Once && !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) +
      || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && +
      cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) +
      || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) +
      || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3) +
      || (!cnt/RefDone && !nAS_FSB && ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) +
      || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && ram/Once && +
      cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7])); +
+FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,CLK_FSB,1'b0,1'b0); +
     assign ram/RS_FSM_FFd2_D = ((!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      !cnt/RefCnt[5] && ram/BACTr) +
      || (!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      !cnt/RefCnt[6] && ram/BACTr) +
      || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      !cnt/RefCnt[5] && !fsb/ASrf) +
      || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      !cnt/RefCnt[7] && !fsb/ASrf) +
      || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      !cnt/RefCnt[6] && !fsb/ASrf) +
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && +
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) +
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && +
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && +
      !cs/nOverlay1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) +
      || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) +
      || (cnt/RefDone && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) +
      || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) +
      || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) +
      || (!ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && +
      !cnt/RefCnt[7] && ram/BACTr)); +
+FDCPE FDCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_D,CLK_FSB,1'b0,1'b0); +
     assign ram/RS_FSM_FFd3_D = ((!cnt/RefDone && !nAS_FSB && ram/RS_FSM_FFd1 && +
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && +
      cnt/RefCnt[7]) +
      || (!cnt/RefDone && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && +
      !ram/RS_FSM_FFd3 && cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && +
      fsb/ASrf) +
      || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && +
      cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!A_FSB[23] && !A_FSB[22] && !cnt/RefDone && +
      cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && +
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7]) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !cnt/RefDone && +
      !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && +
      cnt/RefCnt[5] && cnt/RefCnt[6] && cnt/RefCnt[7] && fsb/ASrf) +
      || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) +
      || (!A_FSB[23] && !A_FSB[22] && !ram/Once && cs/nOverlay1 && +
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && +
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) +
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && !ram/Once && +
      !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf)); +
+FDCPE FDCPE_ram/RefRAS (ram/RefRAS,ram/RefRAS_D,CLK_FSB,1'b0,1'b0); +
     assign ram/RefRAS_D = (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2); +
+Register Legend: +
      FDCPE (Q,D,C,CLR,PRE,CE); +
      FTCPE (Q,D,C,CLR,PRE,CE); +
      LDCP (Q,D,G,CLR,PRE); +
+
+
+ + +
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@@ -52,8 +52,8 @@ + +
 

  diff --git a/cpld/XC95144XL/MXSE_html/fit/leftnav.js b/cpld/XC95144XL/WarpSE_html/fit/leftnav.js similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/leftnav.js rename to cpld/XC95144XL/WarpSE_html/fit/leftnav.js diff --git a/cpld/XC95144XL/MXSE_html/fit/legend.gif b/cpld/XC95144XL/WarpSE_html/fit/legend.gif similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/legend.gif rename to cpld/XC95144XL/WarpSE_html/fit/legend.gif diff --git a/cpld/XC95144XL/WarpSE_html/fit/legend.jpg b/cpld/XC95144XL/WarpSE_html/fit/legend.jpg new file mode 100644 index 0000000000000000000000000000000000000000..1d04af024b10f70a03faa699fb2da92df25a3ced GIT binary patch literal 1256 zcmex=9X@jO*zpr5PhGlvPb?HxGHT=yahkYr<3UbkKb$@|Xn~>>0l3-%LJOC;5^8;98;2VV88*>51JHKa(Qear>Bm)mQ%? zq4QY(Gb~_T|M!Fap&jRMT>j@#*886!M)*I2TJL*7|q# z`G4m&UWt-e_v}+j#r>Sb*=1b9pC%uaJeqZQQH{W?XP<7#x*yu)pUi!}QY!vH)IF8l zb)OiDy4HT0RKWP)`rJRpf9KiwK3wa6ApF*{g^TX}XGpkVyY!3Uy}L^?4hL7?c-o=h zZ}G5c%5)A1ZGqnocF7+;KRDj|$5(9k!^$mlogLcjInFORydtZt==RL?f49sFJNY<@ zPV7kQII+;{lV1o!t*Tz<2Pe(9x=*jvXvOi`|`FD6KAU@8ln+!F=gI!^5x&@qZ0s`@bLf&%pKJ z{w-sNi+`-wWp0~g+9Ed5MDLt(0JqHgs9*E;<@{a!pW#UcP|NG){|s-oFn*qX`2MZr zBlkEzOl@yBnX7dB&9{j<)whawo{%{Cv)=3ee}=XrAFuyqT3i4A=YNJr8H*bDf8_Yf z)?d)N{_j7-{C{fwsN60M26Qdxd<-LY)=T}nD0RGho$fo+UM}%ztf_8&PgW{CUVr+n Js|e%&n*i?m6>0zg literal 0 HcmV?d00001 diff --git a/cpld/XC95144XL/WarpSE_html/fit/logic_legXC95.htm b/cpld/XC95144XL/WarpSE_html/fit/logic_legXC95.htm new file mode 100644 index 0000000..e253a0b --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/logic_legXC95.htm @@ -0,0 +1,2 @@ +
+
diff --git a/cpld/XC95144XL/WarpSE_html/fit/logic_legXbr.htm b/cpld/XC95144XL/WarpSE_html/fit/logic_legXbr.htm new file mode 100644 index 0000000..d256e25 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/logic_legXbr.htm @@ -0,0 +1,16 @@ +
+I/O Style - OD    - OpenDrain
+          - PU    - Pullup
+          - PN    - Pulldown
+          - KPR   - Keeper
+          - S     - SchmittTrigger
+          - DG    - DataGate
+Reg Use   - LATCH - Transparent latch
+          - DFF   - D-flip-flop
+          - DEFF  - D-flip-flop with clock enable
+          - TFF   - T-flip-flop
+          - TDFF  - Dual-edge-triggered T-flip-flop
+          - DDFF  - Dual-edge-triggered flip-flop
+          - DDEFF - Dual-edge-triggered flip-flop with clock enable
+          /S (after any above flop/latch type) indicates initial state is Set
+
diff --git a/cpld/XC95144XL/WarpSE_html/fit/logic_legXpla3.htm b/cpld/XC95144XL/WarpSE_html/fit/logic_legXpla3.htm new file mode 100644 index 0000000..c0e6f4a --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/logic_legXpla3.htm @@ -0,0 +1,3 @@ +
+Legend: PU  - Pull Up
+
diff --git a/cpld/XC95144XL/MXSE_html/fit/logicleft.htm b/cpld/XC95144XL/WarpSE_html/fit/logicleft.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/logicleft.htm rename to cpld/XC95144XL/WarpSE_html/fit/logicleft.htm diff --git a/cpld/XC95144XL/WarpSE_html/fit/logicleft.js b/cpld/XC95144XL/WarpSE_html/fit/logicleft.js new file mode 100644 index 0000000..2fa4142 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/logicleft.js @@ -0,0 +1 @@ +function showLogicLeft() { parent.leftnav.showLogicLeft(); } diff --git a/cpld/XC95144XL/MXSE_html/fit/logicleftdoc.htm b/cpld/XC95144XL/WarpSE_html/fit/logicleftdoc.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/logicleftdoc.htm rename to cpld/XC95144XL/WarpSE_html/fit/logicleftdoc.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/logiclegend.htm b/cpld/XC95144XL/WarpSE_html/fit/logiclegend.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/logiclegend.htm rename to cpld/XC95144XL/WarpSE_html/fit/logiclegend.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/logiclegendV.htm b/cpld/XC95144XL/WarpSE_html/fit/logiclegendV.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/logiclegendV.htm rename to cpld/XC95144XL/WarpSE_html/fit/logiclegendV.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/macrocell.gif b/cpld/XC95144XL/WarpSE_html/fit/macrocell.gif similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/macrocell.gif rename to cpld/XC95144XL/WarpSE_html/fit/macrocell.gif diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_00.htm b/cpld/XC95144XL/WarpSE_html/fit/mapinput_00.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/mapinput_00.htm rename to cpld/XC95144XL/WarpSE_html/fit/mapinput_00.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_01.htm b/cpld/XC95144XL/WarpSE_html/fit/mapinput_01.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/mapinput_01.htm rename to cpld/XC95144XL/WarpSE_html/fit/mapinput_01.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_02.htm b/cpld/XC95144XL/WarpSE_html/fit/mapinput_02.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/mapinput_02.htm rename to cpld/XC95144XL/WarpSE_html/fit/mapinput_02.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinputdoc.htm b/cpld/XC95144XL/WarpSE_html/fit/mapinputdoc.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/mapinputdoc.htm rename to cpld/XC95144XL/WarpSE_html/fit/mapinputdoc.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic.js b/cpld/XC95144XL/WarpSE_html/fit/maplogic.js similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/maplogic.js rename to cpld/XC95144XL/WarpSE_html/fit/maplogic.js diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_00.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm similarity index 93% rename from cpld/XC95144XL/MXSE_html/fit/maplogic_00.htm rename to cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm index 46ccfc2..d9938cb 100644 --- a/cpld/XC95144XL/MXSE_html/fit/maplogic_00.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm @@ -20,45 +20,6 @@ Reg Init State -ALE0M -3 -5 -FB6 -MC7 -STD -  -  -(b) -(b) -RESET - - -ALE0S -1 -2 -FB1 -MC13 -STD -  -  -(b) -(b) -RESET - - -BERR_IOBS -4 -8 -FB4 -MC18 -STD -  -  -(b) -(b) -RESET - - CLK20EN 1 1 @@ -85,84 +46,6 @@   -IOACT -7 -13 -FB6 -MC16 -STD -  -  -(b) -(b) -RESET - - -IOBERR -9 -13 -FB6 -MC18 -STD -  -  -(b) -(b) -RESET - - -IOL0 -3 -5 -FB4 -MC16 -STD -  -  -(b) -(b) -RESET - - -IOREQ -15 -20 -FB8 -MC9 -STD -  -67 -I/O -(b) -RESET - - -IORW0 -19 -21 -FB8 -MC18 -STD -  -  -(b) -(b) -RESET - - -IOU0 -3 -5 -FB1 -MC18 -STD -  -  -(b) -(b) -RESET - - IPL2r0 1 1 @@ -189,24 +72,11 @@ RESET -$OpTx$FX_DC$708 +$OpTx$FX_DC$591 1 2 FB1 -MC14 -STD -  -19 -I/O -I -  - - -$OpTx$$OpTx$FX_DC$182_INV$783 -6 -8 -FB7 -MC10 +MC13 STD     @@ -423,45 +293,6 @@ RESET -RefAck -1 -2 -FB1 -MC7 -STD -  -  -(b) -(b) -RESET - - -TimeoutA -3 -10 -FB4 -MC15 -STD -  -96 -I/O -I -RESET - - -TimeoutB -3 -12 -FB7 -MC3 -STD -  -  -(b) -(b) -RESET - - cnt/RefCnt<0> 0 0 @@ -479,23 +310,23 @@ 1 1 FB1 -MC6 +MC7 STD   -14 -I/O -I +  +(b) +(b) RESET cnt/RefCnt<2> 1 2 -FB1 -MC5 +FB4 +MC12 STD   -13 +94 I/O I RESET @@ -505,7 +336,7 @@ 1 3 FB4 -MC7 +MC10 STD     @@ -518,12 +349,12 @@ 1 4 FB4 -MC4 +MC9 STD   -  -(b) -(b) +92 +I/O +I RESET @@ -531,12 +362,12 @@ 1 5 FB4 -MC3 +MC8 STD   -  -(b) -(b) +91 +I/O +I RESET @@ -544,7 +375,7 @@ 1 6 FB4 -MC1 +MC7 STD     @@ -556,8 +387,8 @@ cnt/RefCnt<7> 1 7 -FB5 -MC3 +FB4 +MC4 STD     @@ -570,19 +401,6 @@ 2 10 FB4 -MC12 -STD -  -94 -I/O -I -RESET - - -cnt/TimeoutBPre -3 -11 -FB4 MC14 STD   @@ -592,10 +410,49 @@ RESET +cnt/TimeoutA +3 +10 +FB4 +MC16 +STD +  +  +(b) +(b) +RESET + + +cnt/TimeoutBPre +3 +11 +FB7 +MC7 +STD +  +  +(b) +(b) +RESET + + +cnt/TimeoutB +3 +12 +FB7 +MC13 +STD +  +  +(b) +(b) +RESET + + cs/nOverlay0 3 8 -FB4 +FB3 MC13 STD   @@ -608,8 +465,8 @@ cs/nOverlay1 2 3 -FB4 -MC10 +FB1 +MC18 STD     @@ -622,45 +479,45 @@ 1 1 FB1 -MC4 +MC6 STD   -  -(b) -(b) +14 +I/O +I RESET fsb/BERR0r 3 8 -FB8 -MC16 +FB3 +MC12 STD   -  -(b) -(b) +30 +I/O +I RESET fsb/BERR1r 2 4 -FB4 -MC9 +FB1 +MC17 STD   -92 -I/O -I +22 +I/O/GCK1 +GCK RESET fsb/Ready0r 3 8 -FB7 +FB3 MC4 STD   @@ -674,32 +531,6 @@ 8 18 FB3 -MC1 -STD -  -  -(b) -(b) -RESET - - -fsb/Ready2r -9 -22 -FB3 -MC5 -STD -  -24 -I/O -I -RESET - - -fsb/VPA -22 -31 -FB3 MC15 STD   @@ -709,9 +540,61 @@ RESET +fsb/Ready2r +9 +22 +FB3 +MC16 +STD +  +  +(b) +(b) +RESET + + +fsb/VPA +27 +33 +FB3 +MC1 +STD +  +  +(b) +(b) +RESET + + +iobm/ALE0 +3 +5 +FB6 +MC7 +STD +  +  +(b) +(b) +RESET + + iobm/BERRrf 1 1 +FB1 +MC5 +STD +  +13 +I/O +I +RESET + + +iobm/BERRrr +1 +1 FB2 MC17 STD @@ -722,7 +605,7 @@ RESET -iobm/BERRrr +iobm/BGr0 1 1 FB2 @@ -735,7 +618,7 @@ RESET -iobm/BGr0 +iobm/BGr1 1 1 FB2 @@ -748,7 +631,7 @@ RESET -iobm/BGr1 +iobm/DTACKrf 1 1 FB2 @@ -761,7 +644,7 @@ RESET -iobm/DTACKrf +iobm/DTACKrr 1 1 FB2 @@ -774,19 +657,6 @@ RESET -iobm/DTACKrr -1 -1 -FB2 -MC12 -STD -  -7 -I/O -I -RESET - - iobm/ES<0> 3 7 @@ -869,19 +739,6 @@ 1 1 FB2 -MC10 -STD -  -  -(b) -(b) -RESET - - -iobm/Er -1 -1 -FB2 MC11 STD   @@ -891,16 +748,55 @@ RESET +iobm/Er +1 +1 +FB2 +MC12 +STD +  +7 +I/O +I +RESET + + +iobm/IOACT +7 +13 +FB6 +MC16 +STD +  +  +(b) +(b) +RESET + + +iobm/IOBERR +9 +13 +FB6 +MC18 +STD +  +  +(b) +(b) +RESET + + iobm/IOREQr 1 1 FB2 -MC9 +MC10 STD   -4 -I/O/GTS2 -I +  +(b) +(b) RESET @@ -908,12 +804,12 @@ 2 3 FB1 -MC17 +MC16 STD   -22 -I/O/GCK1 -GCK +  +(b) +(b) RESET @@ -947,6 +843,19 @@ 1 1 FB1 +MC4 +STD +  +  +(b) +(b) +RESET + + +iobm/RESrr +1 +1 +FB1 MC3 STD   @@ -956,20 +865,20 @@ RESET -iobm/RESrr +iobm/VPArf 1 1 -FB1 -MC2 +FB2 +MC9 STD   -11 -I/O +4 +I/O/GTS2 I RESET -iobm/VPArf +iobm/VPArr 1 1 FB2 @@ -982,11 +891,24 @@ RESET -iobm/VPArr +iobs/ALE0 1 -1 -FB2 -MC7 +2 +FB4 +MC3 +STD +  +  +(b) +(b) +RESET + + +iobs/BERR +4 +8 +FB8 +MC16 STD     @@ -998,8 +920,8 @@ iobs/Clear1 1 3 -FB3 -MC18 +FB4 +MC1 STD     @@ -1012,12 +934,25 @@ 1 1 FB2 -MC6 +MC7 STD   -2 -I/O/GTS4 -I +  +(b) +(b) +RESET + + +iobs/IOL0 +3 +5 +FB5 +MC4 +STD +  +  +(b) +(b) RESET @@ -1025,7 +960,33 @@ 2 2 FB1 -MC16 +MC15 +STD +  +20 +I/O +I +RESET + + +iobs/IOREQ +15 +20 +FB8 +MC9 +STD +  +67 +I/O +(b) +RESET + + +iobs/IORW0 +19 +21 +FB8 +MC18 STD     @@ -1037,12 +998,12 @@ iobs/IORW1 17 20 -FB3 -MC3 +FB8 +MC14 STD   -  -(b) +71 +I/O (b) RESET @@ -1060,14 +1021,27 @@ RESET +iobs/IOU0 +3 +5 +FB4 +MC15 +STD +  +96 +I/O +I +RESET + + iobs/IOU1 2 2 FB1 -MC15 +MC14 STD   -20 +19 I/O I RESET @@ -1089,12 +1063,12 @@ iobs/Once 18 19 -FB8 -MC14 +FB5 +MC7 STD   -71 -I/O +  +(b) (b) RESET @@ -1103,12 +1077,12 @@ 2 3 FB4 -MC8 +MC13 STD   -91 -I/O -I +  +(b) +(b) RESET @@ -1217,8 +1191,8 @@ nDTACK_FSB -23 -32 +28 +34 FB3 MC9 STD @@ -1402,12 +1376,12 @@ 1 2 FB1 -MC1 +MC2 STD   -  -(b) -(b) +11 +I/O +I RESET @@ -1415,7 +1389,7 @@ 5 10 FB5 -MC16 +MC10 STD     @@ -1425,14 +1399,14 @@ ram/RAMDIS1 -18 +17 15 -FB5 -MC8 +FB7 +MC18 STD   -39 -I/O +  +(b) (b) RESET @@ -1441,7 +1415,7 @@ 7 15 FB5 -MC4 +MC3 STD     @@ -1451,23 +1425,23 @@ ram/RAMReady -16 +15 15 FB7 -MC1 +MC15 STD   -  -(b) -(b) +60 +I/O +I RESET ram/RASEL -20 +19 15 FB5 -MC1 +MC18 STD     @@ -1477,10 +1451,10 @@ ram/RS_FSM_FFd1 -5 -10 -FB7 -MC7 +8 +14 +FB4 +MC18 STD     @@ -1490,15 +1464,15 @@ ram/RS_FSM_FFd2 -13 +14 14 FB7 -MC17 +MC10 STD   -61 -I/O -I +  +(b) +(b) RESET @@ -1506,7 +1480,20 @@ 11 14 FB7 -MC13 +MC4 +STD +  +  +(b) +(b) +RESET + + +ram/RefRAS +1 +2 +FB1 +MC1 STD     diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_01.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm similarity index 93% rename from cpld/XC95144XL/MXSE_html/fit/maplogic_01.htm rename to cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm index c274b9b..6ecfbdc 100644 --- a/cpld/XC95144XL/MXSE_html/fit/maplogic_01.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm @@ -20,7 +20,7 @@ Reg Init State -ram/BACTr +ram/RefRAS 1 2 FB1 @@ -33,9 +33,9 @@ RESET -iobm/RESrr -1 +ram/BACTr 1 +2 FB1 MC2 STD @@ -46,7 +46,7 @@ RESET -iobm/RESrf +iobm/RESrr 1 1 FB1 @@ -59,7 +59,7 @@ RESET -fsb/ASrf +iobm/RESrf 1 1 FB1 @@ -72,9 +72,9 @@ RESET -cnt/RefCnt<2> +iobm/BERRrf +1 1 -2 FB1 MC5 STD @@ -85,7 +85,7 @@ RESET -cnt/RefCnt<1> +fsb/ASrf 1 1 FB1 @@ -98,9 +98,9 @@ RESET -RefAck +cnt/RefCnt<1> +1 1 -2 FB1 MC7 STD @@ -176,7 +176,7 @@ RESET -ALE0S +$OpTx$FX_DC$591 1 2 FB1 @@ -186,11 +186,11 @@   (b) (b) -RESET +  -$OpTx$FX_DC$708 -1 +iobs/IOU1 +2 2 FB1 MC14 @@ -199,10 +199,10 @@ 19 I/O I -  +RESET -iobs/IOU1 +iobs/IOL1 2 2 FB1 @@ -215,9 +215,9 @@ RESET -iobs/IOL1 -2 +iobm/IOS_FSM_FFd1 2 +3 FB1 MC16 STD @@ -228,9 +228,9 @@ RESET -iobm/IOS_FSM_FFd1 +fsb/BERR1r 2 -3 +4 FB1 MC17 STD @@ -241,9 +241,9 @@ RESET -IOU0 +cs/nOverlay1 +2 3 -5 FB1 MC18 STD @@ -258,19 +258,6 @@ 1 1 FB2 -MC6 -STD -  -2 -I/O/GTS4 -I -RESET - - -iobm/VPArr -1 -1 -FB2 MC7 STD   @@ -280,7 +267,7 @@ RESET -iobm/VPArf +iobm/VPArr 1 1 FB2 @@ -293,7 +280,7 @@ RESET -iobm/IOREQr +iobm/VPArf 1 1 FB2 @@ -306,7 +293,7 @@ RESET -iobm/Er2 +iobm/IOREQr 1 1 FB2 @@ -319,7 +306,7 @@ RESET -iobm/Er +iobm/Er2 1 1 FB2 @@ -332,7 +319,7 @@ RESET -iobm/DTACKrr +iobm/Er 1 1 FB2 @@ -345,7 +332,7 @@ RESET -iobm/DTACKrf +iobm/DTACKrr 1 1 FB2 @@ -358,7 +345,7 @@ RESET -iobm/BGr1 +iobm/DTACKrf 1 1 FB2 @@ -371,7 +358,7 @@ RESET -iobm/BGr0 +iobm/BGr1 1 1 FB2 @@ -384,7 +371,7 @@ RESET -iobm/BERRrr +iobm/BGr0 1 1 FB2 @@ -397,7 +384,7 @@ RESET -iobm/BERRrf +iobm/BERRrr 1 1 FB2 @@ -423,9 +410,9 @@ RESET -fsb/Ready1r -8 -18 +fsb/VPA +27 +33 FB3 MC1 STD @@ -436,11 +423,11 @@ RESET -iobs/IORW1 -17 -20 +fsb/Ready0r +3 +8 FB3 -MC3 +MC4 STD     @@ -449,22 +436,9 @@ RESET -fsb/Ready2r -9 -22 -FB3 -MC5 -STD -  -24 -I/O -I -RESET - - nDTACK_FSB -23 -32 +28 +34 FB3 MC9 STD @@ -475,9 +449,35 @@ RESET -fsb/VPA -22 -31 +fsb/BERR0r +3 +8 +FB3 +MC12 +STD +  +30 +I/O +I +RESET + + +cs/nOverlay0 +3 +8 +FB3 +MC13 +STD +  +  +(b) +(b) +RESET + + +fsb/Ready1r +8 +18 FB3 MC15 STD @@ -488,6 +488,19 @@ RESET +fsb/Ready2r +9 +22 +FB3 +MC16 +STD +  +  +(b) +(b) +RESET + + nROMWE 1 2 @@ -504,19 +517,6 @@ iobs/Clear1 1 3 -FB3 -MC18 -STD -  -  -(b) -(b) -RESET - - -cnt/RefCnt<6> -1 -6 FB4 MC1 STD @@ -540,9 +540,9 @@ SET -cnt/RefCnt<5> +iobs/ALE0 1 -5 +2 FB4 MC3 STD @@ -553,9 +553,9 @@ RESET -cnt/RefCnt<4> +cnt/RefCnt<7> 1 -4 +7 FB4 MC4 STD @@ -592,9 +592,9 @@   -cnt/RefCnt<3> +cnt/RefCnt<6> 1 -3 +6 FB4 MC7 STD @@ -605,9 +605,9 @@ RESET -iobs/PS_FSM_FFd1 -2 -3 +cnt/RefCnt<5> +1 +5 FB4 MC8 STD @@ -618,8 +618,8 @@ RESET -fsb/BERR1r -2 +cnt/RefCnt<4> +1 4 FB4 MC9 @@ -631,8 +631,8 @@ RESET -cs/nOverlay1 -2 +cnt/RefCnt<3> +1 3 FB4 MC10 @@ -657,9 +657,9 @@   -cnt/RefDone +cnt/RefCnt<2> +1 2 -10 FB4 MC12 STD @@ -670,9 +670,9 @@ RESET -cs/nOverlay0 +iobs/PS_FSM_FFd1 +2 3 -8 FB4 MC13 STD @@ -683,9 +683,9 @@ RESET -cnt/TimeoutBPre -3 -11 +cnt/RefDone +2 +10 FB4 MC14 STD @@ -696,9 +696,9 @@ RESET -TimeoutA +iobs/IOU0 3 -10 +5 FB4 MC15 STD @@ -709,9 +709,9 @@ RESET -IOL0 +cnt/TimeoutA 3 -5 +10 FB4 MC16 STD @@ -735,9 +735,9 @@ RESET -BERR_IOBS -4 +ram/RS_FSM_FFd1 8 +14 FB4 MC18 STD @@ -748,19 +748,6 @@ RESET -ram/RASEL -20 -15 -FB5 -MC1 -STD -  -  -(b) -(b) -RESET - - nROMCS 3 6 @@ -774,9 +761,9 @@   -cnt/RefCnt<7> -1 +ram/RAMDIS2 7 +15 FB5 MC3 STD @@ -787,9 +774,9 @@ RESET -ram/RAMDIS2 -7 -15 +iobs/IOL0 +3 +5 FB5 MC4 STD @@ -826,15 +813,15 @@   -ram/RAMDIS1 +iobs/Once 18 -15 +19 FB5 -MC8 +MC7 STD   -39 -I/O +  +(b) (b) RESET @@ -852,6 +839,19 @@   +ram/Once +5 +10 +FB5 +MC10 +STD +  +  +(b) +(b) +RESET + + RA<3> 2 3 @@ -917,11 +917,11 @@   -ram/Once -5 -10 +ram/RASEL +19 +15 FB5 -MC16 +MC18 STD     @@ -1008,7 +1008,7 @@ RESET -ALE0M +iobm/ALE0 3 5 FB6 @@ -1125,7 +1125,7 @@   -IOACT +iobm/IOACT 7 13 FB6 @@ -1151,7 +1151,7 @@ RESET -IOBERR +iobm/IOBERR 9 13 FB6 @@ -1164,19 +1164,6 @@ RESET -ram/RAMReady -16 -15 -FB7 -MC1 -STD -  -  -(b) -(b) -RESET - - RA<1> 2 3 @@ -1190,22 +1177,9 @@   -TimeoutB -3 -12 -FB7 -MC3 -STD -  -  -(b) -(b) -RESET - - -fsb/Ready0r -3 -8 +ram/RS_FSM_FFd3 +11 +14 FB7 MC4 STD @@ -1242,9 +1216,9 @@   -ram/RS_FSM_FFd1 -5 -10 +cnt/TimeoutBPre +3 +11 FB7 MC7 STD @@ -1281,9 +1255,9 @@   -$OpTx$$OpTx$FX_DC$182_INV$783 -6 -8 +ram/RS_FSM_FFd2 +14 +14 FB7 MC10 STD @@ -1291,7 +1265,7 @@   (b) (b) -  +RESET RA<9> @@ -1320,9 +1294,9 @@   -ram/RS_FSM_FFd3 -11 -14 +cnt/TimeoutB +3 +12 FB7 MC13 STD @@ -1346,19 +1320,32 @@   -ram/RS_FSM_FFd2 -13 -14 +ram/RAMReady +15 +15 FB7 -MC17 +MC15 STD   -61 +60 I/O I RESET +ram/RAMDIS1 +17 +15 +FB7 +MC18 +STD +  +  +(b) +(b) +RESET + + RA<11> 1 1 @@ -1437,7 +1424,7 @@   -IOREQ +iobs/IOREQ 15 20 FB8 @@ -1463,9 +1450,9 @@   -iobs/Once -18 -19 +iobs/IORW1 +17 +20 FB8 MC14 STD @@ -1489,8 +1476,8 @@ SET -fsb/BERR0r -3 +iobs/BERR +4 8 FB8 MC16 @@ -1502,7 +1489,7 @@ RESET -IORW0 +iobs/IORW0 19 21 FB8 diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_02.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm similarity index 93% rename from cpld/XC95144XL/MXSE_html/fit/maplogic_02.htm rename to cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm index d437b2f..0e33a34 100644 --- a/cpld/XC95144XL/MXSE_html/fit/maplogic_02.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm @@ -20,20 +20,7 @@ Reg Init State -iobs/IOACTr -1 -1 -FB2 -MC6 -STD -  -2 -I/O/GTS4 -I -RESET - - -iobm/VPArf +iobm/VPArr 1 1 FB2 @@ -46,7 +33,7 @@ RESET -iobm/IOREQr +iobm/VPArf 1 1 FB2 @@ -59,7 +46,7 @@ RESET -iobm/Er +iobm/Er2 1 1 FB2 @@ -72,7 +59,7 @@ RESET -iobm/DTACKrr +iobm/Er 1 1 FB2 @@ -85,7 +72,7 @@ RESET -iobm/BGr1 +iobm/DTACKrf 1 1 FB2 @@ -98,7 +85,7 @@ RESET -iobm/BGr0 +iobm/BGr1 1 1 FB2 @@ -111,7 +98,7 @@ RESET -iobm/BERRrf +iobm/BERRrr 1 1 FB2 @@ -124,9 +111,9 @@ RESET -iobm/RESrr -1 +ram/BACTr 1 +2 FB1 MC2 STD @@ -137,7 +124,7 @@ RESET -iobm/RESrf +iobm/RESrr 1 1 FB1 @@ -150,9 +137,9 @@ RESET -cnt/RefCnt<2> +iobm/BERRrf +1 1 -2 FB1 MC5 STD @@ -163,7 +150,7 @@ RESET -cnt/RefCnt<1> +fsb/ASrf 1 1 FB1 @@ -228,8 +215,8 @@ RESET -$OpTx$FX_DC$708 -1 +iobs/IOU1 +2 2 FB1 MC14 @@ -238,10 +225,10 @@ 19 I/O I -  +RESET -iobs/IOU1 +iobs/IOL1 2 2 FB1 @@ -254,9 +241,9 @@ RESET -iobm/IOS_FSM_FFd1 +fsb/BERR1r 2 -3 +4 FB1 MC17 STD @@ -267,22 +254,9 @@ RESET -fsb/Ready2r -9 -22 -FB3 -MC5 -STD -  -24 -I/O -I -RESET - - nDTACK_FSB -23 -32 +28 +34 FB3 MC9 STD @@ -293,9 +267,22 @@ RESET -fsb/VPA -22 -31 +fsb/BERR0r +3 +8 +FB3 +MC12 +STD +  +30 +I/O +I +RESET + + +fsb/Ready1r +8 +18 FB3 MC15 STD @@ -358,19 +345,6 @@   -ram/RAMDIS1 -18 -15 -FB5 -MC8 -STD -  -39 -I/O -(b) -RESET - - RA<4> 2 3 @@ -540,14 +514,14 @@   -ram/RS_FSM_FFd2 -13 -14 +ram/RAMReady +15 +15 FB7 -MC17 +MC15 STD   -61 +60 I/O I RESET @@ -605,7 +579,7 @@   -IOREQ +iobs/IOREQ 15 20 FB8 @@ -631,9 +605,9 @@   -iobs/Once -18 -19 +iobs/IORW1 +17 +20 FB8 MC14 STD @@ -826,9 +800,9 @@   -iobs/PS_FSM_FFd1 -2 -3 +cnt/RefCnt<5> +1 +5 FB4 MC8 STD @@ -839,8 +813,8 @@ RESET -fsb/BERR1r -2 +cnt/RefCnt<4> +1 4 FB4 MC9 @@ -865,9 +839,9 @@   -cnt/RefDone +cnt/RefCnt<2> +1 2 -10 FB4 MC12 STD @@ -878,9 +852,9 @@ RESET -cnt/TimeoutBPre -3 -11 +cnt/RefDone +2 +10 FB4 MC14 STD @@ -891,9 +865,9 @@ RESET -TimeoutA +iobs/IOU0 3 -10 +5 FB4 MC15 STD @@ -917,7 +891,7 @@ RESET -ram/BACTr +ram/RefRAS 1 2 FB1 @@ -933,7 +907,7 @@ RESET -fsb/ASrf +iobm/RESrf 1 1 FB1 @@ -949,9 +923,9 @@ RESET -RefAck +cnt/RefCnt<1> +1 1 -2 FB1 MC7 STD @@ -959,7 +933,7 @@   (b) (b) -D +T     RESET @@ -981,7 +955,7 @@ RESET -ALE0S +$OpTx$FX_DC$591 1 2 FB1 @@ -991,15 +965,15 @@   (b) (b) -D     -RESET +  +  -iobs/IOL1 -2 +iobm/IOS_FSM_FFd1 2 +3 FB1 MC16 STD @@ -1013,9 +987,9 @@ RESET -IOU0 +cs/nOverlay1 +2 3 -5 FB1 MC18 STD @@ -1029,7 +1003,7 @@ RESET -iobm/VPArr +iobs/IOACTr 1 1 FB2 @@ -1045,7 +1019,7 @@ RESET -iobm/Er2 +iobm/IOREQr 1 1 FB2 @@ -1061,7 +1035,7 @@ RESET -iobm/DTACKrf +iobm/DTACKrr 1 1 FB2 @@ -1077,7 +1051,7 @@ RESET -iobm/BERRrr +iobm/BGr0 1 1 FB2 @@ -1109,9 +1083,9 @@ RESET -fsb/Ready1r -8 -18 +fsb/VPA +27 +33 FB3 MC1 STD @@ -1125,11 +1099,27 @@ RESET -iobs/IORW1 -17 -20 +fsb/Ready0r +3 +8 FB3 -MC3 +MC4 +STD +  +  +(b) +(b) +D +  +  +RESET + + +cs/nOverlay0 +3 +8 +FB3 +MC13 STD     @@ -1141,11 +1131,11 @@ RESET -iobs/Clear1 -1 -3 +fsb/Ready2r +9 +22 FB3 -MC18 +MC16 STD     @@ -1157,43 +1147,59 @@ RESET +iobs/Clear1 +1 +3 +FB4 +MC1 +STD +  +  +(b) +(b) +D +  +  +RESET + + +iobs/ALE0 +1 +2 +FB4 +MC3 +STD +  +  +(b) +(b) +D +  +  +RESET + + +cnt/RefCnt<7> +1 +7 +FB4 +MC4 +STD +  +  +(b) +(b) +T +  +  +RESET + + cnt/RefCnt<6> 1 6 FB4 -MC1 -STD -  -  -(b) -(b) -T -  -  -RESET - - -cnt/RefCnt<5> -1 -5 -FB4 -MC3 -STD -  -  -(b) -(b) -T -  -  -RESET - - -cnt/RefCnt<4> -1 -4 -FB4 -MC4 +MC7 STD     @@ -1209,7 +1215,7 @@ 1 3 FB4 -MC7 +MC10 STD     @@ -1221,41 +1227,25 @@ RESET -cs/nOverlay1 +iobs/PS_FSM_FFd1 2 3 FB4 -MC10 -STD -  -  -(b) -(b) -D -  -  -RESET - - -cs/nOverlay0 -3 -8 -FB4 MC13 STD     (b) (b) -T +D     RESET -IOL0 +cnt/TimeoutA 3 -5 +10 FB4 MC16 STD @@ -1263,15 +1253,15 @@   (b) (b) -D +T     RESET -BERR_IOBS -4 +ram/RS_FSM_FFd1 8 +14 FB4 MC18 STD @@ -1279,31 +1269,15 @@   (b) (b) -T -  -  -RESET - - -ram/RASEL -20 -15 -FB5 -MC1 -STD -  -  -(b) -(b) D     RESET -cnt/RefCnt<7> -1 +ram/RAMDIS2 7 +15 FB5 MC3 STD @@ -1317,9 +1291,9 @@ RESET -ram/RAMDIS2 -7 -15 +iobs/IOL0 +3 +5 FB5 MC4 STD @@ -1327,6 +1301,38 @@   (b) (b) +D +  +  +RESET + + +iobs/Once +18 +19 +FB5 +MC7 +STD +  +  +(b) +(b) +D +  +  +RESET + + +ram/Once +5 +10 +FB5 +MC10 +STD +  +  +(b) +(b) T     @@ -1349,17 +1355,17 @@ RESET -ram/Once -5 -10 +ram/RASEL +19 +15 FB5 -MC16 +MC18 STD     (b) (b) -T +D     RESET @@ -1413,7 +1419,7 @@ RESET -ALE0M +iobm/ALE0 3 5 FB6 @@ -1461,7 +1467,7 @@ RESET -IOACT +iobm/IOACT 7 13 FB6 @@ -1477,7 +1483,7 @@ RESET -IOBERR +iobm/IOBERR 9 13 FB6 @@ -1493,41 +1499,9 @@ RESET -ram/RAMReady -16 -15 -FB7 -MC1 -STD -  -  -(b) -(b) -D -  -  -RESET - - -TimeoutB -3 -12 -FB7 -MC3 -STD -  -  -(b) -(b) -T -  -  -RESET - - -fsb/Ready0r -3 -8 +ram/RS_FSM_FFd3 +11 +14 FB7 MC4 STD @@ -1541,9 +1515,9 @@ RESET -ram/RS_FSM_FFd1 -5 -10 +cnt/TimeoutBPre +3 +11 FB7 MC7 STD @@ -1557,9 +1531,9 @@ RESET -$OpTx$$OpTx$FX_DC$182_INV$783 -6 -8 +ram/RS_FSM_FFd2 +14 +14 FB7 MC10 STD @@ -1567,15 +1541,15 @@   (b) (b) +D     -  -  +RESET -ram/RS_FSM_FFd3 -11 -14 +cnt/TimeoutB +3 +12 FB7 MC13 STD @@ -1589,6 +1563,22 @@ RESET +ram/RAMDIS1 +17 +15 +FB7 +MC18 +STD +  +  +(b) +(b) +D +  +  +RESET + + iobs/PS_FSM_FFd2 15 20 @@ -1621,8 +1611,8 @@ RESET -fsb/BERR0r -3 +iobs/BERR +4 8 FB8 MC16 @@ -1631,13 +1621,13 @@   (b) (b) -D +T     RESET -IORW0 +iobs/IORW0 19 21 FB8 diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogicdoc.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogicdoc.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/maplogicdoc.htm rename to cpld/XC95144XL/WarpSE_html/fit/maplogicdoc.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/newappletref.htm b/cpld/XC95144XL/WarpSE_html/fit/newappletref.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/newappletref.htm rename to cpld/XC95144XL/WarpSE_html/fit/newappletref.htm diff --git a/cpld/XC95144XL/WarpSE_html/fit/next.jpg b/cpld/XC95144XL/WarpSE_html/fit/next.jpg new file mode 100644 index 0000000000000000000000000000000000000000..b8bbb999ee5f7042c9dcbad4dacf3659aa2ee7a8 GIT binary patch literal 1079 zcmex=9X@jO*zpr5PhGlvPb?HxGHT=yahkYr<3UbkKb$@|Xn~>>0k;H_C~9n78`F`QPzJCPur8PO(e59<=M&#AB!andt81j&-><& zq0R)8)>*%}S1eCIc5p`YX|0I4_YHq$Fz?;;;rYSt*U{0tb<-VpZr`&@tnAX^l};~h z4@wFuvh)0Bc+*$ATG}JO(dzgS4jcZ(uV&>fUG1N$daHKQE6pTDX*Pvd9!8IgE0a~U zjAeMzr9*y*KC+EJcQ} z_Q%h2XUvoA_V4%D9AWcJ^)|EmddV+~w(ZY~|Jm}-{  Pterm Limit (1-90) - 25 + 50 diff --git a/cpld/XC95144XL/MXSE_html/fit/optionsdoc.htm b/cpld/XC95144XL/WarpSE_html/fit/optionsdoc.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/optionsdoc.htm rename to cpld/XC95144XL/WarpSE_html/fit/optionsdoc.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/paths.js b/cpld/XC95144XL/WarpSE_html/fit/paths.js similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/paths.js rename to cpld/XC95144XL/WarpSE_html/fit/paths.js diff --git a/cpld/XC95144XL/MXSE_html/fit/pin.gif b/cpld/XC95144XL/WarpSE_html/fit/pin.gif similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/pin.gif rename to cpld/XC95144XL/WarpSE_html/fit/pin.gif diff --git a/cpld/XC95144XL/WarpSE_html/fit/pin_legXC95.htm b/cpld/XC95144XL/WarpSE_html/fit/pin_legXC95.htm new file mode 100644 index 0000000..db88bcb --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/pin_legXC95.htm @@ -0,0 +1,13 @@ +
+Legend :  NC  = Not Connected, unbonded pin
+         PGND = Unused I/O configured as additional Ground pin
+         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
+         VCC  = Dedicated Power Pin
+         GND  = Dedicated Ground Pin
+         TDI  = Test Data In, JTAG pin
+         TDO  = Test Data Out, JTAG pin
+         TCK  = Test Clock, JTAG pin
+         TMS  = Test Mode Select, JTAG pin
+         PE   = Port Enable pin
+  PROHIBITED  = User reserved pin
+
diff --git a/cpld/XC95144XL/WarpSE_html/fit/pin_legXbr.htm b/cpld/XC95144XL/WarpSE_html/fit/pin_legXbr.htm new file mode 100644 index 0000000..00a6d2c --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/pin_legXbr.htm @@ -0,0 +1,21 @@ +
+Legend :  NC  = Not Connected, unbonded pin
+        PGND  = Unused I/O configured as additional Ground pin
+         KPR  = Unused I/O with weak keeper (leave unconnected)
+         WPU  = Unused I/O with weak pull up (leave unconnected)
+         WPD  = Unused I/O with weak pull down (leave unconnected)
+         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
+         VCC  = Dedicated Power Pin
+      VCCAUX  = Power supply for JTAG pins
+   VCCIO-3.3  = I/O supply voltage for LVTTL, LVCMOS33, SSTL3_I
+   VCCIO-2.5  = I/O supply voltage for LVCMOS25, SSTL2_I
+   VCCIO-1.8  = I/O supply voltage for LVCMOS18
+   VCCIO-1.5  = I/O supply voltage for LVCMOS15, HSTL_I
+        VREF  = Reference voltage for indicated input standard
+         GND  = Dedicated Ground Pin
+         TDI  = Test Data In, JTAG pin
+         TDO  = Test Data Out, JTAG pin
+         TCK  = Test Clock, JTAG pin
+         TMS  = Test Mode Select, JTAG pin
+  PROHIBITED  = User reserved pin
+
diff --git a/cpld/XC95144XL/WarpSE_html/fit/pin_legXpla3.htm b/cpld/XC95144XL/WarpSE_html/fit/pin_legXpla3.htm new file mode 100644 index 0000000..8dad55d --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/pin_legXpla3.htm @@ -0,0 +1,13 @@ +
+Legend :  NC  = Not Connected, unbonded pin
+          PE  = Port Enable pin
+         WPU  = Unused with Internal Weak Pull Up
+         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
+         VCC  = Dedicated Power Pin
+         GND  = Dedicated Ground Pin
+         TDI  = Test Data In, JTAG pin
+         TDO  = Test Data Out, JTAG pin
+         TCK  = Test Clock, JTAG pin
+         TMS  = Test Mode Select, JTAG pin
+  PROHIBITED  = User reserved pin
+
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 Design Name  MXSE WarpSE
 Fitting Status @@ -30,7 +30,7 @@
 Date   3-27-2022, 10:08AM  3-28-2022, 9:46AM

RESOURCES SUMMARY
@@ -42,11 +42,11 @@ - - + + - +
Function Block Inputs Used
115/144  (80%)458/720  (64%)114/144  (80%)463/720  (65%) 89/144  (62%) 74/81  (92%)258/432  (60%)253/432  (59%)

PIN RESOURCES
@@ -133,7 +133,7 @@
- + @@ -141,7 +141,7 @@ - +
 Macrocells in high performance mode (MCHP) 115 114
 Macrocells in low power mode (MCLP)
 Total macrocells used (MC) 115 114
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+                           Performance Summary Report
+                           --------------------------
+
+Design:     WarpSE
+Device:     XC95144XL-10-TQ100
+Speed File: Version 3.0
+Program:    Timing Report Generator:  version P.20131013
+Date:       Mon Mar 28 09:28:06 2022
+
+Timing Constraint Summary:
+
+TS_CLK_IOB=PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS                            N/A
+TS_CLK_FSB=PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS                             Met
+TS_CLK2X_IOB=PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS                         Met
+
+Performance Summary:
+
+Pad to Pad (tPD)                          :         11.0ns (1 macrocell levels)
+Pad 'A_FSB<11>' to Pad 'RA<1>'                                    
+
+Clock net 'CLK_IOB' path delays:
+
+Setup to Clock at the Pad (tSU)           :          6.5ns (0 macrocell levels)
+Data signal 'E_IOB' to DFF D input Pin at 'iobm/Er.D'
+Clock pad 'CLK_IOB'                                                       (GCK)
+
+                          Minimum Clock Period: 9.0ns
+                     Maximum Internal Clock Speed: 111.1Mhz
+                         (Limited by Clock Pulse Width)
+
+Clock net 'CLK_FSB' path delays:
+
+Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
+Clock Pad 'CLK_FSB' to Output Pad 'RA<1>'                                 (GCK)
+
+Clock to Setup (tCYC)                     :         20.1ns (2 macrocell levels)
+Clock to Q, net 'cs/nOverlay1.Q' to DFF Setup(D) at 'fsb/VPA.D'           (GCK)
+Target FF drives output net 'fsb/VPA'
+
+Setup to Clock at the Pad (tSU)           :         16.6ns (1 macrocell levels)
+Data signal 'A_FSB<23>' to DFF D input Pin at 'fsb/VPA.D'
+Clock pad 'CLK_FSB'                                                       (GCK)
+
+                          Minimum Clock Period: 20.1ns
+                     Maximum Internal Clock Speed: 49.7Mhz
+                            (Limited by Cycle Time)
+
+Clock net 'CLK2X_IOB' path delays:
+
+Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
+Clock Pad 'CLK2X_IOB' to Output Pad 'nVMA_IOB'                            (GCK)
+
+Clock to Setup (tCYC)                     :         11.0ns (1 macrocell levels)
+Clock to Q, net 'iobm/IOS_FSM_FFd3.Q' to DFF Setup(D) at 'IOACT.D'        (GCK)
+Target FF drives output net 'IOACT'
+
+Setup to Clock at the Pad (tSU)           :          7.5ns (0 macrocell levels)
+Data signal 'CLK_IOB' to DFF D input Pin at 'IOACT.D'
+Clock pad 'CLK2X_IOB'                                                     (GCK)
+
+                          Minimum Clock Period: 11.0ns
+                     Maximum Internal Clock Speed: 90.9Mhz
+                            (Limited by Cycle Time)
+
+--------------------------------------------------------------------------------
+                            Pad to Pad (tPD) (nsec)
+
+\ From        A     A     A     A     A     A     A     A     A     A     A
+ \            _     _     _     _     _     _     _     _     _     _     _
+  \           F     F     F     F     F     F     F     F     F     F     F
+   \          S     S     S     S     S     S     S     S     S     S     S
+    \         B     B     B     B     B     B     B     B     B     B     B
+     \        <     <     <     <     <     <     <     <     <     <     <
+      \       1     1     1     1     1     1     1     1     1     1     1
+       \      0     1     2     3     4     5     6     7     8     9     >
+        \     >     >     >     >     >     >     >     >     >     >      
+  To     \------------------------------------------------------------------
+
+CLK20EN                                                                    
+CLK25EN                                                                    
+RA<0>      10.0                                                        10.0
+RA<10>                                                                     
+RA<11>                                                           10.0      
+RA<1>            11.0                                                      
+RA<2>                  11.0                                                
+RA<3>                        10.0                                          
+RA<4>                              11.0                                    
+RA<5>                                    11.0                              
+RA<6>                                          10.0                        
+RA<7>                                                10.0                  
+RA<8>                                                      10.0            
+RA<9>                                                            10.0      
+nBERR_FSB                                                                  
+nDinOE                                                                     
+nOE                                                                        
+nRAMLWE                                                                    
+nRAMUWE                                                                    
+nRAS                                                                       
+nROMCS                                                                     
+nROMWE                                                                     
+nVPA_FSB                                                                   
+
+--------------------------------------------------------------------------------
+                            Pad to Pad (tPD) (nsec)
+
+\ From        A     A     A     A     A     A     A     A     A     A     A
+ \            _     _     _     _     _     _     _     _     _     _     _
+  \           F     F     F     F     F     F     F     F     F     F     F
+   \          S     S     S     S     S     S     S     S     S     S     S
+    \         B     B     B     B     B     B     B     B     B     B     B
+     \        <     <     <     <     <     <     <     <     <     <     <
+      \       2     2     2     2     2     3     4     5     6     7     8
+       \      0     1     2     3     >     >     >     >     >     >     >
+        \     >     >     >     >                                          
+  To     \------------------------------------------------------------------
+
+CLK20EN                                                                    
+CLK25EN                                                                    
+RA<0>                                                                      
+RA<10>           10.0                                                      
+RA<11>                                                                     
+RA<1>                              11.0                                    
+RA<2>                                    11.0                              
+RA<3>                                          10.0                        
+RA<4>                                                11.0                  
+RA<5>                                                      11.0            
+RA<6>                                                            10.0      
+RA<7>                                                                  10.0
+RA<8>            11.0  11.0  11.0                                          
+RA<9>      10.0                                                            
+nBERR_FSB  11.0  11.0  11.0  11.0                                          
+nDinOE     10.0  10.0  10.0  10.0                                          
+nOE                                                                        
+nRAMLWE                                                                    
+nRAMUWE                                                                    
+nRAS             11.0  11.0  11.0                                          
+nROMCS     11.0  11.0  11.0  11.0                                          
+nROMWE                                                                     
+nVPA_FSB                                                                   
+
+--------------------------------------------------------------------------------
+                            Pad to Pad (tPD) (nsec)
+
+\ From        A     S     S     n     n     n     n
+ \            _     W     W     A     L     U     W
+  \           F     <     <     S     D     D     E
+   \          S     0     1     _     S     S     _
+    \         B     >     >     F     _     _     F
+     \        <                 S     F     F     S
+      \       9                 B     S     S     B
+       \      >                       B     B      
+        \                                          
+  To     \------------------------------------------
+
+CLK20EN          10.0                              
+CLK25EN          10.0                              
+RA<0>                                              
+RA<10>                                             
+RA<11>                                             
+RA<1>                                              
+RA<2>                                              
+RA<3>                                              
+RA<4>                                              
+RA<5>                                              
+RA<6>                                              
+RA<7>                                              
+RA<8>      11.0                                    
+RA<9>                                              
+nBERR_FSB                    10.0                  
+nDinOE                 10.0  10.0              10.0
+nOE                          10.0              10.0
+nRAMLWE                      10.0  10.0        10.0
+nRAMUWE                      11.0        11.0  11.0
+nRAS                         11.0                  
+nROMCS                 11.0                        
+nROMWE                       10.0              10.0
+nVPA_FSB                     10.0                  
+
+--------------------------------------------------------------------------------
+                      Clock Pad to Output Pad (tCO) (nsec)
+
+\ From         C     C
+ \             L     L
+  \            K     K
+   \           2     _
+    \          X     F
+     \         _     S
+      \        I     B
+       \       O      
+        \      B      
+         \            
+  To      \------------
+
+RA<0>             13.5
+RA<1>             14.5
+RA<2>             14.5
+RA<3>             13.5
+RA<4>             14.5
+RA<5>             14.5
+RA<6>             13.5
+RA<7>             13.5
+RA<8>             14.5
+RA<9>             13.5
+nADoutLE0   13.5  13.5
+nADoutLE1          5.8
+nAS_IOB     14.5      
+nAoutOE      5.8      
+nBERR_FSB         14.5
+nBR_IOB            5.8
+nCAS               5.8
+nDTACK_FSB         5.8
+nDinLE       5.8      
+nDoutOE      5.8      
+nLDS_IOB    14.5      
+nRAMLWE           13.5
+nRAMUWE           14.5
+nRAS              14.5
+nROMCS            14.5
+nUDS_IOB    14.5      
+nVMA_IOB    14.5      
+nVPA_FSB          13.5
+
+--------------------------------------------------------------------------------
+                   Setup to Clock at Pad (tSU or tSUF) (nsec)
+
+\ From         C     C     C
+ \             L     L     L
+  \            K     K     K
+   \           2     _     _
+    \          X     F     I
+     \         _     S     O
+      \        I     B     B
+       \       O            
+        \      B            
+         \                  
+  To      \------------------
+
+A_FSB<10>          7.9      
+A_FSB<11>          7.9      
+A_FSB<12>          7.9      
+A_FSB<13>          7.9      
+A_FSB<14>          7.9      
+A_FSB<15>          7.9      
+A_FSB<16>          7.9      
+A_FSB<17>          7.9      
+A_FSB<18>          7.9      
+A_FSB<19>          7.9      
+A_FSB<20>         15.6      
+A_FSB<21>         16.6      
+A_FSB<22>         16.6      
+A_FSB<23>         16.6      
+A_FSB<8>           7.9      
+A_FSB<9>           7.9      
+CLK_IOB      7.5            
+E_IOB                    6.5
+SW<1>              7.9      
+nAS_FSB           15.6      
+nBERR_IOB    7.5            
+nBG_IOB      6.5            
+nDTACK_IOB   6.5            
+nIPL2              6.5      
+nLDS_FSB           6.5      
+nRES         6.5   6.5      
+nUDS_FSB           6.5      
+nVPA_IOB     6.5            
+nWE_FSB            7.9      
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                                (Clock: CLK_FSB)
+
+\ From                 B     I     I     I     R     R     R     R     R     T
+ \                     E     O     P     P     E     E     E     E     e     i
+  \                    R     R     L     L     S     S     S     S     f     m
+   \                   R     W     2     2     D     r     r     r     A     e
+    \                  _     0     r     r     o     0     1     2     c     o
+     \                 I     .     0     1     n     .     .     .     k     u
+      \                O     Q     .     .     e     Q     Q     Q     .     t
+       \               B           Q     Q     .                       Q     A
+        \              S                       Q                             .
+         \             .                                                     Q
+          \            Q                                                      
+           \                                                                  
+            \                                                                 
+             \                                                                
+              \                                                               
+               \                                                              
+                \                                                             
+                 \                                                            
+  To              \------------------------------------------------------------
+
+ALE0S.D                                                                       
+BERR_IOBS.D         10.0                                                      
+IOL0.CE                                                                       
+IOL0.D                                                                        
+IOREQ.D                                                                       
+IORW0.D                   11.4                                                
+IOU0.CE                                                                       
+IOU0.D                                                                        
+IPL2r1.D                        10.0                                          
+RESDone.CE                                        10.0  10.0  10.0            
+RESr1.D                                           10.0                        
+RESr2.D                                                 10.0                  
+RefAck.D                                                                      
+TimeoutA.D                                                                10.0
+TimeoutB.D                                                                    
+cnt/RefCnt<1>.D                                                               
+cnt/RefCnt<2>.D                                                               
+cnt/RefCnt<3>.D                                                               
+cnt/RefCnt<4>.D                                                               
+cnt/RefCnt<5>.D                                                               
+cnt/RefCnt<6>.D                                                               
+cnt/RefCnt<7>.D                                                               
+cnt/RefDone.D                                                       10.0      
+cnt/TimeoutBPre.D                                                             
+cs/nOverlay0.D                                                                
+cs/nOverlay1.CE                                                               
+cs/nOverlay1.D                                                                
+fsb/BERR0r.D                                                                  
+fsb/BERR1r.D        10.0                                                      
+fsb/Ready0r.D                                                                 
+fsb/Ready1r.D                                                                 
+fsb/Ready2r.D                                                             11.0
+fsb/VPA.D           11.4                                                  11.4
+iobs/Clear1.D                                                                 
+iobs/IOL1.CE                                                                  
+iobs/IORW1.D                                                                  
+iobs/IOReady.D                                                                
+iobs/IOU1.CE                                                                  
+iobs/Load1.D                                                                  
+iobs/Once.D                                                                   
+iobs/PS_FSM_FFd1.D                                                            
+iobs/PS_FSM_FFd2.D                                                            
+nADoutLE1.D                                                                   
+nBR_IOB.CE                      10.0  10.0  10.0  10.0  10.0  10.0            
+nCAS.D                                                                        
+nDTACK_FSB.D        11.4                                                  11.4
+ram/BACTr.D                                                                   
+ram/Once.D                                                                    
+ram/RAMDIS1.D                                                                 
+ram/RAMDIS2.D                                                                 
+ram/RAMReady.D                                                                
+ram/RASEL.D                                                                   
+ram/RS_FSM_FFd1.D                                                             
+ram/RS_FSM_FFd2.D                                                             
+ram/RS_FSM_FFd3.D                                                             
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                                (Clock: CLK_FSB)
+
+\ From                 T     c     c     c     c     c     c     c     c     c
+ \                     i     n     n     n     n     n     n     n     n     n
+  \                    m     t     t     t     t     t     t     t     t     t
+   \                   e     /     /     /     /     /     /     /     /     /
+    \                  o     R     R     R     R     R     R     R     R     R
+     \                 u     e     e     e     e     e     e     e     e     e
+      \                t     f     f     f     f     f     f     f     f     f
+       \               B     C     C     C     C     C     C     C     C     D
+        \              .     n     n     n     n     n     n     n     n     o
+         \             Q     t     t     t     t     t     t     t     t     n
+          \                  <     <     <     <     <     <     <     <     e
+           \                 0     1     2     3     4     5     6     7     .
+            \                >     >     >     >     >     >     >     >     Q
+             \               .     .     .     .     .     .     .     .      
+              \              Q     Q     Q     Q     Q     Q     Q     Q      
+               \                                                              
+                \                                                             
+                 \                                                            
+  To              \------------------------------------------------------------
+
+ALE0S.D                                                                       
+BERR_IOBS.D                                                                   
+IOL0.CE                                                                       
+IOL0.D                                                                        
+IOREQ.D                                                                       
+IORW0.D                                                                       
+IOU0.CE                                                                       
+IOU0.D                                                                        
+IPL2r1.D                                                                      
+RESDone.CE                                                                    
+RESr1.D                                                                       
+RESr2.D                                                                       
+RefAck.D                                                                      
+TimeoutA.D                10.0  10.0  10.0  10.0  10.0  10.0  10.0            
+TimeoutB.D          10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
+cnt/RefCnt<1>.D           10.0                                                
+cnt/RefCnt<2>.D           10.0  10.0                                          
+cnt/RefCnt<3>.D           10.0  10.0  10.0                                    
+cnt/RefCnt<4>.D           10.0  10.0  10.0  10.0                              
+cnt/RefCnt<5>.D           10.0  10.0  10.0  10.0  10.0                        
+cnt/RefCnt<6>.D           10.0  10.0  10.0  10.0  10.0  10.0                  
+cnt/RefCnt<7>.D           10.0  10.0  10.0  10.0  10.0  10.0  10.0            
+cnt/RefDone.D             10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0
+cnt/TimeoutBPre.D         10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
+cs/nOverlay0.D                                                                
+cs/nOverlay1.CE                                                               
+cs/nOverlay1.D                                                                
+fsb/BERR0r.D        10.0                                                      
+fsb/BERR1r.D                                                                  
+fsb/Ready0r.D                                                                 
+fsb/Ready1r.D                                                                 
+fsb/Ready2r.D                                                                 
+fsb/VPA.D           19.1                                                      
+iobs/Clear1.D                                                                 
+iobs/IOL1.CE                                                                  
+iobs/IORW1.D                                                                  
+iobs/IOReady.D                                                                
+iobs/IOU1.CE                                                                  
+iobs/Load1.D                                                                  
+iobs/Once.D                                                                   
+iobs/PS_FSM_FFd1.D                                                            
+iobs/PS_FSM_FFd2.D                                                            
+nADoutLE1.D                                                                   
+nBR_IOB.CE                                                                    
+nCAS.D                                                                        
+nDTACK_FSB.D        19.1                                                      
+ram/BACTr.D                                                                   
+ram/Once.D                                                                    
+ram/RAMDIS1.D                                           11.4  11.4  11.4  11.4
+ram/RAMDIS2.D                                           11.0  11.0  11.0  11.0
+ram/RAMReady.D                                          11.4  11.4  11.4  11.4
+ram/RASEL.D                                             11.4  11.4  11.4  11.4
+ram/RS_FSM_FFd1.D                                                             
+ram/RS_FSM_FFd2.D                                       11.4  11.4  11.4  11.4
+ram/RS_FSM_FFd3.D                                       11.0  11.0  11.0  11.0
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                                (Clock: CLK_FSB)
+
+\ From                 c     c     c     f     f     f     f     f     f     f
+ \                     n     s     s     s     s     s     s     s     s     s
+  \                    t     /     /     b     b     b     b     b     b     b
+   \                   /     n     n     /     /     /     /     /     /     /
+    \                  T     O     O     A     B     B     R     R     R     V
+     \                 i     v     v     S     E     E     e     e     e     P
+      \                m     e     e     r     R     R     a     a     a     A
+       \               e     r     r     f     R     R     d     d     d     .
+        \              o     l     l     .     0     1     y     y     y     Q
+         \             u     a     a     Q     r     r     0     1     2      
+          \            t     y     y           .     .     r     r     r      
+           \           B     0     1           Q     Q     .     .     .      
+            \          P     .     .                       Q     Q     Q      
+             \         r     Q     Q                                          
+              \        e                                                      
+               \       .                                                      
+                \      Q                                                      
+                 \                                                            
+  To              \------------------------------------------------------------
+
+ALE0S.D                                                                       
+BERR_IOBS.D                           10.0                                    
+IOL0.CE                                                                       
+IOL0.D                                                                        
+IOREQ.D                         11.0  10.0                                    
+IORW0.D                         10.0  11.0                                    
+IOU0.CE                                                                       
+IOU0.D                                                                        
+IPL2r1.D                                                                      
+RESDone.CE                                                                    
+RESr1.D                                                                       
+RESr2.D                                                                       
+RefAck.D                                                                      
+TimeoutA.D                            10.0                                    
+TimeoutB.D          10.0              10.0                                    
+cnt/RefCnt<1>.D                                                               
+cnt/RefCnt<2>.D                                                               
+cnt/RefCnt<3>.D                                                               
+cnt/RefCnt<4>.D                                                               
+cnt/RefCnt<5>.D                                                               
+cnt/RefCnt<6>.D                                                               
+cnt/RefCnt<7>.D                                                               
+cnt/RefDone.D                                                                 
+cnt/TimeoutBPre.D   10.0              10.0                                    
+cs/nOverlay0.D            10.0        10.0                                    
+cs/nOverlay1.CE                       10.0                                    
+cs/nOverlay1.D            10.0                                                
+fsb/BERR0r.D                          10.0  10.0                              
+fsb/BERR1r.D                          10.0        10.0                        
+fsb/Ready0r.D                   10.0  10.0              10.0                  
+fsb/Ready1r.D                   11.0  10.0                    11.0            
+fsb/Ready2r.D                   11.0  11.0                          11.0      
+fsb/VPA.D                       20.1  19.1  11.4  11.4  20.1  11.4  11.4  11.4
+iobs/Clear1.D                                                                 
+iobs/IOL1.CE                                                                  
+iobs/IORW1.D                    11.4  11.0                                    
+iobs/IOReady.D                        10.0                                    
+iobs/IOU1.CE                                                                  
+iobs/Load1.D                    11.0  10.0                                    
+iobs/Once.D                     11.4  10.0                                    
+iobs/PS_FSM_FFd1.D                                                            
+iobs/PS_FSM_FFd2.D              11.0  10.0                                    
+nADoutLE1.D                                                                   
+nBR_IOB.CE                                                                    
+nCAS.D                                                                        
+nDTACK_FSB.D                    20.1  11.0  11.4  11.4  20.1  11.4  11.4      
+ram/BACTr.D                           10.0                                    
+ram/Once.D                      10.0  10.0                                    
+ram/RAMDIS1.D                   11.4  11.0                                    
+ram/RAMDIS2.D                   11.0  11.0                                    
+ram/RAMReady.D                  11.0  11.0                                    
+ram/RASEL.D                     11.4  11.4                                    
+ram/RS_FSM_FFd1.D               10.0  10.0                                    
+ram/RS_FSM_FFd2.D               11.4  11.4                                    
+ram/RS_FSM_FFd3.D               11.0  11.0                                    
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                                (Clock: CLK_FSB)
+
+\ From                 i     i     i     i     i     i     i     i     i     i
+ \                     o     o     o     o     o     o     o     o     o     o
+  \                    b     b     b     b     b     b     b     b     b     b
+   \                   s     s     s     s     s     s     s     s     s     s
+    \                  /     /     /     /     /     /     /     /     /     /
+     \                 C     I     I     I     I     I     L     O     P     P
+      \                l     O     O     O     O     O     o     n     S     S
+       \               e     A     L     R     R     U     a     c     _     _
+        \              a     C     1     W     e     1     d     e     F     F
+         \             r     T     .     1     a     .     1     .     S     S
+          \            1     r     Q     .     d     Q     .     Q     M     M
+           \           .     .           Q     y           Q           _     _
+            \          Q     Q                 .                       F     F
+             \                                 Q                       F     F
+              \                                                        d     d
+               \                                                       1     2
+                \                                                      .     .
+                 \                                                     Q     Q
+  To              \------------------------------------------------------------
+
+ALE0S.D                                                             10.0  10.0
+BERR_IOBS.D               10.0                                10.0        10.0
+IOL0.CE                                                             10.0  10.0
+IOL0.D                          10.0                                          
+IOREQ.D                   10.0                                10.0  10.0  11.0
+IORW0.D                               11.0                    11.4  11.4  11.4
+IOU0.CE                                                             10.0  10.0
+IOU0.D                                            10.0                        
+IPL2r1.D                                                                      
+RESDone.CE                                                                    
+RESr1.D                                                                       
+RESr2.D                                                                       
+RefAck.D                                                                      
+TimeoutA.D                                                                    
+TimeoutB.D                                                                    
+cnt/RefCnt<1>.D                                                               
+cnt/RefCnt<2>.D                                                               
+cnt/RefCnt<3>.D                                                               
+cnt/RefCnt<4>.D                                                               
+cnt/RefCnt<5>.D                                                               
+cnt/RefCnt<6>.D                                                               
+cnt/RefCnt<7>.D                                                               
+cnt/RefDone.D                                                                 
+cnt/TimeoutBPre.D                                                             
+cs/nOverlay0.D                                                                
+cs/nOverlay1.CE                                                               
+cs/nOverlay1.D                                                                
+fsb/BERR0r.D                                                                  
+fsb/BERR1r.D                                                                  
+fsb/Ready0r.D                                                                 
+fsb/Ready1r.D                               11.0                              
+fsb/Ready2r.D                                                                 
+fsb/VPA.D                                   11.4                              
+iobs/Clear1.D                                                       10.0  10.0
+iobs/IOL1.CE                                            10.0                  
+iobs/IORW1.D                          10.0                    10.0  11.0  11.0
+iobs/IOReady.D            10.0              10.0              10.0        10.0
+iobs/IOU1.CE                                            10.0                  
+iobs/Load1.D                                                  10.0  10.0  10.0
+iobs/Once.D                                                   11.4  11.0  10.0
+iobs/PS_FSM_FFd1.D        10.0                                      10.0  10.0
+iobs/PS_FSM_FFd2.D        10.0                                10.0  11.0  11.0
+nADoutLE1.D         10.0                                10.0                  
+nBR_IOB.CE                                                                    
+nCAS.D                                                                        
+nDTACK_FSB.D                                11.4                              
+ram/BACTr.D                                                                   
+ram/Once.D                                                                    
+ram/RAMDIS1.D                                                                 
+ram/RAMDIS2.D                                                                 
+ram/RAMReady.D                                                                
+ram/RASEL.D                                                                   
+ram/RS_FSM_FFd1.D                                                             
+ram/RS_FSM_FFd2.D                                                             
+ram/RS_FSM_FFd3.D                                                             
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                                (Clock: CLK_FSB)
+
+\ From                 n     n     n     r     r     r     r     r     r     r
+ \                     A     B     D     a     a     a     a     a     a     a
+  \                    D     R     T     m     m     m     m     m     m     m
+   \                   o     _     A     /     /     /     /     /     /     /
+    \                  u     I     C     B     O     R     R     R     R     R
+     \                 t     O     K     A     n     A     A     A     S     S
+      \                L     B     _     C     c     M     M     S     _     _
+       \               E     .     F     T     e     D     R     E     F     F
+        \              1     Q     S     r     .     I     e     L     S     S
+         \             .           B     .     Q     S     a     .     M     M
+          \            Q           .     Q           2     d     Q     _     _
+           \                       Q                 .     y           F     F
+            \                                        Q     .           F     F
+             \                                             Q           d     d
+              \                                                        1     2
+               \                                                       .     .
+                \                                                      Q     Q
+                 \                                                            
+  To              \------------------------------------------------------------
+
+ALE0S.D                                                                       
+BERR_IOBS.D         10.0                                                      
+IOL0.CE                                                                       
+IOL0.D              10.0                                                      
+IOREQ.D             11.0                                                      
+IORW0.D             11.4                                                      
+IOU0.CE                                                                       
+IOU0.D              10.0                                                      
+IPL2r1.D                                                                      
+RESDone.CE                                                                    
+RESr1.D                                                                       
+RESr2.D                                                                       
+RefAck.D                                                            10.0  10.0
+TimeoutA.D                                                                    
+TimeoutB.D                                                                    
+cnt/RefCnt<1>.D                                                               
+cnt/RefCnt<2>.D                                                               
+cnt/RefCnt<3>.D                                                               
+cnt/RefCnt<4>.D                                                               
+cnt/RefCnt<5>.D                                                               
+cnt/RefCnt<6>.D                                                               
+cnt/RefCnt<7>.D                                                               
+cnt/RefDone.D                                                                 
+cnt/TimeoutBPre.D                                                             
+cs/nOverlay0.D                                                                
+cs/nOverlay1.CE                                                               
+cs/nOverlay1.D                                                                
+fsb/BERR0r.D                                                                  
+fsb/BERR1r.D                                                                  
+fsb/Ready0r.D                                           10.0                  
+fsb/Ready1r.D       11.0                                                      
+fsb/Ready2r.D                                                                 
+fsb/VPA.D           11.0  11.4                          20.1                  
+iobs/Clear1.D       10.0                                                      
+iobs/IOL1.CE                                                                  
+iobs/IORW1.D        10.0                                                      
+iobs/IOReady.D      10.0                                                      
+iobs/IOU1.CE                                                                  
+iobs/Load1.D        10.0                                                      
+iobs/Once.D         11.0                                                      
+iobs/PS_FSM_FFd1.D                                                            
+iobs/PS_FSM_FFd2.D  11.0                                                      
+nADoutLE1.D         10.0                                                      
+nBR_IOB.CE                                                                    
+nCAS.D                                                        10.0            
+nDTACK_FSB.D        11.0  11.4  11.4                    20.1                  
+ram/BACTr.D                                                                   
+ram/Once.D                                  10.0                    10.0  10.0
+ram/RAMDIS1.D                         11.0  11.0                    11.4  11.0
+ram/RAMDIS2.D                               11.0  11.0              11.0  11.0
+ram/RAMReady.D                        11.0  11.0                    11.0  11.0
+ram/RASEL.D                           11.0  11.4                    11.4  11.4
+ram/RS_FSM_FFd1.D                           10.0                    10.0  10.0
+ram/RS_FSM_FFd2.D                     11.0                          11.4  11.4
+ram/RS_FSM_FFd3.D                           10.0                    11.0  11.0
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                                (Clock: CLK_FSB)
+
+\ From                 r
+ \                     a
+  \                    m
+   \                   /
+    \                  R
+     \                 S
+      \                _
+       \               F
+        \              S
+         \             M
+          \            _
+           \           F
+            \          F
+             \         d
+              \        3
+               \       .
+                \      Q
+                 \      
+  To              \------
+
+ALE0S.D                 
+BERR_IOBS.D             
+IOL0.CE                 
+IOL0.D                  
+IOREQ.D                 
+IORW0.D                 
+IOU0.CE                 
+IOU0.D                  
+IPL2r1.D                
+RESDone.CE              
+RESr1.D                 
+RESr2.D                 
+RefAck.D                
+TimeoutA.D              
+TimeoutB.D              
+cnt/RefCnt<1>.D         
+cnt/RefCnt<2>.D         
+cnt/RefCnt<3>.D         
+cnt/RefCnt<4>.D         
+cnt/RefCnt<5>.D         
+cnt/RefCnt<6>.D         
+cnt/RefCnt<7>.D         
+cnt/RefDone.D           
+cnt/TimeoutBPre.D       
+cs/nOverlay0.D          
+cs/nOverlay1.CE         
+cs/nOverlay1.D          
+fsb/BERR0r.D            
+fsb/BERR1r.D            
+fsb/Ready0r.D           
+fsb/Ready1r.D           
+fsb/Ready2r.D           
+fsb/VPA.D               
+iobs/Clear1.D           
+iobs/IOL1.CE            
+iobs/IORW1.D            
+iobs/IOReady.D          
+iobs/IOU1.CE            
+iobs/Load1.D            
+iobs/Once.D             
+iobs/PS_FSM_FFd1.D      
+iobs/PS_FSM_FFd2.D      
+nADoutLE1.D             
+nBR_IOB.CE              
+nCAS.D                  
+nDTACK_FSB.D            
+ram/BACTr.D             
+ram/Once.D          10.0
+ram/RAMDIS1.D       11.0
+ram/RAMDIS2.D       11.0
+ram/RAMReady.D      11.0
+ram/RASEL.D         11.0
+ram/RS_FSM_FFd1.D   10.0
+ram/RS_FSM_FFd2.D   11.4
+ram/RS_FSM_FFd3.D   11.0
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                               (Clock: CLK2X_IOB)
+
+\ From                  I     I     i     i     i     i     i     i     i     i
+ \                      O     O     o     o     o     o     o     o     o     o
+  \                     A     B     b     b     b     b     b     b     b     b
+   \                    C     E     m     m     m     m     m     m     m     m
+    \                   T     R     /     /     /     /     /     /     /     /
+     \                  .     R     B     B     B     B     D     D     E     E
+      \                 Q     .     E     E     G     G     T     T     S     S
+       \                      Q     R     R     r     r     A     A     <     <
+        \                           R     R     0     1     C     C     0     1
+         \                          r     r     .     .     K     K     >     >
+          \                         f     r     Q     Q     r     r     .     .
+           \                        .     .                 f     r     Q     Q
+            \                       Q     Q                 .     .            
+             \                                              Q     Q            
+              \                                                                
+               \                                                               
+                \                                                              
+                 \                                                             
+                  \                                                            
+  To               \------------------------------------------------------------
+
+ALE0M.D                                                                        
+IOACT.D                          10.0  10.0              11.0  11.0            
+IOBERR.D                   11.0  11.0  11.0              11.0  11.0            
+iobm/BGr1.D                                  10.0                              
+iobm/ES<0>.D                                                         10.0  10.0
+iobm/ES<1>.D                                                         10.0  10.0
+iobm/ES<2>.D                                                         10.0  10.0
+iobm/ES<3>.D                                                         10.0  10.0
+iobm/ES<4>.D                                                         10.0  10.0
+iobm/ETACK.D                                                         10.0  10.0
+iobm/IOS_FSM_FFd1.D                                                            
+iobm/IOS_FSM_FFd2.D              10.0  10.0              10.0  10.0            
+iobm/IOS_FSM_FFd3.D                                                            
+nAS_IOB.D                                                                      
+nAoutOE.D                                    10.0  10.0                        
+nDinLE.D                                                                       
+nDoutOE.D                                                                      
+nLDS_IOB.D                                                                     
+nUDS_IOB.D                                                                     
+nVMA_IOB.D           10.0                                            10.0  10.0
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                               (Clock: CLK2X_IOB)
+
+\ From                  i     i     i     i     i     i     i     i     i     i
+ \                      o     o     o     o     o     o     o     o     o     o
+  \                     b     b     b     b     b     b     b     b     b     b
+   \                    m     m     m     m     m     m     m     m     m     m
+    \                   /     /     /     /     /     /     /     /     /     /
+     \                  E     E     E     E     E     I     I     I     I     R
+      \                 S     S     S     T     r     O     O     O     O     E
+       \                <     <     <     A     2     R     S     S     S     S
+        \               2     3     4     C     .     E     _     _     _     r
+         \              >     >     >     K     Q     Q     F     F     F     f
+          \             .     .     .     .           r     S     S     S     .
+           \            Q     Q     Q     Q           .     M     M     M     Q
+            \                                         Q     _     _     _      
+             \                                              F     F     F      
+              \                                             F     F     F      
+               \                                            d     d     d      
+                \                                           1     2     3      
+                 \                                          .     .     .      
+                  \                                         Q     Q     Q      
+  To               \------------------------------------------------------------
+
+ALE0M.D                                            10.0  10.0  10.0  10.0      
+IOACT.D                                10.0        10.0  11.0  10.0  11.0  11.0
+IOBERR.D                               10.0              11.0  11.0  11.0  11.0
+iobm/BGr1.D                                                                    
+iobm/ES<0>.D         10.0  10.0  10.0        10.0                              
+iobm/ES<1>.D                                 10.0                              
+iobm/ES<2>.D         10.0  10.0  10.0        10.0                              
+iobm/ES<3>.D         10.0  10.0              10.0                              
+iobm/ES<4>.D         10.0  10.0  10.0        10.0                              
+iobm/ETACK.D         10.0  10.0  10.0                                          
+iobm/IOS_FSM_FFd1.D                                      10.0  10.0  10.0      
+iobm/IOS_FSM_FFd2.D                    10.0              10.0  10.0  10.0  10.0
+iobm/IOS_FSM_FFd3.D                                10.0  10.0  10.0  10.0      
+nAS_IOB.D                                                10.0  10.0  10.0      
+nAoutOE.D                                                                      
+nDinLE.D                                                 10.0  10.0            
+nDoutOE.D                                                      10.0  10.0      
+nLDS_IOB.D                                               10.0  10.0  10.0      
+nUDS_IOB.D                                               10.0  10.0  10.0      
+nVMA_IOB.D           10.0  10.0  10.0                                          
+
+--------------------------------------------------------------------------------
+                          Clock to Setup (tCYC) (nsec)
+                               (Clock: CLK2X_IOB)
+
+\ From                  i     i     i     n     n     n
+ \                      o     o     o     A     A     V
+  \                     b     b     b     S     o     M
+   \                    m     m     m     _     u     A
+    \                   /     /     /     I     t     _
+     \                  R     V     V     O     O     I
+      \                 E     P     P     B     E     O
+       \                S     A     A     .     .     B
+        \               r     r     r     Q     Q     .
+         \              r     f     r                 Q
+          \             .     .     .                  
+           \            Q     Q     Q                  
+            \                                          
+             \                                         
+              \                                        
+               \                                       
+                \                                      
+                 \                                     
+                  \                                    
+  To               \------------------------------------
+
+ALE0M.D                                      10.0      
+IOACT.D              11.0                    10.0      
+IOBERR.D             11.0                              
+iobm/BGr1.D                                            
+iobm/ES<0>.D                                           
+iobm/ES<1>.D                                           
+iobm/ES<2>.D                                           
+iobm/ES<3>.D                                           
+iobm/ES<4>.D                                           
+iobm/ETACK.D                                       10.0
+iobm/IOS_FSM_FFd1.D                                    
+iobm/IOS_FSM_FFd2.D  10.0                              
+iobm/IOS_FSM_FFd3.D                          10.0      
+nAS_IOB.D                                              
+nAoutOE.D                              10.0  10.0      
+nDinLE.D                                               
+nDoutOE.D                                              
+nLDS_IOB.D                                             
+nUDS_IOB.D                                             
+nVMA_IOB.D                 10.0  10.0              10.0
+
+Path Type Definition: 
+
+Pad to Pad (tPD) -                        Reports pad to pad paths that start 
+                                          at input pads and end at output pads. 
+                                          Paths are not traced through 
+                                          registers. 
+
+Clock Pad to Output Pad (tCO) -           Reports paths that start at input 
+                                          pads trace through clock inputs of 
+                                          registers and end at output pads. 
+                                          Paths are not traced through PRE/CLR 
+                                          inputs of registers. 
+
+Setup to Clock at Pad (tSU or tSUF) -     Reports external setup time of data 
+                                          to clock at pad. Data path starts at 
+                                          an input pad and ends at register 
+                                          (Fast Input Register for tSUF) D/T 
+                                          input. Clock path starts at input pad 
+                                          and ends at the register clock input. 
+                                          Paths are not traced through 
+                                          registers. Pin-to-pin setup 
+                                          requirement is not reported or 
+                                          guaranteed for product-term clocks 
+                                          derived from macrocell feedback 
+                                          signals. 
+
+Clock to Setup (tCYC) -                   Register to register cycle time. 
+                                          Include source register tCO and 
+                                          destination register tSU. Note that 
+                                          when the computed Maximum Clock Speed 
+                                          is limited by tCYC it is computed 
+                                          assuming that all registers are 
+                                          rising-edge sensitive. 
+
+
+ diff --git a/cpld/XC95144XL/MXSE_html/fit/tooltips.js b/cpld/XC95144XL/WarpSE_html/fit/tooltips.js similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/tooltips.js rename to cpld/XC95144XL/WarpSE_html/fit/tooltips.js diff --git a/cpld/XC95144XL/MXSE_html/fit/topnav.htm b/cpld/XC95144XL/WarpSE_html/fit/topnav.htm similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/topnav.htm rename to cpld/XC95144XL/WarpSE_html/fit/topnav.htm diff --git a/cpld/XC95144XL/MXSE_html/fit/topnav.js b/cpld/XC95144XL/WarpSE_html/fit/topnav.js similarity index 100% rename from cpld/XC95144XL/MXSE_html/fit/topnav.js rename to cpld/XC95144XL/WarpSE_html/fit/topnav.js diff --git a/cpld/XC95144XL/WarpSE_html/fit/unmapinputdoc.htm b/cpld/XC95144XL/WarpSE_html/fit/unmapinputdoc.htm new file mode 100644 index 0000000..fe242d6 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/unmapinputdoc.htm @@ -0,0 +1,65 @@ + + + + + + + + + + +unmapinputdoc + + + + + + + + + + + + + + + + + + + + + + + + +

Unmapped Inputs

+ +

This page shows + input signals which were either not mapped or not + routed.

+ + + + diff --git a/cpld/XC95144XL/WarpSE_html/fit/unmaplogicdoc.htm b/cpld/XC95144XL/WarpSE_html/fit/unmaplogicdoc.htm new file mode 100644 index 0000000..6371313 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/fit/unmaplogicdoc.htm @@ -0,0 +1,68 @@ + + + + + + + + + + +unmaplogicdoc + + + + + + + + + + + + + + + + + + + + + + + + +

Unmapped Logic

+ +

This page shows those equations whose + logic was either not placed or not completely + placed in the specified device.

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Introduction

+ +

This report is the result of a static timing analysis of your design + after it has been fit in the device that you selected. The timing values + given represent the worst-case values over the recommended operating conditions + for the part.

+ +

Overview

+ +

The timing report consists of a series of sections:

+ +

Summary

+ +

This table summarizes the external timing parameters for your device, + including tPD, + tCO, + tSU, + tCYC, + and fSYSTEM. +  For a more + detailed description of the timing model for your device, please refer + to the application notes linked below.

+ +

Timing Constraints

+ +

This section reports on any timing constraints that you created for + your design. Timing constraints can be entered using the Constraints Editor + tool, or by editing an Implementation Constraints File directly. For more + information on creating timing constraints, see the Constraints Guide. +

+ +

Note that if you + did not define any constraints for your design, then the timing analysis + software will automatically create a default set of constraints for you. + These include pad-to-pad, register-to-register, pad-to-register, and period + constraints. A constraint value of 0 ns + will be used for all of these automatically generated constraints. As + a result, all paths listed under each constraint will violate the constraint, + and will have a negative value for slack.

+ +

Note also that to + limit the size of the report, each path endpoint involved in a timing + path will only be listed once, under a single constraint.  

+ +

For each timing path listed under a constraint, there is a hyperlink + that can be used to open a window listing the individual internal delay + elements traversed in the path. To understand these delay elements, consult + the Definitions section below, or the following + application notes and white papers:

+ +

XAPP375: Understanding + the CoolRunner-II + Timing Model

+ +

WP122: + Using the CoolRunner + XPLA3 Timing Model

+ +

XAPP071: Using + the XC9500 Timing Model

+ +

XAPP111: Using + the XC9500XL Timing Model

+ +

XAPP + 362: Using the XC9500XV Timing Model

+ +

available in the literature section of www.xilinx.com. +

+ +

Data Sheet Report

+ +

This section of the report lists the external timing parameters for + your design. This includes; maximum external clock speed for each clock, + setup and hold times for each registered input, clock-to-output pad timing + for each registered output, clock to setup time for each register-to-register + timing path, and pad-to-pad time for each combinatorial path through your + design.

+ +

Going Further

+ +

To do more advanced timing analysis of your design, select the process + Analyze Post-Fit Static Timing + in iSE. This + will run Xilinx's + Timing Analyzer tool interactively.  The + Timing Analyzer provides a powerful, flexible, and easy way to perform + static timing analysis on FPGA + and CPLD designs. + With Timing Analyzer, analysis can be performed immediately after mapping, + placing or routing an FPGA + design, and after fitting and routing a CPLD + design.

+ +

Timing Analyzer verifies that the delay along a given path or paths + meets specified timing requirements. It organizes and displays data that + allows you to analyze critical paths in a circuit, the cycle time of the + circuit, the delay along any specified path(s), + and the path with the greatest delay. It also provides a quick analysis + of the effect different speed grades have on the same design.  

+ +

Timing Analyzer performs setup and hold checks (skew analysis). It works + with synchronous systems composed of synchronous elements and combinatorial + logic. In synchronous design, Timing Analyzer takes into account all path + delays, including clock-to-out and setup requirements, while calculating + the worst-case timing of the design.

+ +

Timing Analyzer creates timing analysis reports based on existing timing + constraints or user specified paths within the program. Timing reports + have a hierarchical browser to quickly jump to different sections of the + reports. Timing paths in reports can be cross probed to synthesis tools + (Exemplar and Synplicity) + and Floorplanner. +

+ +

There are several ways to issue commands in Timing Analyzer. Timing + Analyzer can be controlled through GUI + features (menu commands) or its comprehensive macro command language facility. + You can select from menus, click toolbar buttons, type keyboard commands + in the console window, and run macros.

+ +

Definitions

+ +

Pad to Pad (tPD) +

+ +

Reports pad to pad paths that start at input pads and end at output + pads. The maximum external pad to pad delay.  Combinatorial + pad-to-pad paths begin at input pads, propagate through one or more levels + of combinatorial logic and end at output pads. Combinatorial paths also + trace through the enable inputs of 3-state controlled pads. Combinatorial + paths are not traced through clock, and asynchronous set and reset inputs + of registers. These paths are also broken at bidirectional pins

+ +

Clock Pad to Output Pad (tCO) +

+ +

The maximum external clock pad to output pad delay.  Reports + paths that start at input  pads + trace through clock inputs of  registers + and end at output pads. Paths are not traced through PRE/CLR +  inputs + of registers.  You + can directly specify tCO + for all registered output paths in your design using the Pad-to-Pad timespec. + Clock-Pad-to-Pad paths for global clocks begin at global clock pads, propagate + through global clock buffers, and propagate through the flip-flop Q + output and any number of levels of combinatorial logic and end at the + output pad. Clock-Pad-to-Pad paths for product term clock paths begin + at input pads, propagate through any number of logic levels feeding into + a clock product term, propagate through the flip-flop Q + output and any number of levels of combinatorial logic and end at the + output pad. Clock-Pad-to-Pad paths also trace through the enable inputs + of 3-state controlled pads.

+ +

Setup to Clock at Pad (tSU + or tSUF)

+ +

Reports external setup time of data  to + clock at pad. Data path starts at an input pad and ends at register  (Fast + Input Register for tSUF) + D/T  input. + Clock path starts at input pad and ends at the register clock input.  Paths + are not traced through registers. Pin-to-pin setup requirement is not + reported or guaranteed for product-term clocks derived from macrocell + feedback signals.

+ +

The minimum required setup time for flip-flops.  You + can specify the tSU + (setup-to-clock) for all inputs in your design relative to a global clock + or product term clock. Each tSU + OFFSET timespec involves an input path and a clock path. Input paths start + at input pads, propagate through input buffers and any number of combinatorial + logic levels before ending at a flip-flop D/T input, including the receiving + flip-flop's tSU.  Input + paths are not traced through flip-flop clock pins, asynchronous set/reset + inputs or bidirectional I/O pins. Global clock paths start at global clock + pads, propagate through global clock buffers and end at the flip-flop + clock pin. Product term clock paths start at input pads, propagate through + a single level of logic implemented in a clock product term and end at + the flip-flop clock pin.

+ +

Clock to Setup (tCYC)

+ +

Register to register cycle time. Includes source register tCO and destination + register tSU.

+ +

Note that when the + computed Maximum Clock Speed is limited by tCYC, it is computed assuming + that all registers are rising-edge sensitive.

+ +

fSYSTEM

+ +

Maximum clock operating frequency.  You + can specify the fSYSTEM (clock frequency or period) for all registered + paths in your design using a Register-to-Register timespec. Register-to-Register + paths begin at flip-flop clock inputs, propagate through the flip-flop + Q output and any number of levels of combinatorial logic and end at the + receiving flip-flop D/T input, including the receiving flip-flop's tSU. + When these flip-flops are clocked by the same clock, the delay on this + path is equivalent to the cycle time of the clock. Registered paths do + not propagate through clock, and asynchronous set and reset inputs of + registers as shown below. These paths are also broken at bidirectional + pins.

+ +

 

+ + + + diff --git a/cpld/XC95144XL/WarpSE_html/tim/cpldta_style.css b/cpld/XC95144XL/WarpSE_html/tim/cpldta_style.css new file mode 100644 index 0000000..4b82019 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/tim/cpldta_style.css @@ -0,0 +1,144 @@ + + + + +.cpldta_text_report_header { + font-style: normal; + font-weight: bold; + font-size: 25pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center;} + +.cpldta_text_section_header { + font-style: normal; + font-weight: bold; + font-size: 15pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center;} + +.cpldta_text_subsection_header { + font-style: normal; + font-weight: bold; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left;} + + +.cpldta_warnings_header { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center; + background-color: #FFFFCC; } + + +.cpldta_text_normal { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left;} + + +.cpldta_text_normal_bold { + font-style: normal; + font-weight: bold; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left;} + + +.cpldta_constraint_description_normal { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left;} +.cpldta_constraint_description_bold { + font-style: normal; + font-weight: bold; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left;} + + +.cpldta_constraint_name { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left;} + + +.cpldta_constraint_name_error { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left; + background-color: #FFCCCC; } + + +.cpldta_time_value { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center;} + + +.cpldta_time_value_error { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center; + background-color: #FFCCCC; } + + +.cpldta_delaytable_header { + font-style: normal; + font-weight: bold; + font-size: 12pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center; + background-color: #FFFFCC; } +.cpldta_constraint_header { + font-style: normal; + font-weight: bold; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left; + background-color: #FFFFCC; } +.cpldta_time_header { + font-style: normal; + font-weight: bold; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center; + background-color: #FFFFCC; } +.cpldta_text_caption { + font-style: normal; + font-weight: Bold; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center;} + + +.cpldta_datasheet_pathname { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: left;} +.cpldta_datasheet_time_value { + font-style: normal; + font-weight: normal; + font-size: 10pt; + font-family: Arial, Helvetica, sans-serif; + text-align: center;} + + + + diff --git a/cpld/XC95144XL/WarpSE_html/tim/genreport.htm b/cpld/XC95144XL/WarpSE_html/tim/genreport.htm new file mode 100644 index 0000000..43aca47 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/tim/genreport.htm @@ -0,0 +1,17 @@ + + +Reports + + +; + + + + + + + +<body bgcolor="#FFFFFF" text="#000000"> +</body> + + diff --git a/cpld/XC95144XL/WarpSE_html/tim/leftnav.htm b/cpld/XC95144XL/WarpSE_html/tim/leftnav.htm new file mode 100644 index 0000000..e72761d --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/tim/leftnav.htm @@ -0,0 +1,37 @@ + + +Timing Navigation + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + +
+
Timing Report
+
 Description
 Summary
 Constraints
 Definitions
  
+ + diff --git a/cpld/XC95144XL/WarpSE_html/tim/report.htm b/cpld/XC95144XL/WarpSE_html/tim/report.htm new file mode 100644 index 0000000..43aca47 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/tim/report.htm @@ -0,0 +1,17 @@ + + +Reports + + +; + + + + + + + +<body bgcolor="#FFFFFF" text="#000000"> +</body> + + diff --git a/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm b/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm new file mode 100644 index 0000000..ced2ee8 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm @@ -0,0 +1,16265 @@ + + + + + + + +Timing report for WarpSE + + + +

Timing Report

+
Need help reading this report?

+ + + + + + + + + + + + + + + + + + +
Design NameWarpSE
Device, Speed (SpeedFile Version)XC95144XL, -10 (3.0)
Date Created Mon Mar 28 09:47:06 2022 +
Created By Timing Report Generator: version P.20131013
Copyright Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
+

Summary

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Performance Summary
Min. Clock Period19.500 ns.
Max. Clock Frequency (fSYSTEM)51.282 MHz.
Limited by Cycle Time for CLK_FSB
Clock to Setup (tCYC)19.500 ns.
Pad to Pad Delay (tPD)11.000 ns.
Setup to Clock at the Pad (tSU)16.000 ns.
Clock Pad to Output Pad Delay (tCO)14.500 ns.
+
+

Timing Constraints

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Constraint NameRequirement (ns)Delay (ns)PathsPaths Failing
TS_CLK_IOB142.80.000
TS_CLK_FSB40.019.52910
TS_CLK2X_IOB66.611.01050
+
+
+ +

Constraint: TS_CLK_IOB

+ + + + + + + + +
Description: PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS
PathRequirement (ns)Delay (ns)Slack (ns)
+
+
+ +

Constraint: TS_CLK_FSB

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Description: PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS
PathRequirement (ns)Delay (ns)Slack (ns)
fsb/ASrf.Q to fsb/VPA.D20.00019.5000.500
cnt/TimeoutA.Q to fsb/VPA.D40.00011.80028.200
cnt/TimeoutB.Q to fsb/VPA.D40.00011.80028.200
cnt/TimeoutB.Q to nDTACK_FSB.D40.00011.80028.200
cs/nOverlay1.Q to fsb/VPA.D40.00011.80028.200
fsb/ASrf.Q to nDTACK_FSB.D20.00011.8008.200
fsb/BERR0r.Q to fsb/VPA.D40.00011.80028.200
fsb/BERR0r.Q to nDTACK_FSB.D40.00011.80028.200
fsb/BERR1r.Q to fsb/VPA.D40.00011.80028.200
fsb/BERR1r.Q to nDTACK_FSB.D40.00011.80028.200
fsb/Ready1r.Q to fsb/VPA.D40.00011.80028.200
fsb/Ready1r.Q to nDTACK_FSB.D40.00011.80028.200
fsb/Ready2r.Q to fsb/VPA.D40.00011.80028.200
fsb/VPA.Q to fsb/VPA.D40.00011.80028.200
iobs/BERR.Q to fsb/VPA.D40.00011.80028.200
iobs/BERR.Q to nDTACK_FSB.D40.00011.80028.200
iobs/IOReady.Q to fsb/VPA.D40.00011.80028.200
iobs/IOReady.Q to nDTACK_FSB.D40.00011.80028.200
nBR_IOB.Q to fsb/VPA.D40.00011.80028.200
nBR_IOB.Q to nDTACK_FSB.D40.00011.80028.200
cnt/RefCnt<5>.Q to ram/RAMDIS1.D40.00011.40028.600
cnt/RefCnt<5>.Q to ram/RASEL.D40.00011.40028.600
cnt/RefCnt<6>.Q to ram/RAMDIS1.D40.00011.40028.600
cnt/RefCnt<6>.Q to ram/RASEL.D40.00011.40028.600
cnt/RefCnt<7>.Q to ram/RAMDIS1.D40.00011.40028.600
cnt/RefCnt<7>.Q to ram/RASEL.D40.00011.40028.600
cnt/RefDone.Q to ram/RAMDIS1.D40.00011.40028.600
cnt/RefDone.Q to ram/RASEL.D40.00011.40028.600
cs/nOverlay1.Q to fsb/Ready1r.D40.00011.40028.600
cs/nOverlay1.Q to iobs/IORW1.D40.00011.40028.600
cs/nOverlay1.Q to iobs/Once.D40.00011.40028.600
cs/nOverlay1.Q to nDTACK_FSB.D40.00011.40028.600
cs/nOverlay1.Q to ram/RAMDIS1.D40.00011.40028.600
cs/nOverlay1.Q to ram/RASEL.D40.00011.40028.600
fsb/ASrf.Q to ram/RASEL.D20.00011.4008.600
fsb/Ready0r.Q to nDTACK_FSB.D40.00011.40028.600
fsb/Ready1r.Q to fsb/Ready1r.D40.00011.40028.600
iobs/IORW0.Q to iobs/IORW0.D40.00011.40028.600
iobs/IOReady.Q to fsb/Ready1r.D40.00011.40028.600
iobs/Once.Q to iobs/IORW0.D40.00011.40028.600
iobs/Once.Q to iobs/Once.D40.00011.40028.600
iobs/PS_FSM_FFd1.Q to iobs/IORW0.D40.00011.40028.600
iobs/PS_FSM_FFd2.Q to iobs/IORW0.D40.00011.40028.600
nADoutLE1.Q to fsb/Ready1r.D40.00011.40028.600
nADoutLE1.Q to fsb/VPA.D40.00011.40028.600
nADoutLE1.Q to iobs/IORW0.D40.00011.40028.600
nDTACK_FSB.Q to nDTACK_FSB.D40.00011.40028.600
ram/Once.Q to ram/RASEL.D40.00011.40028.600
ram/RAMReady.Q to nDTACK_FSB.D40.00011.40028.600
ram/RS_FSM_FFd1.Q to ram/RAMDIS1.D40.00011.40028.600
ram/RS_FSM_FFd1.Q to ram/RASEL.D40.00011.40028.600
ram/RS_FSM_FFd2.Q to ram/RASEL.D40.00011.40028.600
ram/RS_FSM_FFd3.Q to ram/RAMDIS1.D40.00011.40028.600
cnt/RefCnt<5>.Q to ram/RAMDIS2.D40.00011.00029.000
cnt/RefCnt<5>.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
cnt/RefCnt<5>.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
cnt/RefCnt<5>.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
cnt/RefCnt<6>.Q to ram/RAMDIS2.D40.00011.00029.000
cnt/RefCnt<6>.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
cnt/RefCnt<6>.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
cnt/RefCnt<6>.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
cnt/RefCnt<7>.Q to ram/RAMDIS2.D40.00011.00029.000
cnt/RefCnt<7>.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
cnt/RefCnt<7>.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
cnt/RefCnt<7>.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
cnt/RefDone.Q to ram/RAMDIS2.D40.00011.00029.000
cnt/RefDone.Q to ram/RAMReady.D40.00011.00029.000
cnt/RefDone.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
cnt/RefDone.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
cnt/TimeoutA.Q to fsb/Ready2r.D40.00011.00029.000
cnt/TimeoutA.Q to nDTACK_FSB.D40.00011.00029.000
cs/nOverlay1.Q to fsb/Ready2r.D40.00011.00029.000
cs/nOverlay1.Q to iobs/IOREQ.D40.00011.00029.000
cs/nOverlay1.Q to iobs/Load1.D40.00011.00029.000
cs/nOverlay1.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000
cs/nOverlay1.Q to ram/RAMDIS2.D40.00011.00029.000
cs/nOverlay1.Q to ram/RAMReady.D40.00011.00029.000
cs/nOverlay1.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
cs/nOverlay1.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
cs/nOverlay1.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
fsb/ASrf.Q to fsb/Ready0r.D20.00011.0009.000
fsb/ASrf.Q to fsb/Ready2r.D20.00011.0009.000
fsb/ASrf.Q to iobs/IORW0.D20.00011.0009.000
fsb/ASrf.Q to iobs/IORW1.D20.00011.0009.000
fsb/ASrf.Q to ram/RAMDIS1.D20.00011.0009.000
fsb/ASrf.Q to ram/RAMDIS2.D20.00011.0009.000
fsb/ASrf.Q to ram/RAMReady.D20.00011.0009.000
fsb/ASrf.Q to ram/RS_FSM_FFd1.D20.00011.0009.000
fsb/ASrf.Q to ram/RS_FSM_FFd2.D20.00011.0009.000
fsb/ASrf.Q to ram/RS_FSM_FFd3.D20.00011.0009.000
fsb/Ready0r.Q to fsb/VPA.D40.00011.00029.000
fsb/Ready2r.Q to fsb/Ready2r.D40.00011.00029.000
fsb/Ready2r.Q to nDTACK_FSB.D40.00011.00029.000
iobs/IORW1.Q to iobs/IORW0.D40.00011.00029.000
iobs/PS_FSM_FFd1.Q to iobs/IORW1.D40.00011.00029.000
iobs/PS_FSM_FFd1.Q to iobs/Once.D40.00011.00029.000
iobs/PS_FSM_FFd1.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000
iobs/PS_FSM_FFd2.Q to iobs/IOREQ.D40.00011.00029.000
iobs/PS_FSM_FFd2.Q to iobs/IORW1.D40.00011.00029.000
iobs/PS_FSM_FFd2.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000
nADoutLE1.Q to iobs/IOREQ.D40.00011.00029.000
nADoutLE1.Q to iobs/Once.D40.00011.00029.000
nADoutLE1.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000
nADoutLE1.Q to nDTACK_FSB.D40.00011.00029.000
ram/BACTr.Q to ram/RAMDIS1.D40.00011.00029.000
ram/BACTr.Q to ram/RAMReady.D40.00011.00029.000
ram/BACTr.Q to ram/RASEL.D40.00011.00029.000
ram/BACTr.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
ram/Once.Q to ram/RAMDIS1.D40.00011.00029.000
ram/Once.Q to ram/RAMDIS2.D40.00011.00029.000
ram/Once.Q to ram/RAMReady.D40.00011.00029.000
ram/Once.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
ram/RAMDIS2.Q to ram/RAMDIS2.D40.00011.00029.000
ram/RAMReady.Q to fsb/VPA.D40.00011.00029.000
ram/RS_FSM_FFd1.Q to ram/RAMReady.D40.00011.00029.000
ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
ram/RS_FSM_FFd2.Q to ram/RAMDIS2.D40.00011.00029.000
ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
ram/RS_FSM_FFd3.Q to ram/RAMDIS2.D40.00011.00029.000
ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
IPL2r0.Q to IPL2r1.D40.00010.00030.000
IPL2r0.Q to nBR_IOB.CE40.00010.00030.000
IPL2r1.Q to nBR_IOB.CE40.00010.00030.000
RESDone.Q to nBR_IOB.CE40.00010.00030.000
RESr0.Q to RESDone.CE40.00010.00030.000
RESr0.Q to RESr1.D40.00010.00030.000
RESr0.Q to nBR_IOB.CE40.00010.00030.000
RESr1.Q to RESDone.CE40.00010.00030.000
RESr1.Q to RESr2.D40.00010.00030.000
RESr1.Q to nBR_IOB.CE40.00010.00030.000
RESr2.Q to RESDone.CE40.00010.00030.000
RESr2.Q to nBR_IOB.CE40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefCnt<1>.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefCnt<2>.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefCnt<3>.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefCnt<4>.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefCnt<5>.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefCnt<6>.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefCnt<7>.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<0>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/RefCnt<2>.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/RefCnt<3>.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/RefCnt<4>.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/RefCnt<5>.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/RefCnt<6>.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/RefCnt<7>.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<1>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/RefCnt<3>.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/RefCnt<4>.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/RefCnt<5>.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/RefCnt<6>.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/RefCnt<7>.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<2>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/RefCnt<4>.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/RefCnt<5>.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/RefCnt<6>.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/RefCnt<7>.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<3>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<4>.Q to cnt/RefCnt<5>.D40.00010.00030.000
cnt/RefCnt<4>.Q to cnt/RefCnt<6>.D40.00010.00030.000
cnt/RefCnt<4>.Q to cnt/RefCnt<7>.D40.00010.00030.000
cnt/RefCnt<4>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<4>.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/RefCnt<4>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<4>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<5>.Q to cnt/RefCnt<6>.D40.00010.00030.000
cnt/RefCnt<5>.Q to cnt/RefCnt<7>.D40.00010.00030.000
cnt/RefCnt<5>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<5>.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/RefCnt<5>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<5>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<5>.Q to ram/RAMReady.D40.00010.00030.000
cnt/RefCnt<6>.Q to cnt/RefCnt<7>.D40.00010.00030.000
cnt/RefCnt<6>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<6>.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/RefCnt<6>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<6>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<6>.Q to ram/RAMReady.D40.00010.00030.000
cnt/RefCnt<7>.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefCnt<7>.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/RefCnt<7>.Q to cnt/TimeoutBPre.D40.00010.00030.000
cnt/RefCnt<7>.Q to ram/RAMReady.D40.00010.00030.000
cnt/RefDone.Q to cnt/RefDone.D40.00010.00030.000
cnt/RefDone.Q to ram/RS_FSM_FFd2.D40.00010.00030.000
cnt/TimeoutA.Q to cnt/TimeoutA.D40.00010.00030.000
cnt/TimeoutB.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/TimeoutB.Q to fsb/BERR0r.D40.00010.00030.000
cnt/TimeoutBPre.Q to cnt/TimeoutB.D40.00010.00030.000
cnt/TimeoutBPre.Q to cnt/TimeoutBPre.D40.00010.00030.000
cs/nOverlay0.Q to cs/nOverlay0.D40.00010.00030.000
cs/nOverlay0.Q to cs/nOverlay1.D40.00010.00030.000
cs/nOverlay1.Q to fsb/Ready0r.D40.00010.00030.000
cs/nOverlay1.Q to iobs/IORW0.D40.00010.00030.000
cs/nOverlay1.Q to ram/Once.D40.00010.00030.000
fsb/ASrf.Q to cnt/TimeoutA.D20.00010.00010.000
fsb/ASrf.Q to cnt/TimeoutB.D20.00010.00010.000
fsb/ASrf.Q to cnt/TimeoutBPre.D20.00010.00010.000
fsb/ASrf.Q to cs/nOverlay0.D20.00010.00010.000
fsb/ASrf.Q to cs/nOverlay1.CE40.00010.00030.000
fsb/ASrf.Q to fsb/BERR0r.D20.00010.00010.000
fsb/ASrf.Q to fsb/BERR1r.D20.00010.00010.000
fsb/ASrf.Q to fsb/Ready1r.D20.00010.00010.000
fsb/ASrf.Q to iobs/BERR.D20.00010.00010.000
fsb/ASrf.Q to iobs/IOREQ.D20.00010.00010.000
fsb/ASrf.Q to iobs/IOReady.D20.00010.00010.000
fsb/ASrf.Q to iobs/Load1.D20.00010.00010.000
fsb/ASrf.Q to iobs/Once.D20.00010.00010.000
fsb/ASrf.Q to iobs/PS_FSM_FFd2.D20.00010.00010.000
fsb/ASrf.Q to ram/BACTr.D20.00010.00010.000
fsb/ASrf.Q to ram/Once.D20.00010.00010.000
fsb/BERR0r.Q to fsb/BERR0r.D40.00010.00030.000
fsb/BERR1r.Q to fsb/BERR1r.D40.00010.00030.000
fsb/Ready0r.Q to fsb/Ready0r.D40.00010.00030.000
iobs/BERR.Q to fsb/BERR1r.D40.00010.00030.000
iobs/BERR.Q to iobs/BERR.D40.00010.00030.000
iobs/Clear1.Q to nADoutLE1.D40.00010.00030.000
iobs/IOACTr.Q to iobs/BERR.D40.00010.00030.000
iobs/IOACTr.Q to iobs/IOREQ.D40.00010.00030.000
iobs/IOACTr.Q to iobs/IOReady.D40.00010.00030.000
iobs/IOACTr.Q to iobs/PS_FSM_FFd1.D40.00010.00030.000
iobs/IOACTr.Q to iobs/PS_FSM_FFd2.D40.00010.00030.000
iobs/IOL1.Q to iobs/IOL0.D40.00010.00030.000
iobs/IORW1.Q to iobs/IORW1.D40.00010.00030.000
iobs/IOReady.Q to iobs/IOReady.D40.00010.00030.000
iobs/IOU1.Q to iobs/IOU0.D40.00010.00030.000
iobs/Load1.Q to iobs/IOL1.CE40.00010.00030.000
iobs/Load1.Q to iobs/IOU1.CE40.00010.00030.000
iobs/Load1.Q to nADoutLE1.D40.00010.00030.000
iobs/Once.Q to iobs/BERR.D40.00010.00030.000
iobs/Once.Q to iobs/IOREQ.D40.00010.00030.000
iobs/Once.Q to iobs/IORW1.D40.00010.00030.000
iobs/Once.Q to iobs/IOReady.D40.00010.00030.000
iobs/Once.Q to iobs/Load1.D40.00010.00030.000
iobs/Once.Q to iobs/PS_FSM_FFd2.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/ALE0.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/Clear1.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/IOL0.CE40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/IOREQ.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/IOU0.CE40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/Load1.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/PS_FSM_FFd1.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/ALE0.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/BERR.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/Clear1.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/IOL0.CE40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/IOReady.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/IOU0.CE40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/Load1.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/Once.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/PS_FSM_FFd1.D40.00010.00030.000
nADoutLE1.Q to iobs/BERR.D40.00010.00030.000
nADoutLE1.Q to iobs/Clear1.D40.00010.00030.000
nADoutLE1.Q to iobs/IOL0.D40.00010.00030.000
nADoutLE1.Q to iobs/IORW1.D40.00010.00030.000
nADoutLE1.Q to iobs/IOReady.D40.00010.00030.000
nADoutLE1.Q to iobs/IOU0.D40.00010.00030.000
nADoutLE1.Q to iobs/Load1.D40.00010.00030.000
nADoutLE1.Q to nADoutLE1.D40.00010.00030.000
ram/Once.Q to ram/Once.D40.00010.00030.000
ram/Once.Q to ram/RS_FSM_FFd3.D40.00010.00030.000
ram/RAMReady.Q to fsb/Ready0r.D40.00010.00030.000
ram/RASEL.Q to nCAS.D20.00010.00010.000
ram/RS_FSM_FFd1.Q to ram/Once.D40.00010.00030.000
ram/RS_FSM_FFd1.Q to ram/RAMDIS2.D40.00010.00030.000
ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd2.D40.00010.00030.000
ram/RS_FSM_FFd1.Q to ram/RefRAS.D40.00010.00030.000
ram/RS_FSM_FFd2.Q to ram/Once.D40.00010.00030.000
ram/RS_FSM_FFd2.Q to ram/RAMDIS1.D40.00010.00030.000
ram/RS_FSM_FFd2.Q to ram/RAMReady.D40.00010.00030.000
ram/RS_FSM_FFd2.Q to ram/RefRAS.D40.00010.00030.000
ram/RS_FSM_FFd3.Q to ram/Once.D40.00010.00030.000
ram/RS_FSM_FFd3.Q to ram/RAMReady.D40.00010.00030.000
ram/RS_FSM_FFd3.Q to ram/RASEL.D40.00010.00030.000
ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd1.D40.00010.00030.000
ram/RefRAS.Q to cnt/RefDone.D40.00010.00030.000
 +
+
+ +

Constraint: TS_CLK2X_IOB

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Description: PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS
PathRequirement (ns)Delay (ns)Slack (ns)
iobm/BERRrf.Q to iobm/IOBERR.D33.30011.00022.300
iobm/BERRrr.Q to iobm/IOBERR.D66.60011.00055.600
iobm/DTACKrf.Q to iobm/IOACT.D33.30011.00022.300
iobm/DTACKrf.Q to iobm/IOBERR.D33.30011.00022.300
iobm/DTACKrr.Q to iobm/IOACT.D66.60011.00055.600
iobm/DTACKrr.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOBERR.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOS_FSM_FFd1.Q to iobm/IOACT.D66.60011.00055.600
iobm/IOS_FSM_FFd1.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOS_FSM_FFd2.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOS_FSM_FFd3.Q to iobm/IOACT.D66.60011.00055.600
iobm/IOS_FSM_FFd3.Q to iobm/IOBERR.D66.60011.00055.600
iobm/RESrf.Q to iobm/IOACT.D33.30011.00022.300
iobm/RESrf.Q to iobm/IOBERR.D33.30011.00022.300
iobm/RESrr.Q to iobm/IOACT.D66.60011.00055.600
iobm/RESrr.Q to iobm/IOBERR.D66.60011.00055.600
iobm/BERRrf.Q to iobm/IOACT.D33.30010.00023.300
iobm/BERRrf.Q to iobm/IOS_FSM_FFd2.D33.30010.00023.300
iobm/BERRrr.Q to iobm/IOACT.D66.60010.00056.600
iobm/BERRrr.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/BGr0.Q to iobm/BGr1.D66.60010.00056.600
iobm/BGr0.Q to nAoutOE.D66.60010.00056.600
iobm/BGr1.Q to nAoutOE.D66.60010.00056.600
iobm/DTACKrf.Q to iobm/IOS_FSM_FFd2.D33.30010.00023.300
iobm/DTACKrr.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<1>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<0>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<1>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<1>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<2>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<3>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<4>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ETACK.Q to iobm/IOACT.D66.60010.00056.600
iobm/ETACK.Q to iobm/IOBERR.D66.60010.00056.600
iobm/ETACK.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<0>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<1>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<2>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<3>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<4>.D66.60010.00056.600
iobm/IOACT.Q to nVMA_IOB.D66.60010.00056.600
iobm/IOREQr.Q to iobm/ALE0.D33.30010.00023.300
iobm/IOREQr.Q to iobm/IOACT.D33.30010.00023.300
iobm/IOREQr.Q to iobm/IOS_FSM_FFd3.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to iobm/ALE0.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to iobm/IOS_FSM_FFd1.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to nAS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to nDinLE.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to nLDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to nUDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to iobm/ALE0.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOACT.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOS_FSM_FFd1.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to nAS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to nDinLE.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to nDoutOE.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to nLDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to nUDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd3.Q to iobm/ALE0.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to iobm/IOS_FSM_FFd1.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to nAS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd3.Q to nDoutOE.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to nLDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd3.Q to nUDS_IOB.D33.30010.00023.300
iobm/RESrf.Q to iobm/IOS_FSM_FFd2.D33.30010.00023.300
iobm/RESrr.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/VPArf.Q to nVMA_IOB.D33.30010.00023.300
iobm/VPArr.Q to nVMA_IOB.D66.60010.00056.600
nAS_IOB.Q to nAoutOE.D33.30010.00023.300
nAoutOE.Q to iobm/ALE0.D66.60010.00056.600
nAoutOE.Q to iobm/IOACT.D66.60010.00056.600
nAoutOE.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
nAoutOE.Q to nAoutOE.D66.60010.00056.600
nVMA_IOB.Q to iobm/ETACK.D66.60010.00056.600
nVMA_IOB.Q to nVMA_IOB.D66.60010.00056.600
 +
+
+
Number of constraints not met: 0
+
+ +

Data Sheet Report

+ +

Maximum External Clock Speeds

+ + + + + + + + + + + + + + + + + + + + + +
ClockfEXT (MHz)Reason
CLK_IOB111.111Limited by Clock Pulse Width for CLK_IOB
CLK_FSB51.282Limited by Cycle Time for CLK_FSB
CLK2X_IOB90.909Limited by Cycle Time for CLK2X_IOB
+
+ +

Setup/Hold Times for Clocks

+ + + + + + + + + + + + +
Setup/Hold Times for Clock CLK_IOB
Source PadSetup to clk (edge) Hold to clk (edge)
E_IOB6.5000.000

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Setup/Hold Times for Clock CLK_FSB
Source PadSetup to clk (edge) Hold to clk (edge)
A_FSB<10>8.3000.000
A_FSB<11>8.3000.000
A_FSB<12>8.3000.000
A_FSB<13>8.3000.000
A_FSB<14>8.3000.000
A_FSB<15>8.3000.000
A_FSB<16>8.3000.000
A_FSB<17>8.3000.000
A_FSB<18>8.3000.000
A_FSB<19>8.3000.000
A_FSB<20>8.3000.000
A_FSB<21>8.3000.000
A_FSB<22>8.3000.000
A_FSB<23>8.3000.000
A_FSB<8>8.3000.000
A_FSB<9>8.3000.000
SW<1>7.9000.000
nAS_FSB16.0000.000
nIPL26.5000.000
nLDS_FSB6.5000.000
nRES6.5000.000
nUDS_FSB6.5000.000
nWE_FSB8.3000.000

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Setup/Hold Times for Clock CLK2X_IOB
Source PadSetup to clk (edge) Hold to clk (edge)
CLK_IOB7.5000.000
nBERR_IOB7.5000.000
nBG_IOB6.5000.000
nDTACK_IOB6.5000.000
nRES6.5000.000
nVPA_IOB6.5000.000

+
+ +

Clock to Pad Timing

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Clock CLK_FSB to Pad
Destination PadClock (edge) to Pad
RA<2>14.500
RA<5>14.500
RA<8>14.500
RA<9>14.500
nBERR_FSB14.500
nRAMUWE14.500
nRAS14.500
RA<0>13.500
RA<1>13.500
RA<3>13.500
RA<4>13.500
RA<6>13.500
RA<7>13.500
nADoutLE013.500
nRAMLWE13.500
nROMCS13.500
nVPA_FSB13.500
nADoutLE15.800
nBR_IOB5.800
nCAS5.800
nDTACK_FSB5.800

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Clock CLK2X_IOB to Pad
Destination PadClock (edge) to Pad
nAS_IOB14.500
nLDS_IOB14.500
nUDS_IOB14.500
nVMA_IOB14.500
nADoutLE013.500
nAoutOE5.800
nDinLE5.800
nDoutOE5.800

+
+ +

Clock to Setup Times for Clocks

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Clock to Setup for clock CLK_FSB
SourceDestinationDelay
fsb/ASrf.Qfsb/VPA.D19.500
cnt/TimeoutA.Qfsb/VPA.D11.800
cnt/TimeoutB.Qfsb/VPA.D11.800
cnt/TimeoutB.QnDTACK_FSB.D11.800
cs/nOverlay1.Qfsb/VPA.D11.800
fsb/ASrf.QnDTACK_FSB.D11.800
fsb/BERR0r.Qfsb/VPA.D11.800
fsb/BERR0r.QnDTACK_FSB.D11.800
fsb/BERR1r.Qfsb/VPA.D11.800
fsb/BERR1r.QnDTACK_FSB.D11.800
fsb/Ready1r.Qfsb/VPA.D11.800
fsb/Ready1r.QnDTACK_FSB.D11.800
fsb/Ready2r.Qfsb/VPA.D11.800
fsb/VPA.Qfsb/VPA.D11.800
iobs/BERR.Qfsb/VPA.D11.800
iobs/BERR.QnDTACK_FSB.D11.800
iobs/IOReady.Qfsb/VPA.D11.800
iobs/IOReady.QnDTACK_FSB.D11.800
nBR_IOB.Qfsb/VPA.D11.800
nBR_IOB.QnDTACK_FSB.D11.800
cnt/RefCnt<5>.Qram/RAMDIS1.D11.400
cnt/RefCnt<5>.Qram/RASEL.D11.400
cnt/RefCnt<6>.Qram/RAMDIS1.D11.400
cnt/RefCnt<6>.Qram/RASEL.D11.400
cnt/RefCnt<7>.Qram/RAMDIS1.D11.400
cnt/RefCnt<7>.Qram/RASEL.D11.400
cnt/RefDone.Qram/RAMDIS1.D11.400
cnt/RefDone.Qram/RASEL.D11.400
cs/nOverlay1.Qfsb/Ready1r.D11.400
cs/nOverlay1.Qiobs/IORW1.D11.400
cs/nOverlay1.Qiobs/Once.D11.400
cs/nOverlay1.QnDTACK_FSB.D11.400
cs/nOverlay1.Qram/RAMDIS1.D11.400
cs/nOverlay1.Qram/RASEL.D11.400
fsb/ASrf.Qram/RASEL.D11.400
fsb/Ready0r.QnDTACK_FSB.D11.400
fsb/Ready1r.Qfsb/Ready1r.D11.400
iobs/IORW0.Qiobs/IORW0.D11.400
iobs/IOReady.Qfsb/Ready1r.D11.400
iobs/Once.Qiobs/IORW0.D11.400
iobs/Once.Qiobs/Once.D11.400
iobs/PS_FSM_FFd1.Qiobs/IORW0.D11.400
iobs/PS_FSM_FFd2.Qiobs/IORW0.D11.400
nADoutLE1.Qfsb/Ready1r.D11.400
nADoutLE1.Qfsb/VPA.D11.400
nADoutLE1.Qiobs/IORW0.D11.400
nDTACK_FSB.QnDTACK_FSB.D11.400
ram/Once.Qram/RASEL.D11.400
ram/RAMReady.QnDTACK_FSB.D11.400
ram/RS_FSM_FFd1.Qram/RAMDIS1.D11.400
ram/RS_FSM_FFd1.Qram/RASEL.D11.400
ram/RS_FSM_FFd2.Qram/RASEL.D11.400
ram/RS_FSM_FFd3.Qram/RAMDIS1.D11.400
cnt/RefCnt<5>.Qram/RAMDIS2.D11.000
cnt/RefCnt<5>.Qram/RS_FSM_FFd1.D11.000
cnt/RefCnt<5>.Qram/RS_FSM_FFd2.D11.000
cnt/RefCnt<5>.Qram/RS_FSM_FFd3.D11.000
cnt/RefCnt<6>.Qram/RAMDIS2.D11.000
cnt/RefCnt<6>.Qram/RS_FSM_FFd1.D11.000
cnt/RefCnt<6>.Qram/RS_FSM_FFd2.D11.000
cnt/RefCnt<6>.Qram/RS_FSM_FFd3.D11.000
cnt/RefCnt<7>.Qram/RAMDIS2.D11.000
cnt/RefCnt<7>.Qram/RS_FSM_FFd1.D11.000
cnt/RefCnt<7>.Qram/RS_FSM_FFd2.D11.000
cnt/RefCnt<7>.Qram/RS_FSM_FFd3.D11.000
cnt/RefDone.Qram/RAMDIS2.D11.000
cnt/RefDone.Qram/RAMReady.D11.000
cnt/RefDone.Qram/RS_FSM_FFd1.D11.000
cnt/RefDone.Qram/RS_FSM_FFd3.D11.000
cnt/TimeoutA.Qfsb/Ready2r.D11.000
cnt/TimeoutA.QnDTACK_FSB.D11.000
cs/nOverlay1.Qfsb/Ready2r.D11.000
cs/nOverlay1.Qiobs/IOREQ.D11.000
cs/nOverlay1.Qiobs/Load1.D11.000
cs/nOverlay1.Qiobs/PS_FSM_FFd2.D11.000
cs/nOverlay1.Qram/RAMDIS2.D11.000
cs/nOverlay1.Qram/RAMReady.D11.000
cs/nOverlay1.Qram/RS_FSM_FFd1.D11.000
cs/nOverlay1.Qram/RS_FSM_FFd2.D11.000
cs/nOverlay1.Qram/RS_FSM_FFd3.D11.000
fsb/ASrf.Qfsb/Ready0r.D11.000
fsb/ASrf.Qfsb/Ready2r.D11.000
fsb/ASrf.Qiobs/IORW0.D11.000
fsb/ASrf.Qiobs/IORW1.D11.000
fsb/ASrf.Qram/RAMDIS1.D11.000
fsb/ASrf.Qram/RAMDIS2.D11.000
fsb/ASrf.Qram/RAMReady.D11.000
fsb/ASrf.Qram/RS_FSM_FFd1.D11.000
fsb/ASrf.Qram/RS_FSM_FFd2.D11.000
fsb/ASrf.Qram/RS_FSM_FFd3.D11.000
fsb/Ready0r.Qfsb/VPA.D11.000
fsb/Ready2r.Qfsb/Ready2r.D11.000
fsb/Ready2r.QnDTACK_FSB.D11.000
iobs/IORW1.Qiobs/IORW0.D11.000
iobs/PS_FSM_FFd1.Qiobs/IORW1.D11.000
iobs/PS_FSM_FFd1.Qiobs/Once.D11.000
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd2.D11.000
iobs/PS_FSM_FFd2.Qiobs/IOREQ.D11.000
iobs/PS_FSM_FFd2.Qiobs/IORW1.D11.000
iobs/PS_FSM_FFd2.Qiobs/PS_FSM_FFd2.D11.000
nADoutLE1.Qiobs/IOREQ.D11.000
nADoutLE1.Qiobs/Once.D11.000
nADoutLE1.Qiobs/PS_FSM_FFd2.D11.000
nADoutLE1.QnDTACK_FSB.D11.000
ram/BACTr.Qram/RAMDIS1.D11.000
ram/BACTr.Qram/RAMReady.D11.000
ram/BACTr.Qram/RASEL.D11.000
ram/BACTr.Qram/RS_FSM_FFd2.D11.000
ram/Once.Qram/RAMDIS1.D11.000
ram/Once.Qram/RAMDIS2.D11.000
ram/Once.Qram/RAMReady.D11.000
ram/Once.Qram/RS_FSM_FFd1.D11.000
ram/RAMDIS2.Qram/RAMDIS2.D11.000
ram/RAMReady.Qfsb/VPA.D11.000
ram/RS_FSM_FFd1.Qram/RAMReady.D11.000
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd1.D11.000
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd3.D11.000
ram/RS_FSM_FFd2.Qram/RAMDIS2.D11.000
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd1.D11.000
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd2.D11.000
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd3.D11.000
ram/RS_FSM_FFd3.Qram/RAMDIS2.D11.000
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd2.D11.000
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd3.D11.000
IPL2r0.QIPL2r1.D10.000
IPL2r0.QnBR_IOB.CE10.000
IPL2r1.QnBR_IOB.CE10.000
RESDone.QnBR_IOB.CE10.000
RESr0.QRESDone.CE10.000
RESr0.QRESr1.D10.000
RESr0.QnBR_IOB.CE10.000
RESr1.QRESDone.CE10.000
RESr1.QRESr2.D10.000
RESr1.QnBR_IOB.CE10.000
RESr2.QRESDone.CE10.000
RESr2.QnBR_IOB.CE10.000
cnt/RefCnt<0>.Qcnt/RefCnt<1>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<2>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<3>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<0>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<0>.Qcnt/RefDone.D10.000
cnt/RefCnt<0>.Qcnt/TimeoutA.D10.000
cnt/RefCnt<0>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<0>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<2>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<3>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<1>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<1>.Qcnt/RefDone.D10.000
cnt/RefCnt<1>.Qcnt/TimeoutA.D10.000
cnt/RefCnt<1>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<1>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<3>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<2>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<2>.Qcnt/RefDone.D10.000
cnt/RefCnt<2>.Qcnt/TimeoutA.D10.000
cnt/RefCnt<2>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<2>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<4>.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<3>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<3>.Qcnt/RefDone.D10.000
cnt/RefCnt<3>.Qcnt/TimeoutA.D10.000
cnt/RefCnt<3>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<3>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<4>.Qcnt/RefCnt<5>.D10.000
cnt/RefCnt<4>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<4>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<4>.Qcnt/RefDone.D10.000
cnt/RefCnt<4>.Qcnt/TimeoutA.D10.000
cnt/RefCnt<4>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<4>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<5>.Qcnt/RefCnt<6>.D10.000
cnt/RefCnt<5>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<5>.Qcnt/RefDone.D10.000
cnt/RefCnt<5>.Qcnt/TimeoutA.D10.000
cnt/RefCnt<5>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<5>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<5>.Qram/RAMReady.D10.000
cnt/RefCnt<6>.Qcnt/RefCnt<7>.D10.000
cnt/RefCnt<6>.Qcnt/RefDone.D10.000
cnt/RefCnt<6>.Qcnt/TimeoutA.D10.000
cnt/RefCnt<6>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<6>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<6>.Qram/RAMReady.D10.000
cnt/RefCnt<7>.Qcnt/RefDone.D10.000
cnt/RefCnt<7>.Qcnt/TimeoutB.D10.000
cnt/RefCnt<7>.Qcnt/TimeoutBPre.D10.000
cnt/RefCnt<7>.Qram/RAMReady.D10.000
cnt/RefDone.Qcnt/RefDone.D10.000
cnt/RefDone.Qram/RS_FSM_FFd2.D10.000
cnt/TimeoutA.Qcnt/TimeoutA.D10.000
cnt/TimeoutB.Qcnt/TimeoutB.D10.000
cnt/TimeoutB.Qfsb/BERR0r.D10.000
cnt/TimeoutBPre.Qcnt/TimeoutB.D10.000
cnt/TimeoutBPre.Qcnt/TimeoutBPre.D10.000
cs/nOverlay0.Qcs/nOverlay0.D10.000
cs/nOverlay0.Qcs/nOverlay1.D10.000
cs/nOverlay1.Qfsb/Ready0r.D10.000
cs/nOverlay1.Qiobs/IORW0.D10.000
cs/nOverlay1.Qram/Once.D10.000
fsb/ASrf.Qcnt/TimeoutA.D10.000
fsb/ASrf.Qcnt/TimeoutB.D10.000
fsb/ASrf.Qcnt/TimeoutBPre.D10.000
fsb/ASrf.Qcs/nOverlay0.D10.000
fsb/ASrf.Qcs/nOverlay1.CE10.000
fsb/ASrf.Qfsb/BERR0r.D10.000
fsb/ASrf.Qfsb/BERR1r.D10.000
fsb/ASrf.Qfsb/Ready1r.D10.000
fsb/ASrf.Qiobs/BERR.D10.000
fsb/ASrf.Qiobs/IOREQ.D10.000
fsb/ASrf.Qiobs/IOReady.D10.000
fsb/ASrf.Qiobs/Load1.D10.000
fsb/ASrf.Qiobs/Once.D10.000
fsb/ASrf.Qiobs/PS_FSM_FFd2.D10.000
fsb/ASrf.Qram/BACTr.D10.000
fsb/ASrf.Qram/Once.D10.000
fsb/BERR0r.Qfsb/BERR0r.D10.000
fsb/BERR1r.Qfsb/BERR1r.D10.000
fsb/Ready0r.Qfsb/Ready0r.D10.000
iobs/BERR.Qfsb/BERR1r.D10.000
iobs/BERR.Qiobs/BERR.D10.000
iobs/Clear1.QnADoutLE1.D10.000
iobs/IOACTr.Qiobs/BERR.D10.000
iobs/IOACTr.Qiobs/IOREQ.D10.000
iobs/IOACTr.Qiobs/IOReady.D10.000
iobs/IOACTr.Qiobs/PS_FSM_FFd1.D10.000
iobs/IOACTr.Qiobs/PS_FSM_FFd2.D10.000
iobs/IOL1.Qiobs/IOL0.D10.000
iobs/IORW1.Qiobs/IORW1.D10.000
iobs/IOReady.Qiobs/IOReady.D10.000
iobs/IOU1.Qiobs/IOU0.D10.000
iobs/Load1.Qiobs/IOL1.CE10.000
iobs/Load1.Qiobs/IOU1.CE10.000
iobs/Load1.QnADoutLE1.D10.000
iobs/Once.Qiobs/BERR.D10.000
iobs/Once.Qiobs/IOREQ.D10.000
iobs/Once.Qiobs/IORW1.D10.000
iobs/Once.Qiobs/IOReady.D10.000
iobs/Once.Qiobs/Load1.D10.000
iobs/Once.Qiobs/PS_FSM_FFd2.D10.000
iobs/PS_FSM_FFd1.Qiobs/ALE0.D10.000
iobs/PS_FSM_FFd1.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd1.Qiobs/IOL0.CE10.000
iobs/PS_FSM_FFd1.Qiobs/IOREQ.D10.000
iobs/PS_FSM_FFd1.Qiobs/IOU0.CE10.000
iobs/PS_FSM_FFd1.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd1.D10.000
iobs/PS_FSM_FFd2.Qiobs/ALE0.D10.000
iobs/PS_FSM_FFd2.Qiobs/BERR.D10.000
iobs/PS_FSM_FFd2.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd2.Qiobs/IOL0.CE10.000
iobs/PS_FSM_FFd2.Qiobs/IOReady.D10.000
iobs/PS_FSM_FFd2.Qiobs/IOU0.CE10.000
iobs/PS_FSM_FFd2.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd2.Qiobs/Once.D10.000
iobs/PS_FSM_FFd2.Qiobs/PS_FSM_FFd1.D10.000
nADoutLE1.Qiobs/BERR.D10.000
nADoutLE1.Qiobs/Clear1.D10.000
nADoutLE1.Qiobs/IOL0.D10.000
nADoutLE1.Qiobs/IORW1.D10.000
nADoutLE1.Qiobs/IOReady.D10.000
nADoutLE1.Qiobs/IOU0.D10.000
nADoutLE1.Qiobs/Load1.D10.000
nADoutLE1.QnADoutLE1.D10.000
ram/Once.Qram/Once.D10.000
ram/Once.Qram/RS_FSM_FFd3.D10.000
ram/RAMReady.Qfsb/Ready0r.D10.000
ram/RASEL.QnCAS.D10.000
ram/RS_FSM_FFd1.Qram/Once.D10.000
ram/RS_FSM_FFd1.Qram/RAMDIS2.D10.000
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd2.D10.000
ram/RS_FSM_FFd1.Qram/RefRAS.D10.000
ram/RS_FSM_FFd2.Qram/Once.D10.000
ram/RS_FSM_FFd2.Qram/RAMDIS1.D10.000
ram/RS_FSM_FFd2.Qram/RAMReady.D10.000
ram/RS_FSM_FFd2.Qram/RefRAS.D10.000
ram/RS_FSM_FFd3.Qram/Once.D10.000
ram/RS_FSM_FFd3.Qram/RAMReady.D10.000
ram/RS_FSM_FFd3.Qram/RASEL.D10.000
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd1.D10.000
ram/RefRAS.Qcnt/RefDone.D10.000

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Clock to Setup for clock CLK2X_IOB
SourceDestinationDelay
iobm/BERRrf.Qiobm/IOBERR.D11.000
iobm/BERRrr.Qiobm/IOBERR.D11.000
iobm/DTACKrf.Qiobm/IOACT.D11.000
iobm/DTACKrf.Qiobm/IOBERR.D11.000
iobm/DTACKrr.Qiobm/IOACT.D11.000
iobm/DTACKrr.Qiobm/IOBERR.D11.000
iobm/IOBERR.Qiobm/IOBERR.D11.000
iobm/IOS_FSM_FFd1.Qiobm/IOACT.D11.000
iobm/IOS_FSM_FFd1.Qiobm/IOBERR.D11.000
iobm/IOS_FSM_FFd2.Qiobm/IOBERR.D11.000
iobm/IOS_FSM_FFd3.Qiobm/IOACT.D11.000
iobm/IOS_FSM_FFd3.Qiobm/IOBERR.D11.000
iobm/RESrf.Qiobm/IOACT.D11.000
iobm/RESrf.Qiobm/IOBERR.D11.000
iobm/RESrr.Qiobm/IOACT.D11.000
iobm/RESrr.Qiobm/IOBERR.D11.000
iobm/BERRrf.Qiobm/IOACT.D10.000
iobm/BERRrf.Qiobm/IOS_FSM_FFd2.D10.000
iobm/BERRrr.Qiobm/IOACT.D10.000
iobm/BERRrr.Qiobm/IOS_FSM_FFd2.D10.000
iobm/BGr0.Qiobm/BGr1.D10.000
iobm/BGr0.QnAoutOE.D10.000
iobm/BGr1.QnAoutOE.D10.000
iobm/DTACKrf.Qiobm/IOS_FSM_FFd2.D10.000
iobm/DTACKrr.Qiobm/IOS_FSM_FFd2.D10.000
iobm/ES<0>.Qiobm/ES<0>.D10.000
iobm/ES<0>.Qiobm/ES<1>.D10.000
iobm/ES<0>.Qiobm/ES<2>.D10.000
iobm/ES<0>.Qiobm/ES<3>.D10.000
iobm/ES<0>.Qiobm/ES<4>.D10.000
iobm/ES<0>.Qiobm/ETACK.D10.000
iobm/ES<0>.QnVMA_IOB.D10.000
iobm/ES<1>.Qiobm/ES<0>.D10.000
iobm/ES<1>.Qiobm/ES<1>.D10.000
iobm/ES<1>.Qiobm/ES<2>.D10.000
iobm/ES<1>.Qiobm/ES<3>.D10.000
iobm/ES<1>.Qiobm/ES<4>.D10.000
iobm/ES<1>.Qiobm/ETACK.D10.000
iobm/ES<1>.QnVMA_IOB.D10.000
iobm/ES<2>.Qiobm/ES<0>.D10.000
iobm/ES<2>.Qiobm/ES<2>.D10.000
iobm/ES<2>.Qiobm/ES<3>.D10.000
iobm/ES<2>.Qiobm/ES<4>.D10.000
iobm/ES<2>.Qiobm/ETACK.D10.000
iobm/ES<2>.QnVMA_IOB.D10.000
iobm/ES<3>.Qiobm/ES<0>.D10.000
iobm/ES<3>.Qiobm/ES<2>.D10.000
iobm/ES<3>.Qiobm/ES<3>.D10.000
iobm/ES<3>.Qiobm/ES<4>.D10.000
iobm/ES<3>.Qiobm/ETACK.D10.000
iobm/ES<3>.QnVMA_IOB.D10.000
iobm/ES<4>.Qiobm/ES<0>.D10.000
iobm/ES<4>.Qiobm/ES<2>.D10.000
iobm/ES<4>.Qiobm/ES<4>.D10.000
iobm/ES<4>.Qiobm/ETACK.D10.000
iobm/ES<4>.QnVMA_IOB.D10.000
iobm/ETACK.Qiobm/IOACT.D10.000
iobm/ETACK.Qiobm/IOBERR.D10.000
iobm/ETACK.Qiobm/IOS_FSM_FFd2.D10.000
iobm/Er2.Qiobm/ES<0>.D10.000
iobm/Er2.Qiobm/ES<1>.D10.000
iobm/Er2.Qiobm/ES<2>.D10.000
iobm/Er2.Qiobm/ES<3>.D10.000
iobm/Er2.Qiobm/ES<4>.D10.000
iobm/IOACT.QnVMA_IOB.D10.000
iobm/IOREQr.Qiobm/ALE0.D10.000
iobm/IOREQr.Qiobm/IOACT.D10.000
iobm/IOREQr.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd1.Qiobm/ALE0.D10.000
iobm/IOS_FSM_FFd1.Qiobm/IOS_FSM_FFd1.D10.000
iobm/IOS_FSM_FFd1.Qiobm/IOS_FSM_FFd2.D10.000
iobm/IOS_FSM_FFd1.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd1.QnAS_IOB.D10.000
iobm/IOS_FSM_FFd1.QnDinLE.D10.000
iobm/IOS_FSM_FFd1.QnLDS_IOB.D10.000
iobm/IOS_FSM_FFd1.QnUDS_IOB.D10.000
iobm/IOS_FSM_FFd2.Qiobm/ALE0.D10.000
iobm/IOS_FSM_FFd2.Qiobm/IOACT.D10.000
iobm/IOS_FSM_FFd2.Qiobm/IOS_FSM_FFd1.D10.000
iobm/IOS_FSM_FFd2.Qiobm/IOS_FSM_FFd2.D10.000
iobm/IOS_FSM_FFd2.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd2.QnAS_IOB.D10.000
iobm/IOS_FSM_FFd2.QnDinLE.D10.000
iobm/IOS_FSM_FFd2.QnDoutOE.D10.000
iobm/IOS_FSM_FFd2.QnLDS_IOB.D10.000
iobm/IOS_FSM_FFd2.QnUDS_IOB.D10.000
iobm/IOS_FSM_FFd3.Qiobm/ALE0.D10.000
iobm/IOS_FSM_FFd3.Qiobm/IOS_FSM_FFd1.D10.000
iobm/IOS_FSM_FFd3.Qiobm/IOS_FSM_FFd2.D10.000
iobm/IOS_FSM_FFd3.Qiobm/IOS_FSM_FFd3.D10.000
iobm/IOS_FSM_FFd3.QnAS_IOB.D10.000
iobm/IOS_FSM_FFd3.QnDoutOE.D10.000
iobm/IOS_FSM_FFd3.QnLDS_IOB.D10.000
iobm/IOS_FSM_FFd3.QnUDS_IOB.D10.000
iobm/RESrf.Qiobm/IOS_FSM_FFd2.D10.000
iobm/RESrr.Qiobm/IOS_FSM_FFd2.D10.000
iobm/VPArf.QnVMA_IOB.D10.000
iobm/VPArr.QnVMA_IOB.D10.000
nAS_IOB.QnAoutOE.D10.000
nAoutOE.Qiobm/ALE0.D10.000
nAoutOE.Qiobm/IOACT.D10.000
nAoutOE.Qiobm/IOS_FSM_FFd3.D10.000
nAoutOE.QnAoutOE.D10.000
nVMA_IOB.Qiobm/ETACK.D10.000
nVMA_IOB.QnVMA_IOB.D10.000

+
+ +

Pad to Pad List

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Source PadDestination PadDelay
A_FSB<12>RA<2>11.000
A_FSB<15>RA<5>11.000
A_FSB<19>RA<9>11.000
A_FSB<20>RA<9>11.000
A_FSB<20>nBERR_FSB11.000
A_FSB<21>RA<8>11.000
A_FSB<21>nBERR_FSB11.000
A_FSB<21>nRAS11.000
A_FSB<22>RA<8>11.000
A_FSB<22>nBERR_FSB11.000
A_FSB<22>nRAS11.000
A_FSB<23>RA<8>11.000
A_FSB<23>nBERR_FSB11.000
A_FSB<23>nRAS11.000
A_FSB<3>RA<2>11.000
A_FSB<6>RA<5>11.000
A_FSB<9>RA<8>11.000
SW<0>CLK20EN11.000
nAS_FSBnOE11.000
nAS_FSBnRAMUWE11.000
nAS_FSBnRAS11.000
nUDS_FSBnRAMUWE11.000
nWE_FSBnOE11.000
nWE_FSBnRAMUWE11.000
A_FSB<10>RA<0>10.000
A_FSB<11>RA<1>10.000
A_FSB<13>RA<3>10.000
A_FSB<14>RA<4>10.000
A_FSB<16>RA<6>10.000
A_FSB<17>RA<7>10.000
A_FSB<18>RA<8>10.000
A_FSB<19>RA<11>10.000
A_FSB<1>RA<0>10.000
A_FSB<20>nDinOE10.000
A_FSB<20>nROMCS10.000
A_FSB<21>RA<10>10.000
A_FSB<21>nDinOE10.000
A_FSB<21>nROMCS10.000
A_FSB<22>nDinOE10.000
A_FSB<22>nROMCS10.000
A_FSB<23>nDinOE10.000
A_FSB<23>nROMCS10.000
A_FSB<2>RA<1>10.000
A_FSB<4>RA<3>10.000
A_FSB<5>RA<4>10.000
A_FSB<7>RA<6>10.000
A_FSB<8>RA<7>10.000
SW<0>CLK25EN10.000
SW<1>nDinOE10.000
SW<1>nROMCS10.000
nAS_FSBnBERR_FSB10.000
nAS_FSBnDinOE10.000
nAS_FSBnRAMLWE10.000
nAS_FSBnROMWE10.000
nAS_FSBnVPA_FSB10.000
nLDS_FSBnRAMLWE10.000
nWE_FSBnDinOE10.000
nWE_FSBnRAMLWE10.000
nWE_FSBnROMWE10.000
+
+
+
Number of paths analyzed: +396 +
Number of Timing errors: +0 +
Analysis Completed: Mon Mar 28 09:47:21 2022 + +
+ diff --git a/cpld/XC95144XL/WarpSE_html/tim/toc.css b/cpld/XC95144XL/WarpSE_html/tim/toc.css new file mode 100644 index 0000000..29af0e1 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/tim/toc.css @@ -0,0 +1,36 @@ +.HEADING { + font-size: 15px; + font-family: Arial, Geneva, Verdana, Helvetica; + font-weight: bold; color: #000000; + text-align: normal; + margin-left: 0px; } +.Fitting { + font-size: 11px; + font-family: Arial, Geneva, Verdana, Helvetica; + font-weight: bold; color: #000000; + text-align: normal; + margin-left: 0px; } +.SECONDARY-NAV { + font-size: 11px; + font-family: Arial, Geneva, Verdana, Helvetica; + font-weight: bold; color: #FFFFFF; + margin-left: 0px; + text-decoration: none; ; + list-style-type: disc ; + list-style-position: inside } +.Timing { + font-size: 11px; + font-family: Arial, Geneva, Verdana, Helvetica; + font-weight: bold; color: #333333; + margin-left: 0px; + text-decoration: none; ; + list-style-type: disc ; + list-style-position: inside } +.Timing-Error { + font-size: 11px; + font-family: Arial, Geneva, Verdana, Helvetica; + font-weight: bold; color: #990000; + margin-left: 0px; + text-decoration: none; ; + list-style-type: disc ; + list-style-position: inside } diff --git a/cpld/XC95144XL/WarpSE_html/tim/topnav.htm b/cpld/XC95144XL/WarpSE_html/tim/topnav.htm new file mode 100644 index 0000000..00e11b8 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_html/tim/topnav.htm @@ -0,0 +1,31 @@ + + +CPLD Reports Banner + + + + + + + + + + + + + + +
 
+ + + + +   
+ + + + + + + + diff --git a/cpld/XC95144XL/MXSE_ngdbuild.xrpt b/cpld/XC95144XL/WarpSE_ngdbuild.xrpt similarity index 95% rename from cpld/XC95144XL/MXSE_ngdbuild.xrpt rename to cpld/XC95144XL/WarpSE_ngdbuild.xrpt index 833922b..513d216 100644 --- a/cpld/XC95144XL/MXSE_ngdbuild.xrpt +++ b/cpld/XC95144XL/WarpSE_ngdbuild.xrpt @@ -5,7 +5,7 @@ The structure and the elements are likely to change over the next few releases. This means code written to parse this file will need to be revisited each subsequent release.--> - +
@@ -45,7 +45,7 @@ - + @@ -58,7 +58,7 @@ - + @@ -70,38 +70,38 @@
- - - - + + + + - + - + - - + + - +
- - - - + + + + - + - + - - + + - +
diff --git a/cpld/XC95144XL/MXSE_pad.csv b/cpld/XC95144XL/WarpSE_pad.csv similarity index 95% rename from cpld/XC95144XL/MXSE_pad.csv rename to cpld/XC95144XL/WarpSE_pad.csv index 659a708..aff7a6c 100644 --- a/cpld/XC95144XL/MXSE_pad.csv +++ b/cpld/XC95144XL/WarpSE_pad.csv @@ -1,15 +1,15 @@ Release 8.1i - Fit P.20131013 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved - 3-27-2022 10:08AM + 3-28-2022 9:46AM NOTE: This file is designed to be imported into a spreadsheet program such as Microsoft Excel for viewing, printing and sorting. The comma ',' character is used as the data field separator. This file is also designed to support parsing. -Input file: MXSE.ngd -output file: MXSE_pad.csv +Input file: WarpSE.ngd +output file: WarpSE_pad.csv Part type: xc95144xl Speed grade: -10 Package: tq100 diff --git a/cpld/XC95144XL/WarpSE_summary.html b/cpld/XC95144XL/WarpSE_summary.html new file mode 100644 index 0000000..65742f3 --- /dev/null +++ b/cpld/XC95144XL/WarpSE_summary.html @@ -0,0 +1,81 @@ +Xilinx Design Summary + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
WarpSE Project Status (03/28/2022 - 09:47:24)
Project File:WarpSE.xiseParser Errors: No Errors
Module Name:WarpSEImplementation State:Fitted
Target Device:xc95144xl-10TQ100
  • Errors:
 +No Errors
Product Version:ISE 14.7
  • Warnings:
5 Warnings (0 new)
Design Goal:Balanced
  • Routing Results:
 + 
Design Strategy:Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: + +System Settings +
  • Final Timing Score:
  
+ + + + + + + + + + + + 
+ + + + + + + +
Detailed Reports [-]
Report NameStatusGeneratedErrorsWarningsInfos
Synthesis ReportCurrentMon Mar 28 09:45:15 202205 Warnings (0 new)0
Translation ReportCurrentMon Mar 28 09:45:45 2022000
CPLD Fitter Report (Text)CurrentMon Mar 28 09:46:19 202202 Warnings (1 new)3 Infos (3 new)
Power Report     
+ 
+ + + +
Secondary Reports [-]
Report NameStatusGenerated
Post-Fit Simulation Model Report  
+ + +
Date Generated: 03/28/2022 - 09:47:24
+ \ No newline at end of file diff --git a/cpld/XC95144XL/WarpSE_tim.html b/cpld/XC95144XL/WarpSE_tim.html new file mode 100644 index 0000000..660759c --- /dev/null +++ b/cpld/XC95144XL/WarpSE_tim.html @@ -0,0 +1 @@ +CPLD Timing Report (Text)
CPLD Timing Report (Text)
Mon Mar 28 09:30:32 2022


                           Performance Summary Report
                           --------------------------

Design:     WarpSE
Device:     XC95144XL-10-TQ100
Speed File: Version 3.0
Program:    Timing Report Generator:  version P.20131013
Date:       Mon Mar 28 09:28:06 2022

Timing Constraint Summary:

TS_CLK_IOB=PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS                            N/A
TS_CLK_FSB=PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS                             Met
TS_CLK2X_IOB=PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS                         Met

Performance Summary:

Pad to Pad (tPD)                          :         11.0ns (1 macrocell levels)
Pad 'A_FSB<11>' to Pad 'RA<1>'                                    

Clock net 'CLK_IOB' path delays:

Setup to Clock at the Pad (tSU)           :          6.5ns (0 macrocell levels)
Data signal 'E_IOB' to DFF D input Pin at 'iobm/Er.D'
Clock pad 'CLK_IOB'                                                       (GCK)

                          Minimum Clock Period: 9.0ns
                     Maximum Internal Clock Speed: 111.1Mhz
                         (Limited by Clock Pulse Width)

Clock net 'CLK_FSB' path delays:

Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
Clock Pad 'CLK_FSB' to Output Pad 'RA<1>'                                 (GCK)

Clock to Setup (tCYC)                     :         20.1ns (2 macrocell levels)
Clock to Q, net 'cs/nOverlay1.Q' to DFF Setup(D) at 'fsb/VPA.D'           (GCK)
Target FF drives output net 'fsb/VPA'

Setup to Clock at the Pad (tSU)           :         16.6ns (1 macrocell levels)
Data signal 'A_FSB<23>' to DFF D input Pin at 'fsb/VPA.D'
Clock pad 'CLK_FSB'                                                       (GCK)

                          Minimum Clock Period: 20.1ns
                     Maximum Internal Clock Speed: 49.7Mhz
                            (Limited by Cycle Time)

Clock net 'CLK2X_IOB' path delays:

Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
Clock Pad 'CLK2X_IOB' to Output Pad 'nVMA_IOB'                            (GCK)

Clock to Setup (tCYC)                     :         11.0ns (1 macrocell levels)
Clock to Q, net 'iobm/IOS_FSM_FFd3.Q' to DFF Setup(D) at 'IOACT.D'        (GCK)
Target FF drives output net 'IOACT'

Setup to Clock at the Pad (tSU)           :          7.5ns (0 macrocell levels)
Data signal 'CLK_IOB' to DFF D input Pin at 'IOACT.D'
Clock pad 'CLK2X_IOB'                                                     (GCK)

                          Minimum Clock Period: 11.0ns
                     Maximum Internal Clock Speed: 90.9Mhz
                            (Limited by Cycle Time)

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From        A     A     A     A     A     A     A     A     A     A     A
 \            _     _     _     _     _     _     _     _     _     _     _
  \           F     F     F     F     F     F     F     F     F     F     F
   \          S     S     S     S     S     S     S     S     S     S     S
    \         B     B     B     B     B     B     B     B     B     B     B
     \        <     <     <     <     <     <     <     <     <     <     <
      \       1     1     1     1     1     1     1     1     1     1     1
       \      0     1     2     3     4     5     6     7     8     9     >
        \     >     >     >     >     >     >     >     >     >     >      
  To     \------------------------------------------------------------------

CLK20EN                                                                    
CLK25EN                                                                    
RA<0>      10.0                                                        10.0
RA<10>                                                                     
RA<11>                                                           10.0      
RA<1>            11.0                                                      
RA<2>                  11.0                                                
RA<3>                        10.0                                          
RA<4>                              11.0                                    
RA<5>                                    11.0                              
RA<6>                                          10.0                        
RA<7>                                                10.0                  
RA<8>                                                      10.0            
RA<9>                                                            10.0      
nBERR_FSB                                                                  
nDinOE                                                                     
nOE                                                                        
nRAMLWE                                                                    
nRAMUWE                                                                    
nRAS                                                                       
nROMCS                                                                     
nROMWE                                                                     
nVPA_FSB                                                                   

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From        A     A     A     A     A     A     A     A     A     A     A
 \            _     _     _     _     _     _     _     _     _     _     _
  \           F     F     F     F     F     F     F     F     F     F     F
   \          S     S     S     S     S     S     S     S     S     S     S
    \         B     B     B     B     B     B     B     B     B     B     B
     \        <     <     <     <     <     <     <     <     <     <     <
      \       2     2     2     2     2     3     4     5     6     7     8
       \      0     1     2     3     >     >     >     >     >     >     >
        \     >     >     >     >                                          
  To     \------------------------------------------------------------------

CLK20EN                                                                    
CLK25EN                                                                    
RA<0>                                                                      
RA<10>           10.0                                                      
RA<11>                                                                     
RA<1>                              11.0                                    
RA<2>                                    11.0                              
RA<3>                                          10.0                        
RA<4>                                                11.0                  
RA<5>                                                      11.0            
RA<6>                                                            10.0      
RA<7>                                                                  10.0
RA<8>            11.0  11.0  11.0                                          
RA<9>      10.0                                                            
nBERR_FSB  11.0  11.0  11.0  11.0                                          
nDinOE     10.0  10.0  10.0  10.0                                          
nOE                                                                        
nRAMLWE                                                                    
nRAMUWE                                                                    
nRAS             11.0  11.0  11.0                                          
nROMCS     11.0  11.0  11.0  11.0                                          
nROMWE                                                                     
nVPA_FSB                                                                   

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From        A     S     S     n     n     n     n
 \            _     W     W     A     L     U     W
  \           F     <     <     S     D     D     E
   \          S     0     1     _     S     S     _
    \         B     >     >     F     _     _     F
     \        <                 S     F     F     S
      \       9                 B     S     S     B
       \      >                       B     B      
        \                                          
  To     \------------------------------------------

CLK20EN          10.0                              
CLK25EN          10.0                              
RA<0>                                              
RA<10>                                             
RA<11>                                             
RA<1>                                              
RA<2>                                              
RA<3>                                              
RA<4>                                              
RA<5>                                              
RA<6>                                              
RA<7>                                              
RA<8>      11.0                                    
RA<9>                                              
nBERR_FSB                    10.0                  
nDinOE                 10.0  10.0              10.0
nOE                          10.0              10.0
nRAMLWE                      10.0  10.0        10.0
nRAMUWE                      11.0        11.0  11.0
nRAS                         11.0                  
nROMCS                 11.0                        
nROMWE                       10.0              10.0
nVPA_FSB                     10.0                  

--------------------------------------------------------------------------------
                      Clock Pad to Output Pad (tCO) (nsec)

\ From         C     C
 \             L     L
  \            K     K
   \           2     _
    \          X     F
     \         _     S
      \        I     B
       \       O      
        \      B      
         \            
  To      \------------

RA<0>             13.5
RA<1>             14.5
RA<2>             14.5
RA<3>             13.5
RA<4>             14.5
RA<5>             14.5
RA<6>             13.5
RA<7>             13.5
RA<8>             14.5
RA<9>             13.5
nADoutLE0   13.5  13.5
nADoutLE1          5.8
nAS_IOB     14.5      
nAoutOE      5.8      
nBERR_FSB         14.5
nBR_IOB            5.8
nCAS               5.8
nDTACK_FSB         5.8
nDinLE       5.8      
nDoutOE      5.8      
nLDS_IOB    14.5      
nRAMLWE           13.5
nRAMUWE           14.5
nRAS              14.5
nROMCS            14.5
nUDS_IOB    14.5      
nVMA_IOB    14.5      
nVPA_FSB          13.5

--------------------------------------------------------------------------------
                   Setup to Clock at Pad (tSU or tSUF) (nsec)

\ From         C     C     C
 \             L     L     L
  \            K     K     K
   \           2     _     _
    \          X     F     I
     \         _     S     O
      \        I     B     B
       \       O            
        \      B            
         \                  
  To      \------------------

A_FSB<10>          7.9      
A_FSB<11>          7.9      
A_FSB<12>          7.9      
A_FSB<13>          7.9      
A_FSB<14>          7.9      
A_FSB<15>          7.9      
A_FSB<16>          7.9      
A_FSB<17>          7.9      
A_FSB<18>          7.9      
A_FSB<19>          7.9      
A_FSB<20>         15.6      
A_FSB<21>         16.6      
A_FSB<22>         16.6      
A_FSB<23>         16.6      
A_FSB<8>           7.9      
A_FSB<9>           7.9      
CLK_IOB      7.5            
E_IOB                    6.5
SW<1>              7.9      
nAS_FSB           15.6      
nBERR_IOB    7.5            
nBG_IOB      6.5            
nDTACK_IOB   6.5            
nIPL2              6.5      
nLDS_FSB           6.5      
nRES         6.5   6.5      
nUDS_FSB           6.5      
nVPA_IOB     6.5            
nWE_FSB            7.9      

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 B     I     I     I     R     R     R     R     R     T
 \                     E     O     P     P     E     E     E     E     e     i
  \                    R     R     L     L     S     S     S     S     f     m
   \                   R     W     2     2     D     r     r     r     A     e
    \                  _     0     r     r     o     0     1     2     c     o
     \                 I     .     0     1     n     .     .     .     k     u
      \                O     Q     .     .     e     Q     Q     Q     .     t
       \               B           Q     Q     .                       Q     A
        \              S                       Q                             .
         \             .                                                     Q
          \            Q                                                      
           \                                                                  
            \                                                                 
             \                                                                
              \                                                               
               \                                                              
                \                                                             
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D         10.0                                                      
IOL0.CE                                                                       
IOL0.D                                                                        
IOREQ.D                                                                       
IORW0.D                   11.4                                                
IOU0.CE                                                                       
IOU0.D                                                                        
IPL2r1.D                        10.0                                          
RESDone.CE                                        10.0  10.0  10.0            
RESr1.D                                           10.0                        
RESr2.D                                                 10.0                  
RefAck.D                                                                      
TimeoutA.D                                                                10.0
TimeoutB.D                                                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                       10.0      
cnt/TimeoutBPre.D                                                             
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D                                                                  
fsb/BERR1r.D        10.0                                                      
fsb/Ready0r.D                                                                 
fsb/Ready1r.D                                                                 
fsb/Ready2r.D                                                             11.0
fsb/VPA.D           11.4                                                  11.4
iobs/Clear1.D                                                                 
iobs/IOL1.CE                                                                  
iobs/IORW1.D                                                                  
iobs/IOReady.D                                                                
iobs/IOU1.CE                                                                  
iobs/Load1.D                                                                  
iobs/Once.D                                                                   
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D                                                            
nADoutLE1.D                                                                   
nBR_IOB.CE                      10.0  10.0  10.0  10.0  10.0  10.0            
nCAS.D                                                                        
nDTACK_FSB.D        11.4                                                  11.4
ram/BACTr.D                                                                   
ram/Once.D                                                                    
ram/RAMDIS1.D                                                                 
ram/RAMDIS2.D                                                                 
ram/RAMReady.D                                                                
ram/RASEL.D                                                                   
ram/RS_FSM_FFd1.D                                                             
ram/RS_FSM_FFd2.D                                                             
ram/RS_FSM_FFd3.D                                                             

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 T     c     c     c     c     c     c     c     c     c
 \                     i     n     n     n     n     n     n     n     n     n
  \                    m     t     t     t     t     t     t     t     t     t
   \                   e     /     /     /     /     /     /     /     /     /
    \                  o     R     R     R     R     R     R     R     R     R
     \                 u     e     e     e     e     e     e     e     e     e
      \                t     f     f     f     f     f     f     f     f     f
       \               B     C     C     C     C     C     C     C     C     D
        \              .     n     n     n     n     n     n     n     n     o
         \             Q     t     t     t     t     t     t     t     t     n
          \                  <     <     <     <     <     <     <     <     e
           \                 0     1     2     3     4     5     6     7     .
            \                >     >     >     >     >     >     >     >     Q
             \               .     .     .     .     .     .     .     .      
              \              Q     Q     Q     Q     Q     Q     Q     Q      
               \                                                              
                \                                                             
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D                                                                   
IOL0.CE                                                                       
IOL0.D                                                                        
IOREQ.D                                                                       
IORW0.D                                                                       
IOU0.CE                                                                       
IOU0.D                                                                        
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                                      
TimeoutA.D                10.0  10.0  10.0  10.0  10.0  10.0  10.0            
TimeoutB.D          10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
cnt/RefCnt<1>.D           10.0                                                
cnt/RefCnt<2>.D           10.0  10.0                                          
cnt/RefCnt<3>.D           10.0  10.0  10.0                                    
cnt/RefCnt<4>.D           10.0  10.0  10.0  10.0                              
cnt/RefCnt<5>.D           10.0  10.0  10.0  10.0  10.0                        
cnt/RefCnt<6>.D           10.0  10.0  10.0  10.0  10.0  10.0                  
cnt/RefCnt<7>.D           10.0  10.0  10.0  10.0  10.0  10.0  10.0            
cnt/RefDone.D             10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0
cnt/TimeoutBPre.D         10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D        10.0                                                      
fsb/BERR1r.D                                                                  
fsb/Ready0r.D                                                                 
fsb/Ready1r.D                                                                 
fsb/Ready2r.D                                                                 
fsb/VPA.D           19.1                                                      
iobs/Clear1.D                                                                 
iobs/IOL1.CE                                                                  
iobs/IORW1.D                                                                  
iobs/IOReady.D                                                                
iobs/IOU1.CE                                                                  
iobs/Load1.D                                                                  
iobs/Once.D                                                                   
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D                                                            
nADoutLE1.D                                                                   
nBR_IOB.CE                                                                    
nCAS.D                                                                        
nDTACK_FSB.D        19.1                                                      
ram/BACTr.D                                                                   
ram/Once.D                                                                    
ram/RAMDIS1.D                                           11.4  11.4  11.4  11.4
ram/RAMDIS2.D                                           11.0  11.0  11.0  11.0
ram/RAMReady.D                                          11.4  11.4  11.4  11.4
ram/RASEL.D                                             11.4  11.4  11.4  11.4
ram/RS_FSM_FFd1.D                                                             
ram/RS_FSM_FFd2.D                                       11.4  11.4  11.4  11.4
ram/RS_FSM_FFd3.D                                       11.0  11.0  11.0  11.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 c     c     c     f     f     f     f     f     f     f
 \                     n     s     s     s     s     s     s     s     s     s
  \                    t     /     /     b     b     b     b     b     b     b
   \                   /     n     n     /     /     /     /     /     /     /
    \                  T     O     O     A     B     B     R     R     R     V
     \                 i     v     v     S     E     E     e     e     e     P
      \                m     e     e     r     R     R     a     a     a     A
       \               e     r     r     f     R     R     d     d     d     .
        \              o     l     l     .     0     1     y     y     y     Q
         \             u     a     a     Q     r     r     0     1     2      
          \            t     y     y           .     .     r     r     r      
           \           B     0     1           Q     Q     .     .     .      
            \          P     .     .                       Q     Q     Q      
             \         r     Q     Q                                          
              \        e                                                      
               \       .                                                      
                \      Q                                                      
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D                           10.0                                    
IOL0.CE                                                                       
IOL0.D                                                                        
IOREQ.D                         11.0  10.0                                    
IORW0.D                         10.0  11.0                                    
IOU0.CE                                                                       
IOU0.D                                                                        
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                                      
TimeoutA.D                            10.0                                    
TimeoutB.D          10.0              10.0                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                                 
cnt/TimeoutBPre.D   10.0              10.0                                    
cs/nOverlay0.D            10.0        10.0                                    
cs/nOverlay1.CE                       10.0                                    
cs/nOverlay1.D            10.0                                                
fsb/BERR0r.D                          10.0  10.0                              
fsb/BERR1r.D                          10.0        10.0                        
fsb/Ready0r.D                   10.0  10.0              10.0                  
fsb/Ready1r.D                   11.0  10.0                    11.0            
fsb/Ready2r.D                   11.0  11.0                          11.0      
fsb/VPA.D                       20.1  19.1  11.4  11.4  20.1  11.4  11.4  11.4
iobs/Clear1.D                                                                 
iobs/IOL1.CE                                                                  
iobs/IORW1.D                    11.4  11.0                                    
iobs/IOReady.D                        10.0                                    
iobs/IOU1.CE                                                                  
iobs/Load1.D                    11.0  10.0                                    
iobs/Once.D                     11.4  10.0                                    
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D              11.0  10.0                                    
nADoutLE1.D                                                                   
nBR_IOB.CE                                                                    
nCAS.D                                                                        
nDTACK_FSB.D                    20.1  11.0  11.4  11.4  20.1  11.4  11.4      
ram/BACTr.D                           10.0                                    
ram/Once.D                      10.0  10.0                                    
ram/RAMDIS1.D                   11.4  11.0                                    
ram/RAMDIS2.D                   11.0  11.0                                    
ram/RAMReady.D                  11.0  11.0                                    
ram/RASEL.D                     11.4  11.4                                    
ram/RS_FSM_FFd1.D               10.0  10.0                                    
ram/RS_FSM_FFd2.D               11.4  11.4                                    
ram/RS_FSM_FFd3.D               11.0  11.0                                    

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 i     i     i     i     i     i     i     i     i     i
 \                     o     o     o     o     o     o     o     o     o     o
  \                    b     b     b     b     b     b     b     b     b     b
   \                   s     s     s     s     s     s     s     s     s     s
    \                  /     /     /     /     /     /     /     /     /     /
     \                 C     I     I     I     I     I     L     O     P     P
      \                l     O     O     O     O     O     o     n     S     S
       \               e     A     L     R     R     U     a     c     _     _
        \              a     C     1     W     e     1     d     e     F     F
         \             r     T     .     1     a     .     1     .     S     S
          \            1     r     Q     .     d     Q     .     Q     M     M
           \           .     .           Q     y           Q           _     _
            \          Q     Q                 .                       F     F
             \                                 Q                       F     F
              \                                                        d     d
               \                                                       1     2
                \                                                      .     .
                 \                                                     Q     Q
  To              \------------------------------------------------------------

ALE0S.D                                                             10.0  10.0
BERR_IOBS.D               10.0                                10.0        10.0
IOL0.CE                                                             10.0  10.0
IOL0.D                          10.0                                          
IOREQ.D                   10.0                                10.0  10.0  11.0
IORW0.D                               11.0                    11.4  11.4  11.4
IOU0.CE                                                             10.0  10.0
IOU0.D                                            10.0                        
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                                      
TimeoutA.D                                                                    
TimeoutB.D                                                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                                 
cnt/TimeoutBPre.D                                                             
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D                                                                  
fsb/BERR1r.D                                                                  
fsb/Ready0r.D                                                                 
fsb/Ready1r.D                               11.0                              
fsb/Ready2r.D                                                                 
fsb/VPA.D                                   11.4                              
iobs/Clear1.D                                                       10.0  10.0
iobs/IOL1.CE                                            10.0                  
iobs/IORW1.D                          10.0                    10.0  11.0  11.0
iobs/IOReady.D            10.0              10.0              10.0        10.0
iobs/IOU1.CE                                            10.0                  
iobs/Load1.D                                                  10.0  10.0  10.0
iobs/Once.D                                                   11.4  11.0  10.0
iobs/PS_FSM_FFd1.D        10.0                                      10.0  10.0
iobs/PS_FSM_FFd2.D        10.0                                10.0  11.0  11.0
nADoutLE1.D         10.0                                10.0                  
nBR_IOB.CE                                                                    
nCAS.D                                                                        
nDTACK_FSB.D                                11.4                              
ram/BACTr.D                                                                   
ram/Once.D                                                                    
ram/RAMDIS1.D                                                                 
ram/RAMDIS2.D                                                                 
ram/RAMReady.D                                                                
ram/RASEL.D                                                                   
ram/RS_FSM_FFd1.D                                                             
ram/RS_FSM_FFd2.D                                                             
ram/RS_FSM_FFd3.D                                                             

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 n     n     n     r     r     r     r     r     r     r
 \                     A     B     D     a     a     a     a     a     a     a
  \                    D     R     T     m     m     m     m     m     m     m
   \                   o     _     A     /     /     /     /     /     /     /
    \                  u     I     C     B     O     R     R     R     R     R
     \                 t     O     K     A     n     A     A     A     S     S
      \                L     B     _     C     c     M     M     S     _     _
       \               E     .     F     T     e     D     R     E     F     F
        \              1     Q     S     r     .     I     e     L     S     S
         \             .           B     .     Q     S     a     .     M     M
          \            Q           .     Q           2     d     Q     _     _
           \                       Q                 .     y           F     F
            \                                        Q     .           F     F
             \                                             Q           d     d
              \                                                        1     2
               \                                                       .     .
                \                                                      Q     Q
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D         10.0                                                      
IOL0.CE                                                                       
IOL0.D              10.0                                                      
IOREQ.D             11.0                                                      
IORW0.D             11.4                                                      
IOU0.CE                                                                       
IOU0.D              10.0                                                      
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                            10.0  10.0
TimeoutA.D                                                                    
TimeoutB.D                                                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                                 
cnt/TimeoutBPre.D                                                             
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D                                                                  
fsb/BERR1r.D                                                                  
fsb/Ready0r.D                                           10.0                  
fsb/Ready1r.D       11.0                                                      
fsb/Ready2r.D                                                                 
fsb/VPA.D           11.0  11.4                          20.1                  
iobs/Clear1.D       10.0                                                      
iobs/IOL1.CE                                                                  
iobs/IORW1.D        10.0                                                      
iobs/IOReady.D      10.0                                                      
iobs/IOU1.CE                                                                  
iobs/Load1.D        10.0                                                      
iobs/Once.D         11.0                                                      
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D  11.0                                                      
nADoutLE1.D         10.0                                                      
nBR_IOB.CE                                                                    
nCAS.D                                                        10.0            
nDTACK_FSB.D        11.0  11.4  11.4                    20.1                  
ram/BACTr.D                                                                   
ram/Once.D                                  10.0                    10.0  10.0
ram/RAMDIS1.D                         11.0  11.0                    11.4  11.0
ram/RAMDIS2.D                               11.0  11.0              11.0  11.0
ram/RAMReady.D                        11.0  11.0                    11.0  11.0
ram/RASEL.D                           11.0  11.4                    11.4  11.4
ram/RS_FSM_FFd1.D                           10.0                    10.0  10.0
ram/RS_FSM_FFd2.D                     11.0                          11.4  11.4
ram/RS_FSM_FFd3.D                           10.0                    11.0  11.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 r
 \                     a
  \                    m
   \                   /
    \                  R
     \                 S
      \                _
       \               F
        \              S
         \             M
          \            _
           \           F
            \          F
             \         d
              \        3
               \       .
                \      Q
                 \      
  To              \------

ALE0S.D                 
BERR_IOBS.D             
IOL0.CE                 
IOL0.D                  
IOREQ.D                 
IORW0.D                 
IOU0.CE                 
IOU0.D                  
IPL2r1.D                
RESDone.CE              
RESr1.D                 
RESr2.D                 
RefAck.D                
TimeoutA.D              
TimeoutB.D              
cnt/RefCnt<1>.D         
cnt/RefCnt<2>.D         
cnt/RefCnt<3>.D         
cnt/RefCnt<4>.D         
cnt/RefCnt<5>.D         
cnt/RefCnt<6>.D         
cnt/RefCnt<7>.D         
cnt/RefDone.D           
cnt/TimeoutBPre.D       
cs/nOverlay0.D          
cs/nOverlay1.CE         
cs/nOverlay1.D          
fsb/BERR0r.D            
fsb/BERR1r.D            
fsb/Ready0r.D           
fsb/Ready1r.D           
fsb/Ready2r.D           
fsb/VPA.D               
iobs/Clear1.D           
iobs/IOL1.CE            
iobs/IORW1.D            
iobs/IOReady.D          
iobs/IOU1.CE            
iobs/Load1.D            
iobs/Once.D             
iobs/PS_FSM_FFd1.D      
iobs/PS_FSM_FFd2.D      
nADoutLE1.D             
nBR_IOB.CE              
nCAS.D                  
nDTACK_FSB.D            
ram/BACTr.D             
ram/Once.D          10.0
ram/RAMDIS1.D       11.0
ram/RAMDIS2.D       11.0
ram/RAMReady.D      11.0
ram/RASEL.D         11.0
ram/RS_FSM_FFd1.D   10.0
ram/RS_FSM_FFd2.D   11.4
ram/RS_FSM_FFd3.D   11.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                               (Clock: CLK2X_IOB)

\ From                  I     I     i     i     i     i     i     i     i     i
 \                      O     O     o     o     o     o     o     o     o     o
  \                     A     B     b     b     b     b     b     b     b     b
   \                    C     E     m     m     m     m     m     m     m     m
    \                   T     R     /     /     /     /     /     /     /     /
     \                  .     R     B     B     B     B     D     D     E     E
      \                 Q     .     E     E     G     G     T     T     S     S
       \                      Q     R     R     r     r     A     A     <     <
        \                           R     R     0     1     C     C     0     1
         \                          r     r     .     .     K     K     >     >
          \                         f     r     Q     Q     r     r     .     .
           \                        .     .                 f     r     Q     Q
            \                       Q     Q                 .     .            
             \                                              Q     Q            
              \                                                                
               \                                                               
                \                                                              
                 \                                                             
                  \                                                            
  To               \------------------------------------------------------------

ALE0M.D                                                                        
IOACT.D                          10.0  10.0              11.0  11.0            
IOBERR.D                   11.0  11.0  11.0              11.0  11.0            
iobm/BGr1.D                                  10.0                              
iobm/ES<0>.D                                                         10.0  10.0
iobm/ES<1>.D                                                         10.0  10.0
iobm/ES<2>.D                                                         10.0  10.0
iobm/ES<3>.D                                                         10.0  10.0
iobm/ES<4>.D                                                         10.0  10.0
iobm/ETACK.D                                                         10.0  10.0
iobm/IOS_FSM_FFd1.D                                                            
iobm/IOS_FSM_FFd2.D              10.0  10.0              10.0  10.0            
iobm/IOS_FSM_FFd3.D                                                            
nAS_IOB.D                                                                      
nAoutOE.D                                    10.0  10.0                        
nDinLE.D                                                                       
nDoutOE.D                                                                      
nLDS_IOB.D                                                                     
nUDS_IOB.D                                                                     
nVMA_IOB.D           10.0                                            10.0  10.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                               (Clock: CLK2X_IOB)

\ From                  i     i     i     i     i     i     i     i     i     i
 \                      o     o     o     o     o     o     o     o     o     o
  \                     b     b     b     b     b     b     b     b     b     b
   \                    m     m     m     m     m     m     m     m     m     m
    \                   /     /     /     /     /     /     /     /     /     /
     \                  E     E     E     E     E     I     I     I     I     R
      \                 S     S     S     T     r     O     O     O     O     E
       \                <     <     <     A     2     R     S     S     S     S
        \               2     3     4     C     .     E     _     _     _     r
         \              >     >     >     K     Q     Q     F     F     F     f
          \             .     .     .     .           r     S     S     S     .
           \            Q     Q     Q     Q           .     M     M     M     Q
            \                                         Q     _     _     _      
             \                                              F     F     F      
              \                                             F     F     F      
               \                                            d     d     d      
                \                                           1     2     3      
                 \                                          .     .     .      
                  \                                         Q     Q     Q      
  To               \------------------------------------------------------------

ALE0M.D                                            10.0  10.0  10.0  10.0      
IOACT.D                                10.0        10.0  11.0  10.0  11.0  11.0
IOBERR.D                               10.0              11.0  11.0  11.0  11.0
iobm/BGr1.D                                                                    
iobm/ES<0>.D         10.0  10.0  10.0        10.0                              
iobm/ES<1>.D                                 10.0                              
iobm/ES<2>.D         10.0  10.0  10.0        10.0                              
iobm/ES<3>.D         10.0  10.0              10.0                              
iobm/ES<4>.D         10.0  10.0  10.0        10.0                              
iobm/ETACK.D         10.0  10.0  10.0                                          
iobm/IOS_FSM_FFd1.D                                      10.0  10.0  10.0      
iobm/IOS_FSM_FFd2.D                    10.0              10.0  10.0  10.0  10.0
iobm/IOS_FSM_FFd3.D                                10.0  10.0  10.0  10.0      
nAS_IOB.D                                                10.0  10.0  10.0      
nAoutOE.D                                                                      
nDinLE.D                                                 10.0  10.0            
nDoutOE.D                                                      10.0  10.0      
nLDS_IOB.D                                               10.0  10.0  10.0      
nUDS_IOB.D                                               10.0  10.0  10.0      
nVMA_IOB.D           10.0  10.0  10.0                                          

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                               (Clock: CLK2X_IOB)

\ From                  i     i     i     n     n     n
 \                      o     o     o     A     A     V
  \                     b     b     b     S     o     M
   \                    m     m     m     _     u     A
    \                   /     /     /     I     t     _
     \                  R     V     V     O     O     I
      \                 E     P     P     B     E     O
       \                S     A     A     .     .     B
        \               r     r     r     Q     Q     .
         \              r     f     r                 Q
          \             .     .     .                  
           \            Q     Q     Q                  
            \                                          
             \                                         
              \                                        
               \                                       
                \                                      
                 \                                     
                  \                                    
  To               \------------------------------------

ALE0M.D                                      10.0      
IOACT.D              11.0                    10.0      
IOBERR.D             11.0                              
iobm/BGr1.D                                            
iobm/ES<0>.D                                           
iobm/ES<1>.D                                           
iobm/ES<2>.D                                           
iobm/ES<3>.D                                           
iobm/ES<4>.D                                           
iobm/ETACK.D                                       10.0
iobm/IOS_FSM_FFd1.D                                    
iobm/IOS_FSM_FFd2.D  10.0                              
iobm/IOS_FSM_FFd3.D                          10.0      
nAS_IOB.D                                              
nAoutOE.D                              10.0  10.0      
nDinLE.D                                               
nDoutOE.D                                              
nLDS_IOB.D                                             
nUDS_IOB.D                                             
nVMA_IOB.D                 10.0  10.0              10.0

Path Type Definition: 

Pad to Pad (tPD) -                        Reports pad to pad paths that start 
                                          at input pads and end at output pads. 
                                          Paths are not traced through 
                                          registers. 

Clock Pad to Output Pad (tCO) -           Reports paths that start at input 
                                          pads trace through clock inputs of 
                                          registers and end at output pads. 
                                          Paths are not traced through PRE/CLR 
                                          inputs of registers. 

Setup to Clock at Pad (tSU or tSUF) -     Reports external setup time of data 
                                          to clock at pad. Data path starts at 
                                          an input pad and ends at register 
                                          (Fast Input Register for tSUF) D/T 
                                          input. Clock path starts at input pad 
                                          and ends at the register clock input. 
                                          Paths are not traced through 
                                          registers. Pin-to-pin setup 
                                          requirement is not reported or 
                                          guaranteed for product-term clocks 
                                          derived from macrocell feedback 
                                          signals. 

Clock to Setup (tCYC) -                   Register to register cycle time. 
                                          Include source register tCO and 
                                          destination register tSU. Note that 
                                          when the computed Maximum Clock Speed 
                                          is limited by tCYC it is computed 
                                          assuming that all registers are 
                                          rising-edge sensitive. 

\ No newline at end of file diff --git a/cpld/XC95144XL/MXSE_xst.xrpt b/cpld/XC95144XL/WarpSE_xst.xrpt similarity index 87% rename from cpld/XC95144XL/MXSE_xst.xrpt rename to cpld/XC95144XL/WarpSE_xst.xrpt index d261941..7a00b13 100644 --- a/cpld/XC95144XL/MXSE_xst.xrpt +++ b/cpld/XC95144XL/WarpSE_xst.xrpt @@ -5,7 +5,7 @@ The structure and the elements are likely to change over the next few releases. This means code written to parse this file will need to be revisited each subsequent release.--> - +
@@ -45,7 +45,7 @@ - + @@ -54,16 +54,16 @@
- + - + - + - + - + @@ -101,24 +101,24 @@
- - + + - +
- - - - - - - - + + + + + + + + diff --git a/cpld/XC95144XL/_impact.cmd b/cpld/XC95144XL/_impact.cmd deleted file mode 100644 index 3e5d201..0000000 --- a/cpld/XC95144XL/_impact.cmd +++ /dev/null @@ -1,41 +0,0 @@ -setMode -bs -setMode -bs -setMode -bs -setMode -bs -setCable -port svf -file "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.svf" -addDevice -p 1 -file "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.jed" -Erase -p 1 -Program -p 1 -e -v -setMode -bs -setMode -bs -setMode -ss -setMode -sm -setMode -hw140 -setMode -spi -setMode -acecf -setMode -acempm -setMode -pff -setMode -bs -saveProjectFile -file "\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf" -setMode -bs -setMode -bs -setMode -ss -setMode -sm -setMode -hw140 -setMode -spi -setMode -acecf -setMode -acempm -setMode -pff -setMode -bs -saveProjectFile -file "\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf" -setMode -bs -setMode -bs -deleteDevice -position 1 -setMode -bs -setMode -ss -setMode -sm -setMode -hw140 -setMode -spi -setMode -acecf -setMode -acempm -setMode -pff diff --git a/cpld/XC95144XL/_impact.log b/cpld/XC95144XL/_impact.log deleted file mode 100644 index 8480969..0000000 --- a/cpld/XC95144XL/_impact.log +++ /dev/null @@ -1,77 +0,0 @@ -iMPACT Version: 14.7 - -iMPACT log file Started on Sun Mar 27 10:19:44 2022 - -Welcome to iMPACT -iMPACT Version: 14.7 -Project: \\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf created. -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : setCable -port svf -file"//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.svf" -// *** BATCH CMD : addDevice -p 1 -file"//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.jed" -'1': Loading file '//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.jed' ... -done. -INFO:iMPACT:1777 - - Reading C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.bsd... -INFO:iMPACT:501 - '1': Added Device xc95144xl successfully. ----------------------------------------------------------------------- -INFO:iMPACT - Current time: 3/27/2022 10:20:16 AM -WARNING:iMPACT - Warning: SVF Programming of 9500 series CPLDs is not supported by every third-party boundary-scan tool provider. Please check for support before using this SVF file to program a 9500 series device. -// *** BATCH CMD : Erase -p 1 - -'1': Erasing device... -'1': Erasure completed successfully. -PROGRESS_START - Starting Operation. -PROGRESS_END - End Operation. -Elapsed time = 0 sec. -INFO:iMPACT - Current time: 3/27/2022 10:20:29 AM -WARNING:iMPACT - Warning: SVF Programming of 9500 series CPLDs is not supported by every third-party boundary-scan tool provider. Please check for support before using this SVF file to program a 9500 series device. -// *** BATCH CMD : Program -p 1 -e -v - -'1': Erasing device... -'1': Erasure completed successfully. -'1': Programming device... -PROGRESS_START - Starting Operation. -done. -'1': Putting device in ISP mode...done. -'1': Putting device in ISP mode...done. -'1': Verifying device...done. -'1': Verification completed successfully. -'1': Putting device in ISP mode...done. -'1': Programming completed successfully. -PROGRESS_END - End Operation. -Elapsed time = 3 sec. -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : setMode -ss -// *** BATCH CMD : setMode -sm -// *** BATCH CMD : setMode -hw140 -// *** BATCH CMD : setMode -spi -// *** BATCH CMD : setMode -acecf -// *** BATCH CMD : setMode -acempm -// *** BATCH CMD : setMode -pff -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : saveProjectFile -file"\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf" -Backup of auto project '\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project_1.ipf'created. -Project: '\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf' created. -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : setMode -ss -// *** BATCH CMD : setMode -sm -// *** BATCH CMD : setMode -hw140 -// *** BATCH CMD : setMode -spi -// *** BATCH CMD : setMode -acecf -// *** BATCH CMD : setMode -acempm -// *** BATCH CMD : setMode -pff -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : saveProjectFile -file"\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf" -// *** BATCH CMD : setMode -bs -INFO:iMPACT - Launching WebTalk, please refer to the webtalk log at \\192.168.64.1\Repos\Warp-SE\cpld\webtalk.log for details. -INFO:iMPACT - Running wbtc successfully. -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : deleteDevice -position 1 -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : setMode -ss -// *** BATCH CMD : setMode -sm -// *** BATCH CMD : setMode -hw140 -// *** BATCH CMD : setMode -spi -// *** BATCH CMD : setMode -acecf -// *** BATCH CMD : setMode -acempm -// *** BATCH CMD : setMode -pff diff --git a/cpld/XC95144XL/_ngo/netlist.lst b/cpld/XC95144XL/_ngo/netlist.lst index 0a665c5..1fee18a 100644 --- a/cpld/XC95144XL/_ngo/netlist.lst +++ b/cpld/XC95144XL/_ngo/netlist.lst @@ -1,2 +1,2 @@ -\\192.168.64.1\Repos\Warp-SE\cpld\XC95144XL\MXSE.ngc 1648390021 +Z:\Warp-SE\cpld\XC95144XL\WarpSE.ngc 1648475108 OK diff --git a/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs b/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs index 7efb20c..4b77844 100644 --- a/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs +++ b/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs @@ -5,7 +5,7 @@ behavior or data corruption. It is strongly advised that users do not edit the contents of this file. --> -Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'MXSE.ise'. +Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'WarpSE.ise'. Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC constraint 'P22'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored. diff --git a/cpld/XC95144XL/_xmsgs/hprep6.xmsgs b/cpld/XC95144XL/_xmsgs/hprep6.xmsgs deleted file mode 100644 index c42b14a..0000000 --- a/cpld/XC95144XL/_xmsgs/hprep6.xmsgs +++ /dev/null @@ -1,9 +0,0 @@ - - - - - diff --git a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs index 2b18975..d77c5ee 100644 --- a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs +++ b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs @@ -8,7 +8,25 @@ -Analyzing Verilog file "//192.168.64.1/Repos/Warp-SE/cpld/MXSE.v" into library work +Analyzing Verilog file "Z:/Warp-SE/cpld/CNT.v" into library work + + +Analyzing Verilog file "Z:/Warp-SE/cpld/CS.v" into library work + + +Analyzing Verilog file "Z:/Warp-SE/cpld/FSB.v" into library work + + +Analyzing Verilog file "Z:/Warp-SE/cpld/IOBM.v" into library work + + +Analyzing Verilog file "Z:/Warp-SE/cpld/IOBS.v" into library work + + +Analyzing Verilog file "Z:/Warp-SE/cpld/RAM.v" into library work + + +Analyzing Verilog file "Z:/Warp-SE/cpld/WarpSE.v" into library work diff --git a/cpld/XC95144XL/_xmsgs/xst.xmsgs b/cpld/XC95144XL/_xmsgs/xst.xmsgs index 78dca83..0a93d02 100644 --- a/cpld/XC95144XL/_xmsgs/xst.xmsgs +++ b/cpld/XC95144XL/_xmsgs/xst.xmsgs @@ -16,11 +16,11 @@ You should achieve better results by setting this init to 1. -The value init of the FF/Latch RESDone hinder the constant cleaning in the block MXSE. +The value init of the FF/Latch RESDone hinder the constant cleaning in the block WarpSE. You should achieve better results by setting this init to 1. -The value init of the FF/Latch Disable hinder the constant cleaning in the block MXSE. +The value init of the FF/Latch Disable hinder the constant cleaning in the block WarpSE. You should achieve better results by setting this init to 1. diff --git a/cpld/XC95144XL/iseconfig/MXSE.xreport b/cpld/XC95144XL/iseconfig/MXSE.xreport index 45d4fe8..5de4388 100644 --- a/cpld/XC95144XL/iseconfig/MXSE.xreport +++ b/cpld/XC95144XL/iseconfig/MXSE.xreport @@ -1,33 +1,33 @@
- 2022-03-27T09:50:01 + 2022-03-28T09:27:54 MXSE - 2022-03-27T09:48:59 - //192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/iseconfig/MXSE.xreport - //192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\ - 2022-02-07T03:25:12 + 2022-03-28T09:27:01 + Z:/Warp-SE/cpld/XC95144XL/iseconfig/MXSE.xreport + Z:/Warp-SE/cpld/XC95144XL\ + 2022-03-28T09:18:55 false
- + - @@ -54,7 +54,7 @@ - diff --git a/cpld/XC95144XL/iseconfig/WarpSE.projectmgr b/cpld/XC95144XL/iseconfig/WarpSE.projectmgr new file mode 100644 index 0000000..9af9f47 --- /dev/null +++ b/cpld/XC95144XL/iseconfig/WarpSE.projectmgr @@ -0,0 +1,88 @@ + + + + + + + + + 2 + /MXSE Z:|Warp-SE|cpld|WarpSE.v + + + WarpSE (Z:/Warp-SE/cpld/WarpSE.v) + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000000d2000000020000000000000000000000000200000064ffffffff000000810000000300000002000000d20000000100000003000000000000000100000003 + true + WarpSE (Z:/Warp-SE/cpld/WarpSE.v) + + + + 1 + Implement Design/Synthesize - XST + User Constraints + + + Generate Timing + + 7 + 0 + 000000ff0000000000000001000000010000000000000000000000000000000000000000000000012b000000010000000100000000000000000000000064ffffffff0000008100000000000000010000012b0000000100000000 + false + Generate Timing + + + + 1 + + + 0 + 0 + 000000ff000000000000000100000000000000000100000000000000000000000000000000000002b3000000040101000100000000000000000000000064ffffffff0000008100000000000000040000004900000001000000000000009d0000000100000000000000660000000100000000000001670000000100000000 + false + CNT.v + + + + 1 + work + + + 0 + 0 + 000000ff00000000000000010000000000000000010000000000000000000000000000000000000109000000010001000100000000000000000000000064ffffffff000000810000000000000001000001090000000100000000 + false + work + + + + 1 + User Constraints + + + + + 0 + 0 + 000000ff0000000000000001000000010000000000000000000000000000000000000000000000010c000000010000000100000000000000000000000064ffffffff0000008100000000000000010000010c0000000100000000 + false + + + + + 1 + + + Design Utilities + + 0 + 0 + 000000ff0000000000000001000000010000000000000000000000000000000000000000000000010c000000010000000100000000000000000000000064ffffffff0000008100000000000000010000010c0000000100000000 + false + Design Utilities + + 000000ff00000000000000020000011b0000011b01000000050100000002 + Implementation + diff --git a/cpld/XC95144XL/iseconfig/MXSE 2.xreport b/cpld/XC95144XL/iseconfig/WarpSE.xreport similarity index 78% rename from cpld/XC95144XL/iseconfig/MXSE 2.xreport rename to cpld/XC95144XL/iseconfig/WarpSE.xreport index 6bba386..0803afd 100644 --- a/cpld/XC95144XL/iseconfig/MXSE 2.xreport +++ b/cpld/XC95144XL/iseconfig/WarpSE.xreport @@ -1,33 +1,33 @@
- 2021-12-11T06:56:18 - MXSE - 2021-10-23T06:51:21 - C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL/iseconfig/MXSE.xreport - C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL\ - 2021-10-07T05:05:00 + 2022-03-28T09:36:17 + WarpSE + Unknown + Z:/Warp-SE/cpld/XC95144XL/iseconfig/WarpSE.xreport + Z:/Warp-SE/cpld/XC95144XL\ + 2022-03-28T09:29:43 false
- + - @@ -54,7 +54,7 @@ - diff --git a/cpld/XC95144XL/webtalk_pn.xml b/cpld/XC95144XL/webtalk_pn.xml index 120e65b..461191f 100644 --- a/cpld/XC95144XL/webtalk_pn.xml +++ b/cpld/XC95144XL/webtalk_pn.xml @@ -3,12 +3,12 @@ - +
- + - - + +
@@ -18,14 +18,19 @@ This means code written to parse this file will need to be revisited each subseq + - - + + + + + + diff --git a/cpld/XC95144XL/xlnx_auto_0_xdb/cst 2.xbcd b/cpld/XC95144XL/xlnx_auto_0_xdb/cst 2.xbcd deleted file mode 100644 index c3e3d2e88b9d1968f39de81c3b8b305475f60ba9..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 4466 zcmW+(c{r3`8-5MLWRN|(23fL{eGnxfB1`tQq3jyQGWLeXh!CO0E+J$HW$e?aEZH;J zMrI;e!u*sBD&O>-Kkjp1_xn80egARZ>s-erB*sZo*Yx5^=F(O7)%&-rt7{`-<~ECu zB}ky7`u)3mwi(eX?gI0uFYsUAN4@MNr0W-Qt6cUhjZnv2Kc5Ox85A9S!($GyC`6UP z#`Ep*sAU;!jsVFTV?X4Gx3|1zsRX{LRF$6+d-No>a-n3u_o&E+L8n#zNzf|X9-iMz zIxIWtwsCtN=!UQ#o0px={%o7g>M8lL*x8KIJ|$ADGN1Q8t8eM+M&_5d1GO)A7*o%} zuSeGXnNnY(HzlI{2Q|#DmcnmEN-DW_Ud?jQA&Pe@RR5f;&CT6ezVUS`UBLh6XgY1_ z>(ar*PX1kWmjHKAZ`@&gT*KewN|S|swO}O=cz|oS$)=>!?VjH8q)1T@J^Sxs>w(>r z(_C<~4eF%2!UKfl+6ekY!_zCWOV@&FrOTf@2#()ZInF?-FBXGZ4jQ&nPN_YLV?Ts` zihHs+k?!leA(#E1*Q&U3UjL00s<069!ChUYEdS&82fxI&kv@c?vR=%{J6n9#lEyEA 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- Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. - -

-

- This page displays the current iMPACT device usage statistics that will be sent to Xilinx using WebTalk. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - diff --git a/cpld/impact_impact.xwbt b/cpld/impact_impact.xwbt deleted file mode 100644 index 4349c44..0000000 --- a/cpld/impact_impact.xwbt +++ /dev/null @@ -1,8 +0,0 @@ -INTSTYLE=impact -INFILE=\\192.168.64.1\Repos\Warp-SE\cpld\impact.xsl -OUTFILE=\\192.168.64.1\Repos\Warp-SE\cpld\impact.xsl -FAMILY=Single -PART=Single -WORKINGDIR=\\192.168.64.1\Repos\Warp-SE\cpld -LICENSE=iMPACT -USER_INFO=iMPACT diff --git a/cpld/usage_statistics_webtalk.html b/cpld/usage_statistics_webtalk.html deleted file mode 100644 index 5d71c39..0000000 --- a/cpld/usage_statistics_webtalk.html +++ /dev/null @@ -1,73 +0,0 @@ -Device Usage Statistics Report - -

Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
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Software Version and Target Device
Product Version:ISE:14.7 (iMPACT) - P.20131013Target Family:Single
OS Platform:NTTarget Device:Single
Project ID (random number)62b3f0bb02a74d88a0c5830d0cba1df9.5dd6e529715843fb8382f9253b38abd3.1Target Package:
Registration IDiMPACTTarget Speed:
Date Generated2022-03-27T10:22:52Tool FlowIMPACT
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iMPACT Project Info
Use Project File=YesProject Entry=ise
OS Name=Microsoft Windows 7User Lic. Info=212056110_0_0_574
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iMPACT SVF File Mode
Chain Summary
Number of device=1Number of Xilinx device=1Number of Non-Xilinx device=0
Chain Description
Device1=xc9500xlPart1=xc95144xl
Boundary Scan Operations Statistics
SVF Operation=Erase -p 0 SVF Operation=Program -p 0 -e -v
Cable Summary
Cable Type=FILECable Speed=0Port=SVFLocal_Server_Mode=Local
- diff --git a/cpld/webtalk.log b/cpld/webtalk.log deleted file mode 100644 index 2cd6d53..0000000 --- a/cpld/webtalk.log +++ /dev/null @@ -1,16 +0,0 @@ -Release 14.7 - WebTalk (P.20131013) -Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. - -Project Information --------------------- -ProjectID=5dd6e529715843fb8382f9253b38abd3 -ProjectIteration=1 - -WebTalk Summary ----------------- -INFO:WebTalk:2 - WebTalk is enabled. - -INFO:WebTalk:8 - WebTalk Install setting is ON. -INFO:WebTalk:6 - WebTalk User setting is ON. - -INFO:WebTalk:5 - //192.168.64.1/Repos/Warp-SE/cpld/usage_statistics_webtalk.html WebTalk report has not been sent to Xilinx. Please check your network and proxy settings. For additional details about this file, please refer to the WebTalk help file at C:/Xilinx/14.7/ISE_DS/ISE/data/reports/webtalk_introduction.html diff --git a/cpld/webtalk_impact.xml b/cpld/webtalk_impact.xml deleted file mode 100644 index 47aeac9..0000000 --- a/cpld/webtalk_impact.xml +++ /dev/null @@ -1,41 +0,0 @@ - - - - -
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