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Change pins to fix BERR issue

This commit is contained in:
Zane Kaminski 2022-02-14 16:39:11 -05:00
parent 5e234b9382
commit a9b70fc4e7
1 changed files with 80 additions and 76 deletions
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156
cpld/MXSE.ucf
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@ -1,76 +1,80 @@
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "A_FSB[10]" LOC = "P8" ;
NET "A_FSB[11]" LOC = "P9" ;
NET "A_FSB[12]" LOC = "P10" ;
NET "A_FSB[13]" LOC = "P11" ;
NET "A_FSB[14]" LOC = "P12" ;
NET "A_FSB[15]" LOC = "P13" ;
NET "A_FSB[16]" LOC = "P14" ;
NET "A_FSB[17]" LOC = "P15" ;
NET "A_FSB[18]" LOC = "P16" ;
NET "A_FSB[19]" LOC = "P17" ;
NET "A_FSB[1]" LOC = "P94" ;
NET "A_FSB[20]" LOC = "P18" ;
NET "A_FSB[21]" LOC = "P19" ;
NET "A_FSB[22]" LOC = "P20" ;
NET "A_FSB[23]" LOC = "P24" ;
NET "A_FSB[2]" LOC = "P95" ;
NET "A_FSB[3]" LOC = "P96" ;
NET "A_FSB[4]" LOC = "P97" ;
NET "A_FSB[5]" LOC = "P2" ;
NET "A_FSB[6]" LOC = "P3" ;
NET "A_FSB[7]" LOC = "P4" ;
NET "A_FSB[8]" LOC = "P6" ;
NET "A_FSB[9]" LOC = "P7" ;
NET "CLK2X_IOB" LOC = "P22" ;
NET "CLK_FSB" LOC = "P27" ;
NET "CLK_IOB" LOC = "P23" ;
NET "E_IOB" LOC = "P25" ;
NET "nADoutLE0" LOC = "P85" ;
NET "nADoutLE1" LOC = "P82" ;
NET "nAoutOE" LOC = "P87" ;
NET "nAS_FSB" LOC = "P32" ;
NET "nAS_IOB" LOC = "P81" ;
NET "nBERR_FSB" LOC = "P70" ;
NET "nBERR_IOB" LOC = "P76" ;
NET "nCAS" LOC = "P36" ;
NET "nDinLE" LOC = "P86" ;
NET "nDinOE" LOC = "P90" ;
NET "nDoutOE" LOC = "P89" ;
NET "nDTACK_FSB" LOC = "P28" ;
NET "nDTACK_IOB" LOC = "P78" ;
NET "nLDS_FSB" LOC = "P30" ;
NET "nLDS_IOB" LOC = "P79" ;
NET "nOE" LOC = "P37" ;
NET "nRAMLWE" LOC = "P65" ;
NET "nRAMUWE" LOC = "P66" ;
NET "nRAS" LOC = "P64" ;
NET "nRES" LOC = "P91" ;
NET "nROMCS" LOC = "P35" ;
NET "nROMWE" LOC = "P34" ;
NET "nUDS_FSB" LOC = "P33" ;
NET "nUDS_IOB" LOC = "P80" ;
NET "nVMA_IOB" LOC = "P74" ;
NET "nVPA_FSB" LOC = "P93" ;
NET "nVPA_IOB" LOC = "P77" ;
NET "nWE_FSB" LOC = "P29" ;
NET "RA[0]" LOC = "P53" ;
NET "RA[10]" LOC = "P55" ;
NET "RA[11]" LOC = "P63" ;
NET "RA[1]" LOC = "P50" ;
NET "RA[2]" LOC = "P43" ;
NET "RA[3]" LOC = "P41" ;
NET "RA[4]" LOC = "P40" ;
NET "RA[5]" LOC = "P42" ;
NET "RA[6]" LOC = "P46" ;
NET "RA[7]" LOC = "P52" ;
NET "RA[8]" LOC = "P54" ;
NET "RA[9]" LOC = "P56" ;
#PACE: Start of PACE Area Constraints
#PACE: Start of PACE Prohibit Constraints
#PACE: End of Constraints generated by PACE
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "A_FSB[10]" LOC = "P8" ;
NET "A_FSB[11]" LOC = "P9" ;
NET "A_FSB[12]" LOC = "P10" ;
NET "A_FSB[13]" LOC = "P11" ;
NET "A_FSB[14]" LOC = "P12" ;
NET "A_FSB[15]" LOC = "P13" ;
NET "A_FSB[16]" LOC = "P14" ;
NET "A_FSB[17]" LOC = "P15" ;
NET "A_FSB[18]" LOC = "P16" ;
NET "A_FSB[19]" LOC = "P17" ;
NET "A_FSB[1]" LOC = "P94" ;
NET "A_FSB[20]" LOC = "P18" ;
NET "A_FSB[21]" LOC = "P19" ;
NET "A_FSB[22]" LOC = "P20" ;
NET "A_FSB[23]" LOC = "P24" ;
NET "A_FSB[2]" LOC = "P95" ;
NET "A_FSB[3]" LOC = "P96" ;
NET "A_FSB[4]" LOC = "P97" ;
NET "A_FSB[5]" LOC = "P2" ;
NET "A_FSB[6]" LOC = "P3" ;
NET "A_FSB[7]" LOC = "P4" ;
NET "A_FSB[8]" LOC = "P6" ;
NET "A_FSB[9]" LOC = "P7" ;
NET "CLK2X_IOB" LOC = "P22" ;
NET "CLK_FSB" LOC = "P27" ;
NET "CLK_IOB" LOC = "P23" ;
NET "E_IOB" LOC = "P25" ;
NET "nADoutLE0" LOC = "P85" ;
NET "nADoutLE1" LOC = "P82" ;
NET "nAoutOE" LOC = "P87" ;
NET "nAS_FSB" LOC = "P32" ;
NET "nAS_IOB" LOC = "P81" ;
NET "nBERR_FSB" LOC = "P70" ;
NET "nBERR_IOB" LOC = "P76" ;
NET "nCAS" LOC = "P36" ;
NET "nDinLE" LOC = "P86" ;
NET "nDinOE" LOC = "P90" ;
NET "nDoutOE" LOC = "P89" ;
NET "nDTACK_FSB" LOC = "P28" ;
NET "nDTACK_IOB" LOC = "P78" ;
NET "nLDS_FSB" LOC = "P30" ;
NET "nLDS_IOB" LOC = "P79" ;
NET "nOE" LOC = "P37" ;
NET "nRAMLWE" LOC = "P65" ;
NET "nRAMUWE" LOC = "P66" ;
NET "nRAS" LOC = "P64" ;
NET "nRES" LOC = "P91" ;
NET "nROMCS" LOC = "P35" ;
NET "nROMWE" LOC = "P34" ;
NET "nUDS_FSB" LOC = "P33" ;
NET "nUDS_IOB" LOC = "P80" ;
NET "nVMA_IOB" LOC = "P74" ;
NET "nVPA_FSB" LOC = "P93" ;
NET "nVPA_IOB" LOC = "P77" ;
NET "nWE_FSB" LOC = "P29" ;
NET "RA[0]" LOC = "P53" ;
NET "RA[10]" LOC = "P55" ;
NET "RA[11]" LOC = "P63" ;
NET "RA[1]" LOC = "P50" ;
NET "RA[2]" LOC = "P43" ;
NET "RA[3]" LOC = "P41" ;
NET "RA[4]" LOC = "P40" ;
NET "RA[5]" LOC = "P42" ;
NET "RA[6]" LOC = "P46" ;
NET "RA[7]" LOC = "P52" ;
NET "RA[8]" LOC = "P54" ;
NET "RA[9]" LOC = "P56" ;
#PACE: Start of PACE Area Constraints
#PACE: Start of PACE Prohibit Constraints
#PACE: End of Constraints generated by PACE
#Created by Constraints Editor (xc95144xl-tq100-10) - 2022/02/07
NET "CLK_FSB" TNM_NET = CLK_FSB;
TIMESPEC TS_CLK_FSB = PERIOD "CLK_FSB" 25 MHz HIGH 50%;
NET "CLK2X_IOB" TNM_NET = CLK2X_IOB;
TIMESPEC TS_CLK2X_IOB = PERIOD "CLK2X_IOB" 15.6672 MHz HIGH 50%;
NET "CLK_IOB" TNM_NET = CLK_IOB;
TIMESPEC TS_CLK_IOB = PERIOD "CLK_IOB" 7.8336 MHz HIGH 50%;