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Revert "Additional sound QoS"

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This reverts commit 3a8f07e71be1645293ea642adaef451a92467c0e.
This commit is contained in:
Zane Kaminski 2024-09-29 07:13:23 -04:00
parent 3a8f07e71b
commit adef8da4be
1 changed files with 5 additions and 32 deletions
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37
cpld/CNT.v
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@ -71,53 +71,26 @@ module CNT(
end end
end end
/* I/O QoS select register */
reg IOQoSCSr;
always @(posedge CLK) IOQoSCSr <= IOQoSCS;
/* QoS select register */ /* QoS select register */
reg SndQoSCSr; reg QoSCSr;
always @(posedge CLK) SndQoSCSr <= SndQoSCS; always @(posedge CLK) QoSCSr <= IOQoSCS || SndQoSCS;
/* I/O QoS timer */ /* I/O QoS timer */
reg [2:0] IOQS; reg [2:0] IOQS;
always @(posedge CLK) begin always @(posedge CLK) begin
if (!nRESr || (BACTr && (IOQoSCSr || SndQoSCSr))) IOQS[2:0] <= 1; if (!nRESr || (BACTr && QoSCSr)) IOQS[2:0] <= 1;
else if (IOQS==0) IOQS[2:0] <= 0; else if (IOQS==0) IOQS[2:0] <= 0;
else if (EFall && TimerTC) IOQS[2:0] <= IOQS[2] ? 0 : IOQS+1; else if (EFall && TimerTC) IOQS[2:0] <= IOQS[2] ? 0 : IOQS+1;
end end
/* Sound QoS timer */
reg [1:0] SndQS;
always @(posedge CLK) begin
if (BACTr && SndQoSCSr) SndQS[1:0] <= 1;
else if (BACTr && IOQoSCSr) SndQS[1:0] <= 0;
else if (SndQS==0) SndQS[1:0] <= 0;
else if (EFall && TimerTC) SndQS[1:0] <= SndQS+1;
end
/* I/O QoS enable */ /* I/O QoS enable */
always @(posedge CLK) if (!BACT) IOQoSEN <= IOQS!=0; always @(posedge CLK) if (!BACT) IOQoSEN <= IOQS!=0;
/* Sound QoS enable */
always @(posedge CLK) if (!BACT) SndQoSEN <= SndQS!=0;
/* MC68K clock enable */ /* MC68K clock enable */
always @(posedge CLK) MCKE <= BACT || BACTr || (IOQS==0) || C8MFall; always @(posedge CLK) MCKE <= BACT || BACTr || (IOQS==0) || C8MFall;
/* Sound QoS wait state control */ /* Sound QoS removed */
reg [4:0] Wait; assign SndQoSReady = 1;
always @(posedge CLK) begin
if (!BACT) Wait <= 0;
else Wait <= Wait+1;
end
/* Sound QoS ready control */
always @(posedge CLK) begin
if (!BACT) SndQoSReady <= !SndQoSEN;
else if (BACTr) IOQoSCSr <= 1;
else if (Wait==5'h1F) SndQoSReady <= 1;
end
/* Startup sequence state control */ /* Startup sequence state control */
wire ISTC = EFall && TimerTC && LTimerTC; wire ISTC = EFall && TimerTC && LTimerTC;