diff --git a/cpld/CS.v b/cpld/CS.v
index 672ca7c..0e43d03 100644
--- a/cpld/CS.v
+++ b/cpld/CS.v
@@ -16,6 +16,8 @@ module CS(
 	always @(posedge CLK, negedge nRES) begin
 		if (~nRES) nOverlay0 <= 0;
 		else if (BACT && ODCS) nOverlay0 <= 1;
+	end
+	always @(posedge CLK) begin
 		if (~BACT) nOverlay1 <= nOverlay0;
 	end
 
diff --git a/cpld/IOBM.v b/cpld/IOBM.v
index 7910548..bebbec3 100644
--- a/cpld/IOBM.v
+++ b/cpld/IOBM.v
@@ -1,22 +1,14 @@
 module IOBM(
 	/* PDS interface */
-	input C16M, input C8M, input E,
+	input C16M, input C8M, input E, input Er,
 	output reg nASout, output reg nLDS, output reg nUDS, output reg nVMA,
-	input nASin, input nBG, input nDTACK, input nVPA, input nBERR, input nRES,
+	input nDTACK, input nVPA, input nBERR, input nRES,
 	/* PDS address and data latch control */
 	input AoutOE, output nDoutOE, output reg ALE0, output reg nDinLE,
 	/* IO bus slave port interface */
 	output reg IOACT, output reg IOBERR, 
 	input IOREQ, input IOLDS, input IOUDS, input IOWE);
 
-	/* Bus grant recognition */
-	reg nASr;
-	reg BG = 0;
-	always @(posedge C16M) begin
-		nASr <= nASin;
-		if (nASr) BG <= !nBG;
-	end
-
 	/* I/O bus slave port input synchronization */
 	reg IOREQr = 0;
 	always @(negedge C16M) begin IOREQr <= IOREQ; end
@@ -42,9 +34,7 @@ module IOBM(
 
 	/* E clock state */
 	reg [4:0] ES;
-	reg Er;
 	reg Er2;
-	always @(negedge C8M) begin Er <= E; end
 	always @(posedge C16M) begin Er2 <= Er; end
 	always @(posedge C16M) begin
 		if (Er2 && ~Er) ES <= 1;
@@ -64,7 +54,7 @@ module IOBM(
 	reg [2:0] IOS = 0;
 	always @(posedge C16M) begin
 		if (IOS==0) begin
-			if (~C8M && IOREQr && BG) IOS <= 1;
+			if (~C8M && IOREQr && AoutOE) IOS <= 1;
 			else IOS <= 0;
 			IOACT <= IOREQr;
 			ALE0 <= IOREQr;
diff --git a/cpld/WarpSE.v b/cpld/WarpSE.v
index 472ac88..d25eda1 100644
--- a/cpld/WarpSE.v
+++ b/cpld/WarpSE.v
@@ -38,13 +38,16 @@ module WarpSE(
 	output nDinLE,
 	input [3:1] SW,
 	output C20MEN,
-	output C25MEN);
+	output C25MEN);	
 
 	/* Reset input and open-drain output */
 	wire nRESin = nRES;
 	wire nRESout;
 	assign nRES = !nRESout ? 1'b0 : 1'bZ;
 
+	/* E clock registration */
+	reg Er; always @(negedge C8M) begin Er <= E; end
+
 	/* AS cycle detection */
 	wire BACT;
 
@@ -103,32 +106,32 @@ module WarpSE(
 		ALE1);
 	
 	wire AoutOE;
+	assign nAoutOE = !AoutOE;
 	wire nAS_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout;
-	assign nAS_IOB = AoutOE ? 1'bZ : nAS_IOBout;
-	assign nLDS_IOB = AoutOE ? 1'bZ : nLDS_IOBout;
-	assign nUDS_IOB = AoutOE ? 1'bZ : nUDS_IOBout;
-	assign nVMA_IOB = AoutOE ? 1'bZ : nVMA_IOBout;
+	assign nAS_IOB = AoutOE ? nAS_IOBout : 1'bZ;
+	assign nLDS_IOB = AoutOE ? nLDS_IOBout : 1'bZ;
+	assign nUDS_IOB = AoutOE ? nUDS_IOBout : 1'bZ;
+	assign nVMA_IOB = AoutOE ? nVMA_IOBout : 1'bZ;
 	IOBM iobm(
 		/* PDS interface */
-		C16M, C8M, E,
+		C16M, C8M, E, Er,
 		nAS_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout,
-		nAS_IOB, nBG_IOB, nDTACK_IOB, nVPA_IOB, nBERR_IOB, nRESin,
+		nDTACK_IOB, nVPA_IOB, nBERR_IOB, nRESin,
 		/* PDS address and data latch control */
 		AoutOE, nDoutOE, ALE0M, nDinLE,
 		/* IO bus slave port interface */
 		IOACT, IOBERR,
 		IOREQ, IOL0, IOU0, IORW0);
 
-	
 	CNT cnt(
 		/* C8M and E clocks */
-		C8M, E,
+		C8M, E, Er,
 		/* Refresh request */
 		RefReq, RefUrgent,
 		/* Reset, switch, button */
 		SW[3:1], nRESout, nIPL2, 
 		/* Mac PDS bus master control outputs */
-		nAoutOE, AoutOE, nBR_IOB, 
+		AoutOE, nBR_IOB, 
 		/* Configuration outputs */
 		FastROMEN, C20MEN, C25MEN);
 	
diff --git a/cpld/XC95144XL/WarpSE.bld b/cpld/XC95144XL/WarpSE.bld
index 09a190b..89d0346 100644
--- a/cpld/XC95144XL/WarpSE.bld
+++ b/cpld/XC95144XL/WarpSE.bld
@@ -30,7 +30,7 @@ NGDBUILD Design Results Summary:
   Number of errors:     0
   Number of warnings:   0
 
-Total memory usage is 155236 kilobytes
+Total memory usage is 154596 kilobytes
 
 Writing NGD file "WarpSE.ngd" ...
 Total REAL time to NGDBUILD completion:  3 sec
diff --git a/cpld/XC95144XL/WarpSE.cmd_log b/cpld/XC95144XL/WarpSE.cmd_log
index 1cd9427..8d7980e 100644
--- a/cpld/XC95144XL/WarpSE.cmd_log
+++ b/cpld/XC95144XL/WarpSE.cmd_log
@@ -219,3 +219,60 @@ cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlr
 XSLTProcess WarpSE_build.xml 
 tsim -intstyle ise WarpSE WarpSE.nga 
 hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd 
+XSLTProcess WarpSE_build.xml 
+tsim -intstyle ise WarpSE WarpSE.nga 
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE 
diff --git a/cpld/XC95144XL/WarpSE.gise b/cpld/XC95144XL/WarpSE.gise
index 02f5ed0..51a4c06 100644
--- a/cpld/XC95144XL/WarpSE.gise
+++ b/cpld/XC95144XL/WarpSE.gise
@@ -79,7 +79,7 @@
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1679370835" xil_pn:in_ck="5474524715461797957" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="1233756204182495024" xil_pn:start_ts="1679370818">
+    <transform xil_pn:end_ts="1679719937" xil_pn:in_ck="5474524715461797957" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="1233756204182495024" xil_pn:start_ts="1679719920">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
@@ -100,41 +100,50 @@
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1679370841" xil_pn:in_ck="814020912342028692" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="1893441463969615248" xil_pn:start_ts="1679370835">
+    <transform xil_pn:end_ts="1679719943" xil_pn:in_ck="814020912342028692" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="1893441463969615248" xil_pn:start_ts="1679719937">
+      <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="ReadyToRun"/>
+      <outfile xil_pn:name="WarpSE.bld"/>
+      <outfile xil_pn:name="WarpSE.ngd"/>
+      <outfile xil_pn:name="WarpSE_ngdbuild.xrpt"/>
+      <outfile xil_pn:name="_ngo"/>
+      <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
+    </transform>
+    <transform xil_pn:end_ts="1679719962" xil_pn:in_ck="4179227257693753" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="6759205406869966736" xil_pn:start_ts="1679719943">
+      <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="WarningsGenerated"/>
+      <status xil_pn:value="ReadyToRun"/>
+      <outfile xil_pn:name="WarpSE.gyd"/>
+      <outfile xil_pn:name="WarpSE.mfd"/>
+      <outfile xil_pn:name="WarpSE.nga"/>
+      <outfile xil_pn:name="WarpSE.pad"/>
+      <outfile xil_pn:name="WarpSE.pnx"/>
+      <outfile xil_pn:name="WarpSE.rpt"/>
+      <outfile xil_pn:name="WarpSE.tim"/>
+      <outfile xil_pn:name="WarpSE.tspec"/>
+      <outfile xil_pn:name="WarpSE.vm6"/>
+      <outfile xil_pn:name="WarpSE.xml"/>
+      <outfile xil_pn:name="WarpSE_build.xml"/>
+      <outfile xil_pn:name="WarpSE_html"/>
+      <outfile xil_pn:name="WarpSE_pad.csv"/>
+    </transform>
+    <transform xil_pn:end_ts="1679719964" xil_pn:in_ck="4179227257702617" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1679719962">
+      <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="ReadyToRun"/>
+      <outfile xil_pn:name="WarpSE.jed"/>
+    </transform>
+    <transform xil_pn:end_ts="1679717159" xil_pn:in_ck="4179227257689331" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-154879694275837835" xil_pn:start_ts="1679717157">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
       <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForOutputs"/>
-      <status xil_pn:value="InputRemoved"/>
-      <status xil_pn:value="OutputRemoved"/>
+      <status xil_pn:value="InputChanged"/>
     </transform>
-    <transform xil_pn:end_ts="1679370859" xil_pn:in_ck="4179227257693753" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="6759205406869966736" xil_pn:start_ts="1679370841">
-      <status xil_pn:value="SuccessfullyRun"/>
-      <status xil_pn:value="WarningsGenerated"/>
-      <status xil_pn:value="NotReadyToRun"/>
-      <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
-      <status xil_pn:value="OutOfDateForOutputs"/>
-      <status xil_pn:value="InputRemoved"/>
-      <status xil_pn:value="OutputRemoved"/>
-    </transform>
-    <transform xil_pn:end_ts="1679370861" xil_pn:in_ck="4179227257702617" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1679370859">
-      <status xil_pn:value="SuccessfullyRun"/>
-      <status xil_pn:value="NotReadyToRun"/>
-      <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
-      <status xil_pn:value="OutOfDateForOutputs"/>
-      <status xil_pn:value="InputRemoved"/>
-      <status xil_pn:value="OutputRemoved"/>
-    </transform>
-    <transform xil_pn:end_ts="1679361550" xil_pn:in_ck="4179227257702617" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="2785262643" xil_pn:start_ts="1679361548">
+    <transform xil_pn:end_ts="1679717148" xil_pn:in_ck="4179227257702617" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="2785262643" xil_pn:start_ts="1679717146">
       <status xil_pn:value="AbortedRun"/>
       <status xil_pn:value="WarningsGenerated"/>
-      <status xil_pn:value="NotReadyToRun"/>
+      <status xil_pn:value="ReadyToRun"/>
       <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
       <status xil_pn:value="InputChanged"/>
-      <status xil_pn:value="InputRemoved"/>
     </transform>
   </transforms>
 
diff --git a/cpld/XC95144XL/WarpSE.gyd b/cpld/XC95144XL/WarpSE.gyd
index 6a2529e..8d88775 100644
--- a/cpld/XC95144XL/WarpSE.gyd
+++ b/cpld/XC95144XL/WarpSE.gyd
@@ -30,7 +30,6 @@ E S:PIN25
 FCLK S:PIN27
 nAS_FSB S:PIN32
 nBERR_IOB S:PIN76
-nBG_IOB S:PIN73
 nDTACK_IOB S:PIN78
 nIPL2 S:PIN92
 nLDS_FSB S:PIN30
@@ -52,7 +51,6 @@ RA<6> S:PIN46
 RA<7> S:PIN52
 RA<8> S:PIN54
 RA<9> S:PIN56
-nAoutOE S:PIN87
 nBR_IOB S:PIN72
 nDTACK_FSB S:PIN28
 nAS_IOB S:PIN81
@@ -63,6 +61,7 @@ nVMA_IOB S:PIN74
 nBERR_FSB S:PIN70
 nADoutLE0 S:PIN85
 nADoutLE1 S:PIN82
+nAoutOE S:PIN87
 nDinOE S:PIN90
 nDoutOE S:PIN89
 nOE S:PIN37
@@ -78,43 +77,42 @@ nCAS S:PIN36
 ;The remaining section of the .gyd file is for documentation purposes only.
 ;It shows where your internal equations were placed in the last successful fit.
 
-PARTITION FB1_1 iobm/nASr iobm/VPArr iobm/VPArf iobm/RESrr
-		 iobm/RESrf iobm/IOREQr iobm/Er2 iobm/Er
-		 iobm/DTACKrr iobm/DTACKrf iobm/BERRrr iobm/BERRrf
-		 cnt/IPL2r iobm/IOS_FSM_FFd1 iobm/BG iobs/IOU0
-		 iobs/IOL0 iobm/IOS_FSM_FFd3
-PARTITION FB2_7 ram/RegUrgentSync ram/RefUrgent ram/RefReqSync ram/RefReq
-		 ram/RefRAS ram/BACTr iobs/IOACTr iobs/ALE0
-		 fsb/ASrf iobs/PS_FSM_FFd1 iobs/IOU1 iobs/IOL1
-		
-PARTITION FB3_1 EXP14_ fsb/VPA EXP15_
-PARTITION FB3_5 iobs/Clear1 fsb/Ready0r iobs/IOReady EXP16_
-		 fsb/nDTACK fsb/Ready1r EXP17_ iobs/IORW1
-		 EXP18_ EXP19_ iobs/IORW0 EXP20_
-		 nROMWE_OBUF EXP21_
-PARTITION FB4_1 cnt/nRESout cnt/AoutOE cnt/TimerTC cnt/Timer<0>
-		 nDoutOE_OBUF nDinOE_OBUF cnt/PORS_FSM_FFd2 N0
-		 cnt/LTimer<0> cnt/Timer<3> nVPA_FSB_OBUF cnt/Timer<2>
-		 cnt/Timer<1> cnt/RefUrgent cnt/RefReq cnt/LTimer<3>
-		 cnt/LTimer<2> cnt/LTimer<1>
+PARTITION FB1_1 ram/RegUrgentSync ram/RefUrgent ram/RefReqSync ram/RefReq
+		 ram/RefRAS iobs/IOACTr fsb/ASrf iobs/IOU1
+		 iobs/IOL1 cnt/TimerTC iobs/IOU0 iobs/IOL0
+		 cnt/Timer<3> cnt/Timer<2> cnt/Timer<1> cnt/RefUrgent
+		 iobs/IOReady cnt/RefReq
+PARTITION FB2_9 iobm/VPArr iobm/VPArf iobm/RESrr iobm/RESrf
+		 iobm/IOREQr iobm/Er2 iobm/Er iobm/DTACKrr
+		 iobm/DTACKrf cnt/Timer<0>
+PARTITION FB3_1 fsb/VPA EXP14_ EXP15_
+PARTITION FB3_5 EXP16_ EXP17_ iobs/IOREQ EXP18_
+		 fsb/nDTACK fsb/Ready1r EXP19_ iobs/IORW1
+		 EXP20_ EXP21_ iobs/IORW0 EXP22_
+		 nROMWE_OBUF EXP23_
+PARTITION FB4_1 EXP24_ nAoutOE_OBUF iobm/BERRrr iobm/BERRrf
+		 nDoutOE_OBUF nDinOE_OBUF cnt/PORS_FSM_FFd1 N0
+		 cnt/IPL2r iobm/IOS_FSM_FFd1 nVPA_FSB_OBUF cnt/nRESout
+		 cnt/PORS_FSM_FFd2 cnt/LTimer<0> cnt/LTimer<3> cnt/LTimer<2>
+		 cnt/LTimer<1> iobm/IOBERR
 PARTITION FB5_1 ram/RASEL nROMCS_OBUF ram/RefDone cs/nOverlay1
-		 ram/nCAS nOE_OBUF ram/RS_FSM_FFd1 cs/nOverlay0
+		 ram/nCAS nOE_OBUF fsb/Ready0r cs/nOverlay0
 		 RA_4_OBUF ram/RAMEN RA_3_OBUF RA_5_OBUF
-		 ram/RS_FSM_FFd2 RA_2_OBUF RA_6_OBUF EXP22_
-		 ram/RAMReady EXP23_
+		 ram/RS_FSM_FFd2 RA_2_OBUF RA_6_OBUF EXP25_
+		 ram/RAMReady EXP26_
 PARTITION FB6_1 iobm/ETACK iobm/nVMA iobm/DoutOE iobm/ALE0
-		 iobm/ES<3> iobm/ES<1> iobm/ES<0> iobm/ES<4>
-		 iobm/nLDS iobm/IOS_FSM_FFd2 iobm/nUDS iobm/nASout
-		 iobm/ES<2> nADoutLE1_OBUF nADoutLE0_OBUF iobm/IOACT
-		 iobm/nDinLE iobm/IOBERR
+		 iobm/IOS_FSM_FFd3 iobm/ES<3> iobm/ES<1> iobm/ES<0>
+		 iobm/nLDS iobm/ES<4> iobm/nUDS iobm/nASout
+		 iobm/IOS_FSM_FFd2 nADoutLE1_OBUF nADoutLE0_OBUF iobm/ES<2>
+		 iobm/nDinLE iobm/IOACT
 PARTITION FB7_1 cnt/LTimer<13> RA_1_OBUF cnt/LTimer<9> cnt/LTimer<8>
 		 RA_7_OBUF RA_0_OBUF cnt/LTimer<7> RA_8_OBUF
 		 A_FSB_21_IBUF$BUF0 cnt/LTimer<6> RA_9_OBUF N1
 		 cnt/LTimer<5> N1$BUF0 cnt/LTimer<4> cnt/LTimer<12>
 		 cnt/LTimer<11> cnt/LTimer<10>
-PARTITION FB8_1 cnt/PORS_FSM_FFd1 A_FSB_19_IBUF$BUF0 ram/RS_FSM_FFd3
-PARTITION FB8_5 nRAS_OBUF nRAMLWE_OBUF iobs/PS_FSM_FFd2 nRAMUWE_OBUF
-		 EXP24_ iobs/Load1 EXP25_ iobs/nBERR_FSB
-		 EXP26_ iobs/IOREQ cnt/nBR_IOB EXP27_
-		 iobs/Once EXP28_
+PARTITION FB8_1 iobs/Once A_FSB_19_IBUF$BUF0 iobs/Clear1 iobs/ALE0
+		 nRAS_OBUF nRAMLWE_OBUF iobs/PS_FSM_FFd1 nRAMUWE_OBUF
+		 ram/RS_FSM_FFd1 EXP27_ ram/RS_FSM_FFd3 iobs/nBERR_FSB
+		 EXP28_ iobs/PS_FSM_FFd2 cnt/nBR_IOB iobs/Load1
+		 ram/BACTr EXP29_
 
diff --git a/cpld/XC95144XL/WarpSE.jed b/cpld/XC95144XL/WarpSE.jed
index 4d5e8fe..a1b9a1c 100644
--- a/cpld/XC95144XL/WarpSE.jed
+++ b/cpld/XC95144XL/WarpSE.jed
@@ -1,5 +1,5 @@
 Programmer Jedec Bit Map
-Date Extracted: Mon Mar 20 23:54:20 2023
+Date Extracted: Sat Mar 25 00:52:43 2023
 
 QF93312*
 QP100*
@@ -90,546 +90,546 @@ N PPMAP 153 95*
 N PPMAP 155 96*
 N PPMAP 157 97*
 N PPMAP 160 99*
-L0000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0000064 00000000 00000000 00000000 00100100 00000000 00000000 00000000 00000000*
-L0000128 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0000192 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0000256 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0000320 00000000 00000000 00000000 00000100 01011000 00000000 00000000 00000000*
-L0000384 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0000448 00000000 00000000 00000000 00000000 00010000 00000000 00000000 00000000*
-L0000512 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
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-L0000816 000000 000000 000000 000000 000000 000000 000000 000000*
-L0000864 00000000 00000000 00000100 10100100 00000000 00000000 00000000 10000000*
-L0000928 00000000 00000000 00000100 00000000 00000000 00010000 00000000 00000000*
-L0000992 00000000 00000000 00010100 00000000 00000000 00000100 00000000 00000000*
-L0001056 00000000 00000000 10110100 00000000 00000000 00000000 00000000 00000000*
-L0001120 00000000 00000000 10100100 00000000 00000000 00000000 00000000 00000000*
-L0001184 00000000 00000000 00000000 00000000 00000000 00000000 00010000 00000000*
-L0001248 00000000 00000000 00101100 00000000 00011000 00000000 00000000 00000000*
-L0001312 00000000 00000000 00001100 00000100 00001000 00000000 00000000 00000000*
-L0001376 00000000 00000000 10101100 00000000 00110000 00000000 00000000 00000000*
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-L0001728 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
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-L0087712 00000000 00000000 00000100 00000000 00000000 00000000 00000000 10000000*
-L0087776 00000000 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
-L0087840 000000 000000 001000 000000 000000 000000 000000 000000*
-L0087888 000000 000000 101001 000000 000000 000000 100011 000000*
-L0087936 000000 000000 101001 000000 000000 000000 000000 000000*
-L0087984 000000 000000 101001 000000 000000 000000 000000 000000*
-L0088032 000000 000000 101001 000000 000000 000000 000000 000000*
-L0088080 000000 000000 101001 000000 000000 000000 000000 000000*
-L0088128 01000000 00000000 00000100 00000000 00000000 00000000 00000000 00001000*
-L0088192 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00101000*
-L0088256 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00101000*
-L0088320 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00101000*
-L0088384 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00111000*
-L0088448 01000000 00000000 00001000 00000000 00000000 00000000 00000000 00001000*
-L0088512 00000000 00000000 00001100 00000000 00000000 00001000 00000000 00100000*
-L0088576 00000000 00000000 00011100 00000000 00000000 00000000 00000000 00101000*
-L0088640 00000000 00000000 00001100 00000000 00000000 00000000 00000000 00101000*
-L0088704 000000 000000 000010 000000 000000 000000 000000 001010*
-L0088752 000000 000000 000010 000000 000000 000000 000000 010000*
-L0088800 000000 000000 000010 000000 000000 000000 000000 010100*
-L0088848 000000 000000 010010 000000 000000 000000 000000 010110*
-L0088896 000000 000000 010010 000000 000000 000000 000000 010110*
-L0088944 000000 000000 010010 000000 000000 000000 000000 010110*
-L0088992 00000000 00000100 00000000 00000000 00000000 00000000 01000000 00100000*
-L0089056 00000000 00000000 00000000 00000000 00000000 00000000 10000100 00000100*
-L0089120 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
-L0089184 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086912 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086976 000000 000000 001000 000000 000000 000000 000000 000000*
+L0087024 000000 000000 001000 000000 000000 000000 000000 000000*
+L0087072 000000 000000 000001 000000 000000 000000 000000 000000*
+L0087120 000000 000000 000001 000000 000000 000000 000000 000000*
+L0087168 000000 000000 000001 000000 000000 000000 000000 000000*
+L0087216 000000 000000 000001 000000 000000 000000 000000 000000*
+L0087264 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0087328 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0087392 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0087456 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0087520 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0087584 00000000 00000000 00000000 00000000 00000000 00000000 00100000 00000000*
+L0087648 00000000 00000000 00000000 00000000 00000000 00000000 00100000 00000000*
+L0087712 00000000 00000000 00000000 00000000 00000000 00000000 00100000 00000000*
+L0087776 00000000 00000000 00000000 00000000 00000000 00000000 00100000 00000000*
+L0087840 000000 000000 000000 000000 000000 000000 001000 000000*
+L0087888 000000 000000 000000 000000 000000 000000 000000 000000*
+L0087936 000000 000000 000000 000010 000000 000000 000000 000000*
+L0087984 000000 000000 000000 000010 000000 000000 000000 000000*
+L0088032 000000 000000 000000 000000 000000 000000 000000 000000*
+L0088080 000000 000000 000000 000000 000000 000000 000000 000000*
+L0088128 00000000 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
+L0088192 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0088256 00000000 00000000 00100100 00000000 00000000 00000000 01111100 00100000*
+L0088320 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0088384 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0088448 00000000 00000000 01001000 00000000 00000000 00000000 00000000 00000000*
+L0088512 00000000 00000000 01000100 00000000 00000000 10010000 00000000 00000000*
+L0088576 00000000 00000000 01001100 00000000 00000000 01000000 00000100 00000000*
+L0088640 00010000 00000000 01001000 00000000 00000000 00000000 00000000 00000000*
+L0088704 000000 000000 010010 000000 000000 000000 000000 000000*
+L0088752 000000 000000 010000 000000 000000 000000 000000 000000*
+L0088800 000000 000001 010000 000000 000000 001100 000000 000000*
+L0088848 000000 000000 010000 000000 000000 000000 100011 000000*
+L0088896 000100 000000 010000 000000 000000 000000 000000 000000*
+L0088944 000000 000000 010100 000000 000000 000000 000000 000000*
+L0088992 00000000 00000000 00000000 00000000 00000000 00000000 11111100 00000000*
+L0089056 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089120 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089184 00000000 00000000 00000000 00000000 00000000 00000000 11111100 00000000*
 L0089248 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0089312 00000000 00001000 01000000 01000000 00000000 00000000 00000000 00000000*
-L0089376 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000100*
-L0089440 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
-L0089504 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0089312 00000000 00000000 00000000 01000000 00000000 00000000 00000100 00000000*
+L0089376 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089440 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089504 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
 L0089568 000000 000000 000000 000000 000000 000000 000000 000000*
-L0089616 000000 000000 000000 000000 000000 000000 000000 000000*
-L0089664 000000 000000 000000 000000 000000 000000 100001 000000*
-L0089712 000000 000000 000000 000000 000000 000000 100001 000000*
-L0089760 000000 000000 000000 000000 000000 000000 000000 000000*
+L0089616 000000 000000 000000 000000 000000 000000 100011 000000*
+L0089664 000000 000000 000010 000000 000000 000000 000000 000000*
+L0089712 000000 000000 000000 000000 000000 000000 000000 000000*
+L0089760 000000 000000 000000 000000 000000 000000 100011 000000*
 L0089808 000000 000000 000000 000000 000000 000000 000000 000000*
-L0089856 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
-L0089920 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
-L0089984 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00100000*
-L0090048 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00100000*
-L0090112 00000000 00000000 00000100 00000000 00000100 00000000 00000000 00110000*
-L0090176 00000000 00001000 00001000 00000000 00000000 00000000 00000000 00000000*
-L0090240 00000000 00000000 00001100 00100000 00000000 00000000 00000000 00100000*
-L0090304 00000000 00000000 00001100 00000000 10000000 00000000 00000000 00100000*
-L0090368 00000000 00000000 00001100 00000000 00000100 00000000 00000000 00100000*
-L0090432 000000 000000 000010 000000 000001 000000 000000 001000*
-L0090480 000000 000000 000000 000000 000000 000000 000000 010000*
-L0090528 000000 000000 000000 000000 000000 000000 000000 010000*
-L0090576 000000 000000 000010 000000 010010 000000 000000 010000*
-L0090624 000000 000000 000010 000000 111100 000000 000000 010000*
-L0090672 000000 000000 000010 000000 001111 000000 000000 010000*
-L0090720 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00100100*
-L0090784 00000000 00000100 00000000 10000000 00000000 00000000 00000000 00100000*
-L0090848 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0089856 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089920 00000100 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089984 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
+L0090048 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0090112 00000000 00000000 00000000 00000000 00000100 00000000 00000000 00000000*
+L0090176 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0090240 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00010000*
+L0090304 00000000 00000000 00000000 00000000 10000000 00000000 00000000 01000000*
+L0090368 00000000 00000000 00000000 00000000 00000100 00000000 00000000 00100000*
+L0090432 000000 000000 000000 000000 000001 000000 000000 001000*
+L0090480 000000 000000 000000 000000 000000 000000 000000 000000*
+L0090528 000001 000000 000000 000000 000000 000000 000000 000000*
+L0090576 000001 000000 000000 000000 000010 000000 000000 000000*
+L0090624 000000 000000 000000 000000 101100 000000 000000 000000*
+L0090672 000000 000000 000000 000000 001111 000000 000000 000010*
+L0090720 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0090784 00011000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
+L0090848 00000100 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
 L0090912 00000000 00000000 00000000 00000000 00000100 00000000 00000000 00000000*
-L0090976 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
-L0091040 00100000 00000000 00000000 00000000 00000000 00000000 10000000 00001000*
-L0091104 00000000 00000000 00000000 00000000 10000000 00000000 00000000 00001000*
-L0091168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0091232 00000000 00000000 00000000 00000000 10000000 00000000 00000000 00000000*
-L0091296 000000 000000 000000 000000 100000 000000 000000 000001*
-L0091344 000000 000000 000100 000000 000000 000000 000000 000000*
-L0091392 000000 000000 000000 000000 011110 000000 000000 000000*
-L0091440 000000 000000 010000 000000 001100 000000 000000 000000*
-L0091488 000000 000000 010000 000000 000011 000000 000000 000000*
-L0091536 000000 000000 010000 000000 000000 000000 000000 000000*
+L0090976 00000000 00000000 00000000 00000000 00000000 00001000 00000000 00000000*
+L0091040 00000000 00000000 00000000 00000000 00000000 00000000 10000000 10010000*
+L0091104 00000000 00000000 00000000 00000000 10000000 00000000 00000000 11100000*
+L0091168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10100000*
+L0091232 00000000 00000000 00000000 00000000 10000000 00000000 00000000 10000000*
+L0091296 000000 000000 000000 000000 100000 000000 000000 100000*
+L0091344 000000 000011 000000 000000 000000 000000 000000 000000*
+L0091392 000000 000000 000000 000000 001110 000000 000000 000100*
+L0091440 000000 000000 000000 000000 001100 000000 000000 000101*
+L0091488 000001 000000 000000 000000 000011 000000 000000 000101*
+L0091536 000000 000000 000000 000000 000000 000001 000000 000101*
 L0091584 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
 L0091648 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0091712 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0091776 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0091712 00000000 00000000 00000000 00000000 00010000 00000000 00000000 00000000*
+L0091776 00000000 00000000 00001000 00000000 00010000 00000000 00000000 00000000*
 L0091840 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
 L0091904 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0091968 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0092032 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
-L0092096 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
-L0092160 000000 000000 000000 000000 000000 000001 000000 000000*
+L0091968 00000000 00000000 00000000 00100000 00000000 00000000 00000000 00000000*
+L0092032 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0092096 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0092160 000000 000000 000000 000000 000000 000000 000000 000000*
 L0092208 000000 000000 000000 000000 000000 000000 000000 000000*
-L0092256 000000 000000 000000 000000 000000 000000 000000 000000*
-L0092304 000000 000000 000000 000000 000000 000001 000000 000000*
-L0092352 000000 000000 000000 000000 000000 000000 000000 000000*
-L0092400 000000 000000 000000 000000 000000 000000 000000 000000*
-L0092448 00100000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
-L0092512 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
-L0092576 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
-L0092640 00000000 00000000 10110100 00000000 00000000 00000000 00000000 00000000*
-L0092704 00000000 00000000 10100100 00000000 00000000 00000000 00100000 00000000*
-L0092768 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0092832 00000000 00000000 00000100 00000000 00000000 00000100 00000000 00000000*
-L0092896 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
-L0092960 00000000 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
-L0093024 000000 000000 001000 000000 000000 000000 000000 000000*
-L0093072 000000 000000 101001 000000 000010 000001 000000 000000*
-L0093120 000000 000000 101001 000000 000000 000001 001000 000000*
-L0093168 000000 000000 101001 000000 000000 000000 000000 000000*
-L0093216 000000 000000 101001 000000 000000 000001 000000 000000*
-L0093264 000000 000000 101001 000000 000000 000001 000000 000000*
-C64A1*
-2BD4
+L0092256 000000 000000 000000 000000 101000 000000 000000 000000*
+L0092304 000000 000000 000000 000000 001000 000000 000000 000000*
+L0092352 000000 000000 000000 000000 001000 000000 000000 000000*
+L0092400 000000 000000 000000 000000 001000 000000 000000 000000*
+L0092448 00000000 00000000 00000000 00000000 10001000 00000000 00000000 00000000*
+L0092512 00000000 00000000 00000000 00000000 00001000 00000000 00000000 00000000*
+L0092576 00000000 00000000 00000000 00000000 10001000 00000000 00000000 00000000*
+L0092640 00000000 00000000 00100100 00000000 10000000 00000000 00000000 00000000*
+L0092704 00000000 00000000 00100100 00000000 00000000 00000000 00100000 00000000*
+L0092768 00000000 00000000 10000000 00000000 00000100 00000000 00000000 00000000*
+L0092832 00000000 00000000 11000100 00000000 00000000 00000000 00000000 00000000*
+L0092896 00000000 00000000 11000100 00000000 00000000 00000000 00000000 00000000*
+L0092960 00000000 00000000 11000000 00000000 00000000 00000000 00000000 00000000*
+L0093024 000000 000000 110000 000000 000000 000000 000000 000000*
+L0093072 010000 000000 100000 000000 000000 000000 000000 000000*
+L0093120 000000 000000 101000 000100 000000 000000 001000 000000*
+L0093168 000000 000000 101000 000000 000000 000000 000000 000000*
+L0093216 000000 000000 001000 000000 000000 000000 000000 000000*
+L0093264 000000 000000 001000 000000 000000 000000 000000 000000*
+C81CE*
+2BA9
diff --git a/cpld/XC95144XL/WarpSE.mfd b/cpld/XC95144XL/WarpSE.mfd
index b68c198..2fe7f52 100644
--- a/cpld/XC95144XL/WarpSE.mfd
+++ b/cpld/XC95144XL/WarpSE.mfd
@@ -4,7 +4,7 @@ MACROCELL | 5 | 1 | iobm/nVMA
 ATTRIBUTES | 4622082 | 0
 OUTPUTMC | 2 | 5 | 1 | 5 | 0
 INPUTS | 10 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>  | iobm/IOACT  | iobm/VPArf  | iobm/VPArr  | nAoutOE
-INPUTMC | 10 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 15 | 0 | 2 | 0 | 1 | 3 | 1
+INPUTMC | 10 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 17 | 1 | 9 | 1 | 8 | 3 | 1
 EQ | 7 | 
    nVMA_IOB.T = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
 	!iobm/ES<3> & !iobm/ES<4>
@@ -12,25 +12,13 @@ EQ | 7 |
 	!iobm/ES<3> & !iobm/ES<4> & iobm/IOACT & iobm/VPArf & 
 	iobm/VPArr;
    nVMA_IOB.CLK = C16M;	// GCK
-   nVMA_IOB.OE = nAoutOE;
-GLOBALS | 1 | 2 | C16M
-
-MACROCELL | 5 | 11 | iobm/nASout
-ATTRIBUTES | 8816386 | 0
-OUTPUTMC | 1 | 0 | 0
-INPUTS | 4 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | nAoutOE
-INPUTMC | 4 | 0 | 13 | 5 | 9 | 0 | 17 | 3 | 1
-EQ | 4 | 
-   nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2
-	# iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2;
-   !nAS_IOB.CLK = C16M;	// GCK
-   nAS_IOB.OE = nAoutOE;
+   nVMA_IOB.OE = !nAoutOE;
 GLOBALS | 1 | 2 | C16M
 
 MACROCELL | 5 | 8 | iobm/nLDS
 ATTRIBUTES | 8685314 | 0
 INPUTS | 6 | iobs/IOL0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | iobs/IORW0  | nAoutOE
-INPUTMC | 6 | 0 | 16 | 0 | 17 | 5 | 9 | 0 | 13 | 2 | 14 | 3 | 1
+INPUTMC | 6 | 0 | 11 | 5 | 4 | 5 | 12 | 3 | 9 | 2 | 14 | 3 | 1
 EQ | 8 | 
    !nLDS_IOB.D = iobs/IOL0 & !iobm/IOS_FSM_FFd3 & 
 	iobm/IOS_FSM_FFd2
@@ -39,13 +27,13 @@ EQ | 8 |
 	# !iobs/IORW0 & iobs/IOL0 & iobm/IOS_FSM_FFd3 & 
 	!iobm/IOS_FSM_FFd1;
    !nLDS_IOB.CLK = C16M;	// GCK
-   nLDS_IOB.OE = nAoutOE;
+   nLDS_IOB.OE = !nAoutOE;
 GLOBALS | 1 | 2 | C16M
 
 MACROCELL | 5 | 10 | iobm/nUDS
 ATTRIBUTES | 8685314 | 0
 INPUTS | 6 | iobs/IOU0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | iobs/IORW0  | nAoutOE
-INPUTMC | 6 | 0 | 15 | 0 | 17 | 5 | 9 | 0 | 13 | 2 | 14 | 3 | 1
+INPUTMC | 6 | 0 | 10 | 5 | 4 | 5 | 12 | 3 | 9 | 2 | 14 | 3 | 1
 EQ | 8 | 
    !nUDS_IOB.D = iobs/IOU0 & !iobm/IOS_FSM_FFd3 & 
 	iobm/IOS_FSM_FFd2
@@ -54,14 +42,25 @@ EQ | 8 |
 	# !iobs/IORW0 & iobs/IOU0 & iobm/IOS_FSM_FFd3 & 
 	!iobm/IOS_FSM_FFd1;
    !nUDS_IOB.CLK = C16M;	// GCK
-   nUDS_IOB.OE = nAoutOE;
+   nUDS_IOB.OE = !nAoutOE;
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 3 | 8 | cnt/LTimer<0>
+MACROCELL | 5 | 11 | iobm/nASout
+ATTRIBUTES | 8685314 | 0
+INPUTS | 4 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | nAoutOE
+INPUTMC | 4 | 3 | 9 | 5 | 12 | 5 | 4 | 3 | 1
+EQ | 4 | 
+   nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2
+	# iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2;
+   !nAS_IOB.CLK = C16M;	// GCK
+   nAS_IOB.OE = !nAoutOE;
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 3 | 13 | cnt/LTimer<0>
 ATTRIBUTES | 4358976 | 0
-OUTPUTMC | 14 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+OUTPUTMC | 14 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
 INPUTS | 3 | cnt/LTimer<0>  | cnt/LTimer<13>  | cnt/TimerTC
-INPUTMC | 3 | 3 | 8 | 6 | 0 | 3 | 2
+INPUTMC | 3 | 3 | 13 | 6 | 0 | 0 | 9
 EQ | 3 | 
    !cnt/LTimer<0>.T = !cnt/LTimer<0> & cnt/LTimer<13> & cnt/TimerTC;
    !cnt/LTimer<0>.CLK = C8M;	// GCK
@@ -70,9 +69,9 @@ GLOBALS | 1 | 2 | C8M
 
 MACROCELL | 6 | 0 | cnt/LTimer<13>
 ATTRIBUTES | 4358976 | 0
-OUTPUTMC | 17 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 7 | 0 | 3 | 6 | 3 | 0
+OUTPUTMC | 17 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 6 | 3 | 12 | 3 | 11
 INPUTS | 15 | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>  | cnt/LTimer<6>  | cnt/LTimer<7>  | cnt/LTimer<9>  | cnt/LTimer<10>  | cnt/LTimer<11>  | cnt/LTimer<8>  | cnt/LTimer<12>  | cnt/LTimer<13>  | cnt/TimerTC
-INPUTMC | 15 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 6 | 0 | 3 | 2
+INPUTMC | 15 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 6 | 0 | 0 | 9
 EQ | 7 | 
    cnt/LTimer<13>.T = cnt/LTimer<13> & cnt/TimerTC
 	# cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & 
@@ -83,24 +82,29 @@ EQ | 7 |
    cnt/LTimer<13>.CE = cnt/TimerTC;
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 3 | 17 | cnt/LTimer<1>
+MACROCELL | 3 | 16 | cnt/LTimer<1>
 ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 13 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
-INPUTS | 4 | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<13>  | cnt/TimerTC
-INPUTMC | 4 | 3 | 8 | 3 | 17 | 6 | 0 | 3 | 2
-EQ | 5 | 
+OUTPUTMC | 14 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 17
+INPUTS | 12 | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<13>  | cnt/TimerTC  | C8M  | nBERR_IOB  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOBERR  | iobm/RESrf  | iobm/RESrr
+INPUTMC | 10 | 3 | 13 | 3 | 16 | 6 | 0 | 0 | 9 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 1 | 11 | 1 | 10
+INPUTP | 2 | 35 | 123
+EXPORTS | 1 | 3 | 17
+EQ | 8 | 
    !cnt/LTimer<1>.D = cnt/LTimer<0> & cnt/LTimer<1>
 	# !cnt/LTimer<0> & !cnt/LTimer<1>
 	# cnt/LTimer<13> & cnt/TimerTC;
    !cnt/LTimer<1>.CLK = C8M;	// GCK
    cnt/LTimer<1>.CE = cnt/TimerTC;
+    cnt/LTimer<1>.EXP  =  C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & 
+	iobm/RESrr
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 3 | 16 | cnt/LTimer<2>
+MACROCELL | 3 | 15 | cnt/LTimer<2>
 ATTRIBUTES | 4358976 | 0
-OUTPUTMC | 12 | 6 | 0 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+OUTPUTMC | 12 | 6 | 0 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
 INPUTS | 5 | cnt/LTimer<0>  | cnt/LTimer<13>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/TimerTC
-INPUTMC | 5 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 2
+INPUTMC | 5 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 0 | 9
 EQ | 5 | 
    cnt/LTimer<2>.T = cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1>
 	# cnt/LTimer<0> & cnt/LTimer<1> & !cnt/TimerTC
@@ -109,11 +113,11 @@ EQ | 5 |
    cnt/LTimer<2>.CE = cnt/TimerTC;
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 3 | 15 | cnt/LTimer<3>
+MACROCELL | 3 | 14 | cnt/LTimer<3>
 ATTRIBUTES | 4358976 | 0
-OUTPUTMC | 11 | 6 | 0 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+OUTPUTMC | 11 | 6 | 0 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
 INPUTS | 6 | cnt/LTimer<13>  | cnt/LTimer<3>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>
-INPUTMC | 6 | 6 | 0 | 3 | 15 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16
+INPUTMC | 6 | 6 | 0 | 3 | 14 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15
 EQ | 7 | 
    cnt/LTimer<3>.T = cnt/LTimer<13> & cnt/LTimer<3> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -128,7 +132,7 @@ MACROCELL | 6 | 12 | cnt/LTimer<5>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 9 | 6 | 0 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
 INPUTS | 8 | cnt/LTimer<13>  | cnt/LTimer<5>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<4>
-INPUTMC | 8 | 6 | 0 | 6 | 12 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 14
+INPUTMC | 8 | 6 | 0 | 6 | 12 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 14
 EQ | 7 | 
    cnt/LTimer<5>.T = cnt/LTimer<13> & cnt/LTimer<5> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -139,49 +143,53 @@ EQ | 7 |
    cnt/LTimer<5>.CE = cnt/TimerTC;
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 4 | 3 | cs/nOverlay1
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 35 | 7 | 15 | 2 | 12 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 8 | 2 | 17 | 4 | 6 | 4 | 11 | 7 | 5 | 7 | 2 | 4 | 8 | 7 | 8 | 7 | 12 | 4 | 15 | 6 | 7 | 7 | 4 | 2 | 16 | 2 | 0 | 2 | 2 | 2 | 7 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 5 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 0 | 7 | 7 | 7 | 10 | 7 | 14
-INPUTS | 3 | cs/nOverlay0  | nAS_FSB  | fsb/ASrf
-INPUTMC | 2 | 4 | 7 | 1 | 14
-INPUTP | 1 | 54
-EQ | 3 | 
-   cs/nOverlay1.D = cs/nOverlay0;
-   cs/nOverlay1.CLK = FCLK;	// GCK
-   cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf;
-GLOBALS | 1 | 2 | FCLK
-
-MACROCELL | 7 | 16 | iobs/Once
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 14 | 7 | 16 | 2 | 14 | 2 | 11 | 2 | 5 | 7 | 11 | 7 | 6 | 7 | 9 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 0 | 7 | 15 | 7 | 17
-INPUTS | 10 | A_FSB<22>  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<20>  | EXP27_.EXP  | EXP28_.EXP
-INPUTMC | 6 | 7 | 16 | 7 | 6 | 1 | 15 | 1 | 14 | 7 | 15 | 7 | 17
-INPUTP | 4 | 30 | 54 | 36 | 28
-IMPORTS | 2 | 7 | 15 | 7 | 17
-EQ | 24 | 
-   !iobs/Once.D = nAS_FSB & !fsb/ASrf
-	# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd2
-	# !A_FSB<23> & !A_FSB<20> & !iobs/Once
-	# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd2
-	# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd1
-;Imported pterms FB8_16
-	# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
-	# !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
-	# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/Once
+MACROCELL | 7 | 0 | iobs/Once
+ATTRIBUTES | 4358912 | 0
+OUTPUTMC | 16 | 7 | 0 | 2 | 14 | 2 | 11 | 0 | 16 | 7 | 10 | 7 | 13 | 7 | 15 | 2 | 5 | 2 | 4 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 1 | 7 | 11 | 7 | 12 | 7 | 17
+INPUTS | 11 | iobs/Once  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB_19_IBUF$BUF0.EXP  | EXP29_.EXP
+INPUTMC | 6 | 7 | 0 | 0 | 6 | 7 | 13 | 7 | 6 | 7 | 1 | 7 | 17
+INPUTP | 5 | 54 | 36 | 30 | 29 | 28
+IMPORTS | 2 | 7 | 1 | 7 | 17
+EQ | 40 | 
+   iobs/Once.T = iobs/Once & nAS_FSB & !fsb/ASrf
+	# A_FSB<23> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd2 & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+;Imported pterms FB8_2
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1
+	# A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1
+	# A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1
+	# A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1
 ;Imported pterms FB8_18
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & !iobs/Once
-;Imported pterms FB8_1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once;
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
    iobs/Once.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
@@ -189,7 +197,7 @@ MACROCELL | 6 | 14 | cnt/LTimer<4>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 10 | 6 | 0 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
 INPUTS | 7 | cnt/LTimer<13>  | cnt/LTimer<4>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>
-INPUTMC | 7 | 6 | 0 | 6 | 14 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15
+INPUTMC | 7 | 6 | 0 | 6 | 14 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14
 EQ | 7 | 
    cnt/LTimer<4>.T = cnt/LTimer<13> & cnt/LTimer<4> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -204,7 +212,7 @@ MACROCELL | 6 | 9 | cnt/LTimer<6>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 8 | 6 | 0 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
 INPUTS | 9 | cnt/LTimer<13>  | cnt/LTimer<6>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>
-INPUTMC | 9 | 6 | 0 | 6 | 9 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14
+INPUTMC | 9 | 6 | 0 | 6 | 9 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14
 EQ | 7 | 
    cnt/LTimer<6>.T = cnt/LTimer<13> & cnt/LTimer<6> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -219,7 +227,7 @@ MACROCELL | 6 | 6 | cnt/LTimer<7>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 8 | 6 | 0 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 6 | 7
 INPUTS | 15 | cnt/LTimer<13>  | cnt/LTimer<7>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>  | cnt/LTimer<6>  | A_FSB<9>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RASEL
-INPUTMC | 12 | 6 | 0 | 6 | 6 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 4 | 3 | 4 | 0
+INPUTMC | 12 | 6 | 0 | 6 | 6 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 4 | 3 | 4 | 0
 INPUTP | 3 | 12 | 36 | 30
 EXPORTS | 1 | 6 | 7
 EQ | 11 | 
@@ -240,7 +248,7 @@ MACROCELL | 6 | 2 | cnt/LTimer<9>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 5 | 6 | 0 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 15
 INPUTS | 12 | cnt/LTimer<13>  | cnt/LTimer<9>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>  | cnt/LTimer<6>  | cnt/LTimer<7>  | cnt/LTimer<8>
-INPUTMC | 12 | 6 | 0 | 6 | 2 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 3
+INPUTMC | 12 | 6 | 0 | 6 | 2 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 3
 EQ | 9 | 
    cnt/LTimer<9>.T = cnt/LTimer<13> & cnt/LTimer<9> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -253,11 +261,23 @@ EQ | 9 |
    cnt/LTimer<9>.CE = cnt/TimerTC;
 GLOBALS | 1 | 2 | C8M
 
+MACROCELL | 4 | 3 | cs/nOverlay1
+ATTRIBUTES | 8553280 | 0
+OUTPUTMC | 27 | 6 | 8 | 2 | 1 | 4 | 6 | 2 | 7 | 2 | 16 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 11 | 7 | 10 | 4 | 8 | 7 | 14 | 2 | 4 | 4 | 15 | 6 | 7 | 7 | 4 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 7 | 1 | 7 | 17
+INPUTS | 3 | cs/nOverlay0  | nAS_FSB  | fsb/ASrf
+INPUTMC | 2 | 4 | 7 | 0 | 6
+INPUTP | 1 | 54
+EQ | 3 | 
+   cs/nOverlay1.D = cs/nOverlay0;
+   cs/nOverlay1.CLK = FCLK;	// GCK
+   cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf;
+GLOBALS | 1 | 2 | FCLK
+
 MACROCELL | 6 | 17 | cnt/LTimer<10>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 4 | 6 | 0 | 6 | 17 | 6 | 16 | 6 | 15
 INPUTS | 13 | cnt/LTimer<13>  | cnt/LTimer<10>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>  | cnt/LTimer<6>  | cnt/LTimer<7>  | cnt/LTimer<9>  | cnt/LTimer<8>
-INPUTMC | 13 | 6 | 0 | 6 | 17 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 3
+INPUTMC | 13 | 6 | 0 | 6 | 17 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 3
 EQ | 9 | 
    cnt/LTimer<10>.T = cnt/LTimer<13> & cnt/LTimer<10> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -274,7 +294,7 @@ MACROCELL | 6 | 16 | cnt/LTimer<11>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 3 | 6 | 0 | 6 | 16 | 6 | 15
 INPUTS | 14 | cnt/LTimer<13>  | cnt/LTimer<11>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>  | cnt/LTimer<6>  | cnt/LTimer<7>  | cnt/LTimer<9>  | cnt/LTimer<10>  | cnt/LTimer<8>
-INPUTMC | 14 | 6 | 0 | 6 | 16 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 3
+INPUTMC | 14 | 6 | 0 | 6 | 16 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 3
 EQ | 11 | 
    cnt/LTimer<11>.T = cnt/LTimer<13> & cnt/LTimer<11> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -293,7 +313,7 @@ MACROCELL | 6 | 3 | cnt/LTimer<8>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 6 | 6 | 0 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
 INPUTS | 11 | cnt/LTimer<13>  | cnt/LTimer<8>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>  | cnt/LTimer<6>  | cnt/LTimer<7>
-INPUTMC | 11 | 6 | 0 | 6 | 3 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6
+INPUTMC | 11 | 6 | 0 | 6 | 3 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6
 EQ | 9 | 
    cnt/LTimer<8>.T = cnt/LTimer<13> & cnt/LTimer<8> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -310,7 +330,7 @@ MACROCELL | 6 | 15 | cnt/LTimer<12>
 ATTRIBUTES | 4358976 | 0
 OUTPUTMC | 2 | 6 | 0 | 6 | 15
 INPUTS | 15 | cnt/LTimer<13>  | cnt/LTimer<12>  | cnt/TimerTC  | cnt/LTimer<0>  | cnt/LTimer<1>  | cnt/LTimer<2>  | cnt/LTimer<3>  | cnt/LTimer<5>  | cnt/LTimer<4>  | cnt/LTimer<6>  | cnt/LTimer<7>  | cnt/LTimer<9>  | cnt/LTimer<10>  | cnt/LTimer<11>  | cnt/LTimer<8>
-INPUTMC | 15 | 6 | 0 | 6 | 15 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3
+INPUTMC | 15 | 6 | 0 | 6 | 15 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3
 EQ | 11 | 
    cnt/LTimer<12>.T = cnt/LTimer<13> & cnt/LTimer<12> & cnt/TimerTC
 	# cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & 
@@ -326,80 +346,61 @@ EQ | 11 |
 GLOBALS | 1 | 2 | C8M
 
 MACROCELL | 2 | 14 | iobs/IORW0
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 5 | 8 | 5 | 10 | 2 | 14 | 5 | 2 | 2 | 13 | 2 | 15 | 2 | 16
-INPUTS | 12 | iobs/IORW0  | iobs/IORW1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<23>  | nWE_FSB  | iobs/Once  | nAS_FSB  | fsb/ASrf  | EXP19_.EXP  | EXP20_.EXP
-INPUTMC | 9 | 2 | 14 | 2 | 11 | 7 | 6 | 1 | 15 | 5 | 13 | 7 | 16 | 1 | 14 | 2 | 13 | 2 | 15
-INPUTP | 3 | 36 | 47 | 54
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 5 | 5 | 8 | 5 | 10 | 2 | 14 | 5 | 2 | 2 | 13
+INPUTS | 11 | iobs/IORW0  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/Once  | nADoutLE1  | A_FSB<23>  | A_FSB<22>  | nAS_FSB  | fsb/ASrf  | EXP21_.EXP  | EXP22_.EXP
+INPUTMC | 8 | 2 | 14 | 7 | 13 | 7 | 6 | 7 | 0 | 5 | 13 | 0 | 6 | 2 | 13 | 2 | 15
+INPUTP | 3 | 36 | 30 | 54
 IMPORTS | 2 | 2 | 13 | 2 | 15
-EQ | 60 | 
-   iobs/IORW0.T = iobs/IORW0 & !iobs/IORW1 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !iobs/IORW0 & iobs/IORW1 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & !nADoutLE1
-	# A_FSB<23> & nWE_FSB & !iobs/Once & !iobs/IORW0 & 
-	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<23> & !nWE_FSB & !iobs/Once & iobs/IORW0 & 
-	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<23> & !nWE_FSB & !iobs/Once & iobs/IORW0 & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+EQ | 41 | 
+   !iobs/IORW0.D = !iobs/IORW0 & iobs/PS_FSM_FFd2
+	# !iobs/IORW0 & iobs/PS_FSM_FFd1
+	# iobs/Once & !iobs/IORW0 & nADoutLE1
+	# !A_FSB<23> & !A_FSB<22> & !iobs/IORW0 & nADoutLE1
+	# !iobs/IORW0 & nAS_FSB & !fsb/ASrf & nADoutLE1
 ;Imported pterms FB3_14
-	# A_FSB<23> & nWE_FSB & !iobs/Once & !iobs/IORW0 & 
+	# !iobs/IORW1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
+	!nADoutLE1
+	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !iobs/IORW0 & 
+	nADoutLE1
+	# A_FSB<23> & !nWE_FSB & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# A_FSB<23> & !nWE_FSB & !iobs/Once & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!iobs/Once & !iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!iobs/Once & !iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB & 
-	!iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB & 
-	!iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
+	# A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & 
+	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 ;Imported pterms FB3_16
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+	# A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & 
+	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
+	nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
+	nADoutLE1
 ;Imported pterms FB3_17
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1;
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & 
+	nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & 
+	nADoutLE1;
    iobs/IORW0.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
 MACROCELL | 4 | 2 | ram/RefDone
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 4 | 2 | 1 | 7 | 1 | 9 | 4 | 1
+OUTPUTMC | 4 | 4 | 2 | 0 | 1 | 0 | 3 | 4 | 1
 INPUTS | 9 | ram/RefDone  | ram/RefReqSync  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay1
-INPUTMC | 5 | 4 | 2 | 1 | 8 | 4 | 6 | 4 | 12 | 4 | 3
+INPUTMC | 5 | 4 | 2 | 0 | 2 | 7 | 8 | 4 | 12 | 4 | 3
 INPUTP | 4 | 36 | 30 | 29 | 28
 EXPORTS | 1 | 4 | 1
 EQ | 7 | 
@@ -416,7 +417,7 @@ MACROCELL | 4 | 7 | cs/nOverlay0
 ATTRIBUTES | 4358928 | 0
 OUTPUTMC | 3 | 4 | 3 | 4 | 7 | 4 | 8
 INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay0  | nAS_FSB  | fsb/ASrf  | nRES.PIN  | ram/RASEL  | A_FSB<5>
-INPUTMC | 3 | 4 | 7 | 1 | 14 | 4 | 0
+INPUTMC | 3 | 4 | 7 | 0 | 6 | 4 | 0
 INPUTP | 7 | 36 | 30 | 29 | 28 | 54 | 145 | 4
 EXPORTS | 1 | 4 | 8
 EQ | 7 | 
@@ -429,96 +430,83 @@ EQ | 7 |
     cs/nOverlay0.EXP  =  ram/RASEL & A_FSB<5>
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 2 | 5 | fsb/Ready0r
+MACROCELL | 4 | 6 | fsb/Ready0r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 2 | 5 | 2 | 1 | 2 | 7 | 2 | 0 | 2 | 6
-INPUTS | 15 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | iobs/Once  | iobs/IOReady  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | iobm/IOBERR  | nADoutLE1  | nAS_FSB  | fsb/ASrf  | iobs/Clear1.EXP
-INPUTMC | 11 | 4 | 3 | 2 | 5 | 4 | 16 | 7 | 16 | 2 | 6 | 7 | 6 | 1 | 12 | 5 | 17 | 5 | 13 | 1 | 14 | 2 | 4
+OUTPUTMC | 4 | 4 | 6 | 2 | 8 | 2 | 7 | 2 | 17
+INPUTS | 8 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | nAS_FSB  | fsb/ASrf
+INPUTMC | 4 | 4 | 3 | 4 | 6 | 4 | 16 | 0 | 6
 INPUTP | 4 | 36 | 30 | 29 | 54
-EXPORTS | 1 | 2 | 6
-IMPORTS | 1 | 2 | 4
-EQ | 13 | 
-   !fsb/Ready0r.D = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+EQ | 6 | 
+   !fsb/Ready0r.D = nAS_FSB & !fsb/ASrf
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
 	!fsb/Ready0r & !ram/RAMReady
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady
-;Imported pterms FB3_5
-	# nAS_FSB & !fsb/ASrf;
+	!cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady;
    fsb/Ready0r.CLK = FCLK;	// GCK
-    fsb/Ready0r.EXP  =  iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 & 
-	!iobs/IOACTr & iobm/IOBERR & nADoutLE1
-	# iobs/Once & !iobs/IOReady & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & !iobm/IOBERR & nADoutLE1
-	# iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 & 
-	!iobs/IOACTr & !iobm/IOBERR & fsb/ASrf & nADoutLE1
 GLOBALS | 1 | 2 | FCLK
 
 MACROCELL | 2 | 9 | fsb/Ready1r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 9 | 2 | 9 | 2 | 1 | 2 | 8 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 17 | 2 | 10
-INPUTS | 17 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | A_FSB<13>  | fsb/nDTACK.EXP
-INPUTMC | 5 | 1 | 14 | 2 | 9 | 2 | 6 | 4 | 3 | 2 | 8
-INPUTP | 12 | 54 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 18
+OUTPUTMC | 9 | 2 | 9 | 2 | 0 | 2 | 8 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 17 | 2 | 10
+INPUTS | 11 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<14>  | A_FSB<13>  | fsb/nDTACK.EXP
+INPUTMC | 4 | 0 | 6 | 2 | 9 | 0 | 16 | 2 | 8
+INPUTP | 7 | 54 | 36 | 30 | 29 | 28 | 19 | 18
 EXPORTS | 1 | 2 | 10
 IMPORTS | 1 | 2 | 8
-EQ | 19 | 
+EQ | 15 | 
    !fsb/Ready1r.D = nAS_FSB & !fsb/ASrf
 	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
+	# A_FSB<22> & A_FSB<21> & !fsb/Ready1r & 
+	!iobs/IOReady
+	# A_FSB<22> & A_FSB<20> & !fsb/Ready1r & 
 	!iobs/IOReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & !iobs/IOReady
 ;Imported pterms FB3_9
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & !iobs/IOReady
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1;
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & !iobs/IOReady & !nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & !iobs/IOReady & !nADoutLE1;
    fsb/Ready1r.CLK = FCLK;	// GCK
-    fsb/Ready1r.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+    fsb/Ready1r.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22>
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 2 | 1 | fsb/VPA
+MACROCELL | 2 | 0 | fsb/VPA
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 2 | 1 | 3 | 10 | 2 | 0 | 2 | 2 | 2 | 17
-INPUTS | 14 | A_FSB<23>  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | nAS_FSB  | fsb/ASrf  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | EXP14_.EXP  | EXP15_.EXP
-INPUTMC | 9 | 2 | 9 | 2 | 1 | 2 | 6 | 1 | 14 | 4 | 3 | 2 | 5 | 4 | 16 | 2 | 0 | 2 | 2
+OUTPUTMC | 4 | 2 | 0 | 3 | 10 | 2 | 1 | 2 | 17
+INPUTS | 11 | A_FSB<23>  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | nAS_FSB  | fsb/ASrf  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | EXP14_.EXP  | EXP23_.EXP
+INPUTMC | 6 | 2 | 9 | 2 | 0 | 0 | 16 | 0 | 6 | 2 | 1 | 2 | 17
 INPUTP | 5 | 36 | 54 | 30 | 29 | 28
-IMPORTS | 2 | 2 | 0 | 2 | 2
-EQ | 64 | 
+IMPORTS | 2 | 2 | 1 | 2 | 17
+EQ | 52 | 
    fsb/VPA.D = A_FSB<23> & !fsb/Ready1r & fsb/VPA & 
 	!iobs/IOReady & !nAS_FSB
 	# A_FSB<23> & !fsb/Ready1r & fsb/VPA & 
 	!iobs/IOReady & fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	fsb/VPA & !iobs/IOReady & !nAS_FSB
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	fsb/VPA & !iobs/IOReady & fsb/ASrf
-;Imported pterms FB3_1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
-;Imported pterms FB3_18
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & 
-	!nADoutLE1
+	# A_FSB<22> & A_FSB<21> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & !nAS_FSB
+	# A_FSB<22> & A_FSB<21> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & fsb/ASrf
+	# A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & !nAS_FSB
+;Imported pterms FB3_2
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
+;Imported pterms FB3_3
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
@@ -530,50 +518,26 @@ EQ | 64 |
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf
-;Imported pterms FB3_3
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & 
-	!nADoutLE1;
+;Imported pterms FB3_18
+	# A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & fsb/ASrf
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady;
    fsb/VPA.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 0 | 14 | iobm/BG
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 0 | 17
-INPUTS | 2 | nBG_IOB  | iobm/nASr
-INPUTMC | 1 | 0 | 0
-INPUTP | 1 | 117
-EQ | 3 | 
-   iobm/BG.D = !nBG_IOB;
-   iobm/BG.CLK = C16M;	// GCK
-   iobm/BG.CE = iobm/nASr;
-GLOBALS | 1 | 2 | C16M
-
-MACROCELL | 0 | 16 | iobs/IOL0
+MACROCELL | 0 | 11 | iobs/IOL0
 ATTRIBUTES | 8553280 | 0
 OUTPUTMC | 1 | 5 | 8
 INPUTS | 5 | iobs/IOL1  | nADoutLE1  | nLDS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 1 | 17 | 5 | 13 | 7 | 6 | 1 | 15
+INPUTMC | 4 | 0 | 8 | 5 | 13 | 7 | 13 | 7 | 6
 INPUTP | 1 | 49
 EQ | 4 | 
    iobs/IOL0.D = !nLDS_FSB & nADoutLE1
@@ -582,11 +546,11 @@ EQ | 4 |
    iobs/IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 1 | 17 | iobs/IOL1
+MACROCELL | 0 | 8 | iobs/IOL1
 ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 0 | 16
+OUTPUTMC | 1 | 0 | 11
 INPUTS | 2 | nLDS_FSB  | iobs/Load1
-INPUTMC | 1 | 7 | 9
+INPUTMC | 1 | 7 | 15
 INPUTP | 1 | 49
 EQ | 3 | 
    iobs/IOL1.D = !nLDS_FSB;
@@ -596,46 +560,42 @@ GLOBALS | 1 | 2 | FCLK
 
 MACROCELL | 2 | 11 | iobs/IORW1
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 3 | 2 | 14 | 2 | 11 | 2 | 10
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | iobs/IORW1  | nADoutLE1  | iobs/Once  | A_FSB<20>  | nWE_FSB  | EXP17_.EXP  | EXP18_.EXP
-INPUTMC | 5 | 2 | 11 | 5 | 13 | 7 | 16 | 2 | 10 | 2 | 12
-INPUTP | 4 | 36 | 29 | 28 | 47
+OUTPUTMC | 2 | 2 | 13 | 2 | 11
+INPUTS | 8 | nADoutLE1  | iobs/Once  | nWE_FSB  | iobs/IORW1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | EXP19_.EXP  | EXP20_.EXP
+INPUTMC | 7 | 5 | 13 | 7 | 0 | 2 | 11 | 7 | 13 | 7 | 6 | 2 | 10 | 2 | 12
+INPUTP | 1 | 47
 IMPORTS | 2 | 2 | 10 | 2 | 12
-EQ | 21 | 
+EQ | 20 | 
    !iobs/IORW1.T = iobs/Once
 	# !nADoutLE1
-	# !A_FSB<23> & !A_FSB<20>
 	# nWE_FSB & iobs/IORW1
-	# !A_FSB<23> & A_FSB<21> & !iobs/IORW1
-;Imported pterms FB3_11
 	# !nWE_FSB & !iobs/IORW1
-	# nAS_FSB & !fsb/ASrf
 	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+;Imported pterms FB3_11
+	# nAS_FSB & !fsb/ASrf
 	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<19>
+	# !A_FSB<23> & !A_FSB<22> & nWE_FSB
 	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
 ;Imported pterms FB3_10
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22>
 ;Imported pterms FB3_13
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1;
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<20>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<18>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<17>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<16>
+	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20>;
    iobs/IORW1.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 2 | 6 | iobs/IOReady
+MACROCELL | 0 | 16 | iobs/IOReady
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 2 | 9 | 2 | 1 | 2 | 6 | 2 | 8 | 2 | 0 | 2 | 2 | 2 | 5 | 2 | 7 | 2 | 17
-INPUTS | 22 | iobs/IOReady  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | nDTACK_FSB  | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | fsb/Ready0r.EXP
-INPUTMC | 5 | 2 | 6 | 1 | 14 | 2 | 9 | 2 | 8 | 2 | 5
-INPUTP | 17 | 54 | 36 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 30 | 29 | 28 | 26 | 24 | 23 | 22
-EXPORTS | 1 | 2 | 7
-IMPORTS | 1 | 2 | 5
-EQ | 20 | 
+OUTPUTMC | 9 | 2 | 9 | 2 | 0 | 0 | 16 | 2 | 8 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 17
+INPUTS | 8 | iobs/IOReady  | nAS_FSB  | fsb/ASrf  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | iobm/IOBERR  | nADoutLE1
+INPUTMC | 7 | 0 | 16 | 0 | 6 | 7 | 0 | 7 | 13 | 0 | 5 | 3 | 17 | 5 | 13
+INPUTP | 1 | 54
+EQ | 8 | 
    iobs/IOReady.T = iobs/IOReady & nAS_FSB & !fsb/ASrf
-;Imported pterms FB3_6
 	# iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 & 
 	!iobs/IOACTr & iobm/IOBERR & nADoutLE1
 	# iobs/Once & !iobs/IOReady & !nAS_FSB & 
@@ -643,24 +603,13 @@ EQ | 20 |
 	# iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 & 
 	!iobs/IOACTr & !iobm/IOBERR & fsb/ASrf & nADoutLE1;
    iobs/IOReady.CLK = FCLK;	// GCK
-    iobs/IOReady.EXP  =  nAS_FSB & !fsb/ASrf
-	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & fsb/Ready1r
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & iobs/IOReady
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 0 | 15 | iobs/IOU0
+MACROCELL | 0 | 10 | iobs/IOU0
 ATTRIBUTES | 8553280 | 0
 OUTPUTMC | 1 | 5 | 10
 INPUTS | 5 | iobs/IOU1  | nADoutLE1  | nUDS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 1 | 16 | 5 | 13 | 7 | 6 | 1 | 15
+INPUTMC | 4 | 0 | 7 | 5 | 13 | 7 | 13 | 7 | 6
 INPUTP | 1 | 56
 EQ | 4 | 
    iobs/IOU0.D = !nUDS_FSB & nADoutLE1
@@ -669,11 +618,11 @@ EQ | 4 |
    iobs/IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 1 | 16 | iobs/IOU1
+MACROCELL | 0 | 7 | iobs/IOU1
 ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 0 | 15
+OUTPUTMC | 1 | 0 | 10
 INPUTS | 2 | nUDS_FSB  | iobs/Load1
-INPUTMC | 1 | 7 | 9
+INPUTMC | 1 | 7 | 15
 INPUTP | 1 | 56
 EQ | 3 | 
    iobs/IOU1.D = !nUDS_FSB;
@@ -683,38 +632,32 @@ GLOBALS | 1 | 2 | FCLK
 
 MACROCELL | 2 | 8 | fsb/nDTACK
 ATTRIBUTES | 8815362 | 0
-OUTPUTMC | 4 | 2 | 8 | 2 | 6 | 2 | 7 | 2 | 9
-INPUTS | 16 | A_FSB<13>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | nADoutLE1  | A_FSB<14>  | EXP16_.EXP
-INPUTMC | 6 | 4 | 3 | 2 | 9 | 2 | 6 | 2 | 8 | 5 | 13 | 2 | 7
-INPUTP | 10 | 18 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 19
+OUTPUTMC | 3 | 2 | 8 | 2 | 7 | 2 | 9
+INPUTS | 19 | A_FSB<14>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | nADoutLE1  | A_FSB<13>  | A_FSB<23>  | A_FSB<22>  | fsb/Ready0r  | ram/RAMReady  | EXP18_.EXP
+INPUTMC | 8 | 4 | 3 | 2 | 9 | 0 | 16 | 2 | 8 | 5 | 13 | 4 | 6 | 4 | 16 | 2 | 7
+INPUTP | 11 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 36 | 30
 EXPORTS | 1 | 2 | 9
 IMPORTS | 1 | 2 | 7
-EQ | 43 | 
-   nDTACK_FSB.D = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & 
-	!nADoutLE1
-;Imported pterms FB3_8
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	!iobs/IOReady & nDTACK_FSB
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+EQ | 34 | 
+   nDTACK_FSB.D = !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
 	!cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-;Imported pterms FB3_7
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & !nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & !nADoutLE1
+;Imported pterms FB3_8
 	# nAS_FSB & !fsb/ASrf
 	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
 	nDTACK_FSB
+	# A_FSB<22> & A_FSB<21> & !fsb/Ready1r & 
+	!iobs/IOReady & nDTACK_FSB
+	# A_FSB<22> & A_FSB<20> & !fsb/Ready1r & 
+	!iobs/IOReady & nDTACK_FSB
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
+;Imported pterms FB3_7
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
@@ -724,26 +667,25 @@ EQ | 43 |
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & iobs/IOReady;
    nDTACK_FSB.CLK = FCLK;	// GCK
-    fsb/nDTACK.EXP  =  A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & !iobs/IOReady
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
+    fsb/nDTACK.EXP  =  A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & !iobs/IOReady & !nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & !iobs/IOReady & !nADoutLE1
 GLOBALS | 1 | 2 | FCLK
 
 MACROCELL | 7 | 11 | iobs/nBERR_FSB
 ATTRIBUTES | 4621058 | 0
-OUTPUTMC | 2 | 7 | 11 | 7 | 12
-INPUTS | 12 | nAS_FSB  | nBERR_FSB  | fsb/ASrf  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | iobm/IOBERR  | nADoutLE1  | A_FSB<14>  | A_FSB<13>  | A_FSB<23>  | A_FSB<21>
-INPUTMC | 7 | 7 | 11 | 1 | 14 | 7 | 16 | 7 | 6 | 1 | 12 | 5 | 17 | 5 | 13
-INPUTP | 5 | 54 | 19 | 18 | 36 | 29
+OUTPUTMC | 3 | 7 | 11 | 7 | 10 | 7 | 12
+INPUTS | 17 | nAS_FSB  | nBERR_FSB  | fsb/ASrf  | A_FSB<14>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | iobs/Once  | cs/nOverlay1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | A_FSB<13>  | ram/RS_FSM_FFd3.EXP
+INPUTMC | 7 | 7 | 11 | 0 | 6 | 7 | 0 | 4 | 3 | 7 | 13 | 7 | 6 | 7 | 10
+INPUTP | 10 | 54 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18
 EXPORTS | 1 | 7 | 12
-EQ | 10 | 
+IMPORTS | 1 | 7 | 10
+EQ | 21 | 
    nBERR_FSB.T = nAS_FSB & !nBERR_FSB & !fsb/ASrf
+;Imported pterms FB8_11
 	# iobs/Once & !nBERR_FSB & !iobs/PS_FSM_FFd2 & 
 	!iobs/IOACTr & !iobm/IOBERR & nADoutLE1
 	# iobs/Once & !nAS_FSB & nBERR_FSB & 
@@ -751,45 +693,46 @@ EQ | 10 |
 	# iobs/Once & nBERR_FSB & !iobs/PS_FSM_FFd2 & 
 	!iobs/IOACTr & iobm/IOBERR & fsb/ASrf & nADoutLE1;
    nBERR_FSB.CLK = FCLK;	// GCK
-    iobs/nBERR_FSB.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
+    iobs/nBERR_FSB.EXP  =  A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 3 | 1 | cnt/AoutOE
-ATTRIBUTES | 8815362 | 0
-OUTPUTMC | 6 | 5 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 0 | 3 | 4
-INPUTS | 3 | nBR_IOB  | cnt/PORS_FSM_FFd1  | cnt/PORS_FSM_FFd2
-INPUTMC | 3 | 7 | 14 | 7 | 0 | 3 | 6
-EQ | 2 | 
-   nAoutOE.D = !nBR_IOB & cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2;
-   !nAoutOE.CLK = C8M;	// GCK
-GLOBALS | 1 | 2 | C8M
-
 MACROCELL | 7 | 14 | cnt/nBR_IOB
 ATTRIBUTES | 4621058 | 0
-OUTPUTMC | 3 | 3 | 1 | 7 | 14 | 7 | 13
-INPUTS | 12 | nBR_IOB  | cnt/PORS_FSM_FFd1  | cnt/PORS_FSM_FFd2  | cnt/IPL2r  | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<17>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 7 | 7 | 14 | 7 | 0 | 3 | 6 | 0 | 12 | 7 | 6 | 5 | 13 | 4 | 3
-INPUTP | 5 | 36 | 29 | 24 | 23 | 30
-EXPORTS | 1 | 7 | 13
+OUTPUTMC | 3 | 7 | 13 | 3 | 1 | 7 | 15
+INPUTS | 8 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<19>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | iobs/PS_FSM_FFd2.EXP
+INPUTMC | 2 | 4 | 3 | 7 | 13
+INPUTP | 6 | 36 | 30 | 29 | 26 | 23 | 22
+EXPORTS | 1 | 7 | 15
+IMPORTS | 1 | 7 | 13
 EQ | 10 | 
-   nBR_IOB.T = nBR_IOB & !cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2
+   nBR_IOB.T = ;Imported pterms FB8_14
+	  nBR_IOB & !cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2
 	# !nBR_IOB & !cnt/PORS_FSM_FFd1 & cnt/PORS_FSM_FFd2 & 
 	cnt/IPL2r;
    !nBR_IOB.CLK = C8M;	// GCK
-    cnt/nBR_IOB.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1
+    cnt/nBR_IOB.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<19>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<17>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<16>
+	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
 GLOBALS | 1 | 2 | C8M
 
 MACROCELL | 4 | 0 | ram/RASEL
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 13 | 6 | 5 | 6 | 1 | 4 | 13 | 4 | 10 | 4 | 8 | 4 | 7 | 4 | 14 | 6 | 4 | 6 | 7 | 6 | 10 | 4 | 4 | 6 | 6 | 6 | 8
-INPUTS | 8 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | nAS_FSB  | fsb/ASrf  | ram/RefUrgent  | nROMCS_OBUF.EXP  | EXP23_.EXP
-INPUTMC | 7 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 14 | 1 | 7 | 4 | 1 | 4 | 17
+INPUTS | 8 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | nAS_FSB  | fsb/ASrf  | ram/RefUrgent  | nROMCS_OBUF.EXP  | EXP26_.EXP
+INPUTMC | 7 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 6 | 0 | 1 | 4 | 1 | 4 | 17
 INPUTP | 1 | 54
 IMPORTS | 2 | 4 | 1 | 4 | 17
 EQ | 36 | 
@@ -831,49 +774,50 @@ EQ | 36 |
    ram/RASEL.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 3 | 2 | cnt/TimerTC
+MACROCELL | 0 | 9 | cnt/TimerTC
 ATTRIBUTES | 8520480 | 0
-OUTPUTMC | 18 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9
+OUTPUTMC | 18 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12
 INPUTS | 5 | cnt/Timer<1>  | cnt/Timer<2>  | cnt/Timer<0>  | cnt/Timer<3>  | E
-INPUTMC | 4 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9
+INPUTMC | 4 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12
 INPUTP | 1 | 37
 EQ | 3 | 
    cnt/TimerTC.D = !cnt/Timer<1> & !cnt/Timer<2> & !cnt/Timer<0> & 
 	cnt/Timer<3>;
    cnt/TimerTC.CLK = E;
 
-MACROCELL | 0 | 17 | iobm/IOS_FSM_FFd3
+MACROCELL | 5 | 4 | iobm/IOS_FSM_FFd3
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 3 | 5 | 2 | 5 | 14 | 5 | 16
-INPUTS | 6 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | C8M  | iobm/BG  | iobm/IOREQr
-INPUTMC | 5 | 0 | 13 | 5 | 9 | 0 | 17 | 0 | 14 | 0 | 5
+OUTPUTMC | 13 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 17 | 5 | 3 | 5 | 2 | 3 | 0 | 3 | 16 | 5 | 16
+INPUTS | 6 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | C8M  | iobm/IOREQr  | nAoutOE
+INPUTMC | 5 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 12 | 3 | 1
 INPUTP | 1 | 35
 EQ | 6 | 
    iobm/IOS_FSM_FFd3.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2
 	# iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & 
 	!iobm/IOS_FSM_FFd2
-	# !C8M & iobm/BG & !iobm/IOS_FSM_FFd1 & 
-	!iobm/IOS_FSM_FFd2 & iobm/IOREQr;
+	# !C8M & !iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 & 
+	iobm/IOREQr & !nAoutOE;
    iobm/IOS_FSM_FFd3.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 4 | 6 | ram/RS_FSM_FFd1
+MACROCELL | 7 | 8 | ram/RS_FSM_FFd1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 4 | 2 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 1 | 10 | 4 | 5 | 4 | 8 | 7 | 1
-INPUTS | 11 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | nAS_FSB  | ram/RefUrgent  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RAMEN  | nOE_OBUF.EXP
-INPUTMC | 8 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 7 | 1 | 14 | 4 | 3 | 4 | 9 | 4 | 5
-INPUTP | 3 | 54 | 36 | 30
-IMPORTS | 1 | 4 | 5
-EQ | 19 | 
+OUTPUTMC | 11 | 4 | 2 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 10 | 4 | 9 | 4 | 16 | 0 | 4 | 4 | 8 | 7 | 7 | 7 | 9
+INPUTS | 6 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | nAS_FSB  | ram/RefUrgent  | nRAMUWE_OBUF.EXP
+INPUTMC | 5 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 1 | 7 | 7
+INPUTP | 1 | 54
+EXPORTS | 1 | 7 | 9
+IMPORTS | 1 | 7 | 7
+EQ | 23 | 
    ram/RS_FSM_FFd1.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
 	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
 	# !nAS_FSB & ram/RS_FSM_FFd1 & ram/RefUrgent & 
 	!ram/RS_FSM_FFd3
+;Imported pterms FB8_8
 	# ram/RS_FSM_FFd1 & ram/RefUrgent & 
 	!ram/RS_FSM_FFd3 & fsb/ASrf
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN
-;Imported pterms FB5_6
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN & 
 	fsb/ASrf
@@ -884,24 +828,28 @@ EQ | 19 |
 	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
 	ram/RefUrgent & !ram/RAMEN & fsb/ASrf;
    ram/RS_FSM_FFd1.CLK = FCLK;	// GCK
+    ram/RS_FSM_FFd1.EXP  =  ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd3
+	# ram/RS_FSM_FFd1 & !ram/RefUrgent & 
+	!ram/RS_FSM_FFd3
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 0 | 13 | iobm/IOS_FSM_FFd1
+MACROCELL | 3 | 9 | iobm/IOS_FSM_FFd1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 3 | 5 | 16 | 5 | 14
+OUTPUTMC | 12 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 17 | 5 | 3 | 5 | 16 | 3 | 0 | 3 | 16
 INPUTS | 3 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1
-INPUTMC | 3 | 0 | 17 | 5 | 9 | 0 | 13
+INPUTMC | 3 | 5 | 4 | 5 | 12 | 3 | 9
 EQ | 3 | 
    iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1
 	# !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2;
    iobm/IOS_FSM_FFd1.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd2
+MACROCELL | 5 | 12 | iobm/IOS_FSM_FFd2
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 11 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 3 | 5 | 2 | 5 | 16
+OUTPUTMC | 13 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 17 | 5 | 3 | 5 | 2 | 5 | 16 | 3 | 0 | 3 | 16
 INPUTS | 11 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | C8M  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 0 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 4 | 0 | 3
+INPUTMC | 10 | 5 | 4 | 3 | 9 | 5 | 12 | 5 | 0 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 1 | 11 | 1 | 10
 INPUTP | 1 | 35
 EQ | 11 | 
    iobm/IOS_FSM_FFd2.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & 
@@ -919,9 +867,9 @@ GLOBALS | 1 | 2 | C16M
 
 MACROCELL | 4 | 12 | ram/RS_FSM_FFd2
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 15 | 4 | 2 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 1 | 10 | 4 | 1 | 4 | 5 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 1
+OUTPUTMC | 15 | 4 | 2 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 10 | 4 | 9 | 4 | 16 | 0 | 4 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 7 | 7 | 9
 INPUTS | 9 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | nAS_FSB  | ram/RS_FSM_FFd3  | fsb/ASrf  | ram/RefUrgent  | ram/RefReq  | ram/BACTr  | RA_5_OBUF.EXP
-INPUTMC | 8 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 14 | 1 | 7 | 1 | 9 | 1 | 11 | 4 | 11
+INPUTMC | 8 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 6 | 0 | 1 | 0 | 3 | 7 | 16 | 4 | 11
 INPUTP | 1 | 54
 IMPORTS | 1 | 4 | 11
 EQ | 19 | 
@@ -946,92 +894,102 @@ EQ | 19 |
    ram/RS_FSM_FFd2.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 7 | 6 | iobs/PS_FSM_FFd2
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 21 | 7 | 16 | 2 | 14 | 0 | 16 | 2 | 10 | 2 | 5 | 0 | 15 | 7 | 11 | 7 | 6 | 1 | 15 | 7 | 9 | 1 | 13 | 2 | 4 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 5 | 7 | 7 | 7 | 12 | 7 | 14 | 7 | 15
-INPUTS | 11 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | A_FSB<23>  | A_FSB<20>  | nAS_FSB  | fsb/ASrf  | nRAMLWE_OBUF.EXP  | nRAMUWE_OBUF.EXP
-INPUTMC | 8 | 7 | 6 | 1 | 15 | 1 | 12 | 7 | 16 | 5 | 13 | 1 | 14 | 7 | 5 | 7 | 7
-INPUTP | 3 | 36 | 28 | 54
-IMPORTS | 2 | 7 | 5 | 7 | 7
-EQ | 31 | 
-   !iobs/PS_FSM_FFd2.D = iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & 
-	iobs/IOACTr
-	# !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & 
-	!iobs/IOACTr
-	# iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	nADoutLE1
-	# !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	!fsb/ASrf & nADoutLE1
-;Imported pterms FB8_6
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB8_8
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1;
+MACROCELL | 7 | 13 | iobs/PS_FSM_FFd2
+ATTRIBUTES | 4358912 | 0
+OUTPUTMC | 21 | 7 | 0 | 2 | 14 | 0 | 11 | 2 | 11 | 0 | 16 | 0 | 10 | 7 | 10 | 7 | 13 | 7 | 6 | 7 | 15 | 7 | 3 | 7 | 2 | 2 | 6 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 1 | 7 | 11 | 7 | 12 | 7 | 17 | 7 | 14
+INPUTS | 12 | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<23>  | iobs/Once  | nAS_FSB  | nBR_IOB  | cnt/PORS_FSM_FFd1  | cnt/PORS_FSM_FFd2  | cnt/IPL2r  | EXP28_.EXP
+INPUTMC | 10 | 7 | 6 | 0 | 5 | 7 | 13 | 5 | 13 | 7 | 0 | 7 | 14 | 3 | 6 | 3 | 12 | 3 | 8 | 7 | 12
+INPUTP | 2 | 36 | 54
+EXPORTS | 1 | 7 | 14
+IMPORTS | 1 | 7 | 12
+EQ | 32 | 
+   iobs/PS_FSM_FFd2.T = iobs/PS_FSM_FFd1 & iobs/IOACTr
+	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1
+	# A_FSB<23> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+;Imported pterms FB8_13
+	# A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd2 & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+;Imported pterms FB8_12
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf;
    iobs/PS_FSM_FFd2.CLK = FCLK;	// GCK
+    iobs/PS_FSM_FFd2.EXP  =  nBR_IOB & !cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2
+	# !nBR_IOB & !cnt/PORS_FSM_FFd1 & cnt/PORS_FSM_FFd2 & 
+	cnt/IPL2r
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 1 | 7 | ram/RefUrgent
+MACROCELL | 0 | 1 | ram/RefUrgent
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 13 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 5 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 1
+OUTPUTMC | 12 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 9 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 7
 INPUTS | 2 | ram/RefDone  | ram/RegUrgentSync
-INPUTMC | 2 | 4 | 2 | 1 | 6
+INPUTMC | 2 | 4 | 2 | 0 | 0
 EQ | 2 | 
    ram/RefUrgent.D = !ram/RefDone & ram/RegUrgentSync;
    ram/RefUrgent.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 7 | 2 | ram/RS_FSM_FFd3
+MACROCELL | 7 | 10 | ram/RS_FSM_FFd3
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 12 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 1
-INPUTS | 9 | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | A_FSB<21>  | ram/RefUrgent  | ram/RAMEN  | A_FSB_19_IBUF$BUF0.EXP
-INPUTMC | 7 | 4 | 3 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 7 | 4 | 9 | 7 | 1
-INPUTP | 2 | 30 | 29
-IMPORTS | 1 | 7 | 1
-EQ | 20 | 
-   !ram/RS_FSM_FFd3.T = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & 
+OUTPUTMC | 14 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 10 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 7 | 7 | 9 | 7 | 11
+INPUTS | 14 | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | iobs/Once  | nBERR_FSB  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | iobm/IOBERR  | nADoutLE1  | nAS_FSB  | fsb/ASrf  | EXP27_.EXP
+INPUTMC | 12 | 4 | 3 | 7 | 8 | 4 | 12 | 7 | 10 | 7 | 0 | 7 | 11 | 7 | 13 | 0 | 5 | 3 | 17 | 5 | 13 | 0 | 6 | 7 | 9
+INPUTP | 2 | 30 | 54
+EXPORTS | 1 | 7 | 11
+IMPORTS | 1 | 7 | 9
+EQ | 27 | 
+   !ram/RS_FSM_FFd3.T = A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+	# !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+;Imported pterms FB8_10
+	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & 
 	ram/RS_FSM_FFd3
+	# A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd3
+	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & 
+	!fsb/ASrf
 	# !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
 	!ram/RS_FSM_FFd3 & !ram/RAMEN
 	# A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
-	# A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
-	# !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
-;Imported pterms FB8_2
+;Imported pterms FB8_9
 	# ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd3
 	# ram/RS_FSM_FFd1 & !ram/RefUrgent & 
-	!ram/RS_FSM_FFd3
-	# A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd3
-	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & 
-	!fsb/ASrf;
+	!ram/RS_FSM_FFd3;
    ram/RS_FSM_FFd3.CLK = FCLK;	// GCK
+    ram/RS_FSM_FFd3.EXP  =  iobs/Once & !nBERR_FSB & !iobs/PS_FSM_FFd2 & 
+	!iobs/IOACTr & !iobm/IOBERR & nADoutLE1
+	# iobs/Once & !nAS_FSB & nBERR_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & iobm/IOBERR & nADoutLE1
+	# iobs/Once & nBERR_FSB & !iobs/PS_FSM_FFd2 & 
+	!iobs/IOACTr & iobm/IOBERR & fsb/ASrf & nADoutLE1
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 5 | 6 | iobm/ES<0>
+MACROCELL | 5 | 7 | iobm/ES<0>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
+OUTPUTMC | 7 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0
 INPUTS | 7 | iobm/ES<0>  | iobm/Er  | iobm/Er2  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>
-INPUTMC | 7 | 5 | 6 | 0 | 7 | 0 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7
+INPUTMC | 7 | 5 | 7 | 1 | 14 | 1 | 13 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9
 EQ | 6 | 
    !iobm/ES<0>.T = iobm/ES<0> & !iobm/Er & iobm/Er2
 	# !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
@@ -1041,22 +999,25 @@ EQ | 6 |
    iobm/ES<0>.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 1 | 15 | iobs/PS_FSM_FFd1
+MACROCELL | 7 | 6 | iobs/PS_FSM_FFd1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 17 | 7 | 16 | 2 | 14 | 0 | 16 | 2 | 10 | 0 | 15 | 7 | 6 | 1 | 15 | 7 | 9 | 1 | 13 | 2 | 4 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 5 | 7 | 7 | 7 | 15
-INPUTS | 3 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr
-INPUTMC | 3 | 7 | 6 | 1 | 15 | 1 | 12
-EQ | 3 | 
+OUTPUTMC | 21 | 7 | 0 | 2 | 14 | 0 | 11 | 2 | 11 | 0 | 10 | 7 | 13 | 7 | 6 | 7 | 15 | 7 | 3 | 7 | 2 | 2 | 6 | 2 | 4 | 2 | 5 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 1 | 7 | 11 | 7 | 12 | 7 | 17 | 7 | 7
+INPUTS | 7 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | nWE_FSB  | nUDS_FSB  | nAS_FSB  | ram/RAMEN
+INPUTMC | 4 | 7 | 13 | 7 | 6 | 0 | 5 | 4 | 9
+INPUTP | 3 | 47 | 56 | 54
+EXPORTS | 1 | 7 | 7
+EQ | 4 | 
    iobs/PS_FSM_FFd1.D = iobs/PS_FSM_FFd2
 	# iobs/PS_FSM_FFd1 & iobs/IOACTr;
    iobs/PS_FSM_FFd1.CLK = FCLK;	// GCK
+    iobs/PS_FSM_FFd1.EXP  =  !nWE_FSB & !nUDS_FSB & !nAS_FSB & ram/RAMEN
 GLOBALS | 1 | 2 | FCLK
 
 MACROCELL | 4 | 9 | ram/RAMEN
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 10 | 7 | 7 | 4 | 6 | 7 | 2 | 4 | 9 | 4 | 14 | 7 | 4 | 4 | 16 | 4 | 1 | 4 | 5 | 4 | 8
+OUTPUTMC | 10 | 7 | 6 | 7 | 7 | 7 | 9 | 4 | 9 | 4 | 14 | 7 | 4 | 7 | 5 | 4 | 1 | 4 | 8 | 4 | 16
 INPUTS | 10 | ram/RS_FSM_FFd2  | ram/RAMEN  | ram/RS_FSM_FFd3  | ram/RS_FSM_FFd1  | ram/RefUrgent  | ram/BACTr  | ram/RefReq  | nAS_FSB  | fsb/ASrf  | RA_4_OBUF.EXP
-INPUTMC | 9 | 4 | 12 | 4 | 9 | 7 | 2 | 4 | 6 | 1 | 7 | 1 | 11 | 1 | 9 | 1 | 14 | 4 | 8
+INPUTMC | 9 | 4 | 12 | 4 | 9 | 7 | 10 | 7 | 8 | 0 | 1 | 7 | 16 | 0 | 3 | 0 | 6 | 4 | 8
 INPUTP | 1 | 54
 IMPORTS | 1 | 4 | 8
 EQ | 18 | 
@@ -1080,33 +1041,33 @@ EQ | 18 |
    ram/RAMEN.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 3 | 12 | cnt/Timer<1>
+MACROCELL | 0 | 14 | cnt/Timer<1>
 ATTRIBUTES | 8520480 | 0
-OUTPUTMC | 6 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 9 | 3 | 14 | 3 | 13
+OUTPUTMC | 6 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 17 | 0 | 15
 INPUTS | 4 | cnt/TimerTC  | cnt/Timer<1>  | cnt/Timer<0>  | E
-INPUTMC | 3 | 3 | 2 | 3 | 12 | 3 | 3
+INPUTMC | 3 | 0 | 9 | 0 | 14 | 1 | 17
 INPUTP | 1 | 37
 EQ | 3 | 
    cnt/Timer<1>.D = !cnt/TimerTC & cnt/Timer<1> & !cnt/Timer<0>
 	# !cnt/TimerTC & !cnt/Timer<1> & cnt/Timer<0>;
    cnt/Timer<1>.CLK = E;
 
-MACROCELL | 3 | 11 | cnt/Timer<2>
+MACROCELL | 0 | 13 | cnt/Timer<2>
 ATTRIBUTES | 4326176 | 0
-OUTPUTMC | 5 | 3 | 2 | 3 | 11 | 3 | 9 | 3 | 14 | 3 | 13
+OUTPUTMC | 5 | 0 | 9 | 0 | 13 | 0 | 12 | 0 | 17 | 0 | 15
 INPUTS | 5 | cnt/TimerTC  | cnt/Timer<1>  | cnt/Timer<0>  | cnt/Timer<2>  | E
-INPUTMC | 4 | 3 | 2 | 3 | 12 | 3 | 3 | 3 | 11
+INPUTMC | 4 | 0 | 9 | 0 | 14 | 1 | 17 | 0 | 13
 INPUTP | 1 | 37
 EQ | 3 | 
    cnt/Timer<2>.T = cnt/TimerTC & cnt/Timer<2>
 	# !cnt/TimerTC & cnt/Timer<1> & cnt/Timer<0>;
    cnt/Timer<2>.CLK = E;
 
-MACROCELL | 5 | 5 | iobm/ES<1>
+MACROCELL | 5 | 6 | iobm/ES<1>
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
+OUTPUTMC | 7 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0
 INPUTS | 4 | iobm/ES<0>  | iobm/ES<1>  | iobm/Er  | iobm/Er2
-INPUTMC | 4 | 5 | 6 | 5 | 5 | 0 | 7 | 0 | 6
+INPUTMC | 4 | 5 | 7 | 5 | 6 | 1 | 14 | 1 | 13
 EQ | 4 | 
    !iobm/ES<1>.D = iobm/ES<0> & iobm/ES<1>
 	# !iobm/ES<0> & !iobm/ES<1>
@@ -1114,21 +1075,21 @@ EQ | 4 |
    iobm/ES<1>.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 3 | 3 | cnt/Timer<0>
+MACROCELL | 1 | 17 | cnt/Timer<0>
 ATTRIBUTES | 8520480 | 0
-OUTPUTMC | 7 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9 | 3 | 14 | 3 | 13
+OUTPUTMC | 7 | 0 | 9 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12 | 0 | 17 | 0 | 15
 INPUTS | 3 | cnt/TimerTC  | cnt/Timer<0>  | E
-INPUTMC | 2 | 3 | 2 | 3 | 3
+INPUTMC | 2 | 0 | 9 | 1 | 17
 INPUTP | 1 | 37
 EQ | 2 | 
    cnt/Timer<0>.D = !cnt/TimerTC & !cnt/Timer<0>;
    cnt/Timer<0>.CLK = E;
 
-MACROCELL | 3 | 9 | cnt/Timer<3>
+MACROCELL | 0 | 12 | cnt/Timer<3>
 ATTRIBUTES | 4326176 | 0
-OUTPUTMC | 4 | 3 | 2 | 3 | 9 | 3 | 14 | 3 | 13
+OUTPUTMC | 4 | 0 | 9 | 0 | 12 | 0 | 17 | 0 | 15
 INPUTS | 6 | cnt/TimerTC  | cnt/Timer<1>  | cnt/Timer<2>  | cnt/Timer<0>  | cnt/Timer<3>  | E
-INPUTMC | 5 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9
+INPUTMC | 5 | 0 | 9 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12
 INPUTP | 1 | 37
 EQ | 4 | 
    cnt/Timer<3>.T = cnt/TimerTC & cnt/Timer<3>
@@ -1136,11 +1097,11 @@ EQ | 4 |
 	cnt/Timer<0>;
    cnt/Timer<3>.CLK = E;
 
-MACROCELL | 5 | 12 | iobm/ES<2>
+MACROCELL | 5 | 15 | iobm/ES<2>
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 5 | 1 | 5 | 6 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
+OUTPUTMC | 6 | 5 | 1 | 5 | 7 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0
 INPUTS | 7 | iobm/ES<0>  | iobm/ES<2>  | iobm/ES<1>  | iobm/Er  | iobm/Er2  | iobm/ES<3>  | iobm/ES<4>
-INPUTMC | 7 | 5 | 6 | 5 | 12 | 5 | 5 | 0 | 7 | 0 | 6 | 5 | 4 | 5 | 7
+INPUTMC | 7 | 5 | 7 | 5 | 15 | 5 | 6 | 1 | 14 | 1 | 13 | 5 | 5 | 5 | 9
 EQ | 6 | 
    !iobm/ES<2>.D = !iobm/ES<0> & !iobm/ES<2>
 	# !iobm/ES<1> & !iobm/ES<2>
@@ -1150,11 +1111,11 @@ EQ | 6 |
    iobm/ES<2>.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 5 | 4 | iobm/ES<3>
+MACROCELL | 5 | 5 | iobm/ES<3>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 6 | 5 | 1 | 5 | 6 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
+OUTPUTMC | 6 | 5 | 1 | 5 | 7 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0
 INPUTS | 6 | iobm/ES<3>  | iobm/Er  | iobm/Er2  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>
-INPUTMC | 6 | 5 | 4 | 0 | 7 | 0 | 6 | 5 | 6 | 5 | 5 | 5 | 12
+INPUTMC | 6 | 5 | 5 | 1 | 14 | 1 | 13 | 5 | 7 | 5 | 6 | 5 | 15
 EQ | 4 | 
    iobm/ES<3>.T = iobm/ES<3> & !iobm/Er & iobm/Er2
 	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & iobm/Er
@@ -1162,11 +1123,11 @@ EQ | 4 |
    iobm/ES<3>.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 5 | 7 | iobm/ES<4>
+MACROCELL | 5 | 9 | iobm/ES<4>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 5 | 5 | 1 | 5 | 6 | 5 | 12 | 5 | 7 | 5 | 0
+OUTPUTMC | 5 | 5 | 1 | 5 | 7 | 5 | 15 | 5 | 9 | 5 | 0
 INPUTS | 7 | iobm/ES<4>  | iobm/Er  | iobm/Er2  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>
-INPUTMC | 7 | 5 | 7 | 0 | 7 | 0 | 6 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4
+INPUTMC | 7 | 5 | 9 | 1 | 14 | 1 | 13 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5
 EQ | 8 | 
    iobm/ES<4>.T = iobm/ES<4> & !iobm/Er & iobm/Er2
 	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & 
@@ -1178,101 +1139,99 @@ EQ | 8 |
    iobm/ES<4>.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 7 | 0 | cnt/PORS_FSM_FFd1
+MACROCELL | 3 | 6 | cnt/PORS_FSM_FFd1
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 6 | 3 | 1 | 7 | 14 | 7 | 0 | 3 | 6 | 3 | 0 | 7 | 17
-INPUTS | 11 | cnt/LTimer<13>  | cnt/PORS_FSM_FFd1  | cnt/PORS_FSM_FFd2  | cnt/IPL2r  | A_FSB<14>  | A_FSB<13>  | A_FSB<23>  | A_FSB<21>  | iobs/Once  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 6 | 6 | 0 | 7 | 0 | 3 | 6 | 0 | 12 | 7 | 16 | 4 | 3
-INPUTP | 5 | 19 | 18 | 36 | 29 | 30
-EXPORTS | 1 | 7 | 17
-EQ | 7 | 
+OUTPUTMC | 5 | 7 | 13 | 3 | 6 | 3 | 12 | 3 | 11 | 3 | 1
+INPUTS | 4 | cnt/LTimer<13>  | cnt/PORS_FSM_FFd1  | cnt/PORS_FSM_FFd2  | cnt/IPL2r
+INPUTMC | 4 | 6 | 0 | 3 | 6 | 3 | 12 | 3 | 8
+EQ | 3 | 
    cnt/PORS_FSM_FFd1.T = cnt/LTimer<13> & !cnt/PORS_FSM_FFd1 & 
 	cnt/PORS_FSM_FFd2 & !cnt/IPL2r;
    !cnt/PORS_FSM_FFd1.CLK = C8M;	// GCK
-    cnt/PORS_FSM_FFd1.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 1 | 12 | iobs/IOACTr
+MACROCELL | 0 | 5 | iobs/IOACTr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 2 | 5 | 7 | 11 | 7 | 6 | 1 | 15 | 7 | 13
+OUTPUTMC | 5 | 0 | 16 | 7 | 10 | 7 | 13 | 7 | 6 | 2 | 6
 INPUTS | 1 | iobm/IOACT
-INPUTMC | 1 | 5 | 15
+INPUTMC | 1 | 5 | 17
 EQ | 2 | 
    iobs/IOACTr.D = iobm/IOACT;
    iobs/IOACTr.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 3 | 6 | cnt/PORS_FSM_FFd2
+MACROCELL | 3 | 12 | cnt/PORS_FSM_FFd2
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 3 | 1 | 7 | 14 | 7 | 0 | 3 | 6 | 3 | 0
+OUTPUTMC | 5 | 7 | 13 | 3 | 6 | 3 | 12 | 3 | 11 | 3 | 1
 INPUTS | 3 | cnt/LTimer<13>  | cnt/PORS_FSM_FFd2  | cnt/PORS_FSM_FFd1
-INPUTMC | 3 | 6 | 0 | 3 | 6 | 7 | 0
+INPUTMC | 3 | 6 | 0 | 3 | 12 | 3 | 6
 EQ | 3 | 
    cnt/PORS_FSM_FFd2.D = cnt/LTimer<13> & !cnt/PORS_FSM_FFd1
 	# !cnt/LTimer<13> & cnt/PORS_FSM_FFd2;
    !cnt/PORS_FSM_FFd2.CLK = C8M;	// GCK
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 7 | 9 | iobs/Load1
+MACROCELL | 7 | 15 | iobs/Load1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 1 | 17 | 1 | 16 | 5 | 13
-INPUTS | 10 | nADoutLE1  | iobs/Once  | A_FSB<23>  | A_FSB<20>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | EXP24_.EXP  | EXP25_.EXP
-INPUTMC | 7 | 5 | 13 | 7 | 16 | 7 | 6 | 1 | 15 | 1 | 14 | 7 | 8 | 7 | 10
-INPUTP | 3 | 36 | 28 | 54
-IMPORTS | 2 | 7 | 8 | 7 | 10
-EQ | 18 | 
+OUTPUTMC | 3 | 0 | 8 | 0 | 7 | 5 | 13
+INPUTS | 11 | nADoutLE1  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | nWE_FSB  | cnt/nBR_IOB.EXP  | ram/BACTr.EXP
+INPUTMC | 7 | 5 | 13 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 7 | 14 | 7 | 16
+INPUTP | 4 | 54 | 36 | 30 | 47
+IMPORTS | 2 | 7 | 14 | 7 | 16
+EQ | 17 | 
    !iobs/Load1.D = iobs/Once
 	# !nADoutLE1
-	# !A_FSB<23> & !A_FSB<20>
 	# nAS_FSB & !fsb/ASrf
 	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
-;Imported pterms FB8_9
+	# !A_FSB<23> & !A_FSB<22> & nWE_FSB
+;Imported pterms FB8_15
 	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<19>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<17>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<16>
 	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB
-;Imported pterms FB8_11
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1;
+;Imported pterms FB8_17
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<20>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<18>
+	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20>
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22>;
    iobs/Load1.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 1 | 11 | ram/BACTr
+MACROCELL | 7 | 16 | ram/BACTr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 16 | 4 | 12 | 4 | 9 | 4 | 15 | 4 | 17
-INPUTS | 2 | nAS_FSB  | fsb/ASrf
-INPUTMC | 1 | 1 | 14
-INPUTP | 1 | 54
-EQ | 2 | 
+OUTPUTMC | 6 | 4 | 16 | 4 | 12 | 4 | 9 | 4 | 15 | 4 | 17 | 7 | 15
+INPUTS | 9 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | A_FSB<20>  | A_FSB<18>  | A_FSB<21>  | A_FSB<14>  | A_FSB<13>
+INPUTMC | 1 | 0 | 6
+INPUTP | 8 | 54 | 36 | 30 | 28 | 24 | 29 | 19 | 18
+EXPORTS | 1 | 7 | 15
+EQ | 6 | 
    !ram/BACTr.D = nAS_FSB & !fsb/ASrf;
    ram/BACTr.CLK = FCLK;	// GCK
+    ram/BACTr.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<20>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<18>
+	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20>
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22>
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 1 | 9 | ram/RefReq
+MACROCELL | 0 | 3 | ram/RefReq
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 6 | 4 | 15 | 4 | 12 | 4 | 9 | 4 | 1 | 4 | 14 | 4 | 17
 INPUTS | 2 | ram/RefDone  | ram/RefReqSync
-INPUTMC | 2 | 4 | 2 | 1 | 8
+INPUTMC | 2 | 4 | 2 | 0 | 2
 EQ | 2 | 
    ram/RefReq.D = !ram/RefDone & ram/RefReqSync;
    ram/RefReq.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 5 | 17 | iobm/IOBERR
+MACROCELL | 3 | 17 | iobm/IOBERR
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 4 | 2 | 5 | 7 | 11 | 5 | 17 | 5 | 16
-INPUTS | 12 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOBERR  | C8M  | nBERR_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/nDinLE.EXP
-INPUTMC | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 0 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 5 | 16
+OUTPUTMC | 5 | 0 | 16 | 7 | 10 | 3 | 17 | 3 | 0 | 3 | 16
+INPUTS | 13 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOBERR  | C8M  | nBERR_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | EXP24_.EXP  | cnt/LTimer<1>.EXP
+INPUTMC | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 0 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 3 | 0 | 3 | 16
 INPUTP | 2 | 35 | 123
-IMPORTS | 1 | 5 | 16
-EQ | 26 | 
+IMPORTS | 2 | 3 | 0 | 3 | 16
+EQ | 27 | 
    iobm/IOBERR.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & 
 	!iobm/IOS_FSM_FFd2 & iobm/IOBERR
 	# C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
@@ -1285,10 +1244,7 @@ EQ | 26 |
 	# C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
 	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/DTACKrf & 
 	iobm/DTACKrr
-;Imported pterms FB6_17
-	# C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & 
-	iobm/RESrr
+;Imported pterms FB4_1
 	# C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
 	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf & 
 	iobm/BERRrr
@@ -1297,33 +1253,37 @@ EQ | 26 |
 	iobm/DTACKrr
 	# C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
 	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf & 
+	iobm/RESrr
+;Imported pterms FB4_17
+	# C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & 
 	iobm/RESrr;
    iobm/IOBERR.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 5 | iobm/IOREQr
+MACROCELL | 1 | 12 | iobm/IOREQr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 0 | 17 | 5 | 15 | 5 | 3
+OUTPUTMC | 3 | 5 | 4 | 5 | 17 | 5 | 3
 INPUTS | 1 | iobs/IOREQ
-INPUTMC | 1 | 7 | 13
+INPUTMC | 1 | 2 | 6
 EQ | 2 | 
    iobm/IOREQr.D = iobs/IOREQ;
    !iobm/IOREQr.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 1 | 8 | ram/RefReqSync
+MACROCELL | 0 | 2 | ram/RefReqSync
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 4 | 2 | 1 | 9
+OUTPUTMC | 2 | 4 | 2 | 0 | 3
 INPUTS | 1 | cnt/RefReq
-INPUTMC | 1 | 3 | 14
+INPUTMC | 1 | 0 | 17
 EQ | 2 | 
    ram/RefReqSync.D = cnt/RefReq;
    ram/RefReqSync.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 0 | 12 | cnt/IPL2r
+MACROCELL | 3 | 8 | cnt/IPL2r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 7 | 14 | 7 | 0
+OUTPUTMC | 2 | 7 | 13 | 3 | 6
 INPUTS | 1 | nIPL2
 INPUTP | 1 | 146
 EQ | 2 | 
@@ -1331,11 +1291,11 @@ EQ | 2 |
    !cnt/IPL2r.CLK = C8M;	// GCK
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 3 | 0 | cnt/nRESout
+MACROCELL | 3 | 11 | cnt/nRESout
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 3 | 0 | 3 | 7
+OUTPUTMC | 2 | 3 | 11 | 3 | 7
 INPUTS | 4 | cnt/LTimer<13>  | cnt/PORS_FSM_FFd1  | cnt/PORS_FSM_FFd2  | cnt/nRESout
-INPUTMC | 4 | 6 | 0 | 7 | 0 | 3 | 6 | 3 | 0
+INPUTMC | 4 | 6 | 0 | 3 | 6 | 3 | 12 | 3 | 11
 EQ | 5 | 
    cnt/nRESout.D = cnt/LTimer<13> & cnt/PORS_FSM_FFd1 & 
 	!cnt/PORS_FSM_FFd2
@@ -1346,18 +1306,18 @@ GLOBALS | 1 | 2 | C8M
 
 MACROCELL | 5 | 0 | iobm/ETACK
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 9 | 5 | 17 | 5 | 15
+OUTPUTMC | 3 | 5 | 12 | 3 | 17 | 5 | 17
 INPUTS | 6 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>
-INPUTMC | 6 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7
+INPUTMC | 6 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9
 EQ | 3 | 
    iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
 	!iobm/ES<3> & iobm/ES<4>;
    iobm/ETACK.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 7 | iobm/Er
+MACROCELL | 1 | 14 | iobm/Er
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 0 | 6
+OUTPUTMC | 6 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 1 | 13
 INPUTS | 1 | E
 INPUTP | 1 | 37
 EQ | 2 | 
@@ -1365,13 +1325,13 @@ EQ | 2 |
    !iobm/Er.CLK = C8M;	// GCK
 GLOBALS | 1 | 2 | C8M
 
-MACROCELL | 5 | 15 | iobm/IOACT
+MACROCELL | 5 | 17 | iobm/IOACT
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 5 | 1 | 1 | 12
-INPUTS | 11 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | iobm/IOREQr  | C8M  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | nADoutLE0_OBUF.EXP
-INPUTMC | 10 | 0 | 13 | 5 | 9 | 0 | 17 | 0 | 5 | 5 | 0 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 5 | 14
+OUTPUTMC | 2 | 5 | 1 | 0 | 5
+INPUTS | 11 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | iobm/IOREQr  | C8M  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/nDinLE.EXP
+INPUTMC | 10 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 12 | 5 | 0 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 5 | 16
 INPUTP | 1 | 35
-IMPORTS | 1 | 5 | 14
+IMPORTS | 1 | 5 | 16
 EQ | 13 | 
    !iobm/IOACT.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2
 	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & 
@@ -1382,17 +1342,17 @@ EQ | 13 |
 	iobm/BERRrf & iobm/BERRrr
 	# C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
 	iobm/DTACKrf & iobm/DTACKrr
-;Imported pterms FB6_15
+;Imported pterms FB6_17
 	# C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
 	iobm/RESrf & iobm/RESrr;
    iobm/IOACT.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 3 | 14 | cnt/RefReq
+MACROCELL | 0 | 17 | cnt/RefReq
 ATTRIBUTES | 8520480 | 0
-OUTPUTMC | 1 | 1 | 8
+OUTPUTMC | 1 | 0 | 2
 INPUTS | 5 | cnt/Timer<1>  | cnt/Timer<3>  | cnt/Timer<2>  | cnt/Timer<0>  | E
-INPUTMC | 4 | 3 | 12 | 3 | 9 | 3 | 11 | 3 | 3
+INPUTMC | 4 | 0 | 14 | 0 | 12 | 0 | 13 | 1 | 17
 INPUTP | 1 | 37
 EQ | 5 | 
    cnt/RefReq.D = cnt/Timer<1> & !cnt/Timer<3>
@@ -1401,11 +1361,11 @@ EQ | 5 |
 	cnt/Timer<3>;
    cnt/RefReq.CLK = E;
 
-MACROCELL | 3 | 13 | cnt/RefUrgent
+MACROCELL | 0 | 15 | cnt/RefUrgent
 ATTRIBUTES | 8520480 | 0
-OUTPUTMC | 1 | 1 | 6
+OUTPUTMC | 1 | 0 | 0
 INPUTS | 5 | cnt/Timer<1>  | cnt/Timer<2>  | cnt/Timer<3>  | cnt/Timer<0>  | E
-INPUTMC | 4 | 3 | 12 | 3 | 11 | 3 | 9 | 3 | 3
+INPUTMC | 4 | 0 | 14 | 0 | 13 | 0 | 12 | 1 | 17
 INPUTP | 1 | 37
 EQ | 4 | 
    cnt/RefUrgent.D = cnt/Timer<1> & cnt/Timer<2> & !cnt/Timer<3>
@@ -1413,9 +1373,9 @@ EQ | 4 |
 	cnt/Timer<3>;
    cnt/RefUrgent.CLK = E;
 
-MACROCELL | 1 | 14 | fsb/ASrf
+MACROCELL | 0 | 6 | fsb/ASrf
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 31 | 4 | 3 | 7 | 16 | 2 | 14 | 4 | 7 | 2 | 4 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 6 | 2 | 5 | 7 | 11 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 6 | 7 | 1 | 4 | 9 | 7 | 9 | 1 | 11 | 7 | 13 | 4 | 16 | 2 | 0 | 2 | 2 | 2 | 13 | 2 | 15 | 2 | 16 | 2 | 17 | 4 | 1 | 4 | 5 | 4 | 8 | 4 | 11
+OUTPUTMC | 34 | 7 | 0 | 4 | 3 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 0 | 16 | 2 | 7 | 7 | 11 | 4 | 0 | 7 | 7 | 4 | 12 | 7 | 12 | 7 | 9 | 4 | 9 | 7 | 15 | 7 | 16 | 2 | 5 | 4 | 16 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 13 | 2 | 15 | 2 | 16 | 2 | 17 | 4 | 1 | 4 | 8 | 4 | 11 | 7 | 1 | 7 | 10 | 7 | 17
 INPUTS | 1 | nAS_FSB
 INPUTP | 1 | 54
 EQ | 2 | 
@@ -1427,7 +1387,7 @@ MACROCELL | 5 | 3 | iobm/ALE0
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 14
 INPUTS | 4 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | iobm/IOREQr
-INPUTMC | 4 | 0 | 13 | 5 | 9 | 0 | 17 | 0 | 5
+INPUTMC | 4 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 12
 EQ | 4 | 
    !iobm/ALE0.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2
 	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & 
@@ -1435,9 +1395,9 @@ EQ | 4 |
    iobm/ALE0.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 11 | iobm/BERRrf
+MACROCELL | 3 | 3 | iobm/BERRrf
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
+OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0
 INPUTS | 1 | nBERR_IOB
 INPUTP | 1 | 123
 EQ | 2 | 
@@ -1445,9 +1405,9 @@ EQ | 2 |
    !iobm/BERRrf.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 10 | iobm/BERRrr
+MACROCELL | 3 | 2 | iobm/BERRrr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
+OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0
 INPUTS | 1 | nBERR_IOB
 INPUTP | 1 | 123
 EQ | 2 | 
@@ -1455,9 +1415,9 @@ EQ | 2 |
    iobm/BERRrr.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 9 | iobm/DTACKrf
+MACROCELL | 1 | 16 | iobm/DTACKrf
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
+OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0
 INPUTS | 1 | nDTACK_IOB
 INPUTP | 1 | 127
 EQ | 2 | 
@@ -1465,9 +1425,9 @@ EQ | 2 |
    !iobm/DTACKrf.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 8 | iobm/DTACKrr
+MACROCELL | 1 | 15 | iobm/DTACKrr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
+OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0
 INPUTS | 1 | nDTACK_IOB
 INPUTP | 1 | 127
 EQ | 2 | 
@@ -1479,26 +1439,26 @@ MACROCELL | 5 | 2 | iobm/DoutOE
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 3 | 4
 INPUTS | 3 | iobs/IORW0  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3
-INPUTMC | 3 | 2 | 14 | 5 | 9 | 0 | 17
+INPUTMC | 3 | 2 | 14 | 5 | 12 | 5 | 4
 EQ | 3 | 
    iobm/DoutOE.D = iobs/IORW0 & iobm/IOS_FSM_FFd3
 	# iobs/IORW0 & iobm/IOS_FSM_FFd2;
    iobm/DoutOE.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 6 | iobm/Er2
+MACROCELL | 1 | 13 | iobm/Er2
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7
+OUTPUTMC | 5 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9
 INPUTS | 1 | iobm/Er
-INPUTMC | 1 | 0 | 7
+INPUTMC | 1 | 1 | 14
 EQ | 2 | 
    iobm/Er2.D = iobm/Er;
    iobm/Er2.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 4 | iobm/RESrf
+MACROCELL | 1 | 11 | iobm/RESrf
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 14
+OUTPUTMC | 4 | 5 | 12 | 3 | 16 | 5 | 16 | 3 | 0
 INPUTS | 1 | nRES.PIN
 INPUTP | 1 | 145
 EQ | 2 | 
@@ -1506,9 +1466,9 @@ EQ | 2 |
    !iobm/RESrf.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 3 | iobm/RESrr
+MACROCELL | 1 | 10 | iobm/RESrr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 14
+OUTPUTMC | 4 | 5 | 12 | 3 | 16 | 5 | 16 | 3 | 0
 INPUTS | 1 | nRES.PIN
 INPUTP | 1 | 145
 EQ | 2 | 
@@ -1516,7 +1476,7 @@ EQ | 2 |
    iobm/RESrr.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 2 | iobm/VPArf
+MACROCELL | 1 | 9 | iobm/VPArf
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 1
 INPUTS | 1 | nVPA_IOB
@@ -1526,7 +1486,7 @@ EQ | 2 |
    !iobm/VPArf.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 1 | iobm/VPArr
+MACROCELL | 1 | 8 | iobm/VPArr
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 1
 INPUTS | 1 | nVPA_IOB
@@ -1536,83 +1496,83 @@ EQ | 2 |
    iobm/VPArr.CLK = C16M;	// GCK
 GLOBALS | 1 | 2 | C16M
 
-MACROCELL | 0 | 0 | iobm/nASr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 0 | 14
-INPUTS | 2 | nAS_IOB  | nAoutOE
-INPUTMC | 2 | 5 | 11 | 3 | 1
-EQ | 2 | 
-   !iobm/nASr.D = !nAS_IOB & nAoutOE;
-   iobm/nASr.CLK = C16M;	// GCK
-GLOBALS | 1 | 2 | C16M
-
-MACROCELL | 1 | 13 | iobs/ALE0
+MACROCELL | 7 | 3 | iobs/ALE0
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 14
 INPUTS | 2 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 2 | 7 | 6 | 1 | 15
+INPUTMC | 2 | 7 | 13 | 7 | 6
 EQ | 2 | 
    iobs/ALE0.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
    iobs/ALE0.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 2 | 4 | iobs/Clear1
+MACROCELL | 7 | 2 | iobs/Clear1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 5 | 13 | 2 | 5
-INPUTS | 5 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | nAS_FSB  | fsb/ASrf
-INPUTMC | 4 | 7 | 6 | 1 | 15 | 5 | 13 | 1 | 14
-INPUTP | 1 | 54
-EXPORTS | 1 | 2 | 5
+OUTPUTMC | 2 | 5 | 13 | 7 | 1
+INPUTS | 4 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<19>
+INPUTMC | 3 | 7 | 13 | 7 | 6 | 5 | 13
+INPUTP | 1 | 26
+EXPORTS | 1 | 7 | 1
 EQ | 3 | 
    iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1;
    iobs/Clear1.CLK = FCLK;	// GCK
-    iobs/Clear1.EXP  =  nAS_FSB & !fsb/ASrf
+    iobs/Clear1.EXP  =  A_FSB<19>
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 7 | 13 | iobs/IOREQ
+MACROCELL | 2 | 6 | iobs/IOREQ
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 0 | 5
-INPUTS | 11 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | A_FSB<23>  | A_FSB<20>  | nAS_FSB  | fsb/ASrf  | EXP26_.EXP  | cnt/nBR_IOB.EXP
-INPUTMC | 8 | 7 | 6 | 1 | 15 | 1 | 12 | 7 | 16 | 5 | 13 | 1 | 14 | 7 | 12 | 7 | 14
-INPUTP | 3 | 36 | 28 | 54
-IMPORTS | 2 | 7 | 12 | 7 | 14
-EQ | 29 | 
-   !iobs/IOREQ.D = !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1
-	# iobs/PS_FSM_FFd1 & iobs/IOACTr
-	# iobs/Once & !iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & 
-	nADoutLE1
-	# nAS_FSB & !iobs/PS_FSM_FFd2 & !fsb/ASrf & 
-	nADoutLE1
-;Imported pterms FB8_13
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-;Imported pterms FB8_12
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-;Imported pterms FB8_15
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1;
+OUTPUTMC | 2 | 1 | 12 | 2 | 7
+INPUTS | 23 | iobs/PS_FSM_FFd1  | nADoutLE1  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | fsb/Ready1r  | iobs/IOReady  | EXP17_.EXP
+INPUTMC | 7 | 7 | 6 | 5 | 13 | 7 | 13 | 0 | 5 | 2 | 9 | 0 | 16 | 2 | 5
+INPUTP | 16 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22
+EXPORTS | 1 | 2 | 7
+IMPORTS | 1 | 2 | 5
+EQ | 38 | 
+   iobs/IOREQ.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# iobs/PS_FSM_FFd2 & !iobs/IOACTr
+	# !iobs/PS_FSM_FFd1 & !nADoutLE1
+;Imported pterms FB3_6
+	# A_FSB<23> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd1
+	# A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd1 & 
+	fsb/ASrf
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd1
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd1
+;Imported pterms FB3_5
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf;
    iobs/IOREQ.CLK = FCLK;	// GCK
+    iobs/IOREQ.EXP  =  A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & fsb/Ready1r
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & iobs/IOReady
 GLOBALS | 1 | 2 | FCLK
 
 MACROCELL | 4 | 16 | ram/RAMReady
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 2 | 5 | 2 | 1 | 2 | 7 | 2 | 0 | 4 | 17
-INPUTS | 13 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RS_FSM_FFd3  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | ram/BACTr  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | ram/RAMEN  | EXP22_.EXP
-INPUTMC | 9 | 4 | 6 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 14 | 1 | 11 | 4 | 3 | 4 | 9 | 4 | 15
+OUTPUTMC | 5 | 4 | 6 | 2 | 8 | 2 | 7 | 2 | 17 | 4 | 17
+INPUTS | 13 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RS_FSM_FFd3  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | ram/BACTr  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | ram/RAMEN  | EXP25_.EXP
+INPUTMC | 9 | 7 | 8 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 6 | 7 | 16 | 4 | 3 | 4 | 9 | 4 | 15
 INPUTP | 4 | 54 | 36 | 30 | 29
 EXPORTS | 1 | 4 | 17
 IMPORTS | 1 | 4 | 15
@@ -1653,21 +1613,21 @@ EQ | 34 |
 	fsb/ASrf
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 1 | 10 | ram/RefRAS
+MACROCELL | 0 | 4 | ram/RefRAS
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 7 | 4
 INPUTS | 2 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2
-INPUTMC | 2 | 4 | 6 | 4 | 12
+INPUTMC | 2 | 7 | 8 | 4 | 12
 EQ | 2 | 
    ram/RefRAS.D = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2;
    ram/RefRAS.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
-MACROCELL | 1 | 6 | ram/RegUrgentSync
+MACROCELL | 0 | 0 | ram/RegUrgentSync
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 1 | 7
+OUTPUTMC | 1 | 0 | 1
 INPUTS | 1 | cnt/RefUrgent
-INPUTMC | 1 | 3 | 13
+INPUTMC | 1 | 0 | 15
 EQ | 2 | 
    ram/RegUrgentSync.D = cnt/RefUrgent;
    ram/RegUrgentSync.CLK = FCLK;	// GCK
@@ -1720,7 +1680,7 @@ MACROCELL | 4 | 8 | RA_4_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 9
 INPUTS | 11 | A_FSB<14>  | ram/RASEL  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/RAMEN  | fsb/ASrf  | A_FSB<21>  | cs/nOverlay0.EXP
-INPUTMC | 6 | 4 | 0 | 4 | 3 | 4 | 6 | 4 | 9 | 1 | 14 | 4 | 7
+INPUTMC | 6 | 4 | 0 | 4 | 3 | 7 | 8 | 4 | 9 | 0 | 6 | 4 | 7
 INPUTP | 5 | 19 | 36 | 30 | 54 | 29
 EXPORTS | 1 | 4 | 9
 IMPORTS | 1 | 4 | 7
@@ -1741,7 +1701,7 @@ MACROCELL | 4 | 11 | RA_5_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 12
 INPUTS | 10 | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | A_FSB<21>  | RA_3_OBUF.EXP
-INPUTMC | 6 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 14 | 4 | 3 | 4 | 10
+INPUTMC | 6 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 6 | 4 | 3 | 4 | 10
 INPUTP | 4 | 54 | 36 | 30 | 29
 EXPORTS | 1 | 4 | 12
 IMPORTS | 1 | 4 | 10
@@ -1764,7 +1724,7 @@ MACROCELL | 4 | 14 | RA_6_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 15
 INPUTS | 12 | A_FSB<16>  | ram/RASEL  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RS_FSM_FFd3  | ram/RefReq  | A_FSB<23>  | ram/RAMEN  | A_FSB<21>  | RA_2_OBUF.EXP
-INPUTMC | 8 | 4 | 0 | 4 | 3 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 9 | 4 | 9 | 4 | 13
+INPUTMC | 8 | 4 | 0 | 4 | 3 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 3 | 4 | 9 | 4 | 13
 INPUTP | 4 | 22 | 30 | 36 | 29
 EXPORTS | 1 | 4 | 15
 IMPORTS | 1 | 4 | 13
@@ -1821,56 +1781,40 @@ EQ | 2 |
 
 MACROCELL | 3 | 4 | nDoutOE_OBUF
 ATTRIBUTES | 264962 | 0
-INPUTS | 2 | nAoutOE  | iobm/DoutOE
-INPUTMC | 2 | 3 | 1 | 5 | 2
+INPUTS | 2 | iobm/DoutOE  | nAoutOE
+INPUTMC | 2 | 5 | 2 | 3 | 1
 EQ | 1 | 
-   !nDoutOE = !nAoutOE & iobm/DoutOE;
+   !nDoutOE = iobm/DoutOE & !nAoutOE;
 
 MACROCELL | 4 | 5 | nOE_OBUF
 ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 4 | 6
-INPUTS | 11 | nWE_FSB  | nAS_FSB  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RAMEN  | fsb/ASrf  | A_FSB<21>
-INPUTMC | 6 | 4 | 3 | 4 | 6 | 4 | 12 | 1 | 7 | 4 | 9 | 1 | 14
-INPUTP | 5 | 47 | 54 | 36 | 30 | 29
-EXPORTS | 1 | 4 | 6
-EQ | 10 | 
+INPUTS | 2 | nWE_FSB  | nAS_FSB
+INPUTP | 2 | 47 | 54
+EQ | 1 | 
    !nOE = nWE_FSB & !nAS_FSB;
-    nOE_OBUF.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN & 
-	fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
-	ram/RefUrgent & !ram/RAMEN
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
-	ram/RefUrgent & !ram/RAMEN & fsb/ASrf
 
 MACROCELL | 2 | 16 | nROMWE_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 2 | 15
-INPUTS | 18 | nWE_FSB  | nAS_FSB  | A_FSB<14>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | iobs/Once  | iobs/IORW0  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | nADoutLE1  | A_FSB<13>
-INPUTMC | 7 | 4 | 3 | 7 | 16 | 2 | 14 | 7 | 6 | 1 | 15 | 1 | 14 | 5 | 13
-INPUTP | 11 | 47 | 54 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 18
+INPUTS | 16 | nWE_FSB  | nAS_FSB  | A_FSB<14>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | iobs/Once  | cs/nOverlay1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | nADoutLE1  | A_FSB<13>
+INPUTMC | 6 | 7 | 0 | 4 | 3 | 7 | 13 | 7 | 6 | 0 | 6 | 5 | 13
+INPUTP | 10 | 47 | 54 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 18
 EXPORTS | 1 | 2 | 15
-EQ | 13 | 
+EQ | 9 | 
    !nROMWE = !nWE_FSB & !nAS_FSB;
-    nROMWE_OBUF.EXP  =  A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+    nROMWE_OBUF.EXP  =  A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & 
+	nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & 
+	nADoutLE1
 
 MACROCELL | 3 | 10 | nVPA_FSB_OBUF
 ATTRIBUTES | 264962 | 0
 INPUTS | 2 | fsb/VPA  | nAS_FSB
-INPUTMC | 1 | 2 | 1
+INPUTMC | 1 | 2 | 0
 INPUTP | 1 | 54
 EQ | 1 | 
    !nVPA_FSB = fsb/VPA & !nAS_FSB;
@@ -1878,38 +1822,23 @@ EQ | 1 |
 MACROCELL | 5 | 16 | iobm/nDinLE
 ATTRIBUTES | 8684290 | 0
 OUTPUTMC | 1 | 5 | 17
-INPUTS | 12 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | C8M  | nBERR_IOB  | iobm/IOS_FSM_FFd3  | iobm/IOBERR  | iobm/RESrf  | iobm/RESrr  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr
-INPUTMC | 10 | 0 | 13 | 5 | 9 | 0 | 17 | 5 | 17 | 0 | 4 | 0 | 3 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8
-INPUTP | 2 | 35 | 123
+INPUTS | 6 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | C8M  | iobm/IOS_FSM_FFd3  | iobm/RESrf  | iobm/RESrr
+INPUTMC | 5 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 11 | 1 | 10
+INPUTP | 1 | 35
 EXPORTS | 1 | 5 | 17
-EQ | 14 | 
+EQ | 4 | 
    nDinLE.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2;
    !nDinLE.CLK = C16M;	// GCK
-    iobm/nDinLE.EXP  =  C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & 
-	iobm/RESrr
-	# C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf & 
-	iobm/BERRrr
-	# C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf & 
-	iobm/DTACKrr
-	# C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf & 
-	iobm/RESrr
+    iobm/nDinLE.EXP  =  C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/RESrf & iobm/RESrr
 GLOBALS | 1 | 2 | C16M
 
 MACROCELL | 5 | 14 | nADoutLE0_OBUF
 ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 5 | 15
-INPUTS | 7 | iobm/ALE0  | iobs/ALE0  | C8M  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 6 | 5 | 3 | 1 | 13 | 0 | 17 | 0 | 13 | 0 | 4 | 0 | 3
-INPUTP | 1 | 35
-EXPORTS | 1 | 5 | 15
-EQ | 3 | 
+INPUTS | 2 | iobm/ALE0  | iobs/ALE0
+INPUTMC | 2 | 5 | 3 | 7 | 3
+EQ | 1 | 
    nADoutLE0 = !iobm/ALE0 & !iobs/ALE0;
-    nADoutLE0_OBUF.EXP  =  C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
-	iobm/RESrf & iobm/RESrr
 
 MACROCELL | 3 | 5 | nDinOE_OBUF
 ATTRIBUTES | 264962 | 0
@@ -1917,23 +1846,20 @@ INPUTS | 6 | A_FSB<23>  | nWE_FSB  | nAS_FSB  | A_FSB<22>  | A_FSB<21>  | A_FSB<
 INPUTP | 6 | 36 | 47 | 54 | 30 | 29 | 28
 EQ | 3 | 
    nDinOE = A_FSB<23> & nWE_FSB & !nAS_FSB
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!nAS_FSB;
+	# A_FSB<22> & A_FSB<21> & nWE_FSB & !nAS_FSB
+	# A_FSB<22> & A_FSB<20> & nWE_FSB & !nAS_FSB;
 
 MACROCELL | 7 | 4 | nRAS_OBUF
 ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 5
-INPUTS | 9 | ram/RefRAS  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | nAS_FSB  | ram/RAMEN  | A_FSB<21>  | nWE_FSB  | nLDS_FSB
-INPUTMC | 3 | 1 | 10 | 4 | 3 | 4 | 9
-INPUTP | 6 | 36 | 30 | 54 | 29 | 47 | 49
-EXPORTS | 1 | 7 | 5
-EQ | 6 | 
+INPUTS | 7 | ram/RefRAS  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | nAS_FSB  | ram/RAMEN  | A_FSB<21>
+INPUTMC | 3 | 0 | 4 | 4 | 3 | 4 | 9
+INPUTP | 4 | 36 | 30 | 54 | 29
+EQ | 5 | 
    !nRAS = ram/RefRAS
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & 
 	ram/RAMEN
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
 	!cs/nOverlay1 & !nAS_FSB & ram/RAMEN;
-    nRAS_OBUF.EXP  =  !nWE_FSB & !nLDS_FSB & !nAS_FSB & ram/RAMEN
 
 MACROCELL | 4 | 4 | ram/nCAS
 ATTRIBUTES | 8684290 | 0
@@ -1947,28 +1873,37 @@ GLOBALS | 1 | 2 | FCLK
 MACROCELL | 3 | 7 | N0
 ATTRIBUTES | 265986 | 0
 INPUTS | 1 | cnt/nRESout
-INPUTMC | 1 | 3 | 0
+INPUTMC | 1 | 3 | 11
 EQ | 2 | 
    nRES = Gnd;
    nRES.OE = !cnt/nRESout;
 
 MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0
 ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 2
-INPUTS | 8 | A_FSB<19>  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | ram/RefUrgent  | A_FSB<23>  | nAS_FSB  | fsb/ASrf
-INPUTMC | 5 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 7 | 1 | 14
-INPUTP | 3 | 26 | 36 | 54
-EXPORTS | 1 | 7 | 2
-EQ | 9 | 
-   RA<11> = A_FSB<19>;
-    A_FSB_19_IBUF$BUF0.EXP  =  ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd3
-	# ram/RS_FSM_FFd1 & !ram/RefUrgent & 
-	!ram/RS_FSM_FFd3
-	# A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd3
-	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & 
-	!fsb/ASrf
+OUTPUTMC | 1 | 7 | 0
+INPUTS | 19 | A_FSB<13>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | iobs/Once  | cs/nOverlay1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | A_FSB<14>  | A_FSB<23>  | A_FSB<22>  | nAS_FSB  | nADoutLE1  | iobs/Clear1.EXP
+INPUTMC | 7 | 7 | 0 | 4 | 3 | 7 | 13 | 7 | 6 | 0 | 6 | 5 | 13 | 7 | 2
+INPUTP | 12 | 18 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 19 | 36 | 30 | 54
+EXPORTS | 1 | 7 | 0
+IMPORTS | 1 | 7 | 2
+EQ | 17 | 
+   RA<11> = ;Imported pterms FB8_3
+	  A_FSB<19>;
+    A_FSB_19_IBUF$BUF0.EXP  =  A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1
+	# A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1
+	# A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1
+	# A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & 
+	A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	!nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1
 
 MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0
 ATTRIBUTES | 264962 | 0
@@ -1984,60 +1919,63 @@ EQ | 3 |
 
 MACROCELL | 5 | 13 | nADoutLE1_OBUF
 ATTRIBUTES | 8815366 | 0
-OUTPUTMC | 22 | 7 | 15 | 2 | 14 | 2 | 2 | 5 | 13 | 0 | 16 | 2 | 11 | 2 | 5 | 0 | 15 | 2 | 8 | 7 | 11 | 7 | 6 | 7 | 9 | 2 | 4 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 2 | 17 | 7 | 5 | 7 | 7 | 7 | 12 | 7 | 14
+OUTPUTMC | 17 | 2 | 16 | 2 | 14 | 2 | 1 | 5 | 13 | 0 | 11 | 2 | 11 | 0 | 16 | 0 | 10 | 2 | 8 | 7 | 10 | 7 | 13 | 7 | 15 | 7 | 2 | 2 | 6 | 2 | 13 | 2 | 15 | 7 | 1
 INPUTS | 3 | iobs/Clear1  | nADoutLE1  | iobs/Load1
-INPUTMC | 3 | 2 | 4 | 5 | 13 | 7 | 9
+INPUTMC | 3 | 7 | 2 | 5 | 13 | 7 | 15
 EQ | 3 | 
    !nADoutLE1.D = iobs/Load1
 	# !iobs/Clear1 & !nADoutLE1;
    nADoutLE1.CLK = FCLK;	// GCK
 GLOBALS | 1 | 2 | FCLK
 
+MACROCELL | 3 | 1 | nAoutOE_OBUF
+ATTRIBUTES | 8815366 | 0
+OUTPUTMC | 6 | 5 | 1 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 4
+INPUTS | 3 | nBR_IOB  | cnt/PORS_FSM_FFd1  | cnt/PORS_FSM_FFd2
+INPUTMC | 3 | 7 | 14 | 3 | 6 | 3 | 12
+EQ | 2 | 
+   !nAoutOE.D = !nBR_IOB & cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2;
+   !nAoutOE.CLK = C8M;	// GCK
+GLOBALS | 1 | 2 | C8M
+
 MACROCELL | 7 | 5 | nRAMLWE_OBUF
 ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 6
-INPUTS | 11 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | cs/nOverlay1  | A_FSB<19>  | A_FSB<16>  | nWE_FSB  | nRAS_OBUF.EXP
-INPUTMC | 5 | 7 | 6 | 1 | 15 | 5 | 13 | 4 | 3 | 7 | 4
-INPUTP | 6 | 36 | 30 | 29 | 26 | 22 | 47
-EXPORTS | 1 | 7 | 6
-IMPORTS | 1 | 7 | 4
-EQ | 12 | 
-   !nRAMLWE = ;Imported pterms FB8_5
-	  !nWE_FSB & !nLDS_FSB & !nAS_FSB & ram/RAMEN;
-    nRAMLWE_OBUF.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+INPUTS | 4 | nWE_FSB  | nLDS_FSB  | nAS_FSB  | ram/RAMEN
+INPUTMC | 1 | 4 | 9
+INPUTP | 3 | 47 | 49 | 54
+EQ | 1 | 
+   !nRAMLWE = !nWE_FSB & !nLDS_FSB & !nAS_FSB & ram/RAMEN;
 
 MACROCELL | 7 | 7 | nRAMUWE_OBUF
 ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 6
-INPUTS | 15 | nWE_FSB  | nUDS_FSB  | nAS_FSB  | ram/RAMEN  | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<17>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 5 | 4 | 9 | 7 | 6 | 1 | 15 | 5 | 13 | 4 | 3
-INPUTP | 10 | 47 | 56 | 54 | 36 | 29 | 24 | 23 | 19 | 18 | 30
-EXPORTS | 1 | 7 | 6
-EQ | 9 | 
-   !nRAMUWE = !nWE_FSB & !nUDS_FSB & !nAS_FSB & ram/RAMEN;
-    nRAMUWE_OBUF.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+OUTPUTMC | 1 | 7 | 8
+INPUTS | 12 | ram/RS_FSM_FFd1  | ram/RefUrgent  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RAMEN  | A_FSB<21>  | iobs/PS_FSM_FFd1.EXP
+INPUTMC | 8 | 7 | 8 | 0 | 1 | 7 | 10 | 0 | 6 | 4 | 3 | 4 | 12 | 4 | 9 | 7 | 6
+INPUTP | 4 | 36 | 30 | 54 | 29
+EXPORTS | 1 | 7 | 8
+IMPORTS | 1 | 7 | 6
+EQ | 15 | 
+   !nRAMUWE = ;Imported pterms FB8_7
+	  !nWE_FSB & !nUDS_FSB & !nAS_FSB & ram/RAMEN;
+    nRAMUWE_OBUF.EXP  =  ram/RS_FSM_FFd1 & ram/RefUrgent & 
+	!ram/RS_FSM_FFd3 & fsb/ASrf
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN & 
+	fsb/ASrf
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
+	ram/RefUrgent & !ram/RAMEN
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
+	ram/RefUrgent & !ram/RAMEN & fsb/ASrf
 
 MACROCELL | 4 | 1 | nROMCS_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 0
 INPUTS | 12 | A_FSB<22>  | A_FSB<21>  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RS_FSM_FFd3  | ram/RefReq  | cs/nOverlay1  | A_FSB<23>  | nAS_FSB  | ram/RAMEN  | fsb/ASrf  | ram/RefDone.EXP
-INPUTMC | 8 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 9 | 4 | 3 | 4 | 9 | 1 | 14 | 4 | 2
+INPUTMC | 8 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 3 | 4 | 3 | 4 | 9 | 0 | 6 | 4 | 2
 INPUTP | 4 | 30 | 29 | 36 | 54
 EXPORTS | 1 | 4 | 0
 IMPORTS | 1 | 4 | 2
@@ -2069,32 +2007,32 @@ INPUTS | 0
 EQ | 1 | 
    C20MEN = Vcc;
 
-MACROCELL | 2 | 0 | EXP14_
+MACROCELL | 2 | 1 | EXP14_
 ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 1
-INPUTS | 20 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | fsb/Ready0r  | fsb/VPA  | fsb/ASrf  | ram/RAMReady  | A_FSB<21>  | nAS_FSB  | A_FSB<14>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | A_FSB<13>  | EXP21_.EXP
-INPUTMC | 8 | 4 | 3 | 2 | 5 | 2 | 1 | 1 | 14 | 4 | 16 | 2 | 9 | 2 | 6 | 2 | 17
-INPUTP | 12 | 36 | 30 | 29 | 54 | 19 | 28 | 26 | 24 | 23 | 22 | 47 | 18
-EXPORTS | 1 | 2 | 1
-IMPORTS | 1 | 2 | 17
-EQ | 33 | 
-       EXP14_.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
-;Imported pterms FB3_18
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & 
-	!nADoutLE1
+OUTPUTMC | 1 | 2 | 0
+INPUTS | 25 | A_FSB<14>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | nAS_FSB  | nADoutLE1  | fsb/ASrf  | A_FSB<13>  | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | EXP15_.EXP
+INPUTMC | 7 | 4 | 3 | 2 | 9 | 2 | 0 | 0 | 16 | 5 | 13 | 0 | 6 | 2 | 2
+INPUTP | 18 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 54 | 18 | 12 | 11 | 21 | 17 | 15 | 13 | 36 | 30
+EXPORTS | 1 | 2 | 0
+IMPORTS | 1 | 2 | 2
+EQ | 29 | 
+       EXP14_.EXP  =  A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
+;Imported pterms FB3_3
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
@@ -2106,64 +2044,106 @@ EQ | 33 |
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf
 
 MACROCELL | 2 | 2 | EXP15_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 1
-INPUTS | 17 | A_FSB<14>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | fsb/ASrf  | A_FSB<13>  | A_FSB<21>  | nAS_FSB  | nADoutLE1
-INPUTMC | 6 | 4 | 3 | 2 | 9 | 2 | 1 | 2 | 6 | 1 | 14 | 5 | 13
-INPUTP | 11 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 29 | 54
+INPUTS | 20 | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | fsb/Ready1r  | nAS_FSB  | fsb/ASrf  | iobs/IOReady
+INPUTMC | 3 | 2 | 9 | 0 | 6 | 0 | 16
+INPUTP | 17 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 54
 EXPORTS | 1 | 2 | 1
-EQ | 18 | 
-       EXP15_.EXP  =  A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & 
-	!nADoutLE1
+EQ | 12 | 
+       EXP15_.EXP  =  A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf
 
-MACROCELL | 2 | 7 | EXP16_
+MACROCELL | 2 | 4 | EXP16_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 5
+INPUTS | 15 | A_FSB<22>  | A_FSB<20>  | iobs/Once  | iobs/PS_FSM_FFd1  | fsb/ASrf  | A_FSB<14>  | A_FSB<21>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | nAS_FSB  | A_FSB<13>
+INPUTMC | 4 | 7 | 0 | 7 | 6 | 0 | 6 | 4 | 3
+INPUTP | 11 | 30 | 28 | 19 | 29 | 26 | 24 | 23 | 22 | 47 | 54 | 18
+EXPORTS | 1 | 2 | 5
+EQ | 14 | 
+       EXP16_.EXP  =  A_FSB<22> & A_FSB<20> & !iobs/Once & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+
+MACROCELL | 2 | 5 | EXP17_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 6
+INPUTS | 9 | A_FSB<23>  | iobs/Once  | nAS_FSB  | iobs/PS_FSM_FFd1  | fsb/ASrf  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | EXP16_.EXP
+INPUTMC | 4 | 7 | 0 | 7 | 6 | 0 | 6 | 2 | 4
+INPUTP | 5 | 36 | 54 | 30 | 29 | 28
+EXPORTS | 1 | 2 | 6
+IMPORTS | 1 | 2 | 4
+EQ | 25 | 
+       EXP17_.EXP  =  A_FSB<23> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd1
+	# A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd1 & 
+	fsb/ASrf
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd1
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd1
+;Imported pterms FB3_5
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+
+MACROCELL | 2 | 7 | EXP18_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 8
-INPUTS | 18 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | fsb/Ready0r  | nDTACK_FSB  | ram/RAMReady  | A_FSB<21>  | A_FSB<20>  | fsb/Ready1r  | iobs/IOReady  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | A_FSB<13>  | iobs/IOReady.EXP
-INPUTMC | 7 | 4 | 3 | 2 | 5 | 2 | 8 | 4 | 16 | 2 | 9 | 2 | 6 | 2 | 6
-INPUTP | 11 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 18
+INPUTS | 13 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | iobs/IOREQ.EXP
+INPUTMC | 8 | 0 | 6 | 2 | 9 | 0 | 16 | 2 | 8 | 4 | 3 | 4 | 6 | 4 | 16 | 2 | 6
+INPUTP | 5 | 54 | 36 | 30 | 29 | 28
 EXPORTS | 1 | 2 | 8
 IMPORTS | 1 | 2 | 6
-EQ | 24 | 
-       EXP16_.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	!iobs/IOReady & nDTACK_FSB
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-;Imported pterms FB3_7
-	# nAS_FSB & !fsb/ASrf
+EQ | 18 | 
+       EXP18_.EXP  =  nAS_FSB & !fsb/ASrf
 	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
 	nDTACK_FSB
+	# A_FSB<22> & A_FSB<21> & !fsb/Ready1r & 
+	!iobs/IOReady & nDTACK_FSB
+	# A_FSB<22> & A_FSB<20> & !fsb/Ready1r & 
+	!iobs/IOReady & nDTACK_FSB
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
+;Imported pterms FB3_7
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
@@ -2173,143 +2153,135 @@ EQ | 24 |
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & iobs/IOReady
 
-MACROCELL | 2 | 10 | EXP17_
+MACROCELL | 2 | 10 | EXP19_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 11
-INPUTS | 11 | nWE_FSB  | iobs/IORW1  | nAS_FSB  | fsb/ASrf  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready1r.EXP
-INPUTMC | 6 | 2 | 11 | 1 | 14 | 7 | 6 | 1 | 15 | 4 | 3 | 2 | 9
-INPUTP | 5 | 47 | 54 | 36 | 30 | 29
+INPUTS | 9 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<19>  | nWE_FSB  | cs/nOverlay1  | fsb/Ready1r.EXP
+INPUTMC | 3 | 0 | 6 | 4 | 3 | 2 | 9
+INPUTP | 6 | 54 | 36 | 30 | 29 | 26 | 47
 EXPORTS | 1 | 2 | 11
 IMPORTS | 1 | 2 | 9
 EQ | 7 | 
-       EXP17_.EXP  =  !nWE_FSB & !iobs/IORW1
-	# nAS_FSB & !fsb/ASrf
-	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+       EXP19_.EXP  =  nAS_FSB & !fsb/ASrf
 	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<19>
+	# !A_FSB<23> & !A_FSB<22> & nWE_FSB
 	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
 ;Imported pterms FB3_10
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22>
 
-MACROCELL | 2 | 12 | EXP18_
+MACROCELL | 2 | 12 | EXP20_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 11
-INPUTS | 8 | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 1 | 4 | 3
-INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 30
+INPUTS | 7 | A_FSB<23>  | A_FSB<22>  | A_FSB<20>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<21>
+INPUTP | 7 | 36 | 30 | 28 | 24 | 23 | 22 | 29
 EXPORTS | 1 | 2 | 11
-EQ | 6 | 
-       EXP18_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
+EQ | 5 | 
+       EXP20_.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<20>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<18>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<17>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<16>
+	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20>
 
-MACROCELL | 2 | 13 | EXP19_
+MACROCELL | 2 | 13 | EXP21_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 14
-INPUTS | 12 | A_FSB<23>  | nWE_FSB  | iobs/Once  | iobs/IORW0  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | nADoutLE1  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | nAS_FSB
-INPUTMC | 6 | 7 | 16 | 2 | 14 | 7 | 6 | 1 | 15 | 1 | 14 | 5 | 13
-INPUTP | 6 | 36 | 47 | 30 | 29 | 28 | 54
+INPUTS | 13 | iobs/IORW1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<23>  | A_FSB<21>  | A_FSB<20>  | iobs/IORW0  | nWE_FSB  | iobs/Once  | nAS_FSB  | fsb/ASrf  | A_FSB<22>
+INPUTMC | 7 | 2 | 11 | 7 | 13 | 7 | 6 | 5 | 13 | 2 | 14 | 7 | 0 | 0 | 6
+INPUTP | 6 | 36 | 29 | 28 | 47 | 54 | 30
 EXPORTS | 1 | 2 | 14
-EQ | 14 | 
-       EXP19_.EXP  =  A_FSB<23> & nWE_FSB & !iobs/Once & !iobs/IORW0 & 
+EQ | 10 | 
+       EXP21_.EXP  =  !iobs/IORW1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
+	!nADoutLE1
+	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !iobs/IORW0 & 
+	nADoutLE1
+	# A_FSB<23> & !nWE_FSB & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# A_FSB<23> & !nWE_FSB & !iobs/Once & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!iobs/Once & !iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!iobs/Once & !iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB & 
-	!iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB & 
-	!iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
+	# A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & 
+	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 
-MACROCELL | 2 | 15 | EXP20_
+MACROCELL | 2 | 15 | EXP22_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 14
-INPUTS | 19 | A_FSB<14>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | iobs/Once  | iobs/IORW0  | nAS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | fsb/ASrf  | A_FSB<13>  | A_FSB<21>  | nROMWE_OBUF.EXP
-INPUTMC | 8 | 4 | 3 | 7 | 16 | 2 | 14 | 7 | 6 | 1 | 15 | 5 | 13 | 1 | 14 | 2 | 16
-INPUTP | 11 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 54 | 18 | 29
+INPUTS | 18 | A_FSB<22>  | A_FSB<21>  | nWE_FSB  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | nADoutLE1  | A_FSB<20>  | nAS_FSB  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | A_FSB<13>  | nROMWE_OBUF.EXP
+INPUTMC | 7 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 5 | 13 | 4 | 3 | 2 | 16
+INPUTP | 11 | 30 | 29 | 47 | 28 | 54 | 19 | 26 | 24 | 23 | 22 | 18
 EXPORTS | 1 | 2 | 14
 IMPORTS | 1 | 2 | 16
-EQ | 33 | 
-       EXP20_.EXP  =  A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & 
-	!iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+EQ | 23 | 
+       EXP22_.EXP  =  A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+	# A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & 
+	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
+	nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
+	nADoutLE1
 ;Imported pterms FB3_17
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & 
+	nADoutLE1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & 
+	nADoutLE1
 
-MACROCELL | 2 | 17 | EXP21_
+MACROCELL | 2 | 17 | EXP23_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 0
-INPUTS | 24 | A_FSB<14>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | fsb/ASrf  | nADoutLE1  | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | nAS_FSB
-INPUTMC | 6 | 4 | 3 | 2 | 9 | 2 | 1 | 2 | 6 | 1 | 14 | 5 | 13
-INPUTP | 18 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 12 | 11 | 21 | 18 | 17 | 15 | 13 | 36 | 54
+INPUTS | 12 | A_FSB<22>  | A_FSB<20>  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | fsb/ASrf  | A_FSB<23>  | cs/nOverlay1  | fsb/Ready0r  | nAS_FSB  | ram/RAMReady  | A_FSB<21>
+INPUTMC | 7 | 2 | 9 | 2 | 0 | 0 | 16 | 0 | 6 | 4 | 3 | 4 | 6 | 4 | 16
+INPUTP | 5 | 30 | 28 | 36 | 54 | 29
 EXPORTS | 1 | 2 | 0
-EQ | 20 | 
-       EXP21_.EXP  =  A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & 
-	cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & 
-	!nADoutLE1
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf
+EQ | 10 | 
+       EXP23_.EXP  =  A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & fsb/ASrf
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
 
-MACROCELL | 4 | 15 | EXP22_
+MACROCELL | 3 | 0 | EXP24_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 3 | 17
+INPUTS | 12 | C8M  | nBERR_IOB  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOBERR  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr
+INPUTMC | 10 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 1 | 11 | 1 | 10
+INPUTP | 2 | 35 | 123
+EXPORTS | 1 | 3 | 17
+EQ | 9 | 
+       EXP24_.EXP  =  C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf & 
+	iobm/BERRrr
+	# C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf & 
+	iobm/DTACKrr
+	# C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf & 
+	iobm/RESrr
+
+MACROCELL | 4 | 15 | EXP25_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 4 | 16
 INPUTS | 10 | A_FSB<23>  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RS_FSM_FFd3  | ram/RefReq  | A_FSB<22>  | A_FSB<21>  | ram/BACTr  | cs/nOverlay1  | RA_6_OBUF.EXP
-INPUTMC | 7 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 9 | 1 | 11 | 4 | 3 | 4 | 14
+INPUTMC | 7 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 3 | 7 | 16 | 4 | 3 | 4 | 14
 INPUTP | 3 | 36 | 30 | 29
 EXPORTS | 1 | 4 | 16
 IMPORTS | 1 | 4 | 14
 EQ | 20 | 
-       EXP22_.EXP  =  A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
+       EXP25_.EXP  =  A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
 	!ram/RS_FSM_FFd3 & !ram/RefReq
 	# A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & 
 	!ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
@@ -2330,16 +2302,16 @@ EQ | 20 |
 	!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
 	!ram/RS_FSM_FFd3 & !ram/RAMEN
 
-MACROCELL | 4 | 17 | EXP23_
+MACROCELL | 4 | 17 | EXP26_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 4 | 0
 INPUTS | 10 | A_FSB<23>  | ram/RS_FSM_FFd2  | ram/RefUrgent  | ram/RS_FSM_FFd3  | ram/BACTr  | ram/RefReq  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | ram/RAMReady.EXP
-INPUTMC | 7 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 11 | 1 | 9 | 4 | 3 | 4 | 16
+INPUTMC | 7 | 4 | 12 | 0 | 1 | 7 | 10 | 7 | 16 | 0 | 3 | 4 | 3 | 4 | 16
 INPUTP | 3 | 36 | 30 | 29
 EXPORTS | 1 | 4 | 0
 IMPORTS | 1 | 4 | 16
 EQ | 17 | 
-       EXP23_.EXP  =  A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
+       EXP26_.EXP  =  A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
 	!ram/RS_FSM_FFd3 & ram/BACTr
 	# A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
 	!ram/RS_FSM_FFd3 & !ram/RefReq
@@ -2357,121 +2329,114 @@ EQ | 17 |
 	!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & 
 	fsb/ASrf
 
-MACROCELL | 7 | 8 | EXP24_
+MACROCELL | 7 | 9 | EXP27_
 ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 9
-INPUTS | 6 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | A_FSB<19>  | nWE_FSB
-INPUTMC | 1 | 4 | 3
-INPUTP | 5 | 36 | 30 | 29 | 26 | 47
-EXPORTS | 1 | 7 | 9
-EQ | 4 | 
-       EXP24_.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB
+OUTPUTMC | 1 | 7 | 10
+INPUTS | 11 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | A_FSB<23>  | nAS_FSB  | fsb/ASrf  | ram/RefUrgent  | ram/RAMEN  | A_FSB<22>  | A_FSB<21>  | ram/RS_FSM_FFd1.EXP
+INPUTMC | 7 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 6 | 0 | 1 | 4 | 9 | 7 | 8
+INPUTP | 4 | 36 | 54 | 30 | 29
+EXPORTS | 1 | 7 | 10
+IMPORTS | 1 | 7 | 8
+EQ | 15 | 
+       EXP27_.EXP  =  !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & 
+	ram/RS_FSM_FFd3
+	# A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd3
+	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & 
+	!fsb/ASrf
+	# !ram/RS_FSM_FFd2 & !ram/RefUrgent & 
+	!ram/RS_FSM_FFd3 & !ram/RAMEN
+	# A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+;Imported pterms FB8_9
+	# ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd3
+	# ram/RS_FSM_FFd1 & !ram/RefUrgent & 
+	!ram/RS_FSM_FFd3
 
-MACROCELL | 7 | 10 | EXP25_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 9
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 1 | 4 | 3
-INPUTP | 8 | 36 | 29 | 24 | 23 | 22 | 19 | 18 | 30
-EXPORTS | 1 | 7 | 9
-EQ | 6 | 
-       EXP25_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
-
-MACROCELL | 7 | 12 | EXP26_
+MACROCELL | 7 | 12 | EXP28_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 7 | 13
-INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | iobs/PS_FSM_FFd2  | nADoutLE1  | cs/nOverlay1  | A_FSB<19>  | A_FSB<16>  | nWE_FSB  | iobs/nBERR_FSB.EXP
-INPUTMC | 4 | 7 | 6 | 5 | 13 | 4 | 3 | 7 | 11
-INPUTP | 6 | 36 | 30 | 29 | 26 | 22 | 47
+INPUTS | 10 | A_FSB<23>  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | A_FSB<22>  | A_FSB<21>  | nAS_FSB  | A_FSB<20>  | iobs/nBERR_FSB.EXP
+INPUTMC | 5 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 7 | 11
+INPUTP | 5 | 36 | 30 | 29 | 54 | 28
 EXPORTS | 1 | 7 | 13
 IMPORTS | 1 | 7 | 11
-EQ | 13 | 
-       EXP26_.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
+EQ | 23 | 
+       EXP28_.EXP  =  A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd2 & 
+	!iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
 ;Imported pterms FB8_12
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
 
-MACROCELL | 7 | 15 | EXP27_
+MACROCELL | 7 | 17 | EXP29_
 ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 16
-INPUTS | 8 | A_FSB<23>  | iobs/Once  | iobs/PS_FSM_FFd1  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1
-INPUTMC | 5 | 7 | 16 | 1 | 15 | 7 | 6 | 5 | 13 | 4 | 3
-INPUTP | 3 | 36 | 30 | 29
-EXPORTS | 1 | 7 | 16
-EQ | 6 | 
-       EXP27_.EXP  =  A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
-	# !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
-	# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/Once
+OUTPUTMC | 1 | 7 | 0
+INPUTS | 16 | A_FSB<22>  | A_FSB<21>  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | A_FSB<20>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cs/nOverlay1  | nAS_FSB  | A_FSB<13>
+INPUTMC | 5 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 4 | 3
+INPUTP | 11 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 54 | 18
+EXPORTS | 1 | 7 | 0
+EQ | 13 | 
+       EXP29_.EXP  =  A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & A_FSB<20> & !iobs/Once & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & 
+	cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
 
-MACROCELL | 7 | 17 | EXP28_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 16
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | iobs/Once  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | cnt/PORS_FSM_FFd1.EXP
-INPUTMC | 2 | 7 | 16 | 7 | 0
-INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 47
-EXPORTS | 1 | 7 | 16
-IMPORTS | 1 | 7 | 0
-EQ | 10 | 
-       EXP28_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & !iobs/Once
-;Imported pterms FB8_1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
-
-PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 4 | 6 | 6 | 2 | 6 | 2 | 17 | 6 | 8
-PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 3 | 6 | 4 | 2 | 6 | 2 | 17
-PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 3 | 4 | 10 | 2 | 6 | 2 | 17
-PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 14 | 7 | 10 | 2 | 6 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 0 | 7 | 7 | 7 | 11 | 4 | 8 | 2 | 2 | 2 | 15 | 2 | 16 | 2 | 17
-PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 14 | 7 | 10 | 2 | 6 | 2 | 7 | 2 | 0 | 2 | 9 | 2 | 8 | 7 | 0 | 7 | 7 | 7 | 11 | 4 | 10 | 2 | 2 | 2 | 15 | 2 | 16 | 2 | 17
-PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 3 | 4 | 13 | 2 | 6 | 2 | 17
-PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 3 | 6 | 1 | 2 | 6 | 2 | 17
-PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 3 | 6 | 5 | 2 | 6 | 2 | 17
-PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 43 | 7 | 16 | 2 | 14 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 11 | 2 | 7 | 2 | 17 | 4 | 6 | 4 | 11 | 7 | 6 | 7 | 1 | 4 | 8 | 7 | 9 | 7 | 13 | 4 | 16 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 13 | 2 | 0 | 2 | 6 | 2 | 10 | 2 | 12 | 4 | 1 | 4 | 2 | 4 | 5 | 4 | 14 | 4 | 15 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 0 | 7 | 5 | 7 | 7 | 7 | 8 | 7 | 10 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 17
-PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 40 | 7 | 16 | 2 | 13 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 8 | 2 | 17 | 4 | 6 | 4 | 11 | 7 | 5 | 7 | 2 | 4 | 8 | 7 | 8 | 7 | 12 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 16 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 5 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 0 | 7 | 7 | 7 | 10 | 7 | 14 | 7 | 15
-PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 40 | 7 | 15 | 2 | 13 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 11 | 2 | 8 | 2 | 17 | 4 | 5 | 4 | 11 | 7 | 5 | 7 | 2 | 4 | 8 | 7 | 8 | 7 | 12 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 6 | 8 | 2 | 16 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 7 | 0 | 7 | 7 | 7 | 10 | 7 | 11 | 7 | 14 | 7 | 17
-PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 20 | 7 | 16 | 2 | 13 | 4 | 7 | 2 | 9 | 2 | 1 | 2 | 11 | 2 | 8 | 7 | 6 | 7 | 9 | 7 | 13 | 6 | 10 | 3 | 5 | 2 | 17 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 15 | 2 | 16 | 4 | 2
-PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 16 | 2 | 17 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 5 | 7 | 8 | 7 | 12 | 6 | 10 | 7 | 1 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
-PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 15 | 7 | 14 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 2 | 17 | 7 | 7 | 7 | 10 | 6 | 7 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
-PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 15 | 7 | 14 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 2 | 17 | 7 | 7 | 7 | 10 | 6 | 4 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
-PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 15 | 7 | 10 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 5 | 2 | 17 | 7 | 12 | 4 | 14 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
-PIN | C16M | 4096 | 0 | N/A | 33 | 30 | 5 | 1 | 0 | 14 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 17 | 5 | 0 | 5 | 15 | 5 | 3 | 0 | 10 | 0 | 8 | 5 | 2 | 0 | 6 | 0 | 3 | 0 | 1 | 0 | 0 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 5 | 0 | 11 | 0 | 9 | 0 | 4 | 0 | 2 | 5 | 16
-PIN | nWE_FSB | 64 | 0 | N/A | 47 | 20 | 2 | 17 | 2 | 14 | 2 | 9 | 2 | 0 | 2 | 11 | 2 | 8 | 7 | 5 | 7 | 8 | 7 | 12 | 4 | 5 | 2 | 16 | 3 | 5 | 7 | 4 | 7 | 7 | 2 | 2 | 2 | 7 | 2 | 10 | 2 | 13 | 2 | 15 | 7 | 17
-PIN | C8M | 8256 | 0 | N/A | 35 | 27 | 0 | 17 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 14 | 5 | 16 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 1 | 7 | 14 | 7 | 0 | 3 | 6 | 0 | 12 | 3 | 0 | 0 | 7
-PIN | FCLK | 16384 | 0 | N/A | 42 | 38 | 4 | 3 | 7 | 16 | 2 | 14 | 4 | 2 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 0 | 16 | 1 | 17 | 2 | 11 | 2 | 6 | 0 | 15 | 1 | 16 | 2 | 8 | 7 | 11 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 6 | 1 | 7 | 7 | 2 | 1 | 15 | 4 | 9 | 1 | 12 | 7 | 9 | 1 | 11 | 1 | 9 | 1 | 8 | 1 | 13 | 2 | 4 | 7 | 13 | 4 | 16 | 1 | 10 | 1 | 6 | 5 | 13 | 1 | 14 | 4 | 4
-PIN | nAS_FSB | 64 | 0 | N/A | 54 | 36 | 4 | 3 | 7 | 16 | 2 | 14 | 4 | 7 | 2 | 4 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 6 | 2 | 5 | 7 | 11 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 6 | 7 | 1 | 4 | 9 | 7 | 9 | 1 | 11 | 1 | 14 | 7 | 13 | 4 | 16 | 4 | 5 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 4 | 4 | 11 | 7 | 7 | 2 | 0 | 2 | 2 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 1 | 4 | 8
-PIN | nBG_IOB | 64 | 0 | N/A | 117 | 1 | 0 | 14
-PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 0 | 16 | 1 | 17 | 7 | 4
-PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 0 | 15 | 1 | 16 | 7 | 7
-PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 4 | 5 | 17 | 0 | 11 | 0 | 10 | 5 | 16
-PIN | E | 64 | 0 | N/A | 37 | 8 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9 | 0 | 7 | 3 | 14 | 3 | 13
-PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 0 | 12
-PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 0 | 9 | 0 | 8
-PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 0 | 2 | 0 | 1
+PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 5 | 6 | 6 | 2 | 6 | 2 | 1 | 2 | 2 | 6 | 8
+PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 4 | 6 | 4 | 2 | 6 | 2 | 1 | 2 | 2
+PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 4 | 4 | 10 | 2 | 6 | 2 | 1 | 2 | 2
+PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 13 | 2 | 16 | 2 | 2 | 2 | 6 | 4 | 8 | 2 | 9 | 2 | 8 | 7 | 11 | 7 | 1 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 16 | 7 | 17
+PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 13 | 2 | 16 | 2 | 2 | 2 | 6 | 4 | 10 | 2 | 9 | 2 | 8 | 7 | 11 | 7 | 1 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 16 | 7 | 17
+PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 4 | 4 | 13 | 2 | 6 | 2 | 1 | 2 | 2
+PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 4 | 6 | 1 | 2 | 6 | 2 | 1 | 2 | 2
+PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 4 | 6 | 5 | 2 | 6 | 2 | 1 | 2 | 2
+PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 37 | 7 | 0 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 13 | 7 | 9 | 4 | 8 | 7 | 15 | 2 | 5 | 4 | 16 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 13 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 12 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 15 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 1 | 7 | 12 | 7 | 14 | 7 | 16
+PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 40 | 7 | 0 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 12 | 7 | 10 | 4 | 8 | 7 | 15 | 2 | 5 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 15 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 12 | 2 | 13 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 1 | 7 | 9 | 7 | 14 | 7 | 16 | 7 | 17
+PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 38 | 7 | 0 | 2 | 13 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 12 | 7 | 9 | 4 | 8 | 7 | 14 | 2 | 5 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 6 | 8 | 2 | 16 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 7 | 1 | 7 | 11 | 7 | 16 | 7 | 17
+PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 24 | 7 | 0 | 2 | 13 | 4 | 7 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 12 | 7 | 11 | 2 | 5 | 6 | 10 | 3 | 5 | 2 | 17 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 6 | 2 | 12 | 2 | 15 | 2 | 16 | 4 | 2 | 7 | 1 | 7 | 16 | 7 | 17
+PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 14 | 2 | 16 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 10 | 2 | 8 | 7 | 11 | 7 | 14 | 2 | 4 | 6 | 10 | 2 | 1 | 7 | 1 | 7 | 2 | 7 | 17
+PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 13 | 2 | 16 | 2 | 12 | 2 | 6 | 6 | 7 | 2 | 2 | 2 | 8 | 7 | 11 | 7 | 1 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 16 | 7 | 17
+PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 13 | 2 | 16 | 2 | 12 | 2 | 6 | 6 | 4 | 2 | 2 | 2 | 8 | 7 | 11 | 7 | 14 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 1 | 7 | 17
+PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 13 | 2 | 16 | 2 | 12 | 2 | 6 | 4 | 14 | 2 | 2 | 2 | 8 | 7 | 11 | 7 | 14 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 1 | 7 | 17
+PIN | C16M | 4096 | 0 | N/A | 33 | 28 | 5 | 1 | 5 | 4 | 3 | 9 | 5 | 12 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 3 | 17 | 5 | 0 | 5 | 17 | 5 | 3 | 3 | 2 | 1 | 15 | 5 | 2 | 1 | 13 | 1 | 10 | 1 | 8 | 5 | 8 | 5 | 10 | 5 | 11 | 1 | 12 | 3 | 3 | 1 | 16 | 1 | 11 | 1 | 9 | 5 | 16
+PIN | nWE_FSB | 64 | 0 | N/A | 47 | 16 | 2 | 15 | 2 | 13 | 2 | 1 | 7 | 6 | 2 | 11 | 2 | 8 | 7 | 11 | 7 | 15 | 2 | 4 | 4 | 5 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 10 | 7 | 1 | 7 | 17
+PIN | C8M | 8256 | 0 | N/A | 35 | 27 | 5 | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0 | 3 | 16 | 5 | 16 | 3 | 13 | 6 | 0 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 7 | 14 | 3 | 6 | 3 | 12 | 3 | 8 | 3 | 11 | 1 | 14 | 3 | 1
+PIN | FCLK | 16384 | 0 | N/A | 42 | 38 | 7 | 0 | 4 | 3 | 2 | 14 | 4 | 2 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 0 | 11 | 0 | 8 | 2 | 11 | 0 | 16 | 0 | 10 | 0 | 7 | 2 | 8 | 7 | 11 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 13 | 0 | 1 | 7 | 10 | 7 | 6 | 4 | 9 | 0 | 5 | 7 | 15 | 7 | 16 | 0 | 3 | 0 | 2 | 7 | 3 | 7 | 2 | 2 | 6 | 4 | 16 | 0 | 4 | 0 | 0 | 5 | 13 | 0 | 6 | 4 | 4
+PIN | nAS_FSB | 64 | 0 | N/A | 54 | 43 | 7 | 0 | 4 | 3 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 0 | 16 | 2 | 7 | 7 | 11 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 13 | 7 | 9 | 4 | 9 | 7 | 15 | 7 | 16 | 0 | 6 | 2 | 5 | 4 | 16 | 4 | 5 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 4 | 7 | 5 | 7 | 6 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 1 | 4 | 8 | 4 | 11 | 7 | 1 | 7 | 7 | 7 | 10 | 7 | 12 | 7 | 17
+PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 0 | 11 | 0 | 8 | 7 | 5
+PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 0 | 10 | 0 | 7 | 7 | 6
+PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 5 | 3 | 17 | 3 | 3 | 3 | 2 | 3 | 0 | 3 | 16
+PIN | E | 64 | 0 | N/A | 37 | 8 | 0 | 9 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12 | 1 | 14 | 0 | 17 | 0 | 15
+PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 3 | 8
+PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 1 | 16 | 1 | 15
+PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 9 | 1 | 8
 PIN | A_FSB<1> | 64 | 0 | N/A | 149 | 1 | 6 | 5
 PIN | A_FSB<2> | 64 | 0 | N/A | 153 | 1 | 6 | 1
 PIN | A_FSB<3> | 64 | 0 | N/A | 155 | 1 | 4 | 13
@@ -2480,12 +2445,11 @@ PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 7
 PIN | A_FSB<6> | 64 | 0 | N/A | 6 | 1 | 4 | 10
 PIN | A_FSB<7> | 64 | 0 | N/A | 8 | 1 | 4 | 13
 PIN | nVMA_IOB | 536871040 | 0 | N/A | 118
-PIN | nAS_IOB | 536871040 | 0 | N/A | 135
 PIN | nLDS_IOB | 536871040 | 0 | N/A | 130
 PIN | nUDS_IOB | 536871040 | 0 | N/A | 134
+PIN | nAS_IOB | 536871040 | 0 | N/A | 135
 PIN | nDTACK_FSB | 536871040 | 0 | N/A | 44
 PIN | nBERR_FSB | 536871040 | 0 | N/A | 112
-PIN | nAoutOE | 536871040 | 0 | N/A | 141
 PIN | nBR_IOB | 536871040 | 0 | N/A | 116
 PIN | RA<0> | 536871040 | 0 | N/A | 86
 PIN | RA<1> | 536871040 | 0 | N/A | 79
@@ -2509,9 +2473,10 @@ PIN | nCAS | 536871040 | 0 | N/A | 59
 PIN | RA<11> | 536871040 | 0 | N/A | 102
 PIN | RA<10> | 536871040 | 0 | N/A | 90
 PIN | nADoutLE1 | 536871040 | 0 | N/A | 136
+PIN | nAoutOE | 536871040 | 0 | N/A | 141
 PIN | nRAMLWE | 536871040 | 0 | N/A | 104
 PIN | nRAMUWE | 536871040 | 0 | N/A | 105
 PIN | nROMCS | 536871040 | 0 | N/A | 58
 PIN | C25MEN | 536871040 | 0 | N/A | 95
 PIN | C20MEN | 536871040 | 0 | N/A | 96
-PIN | nRES | 536870976 | 0 | N/A | 145 | 3 | 4 | 7 | 0 | 4 | 0 | 3
+PIN | nRES | 536870976 | 0 | N/A | 145 | 3 | 4 | 7 | 1 | 11 | 1 | 10
diff --git a/cpld/XC95144XL/WarpSE.nga b/cpld/XC95144XL/WarpSE.nga
index f7c4c6c..a809756 100644
--- a/cpld/XC95144XL/WarpSE.nga
+++ b/cpld/XC95144XL/WarpSE.nga
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
 XILINX-XDM V1.6e
-$7420=#Zl|/;6&?:183-c=/83:1<$.'0;294,773!;;<=4>01295567!890$<?80182526728;<<='>3:*2056728>;<=4>4123-46< 8=;<7?80182356.991#=5>?:0:34?7?89#:<6&=712962672;=;<$??;)0;45<509:1>5>?)028,667839;<=4<012*64=/;9:;6>>?0;1345/' :?;<7=:0180156.991#?8>?:2734?5289#o7%:?0;634?278 ;;7%8?0185456=>9:;%<>4(6234?17890<<=>&119+=56720:;<77?01+2?57<9;1:<?5>1392644<9;0DYY^ZT;PB847=8780=><41508504<9?80=:<419085<7<:;19<?5=2391742<::0BB][[:@]EWG:5;3;5>6<;2:066>40:283>6<61:11?6653:897>==;261?6353:<97>9>;508054<<8808?<44208034<=9809?<45208114<=<809;<459081<7<>;1=??59439517=1>81<>69?2:516>14:2=?>6992:546>1?:2=2=66=;921?=75318975;=;941?=15313:74<49108=44<1;805><49508=04<1?805:=4AOF:?DHIG]K_II74A^DPF9776m1JSK]M<02=*UGC12KTJ^L310<g?DYA[K6:=3 _AE;8EZ@TJ5;92i5N_GQA8449&YKO56OPFR@?568c3HUM_O2>3?,SEA?<IVLXN1?;>e9B[CUE48>5"]OK9:C\BVD;9<4o7LQISC>21;(WIM30MRH\B=35:a=FWOYI0<81.QCG=>GXNZH7=:0k;@]EWG:6?7$[MI74A^DPF97?6m1JSK]M<0:=*UGC12KTJ^L318<g?DYA[K6:53 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\ No newline at end of file
diff --git a/cpld/XC95144XL/WarpSE.ngc b/cpld/XC95144XL/WarpSE.ngc
index 1951002..96063e6 100644
--- a/cpld/XC95144XL/WarpSE.ngc
+++ b/cpld/XC95144XL/WarpSE.ngc
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
 XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/WarpSE.ngd b/cpld/XC95144XL/WarpSE.ngd
index f9867f5..f06654a 100644
--- a/cpld/XC95144XL/WarpSE.ngd
+++ b/cpld/XC95144XL/WarpSE.ngd
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
 XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/WarpSE.ngr b/cpld/XC95144XL/WarpSE.ngr
index 9f794dc..e3124c6 100644
--- a/cpld/XC95144XL/WarpSE.ngr
+++ b/cpld/XC95144XL/WarpSE.ngr
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
 XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/WarpSE.pad b/cpld/XC95144XL/WarpSE.pad
index eb9340d..3a6643e 100644
--- a/cpld/XC95144XL/WarpSE.pad
+++ b/cpld/XC95144XL/WarpSE.pad
@@ -1,7 +1,7 @@
 Release 8.1i - Fit P.20131013
 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
 
- 3-20-2023 11:54PM
+ 3-25-2023  0:52AM
 
 NOTE: This file is designed to be imported into a spreadsheet program
 such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -90,7 +90,7 @@ P69|GND||GND||||||||||
 P70|nBERR_FSB|O|I/O|OUTPUT|||||||||
 P71|TIE||I/O||||||||||
 P72|nBR_IOB|O|I/O|OUTPUT|||||||||
-P73|nBG_IOB|I|I/O|INPUT|||||||||
+P73|TIE||I/O||||||||||
 P74|nVMA_IOB|O|I/O|OUTPUT|||||||||
 P75|GND||GND||||||||||
 P76|nBERR_IOB|I|I/O|INPUT|||||||||
diff --git a/cpld/XC95144XL/WarpSE.pnx b/cpld/XC95144XL/WarpSE.pnx
index 338ba7f..8d0e15a 100644
--- a/cpld/XC95144XL/WarpSE.pnx
+++ b/cpld/XC95144XL/WarpSE.pnx
@@ -15,4 +15,4 @@
   sr     (SLOW|FAST|slow|fast) "SLOW"
   dir    (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
 ]>
-<ibis><part arch="xc9500xl" device="XC95144XL" pkg="TQ100" spg="-10"/><pin dir="input" nm="A_FSB&lt;9&gt;" no="7"/><pin dir="input" nm="A_FSB&lt;8&gt;" no="6"/><pin dir="input" nm="A_FSB&lt;15&gt;" no="13"/><pin dir="input" nm="A_FSB&lt;14&gt;" no="12"/><pin dir="input" nm="A_FSB&lt;13&gt;" no="11"/><pin dir="input" nm="A_FSB&lt;12&gt;" no="10"/><pin dir="input" nm="A_FSB&lt;11&gt;" no="9"/><pin dir="input" nm="A_FSB&lt;10&gt;" no="8"/><pin dir="input" nm="A_FSB&lt;23&gt;" no="24"/><pin dir="input" nm="A_FSB&lt;22&gt;" no="20"/><pin dir="input" nm="A_FSB&lt;21&gt;" no="19"/><pin dir="input" nm="A_FSB&lt;20&gt;" no="18"/><pin dir="input" nm="A_FSB&lt;19&gt;" no="17"/><pin dir="input" nm="A_FSB&lt;18&gt;" no="16"/><pin dir="input" nm="A_FSB&lt;17&gt;" no="15"/><pin dir="input" nm="A_FSB&lt;16&gt;" no="14"/><pin dir="input" nm="C16M" no="22"/><pin dir="input" nm="nWE_FSB" no="29"/><pin dir="input" nm="C8M" no="23"/><pin dir="input" nm="FCLK" no="27"/><pin dir="input" nm="nAS_FSB" no="32"/><pin dir="input" nm="nBG_IOB" no="73"/><pin dir="input" nm="nLDS_FSB" no="30"/><pin dir="input" nm="nUDS_FSB" no="33"/><pin dir="input" nm="nBERR_IOB" no="76"/><pin dir="input" nm="E" no="25"/><pin dir="input" nm="nIPL2" no="92"/><pin dir="input" nm="nDTACK_IOB" no="78"/><pin dir="input" nm="nVPA_IOB" no="77"/><pin dir="input" nm="A_FSB&lt;1&gt;" no="94"/><pin dir="input" nm="A_FSB&lt;2&gt;" no="95"/><pin dir="input" nm="A_FSB&lt;3&gt;" no="96"/><pin dir="input" nm="A_FSB&lt;4&gt;" no="97"/><pin dir="input" nm="A_FSB&lt;5&gt;" no="2"/><pin dir="input" nm="A_FSB&lt;6&gt;" no="3"/><pin dir="input" nm="A_FSB&lt;7&gt;" no="4"/><pin dir="output" nm="nVMA_IOB" no="74" sr="fast"/><pin dir="output" nm="nAS_IOB" no="81" sr="fast"/><pin dir="output" nm="nLDS_IOB" no="79" sr="fast"/><pin dir="output" nm="nUDS_IOB" no="80" sr="fast"/><pin dir="output" nm="nDTACK_FSB" no="28" sr="fast"/><pin dir="output" nm="nBERR_FSB" no="70" sr="fast"/><pin dir="output" nm="nAoutOE" no="87" sr="fast"/><pin dir="output" nm="nBR_IOB" no="72" sr="fast"/><pin dir="output" nm="RA&lt;0&gt;" no="53" sr="fast"/><pin dir="output" nm="RA&lt;1&gt;" no="50" sr="fast"/><pin dir="output" nm="RA&lt;2&gt;" no="43" sr="fast"/><pin dir="output" nm="RA&lt;3&gt;" no="41" sr="fast"/><pin dir="output" nm="RA&lt;4&gt;" no="40" sr="fast"/><pin dir="output" nm="RA&lt;5&gt;" no="42" sr="fast"/><pin dir="output" nm="RA&lt;6&gt;" no="46" sr="fast"/><pin dir="output" nm="RA&lt;7&gt;" no="52" sr="fast"/><pin dir="output" nm="RA&lt;8&gt;" no="54" sr="fast"/><pin dir="output" nm="RA&lt;9&gt;" no="56" sr="fast"/><pin dir="output" nm="nDoutOE" no="89" sr="fast"/><pin dir="output" nm="nOE" no="37" sr="fast"/><pin dir="output" nm="nROMWE" no="34" sr="fast"/><pin dir="output" nm="nVPA_FSB" no="93" sr="fast"/><pin dir="output" nm="nDinLE" no="86" sr="fast"/><pin dir="output" nm="nADoutLE0" no="85" sr="fast"/><pin dir="output" nm="nDinOE" no="90" sr="fast"/><pin dir="output" nm="nRAS" no="64" sr="fast"/><pin dir="output" nm="nCAS" no="36" sr="fast"/><pin dir="output" nm="RA&lt;11&gt;" no="63" sr="fast"/><pin dir="output" nm="RA&lt;10&gt;" no="55" sr="fast"/><pin dir="output" nm="nADoutLE1" no="82" sr="fast"/><pin dir="output" nm="nRAMLWE" no="65" sr="fast"/><pin dir="output" nm="nRAMUWE" no="66" sr="fast"/><pin dir="output" nm="nROMCS" no="35" sr="fast"/><pin dir="output" nm="C25MEN" no="58" sr="fast"/><pin dir="output" nm="C20MEN" no="59" sr="fast"/><pin dir="bidir" nm="nRES" no="91" sr="fast"/></ibis>
+<ibis><part arch="xc9500xl" device="XC95144XL" pkg="TQ100" spg="-10"/><pin dir="input" nm="A_FSB&lt;9&gt;" no="7"/><pin dir="input" nm="A_FSB&lt;8&gt;" no="6"/><pin dir="input" nm="A_FSB&lt;15&gt;" no="13"/><pin dir="input" nm="A_FSB&lt;14&gt;" no="12"/><pin dir="input" nm="A_FSB&lt;13&gt;" no="11"/><pin dir="input" nm="A_FSB&lt;12&gt;" no="10"/><pin dir="input" nm="A_FSB&lt;11&gt;" no="9"/><pin dir="input" nm="A_FSB&lt;10&gt;" no="8"/><pin dir="input" nm="A_FSB&lt;23&gt;" no="24"/><pin dir="input" nm="A_FSB&lt;22&gt;" no="20"/><pin dir="input" nm="A_FSB&lt;21&gt;" no="19"/><pin dir="input" nm="A_FSB&lt;20&gt;" no="18"/><pin dir="input" nm="A_FSB&lt;19&gt;" no="17"/><pin dir="input" nm="A_FSB&lt;18&gt;" no="16"/><pin dir="input" nm="A_FSB&lt;17&gt;" no="15"/><pin dir="input" nm="A_FSB&lt;16&gt;" no="14"/><pin dir="input" nm="C16M" no="22"/><pin dir="input" nm="nWE_FSB" no="29"/><pin dir="input" nm="C8M" no="23"/><pin dir="input" nm="FCLK" no="27"/><pin dir="input" nm="nAS_FSB" no="32"/><pin dir="input" nm="nLDS_FSB" no="30"/><pin dir="input" nm="nUDS_FSB" no="33"/><pin dir="input" nm="nBERR_IOB" no="76"/><pin dir="input" nm="E" no="25"/><pin dir="input" nm="nIPL2" no="92"/><pin dir="input" nm="nDTACK_IOB" no="78"/><pin dir="input" nm="nVPA_IOB" no="77"/><pin dir="input" nm="A_FSB&lt;1&gt;" no="94"/><pin dir="input" nm="A_FSB&lt;2&gt;" no="95"/><pin dir="input" nm="A_FSB&lt;3&gt;" no="96"/><pin dir="input" nm="A_FSB&lt;4&gt;" no="97"/><pin dir="input" nm="A_FSB&lt;5&gt;" no="2"/><pin dir="input" nm="A_FSB&lt;6&gt;" no="3"/><pin dir="input" nm="A_FSB&lt;7&gt;" no="4"/><pin dir="output" nm="nVMA_IOB" no="74" sr="fast"/><pin dir="output" nm="nLDS_IOB" no="79" sr="fast"/><pin dir="output" nm="nUDS_IOB" no="80" sr="fast"/><pin dir="output" nm="nAS_IOB" no="81" sr="fast"/><pin dir="output" nm="nDTACK_FSB" no="28" sr="fast"/><pin dir="output" nm="nBERR_FSB" no="70" sr="fast"/><pin dir="output" nm="nBR_IOB" no="72" sr="fast"/><pin dir="output" nm="RA&lt;0&gt;" no="53" sr="fast"/><pin dir="output" nm="RA&lt;1&gt;" no="50" sr="fast"/><pin dir="output" nm="RA&lt;2&gt;" no="43" sr="fast"/><pin dir="output" nm="RA&lt;3&gt;" no="41" sr="fast"/><pin dir="output" nm="RA&lt;4&gt;" no="40" sr="fast"/><pin dir="output" nm="RA&lt;5&gt;" no="42" sr="fast"/><pin dir="output" nm="RA&lt;6&gt;" no="46" sr="fast"/><pin dir="output" nm="RA&lt;7&gt;" no="52" sr="fast"/><pin dir="output" nm="RA&lt;8&gt;" no="54" sr="fast"/><pin dir="output" nm="RA&lt;9&gt;" no="56" sr="fast"/><pin dir="output" nm="nDoutOE" no="89" sr="fast"/><pin dir="output" nm="nOE" no="37" sr="fast"/><pin dir="output" nm="nROMWE" no="34" sr="fast"/><pin dir="output" nm="nVPA_FSB" no="93" sr="fast"/><pin dir="output" nm="nDinLE" no="86" sr="fast"/><pin dir="output" nm="nADoutLE0" no="85" sr="fast"/><pin dir="output" nm="nDinOE" no="90" sr="fast"/><pin dir="output" nm="nRAS" no="64" sr="fast"/><pin dir="output" nm="nCAS" no="36" sr="fast"/><pin dir="output" nm="RA&lt;11&gt;" no="63" sr="fast"/><pin dir="output" nm="RA&lt;10&gt;" no="55" sr="fast"/><pin dir="output" nm="nADoutLE1" no="82" sr="fast"/><pin dir="output" nm="nAoutOE" no="87" sr="fast"/><pin dir="output" nm="nRAMLWE" no="65" sr="fast"/><pin dir="output" nm="nRAMUWE" no="66" sr="fast"/><pin dir="output" nm="nROMCS" no="35" sr="fast"/><pin dir="output" nm="C25MEN" no="58" sr="fast"/><pin dir="output" nm="C20MEN" no="59" sr="fast"/><pin dir="bidir" nm="nRES" no="91" sr="fast"/></ibis>
diff --git a/cpld/XC95144XL/WarpSE.rpt b/cpld/XC95144XL/WarpSE.rpt
index a2cb901..8ccbdce 100644
--- a/cpld/XC95144XL/WarpSE.rpt
+++ b/cpld/XC95144XL/WarpSE.rpt
@@ -1,7 +1,7 @@
  
 cpldfit:  version P.20131013                        Xilinx Inc.
                                   Fitter Report
-Design Name: WarpSE                              Date:  3-20-2023, 11:54PM
+Design Name: WarpSE                              Date:  3-25-2023,  0:52AM
 Device Used: XC95144XL-10-TQ100
 Fitting Status: Successful
 
@@ -9,22 +9,22 @@ Fitting Status: Successful
 
 Macrocells     Product Terms    Function Block   Registers      Pins           
 Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-121/144 ( 84%) 440 /720  ( 61%) 227/432 ( 53%)   96 /144 ( 67%) 72 /81  ( 89%)
+119/144 ( 83%) 428 /720  ( 59%) 230/432 ( 53%)   94 /144 ( 65%) 71 /81  ( 88%)
 
 ** Function Block Resources **
 
 Function    Mcells      FB Inps     Pterms      IO          
 Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1          18/18*      25/54       26/90      11/11*
-FB2          12/18       16/54       15/90       8/10
-FB3           9/18       34/54       81/90      10/10*
-FB4          18/18*      24/54       44/90      10/10*
-FB5          16/18       30/54       77/90       8/10
-FB6          18/18*      34/54       61/90      10/10*
+FB1          18/18*      28/54       39/90      11/11*
+FB2          10/18        8/54       11/90       8/10
+FB3           7/18       33/54       81/90      10/10*
+FB4          17/18       34/54       40/90      10/10*
+FB5          16/18       32/54       72/90       8/10
+FB6          18/18*      32/54       55/90      10/10*
 FB7          18/18*      30/54       55/90       8/10
-FB8          12/18       34/54       81/90       7/10
+FB8          15/18       33/54       75/90       6/10
              -----       -----       -----      -----    
-            121/144     227/432     440/720     72/81 
+            119/144     230/432     428/720     71/81 
 
 * - Resource is exhausted
 
@@ -40,18 +40,18 @@ Global set/reset net(s) unused.
 
 Signal Type    Required     Mapped  |  Pin Type            Used    Total 
 ------------------------------------|------------------------------------
-Input         :   33          33    |  I/O              :    66      73
+Input         :   32          32    |  I/O              :    65      73
 Output        :   35          35    |  GCK/IO           :     3       3
 Bidirectional :    1           1    |  GTS/IO           :     3       4
 GCK           :    3           3    |  GSR/IO           :     0       1
 GTS           :    0           0    |
 GSR           :    0           0    |
                  ----        ----
-        Total     72          72
+        Total     71          71
 
 ** Power Data **
 
-There are 121 macrocells in high performance mode (MCHP).
+There are 119 macrocells in high performance mode (MCHP).
 There are 0 macrocells in low power mode (MCLP).
 End of Mapped Resource Summary
 **************************  Errors and Warnings  ***************************
@@ -79,17 +79,19 @@ WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'.  The input(s) are unused
    after optimization. Please verify functionality via simulation.
 WARNING:Cpld:1007 - Removing unused input(s) 'SW<3>'.  The input(s) are unused
    after optimization. Please verify functionality via simulation.
+WARNING:Cpld:1007 - Removing unused input(s) 'nBG_IOB'.  The input(s) are unused
+   after optimization. Please verify functionality via simulation.
 *************************  Summary of Mapped Logic  ************************
 
 ** 36 Outputs **
 
 Signal              Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
 Name                Pts   Inps          No.  Type    Use     Mode Rate State
-nDTACK_FSB          11    26    FB3_9   28   I/O     O       STD  FAST RESET
+nDTACK_FSB          10    26    FB3_9   28   I/O     O       STD  FAST RESET
 nROMWE              1     2     FB3_17  34   I/O     O       STD  FAST 
-nAoutOE             1     3     FB4_2   87   I/O     O       STD  FAST RESET
+nAoutOE             1     3     FB4_2   87   I/O     O       STD  FAST SET
 nDoutOE             1     2     FB4_5   89   I/O     O       STD  FAST 
-nDinOE              2     6     FB4_6   90   I/O     O       STD  FAST 
+nDinOE              3     6     FB4_6   90   I/O     O       STD  FAST 
 nRES                1     1     FB4_8   91   I/O     I/O     STD  FAST 
 nVPA_FSB            1     2     FB4_11  93   I/O     O       STD  FAST 
 nROMCS              2     5     FB5_2   35   I/O     O       STD  FAST 
@@ -122,67 +124,62 @@ nRAMUWE             1     4     FB8_8   66   I/O     O       STD  FAST
 nBERR_FSB           4     8     FB8_12  70   I/O     O       STD  FAST RESET
 nBR_IOB             2     4     FB8_15  72   I/O     O       STD  FAST RESET
 
-** 85 Buried Nodes **
+** 83 Buried Nodes **
 
 Signal              Total Total Loc     Pwr  Reg Init
 Name                Pts   Inps          Mode State
-iobm/nASr           1     2     FB1_1   STD  RESET
-iobm/VPArr          1     1     FB1_2   STD  RESET
-iobm/VPArf          1     1     FB1_3   STD  RESET
-iobm/RESrr          1     1     FB1_4   STD  RESET
-iobm/RESrf          1     1     FB1_5   STD  RESET
-iobm/IOREQr         1     1     FB1_6   STD  RESET
-iobm/Er2            1     1     FB1_7   STD  RESET
-iobm/Er             1     1     FB1_8   STD  RESET
-iobm/DTACKrr        1     1     FB1_9   STD  RESET
-iobm/DTACKrf        1     1     FB1_10  STD  RESET
-iobm/BERRrr         1     1     FB1_11  STD  RESET
-iobm/BERRrf         1     1     FB1_12  STD  RESET
-cnt/IPL2r           1     1     FB1_13  STD  RESET
-iobm/IOS_FSM_FFd1   2     3     FB1_14  STD  RESET
-iobm/BG             2     2     FB1_15  STD  RESET
-iobs/IOU0           3     5     FB1_16  STD  RESET
-iobs/IOL0           3     5     FB1_17  STD  RESET
-iobm/IOS_FSM_FFd3   3     6     FB1_18  STD  RESET
-ram/RegUrgentSync   1     1     FB2_7   STD  RESET
-ram/RefUrgent       1     2     FB2_8   STD  RESET
-ram/RefReqSync      1     1     FB2_9   STD  RESET
-ram/RefReq          1     2     FB2_10  STD  RESET
-ram/RefRAS          1     2     FB2_11  STD  RESET
-ram/BACTr           1     2     FB2_12  STD  RESET
-iobs/IOACTr         1     1     FB2_13  STD  RESET
-iobs/ALE0           1     2     FB2_14  STD  RESET
-fsb/ASrf            1     1     FB2_15  STD  RESET
-iobs/PS_FSM_FFd1    2     3     FB2_16  STD  RESET
-iobs/IOU1           2     2     FB2_17  STD  RESET
-iobs/IOL1           2     2     FB2_18  STD  RESET
-fsb/VPA             20    26    FB3_2   STD  RESET
-iobs/Clear1         1     3     FB3_5   STD  RESET
-fsb/Ready0r         3     8     FB3_6   STD  RESET
-iobs/IOReady        4     8     FB3_7   STD  RESET
-fsb/Ready1r         7     17    FB3_10  STD  RESET
+ram/RegUrgentSync   1     1     FB1_1   STD  RESET
+ram/RefUrgent       1     2     FB1_2   STD  RESET
+ram/RefReqSync      1     1     FB1_3   STD  RESET
+ram/RefReq          1     2     FB1_4   STD  RESET
+ram/RefRAS          1     2     FB1_5   STD  RESET
+iobs/IOACTr         1     1     FB1_6   STD  RESET
+fsb/ASrf            1     1     FB1_7   STD  RESET
+iobs/IOU1           2     2     FB1_8   STD  RESET
+iobs/IOL1           2     2     FB1_9   STD  RESET
+cnt/TimerTC         2     5     FB1_10  STD  RESET
+iobs/IOU0           3     5     FB1_11  STD  RESET
+iobs/IOL0           3     5     FB1_12  STD  RESET
+cnt/Timer<3>        3     6     FB1_13  STD  RESET
+cnt/Timer<2>        3     5     FB1_14  STD  RESET
+cnt/Timer<1>        3     4     FB1_15  STD  RESET
+cnt/RefUrgent       3     5     FB1_16  STD  RESET
+iobs/IOReady        4     8     FB1_17  STD  RESET
+cnt/RefReq          4     5     FB1_18  STD  RESET
+iobm/VPArr          1     1     FB2_9   STD  RESET
+iobm/VPArf          1     1     FB2_10  STD  RESET
+iobm/RESrr          1     1     FB2_11  STD  RESET
+iobm/RESrf          1     1     FB2_12  STD  RESET
+iobm/IOREQr         1     1     FB2_13  STD  RESET
+iobm/Er2            1     1     FB2_14  STD  RESET
+iobm/Er             1     1     FB2_15  STD  RESET
+iobm/DTACKrr        1     1     FB2_16  STD  RESET
+iobm/DTACKrf        1     1     FB2_17  STD  RESET
+cnt/Timer<0>        2     3     FB2_18  STD  RESET
+fsb/VPA             18    26    FB3_1   STD  RESET
+iobs/IOREQ          13    19    FB3_7   STD  RESET
+fsb/Ready1r         6     17    FB3_10  STD  RESET
 iobs/IORW1          16    19    FB3_12  STD  RESET
-iobs/IORW0          18    20    FB3_15  STD  RESET
-cnt/nRESout         2     4     FB4_1   STD  RESET
-cnt/TimerTC         2     5     FB4_3   STD  RESET
-cnt/Timer<0>        2     3     FB4_4   STD  RESET
+iobs/IORW0          17    20    FB3_15  STD  RESET
+iobm/BERRrr         1     1     FB4_3   STD  RESET
+iobm/BERRrf         1     1     FB4_4   STD  RESET
+cnt/PORS_FSM_FFd1   1     4     FB4_7   STD  RESET
+cnt/IPL2r           1     1     FB4_9   STD  RESET
+iobm/IOS_FSM_FFd1   2     3     FB4_10  STD  RESET
+cnt/nRESout         2     4     FB4_12  STD  RESET
+cnt/PORS_FSM_FFd2   2     3     FB4_13  STD  RESET
 
 Signal              Total Total Loc     Pwr  Reg Init
 Name                Pts   Inps          Mode State
-cnt/PORS_FSM_FFd2   2     3     FB4_7   STD  RESET
-cnt/LTimer<0>       2     3     FB4_9   STD  RESET
-cnt/Timer<3>        3     6     FB4_10  STD  RESET
-cnt/Timer<2>        3     5     FB4_12  STD  RESET
-cnt/Timer<1>        3     4     FB4_13  STD  RESET
-cnt/RefUrgent       3     5     FB4_14  STD  RESET
-cnt/RefReq          4     5     FB4_15  STD  RESET
-cnt/LTimer<3>       4     6     FB4_16  STD  RESET
-cnt/LTimer<2>       4     5     FB4_17  STD  RESET
-cnt/LTimer<1>       4     4     FB4_18  STD  RESET
+cnt/LTimer<0>       2     3     FB4_14  STD  RESET
+cnt/LTimer<3>       4     6     FB4_15  STD  RESET
+cnt/LTimer<2>       4     5     FB4_16  STD  RESET
+cnt/LTimer<1>       4     4     FB4_17  STD  RESET
+iobm/IOBERR         9     13    FB4_18  STD  RESET
 ram/RASEL           17    13    FB5_1   STD  RESET
 ram/RefDone         2     4     FB5_3   STD  RESET
 cs/nOverlay1        2     3     FB5_4   STD  RESET
-ram/RS_FSM_FFd1     8     11    FB5_7   STD  RESET
+fsb/Ready0r         3     8     FB5_7   STD  RESET
 cs/nOverlay0        3     8     FB5_8   STD  RESET
 ram/RAMEN           9     13    FB5_10  STD  RESET
 ram/RS_FSM_FFd2     10    12    FB5_13  STD  RESET
@@ -190,14 +187,14 @@ ram/RAMReady        12    13    FB5_17  STD  RESET
 iobm/ETACK          1     6     FB6_1   STD  RESET
 iobm/DoutOE         2     3     FB6_3   STD  RESET
 iobm/ALE0           2     4     FB6_4   STD  RESET
-iobm/ES<3>          3     6     FB6_5   STD  RESET
-iobm/ES<1>          3     4     FB6_6   STD  RESET
-iobm/ES<0>          3     7     FB6_7   STD  RESET
-iobm/ES<4>          4     7     FB6_8   STD  RESET
-iobm/IOS_FSM_FFd2   5     11    FB6_10  STD  RESET
-iobm/ES<2>          5     7     FB6_13  STD  RESET
-iobm/IOACT          6     12    FB6_16  STD  RESET
-iobm/IOBERR         9     13    FB6_18  STD  RESET
+iobm/IOS_FSM_FFd3   3     6     FB6_5   STD  RESET
+iobm/ES<3>          3     6     FB6_6   STD  RESET
+iobm/ES<1>          3     4     FB6_7   STD  RESET
+iobm/ES<0>          3     7     FB6_8   STD  RESET
+iobm/ES<4>          4     7     FB6_10  STD  RESET
+iobm/IOS_FSM_FFd2   5     11    FB6_13  STD  RESET
+iobm/ES<2>          5     7     FB6_16  STD  RESET
+iobm/IOACT          6     12    FB6_18  STD  RESET
 cnt/LTimer<13>      3     15    FB7_1   STD  RESET
 cnt/LTimer<9>       4     12    FB7_3   STD  RESET
 cnt/LTimer<8>       4     11    FB7_4   STD  RESET
@@ -208,17 +205,20 @@ cnt/LTimer<4>       4     7     FB7_15  STD  RESET
 cnt/LTimer<12>      4     15    FB7_16  STD  RESET
 cnt/LTimer<11>      4     14    FB7_17  STD  RESET
 cnt/LTimer<10>      4     13    FB7_18  STD  RESET
-cnt/PORS_FSM_FFd1   1     4     FB8_1   STD  RESET
+iobs/Once           15    18    FB8_1   STD  RESET
+iobs/Clear1         1     3     FB8_3   STD  RESET
+iobs/ALE0           1     2     FB8_4   STD  RESET
+iobs/PS_FSM_FFd1    2     3     FB8_7   STD  RESET
+ram/RS_FSM_FFd1     8     11    FB8_9   STD  RESET
+ram/RS_FSM_FFd3     9     11    FB8_11  STD  RESET
 
 Signal              Total Total Loc     Pwr  Reg Init
 Name                Pts   Inps          Mode State
-ram/RS_FSM_FFd3     9     11    FB8_3   STD  RESET
-iobs/PS_FSM_FFd2    14    19    FB8_7   STD  RESET
-iobs/Load1          14    18    FB8_10  STD  RESET
-iobs/IOREQ          14    19    FB8_14  STD  RESET
-iobs/Once           17    18    FB8_17  STD  RESET
+iobs/PS_FSM_FFd2    12    19    FB8_14  STD  RESET
+iobs/Load1          14    18    FB8_16  STD  RESET
+ram/BACTr           1     2     FB8_17  STD  RESET
 
-** 36 Inputs **
+** 35 Inputs **
 
 Signal              Loc     Pin  Pin     Pin     
 Name                        No.  Type    Use     
@@ -257,7 +257,6 @@ A_FSB<4>            FB4_17  97   I/O     I
 nBERR_IOB           FB6_5   76   I/O     I
 nVPA_IOB            FB6_6   77   I/O     I
 nDTACK_IOB          FB6_8   78   I/O     I
-nBG_IOB             FB8_17  73   I/O     I
 
 Legend:
 Pin No. - ~ - User Assigned
@@ -275,65 +274,66 @@ Pin Type/Use - I  - Input             GCK - Global Clock
 X            - Signal used as input to the macrocell logic.
 Pin No.      - ~  - User Assigned
 *********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               25/29
-Number of signals used by logic mapping into function block:  25
+Number of function block inputs used/remaining:               28/26
+Number of signals used by logic mapping into function block:  28
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/nASr             1       0     0   4     FB1_1         (b)     (b)
-iobm/VPArr            1       0     0   4     FB1_2   11    I/O     I
-iobm/VPArf            1       0     0   4     FB1_3   12    I/O     I
-iobm/RESrr            1       0     0   4     FB1_4         (b)     (b)
-iobm/RESrf            1       0     0   4     FB1_5   13    I/O     I
-iobm/IOREQr           1       0     0   4     FB1_6   14    I/O     I
-iobm/Er2              1       0     0   4     FB1_7         (b)     (b)
-iobm/Er               1       0     0   4     FB1_8   15    I/O     I
-iobm/DTACKrr          1       0     0   4     FB1_9   16    I/O     I
-iobm/DTACKrf          1       0     0   4     FB1_10        (b)     (b)
-iobm/BERRrr           1       0     0   4     FB1_11  17    I/O     I
-iobm/BERRrf           1       0     0   4     FB1_12  18    I/O     I
-cnt/IPL2r             1       0     0   4     FB1_13        (b)     (b)
-iobm/IOS_FSM_FFd1     2       0     0   3     FB1_14  19    I/O     I
-iobm/BG               2       0     0   3     FB1_15  20    I/O     I
-iobs/IOU0             3       0     0   2     FB1_16        (b)     (b)
-iobs/IOL0             3       0     0   2     FB1_17  22    GCK/I/O GCK
-iobm/IOS_FSM_FFd3     3       0     0   2     FB1_18        (b)     (b)
+ram/RegUrgentSync     1       0     0   4     FB1_1         (b)     (b)
+ram/RefUrgent         1       0     0   4     FB1_2   11    I/O     I
+ram/RefReqSync        1       0     0   4     FB1_3   12    I/O     I
+ram/RefReq            1       0     0   4     FB1_4         (b)     (b)
+ram/RefRAS            1       0     0   4     FB1_5   13    I/O     I
+iobs/IOACTr           1       0     0   4     FB1_6   14    I/O     I
+fsb/ASrf              1       0     0   4     FB1_7         (b)     (b)
+iobs/IOU1             2       0     0   3     FB1_8   15    I/O     I
+iobs/IOL1             2       0     0   3     FB1_9   16    I/O     I
+cnt/TimerTC           2       0     0   3     FB1_10        (b)     (b)
+iobs/IOU0             3       0     0   2     FB1_11  17    I/O     I
+iobs/IOL0             3       0     0   2     FB1_12  18    I/O     I
+cnt/Timer<3>          3       0     0   2     FB1_13        (b)     (b)
+cnt/Timer<2>          3       0     0   2     FB1_14  19    I/O     I
+cnt/Timer<1>          3       0     0   2     FB1_15  20    I/O     I
+cnt/RefUrgent         3       0     0   2     FB1_16        (b)     (b)
+iobs/IOReady          4       0     0   1     FB1_17  22    GCK/I/O GCK
+cnt/RefReq            4       0     0   1     FB1_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: C8M                10: iobm/nASr         18: nAoutOE 
-  2: E                  11: iobs/IOL1         19: nBERR_IOB 
-  3: nRES.PIN           12: iobs/IOREQ        20: nBG_IOB 
-  4: iobm/BG            13: iobs/IOU1         21: nDTACK_IOB 
-  5: iobm/Er            14: iobs/PS_FSM_FFd1  22: nIPL2 
-  6: iobm/IOREQr        15: iobs/PS_FSM_FFd2  23: nLDS_FSB 
-  7: iobm/IOS_FSM_FFd1  16: nADoutLE1         24: nUDS_FSB 
-  8: iobm/IOS_FSM_FFd2  17: nAS_IOB           25: nVPA_IOB 
-  9: iobm/IOS_FSM_FFd3 
+  1: E                 11: iobm/IOBERR       20: nADoutLE1 
+  2: cnt/RefReq        12: iobs/IOACTr       21: nAS_FSB 
+  3: cnt/RefUrgent     13: iobs/IOL1         22: nLDS_FSB 
+  4: cnt/Timer<0>      14: iobs/IOReady      23: nUDS_FSB 
+  5: cnt/Timer<1>      15: iobs/IOU1         24: ram/RS_FSM_FFd1 
+  6: cnt/Timer<2>      16: iobs/Load1        25: ram/RS_FSM_FFd2 
+  7: cnt/Timer<3>      17: iobs/Once         26: ram/RefDone 
+  8: cnt/TimerTC       18: iobs/PS_FSM_FFd1  27: ram/RefReqSync 
+  9: fsb/ASrf          19: iobs/PS_FSM_FFd2  28: ram/RegUrgentSync 
+ 10: iobm/IOACT       
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/nASr            ................XX...................... 2
-iobm/VPArr           ........................X............... 1
-iobm/VPArf           ........................X............... 1
-iobm/RESrr           ..X..................................... 1
-iobm/RESrf           ..X..................................... 1
-iobm/IOREQr          ...........X............................ 1
-iobm/Er2             ....X................................... 1
-iobm/Er              .X...................................... 1
-iobm/DTACKrr         ....................X................... 1
-iobm/DTACKrf         ....................X................... 1
-iobm/BERRrr          ..................X..................... 1
-iobm/BERRrf          ..................X..................... 1
-cnt/IPL2r            .....................X.................. 1
-iobm/IOS_FSM_FFd1    ......XXX............................... 3
-iobm/BG              .........X.........X.................... 2
-iobs/IOU0            ............XXXX.......X................ 5
-iobs/IOL0            ..........X..XXX......X................. 5
-iobm/IOS_FSM_FFd3    X..X.XXXX............................... 6
+ram/RegUrgentSync    ..X..................................... 1
+ram/RefUrgent        .........................X.X............ 2
+ram/RefReqSync       .X...................................... 1
+ram/RefReq           .........................XX............. 2
+ram/RefRAS           .......................XX............... 2
+iobs/IOACTr          .........X.............................. 1
+fsb/ASrf             ....................X................... 1
+iobs/IOU1            ...............X......X................. 2
+iobs/IOL1            ...............X.....X.................. 2
+cnt/TimerTC          X..XXXX................................. 5
+iobs/IOU0            ..............X..XXX..X................. 5
+iobs/IOL0            ............X....XXX.X.................. 5
+cnt/Timer<3>         X..XXXXX................................ 6
+cnt/Timer<2>         X..XXX.X................................ 5
+cnt/Timer<1>         X..XX..X................................ 4
+cnt/RefUrgent        X..XXXX................................. 5
+iobs/IOReady         ........X.XX.X..X.XXX................... 8
+cnt/RefReq           X..XXXX................................. 5
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               16/38
-Number of signals used by logic mapping into function block:  16
+Number of function block inputs used/remaining:               8/46
+Number of signals used by logic mapping into function block:  8
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_1         (b)     
@@ -342,153 +342,148 @@ Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_4         (b)     
 (unused)              0       0     0   5     FB2_5   1     GTS/I/O 
 (unused)              0       0     0   5     FB2_6   2     GTS/I/O I
-ram/RegUrgentSync     1       0     0   4     FB2_7         (b)     (b)
-ram/RefUrgent         1       0     0   4     FB2_8   3     GTS/I/O I
-ram/RefReqSync        1       0     0   4     FB2_9   4     GTS/I/O I
-ram/RefReq            1       0     0   4     FB2_10        (b)     (b)
-ram/RefRAS            1       0     0   4     FB2_11  6     I/O     I
-ram/BACTr             1       0     0   4     FB2_12  7     I/O     I
-iobs/IOACTr           1       0     0   4     FB2_13        (b)     (b)
-iobs/ALE0             1       0     0   4     FB2_14  8     I/O     I
-fsb/ASrf              1       0     0   4     FB2_15  9     I/O     I
-iobs/PS_FSM_FFd1      2       0     0   3     FB2_16        (b)     (b)
-iobs/IOU1             2       0     0   3     FB2_17  10    I/O     I
-iobs/IOL1             2       0     0   3     FB2_18        (b)     (b)
+(unused)              0       0     0   5     FB2_7         (b)     
+(unused)              0       0     0   5     FB2_8   3     GTS/I/O I
+iobm/VPArr            1       0     0   4     FB2_9   4     GTS/I/O I
+iobm/VPArf            1       0     0   4     FB2_10        (b)     (b)
+iobm/RESrr            1       0     0   4     FB2_11  6     I/O     I
+iobm/RESrf            1       0     0   4     FB2_12  7     I/O     I
+iobm/IOREQr           1       0     0   4     FB2_13        (b)     (b)
+iobm/Er2              1       0     0   4     FB2_14  8     I/O     I
+iobm/Er               1       0     0   4     FB2_15  9     I/O     I
+iobm/DTACKrr          1       0     0   4     FB2_16        (b)     (b)
+iobm/DTACKrf          1       0     0   4     FB2_17  10    I/O     I
+cnt/Timer<0>          2       0     0   3     FB2_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: cnt/RefReq         7: iobs/PS_FSM_FFd1  12: ram/RS_FSM_FFd1 
-  2: cnt/RefUrgent      8: iobs/PS_FSM_FFd2  13: ram/RS_FSM_FFd2 
-  3: fsb/ASrf           9: nAS_FSB           14: ram/RefDone 
-  4: iobm/IOACT        10: nLDS_FSB          15: ram/RefReqSync 
-  5: iobs/IOACTr       11: nUDS_FSB          16: ram/RegUrgentSync 
-  6: iobs/Load1       
+  1: E                  4: cnt/TimerTC        7: nDTACK_IOB 
+  2: nRES.PIN           5: iobm/Er            8: nVPA_IOB 
+  3: cnt/Timer<0>       6: iobs/IOREQ       
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RegUrgentSync    .X...................................... 1
-ram/RefUrgent        .............X.X........................ 2
-ram/RefReqSync       X....................................... 1
-ram/RefReq           .............XX......................... 2
-ram/RefRAS           ...........XX........................... 2
-ram/BACTr            ..X.....X............................... 2
-iobs/IOACTr          ...X.................................... 1
-iobs/ALE0            ......XX................................ 2
-fsb/ASrf             ........X............................... 1
-iobs/PS_FSM_FFd1     ....X.XX................................ 3
-iobs/IOU1            .....X....X............................. 2
-iobs/IOL1            .....X...X.............................. 2
+iobm/VPArr           .......X................................ 1
+iobm/VPArf           .......X................................ 1
+iobm/RESrr           .X...................................... 1
+iobm/RESrf           .X...................................... 1
+iobm/IOREQr          .....X.................................. 1
+iobm/Er2             ....X................................... 1
+iobm/Er              X....................................... 1
+iobm/DTACKrr         ......X................................. 1
+iobm/DTACKrf         ......X................................. 1
+cnt/Timer<0>         X.XX.................................... 3
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               34/20
-Number of signals used by logic mapping into function block:  34
+Number of function block inputs used/remaining:               33/21
+Number of signals used by logic mapping into function block:  33
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/5   0     FB3_1         (b)     (b)
-fsb/VPA              20      15<-   0   0     FB3_2   23    GCK/I/O GCK/I
-(unused)              0       0   /\5   0     FB3_3         (b)     (b)
+fsb/VPA              18      13<-   0   0     FB3_1         (b)     (b)
+(unused)              0       0   /\5   0     FB3_2   23    GCK/I/O GCK/I
+(unused)              0       0   /\3   2     FB3_3         (b)     (b)
 (unused)              0       0     0   5     FB3_4         (b)     
-iobs/Clear1           1       0   \/1   3     FB3_5   24    I/O     I
-fsb/Ready0r           3       1<- \/3   0     FB3_6   25    I/O     I
-iobs/IOReady          4       3<- \/4   0     FB3_7         (b)     (b)
+(unused)              0       0   \/5   0     FB3_5   24    I/O     I
+(unused)              0       0   \/5   0     FB3_6   25    I/O     I
+iobs/IOREQ           13      10<- \/2   0     FB3_7         (b)     (b)
 (unused)              0       0   \/5   0     FB3_8   27    GCK/I/O GCK
-nDTACK_FSB           11       9<- \/3   0     FB3_9   28    I/O     O
-fsb/Ready1r           7       3<- \/1   0     FB3_10        (b)     (b)
+nDTACK_FSB           10       7<- \/2   0     FB3_9   28    I/O     O
+fsb/Ready1r           6       2<- \/1   0     FB3_10        (b)     (b)
 (unused)              0       0   \/5   0     FB3_11  29    I/O     I
 iobs/IORW1           16      11<-   0   0     FB3_12  30    I/O     I
 (unused)              0       0   /\5   0     FB3_13        (b)     (b)
 (unused)              0       0   \/5   0     FB3_14  32    I/O     I
-iobs/IORW0           18      13<-   0   0     FB3_15  33    I/O     I
+iobs/IORW0           17      12<-   0   0     FB3_15  33    I/O     I
 (unused)              0       0   /\5   0     FB3_16        (b)     (b)
-nROMWE                1       0   /\3   1     FB3_17  34    I/O     O
+nROMWE                1       0   /\2   2     FB3_17  34    I/O     O
 (unused)              0       0   \/5   0     FB3_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<10>         13: A_FSB<22>         24: iobs/IORW0 
-  2: A_FSB<11>         14: A_FSB<23>         25: iobs/IORW1 
-  3: A_FSB<12>         15: A_FSB<8>          26: iobs/IOReady 
-  4: A_FSB<13>         16: A_FSB<9>          27: iobs/Once 
-  5: A_FSB<14>         17: cs/nOverlay1      28: iobs/PS_FSM_FFd1 
-  6: A_FSB<15>         18: fsb/ASrf          29: iobs/PS_FSM_FFd2 
-  7: A_FSB<16>         19: fsb/Ready0r       30: nADoutLE1 
-  8: A_FSB<17>         20: fsb/Ready1r       31: nAS_FSB 
-  9: A_FSB<18>         21: fsb/VPA           32: nDTACK_FSB 
- 10: A_FSB<19>         22: iobm/IOBERR       33: nWE_FSB 
- 11: A_FSB<20>         23: iobs/IOACTr       34: ram/RAMReady 
- 12: A_FSB<21>        
+  1: A_FSB<10>         12: A_FSB<21>         23: iobs/IORW0 
+  2: A_FSB<11>         13: A_FSB<22>         24: iobs/IORW1 
+  3: A_FSB<12>         14: A_FSB<23>         25: iobs/IOReady 
+  4: A_FSB<13>         15: A_FSB<8>          26: iobs/Once 
+  5: A_FSB<14>         16: A_FSB<9>          27: iobs/PS_FSM_FFd1 
+  6: A_FSB<15>         17: cs/nOverlay1      28: iobs/PS_FSM_FFd2 
+  7: A_FSB<16>         18: fsb/ASrf          29: nADoutLE1 
+  8: A_FSB<17>         19: fsb/Ready0r       30: nAS_FSB 
+  9: A_FSB<18>         20: fsb/Ready1r       31: nDTACK_FSB 
+ 10: A_FSB<19>         21: fsb/VPA           32: nWE_FSB 
+ 11: A_FSB<20>         22: iobs/IOACTr       33: ram/RAMReady 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-fsb/VPA              XXXXXXXXXXXXXXXXXXXXX....X...XX.XX...... 26
-iobs/Clear1          ...........................XXX.......... 3
-fsb/Ready0r          ...........XXX..XXX...........X..X...... 8
-iobs/IOReady         .................X...XX..XX.XXX......... 8
-nDTACK_FSB           XXXXXXXXXXXXXXXXXXXX.....X...XXXXX...... 26
-fsb/Ready1r          ...XX.XXXXXXXX..XX.X.....X...XX.X....... 17
-iobs/IORW1           ...XX.XXXXXXXX..XX......X.XXXXX.X....... 19
-iobs/IORW0           ...XX.XXXXXXXX..XX.....XX.XXXXX.X....... 20
-nROMWE               ..............................X.X....... 2
+fsb/VPA              XXXXXXXXXXXXXXXXXXXXX...X...XX.XX....... 26
+iobs/IOREQ           ...XX.XXXXXXXX..XX...X...XXXXX.X........ 19
+nDTACK_FSB           XXXXXXXXXXXXXXXXXXXX....X...XXXXX....... 26
+fsb/Ready1r          ...XX.XXXXXXXX..XX.X....X...XX.X........ 17
+iobs/IORW1           ...XX.XXXXXXXX..XX.....X.XXXXX.X........ 19
+iobs/IORW0           ...XX.XXXXXXXX..XX....XX.XXXXX.X........ 20
+nROMWE               .............................X.X........ 2
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               24/30
-Number of signals used by logic mapping into function block:  24
+Number of function block inputs used/remaining:               34/20
+Number of signals used by logic mapping into function block:  34
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-cnt/nRESout           2       0     0   3     FB4_1         (b)     (b)
+(unused)              0       0   /\3   2     FB4_1         (b)     (b)
 nAoutOE               1       0     0   4     FB4_2   87    I/O     O
-cnt/TimerTC           2       0     0   3     FB4_3         (b)     (b)
-cnt/Timer<0>          2       0     0   3     FB4_4         (b)     (b)
+iobm/BERRrr           1       0     0   4     FB4_3         (b)     (b)
+iobm/BERRrf           1       0     0   4     FB4_4         (b)     (b)
 nDoutOE               1       0     0   4     FB4_5   89    I/O     O
-nDinOE                2       0     0   3     FB4_6   90    I/O     O
-cnt/PORS_FSM_FFd2     2       0     0   3     FB4_7         (b)     (b)
+nDinOE                3       0     0   2     FB4_6   90    I/O     O
+cnt/PORS_FSM_FFd1     1       0     0   4     FB4_7         (b)     (b)
 nRES                  1       0     0   4     FB4_8   91    I/O     I/O
-cnt/LTimer<0>         2       0     0   3     FB4_9   92    I/O     I
-cnt/Timer<3>          3       0     0   2     FB4_10        (b)     (b)
+cnt/IPL2r             1       0     0   4     FB4_9   92    I/O     I
+iobm/IOS_FSM_FFd1     2       0     0   3     FB4_10        (b)     (b)
 nVPA_FSB              1       0     0   4     FB4_11  93    I/O     O
-cnt/Timer<2>          3       0     0   2     FB4_12  94    I/O     I
-cnt/Timer<1>          3       0     0   2     FB4_13        (b)     (b)
-cnt/RefUrgent         3       0     0   2     FB4_14  95    I/O     I
-cnt/RefReq            4       0     0   1     FB4_15  96    I/O     I
-cnt/LTimer<3>         4       0     0   1     FB4_16        (b)     (b)
-cnt/LTimer<2>         4       0     0   1     FB4_17  97    I/O     I
-cnt/LTimer<1>         4       0     0   1     FB4_18        (b)     (b)
+cnt/nRESout           2       0     0   3     FB4_12  94    I/O     I
+cnt/PORS_FSM_FFd2     2       0     0   3     FB4_13        (b)     (b)
+cnt/LTimer<0>         2       0     0   3     FB4_14  95    I/O     I
+cnt/LTimer<3>         4       0     0   1     FB4_15  96    I/O     I
+cnt/LTimer<2>         4       0     0   1     FB4_16        (b)     (b)
+cnt/LTimer<1>         4       0   \/1   0     FB4_17  97    I/O     I
+iobm/IOBERR           9       4<-   0   0     FB4_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<20>          9: cnt/LTimer<2>      17: cnt/TimerTC 
-  2: A_FSB<21>         10: cnt/LTimer<3>      18: cnt/nRESout 
-  3: A_FSB<22>         11: cnt/PORS_FSM_FFd1  19: fsb/VPA 
-  4: A_FSB<23>         12: cnt/PORS_FSM_FFd2  20: iobm/DoutOE 
-  5: E                 13: cnt/Timer<0>       21: nAS_FSB 
-  6: cnt/LTimer<0>     14: cnt/Timer<1>       22: nAoutOE 
-  7: cnt/LTimer<13>    15: cnt/Timer<2>       23: nBR_IOB 
-  8: cnt/LTimer<1>     16: cnt/Timer<3>       24: nWE_FSB 
+  1: A_FSB<20>          13: cnt/PORS_FSM_FFd2  24: iobm/IOS_FSM_FFd1 
+  2: A_FSB<21>          14: cnt/TimerTC        25: iobm/IOS_FSM_FFd2 
+  3: A_FSB<22>          15: cnt/nRESout        26: iobm/IOS_FSM_FFd3 
+  4: A_FSB<23>          16: fsb/VPA            27: iobm/RESrf 
+  5: C8M                17: iobm/BERRrf        28: iobm/RESrr 
+  6: cnt/IPL2r          18: iobm/BERRrr        29: nAS_FSB 
+  7: cnt/LTimer<0>      19: iobm/DTACKrf       30: nAoutOE 
+  8: cnt/LTimer<13>     20: iobm/DTACKrr       31: nBERR_IOB 
+  9: cnt/LTimer<1>      21: iobm/DoutOE        32: nBR_IOB 
+ 10: cnt/LTimer<2>      22: iobm/ETACK         33: nIPL2 
+ 11: cnt/LTimer<3>      23: iobm/IOBERR        34: nWE_FSB 
+ 12: cnt/PORS_FSM_FFd1 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-cnt/nRESout          ......X...XX.....X...................... 4
-nAoutOE              ..........XX..........X................. 3
-cnt/TimerTC          ....X.......XXXX........................ 5
-cnt/Timer<0>         ....X.......X...X....................... 3
-nDoutOE              ...................X.X.................. 2
-nDinOE               XXXX................X..X................ 6
-cnt/PORS_FSM_FFd2    ......X...XX............................ 3
-nRES                 .................X...................... 1
-cnt/LTimer<0>        .....XX.........X....................... 3
-cnt/Timer<3>         ....X.......XXXXX....................... 6
-nVPA_FSB             ..................X.X................... 2
-cnt/Timer<2>         ....X.......XXX.X....................... 5
-cnt/Timer<1>         ....X.......XX..X....................... 4
-cnt/RefUrgent        ....X.......XXXX........................ 5
-cnt/RefReq           ....X.......XXXX........................ 5
-cnt/LTimer<3>        .....XXXXX......X....................... 6
-cnt/LTimer<2>        .....XXXX.......X....................... 5
-cnt/LTimer<1>        .....XXX........X....................... 4
+nAoutOE              ...........XX..................X........ 3
+iobm/BERRrr          ..............................X......... 1
+iobm/BERRrf          ..............................X......... 1
+nDoutOE              ....................X........X.......... 2
+nDinOE               XXXX........................X....X...... 6
+cnt/PORS_FSM_FFd1    .....X.X...XX........................... 4
+nRES                 ..............X......................... 1
+cnt/IPL2r            ................................X....... 1
+iobm/IOS_FSM_FFd1    .......................XXX.............. 3
+nVPA_FSB             ...............X............X........... 2
+cnt/nRESout          .......X...XX.X......................... 4
+cnt/PORS_FSM_FFd2    .......X...XX........................... 3
+cnt/LTimer<0>        ......XX.....X.......................... 3
+cnt/LTimer<3>        ......XXXXX..X.......................... 6
+cnt/LTimer<2>        ......XXXX...X.......................... 5
+cnt/LTimer<1>        ......XXX....X.......................... 4
+iobm/IOBERR          ....X...........XXXX.XXXXXXX..X......... 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB5  ***********************************
-Number of function block inputs used/remaining:               30/24
-Number of signals used by logic mapping into function block:  30
+Number of function block inputs used/remaining:               32/22
+Number of signals used by logic mapping into function block:  32
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 ram/RASEL            17      12<-   0   0     FB5_1         (b)     (b)
@@ -496,8 +491,8 @@ nROMCS                2       2<- /\5   0     FB5_2   35    I/O     O
 ram/RefDone           2       0   /\2   1     FB5_3         (b)     (b)
 cs/nOverlay1          2       0     0   3     FB5_4         (b)     (b)
 nCAS                  1       0     0   4     FB5_5   36    I/O     O
-nOE                   1       0   \/3   1     FB5_6   37    I/O     O
-ram/RS_FSM_FFd1       8       3<-   0   0     FB5_7         (b)     (b)
+nOE                   1       0     0   4     FB5_6   37    I/O     O
+fsb/Ready0r           3       0     0   2     FB5_7         (b)     (b)
 cs/nOverlay0          3       0   \/1   1     FB5_8   39    I/O     (b)
 RA<4>                 2       1<- \/4   0     FB5_9   40    I/O     O
 ram/RAMEN             9       4<-   0   0     FB5_10        (b)     (b)
@@ -511,95 +506,95 @@ ram/RAMReady         12       9<- \/2   0     FB5_17  49    I/O     (b)
 (unused)              0       0   \/5   0     FB5_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<12>         11: A_FSB<4>          21: ram/BACTr 
-  2: A_FSB<13>         12: A_FSB<5>          22: ram/RAMEN 
-  3: A_FSB<14>         13: A_FSB<6>          23: ram/RASEL 
-  4: A_FSB<15>         14: A_FSB<7>          24: ram/RS_FSM_FFd1 
-  5: A_FSB<16>         15: nRES.PIN          25: ram/RS_FSM_FFd2 
-  6: A_FSB<20>         16: cs/nOverlay0      26: ram/RS_FSM_FFd3 
-  7: A_FSB<21>         17: cs/nOverlay1      27: ram/RefDone 
-  8: A_FSB<22>         18: fsb/ASrf          28: ram/RefReq 
-  9: A_FSB<23>         19: nAS_FSB           29: ram/RefReqSync 
- 10: A_FSB<3>          20: nWE_FSB           30: ram/RefUrgent 
+  1: A_FSB<12>         12: A_FSB<5>          23: ram/RAMEN 
+  2: A_FSB<13>         13: A_FSB<6>          24: ram/RAMReady 
+  3: A_FSB<14>         14: A_FSB<7>          25: ram/RASEL 
+  4: A_FSB<15>         15: nRES.PIN          26: ram/RS_FSM_FFd1 
+  5: A_FSB<16>         16: cs/nOverlay0      27: ram/RS_FSM_FFd2 
+  6: A_FSB<20>         17: cs/nOverlay1      28: ram/RS_FSM_FFd3 
+  7: A_FSB<21>         18: fsb/ASrf          29: ram/RefDone 
+  8: A_FSB<22>         19: fsb/Ready0r       30: ram/RefReq 
+  9: A_FSB<23>         20: nAS_FSB           31: ram/RefReqSync 
+ 10: A_FSB<3>          21: nWE_FSB           32: ram/RefUrgent 
+ 11: A_FSB<4>          22: ram/BACTr        
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RASEL            ......XXX.......XXX.XX.XXX.X.X.......... 13
+ram/RASEL            ......XXX.......XX.X.XX..XXX.X.X........ 13
 nROMCS               .....XXXX.......X....................... 5
-ram/RefDone          .......................XX.X.X........... 4
-cs/nOverlay1         ...............X.XX..................... 3
-nCAS                 ......................X................. 1
-nOE                  ..................XX.................... 2
-ram/RS_FSM_FFd1      ......XXX.......XXX..X.XXX...X.......... 11
-cs/nOverlay0         .....XXXX.....XX.XX..................... 8
-RA<4>                ..X........X..........X................. 3
-ram/RAMEN            ......XXX.......XXX.XX.XXX.X.X.......... 13
-RA<3>                .X........X...........X................. 3
-RA<5>                ...X........X.........X................. 3
-ram/RS_FSM_FFd2      ......XXX.......XXX.X..XXX.X.X.......... 12
-RA<2>                X........X............X................. 3
-RA<6>                ....X........X........X................. 3
-ram/RAMReady         ......XXX.......XXX.XX.XXX.X.X.......... 13
+ram/RefDone          .........................XX.X.X......... 4
+cs/nOverlay1         ...............X.X.X.................... 3
+nCAS                 ........................X............... 1
+nOE                  ...................XX................... 2
+fsb/Ready0r          ......XXX.......XXXX...X................ 8
+cs/nOverlay0         .....XXXX.....XX.X.X.................... 8
+RA<4>                ..X........X............X............... 3
+ram/RAMEN            ......XXX.......XX.X.XX..XXX.X.X........ 13
+RA<3>                .X........X.............X............... 3
+RA<5>                ...X........X...........X............... 3
+ram/RS_FSM_FFd2      ......XXX.......XX.X.X...XXX.X.X........ 12
+RA<2>                X........X..............X............... 3
+RA<6>                ....X........X..........X............... 3
+ram/RAMReady         ......XXX.......XX.X.XX..XXX.X.X........ 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB6  ***********************************
-Number of function block inputs used/remaining:               34/20
-Number of signals used by logic mapping into function block:  34
+Number of function block inputs used/remaining:               32/22
+Number of signals used by logic mapping into function block:  32
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 iobm/ETACK            1       0     0   4     FB6_1         (b)     (b)
 nVMA_IOB              3       0     0   2     FB6_2   74    I/O     O
 iobm/DoutOE           2       0     0   3     FB6_3         (b)     (b)
 iobm/ALE0             2       0     0   3     FB6_4         (b)     (b)
-iobm/ES<3>            3       0     0   2     FB6_5   76    I/O     I
-iobm/ES<1>            3       0     0   2     FB6_6   77    I/O     I
-iobm/ES<0>            3       0     0   2     FB6_7         (b)     (b)
-iobm/ES<4>            4       0     0   1     FB6_8   78    I/O     I
+iobm/IOS_FSM_FFd3     3       0     0   2     FB6_5   76    I/O     I
+iobm/ES<3>            3       0     0   2     FB6_6   77    I/O     I
+iobm/ES<1>            3       0     0   2     FB6_7         (b)     (b)
+iobm/ES<0>            3       0     0   2     FB6_8   78    I/O     I
 nLDS_IOB              4       0     0   1     FB6_9   79    I/O     O
-iobm/IOS_FSM_FFd2     5       0     0   0     FB6_10        (b)     (b)
+iobm/ES<4>            4       0     0   1     FB6_10        (b)     (b)
 nUDS_IOB              4       0     0   1     FB6_11  80    I/O     O
 nAS_IOB               3       0     0   2     FB6_12  81    I/O     O
-iobm/ES<2>            5       0     0   0     FB6_13        (b)     (b)
+iobm/IOS_FSM_FFd2     5       0     0   0     FB6_13        (b)     (b)
 nADoutLE1             2       0     0   3     FB6_14  82    I/O     O
-nADoutLE0             1       0   \/1   3     FB6_15  85    I/O     O
-iobm/IOACT            6       1<-   0   0     FB6_16        (b)     (b)
-nDinLE                1       0   \/4   0     FB6_17  86    I/O     O
-iobm/IOBERR           9       4<-   0   0     FB6_18        (b)     (b)
+nADoutLE0             1       0     0   4     FB6_15  85    I/O     O
+iobm/ES<2>            5       0     0   0     FB6_16        (b)     (b)
+nDinLE                1       0   \/1   3     FB6_17  86    I/O     O
+iobm/IOACT            6       1<-   0   0     FB6_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: C8M               13: iobm/Er            24: iobm/VPArr 
-  2: iobm/ALE0         14: iobm/Er2           25: iobs/ALE0 
-  3: iobm/BERRrf       15: iobm/IOACT         26: iobs/Clear1 
-  4: iobm/BERRrr       16: iobm/IOBERR        27: iobs/IOL0 
-  5: iobm/DTACKrf      17: iobm/IOREQr        28: iobs/IORW0 
-  6: iobm/DTACKrr      18: iobm/IOS_FSM_FFd1  29: iobs/IOU0 
-  7: iobm/ES<0>        19: iobm/IOS_FSM_FFd2  30: iobs/Load1 
-  8: iobm/ES<1>        20: iobm/IOS_FSM_FFd3  31: nADoutLE1 
-  9: iobm/ES<2>        21: iobm/RESrf         32: nAoutOE 
- 10: iobm/ES<3>        22: iobm/RESrr         33: nBERR_IOB 
- 11: iobm/ES<4>        23: iobm/VPArf         34: nVMA_IOB 
- 12: iobm/ETACK       
+  1: C8M               12: iobm/ETACK         23: iobm/VPArr 
+  2: iobm/ALE0         13: iobm/Er            24: iobs/ALE0 
+  3: iobm/BERRrf       14: iobm/Er2           25: iobs/Clear1 
+  4: iobm/BERRrr       15: iobm/IOACT         26: iobs/IOL0 
+  5: iobm/DTACKrf      16: iobm/IOREQr        27: iobs/IORW0 
+  6: iobm/DTACKrr      17: iobm/IOS_FSM_FFd1  28: iobs/IOU0 
+  7: iobm/ES<0>        18: iobm/IOS_FSM_FFd2  29: iobs/Load1 
+  8: iobm/ES<1>        19: iobm/IOS_FSM_FFd3  30: nADoutLE1 
+  9: iobm/ES<2>        20: iobm/RESrf         31: nAoutOE 
+ 10: iobm/ES<3>        21: iobm/RESrr         32: nVMA_IOB 
+ 11: iobm/ES<4>        22: iobm/VPArf        
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/ETACK           ......XXXXX......................X...... 6
-nVMA_IOB             ......XXXXX...X.......XX.......X.X...... 10
-iobm/DoutOE          ..................XX.......X............ 3
-iobm/ALE0            ................XXXX.................... 4
+iobm/ETACK           ......XXXXX....................X........ 6
+nVMA_IOB             ......XXXXX...X......XX.......XX........ 10
+iobm/DoutOE          .................XX.......X............. 3
+iobm/ALE0            ...............XXXX..................... 4
+iobm/IOS_FSM_FFd3    X..............XXXX...........X......... 6
 iobm/ES<3>           ......XXXX..XX.......................... 6
 iobm/ES<1>           ......XX....XX.......................... 4
 iobm/ES<0>           ......XXXXX.XX.......................... 7
+nLDS_IOB             ................XXX......XX...X......... 6
 iobm/ES<4>           ......XXXXX.XX.......................... 7
-nLDS_IOB             .................XXX......XX...X........ 6
-iobm/IOS_FSM_FFd2    X.XXXX.....X.....XXXXX.................. 11
-nUDS_IOB             .................XXX.......XX..X........ 6
-nAS_IOB              .................XXX...........X........ 4
+nUDS_IOB             ................XXX.......XX..X......... 6
+nAS_IOB              ................XXX...........X......... 4
+iobm/IOS_FSM_FFd2    X.XXXX.....X....XXXXX................... 11
+nADoutLE1            ........................X...XX.......... 3
+nADoutLE0            .X.....................X................ 2
 iobm/ES<2>           ......XXXXX.XX.......................... 7
-nADoutLE1            .........................X...XX......... 3
-nADoutLE0            .X......................X............... 2
-iobm/IOACT           X.XXXX.....X....XXXXXX.................. 12
-nDinLE               .................XX..................... 2
-iobm/IOBERR          X.XXXX.....X...X.XXXXX..........X....... 13
+nDinLE               ................XX...................... 2
+iobm/IOACT           X.XXXX.....X...XXXXXX................... 12
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB7  ***********************************
@@ -661,57 +656,59 @@ cnt/LTimer<10>       .............XX..XXXXXXXXXXX............ 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB8  ***********************************
-Number of function block inputs used/remaining:               34/20
-Number of signals used by logic mapping into function block:  34
+Number of function block inputs used/remaining:               33/21
+Number of signals used by logic mapping into function block:  33
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-cnt/PORS_FSM_FFd1     1       0   /\2   2     FB8_1         (b)     (b)
-RA<11>                1       0   \/4   0     FB8_2   63    I/O     O
-ram/RS_FSM_FFd3       9       4<-   0   0     FB8_3         (b)     (b)
-(unused)              0       0     0   5     FB8_4         (b)     
-nRAS                  3       0   \/1   1     FB8_5   64    I/O     O
-nRAMLWE               1       1<- \/5   0     FB8_6   65    I/O     O
-iobs/PS_FSM_FFd2     14       9<-   0   0     FB8_7         (b)     (b)
-nRAMUWE               1       0   /\4   0     FB8_8   66    I/O     O
-(unused)              0       0   \/4   1     FB8_9   67    I/O     (b)
-iobs/Load1           14       9<-   0   0     FB8_10        (b)     (b)
-(unused)              0       0   /\5   0     FB8_11  68    I/O     (b)
-nBERR_FSB             4       0   \/1   0     FB8_12  70    I/O     O
+iobs/Once            15      10<-   0   0     FB8_1         (b)     (b)
+RA<11>                1       1<- /\5   0     FB8_2   63    I/O     O
+iobs/Clear1           1       0   /\1   3     FB8_3         (b)     (b)
+iobs/ALE0             1       0     0   4     FB8_4         (b)     (b)
+nRAS                  3       0     0   2     FB8_5   64    I/O     O
+nRAMLWE               1       0     0   4     FB8_6   65    I/O     O
+iobs/PS_FSM_FFd1      2       0   \/1   2     FB8_7         (b)     (b)
+nRAMUWE               1       1<- \/5   0     FB8_8   66    I/O     O
+ram/RS_FSM_FFd1       8       5<- \/2   0     FB8_9   67    I/O     (b)
+(unused)              0       0   \/5   0     FB8_10        (b)     (b)
+ram/RS_FSM_FFd3       9       7<- \/3   0     FB8_11  68    I/O     (b)
+nBERR_FSB             4       3<- \/4   0     FB8_12  70    I/O     O
 (unused)              0       0   \/5   0     FB8_13        (b)     (b)
-iobs/IOREQ           14       9<-   0   0     FB8_14  71    I/O     (b)
-nBR_IOB               2       0   /\3   0     FB8_15  72    I/O     O
-(unused)              0       0   \/5   0     FB8_16        (b)     (b)
-iobs/Once            17      12<-   0   0     FB8_17  73    I/O     I
-(unused)              0       0   /\5   0     FB8_18        (b)     (b)
+iobs/PS_FSM_FFd2     12       9<- \/2   0     FB8_14  71    I/O     (b)
+nBR_IOB               2       2<- \/5   0     FB8_15  72    I/O     O
+iobs/Load1           14       9<-   0   0     FB8_16        (b)     (b)
+ram/BACTr             1       0   /\4   0     FB8_17  73    I/O     (b)
+(unused)              0       0   \/5   0     FB8_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<13>         13: cnt/PORS_FSM_FFd1  24: nBERR_FSB 
-  2: A_FSB<14>         14: cnt/PORS_FSM_FFd2  25: nBR_IOB 
-  3: A_FSB<16>         15: cs/nOverlay1       26: nLDS_FSB 
-  4: A_FSB<17>         16: fsb/ASrf           27: nUDS_FSB 
-  5: A_FSB<18>         17: iobm/IOBERR        28: nWE_FSB 
-  6: A_FSB<19>         18: iobs/IOACTr        29: ram/RAMEN 
-  7: A_FSB<20>         19: iobs/Once          30: ram/RS_FSM_FFd1 
-  8: A_FSB<21>         20: iobs/PS_FSM_FFd1   31: ram/RS_FSM_FFd2 
-  9: A_FSB<22>         21: iobs/PS_FSM_FFd2   32: ram/RS_FSM_FFd3 
- 10: A_FSB<23>         22: nADoutLE1          33: ram/RefRAS 
- 11: cnt/IPL2r         23: nAS_FSB            34: ram/RefUrgent 
- 12: cnt/LTimer<13>   
+  1: A_FSB<13>         12: cnt/PORS_FSM_FFd1  23: nBERR_FSB 
+  2: A_FSB<14>         13: cnt/PORS_FSM_FFd2  24: nBR_IOB 
+  3: A_FSB<16>         14: cs/nOverlay1       25: nLDS_FSB 
+  4: A_FSB<17>         15: fsb/ASrf           26: nUDS_FSB 
+  5: A_FSB<18>         16: iobm/IOBERR        27: nWE_FSB 
+  6: A_FSB<19>         17: iobs/IOACTr        28: ram/RAMEN 
+  7: A_FSB<20>         18: iobs/Once          29: ram/RS_FSM_FFd1 
+  8: A_FSB<21>         19: iobs/PS_FSM_FFd1   30: ram/RS_FSM_FFd2 
+  9: A_FSB<22>         20: iobs/PS_FSM_FFd2   31: ram/RS_FSM_FFd3 
+ 10: A_FSB<23>         21: nADoutLE1          32: ram/RefRAS 
+ 11: cnt/IPL2r         22: nAS_FSB            33: ram/RefUrgent 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-cnt/PORS_FSM_FFd1    ..........XXXX.......................... 4
+iobs/Once            XXXXXXXXXX...XX..XXXXX....X............. 18
 RA<11>               .....X.................................. 1
-ram/RS_FSM_FFd3      .......XXX....XX......X.....XXXX.X...... 11
-nRAS                 .......XXX....X.......X.....X...X....... 7
-nRAMLWE              ......................X..X.XX........... 4
-iobs/PS_FSM_FFd2     XXXXXXXXXX....XX.XXXXXX....X............ 19
-nRAMUWE              ......................X...XXX........... 4
-iobs/Load1           XXXXXXXXXX....XX..XXXXX....X............ 18
-nBERR_FSB            ...............XXXX.XXXX................ 8
-iobs/IOREQ           XXXXXXXXXX....XX.XXXXXX....X............ 19
-nBR_IOB              ..........X.XX..........X............... 4
-iobs/Once            XXXXXXXXXX....XX..XXXXX....X............ 18
+iobs/Clear1          ..................XXX................... 3
+iobs/ALE0            ..................XX.................... 2
+nRAS                 .......XXX...X.......X.....X...X........ 7
+nRAMLWE              .....................X..X.XX............ 4
+iobs/PS_FSM_FFd1     ................X.XX.................... 3
+nRAMUWE              .....................X...XXX............ 4
+ram/RS_FSM_FFd1      .......XXX...XX......X.....XXXX.X....... 11
+ram/RS_FSM_FFd3      .......XXX...XX......X.....XXXX.X....... 11
+nBERR_FSB            ..............XXXX.XXXX................. 8
+iobs/PS_FSM_FFd2     XXXXXXXXXX...XX.XXXXXX....X............. 19
+nBR_IOB              ..........XXX..........X................ 4
+iobs/Load1           XXXXXXXXXX...XX..XXXXX....X............. 18
+ram/BACTr            ..............X......X.................. 2
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *******************************  Equations  ********************************
@@ -752,6 +749,8 @@ assign C25MEN = 1'b1;
 
 
 
+
+
 
 
 
@@ -979,65 +978,57 @@ assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf)
 	!cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady));
 
 FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,FCLK,1'b0,1'b0);
-assign fsb/Ready1r_D = ((A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
+assign fsb/Ready1r_D = ((A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
 	|| (nAS_FSB && !fsb/ASrf)
 	|| (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && 
 	!iobs/IOReady)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady));
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && 
+	!iobs/IOReady));
 
 FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,FCLK,1'b0,1'b0);
-assign fsb/VPA_D = ((EXP21_.EXP)
+assign fsb/VPA_D = ((EXP15_.EXP)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1)
+	|| (A_FSB[9] && A_FSB[8] && A_FSB[15] && A_FSB[14] && 
+	A_FSB[13] && A_FSB[12] && A_FSB[11] && A_FSB[10] && A_FSB[23] && 
+	A_FSB[22] && A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && 
+	A_FSB[17] && A_FSB[16] && iobs/IOReady && !nAS_FSB)
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+	!fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
 	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 	!fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 	!cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 	!cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && 
-	!nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && 
-	!nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && 
-	!nADoutLE1)
 	|| (A_FSB[23] && !fsb/Ready1r && fsb/VPA && 
 	!iobs/IOReady && !nAS_FSB)
 	|| (A_FSB[23] && !fsb/Ready1r && fsb/VPA && 
 	!iobs/IOReady && fsb/ASrf)
-	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
-	!fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-	fsb/VPA && !iobs/IOReady && !nAS_FSB)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-	fsb/VPA && !iobs/IOReady && fsb/ASrf));
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && !nAS_FSB)
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && !nAS_FSB));
 
 FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,C16M,1'b0,1'b0);
 assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)
@@ -1048,8 +1039,6 @@ FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!C16M,1'b0,1'b0);
 
 FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,C16M,1'b0,1'b0);
 
-FDCPE FDCPE_iobm/BG (iobm/BG,!nBG_IOB,C16M,1'b0,1'b0,iobm/nASr);
-
 FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!C16M,1'b0,1'b0);
 
 FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,C16M,1'b0,1'b0);
@@ -1113,10 +1102,7 @@ assign iobm/IOACT_D = ((C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 &&
 	iobm/DTACKrf && iobm/DTACKrr));
 
 FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,C16M,1'b0,1'b0);
-assign iobm/IOBERR_T = ((C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
-	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && 
-	iobm/RESrr)
-	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+assign iobm/IOBERR_T = ((C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
 	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && 
 	iobm/BERRrr)
 	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
@@ -1125,6 +1111,9 @@ assign iobm/IOBERR_T = ((C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 &&
 	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
 	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && 
 	iobm/RESrr)
+	|| (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && 
+	iobm/RESrr)
 	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
 	!iobm/IOS_FSM_FFd2 && iobm/IOBERR)
 	|| (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
@@ -1160,8 +1149,8 @@ FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,1'b0,1
 assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2)
 	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
 	!iobm/IOS_FSM_FFd2)
-	|| (!C8M && iobm/BG && !iobm/IOS_FSM_FFd1 && 
-	!iobm/IOS_FSM_FFd2 && iobm/IOREQr));
+	|| (!C8M && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && 
+	iobm/IOREQr && !nAoutOE));
 
 FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES.PIN,!C16M,1'b0,1'b0);
 
@@ -1171,9 +1160,6 @@ FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!C16M,1'b0,1'b0);
 
 FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,C16M,1'b0,1'b0);
 
-FDCPE FDCPE_iobm/nASr (iobm/nASr,iobm/nASr_D,C16M,1'b0,1'b0);
-assign iobm/nASr_D = (!nAS_IOB && nAoutOE);
-
 FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,FCLK,1'b0,1'b0);
 assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
 
@@ -1190,105 +1176,79 @@ assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
 FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,FCLK,1'b0,1'b0,iobs/Load1);
 
 FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,FCLK,1'b0,1'b0);
-assign iobs/IOREQ_D = ((iobs/nBERR_FSB.EXP)
-	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1)
-	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr)
-	|| (iobs/Once && !iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
-	nADoutLE1)
-	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !fsb/ASrf && 
-	nADoutLE1));
+assign iobs/IOREQ_D = ((EXP16_.EXP)
+	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd1)
+	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd1 && 
+	fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd1)
+	|| (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (iobs/PS_FSM_FFd2 && !iobs/IOACTr)
+	|| (!iobs/PS_FSM_FFd1 && !nADoutLE1));
 
-FTCPE FTCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_T,FCLK,1'b0,1'b0);
-assign iobs/IORW0_T = ((A_FSB[23] && nWE_FSB && !iobs/Once && !iobs/IORW0 && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-	!iobs/Once && !iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-	!iobs/Once && !iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !nWE_FSB && 
-	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !nWE_FSB && 
-	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (nROMWE_OBUF.EXP)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !iobs/Once && iobs/IORW0 && !nAS_FSB && 
+FDCPE FDCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_D,FCLK,1'b0,1'b0);
+assign iobs/IORW0_D = ((!iobs/IORW1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	!nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && !iobs/IORW0 && 
+	nADoutLE1)
+	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && !nAS_FSB && 
 	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (iobs/IORW0 && !iobs/IORW1 && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && !nADoutLE1)
-	|| (!iobs/IORW0 && iobs/IORW1 && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && !nADoutLE1)
-	|| (A_FSB[23] && nWE_FSB && !iobs/Once && !iobs/IORW0 && 
+	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && 
 	!nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && iobs/IORW0 && 
+	|| (nROMWE_OBUF.EXP)
+	|| (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && 
 	!nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && iobs/IORW0 && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1));
+	|| (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	nADoutLE1)
+	|| (!iobs/IORW0 && iobs/PS_FSM_FFd2)
+	|| (!iobs/IORW0 && iobs/PS_FSM_FFd1)
+	|| (iobs/Once && !iobs/IORW0 && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !iobs/IORW0 && nADoutLE1)
+	|| (!iobs/IORW0 && nAS_FSB && !fsb/ASrf && nADoutLE1));
 
 FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,FCLK,1'b0,1'b0);
 assign iobs/IORW1_T = ((iobs/Once)
 	|| (!nADoutLE1)
 	|| (fsb/Ready1r.EXP)
-	|| (!nWE_FSB && !iobs/IORW1)
 	|| (nAS_FSB && !fsb/ASrf)
-	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
 	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[19])
+	|| (!A_FSB[23] && !A_FSB[22] && nWE_FSB)
 	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1)
-	|| (!A_FSB[23] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[18])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[17])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[16])
+	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20])
 	|| (nWE_FSB && iobs/IORW1)
-	|| (!A_FSB[23] && A_FSB[21] && !iobs/IORW1));
+	|| (!nWE_FSB && !iobs/IORW1)
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 
 FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,FCLK,1'b0,1'b0);
-assign iobs/IOReady_T = ((iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && 
+assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf)
+	|| (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && 
 	!iobs/IOACTr && iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && !iobs/IOReady && !nAS_FSB && 
 	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && 
-	!iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)
-	|| (iobs/IOReady && nAS_FSB && !fsb/ASrf));
+	!iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1));
 
 FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,FCLK,1'b0,1'b0,iobs/IOU0_CE);
 assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1)
@@ -1301,71 +1261,77 @@ FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,FCLK,1'b0,1'b0);
 assign iobs/Load1_D = ((iobs/Once)
 	|| (!nADoutLE1)
 	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[19])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[17])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[16])
 	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
-	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21])
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1)
-	|| (!A_FSB[23] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[18])
+	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20])
+	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && !A_FSB[22])
 	|| (nAS_FSB && !fsb/ASrf)
-	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (!A_FSB[23] && !A_FSB[22] && nWE_FSB));
 
-FDCPE FDCPE_iobs/Once (iobs/Once,iobs/Once_D,FCLK,1'b0,1'b0);
-assign iobs/Once_D = ((A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd1)
-	|| (!iobs/Once && iobs/PS_FSM_FFd2 && !nADoutLE1)
-	|| (!iobs/Once && iobs/PS_FSM_FFd1 && !nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !iobs/Once)
-	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-	!iobs/Once)
-	|| (cnt/PORS_FSM_FFd1.EXP)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && !iobs/Once)
-	|| (nAS_FSB && !fsb/ASrf)
-	|| (A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd2)
-	|| (!A_FSB[23] && !A_FSB[20] && !iobs/Once)
-	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd2)
-	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd1));
+FTCPE FTCPE_iobs/Once (iobs/Once,iobs/Once_T,FCLK,1'b0,1'b0);
+assign iobs/Once_T = ((A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1)
+	|| (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1)
+	|| (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (iobs/Once && nAS_FSB && !fsb/ASrf)
+	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && 
+	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 
 FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,1'b0,1'b0);
 assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2)
 	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr));
 
-FDCPE FDCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,FCLK,1'b0,1'b0);
-assign iobs/PS_FSM_FFd2_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
-	iobs/IOACTr)
-	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
-	!iobs/IOACTr)
-	|| (iobs/Once && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	!fsb/ASrf && nADoutLE1));
+FTCPE FTCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,1'b0,1'b0);
+assign iobs/PS_FSM_FFd2_T = ((iobs/nBERR_FSB.EXP)
+	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && 
+	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr)
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1)
+	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 
 
 assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0);
@@ -1378,19 +1344,19 @@ FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!C16M,1'b0,1'b0);
 assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2)
 	|| (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2));
 assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ;
-assign nAS_IOB_OE = nAoutOE;
+assign nAS_IOB_OE = !nAoutOE;
 
 FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,!C8M,1'b0,1'b0);
 assign nAoutOE_D = (!nBR_IOB && cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2);
 
 FTCPE FTCPE_nBERR_FSB (nBERR_FSB,nBERR_FSB_T,FCLK,1'b0,1'b0);
-assign nBERR_FSB_T = ((nAS_FSB && !nBERR_FSB && !fsb/ASrf)
-	|| (iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && 
+assign nBERR_FSB_T = ((iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && 
 	!iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && !nAS_FSB && nBERR_FSB && 
 	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && nBERR_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1));
+	!iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1)
+	|| (nAS_FSB && !nBERR_FSB && !fsb/ASrf));
 
 FTCPE FTCPE_nBR_IOB (nBR_IOB,nBR_IOB_T,!C8M,1'b0,1'b0);
 assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2)
@@ -1400,38 +1366,35 @@ assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2)
 FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!FCLK,1'b0,1'b0);
 
 FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,FCLK,1'b0,1'b0);
-assign nDTACK_FSB_D = ((iobs/IOReady.EXP)
+assign nDTACK_FSB_D = ((iobs/IOREQ.EXP)
+	|| (nAS_FSB && !fsb/ASrf)
+	|| (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady && 
+	nDTACK_FSB)
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && 
+	!iobs/IOReady && nDTACK_FSB)
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && 
+	!iobs/IOReady && nDTACK_FSB)
 	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 	!fsb/Ready0r && nDTACK_FSB && !ram/RAMReady)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-	!iobs/IOReady && nDTACK_FSB)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 	!cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
-	!nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
-	!nADoutLE1));
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1));
 
 FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!C16M,1'b0,1'b0);
 assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2);
 
 
 assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-	!nAS_FSB));
+	|| (A_FSB[22] && A_FSB[21] && nWE_FSB && !nAS_FSB)
+	|| (A_FSB[22] && A_FSB[20] && nWE_FSB && !nAS_FSB));
 
 
-assign nDoutOE = !((!nAoutOE && iobm/DoutOE));
+assign nDoutOE = !((iobm/DoutOE && !nAoutOE));
 
 FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!C16M,1'b0,1'b0);
 assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && 
@@ -1441,7 +1404,7 @@ assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 &&
 	|| (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && 
 	!iobm/IOS_FSM_FFd1));
 assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ;
-assign nLDS_IOB_OE = nAoutOE;
+assign nLDS_IOB_OE = !nAoutOE;
 
 
 assign nOE = !((nWE_FSB && !nAS_FSB));
@@ -1480,7 +1443,7 @@ assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 &&
 	|| (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && 
 	!iobm/IOS_FSM_FFd1));
 assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ;
-assign nUDS_IOB_OE = nAoutOE;
+assign nUDS_IOB_OE = !nAoutOE;
 
 FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,C16M,1'b0,1'b0);
 assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && 
@@ -1489,7 +1452,7 @@ assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] &&
 	!iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && 
 	iobm/VPArr));
 assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ;
-assign nVMA_IOB_OE = nAoutOE;
+assign nVMA_IOB_OE = !nAoutOE;
 
 
 assign nVPA_FSB = !((fsb/VPA && !nAS_FSB));
@@ -1564,7 +1527,11 @@ assign ram/RASEL_D = ((A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 &&
 	!ram/RS_FSM_FFd3 && !fsb/ASrf));
 
 FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,1'b0,1'b0);
-assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+assign ram/RS_FSM_FFd1_D = ((ram/RS_FSM_FFd1 && ram/RefUrgent && 
+	!ram/RS_FSM_FFd3 && fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN && 
 	fsb/ASrf)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
@@ -1576,11 +1543,7 @@ assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 &&
 	|| (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2)
 	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3)
 	|| (!nAS_FSB && ram/RS_FSM_FFd1 && ram/RefUrgent && 
-	!ram/RS_FSM_FFd3)
-	|| (ram/RS_FSM_FFd1 && ram/RefUrgent && 
-	!ram/RS_FSM_FFd3 && fsb/ASrf)
-	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && 
-	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN));
+	!ram/RS_FSM_FFd3));
 
 FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,1'b0,1'b0);
 assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && 
@@ -1602,16 +1565,13 @@ assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent &&
 	!ram/RS_FSM_FFd3 && !ram/RefReq));
 
 FTCPE FTCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,1'b0,1'b0);
-assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
-	!ram/RS_FSM_FFd3)
-	|| (ram/RS_FSM_FFd1 && !ram/RefUrgent && 
-	!ram/RS_FSM_FFd3)
+assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1.EXP)
+	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
+	ram/RS_FSM_FFd3)
 	|| (A_FSB[23] && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
 	!ram/RS_FSM_FFd3)
 	|| (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
 	!fsb/ASrf)
-	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
-	ram/RS_FSM_FFd3)
 	|| (!ram/RS_FSM_FFd2 && !ram/RefUrgent && 
 	!ram/RS_FSM_FFd3 && !ram/RAMEN)
 	|| (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd1 && 
@@ -1706,7 +1666,7 @@ No. Name                           No. Name
  20 A_FSB<22>                        70 nBERR_FSB                     
  21 GND                              71 KPR                           
  22 C16M                             72 nBR_IOB                       
- 23 C8M                              73 nBG_IOB                       
+ 23 C8M                              73 KPR                           
  24 A_FSB<23>                        74 nVMA_IOB                      
  25 E                                75 GND                           
  26 VCC                              76 nBERR_IOB                     
diff --git a/cpld/XC95144XL/WarpSE.syr b/cpld/XC95144XL/WarpSE.syr
index dfa7477..14584e0 100644
--- a/cpld/XC95144XL/WarpSE.syr
+++ b/cpld/XC95144XL/WarpSE.syr
@@ -238,7 +238,6 @@ Synthesizing Unit <IOBM>.
     Found 1-bit register for signal <nVMA>.
     Found 1-bit register for signal <BERRrf>.
     Found 1-bit register for signal <BERRrr>.
-    Found 1-bit register for signal <BG>.
     Found 1-bit register for signal <DoutOE>.
     Found 1-bit register for signal <DTACKrf>.
     Found 1-bit register for signal <DTACKrr>.
@@ -247,7 +246,6 @@ Synthesizing Unit <IOBM>.
     Found 5-bit up counter for signal <ES>.
     Found 1-bit register for signal <ETACK>.
     Found 1-bit register for signal <IOREQr>.
-    Found 1-bit register for signal <nASr>.
     Found 1-bit register for signal <RESrf>.
     Found 1-bit register for signal <RESrr>.
     Found 1-bit register for signal <VPArf>.
@@ -255,7 +253,7 @@ Synthesizing Unit <IOBM>.
     Summary:
 	inferred   1 Finite State Machine(s).
 	inferred   1 Counter(s).
-	inferred  22 D-type flip-flop(s).
+	inferred  20 D-type flip-flop(s).
 Unit <IOBM> synthesized.
 
 
@@ -304,6 +302,7 @@ Unit <FSB> synthesized.
 
 Synthesizing Unit <WarpSE>.
     Related source file is "../WarpSE.v".
+WARNING:Xst:647 - Input <nBG_IOB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
 WARNING:Xst:646 - Signal <SndRAMCSWR> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
 WARNING:Xst:646 - Signal <SCSICS> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
     Found 1-bit tristate buffer for signal <nAS_IOB>.
@@ -324,8 +323,8 @@ Macro Statistics
  14-bit up counter                                     : 1
  4-bit up counter                                      : 1
  5-bit up counter                                      : 1
-# Registers                                            : 63
- 1-bit register                                        : 63
+# Registers                                            : 61
+ 1-bit register                                        : 61
 # Tristates                                            : 5
  1-bit tristate buffer                                 : 5
 
@@ -393,8 +392,8 @@ Macro Statistics
  14-bit up counter                                     : 1
  4-bit up counter                                      : 1
  5-bit up counter                                      : 1
-# Registers                                            : 51
- Flip-Flops                                            : 51
+# Registers                                            : 49
+ Flip-Flops                                            : 49
 
 =========================================================================
 
@@ -403,6 +402,7 @@ Macro Statistics
 =========================================================================
 
 Optimizing unit <WarpSE> ...
+  implementation constraint: INIT=r	 : cs/nOverlay0
   implementation constraint: INIT=r	 : fsb/ASrf
   implementation constraint: INIT=r	 : iobm/IOREQr
   implementation constraint: INIT=r	 : cnt/PORS_FSM_FFd1
@@ -412,20 +412,18 @@ Optimizing unit <WarpSE> ...
   implementation constraint: INIT=r	 : ram/RAMReady
   implementation constraint: INIT=r	 : ram/RASEL
   implementation constraint: INIT=r	 : ram/RefRAS
-  implementation constraint: INIT=r	 : cs/nOverlay0
   implementation constraint: INIT=r	 : iobs/IOACTr
   implementation constraint: INIT=r	 : iobs/Once
-  implementation constraint: INIT=r	 : ram/RS_FSM_FFd1
-  implementation constraint: INIT=r	 : iobm/BG
-  implementation constraint: INIT=r	 : iobm/IOS_FSM_FFd3
+  implementation constraint: INIT=r	 : ram/RS_FSM_FFd3
   implementation constraint: INIT=r	 : iobm/ETACK
   implementation constraint: INIT=r	 : iobm/DoutOE
-  implementation constraint: INIT=r	 : ram/RS_FSM_FFd3
-  implementation constraint: INIT=r	 : iobm/IOS_FSM_FFd2
-  implementation constraint: INIT=r	 : iobs/PS_FSM_FFd2
-  implementation constraint: INIT=r	 : iobs/PS_FSM_FFd1
-  implementation constraint: INIT=r	 : iobm/IOS_FSM_FFd1
   implementation constraint: INIT=r	 : ram/RS_FSM_FFd2
+  implementation constraint: INIT=r	 : iobm/IOS_FSM_FFd2
+  implementation constraint: INIT=r	 : iobm/IOS_FSM_FFd3
+  implementation constraint: INIT=r	 : iobs/PS_FSM_FFd2
+  implementation constraint: INIT=r	 : iobm/IOS_FSM_FFd1
+  implementation constraint: INIT=r	 : iobs/PS_FSM_FFd1
+  implementation constraint: INIT=r	 : ram/RS_FSM_FFd1
   implementation constraint: INIT=r	 : cnt/Timer_3
   implementation constraint: INIT=r	 : cnt/Timer_2
   implementation constraint: INIT=r	 : cnt/Timer_1
@@ -461,26 +459,24 @@ Design Statistics
 # IOs                              : 75
 
 Cell Usage :
-# BELS                             : 577
+# BELS                             : 574
 #      AND2                        : 172
-#      AND3                        : 20
+#      AND3                        : 19
 #      AND4                        : 15
 #      AND5                        : 3
 #      AND6                        : 1
 #      AND8                        : 4
 #      GND                         : 1
-#      INV                         : 238
+#      INV                         : 236
 #      OR2                         : 98
 #      OR3                         : 4
 #      VCC                         : 1
 #      XOR2                        : 20
-# FlipFlops/Latches                : 96
-#      FD                          : 63
-#      FDCE                        : 33
-# Tri-States                       : 1
-#      BUFE                        : 1
-# IO Buffers                       : 72
-#      IBUF                        : 36
+# FlipFlops/Latches                : 94
+#      FD                          : 62
+#      FDCE                        : 32
+# IO Buffers                       : 71
+#      IBUF                        : 35
 #      IOBUFE                      : 1
 #      OBUF                        : 31
 #      OBUFE                       : 4
@@ -488,13 +484,13 @@ Cell Usage :
 
 
 Total REAL time to Xst completion: 15.00 secs
-Total CPU time to Xst completion: 15.04 secs
+Total CPU time to Xst completion: 15.07 secs
  
 --> 
 
 Total memory usage is 266244 kilobytes
 
 Number of errors   :    0 (   0 filtered)
-Number of warnings :    4 (   0 filtered)
+Number of warnings :    5 (   0 filtered)
 Number of infos    :    0 (   0 filtered)
 
diff --git a/cpld/XC95144XL/WarpSE.tspec b/cpld/XC95144XL/WarpSE.tspec
index 0b33bd1..592ada0 100644
--- a/cpld/XC95144XL/WarpSE.tspec
+++ b/cpld/XC95144XL/WarpSE.tspec
@@ -116,17 +116,14 @@ TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<12>.D:1428
 TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<12>.D:1428
 TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<12>.D:1428
 TS_CLK_IOB:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<12>.D:1428
-TS_CLK_IOB:FROM:cnt/nBR_IOB.Q:TO:cnt/AoutOE.D:1428
-TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:cnt/AoutOE.D:1428
-TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:cnt/AoutOE.D:1428
 TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:cnt/nBR_IOB.D:1428
 TS_CLK_IOB:FROM:cnt/nBR_IOB.Q:TO:cnt/nBR_IOB.D:1428
 TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:cnt/nBR_IOB.D:1428
 TS_CLK_IOB:FROM:cnt/IPL2r.Q:TO:cnt/nBR_IOB.D:1428
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd3.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd3.D:666
+TS_CLK_IOB:FROM:nAoutOE_OBUF.Q:TO:iobm/IOS_FSM_FFd3.D:1428
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/BG.Q:TO:iobm/IOS_FSM_FFd3.D:666
 TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd3.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd2.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd2.D:666
@@ -171,14 +168,17 @@ TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOACT.D:666
 TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOACT.D:666
 TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOACT.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOACT.D:666
-TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400
+TS_CLK_IOB:FROM:cnt/nBR_IOB.Q:TO:nAoutOE_OBUF.D:1428
+TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:nAoutOE_OBUF.D:1428
+TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:nAoutOE_OBUF.D:1428
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Once.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:400
 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Once.D:400
+TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW0.D:400
 TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:iobs/IORW0.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IORW0.D:400
@@ -344,16 +344,15 @@ TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:iobm/nVMA.D:666
 TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:iobm/nVMA.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/nVMA.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/nVMA.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nASout.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nASout.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nASout.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nLDS.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nLDS.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nLDS.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nUDS.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nUDS.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nUDS.D:666
-TS_CLK2X_IOB:FROM:iobm/nASr.Q:TO:iobm/BG.CE:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nASout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nASout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nASout.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd1.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd1.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:666
@@ -399,6 +398,5 @@ TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/ALE0.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/ALE0.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/DoutOE.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/DoutOE.D:666
-TS_CLK2X_IOB:FROM:iobm/nASout.Q:TO:iobm/nASr.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nDinLE.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nDinLE.D:666
diff --git a/cpld/XC95144XL/WarpSE.vm6 b/cpld/XC95144XL/WarpSE.vm6
index c6cd4f3..aedfc0a 100644
--- a/cpld/XC95144XL/WarpSE.vm6
+++ b/cpld/XC95144XL/WarpSE.vm6
@@ -8,2748 +8,2584 @@ NETWORK | WarpSE | 0 | 0 | 16391
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_9_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<9> | 9616 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<9> | 9502 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_8_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<8> | 9617 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<8> | 9503 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_8_IBUF | 9408 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_15_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<15> | 9618 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<15> | 9504 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_15_IBUF | 9409 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_14_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<14> | 9619 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<14> | 9505 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_13_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<13> | 9620 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<13> | 9506 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_12_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<12> | 9621 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<12> | 9507 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_12_IBUF | 9412 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_11_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<11> | 9622 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<11> | 9508 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_11_IBUF | 9413 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_10_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<10> | 9623 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<10> | 9509 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_10_IBUF | 9414 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_23_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<23> | 9624 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<23> | 9510 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_22_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<22> | 9625 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<22> | 9511 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_21_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<21> | 9626 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<21> | 9512 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_20_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<20> | 9627 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<20> | 9513 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_19_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<19> | 9628 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<19> | 9514 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_18_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<18> | 9629 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<18> | 9515 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_17_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<17> | 9630 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<17> | 9516 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_16_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<16> | 9631 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<16> | 9517 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | C16M_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | C16M | 9632 | PI | 465 | 0 | WarpSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE
+NODE | C16M | 9518 | PI | 454 | 0 | WarpSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 
 MACROCELL_INSTANCE | PrldLow+Tff+PinTrst+OptxMapped | iobm/nVMA | WarpSE_COPY_0_COPY_0 | 2155893760 | 11 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nVMA | 9426 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
+NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOACT | 9519 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
+NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArf | 9534 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
+NODE | iobm/VPArf | 9419 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArr | 9535 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
+NODE | iobm/VPArr | 9420 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | iobm/nVMA$Q | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q
+NODE | iobm/nVMA$Q | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/nVMA | 9426 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
+NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
-NODE | iobm/nVMA$OE | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE
+NODE | iobm/nVMA$OE | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE
 
 SIGNAL_INSTANCE | iobm/nVMA.SI | iobm/nVMA | 0 | 10 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nVMA | 9426 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
+NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOACT | 9519 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
+NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArf | 9534 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
+NODE | iobm/VPArf | 9419 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArr | 9535 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
+NODE | iobm/VPArr | 9420 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/nVMA.D1 | 9653 | ? | 556 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/nVMA.D1 | 9538 | ? | 545 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/nVMA.D2 | 9654 | ? | 556 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/nVMA.D2 | 9539 | ? | 545 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 6 | IV_FALSE | iobm/nVMA | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4>
 SPPTERM | 9 | IV_TRUE | iobm/nVMA | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr
 OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
-SIGNAL | NODE | iobm/nVMA.TRST | 9656 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
+SIGNAL | NODE | iobm/nVMA.TRST | 9541 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
 
 SRFF_INSTANCE | iobm/nVMA.REG | iobm/nVMA | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/nVMA.D | 9652 | ? | 556 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.XOR | 0 | 7 | ALU_F
+NODE | iobm/nVMA.D | 9537 | ? | 545 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/nVMA.Q | 9657 | ? | 574 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.REG | 0 | 8 | SRFF_Q
+NODE | iobm/nVMA.Q | 9542 | ? | 561 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 BUF_INSTANCE | iobm/nVMA.BUFOE | iobm/nVMA | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
-SIGNAL | NODE | iobm/nVMA.TRST | 9656 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
+SIGNAL | NODE | iobm/nVMA.TRST | 9541 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
 OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
-NODE | iobm/nVMA.BUFOE.OUT | 9655 | ? | 0 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.BUFOE | 0 | 10 | BUF_OUT
-
-MACROCELL_INSTANCE | PrldLow+PinTrst+OptxMapped+Ce | iobm/nASout | WarpSE_COPY_0_COPY_0 | 2424325120 | 5 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | iobm/nASout$Q | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/nASout | 9429 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
-NODE | iobm/nASout$OE | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE
-
-SIGNAL_INSTANCE | iobm/nASout.SI | iobm/nASout | 0 | 4 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/nASout.D1 | 9659 | ? | 558 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/nASout.D2 | 9660 | ? | 558 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
-SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
-OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
-SIGNAL | NODE | iobm/nASout.TRST | 9662 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
-
-SRFF_INSTANCE | iobm/nASout.REG | iobm/nASout | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/nASout.D | 9658 | ? | 558 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/nASout.Q | 9663 | ? | 587 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-BUF_INSTANCE | iobm/nASout.BUFOE | iobm/nASout | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
-SIGNAL | NODE | iobm/nASout.TRST | 9662 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
-OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
-NODE | iobm/nASout.BUFOE.OUT | 9661 | ? | 0 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.BUFOE | 0 | 10 | BUF_OUT
+NODE | iobm/nVMA.BUFOE.OUT | 9540 | ? | 0 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.BUFOE | 0 | 10 | BUF_OUT
 
 MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | iobm/nLDS | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL0 | 9465 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM
+NODE | iobs/IOL0 | 9352 | ? | 547 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | iobm/nLDS | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q
+NODE | iobm/nLDS | 9318 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
-NODE | iobm/nLDS$OE | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE
+NODE | iobm/nLDS$OE | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE
 
 SIGNAL_INSTANCE | iobm/nLDS.SI | iobm/nLDS | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL0 | 9465 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM
+NODE | iobs/IOL0 | 9352 | ? | 547 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/nLDS.D1 | 9665 | ? | 560 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/nLDS.D1 | 9544 | ? | 547 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/nLDS.D2 | 9666 | ? | 560 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/nLDS.D2 | 9545 | ? | 547 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobs/IOL0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2
 SPPTERM | 3 | IV_TRUE | iobs/IOL0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
 SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/IOL0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1
 OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
-SIGNAL | NODE | iobm/nLDS.TRST | 9668 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
+SIGNAL | NODE | iobm/nLDS.TRST | 9547 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
 
 SRFF_INSTANCE | iobm/nLDS.REG | iobm/nLDS | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/nLDS.D | 9664 | ? | 560 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.XOR | 0 | 7 | ALU_F
+NODE | iobm/nLDS.D | 9543 | ? | 547 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/nLDS.Q | 9669 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.REG | 0 | 8 | SRFF_Q
+NODE | iobm/nLDS.Q | 9548 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 BUF_INSTANCE | iobm/nLDS.BUFOE | iobm/nLDS | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
-SIGNAL | NODE | iobm/nLDS.TRST | 9668 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
+SIGNAL | NODE | iobm/nLDS.TRST | 9547 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
 OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
-NODE | iobm/nLDS.BUFOE.OUT | 9667 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.BUFOE | 0 | 10 | BUF_OUT
+NODE | iobm/nLDS.BUFOE.OUT | 9546 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.BUFOE | 0 | 10 | BUF_OUT
 
 MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | iobm/nUDS | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU0 | 9470 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM
+NODE | iobs/IOU0 | 9357 | ? | 549 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | iobm/nUDS | 9433 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q
+NODE | iobm/nUDS | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
-NODE | iobm/nUDS$OE | 9434 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE
+NODE | iobm/nUDS$OE | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE
 
 SIGNAL_INSTANCE | iobm/nUDS.SI | iobm/nUDS | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU0 | 9470 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM
+NODE | iobs/IOU0 | 9357 | ? | 549 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/nUDS.D1 | 9671 | ? | 561 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/nUDS.D1 | 9550 | ? | 549 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/nUDS.D2 | 9672 | ? | 561 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/nUDS.D2 | 9551 | ? | 549 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobs/IOU0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2
 SPPTERM | 3 | IV_TRUE | iobs/IOU0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
 SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/IOU0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1
 OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
-SIGNAL | NODE | iobm/nUDS.TRST | 9674 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
+SIGNAL | NODE | iobm/nUDS.TRST | 9553 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
 
 SRFF_INSTANCE | iobm/nUDS.REG | iobm/nUDS | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/nUDS.D | 9670 | ? | 561 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.XOR | 0 | 7 | ALU_F
+NODE | iobm/nUDS.D | 9549 | ? | 549 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/nUDS.Q | 9675 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.REG | 0 | 8 | SRFF_Q
+NODE | iobm/nUDS.Q | 9554 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 BUF_INSTANCE | iobm/nUDS.BUFOE | iobm/nUDS | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
-SIGNAL | NODE | iobm/nUDS.TRST | 9674 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST
-SPPTERM | 1 | IV_TRUE | cnt/AoutOE
+SIGNAL | NODE | iobm/nUDS.TRST | 9553 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
 OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
-NODE | iobm/nUDS.BUFOE.OUT | 9673 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.BUFOE | 0 | 10 | BUF_OUT
+NODE | iobm/nUDS.BUFOE.OUT | 9552 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.BUFOE | 0 | 10 | BUF_OUT
+
+MACROCELL_INSTANCE | PrldLow+PinTrst+OptxMapped+Ce | iobm/nASout | WarpSE_COPY_0_COPY_0 | 2424325120 | 5 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | iobm/nASout | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
+NODE | iobm/nASout$OE | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE
+
+SIGNAL_INSTANCE | iobm/nASout.SI | iobm/nASout | 0 | 4 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/nASout.D1 | 9556 | ? | 550 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/nASout.D2 | 9557 | ? | 550 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
+SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
+OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
+SIGNAL | NODE | iobm/nASout.TRST | 9559 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
+
+SRFF_INSTANCE | iobm/nASout.REG | iobm/nASout | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | iobm/nASout.D | 9555 | ? | 550 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | iobm/nASout.Q | 9560 | ? | 0 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.REG | 0 | 8 | SRFF_Q
+TNAME | CLK2X_IOB
+
+BUF_INSTANCE | iobm/nASout.BUFOE | iobm/nASout | 0 | 1 | 1
+INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
+SIGNAL | NODE | iobm/nASout.TRST | 9559 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | cnt/AoutOE
+OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
+NODE | iobm/nASout.BUFOE.OUT | 9558 | ? | 0 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.BUFOE | 0 | 10 | BUF_OUT
 
 INPUT_INSTANCE | 0 | 0 | NULL | nWE_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nWE_FSB | 9633 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nWE_FSB | 9519 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | C8M_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | C8M | 9634 | PI | 466 | 0 | WarpSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE
+NODE | C8M | 9520 | PI | 455 | 0 | WarpSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 
 MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<0> | WarpSE_COPY_0_COPY_0 | 2424313088 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<0>.SI | cnt/LTimer<0> | 0 | 3 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<0>.D1 | 9677 | ? | 469 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<0>.D1 | 9562 | ? | 458 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<0>.D2 | 9678 | ? | 469 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<0>.D2 | 9563 | ? | 458 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_FALSE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<0>.CE | 9679 | ? | 471 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<0>.CE | 9564 | ? | 460 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<0>.REG | cnt/LTimer<0> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<0>.D | 9676 | ? | 469 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<0>.D | 9561 | ? | 458 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<0>.CE | 9679 | ? | 471 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<0>.CE | 9564 | ? | 460 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<0>.Q | 9680 | ? | 496 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<0>.Q | 9565 | ? | 485 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<13> | WarpSE_COPY_0_COPY_0 | 2424312832 | 16 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<11> | 9453 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<12> | 9455 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<13>.SI | cnt/LTimer<13> | 0 | 15 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<11> | 9453 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<12> | 9455 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<13>.D1 | 9682 | ? | 472 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<13>.D1 | 9567 | ? | 461 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<13>.D2 | 9683 | ? | 472 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<13>.D2 | 9568 | ? | 461 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/TimerTC
 SPPTERM | 13 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/LTimer<12>
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<13>.CE | 9684 | ? | 473 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<13>.CE | 9569 | ? | 462 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<13>.REG | cnt/LTimer<13> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<13>.D | 9681 | ? | 472 | 0 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<13>.D | 9566 | ? | 461 | 0 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<13>.CE | 9684 | ? | 473 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<13>.CE | 9569 | ? | 462 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<13>.Q | 9685 | ? | 507 | 0 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<13>.Q | 9570 | ? | 495 | 0 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped+Ce | cnt/LTimer<1> | WarpSE_COPY_0_COPY_0 | 2424308992 | 5 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped+Ce | cnt/LTimer<1> | WarpSE_COPY_0_COPY_0 | 2424308992 | 13 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | cnt/LTimer<1>.EXP | 10095 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.EXP | cnt/LTimer<1> | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | cnt/LTimer<1>.SI | cnt/LTimer<1> | 0 | 4 | 3
+SIGNAL_INSTANCE | cnt/LTimer<1>.SI | cnt/LTimer<1> | 0 | 12 | 4
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<1>.D1 | 9687 | ? | 474 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<1>.D1 | 9572 | ? | 463 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<1>.D2 | 9688 | ? | 474 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<1>.D2 | 9573 | ? | 463 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1>
 SPPTERM | 2 | IV_FALSE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<1>
 SPPTERM | 2 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/TimerTC
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | cnt/LTimer<1>.EXP | 10093 | ? | 559 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<1>.CE | 9689 | ? | 475 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<1>.CE | 9574 | ? | 464 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<1>.REG | cnt/LTimer<1> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<1>.D | 9686 | ? | 474 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<1>.D | 9571 | ? | 463 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<1>.CE | 9689 | ? | 475 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<1>.CE | 9574 | ? | 464 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<1>.Q | 9690 | ? | 496 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<1>.Q | 9575 | ? | 485 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<2> | WarpSE_COPY_0_COPY_0 | 2424312832 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<2>.SI | cnt/LTimer<2> | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<2>.D1 | 9692 | ? | 476 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<2>.D1 | 9577 | ? | 465 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<2>.D2 | 9693 | ? | 476 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<2>.D2 | 9578 | ? | 465 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1>
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_FALSE | cnt/TimerTC
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<2>.CE | 9694 | ? | 477 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<2>.CE | 9579 | ? | 466 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<2>.REG | cnt/LTimer<2> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<2>.D | 9691 | ? | 476 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<2>.D | 9576 | ? | 465 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<2>.CE | 9694 | ? | 477 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<2>.CE | 9579 | ? | 466 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<2>.Q | 9695 | ? | 496 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<2>.Q | 9580 | ? | 485 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<3> | WarpSE_COPY_0_COPY_0 | 2424312832 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<3>.SI | cnt/LTimer<3> | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<3>.D1 | 9697 | ? | 478 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<3>.D1 | 9582 | ? | 467 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<3>.D2 | 9698 | ? | 478 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<3>.D2 | 9583 | ? | 467 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/TimerTC
 SPPTERM | 4 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2>
 SPPTERM | 4 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<3>.CE | 9699 | ? | 479 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<3>.CE | 9584 | ? | 468 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<3>.REG | cnt/LTimer<3> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<3>.D | 9696 | ? | 478 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<3>.D | 9581 | ? | 467 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<3>.CE | 9699 | ? | 479 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<3>.CE | 9584 | ? | 468 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<3>.Q | 9700 | ? | 496 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<3>.Q | 9585 | ? | 485 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<5> | WarpSE_COPY_0_COPY_0 | 2424312832 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<5>.SI | cnt/LTimer<5> | 0 | 8 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<5>.D1 | 9702 | ? | 480 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<5>.D1 | 9587 | ? | 469 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<5>.D2 | 9703 | ? | 480 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<5>.D2 | 9588 | ? | 469 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/TimerTC
 SPPTERM | 6 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4>
 SPPTERM | 6 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<5>.CE | 9704 | ? | 481 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<5>.CE | 9589 | ? | 470 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<5>.REG | cnt/LTimer<5> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<5>.D | 9701 | ? | 480 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<5>.D | 9586 | ? | 469 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<5>.CE | 9704 | ? | 481 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<5>.CE | 9589 | ? | 470 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<5>.Q | 9705 | ? | 496 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<5>.Q | 9590 | ? | 485 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 INPUT_INSTANCE | 0 | 0 | NULL | FCLK_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | FCLK | 9635 | PI | 467 | 0 | WarpSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE
+NODE | FCLK | 9521 | PI | 456 | 0 | WarpSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | FCLK_IBUF/FCLK- | 9445 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
+NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
 
 INPUT_INSTANCE | 0 | 0 | NULL | nAS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nAS_FSB | 9639 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nAS_FSB | 9524 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/Once | WarpSE_COPY_0_COPY_0 | 2155877376 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9459 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF$BUF0.EXP | 10137 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP29_.EXP | 10149 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 3 | 3
+SIGNAL_INSTANCE | iobs/Once.SI | iobs/Once | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9459 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF$BUF0.EXP | 10137 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP29_.EXP | 10149 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cs/nOverlay1.D1 | 9707 | ? | 510 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/Once.D1 | 9592 | ? | 499 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cs/nOverlay1.D2 | 9708 | ? | 510 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cs/nOverlay0
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cs/nOverlay1.CE | 9709 | ? | 512 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-
-SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cs/nOverlay1.D | 9706 | ? | 510 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cs/nOverlay1.CE | 9709 | ? | 512 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cs/nOverlay1.Q | 9710 | ? | 551 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Once | WarpSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP27_.EXP | 10270 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP28_.EXP | 10271 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/Once.SI | iobs/Once | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP27_.EXP | 10270 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP28_.EXP | 10271 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Once.D1 | 9712 | ? | 513 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Once.D2 | 9713 | ? | 513 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP27_.EXP
-SPPTERM | 1 | IV_TRUE | EXP28_.EXP
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2
-SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1
+SIGNAL | NODE | iobs/Once.D2 | 9593 | ? | 499 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP
+SPPTERM | 1 | IV_TRUE | EXP29_.EXP
+SPPTERM | 3 | IV_TRUE | iobs/Once | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | iobs/Once.REG | iobs/Once | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Once.D | 9711 | ? | 513 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F
+NODE | iobs/Once.D | 9591 | ? | 499 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Once.Q | 9714 | ? | 550 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q
+NODE | iobs/Once.Q | 9594 | ? | 539 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<4> | WarpSE_COPY_0_COPY_0 | 2424312832 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<4>.SI | cnt/LTimer<4> | 0 | 7 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<4>.D1 | 9716 | ? | 482 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<4>.D1 | 9596 | ? | 471 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<4>.D2 | 9717 | ? | 482 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<4>.D2 | 9597 | ? | 471 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/TimerTC
 SPPTERM | 5 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3>
 SPPTERM | 5 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<4>.CE | 9718 | ? | 483 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<4>.CE | 9598 | ? | 472 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<4>.REG | cnt/LTimer<4> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<4>.D | 9715 | ? | 482 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<4>.D | 9595 | ? | 471 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<4>.CE | 9718 | ? | 483 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<4>.CE | 9598 | ? | 472 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<4>.Q | 9719 | ? | 496 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<4>.Q | 9599 | ? | 485 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<6> | WarpSE_COPY_0_COPY_0 | 2424312832 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<6>.SI | cnt/LTimer<6> | 0 | 9 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<6>.D1 | 9721 | ? | 484 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<6>.D1 | 9601 | ? | 473 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<6>.D2 | 9722 | ? | 484 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<6>.D2 | 9602 | ? | 473 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/TimerTC
 SPPTERM | 7 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4>
 SPPTERM | 7 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<6>.CE | 9723 | ? | 485 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<6>.CE | 9603 | ? | 474 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<6>.REG | cnt/LTimer<6> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<6>.D | 9720 | ? | 484 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<6>.D | 9600 | ? | 473 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<6>.CE | 9723 | ? | 485 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<6>.CE | 9603 | ? | 474 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<6>.Q | 9724 | ? | 496 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<6>.Q | 9604 | ? | 485 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<7> | WarpSE_COPY_0_COPY_0 | 2424312832 | 16 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cnt/LTimer<7>.EXP | 10246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT
+NODE | cnt/LTimer<7>.EXP | 10122 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | cnt/LTimer<7>.SI | cnt/LTimer<7> | 0 | 15 | 4
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<7>.D1 | 9726 | ? | 486 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<7>.D1 | 9606 | ? | 475 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<7>.D2 | 9727 | ? | 486 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<7>.D2 | 9607 | ? | 475 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/TimerTC
 SPPTERM | 8 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6>
 SPPTERM | 8 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cnt/LTimer<7>.EXP | 10244 | ? | 0 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | cnt/LTimer<7>.EXP | 10120 | ? | 0 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 5 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/RASEL
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<7>.CE | 9728 | ? | 487 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<7>.CE | 9608 | ? | 476 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<7>.REG | cnt/LTimer<7> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<7>.D | 9725 | ? | 486 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<7>.D | 9605 | ? | 475 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<7>.CE | 9728 | ? | 487 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<7>.CE | 9608 | ? | 476 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<7>.Q | 9729 | ? | 496 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<7>.Q | 9609 | ? | 485 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<9> | WarpSE_COPY_0_COPY_0 | 2424312832 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<9>.SI | cnt/LTimer<9> | 0 | 12 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<9>.D1 | 9731 | ? | 488 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<9>.D1 | 9611 | ? | 477 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<9>.D2 | 9732 | ? | 488 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<9>.D2 | 9612 | ? | 477 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/TimerTC
 SPPTERM | 10 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8>
 SPPTERM | 10 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<9>.CE | 9733 | ? | 489 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<9>.CE | 9613 | ? | 478 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<9>.REG | cnt/LTimer<9> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<9>.D | 9730 | ? | 488 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<9>.D | 9610 | ? | 477 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<9>.CE | 9733 | ? | 489 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<9>.CE | 9613 | ? | 478 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<9>.Q | 9734 | ? | 496 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<9>.Q | 9614 | ? | 485 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
+MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 3 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cs/nOverlay1.D1 | 9616 | ? | 501 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cs/nOverlay1.D2 | 9617 | ? | 501 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | cs/nOverlay0
+OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cs/nOverlay1.CE | 9618 | ? | 502 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+
+SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | cs/nOverlay1.D | 9615 | ? | 501 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
+SIGNAL | NODE | cs/nOverlay1.CE | 9618 | ? | 502 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | cs/nOverlay1.Q | 9619 | ? | 540 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<10> | WarpSE_COPY_0_COPY_0 | 2424312832 | 14 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<10>.SI | cnt/LTimer<10> | 0 | 13 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<10>.D1 | 9736 | ? | 490 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<10>.D1 | 9621 | ? | 479 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<10>.D2 | 9737 | ? | 490 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<10>.D2 | 9622 | ? | 479 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/TimerTC
 SPPTERM | 11 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<8>
 SPPTERM | 11 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<10>.CE | 9738 | ? | 491 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<10>.CE | 9623 | ? | 480 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<10>.REG | cnt/LTimer<10> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<10>.D | 9735 | ? | 490 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<10>.D | 9620 | ? | 479 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<10>.CE | 9738 | ? | 491 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<10>.CE | 9623 | ? | 480 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<10>.Q | 9739 | ? | 496 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<10>.Q | 9624 | ? | 485 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<11> | WarpSE_COPY_0_COPY_0 | 2424312832 | 15 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<11> | 9453 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<11> | 9453 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<11>.SI | cnt/LTimer<11> | 0 | 14 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<11> | 9453 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<11>.D1 | 9741 | ? | 492 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<11>.D1 | 9626 | ? | 481 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<11>.D2 | 9742 | ? | 492 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<11>.D2 | 9627 | ? | 481 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/TimerTC
 SPPTERM | 12 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<8>
 SPPTERM | 12 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<11>.CE | 9743 | ? | 493 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<11>.CE | 9628 | ? | 482 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<11>.REG | cnt/LTimer<11> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<11>.D | 9740 | ? | 492 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<11>.D | 9625 | ? | 481 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<11>.CE | 9743 | ? | 493 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<11>.CE | 9628 | ? | 482 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<11>.Q | 9744 | ? | 496 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<11>.Q | 9629 | ? | 485 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<8> | WarpSE_COPY_0_COPY_0 | 2424312832 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<8>.SI | cnt/LTimer<8> | 0 | 11 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<8>.D1 | 9746 | ? | 494 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<8>.D1 | 9631 | ? | 483 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<8>.D2 | 9747 | ? | 494 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<8>.D2 | 9632 | ? | 483 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/TimerTC
 SPPTERM | 9 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7>
 SPPTERM | 9 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<8>.CE | 9748 | ? | 495 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<8>.CE | 9633 | ? | 484 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<8>.REG | cnt/LTimer<8> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<8>.D | 9745 | ? | 494 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<8>.D | 9630 | ? | 483 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<8>.CE | 9748 | ? | 495 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<8>.CE | 9633 | ? | 484 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<8>.Q | 9749 | ? | 496 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<8>.Q | 9634 | ? | 485 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<12> | WarpSE_COPY_0_COPY_0 | 2424312832 | 16 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<12> | 9455 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<11> | 9453 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/LTimer<12> | 9455 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/LTimer<12>.SI | cnt/LTimer<12> | 0 | 15 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<12> | 9455 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<0> | 9438 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<1> | 9440 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<2> | 9441 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<3> | 9442 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<5> | 9443 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<4> | 9448 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<6> | 9449 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7> | 9450 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<9> | 9451 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<10> | 9452 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<11> | 9453 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<8> | 9454 | ? | 496 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/LTimer<12>.D1 | 9751 | ? | 496 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/LTimer<12>.D1 | 9636 | ? | 485 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/LTimer<12>.D2 | 9752 | ? | 496 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/LTimer<12>.D2 | 9637 | ? | 485 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<12> | IV_TRUE | cnt/TimerTC
 SPPTERM | 13 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<8>
 SPPTERM | 13 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cnt/LTimer<12>.CE | 9753 | ? | 497 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<12>.CE | 9638 | ? | 486 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 
 SRFF_INSTANCE | cnt/LTimer<12>.REG | cnt/LTimer<12> | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/LTimer<12>.D | 9750 | ? | 496 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.XOR | 0 | 7 | ALU_F
+NODE | cnt/LTimer<12>.D | 9635 | ? | 485 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cnt/LTimer<12>.CE | 9753 | ? | 497 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cnt/LTimer<12>.CE | 9638 | ? | 486 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | cnt/TimerTC
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/LTimer<12>.Q | 9754 | ? | 496 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/LTimer<12>.Q | 9639 | ? | 485 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IORW0 | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/IORW0 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9468 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | EXP21_.EXP | 10088 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP19_.EXP | 10212 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
+NODE | EXP22_.EXP | 10089 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP20_.EXP | 10213 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobs/IORW0.SI | iobs/IORW0 | 0 | 12 | 2
+SIGNAL_INSTANCE | iobs/IORW0.SI | iobs/IORW0 | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9468 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | EXP21_.EXP | 10088 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP19_.EXP | 10212 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP20_.EXP | 10213 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
+NODE | EXP22_.EXP | 10089 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IORW0.D1 | 9756 | ? | 514 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IORW0.D1 | 9641 | ? | 503 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IORW0.D2 | 9757 | ? | 514 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP19_.EXP
-SPPTERM | 1 | IV_TRUE | EXP20_.EXP
-SPPTERM | 5 | IV_TRUE | iobs/IORW0 | IV_FALSE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1
-SPPTERM | 5 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | iobs/IORW0.D2 | 9642 | ? | 503 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP21_.EXP
+SPPTERM | 1 | IV_TRUE | EXP22_.EXP
+SPPTERM | 2 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/PS_FSM_FFd2
+SPPTERM | 2 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/PS_FSM_FFd1
+SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1
+SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf | IV_TRUE | iobs/ALE1
 
 SRFF_INSTANCE | iobs/IORW0.REG | iobs/IORW0 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IORW0.D | 9755 | ? | 514 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.XOR | 0 | 7 | ALU_F
+NODE | iobs/IORW0.D | 9640 | ? | 503 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IORW0.Q | 9758 | ? | 581 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IORW0.Q | 9643 | ? | 568 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefDone | WarpSE_COPY_0_COPY_0 | 2155873280 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone | 9457 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
+NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReqSync | 9513 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
+NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RefDone | 9457 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
+NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/RefDone.EXP | 10229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT
+NODE | ram/RefDone.EXP | 10108 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | ram/RefDone.SI | ram/RefDone | 0 | 9 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone | 9457 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
+NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReqSync | 9513 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
+NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RefDone.D1 | 9760 | ? | 515 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RefDone.D1 | 9645 | ? | 504 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RefDone.D2 | 9761 | ? | 515 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RefDone.D2 | 9646 | ? | 504 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | ram/RefDone | IV_TRUE | ram/RefReqSync
 SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefReqSync
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/RefDone.EXP | 10217 | ? | 0 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | ram/RefDone.EXP | 10097 | ? | 0 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF
 SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay1
 
 SRFF_INSTANCE | ram/RefDone.REG | ram/RefDone | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RefDone.D | 9759 | ? | 515 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.XOR | 0 | 7 | ALU_F
+NODE | ram/RefDone.D | 9644 | ? | 504 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RefDone.Q | 9762 | ? | 544 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.REG | 0 | 8 | SRFF_Q
+NODE | ram/RefDone.Q | 9647 | ? | 533 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | N01 | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nRES | 9607 | PIPO | 584 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT
+NODE | nRES | 9492 | PIPO | 571 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | N01 | 9458 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
+NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay0 | WarpSE_COPY_0_COPY_0 | 2155877376 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9459 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | N01 | 9458 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
+NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_5_IBUF | 9545 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_5_IBUF | 9429 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cs/nOverlay0 | 9459 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cs/nOverlay0.EXP | 10231 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay0.EXP | 10109 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | cs/nOverlay0.SI | cs/nOverlay0 | 0 | 10 | 4
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9459 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | N01 | 9458 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
+NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_5_IBUF | 9545 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_5_IBUF | 9429 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cs/nOverlay0.D1 | 9764 | ? | 516 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cs/nOverlay0.D1 | 9649 | ? | 505 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cs/nOverlay0.D2 | 9765 | ? | 516 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cs/nOverlay0.D2 | 9650 | ? | 505 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_FALSE | nAS_FSB_IBUF
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_TRUE | fsb/ASrf
 OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
-SIGNAL | NODE | cs/nOverlay0.RSTF | 9766 | ? | 517 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
+SIGNAL | NODE | cs/nOverlay0.RSTF | 9651 | ? | 506 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
 SPPTERM | 1 | IV_FALSE | N01
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cs/nOverlay0.EXP | 10219 | ? | 0 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | cs/nOverlay0.EXP | 10098 | ? | 0 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_5_IBUF
 
 SRFF_INSTANCE | cs/nOverlay0.REG | cs/nOverlay0 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cs/nOverlay0.D | 9763 | ? | 516 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F
+NODE | cs/nOverlay0.D | 9648 | ? | 505 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 3 | 8 | SRFF_R
-SIGNAL | NODE | cs/nOverlay0.RSTF | 9766 | ? | 517 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
+SIGNAL | NODE | cs/nOverlay0.RSTF | 9651 | ? | 506 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
 SPPTERM | 1 | IV_FALSE | N01
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cs/nOverlay0.Q | 9767 | ? | 516 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q
+NODE | cs/nOverlay0.Q | 9652 | ? | 505 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | WarpSE_COPY_0_COPY_0 | 2155873536 | 16 | 2
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | WarpSE_COPY_0_COPY_0 | 2155873536 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1.EXP | 10204 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | fsb/Ready0r.EXP | 10205 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 15 | 3
+SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1.EXP | 10204 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready0r.D1 | 9769 | ? | 518 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/Ready0r.D1 | 9654 | ? | 507 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready0r.D2 | 9770 | ? | 518 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobs/Clear1.EXP
+SIGNAL | NODE | fsb/Ready0r.D2 | 9655 | ? | 507 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | fsb/Ready0r.EXP | 10191 | ? | 526 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
 
 SRFF_INSTANCE | fsb/Ready0r.REG | fsb/Ready0r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready0r.D | 9768 | ? | 518 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F
+NODE | fsb/Ready0r.D | 9653 | ? | 507 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready0r.Q | 9771 | ? | 531 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q
+NODE | fsb/Ready0r.Q | 9656 | ? | 520 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | WarpSE_COPY_0_COPY_0 | 2155873536 | 18 | 2
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/nDTACK.EXP | 10084 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.EXP | 10208 | ? | 519 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | fsb/Ready1r.EXP | 10209 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready1r.EXP | 10085 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 17 | 3
+SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 11 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.EXP | 10208 | ? | 519 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT
+NODE | fsb/nDTACK.EXP | 10084 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready1r.D1 | 9773 | ? | 519 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/Ready1r.D1 | 9658 | ? | 508 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready1r.D2 | 9774 | ? | 519 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | fsb/Ready1r.D2 | 9659 | ? | 508 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | fsb/nDTACK.EXP
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 11 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
+SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
+SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | fsb/Ready1r.EXP | 10195 | ? | 525 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF
+SIGNAL | NODE | fsb/Ready1r.EXP | 10071 | ? | 514 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF
 
 SRFF_INSTANCE | fsb/Ready1r.REG | fsb/Ready1r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready1r.D | 9772 | ? | 519 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F
+NODE | fsb/Ready1r.D | 9657 | ? | 508 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready1r.Q | 9775 | ? | 531 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q
+NODE | fsb/Ready1r.Q | 9660 | ? | 520 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | WarpSE_COPY_0_COPY_0 | 2155873280 | 15 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | WarpSE_COPY_0_COPY_0 | 2155873280 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | EXP14_.EXP | 10078 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | EXP23_.EXP | 10091 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP14_.EXP | 10202 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP15_.EXP | 10203 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 14 | 2
+SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | EXP14_.EXP | 10078 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP14_.EXP | 10202 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP15_.EXP | 10203 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
+NODE | EXP23_.EXP | 10091 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/VPA.D1 | 9777 | ? | 520 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/VPA.D1 | 9662 | ? | 509 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/VPA.D2 | 9778 | ? | 520 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | fsb/VPA.D2 | 9663 | ? | 509 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | EXP14_.EXP
-SPPTERM | 1 | IV_TRUE | EXP15_.EXP
+SPPTERM | 1 | IV_TRUE | EXP23_.EXP
 SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
 SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
 
 SRFF_INSTANCE | fsb/VPA.REG | fsb/VPA | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/VPA.D | 9776 | ? | 520 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F
+NODE | fsb/VPA.D | 9661 | ? | 509 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/VPA.Q | 9779 | ? | 520 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q
+NODE | fsb/VPA.Q | 9664 | ? | 509 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-INPUT_INSTANCE | 0 | 0 | NULL | nBG_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nBG_IOB | 9636 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nBG_IOB_IBUF | 9463 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BG | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBG_IOB_IBUF | 9463 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nASr | 9536 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASr.Q | iobm/nASr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/BG | 9464 | ? | 564 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BG.Q | iobm/BG | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/BG.SI | iobm/BG | 0 | 2 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBG_IOB_IBUF | 9463 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nASr | 9536 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASr.Q | iobm/nASr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/BG.D1 | 9781 | ? | 562 | 4096 | iobm/BG | NULL | NULL | iobm/BG.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/BG.D2 | 9782 | ? | 562 | 4096 | iobm/BG | NULL | NULL | iobm/BG.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nBG_IOB_IBUF
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobm/BG.CE | 9783 | ? | 563 | 4096 | iobm/BG | NULL | NULL | iobm/BG.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 1 | IV_TRUE | iobm/nASr
-
-SRFF_INSTANCE | iobm/BG.REG | iobm/BG | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/BG.D | 9780 | ? | 562 | 0 | iobm/BG | NULL | NULL | iobm/BG.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobm/BG.CE | 9783 | ? | 563 | 4096 | iobm/BG | NULL | NULL | iobm/BG.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 1 | IV_TRUE | iobm/nASr
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/BG.Q | 9784 | ? | 564 | 0 | iobm/BG | NULL | NULL | iobm/BG.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
 INPUT_INSTANCE | 0 | 0 | NULL | nLDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nLDS_FSB | 9637 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nLDS_FSB | 9522 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nLDS_FSB_IBUF | 9466 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL1 | 9467 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
+NODE | iobs/IOL1 | 9354 | ? | 510 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9466 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOL0 | 9465 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM
+NODE | iobs/IOL0 | 9352 | ? | 547 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOL0.SI | iobs/IOL0 | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL1 | 9467 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
+NODE | iobs/IOL1 | 9354 | ? | 510 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9466 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOL0.D1 | 9786 | ? | 521 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOL0.D1 | 9666 | ? | 510 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOL0.D2 | 9787 | ? | 521 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOL0.D2 | 9667 | ? | 510 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | nLDS_FSB_IBUF | IV_TRUE | iobs/ALE1
 SPPTERM | 2 | IV_TRUE | iobs/IOL1 | IV_FALSE | iobs/ALE1
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOL0.CE | 9788 | ? | 522 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOL0.CE | 9668 | ? | 511 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | iobs/IOL0.REG | iobs/IOL0 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOL0.D | 9785 | ? | 521 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOL0.D | 9665 | ? | 510 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOL0.CE | 9788 | ? | 522 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOL0.CE | 9668 | ? | 511 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOL0.Q | 9789 | ? | 560 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOL0.Q | 9669 | ? | 547 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9466 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9508 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOL1 | 9467 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
+NODE | iobs/IOL1 | 9354 | ? | 510 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOL1.SI | iobs/IOL1 | 0 | 2 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9466 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9508 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOL1.D1 | 9791 | ? | 523 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOL1.D1 | 9671 | ? | 512 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOL1.D2 | 9792 | ? | 523 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOL1.D2 | 9672 | ? | 512 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nLDS_FSB_IBUF
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOL1.CE | 9793 | ? | 524 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOL1.CE | 9673 | ? | 513 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 
 SRFF_INSTANCE | iobs/IOL1.REG | iobs/IOL1 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOL1.D | 9790 | ? | 523 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOL1.D | 9670 | ? | 512 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOL1.CE | 9793 | ? | 524 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOL1.CE | 9673 | ? | 513 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOL1.Q | 9794 | ? | 521 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOL1.Q | 9674 | ? | 510 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | WarpSE_COPY_0_COPY_0 | 2155877632 | 10 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | WarpSE_COPY_0_COPY_0 | 2155877632 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9468 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | EXP19_.EXP | 10086 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP17_.EXP | 10210 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
+NODE | EXP20_.EXP | 10087 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP18_.EXP | 10211 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IORW1 | 9468 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 9 | 2
+SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9468 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | EXP19_.EXP | 10086 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP17_.EXP | 10210 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP18_.EXP | 10211 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
+NODE | EXP20_.EXP | 10087 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IORW1.D1 | 9796 | ? | 525 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IORW1.D1 | 9676 | ? | 514 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IORW1.D2 | 9797 | ? | 525 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IORW1.D2 | 9677 | ? | 514 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/Once
 SPPTERM | 1 | IV_FALSE | iobs/ALE1
-SPPTERM | 1 | IV_TRUE | EXP17_.EXP
-SPPTERM | 1 | IV_TRUE | EXP18_.EXP
-SPPTERM | 2 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 1 | IV_TRUE | EXP19_.EXP
+SPPTERM | 1 | IV_TRUE | EXP20_.EXP
 SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | iobs/IORW1
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/IORW1
+SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1
+SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | iobs/IORW1.REG | iobs/IORW1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IORW1.D | 9795 | ? | 525 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F
+NODE | iobs/IORW1.D | 9675 | ? | 514 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IORW1.Q | 9798 | ? | 525 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IORW1.Q | 9678 | ? | 514 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | WarpSE_COPY_0_COPY_0 | 2155877376 | 23 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | WarpSE_COPY_0_COPY_0 | 2155877376 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.UIM | 9476 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9408 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9409 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9412 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9413 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9414 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r.EXP | 10205 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobs/IOReady.EXP | 10206 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 22 | 3
+SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.UIM | 9476 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9408 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9409 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9412 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9413 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9414 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r.EXP | 10205 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOReady.D1 | 9800 | ? | 526 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOReady.D1 | 9680 | ? | 515 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOReady.D2 | 9801 | ? | 526 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | fsb/Ready0r.EXP
+SIGNAL | NODE | iobs/IOReady.D2 | 9681 | ? | 515 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobs/IOReady | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobs/IOReady.EXP | 10192 | ? | 531 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM
-SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r
-SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady
+SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1
+SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1
+SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
 
 SRFF_INSTANCE | iobs/IOReady.REG | iobs/IOReady | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOReady.D | 9799 | ? | 526 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOReady.D | 9679 | ? | 515 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOReady.Q | 9802 | ? | 531 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOReady.Q | 9682 | ? | 520 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nUDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nUDS_FSB | 9638 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nUDS_FSB | 9523 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nUDS_FSB_IBUF | 9471 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU1 | 9472 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
+NODE | iobs/IOU1 | 9359 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9471 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOU0 | 9470 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM
+NODE | iobs/IOU0 | 9357 | ? | 549 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOU0.SI | iobs/IOU0 | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU1 | 9472 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
+NODE | iobs/IOU1 | 9359 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9471 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOU0.D1 | 9804 | ? | 527 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOU0.D1 | 9684 | ? | 516 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOU0.D2 | 9805 | ? | 527 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOU0.D2 | 9685 | ? | 516 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | nUDS_FSB_IBUF | IV_TRUE | iobs/ALE1
 SPPTERM | 2 | IV_TRUE | iobs/IOU1 | IV_FALSE | iobs/ALE1
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOU0.CE | 9806 | ? | 528 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOU0.CE | 9686 | ? | 517 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | iobs/IOU0.REG | iobs/IOU0 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOU0.D | 9803 | ? | 527 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOU0.D | 9683 | ? | 516 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOU0.CE | 9806 | ? | 528 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOU0.CE | 9686 | ? | 517 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOU0.Q | 9807 | ? | 561 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOU0.Q | 9687 | ? | 549 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9471 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9508 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOU1 | 9472 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
+NODE | iobs/IOU1 | 9359 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOU1.SI | iobs/IOU1 | 0 | 2 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9471 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9508 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOU1.D1 | 9809 | ? | 529 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOU1.D1 | 9689 | ? | 518 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOU1.D2 | 9810 | ? | 529 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOU1.D2 | 9690 | ? | 518 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nUDS_FSB_IBUF
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOU1.CE | 9811 | ? | 530 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOU1.CE | 9691 | ? | 519 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 
 SRFF_INSTANCE | iobs/IOU1.REG | iobs/IOU1 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOU1.D | 9808 | ? | 529 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOU1.D | 9688 | ? | 518 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOU1.CE | 9811 | ? | 530 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOU1.CE | 9691 | ? | 519 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOU1.Q | 9812 | ? | 527 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOU1.Q | 9692 | ? | 516 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nBERR_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nBERR_IOB | 9640 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nBERR_IOB | 9525 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/nDTACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 17 | 3
+MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/nDTACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 20 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.UIM | 9476 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP16_.EXP | 10207 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP18_.EXP | 10083 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | fsb/nDTACK | 9475 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q
+NODE | fsb/nDTACK | 9362 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/nDTACK.UIM | 9476 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | fsb/nDTACK.EXP | 10208 | ? | 519 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT
+NODE | fsb/nDTACK.EXP | 10084 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | fsb/nDTACK.SI | fsb/nDTACK | 0 | 16 | 3
+SIGNAL_INSTANCE | fsb/nDTACK.SI | fsb/nDTACK | 0 | 19 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.UIM | 9476 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP16_.EXP | 10207 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP18_.EXP | 10083 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/nDTACK.D1 | 9814 | ? | 531 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/nDTACK.D1 | 9694 | ? | 520 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/nDTACK.D2 | 9815 | ? | 531 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP16_.EXP
-SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1
-SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1
+SIGNAL | NODE | fsb/nDTACK.D2 | 9695 | ? | 520 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP18_.EXP
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady
+SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1
+SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | fsb/nDTACK.EXP | 10194 | ? | 519 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 11 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1
-SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1
+SIGNAL | NODE | fsb/nDTACK.EXP | 10070 | ? | 508 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1
+SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1
 
 SRFF_INSTANCE | fsb/nDTACK.REG | fsb/nDTACK | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/nDTACK.D | 9813 | ? | 531 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.XOR | 0 | 7 | ALU_F
+NODE | fsb/nDTACK.D | 9693 | ? | 520 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/nDTACK.Q | 9816 | ? | 531 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.REG | 0 | 8 | SRFF_Q
+NODE | fsb/nDTACK.Q | 9696 | ? | 520 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/nBERR_FSB | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 3
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/nBERR_FSB | WarpSE_COPY_0_COPY_0 | 2155877376 | 18 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/nBERR_FSB.UIM | 9478 | ? | 532 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
+NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3.EXP | 10143 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | iobs/nBERR_FSB | 9477 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 0 | 0 | MC_Q
+NODE | iobs/nBERR_FSB | 9364 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/nBERR_FSB.UIM | 9478 | ? | 532 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
+NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobs/nBERR_FSB.EXP | 10267 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT
+NODE | iobs/nBERR_FSB.EXP | 10144 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobs/nBERR_FSB.SI | iobs/nBERR_FSB | 0 | 12 | 3
+SIGNAL_INSTANCE | iobs/nBERR_FSB.SI | iobs/nBERR_FSB | 0 | 17 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/nBERR_FSB.UIM | 9478 | ? | 532 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
+NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3.EXP | 10143 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/nBERR_FSB.D1 | 9818 | ? | 532 | 4096 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/nBERR_FSB.D1 | 9698 | ? | 521 | 4096 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/nBERR_FSB.D2 | 9819 | ? | 532 | 4096 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/nBERR_FSB.D2 | 9699 | ? | 521 | 4096 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd3.EXP
 SPPTERM | 3 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/nBERR_FSB.UIM | IV_FALSE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | iobs/Once | IV_FALSE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_TRUE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobs/nBERR_FSB.EXP | 10255 | ? | 550 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | iobs/nBERR_FSB.EXP | 10131 | ? | 525 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | iobs/nBERR_FSB.REG | iobs/nBERR_FSB | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/nBERR_FSB.D | 9817 | ? | 532 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.XOR | 0 | 7 | ALU_F
+NODE | iobs/nBERR_FSB.D | 9697 | ? | 521 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/nBERR_FSB.Q | 9820 | ? | 532 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.REG | 0 | 8 | SRFF_Q
+NODE | iobs/nBERR_FSB.Q | 9700 | ? | 521 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | cnt/AoutOE | WarpSE_COPY_0_COPY_0 | 2424308736 | 4 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/nBR_IOB | WarpSE_COPY_0_COPY_0 | 2424312832 | 9 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nBR_IOB | 9482 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2.EXP | 10146 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.EXP | iobs/PS_FSM_FFd2 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | cnt/AoutOE$Q | 9479 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 0 | 0 | MC_Q
+NODE | cnt/nBR_IOB$Q | 9366 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/AoutOE.SI | cnt/AoutOE | 0 | 3 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nBR_IOB | 9482 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/AoutOE.D1 | 9822 | ? | 498 | 4096 | cnt/AoutOE | NULL | NULL | cnt/AoutOE.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/AoutOE.D2 | 9823 | ? | 498 | 4096 | cnt/AoutOE | NULL | NULL | cnt/AoutOE.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_FALSE | cnt/nBR_IOB | IV_TRUE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2
-
-SRFF_INSTANCE | cnt/AoutOE.REG | cnt/AoutOE | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/AoutOE.D | 9821 | ? | 498 | 0 | cnt/AoutOE | NULL | NULL | cnt/AoutOE.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/AoutOE.Q | 9824 | ? | 587 | 0 | cnt/AoutOE | NULL | NULL | cnt/AoutOE.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/nBR_IOB | WarpSE_COPY_0_COPY_0 | 2424312832 | 13 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nBR_IOB | 9482 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/IPL2r | 9515 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | cnt/nBR_IOB$Q | 9481 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/nBR_IOB | 9482 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
+NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cnt/nBR_IOB.EXP | 10269 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT
+NODE | cnt/nBR_IOB.EXP | 10147 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | cnt/nBR_IOB.SI | cnt/nBR_IOB | 0 | 12 | 3
+SIGNAL_INSTANCE | cnt/nBR_IOB.SI | cnt/nBR_IOB | 0 | 8 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nBR_IOB | 9482 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/IPL2r | 9515 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2.EXP | 10146 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.EXP | iobs/PS_FSM_FFd2 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/nBR_IOB.D1 | 9826 | ? | 499 | 4096 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/nBR_IOB.D1 | 9702 | ? | 487 | 4096 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/nBR_IOB.D2 | 9827 | ? | 499 | 4096 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | cnt/nBR_IOB | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2
-SPPTERM | 4 | IV_FALSE | cnt/nBR_IOB | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_TRUE | cnt/PORS_FSM_FFd2 | IV_TRUE | cnt/IPL2r
+SIGNAL | NODE | cnt/nBR_IOB.D2 | 9703 | ? | 487 | 4096 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cnt/nBR_IOB.EXP | 10257 | ? | 550 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | cnt/nBR_IOB.EXP | 10134 | ? | 531 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_19_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_17_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_16_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
 
 SRFF_INSTANCE | cnt/nBR_IOB.REG | cnt/nBR_IOB | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/nBR_IOB.D | 9825 | ? | 499 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.XOR | 0 | 7 | ALU_F
+NODE | cnt/nBR_IOB.D | 9701 | ? | 487 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/nBR_IOB.Q | 9828 | ? | 499 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.REG | 0 | 8 | SRFF_Q
+NODE | cnt/nBR_IOB.Q | 9704 | ? | 498 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RASEL | WarpSE_COPY_0_COPY_0 | 2155873536 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nROMCS_OBUF.EXP | 10228 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
+NODE | nROMCS_OBUF.EXP | 10107 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP23_.EXP | 10239 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
+NODE | EXP26_.EXP | 10117 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RASEL.SI | ram/RASEL | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nROMCS_OBUF.EXP | 10228 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
+NODE | nROMCS_OBUF.EXP | 10107 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP23_.EXP | 10239 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
+NODE | EXP26_.EXP | 10117 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RASEL.D1 | 9830 | ? | 533 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RASEL.D1 | 9706 | ? | 522 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RASEL.D2 | 9831 | ? | 533 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RASEL.D2 | 9707 | ? | 522 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | nROMCS_OBUF.EXP
-SPPTERM | 1 | IV_TRUE | EXP23_.EXP
+SPPTERM | 1 | IV_TRUE | EXP26_.EXP
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3
 SPPTERM | 3 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
@@ -2758,276 +2594,260 @@ SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | r
 
 SRFF_INSTANCE | ram/RASEL.REG | ram/RASEL | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RASEL.D | 9829 | ? | 533 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F
+NODE | ram/RASEL.D | 9705 | ? | 522 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RASEL.Q | 9832 | ? | 554 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q
+NODE | ram/RASEL.Q | 9708 | ? | 543 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | E_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | E | 9641 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | E | 9526 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/TimerTC | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/TimerTC.SI | cnt/TimerTC | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/TimerTC.D1 | 9834 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/TimerTC.D1 | 9710 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/TimerTC.D2 | 9835 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/TimerTC.D2 | 9711 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 4 | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> | IV_FALSE | cnt/Timer<0> | IV_TRUE | cnt/Timer<3>
 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
-SIGNAL | NODE | cnt/TimerTC.CLKF | 9836 | ? | 497 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/TimerTC.CLKF | 9712 | ? | 486 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | cnt/TimerTC.REG | cnt/TimerTC | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/TimerTC.D | 9833 | ? | 0 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.XOR | 0 | 7 | ALU_F
+NODE | cnt/TimerTC.D | 9709 | ? | 0 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-SIGNAL | NODE | cnt/TimerTC.CLKF | 9836 | ? | 497 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/TimerTC.CLKF | 9712 | ? | 486 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/TimerTC.Q | 9837 | ? | 497 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.REG | 0 | 8 | SRFF_Q
+NODE | cnt/TimerTC.Q | 9713 | ? | 486 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BG | 9464 | ? | 564 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BG.Q | iobm/BG | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9512 | ? | 576 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BG | 9464 | ? | 564 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BG.Q | iobm/BG | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9512 | ? | 576 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 9839 | ? | 564 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 9715 | ? | 551 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 9840 | ? | 564 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 9716 | ? | 551 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
 SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
-SPPTERM | 5 | IV_FALSE | C8M_IBUF | IV_TRUE | iobm/BG | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOREQr
+SPPTERM | 5 | IV_FALSE | C8M_IBUF | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOREQr | IV_FALSE | cnt/AoutOE
 
 SRFF_INSTANCE | iobm/IOS_FSM_FFd3.REG | iobm/IOS_FSM_FFd3 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd3.D | 9838 | ? | 564 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOS_FSM_FFd3.D | 9714 | ? | 551 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd3.Q | 9841 | ? | 581 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOS_FSM_FFd3.Q | 9717 | ? | 568 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 12 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | nRAMUWE_OBUF.EXP | 10140 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nOE_OBUF.EXP | 10230 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | ram/RS_FSM_FFd1.EXP | 10141 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.EXP | ram/RS_FSM_FFd1 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 11 | 2
+SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nOE_OBUF.EXP | 10230 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nRAMUWE_OBUF.EXP | 10140 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 9843 | ? | 534 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 9719 | ? | 523 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 9844 | ? | 534 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nOE_OBUF.EXP
+SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 9720 | ? | 523 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | nRAMUWE_OBUF.EXP
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2
 SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3
 SPPTERM | 4 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | ram/RS_FSM_FFd1.EXP | 10128 | ? | 527 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3
 
 SRFF_INSTANCE | ram/RS_FSM_FFd1.REG | ram/RS_FSM_FFd1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd1.D | 9842 | ? | 534 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F
+NODE | ram/RS_FSM_FFd1.D | 9718 | ? | 523 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd1.Q | 9845 | ? | 552 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
+NODE | ram/RS_FSM_FFd1.Q | 9721 | ? | 541 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/IOS_FSM_FFd1.SI | iobm/IOS_FSM_FFd1 | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 9847 | ? | 565 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 9723 | ? | 552 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 9848 | ? | 565 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 9724 | ? | 552 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
 SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2
 
 SRFF_INSTANCE | iobm/IOS_FSM_FFd1.REG | iobm/IOS_FSM_FFd1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd1.D | 9846 | ? | 565 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOS_FSM_FFd1.D | 9722 | ? | 552 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd1.Q | 9849 | ? | 588 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOS_FSM_FFd1.Q | 9725 | ? | 574 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9517 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9531 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9532 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/IOS_FSM_FFd2.SI | iobm/IOS_FSM_FFd2 | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9517 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9531 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9532 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 9851 | ? | 566 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 9727 | ? | 553 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 9852 | ? | 566 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 9728 | ? | 553 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
 SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/ETACK
 SPPTERM | 6 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
@@ -3036,61 +2856,61 @@ SPPTERM | 6 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/
 
 SRFF_INSTANCE | iobm/IOS_FSM_FFd2.REG | iobm/IOS_FSM_FFd2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd2.D | 9850 | ? | 566 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOS_FSM_FFd2.D | 9726 | ? | 553 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd2.Q | 9853 | ? | 588 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOS_FSM_FFd2.Q | 9729 | ? | 574 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB | CLK2X_IOB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155873536 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_5_OBUF.EXP | 10234 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_5_OBUF.EXP | 10112 | ? | 524 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RS_FSM_FFd2.SI | ram/RS_FSM_FFd2 | 0 | 9 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_5_OBUF.EXP | 10234 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_5_OBUF.EXP | 10112 | ? | 524 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 9855 | ? | 535 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 9731 | ? | 524 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 9856 | ? | 535 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 9732 | ? | 524 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | RA_5_OBUF.EXP
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2
 SPPTERM | 3 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
@@ -3100,322 +2920,374 @@ SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE |
 
 SRFF_INSTANCE | ram/RS_FSM_FFd2.REG | ram/RS_FSM_FFd2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd2.D | 9854 | ? | 535 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F
+NODE | ram/RS_FSM_FFd2.D | 9730 | ? | 524 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd2.Q | 9857 | ? | 552 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
+NODE | ram/RS_FSM_FFd2.Q | 9733 | ? | 541 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/PS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/PS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAMLWE_OBUF.EXP | 10263 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAMUWE_OBUF.EXP | 10264 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | EXP28_.EXP | 10145 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | iobs/PS_FSM_FFd2.EXP | 10146 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.EXP | iobs/PS_FSM_FFd2 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 11 | 2
+SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 12 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAMLWE_OBUF.EXP | 10263 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAMUWE_OBUF.EXP | 10264 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP28_.EXP | 10145 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 9859 | ? | 536 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 9735 | ? | 525 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 9860 | ? | 536 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nRAMLWE_OBUF.EXP
-SPPTERM | 1 | IV_TRUE | nRAMUWE_OBUF.EXP
-SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
-SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/IOACTr
-SPPTERM | 4 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 9736 | ? | 525 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP28_.EXP
+SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
+SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | iobs/PS_FSM_FFd2.EXP | 10133 | ? | 487 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 3 | IV_TRUE | cnt/nBR_IOB | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2
+SPPTERM | 4 | IV_FALSE | cnt/nBR_IOB | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_TRUE | cnt/PORS_FSM_FFd2 | IV_TRUE | cnt/IPL2r
 
 SRFF_INSTANCE | iobs/PS_FSM_FFd2.REG | iobs/PS_FSM_FFd2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/PS_FSM_FFd2.D | 9858 | ? | 536 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F
+NODE | iobs/PS_FSM_FFd2.D | 9734 | ? | 525 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/PS_FSM_FFd2.Q | 9861 | ? | 550 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
+NODE | iobs/PS_FSM_FFd2.Q | 9737 | ? | 539 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefUrgent | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone | 9457 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
+NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RegUrgentSync | 9549 | ? | 537 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM
+NODE | ram/RegUrgentSync | 9433 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RefUrgent.SI | ram/RefUrgent | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone | 9457 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
+NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RegUrgentSync | 9549 | ? | 537 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM
+NODE | ram/RegUrgentSync | 9433 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RefUrgent.D1 | 9863 | ? | 537 | 4096 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RefUrgent.D1 | 9739 | ? | 526 | 4096 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RefUrgent.D2 | 9864 | ? | 537 | 4096 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RefUrgent.D2 | 9740 | ? | 526 | 4096 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | ram/RefDone | IV_TRUE | ram/RegUrgentSync
 
 SRFF_INSTANCE | ram/RefUrgent.REG | ram/RefUrgent | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RefUrgent.D | 9862 | ? | 537 | 0 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.XOR | 0 | 7 | ALU_F
+NODE | ram/RefUrgent.D | 9738 | ? | 526 | 0 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RefUrgent.Q | 9865 | ? | 551 | 0 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.REG | 0 | 8 | SRFF_Q
+NODE | ram/RefUrgent.Q | 9741 | ? | 540 | 0 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155877632 | 10 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155877632 | 15 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF$BUF0.EXP | 10261 | ? | 538 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP27_.EXP | 10142 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | ram/RS_FSM_FFd3.EXP | 10143 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 9 | 2
+SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 14 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF$BUF0.EXP | 10261 | ? | 538 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP27_.EXP | 10142 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 9867 | ? | 538 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 9743 | ? | 527 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 9868 | ? | 538 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP
-SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3
-SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
+SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 9744 | ? | 527 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP27_.EXP
 SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
 SPPTERM | 5 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | ram/RS_FSM_FFd3.EXP | 10130 | ? | 521 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_TRUE | iobs/Once | IV_FALSE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1
+SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1
+SPPTERM | 7 | IV_TRUE | iobs/Once | IV_TRUE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
 
 SRFF_INSTANCE | ram/RS_FSM_FFd3.REG | ram/RS_FSM_FFd3 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd3.D | 9866 | ? | 538 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F
+NODE | ram/RS_FSM_FFd3.D | 9742 | ? | 527 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd3.Q | 9869 | ? | 551 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
+NODE | ram/RS_FSM_FFd3.Q | 9745 | ? | 540 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobm/ES<0> | WarpSE_COPY_0_COPY_0 | 2155877632 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<0>.SI | iobm/ES<0> | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<0>.D1 | 9871 | ? | 567 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<0>.D1 | 9747 | ? | 554 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<0>.D2 | 9872 | ? | 567 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<0>.D2 | 9748 | ? | 554 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/Er
 SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_FALSE | iobm/Er2
 
 SRFF_INSTANCE | iobm/ES<0>.REG | iobm/ES<0> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<0>.D | 9870 | ? | 567 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<0>.D | 9746 | ? | 554 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<0>.Q | 9873 | ? | 574 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<0>.Q | 9749 | ? | 561 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | iobs/PS_FSM_FFd1.EXP | 10139 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 3 | 2
+SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 7 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 9875 | ? | 539 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 9751 | ? | 528 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 9876 | ? | 539 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 9752 | ? | 528 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | iobs/PS_FSM_FFd1.EXP | 10126 | ? | 0 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN
 
 SRFF_INSTANCE | iobs/PS_FSM_FFd1.REG | iobs/PS_FSM_FFd1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/PS_FSM_FFd1.D | 9874 | ? | 539 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F
+NODE | iobs/PS_FSM_FFd1.D | 9750 | ? | 528 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/PS_FSM_FFd1.Q | 9877 | ? | 550 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/PS_FSM_FFd1.Q | 9753 | ? | 539 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMEN | WarpSE_COPY_0_COPY_0 | 2155873280 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_4_OBUF.EXP | 10232 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_4_OBUF.EXP | 10110 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RAMEN.SI | ram/RAMEN | 0 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_4_OBUF.EXP | 10232 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_4_OBUF.EXP | 10110 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMEN.D1 | 9879 | ? | 540 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RAMEN.D1 | 9755 | ? | 529 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMEN.D2 | 9880 | ? | 540 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RAMEN.D2 | 9756 | ? | 529 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RAMEN
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RAMEN
@@ -3425,265 +3297,265 @@ SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | r
 
 SRFF_INSTANCE | ram/RAMEN.REG | ram/RAMEN | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMEN.D | 9878 | ? | 540 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.XOR | 0 | 7 | ALU_F
+NODE | ram/RAMEN.D | 9754 | ? | 529 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMEN.Q | 9881 | ? | 551 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.REG | 0 | 8 | SRFF_Q
+NODE | ram/RAMEN.Q | 9757 | ? | 540 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/Timer<1> | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/Timer<1>.SI | cnt/Timer<1> | 0 | 4 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/Timer<1>.D1 | 9883 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/Timer<1>.D1 | 9759 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/Timer<1>.D2 | 9884 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/Timer<1>.D2 | 9760 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_FALSE | cnt/TimerTC | IV_TRUE | cnt/Timer<1> | IV_FALSE | cnt/Timer<0>
 SPPTERM | 3 | IV_FALSE | cnt/TimerTC | IV_FALSE | cnt/Timer<1> | IV_TRUE | cnt/Timer<0>
 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
-SIGNAL | NODE | cnt/Timer<1>.CLKF | 9885 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<1>.CLKF | 9761 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | cnt/Timer<1>.REG | cnt/Timer<1> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/Timer<1>.D | 9882 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.XOR | 0 | 7 | ALU_F
+NODE | cnt/Timer<1>.D | 9758 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-SIGNAL | NODE | cnt/Timer<1>.CLKF | 9885 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<1>.CLKF | 9761 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/Timer<1>.Q | 9886 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/Timer<1>.Q | 9762 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/Timer<2> | WarpSE_COPY_0_COPY_0 | 2155877376 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/Timer<2>.SI | cnt/Timer<2> | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/Timer<2>.D1 | 9888 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/Timer<2>.D1 | 9764 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/Timer<2>.D2 | 9889 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/Timer<2>.D2 | 9765 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | cnt/TimerTC | IV_TRUE | cnt/Timer<2>
 SPPTERM | 3 | IV_FALSE | cnt/TimerTC | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<0>
 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
-SIGNAL | NODE | cnt/Timer<2>.CLKF | 9890 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<2>.CLKF | 9766 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | cnt/Timer<2>.REG | cnt/Timer<2> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/Timer<2>.D | 9887 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.XOR | 0 | 7 | ALU_F
+NODE | cnt/Timer<2>.D | 9763 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-SIGNAL | NODE | cnt/Timer<2>.CLKF | 9890 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<2>.CLKF | 9766 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/Timer<2>.Q | 9891 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/Timer<2>.Q | 9767 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<1> | WarpSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<1>.SI | iobm/ES<1> | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<1>.D1 | 9893 | ? | 568 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<1>.D1 | 9769 | ? | 555 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<1>.D2 | 9894 | ? | 568 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<1>.D2 | 9770 | ? | 555 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1>
 SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1>
 SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 
 SRFF_INSTANCE | iobm/ES<1>.REG | iobm/ES<1> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<1>.D | 9892 | ? | 568 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<1>.D | 9768 | ? | 555 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<1>.Q | 9895 | ? | 574 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<1>.Q | 9771 | ? | 561 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/Timer<0> | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/Timer<0>.SI | cnt/Timer<0> | 0 | 3 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/Timer<0>.D1 | 9897 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/Timer<0>.D1 | 9773 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/Timer<0>.D2 | 9898 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/Timer<0>.D2 | 9774 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | cnt/TimerTC | IV_FALSE | cnt/Timer<0>
 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
-SIGNAL | NODE | cnt/Timer<0>.CLKF | 9899 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<0>.CLKF | 9775 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | cnt/Timer<0>.REG | cnt/Timer<0> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/Timer<0>.D | 9896 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.XOR | 0 | 7 | ALU_F
+NODE | cnt/Timer<0>.D | 9772 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-SIGNAL | NODE | cnt/Timer<0>.CLKF | 9899 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<0>.CLKF | 9775 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/Timer<0>.Q | 9900 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/Timer<0>.Q | 9776 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/Timer<3> | WarpSE_COPY_0_COPY_0 | 2155877376 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/Timer<3>.SI | cnt/Timer<3> | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimerTC | 9485 | ? | 497 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
+NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/Timer<3>.D1 | 9902 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/Timer<3>.D1 | 9778 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/Timer<3>.D2 | 9903 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/Timer<3>.D2 | 9779 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | cnt/TimerTC | IV_TRUE | cnt/Timer<3>
 SPPTERM | 4 | IV_FALSE | cnt/TimerTC | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> | IV_TRUE | cnt/Timer<0>
 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
-SIGNAL | NODE | cnt/Timer<3>.CLKF | 9904 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<3>.CLKF | 9780 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | cnt/Timer<3>.REG | cnt/Timer<3> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/Timer<3>.D | 9901 | ? | 0 | 0 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.XOR | 0 | 7 | ALU_F
+NODE | cnt/Timer<3>.D | 9777 | ? | 0 | 0 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-SIGNAL | NODE | cnt/Timer<3>.CLKF | 9904 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/Timer<3>.CLKF | 9780 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/Timer<3>.Q | 9905 | ? | 0 | 0 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/Timer<3>.Q | 9781 | ? | 0 | 0 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<2> | WarpSE_COPY_0_COPY_0 | 2155873536 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<2>.SI | iobm/ES<2> | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<2>.D1 | 9907 | ? | 569 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<2>.D1 | 9783 | ? | 556 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<2>.D2 | 9908 | ? | 569 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<2>.D2 | 9784 | ? | 556 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<2>
 SPPTERM | 2 | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2>
 SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
@@ -3692,102 +3564,102 @@ SPPTERM | 3 | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<
 
 SRFF_INSTANCE | iobm/ES<2>.REG | iobm/ES<2> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<2>.D | 9906 | ? | 569 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<2>.D | 9782 | ? | 556 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<2>.Q | 9909 | ? | 574 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<2>.Q | 9785 | ? | 561 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<3> | WarpSE_COPY_0_COPY_0 | 2155877376 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<3>.SI | iobm/ES<3> | 0 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<3>.D1 | 9911 | ? | 570 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<3>.D1 | 9787 | ? | 557 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<3>.D2 | 9912 | ? | 570 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<3>.D2 | 9788 | ? | 557 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/Er
 SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/Er2
 
 SRFF_INSTANCE | iobm/ES<3>.REG | iobm/ES<3> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<3>.D | 9910 | ? | 570 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<3>.D | 9786 | ? | 557 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<3>.Q | 9913 | ? | 574 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<3>.Q | 9789 | ? | 561 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<4> | WarpSE_COPY_0_COPY_0 | 2155877376 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<4>.SI | iobm/ES<4> | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<4>.D1 | 9915 | ? | 571 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<4>.D1 | 9791 | ? | 558 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<4>.D2 | 9916 | ? | 571 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<4>.D2 | 9792 | ? | 558 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobm/ES<4> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_TRUE | iobm/Er
 SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er2
@@ -3795,341 +3667,352 @@ SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_FALSE | iobm/ES<2
 
 SRFF_INSTANCE | iobm/ES<4>.REG | iobm/ES<4> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<4>.D | 9914 | ? | 571 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<4>.D | 9790 | ? | 558 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<4>.Q | 9917 | ? | 574 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<4>.Q | 9793 | ? | 561 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/PORS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2424312832 | 12 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/PORS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2424312832 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/IPL2r | 9515 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
+NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cnt/PORS_FSM_FFd1.EXP | 10260 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.EXP | cnt/PORS_FSM_FFd1 | 4 | 0 | MC_EXPORT
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | cnt/PORS_FSM_FFd1.SI | cnt/PORS_FSM_FFd1 | 0 | 11 | 3
+SIGNAL_INSTANCE | cnt/PORS_FSM_FFd1.SI | cnt/PORS_FSM_FFd1 | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/IPL2r | 9515 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/PORS_FSM_FFd1.D1 | 9919 | ? | 503 | 4096 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/PORS_FSM_FFd1.D1 | 9795 | ? | 491 | 4096 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/PORS_FSM_FFd1.D2 | 9920 | ? | 503 | 4096 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/PORS_FSM_FFd1.D2 | 9796 | ? | 491 | 4096 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 4 | IV_TRUE | cnt/LTimer<13> | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_TRUE | cnt/PORS_FSM_FFd2 | IV_FALSE | cnt/IPL2r
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cnt/PORS_FSM_FFd1.EXP | 10248 | ? | 513 | 0 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once
 
 SRFF_INSTANCE | cnt/PORS_FSM_FFd1.REG | cnt/PORS_FSM_FFd1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/PORS_FSM_FFd1.D | 9918 | ? | 503 | 0 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.XOR | 0 | 7 | ALU_F
+NODE | cnt/PORS_FSM_FFd1.D | 9794 | ? | 491 | 0 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/PORS_FSM_FFd1.Q | 9921 | ? | 507 | 0 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
+NODE | cnt/PORS_FSM_FFd1.Q | 9797 | ? | 498 | 0 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOACTr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOACT | 9519 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
+NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOACTr.SI | iobs/IOACTr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOACT | 9519 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
+NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOACTr.D1 | 9923 | ? | 541 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOACTr.D1 | 9799 | ? | 530 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOACTr.D2 | 9924 | ? | 541 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOACTr.D2 | 9800 | ? | 530 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobm/IOACT
 
 SRFF_INSTANCE | iobs/IOACTr.REG | iobs/IOACTr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOACTr.D | 9922 | ? | 541 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOACTr.D | 9798 | ? | 530 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOACTr.Q | 9925 | ? | 550 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOACTr.Q | 9801 | ? | 539 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | cnt/PORS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2424308736 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/PORS_FSM_FFd2.SI | cnt/PORS_FSM_FFd2 | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/PORS_FSM_FFd2.D1 | 9927 | ? | 504 | 4096 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/PORS_FSM_FFd2.D1 | 9803 | ? | 492 | 4096 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/PORS_FSM_FFd2.D2 | 9928 | ? | 504 | 4096 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/PORS_FSM_FFd2.D2 | 9804 | ? | 492 | 4096 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | cnt/LTimer<13> | IV_FALSE | cnt/PORS_FSM_FFd1
 SPPTERM | 2 | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/PORS_FSM_FFd2
 
 SRFF_INSTANCE | cnt/PORS_FSM_FFd2.REG | cnt/PORS_FSM_FFd2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/PORS_FSM_FFd2.D | 9926 | ? | 504 | 0 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.XOR | 0 | 7 | ALU_F
+NODE | cnt/PORS_FSM_FFd2.D | 9802 | ? | 492 | 0 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/PORS_FSM_FFd2.Q | 9929 | ? | 507 | 0 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
+NODE | cnt/PORS_FSM_FFd2.Q | 9805 | ? | 498 | 0 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | WarpSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP24_.EXP | 10265 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP25_.EXP | 10266 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
+NODE | cnt/nBR_IOB.EXP | 10147 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | ram/BACTr.EXP | 10148 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Load1 | 9508 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 10 | 2
+SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP24_.EXP | 10265 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP25_.EXP | 10266 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
+NODE | cnt/nBR_IOB.EXP | 10147 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/BACTr.EXP | 10148 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Load1.D1 | 9931 | ? | 542 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/Load1.D1 | 9807 | ? | 531 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Load1.D2 | 9932 | ? | 542 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/Load1.D2 | 9808 | ? | 531 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/Once
 SPPTERM | 1 | IV_FALSE | iobs/ALE1
-SPPTERM | 1 | IV_TRUE | EXP24_.EXP
-SPPTERM | 1 | IV_TRUE | EXP25_.EXP
-SPPTERM | 2 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 1 | IV_TRUE | cnt/nBR_IOB.EXP
+SPPTERM | 1 | IV_TRUE | ram/BACTr.EXP
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | nWE_FSB_IBUF
 
 SRFF_INSTANCE | iobs/Load1.REG | iobs/Load1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Load1.D | 9930 | ? | 542 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F
+NODE | iobs/Load1.D | 9806 | ? | 531 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Load1.Q | 9933 | ? | 555 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/Load1.Q | 9809 | ? | 544 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | WarpSE_COPY_0_COPY_0 | 2155873536 | 3 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | WarpSE_COPY_0_COPY_0 | 2155873536 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | ram/BACTr.EXP | 10148 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 2 | 2
+SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 9 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/BACTr.D1 | 9935 | ? | 543 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/BACTr.D1 | 9811 | ? | 532 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/BACTr.D2 | 9936 | ? | 543 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/BACTr.D2 | 9812 | ? | 532 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | ram/BACTr.EXP | 10135 | ? | 531 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_18_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF
 
 SRFF_INSTANCE | ram/BACTr.REG | ram/BACTr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/BACTr.D | 9934 | ? | 543 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F
+NODE | ram/BACTr.D | 9810 | ? | 532 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/BACTr.Q | 9937 | ? | 551 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q
+NODE | ram/BACTr.Q | 9813 | ? | 540 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefReq | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone | 9457 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
+NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReqSync | 9513 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
+NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RefReq.SI | ram/RefReq | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone | 9457 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
+NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReqSync | 9513 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
+NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RefReq.D1 | 9939 | ? | 544 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RefReq.D1 | 9815 | ? | 533 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RefReq.D2 | 9940 | ? | 544 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RefReq.D2 | 9816 | ? | 533 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | ram/RefDone | IV_TRUE | ram/RefReqSync
 
 SRFF_INSTANCE | ram/RefReq.REG | ram/RefReq | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RefReq.D | 9938 | ? | 544 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.XOR | 0 | 7 | ALU_F
+NODE | ram/RefReq.D | 9814 | ? | 533 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RefReq.Q | 9941 | ? | 551 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.REG | 0 | 8 | SRFF_Q
+NODE | ram/RefReq.Q | 9817 | ? | 540 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOBERR | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 1
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOBERR | WarpSE_COPY_0_COPY_0 | 2155877376 | 14 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9517 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nDinLE.EXP | 10243 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT
+NODE | EXP24_.EXP | 10094 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | cnt/LTimer<1>.EXP | 10095 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.EXP | cnt/LTimer<1> | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobm/IOBERR.SI | iobm/IOBERR | 0 | 12 | 2
+SIGNAL_INSTANCE | iobm/IOBERR.SI | iobm/IOBERR | 0 | 13 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9517 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nDinLE.EXP | 10243 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT
+NODE | EXP24_.EXP | 10094 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/LTimer<1>.EXP | 10095 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.EXP | cnt/LTimer<1> | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOBERR.D1 | 9943 | ? | 572 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOBERR.D1 | 9819 | ? | 559 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOBERR.D2 | 9944 | ? | 572 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobm/nDinLE.EXP
+SIGNAL | NODE | iobm/IOBERR.D2 | 9820 | ? | 559 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP24_.EXP
+SPPTERM | 1 | IV_TRUE | cnt/LTimer<1>.EXP
 SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR
 SPPTERM | 7 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/ETACK
 SPPTERM | 7 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/ETACK
@@ -4138,271 +4021,271 @@ SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS
 
 SRFF_INSTANCE | iobm/IOBERR.REG | iobm/IOBERR | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOBERR.D | 9942 | ? | 572 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOBERR.D | 9818 | ? | 559 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOBERR.Q | 9945 | ? | 572 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOBERR.Q | 9821 | ? | 559 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/IOREQr | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOREQ | 9539 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM
+NODE | iobs/IOREQ | 9423 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOREQr | 9512 | ? | 576 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/IOREQr.SI | iobm/IOREQr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOREQ | 9539 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM
+NODE | iobs/IOREQ | 9423 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOREQr.D1 | 9947 | ? | 573 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOREQr.D1 | 9823 | ? | 560 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOREQr.D2 | 9948 | ? | 573 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/IOREQr.D2 | 9824 | ? | 560 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/IOREQ
 
 SRFF_INSTANCE | iobm/IOREQr.REG | iobm/IOREQr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOREQr.D | 9946 | ? | 573 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOREQr.D | 9822 | ? | 560 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOREQr.Q | 9949 | ? | 576 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOREQr.Q | 9825 | ? | 563 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefReqSync | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefReq | 9520 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM
+NODE | cnt/RefReq | 9405 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RefReqSync | 9513 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
+NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RefReqSync.SI | ram/RefReqSync | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefReq | 9520 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM
+NODE | cnt/RefReq | 9405 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RefReqSync.D1 | 9951 | ? | 545 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RefReqSync.D1 | 9827 | ? | 534 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RefReqSync.D2 | 9952 | ? | 545 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RefReqSync.D2 | 9828 | ? | 534 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | cnt/RefReq
 
 SRFF_INSTANCE | ram/RefReqSync.REG | ram/RefReqSync | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RefReqSync.D | 9950 | ? | 545 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.XOR | 0 | 7 | ALU_F
+NODE | ram/RefReqSync.D | 9826 | ? | 534 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RefReqSync.Q | 9953 | ? | 544 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.REG | 0 | 8 | SRFF_Q
+NODE | ram/RefReqSync.Q | 9829 | ? | 533 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nIPL2_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nIPL2 | 9642 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nIPL2 | 9527 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nIPL2_IBUF | 9514 | ? | 506 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
+NODE | nIPL2_IBUF | 9399 | ? | 494 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | cnt/IPL2r | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nIPL2_IBUF | 9514 | ? | 506 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
+NODE | nIPL2_IBUF | 9399 | ? | 494 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/IPL2r | 9515 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
+NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/IPL2r.SI | cnt/IPL2r | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nIPL2_IBUF | 9514 | ? | 506 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
+NODE | nIPL2_IBUF | 9399 | ? | 494 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/IPL2r.D1 | 9955 | ? | 506 | 4096 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/IPL2r.D1 | 9831 | ? | 494 | 4096 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/IPL2r.D2 | 9956 | ? | 506 | 4096 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/IPL2r.D2 | 9832 | ? | 494 | 4096 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nIPL2_IBUF
 
 SRFF_INSTANCE | cnt/IPL2r.REG | cnt/IPL2r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/IPL2r.D | 9954 | ? | 506 | 0 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.XOR | 0 | 7 | ALU_F
+NODE | cnt/IPL2r.D | 9830 | ? | 494 | 0 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/IPL2r.Q | 9957 | ? | 503 | 0 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.REG | 0 | 8 | SRFF_Q
+NODE | cnt/IPL2r.Q | 9833 | ? | 491 | 0 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | cnt/nRESout | WarpSE_COPY_0_COPY_0 | 2424308736 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nRESout | 9516 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
+NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/nRESout | 9516 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
+NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/nRESout.SI | cnt/nRESout | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<13> | 9439 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
+NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1 | 9505 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd2 | 9507 | ? | 507 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nRESout | 9516 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
+NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/nRESout.D1 | 9959 | ? | 507 | 4096 | cnt/nRESout | NULL | NULL | cnt/nRESout.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/nRESout.D1 | 9835 | ? | 495 | 4096 | cnt/nRESout | NULL | NULL | cnt/nRESout.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/nRESout.D2 | 9960 | ? | 507 | 4096 | cnt/nRESout | NULL | NULL | cnt/nRESout.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/nRESout.D2 | 9836 | ? | 495 | 4096 | cnt/nRESout | NULL | NULL | cnt/nRESout.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2
 SPPTERM | 3 | IV_TRUE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2 | IV_TRUE | cnt/nRESout
 
 SRFF_INSTANCE | cnt/nRESout.REG | cnt/nRESout | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/nRESout.D | 9958 | ? | 507 | 0 | cnt/nRESout | NULL | NULL | cnt/nRESout.XOR | 0 | 7 | ALU_F
+NODE | cnt/nRESout.D | 9834 | ? | 495 | 0 | cnt/nRESout | NULL | NULL | cnt/nRESout.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/nRESout.Q | 9961 | ? | 584 | 0 | cnt/nRESout | NULL | NULL | cnt/nRESout.REG | 0 | 8 | SRFF_Q
+NODE | cnt/nRESout.Q | 9837 | ? | 571 | 0 | cnt/nRESout | NULL | NULL | cnt/nRESout.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nVMA | 9426 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
+NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ETACK | 9517 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nVMA | 9426 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
+NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9494 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9499 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9502 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9503 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9504 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ETACK.D1 | 9963 | ? | 574 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ETACK.D1 | 9839 | ? | 561 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ETACK.D2 | 9964 | ? | 574 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ETACK.D2 | 9840 | ? | 561 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 6 | IV_FALSE | iobm/nVMA | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4>
 
 SRFF_INSTANCE | iobm/ETACK.REG | iobm/ETACK | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ETACK.D | 9962 | ? | 574 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F
+NODE | iobm/ETACK.D | 9838 | ? | 561 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ETACK.Q | 9965 | ? | 575 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ETACK.Q | 9841 | ? | 562 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/Er | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/Er.SI | iobm/Er | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/Er.D1 | 9967 | ? | 508 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/Er.D1 | 9843 | ? | 496 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/Er.D2 | 9968 | ? | 508 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/Er.D2 | 9844 | ? | 496 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | iobm/Er.REG | iobm/Er | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/Er.D | 9966 | ? | 508 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F
+NODE | iobm/Er.D | 9842 | ? | 496 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C8M_IBUF/FCLK- | 9437 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/Er.Q | 9969 | ? | 582 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q
+NODE | iobm/Er.Q | 9845 | ? | 569 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOACT | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9512 | ? | 576 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9517 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nADoutLE0_OBUF.EXP | 10242 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
+NODE | iobm/nDinLE.EXP | 10119 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOACT | 9519 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
+NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/IOACT.SI | iobm/IOACT | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9512 | ? | 576 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9517 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nADoutLE0_OBUF.EXP | 10242 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
+NODE | iobm/nDinLE.EXP | 10119 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOACT.D1 | 9971 | ? | 575 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOACT.D1 | 9847 | ? | 562 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOACT.D2 | 9972 | ? | 575 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nADoutLE0_OBUF.EXP
+SIGNAL | NODE | iobm/IOACT.D2 | 9848 | ? | 562 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | iobm/nDinLE.EXP
 SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
 SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr
 SPPTERM | 4 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/ETACK
@@ -4411,1036 +4294,1052 @@ SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/
 
 SRFF_INSTANCE | iobm/IOACT.REG | iobm/IOACT | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOACT.D | 9970 | ? | 575 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOACT.D | 9846 | ? | 562 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOACT.Q | 9973 | ? | 556 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOACT.Q | 9849 | ? | 545 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/RefReq | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefReq | 9520 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM
+NODE | cnt/RefReq | 9405 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefReq.SI | cnt/RefReq | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefReq.D1 | 9975 | ? | 0 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefReq.D1 | 9851 | ? | 0 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefReq.D2 | 9976 | ? | 0 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefReq.D2 | 9852 | ? | 0 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | cnt/Timer<1> | IV_FALSE | cnt/Timer<3>
 SPPTERM | 2 | IV_TRUE | cnt/Timer<2> | IV_FALSE | cnt/Timer<3>
 SPPTERM | 4 | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> | IV_FALSE | cnt/Timer<0> | IV_TRUE | cnt/Timer<3>
 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
-SIGNAL | NODE | cnt/RefReq.CLKF | 9977 | ? | 545 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/RefReq.CLKF | 9853 | ? | 534 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | cnt/RefReq.REG | cnt/RefReq | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefReq.D | 9974 | ? | 0 | 0 | cnt/RefReq | NULL | NULL | cnt/RefReq.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefReq.D | 9850 | ? | 0 | 0 | cnt/RefReq | NULL | NULL | cnt/RefReq.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-SIGNAL | NODE | cnt/RefReq.CLKF | 9977 | ? | 545 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/RefReq.CLKF | 9853 | ? | 534 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefReq.Q | 9978 | ? | 545 | 0 | cnt/RefReq | NULL | NULL | cnt/RefReq.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefReq.Q | 9854 | ? | 534 | 0 | cnt/RefReq | NULL | NULL | cnt/RefReq.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/RefUrgent | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefUrgent | 9521 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM
+NODE | cnt/RefUrgent | 9406 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefUrgent.SI | cnt/RefUrgent | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<1> | 9497 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<2> | 9498 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<3> | 9501 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/Timer<0> | 9500 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
+NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IBUF | 9484 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
+NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefUrgent.D1 | 9980 | ? | 0 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefUrgent.D1 | 9856 | ? | 0 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefUrgent.D2 | 9981 | ? | 0 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefUrgent.D2 | 9857 | ? | 0 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> | IV_FALSE | cnt/Timer<3>
 SPPTERM | 4 | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> | IV_FALSE | cnt/Timer<0> | IV_TRUE | cnt/Timer<3>
 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
-SIGNAL | NODE | cnt/RefUrgent.CLKF | 9982 | ? | 553 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/RefUrgent.CLKF | 9858 | ? | 542 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 
 SRFF_INSTANCE | cnt/RefUrgent.REG | cnt/RefUrgent | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefUrgent.D | 9979 | ? | 0 | 0 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefUrgent.D | 9855 | ? | 0 | 0 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-SIGNAL | NODE | cnt/RefUrgent.CLKF | 9982 | ? | 553 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 3 | 9 | MC_SI_CLKF
+SIGNAL | NODE | cnt/RefUrgent.CLKF | 9858 | ? | 542 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 3 | 9 | MC_SI_CLKF
 SPPTERM | 1 | IV_TRUE | E_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefUrgent.Q | 9983 | ? | 553 | 0 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefUrgent.Q | 9859 | ? | 542 | 0 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | fsb/ASrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK- | 9445 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
+NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | fsb/ASrf.SI | fsb/ASrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/ASrf.D1 | 9985 | ? | 546 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/ASrf.D1 | 9861 | ? | 535 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/ASrf.D2 | 9986 | ? | 546 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | fsb/ASrf.D2 | 9862 | ? | 535 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nAS_FSB_IBUF
 
 SRFF_INSTANCE | fsb/ASrf.REG | fsb/ASrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/ASrf.D | 9984 | ? | 546 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F
+NODE | fsb/ASrf.D | 9860 | ? | 535 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK- | 9445 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
+NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/ASrf.Q | 9987 | ? | 551 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q
+NODE | fsb/ASrf.Q | 9863 | ? | 540 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ALE0 | WarpSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9512 | ? | 576 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ALE0 | 9523 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM
+NODE | iobm/ALE0 | 9408 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ALE0.SI | iobm/ALE0 | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9512 | ? | 576 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ALE0.D1 | 9989 | ? | 576 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ALE0.D1 | 9865 | ? | 563 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ALE0.D2 | 9990 | ? | 576 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ALE0.D2 | 9866 | ? | 563 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
 SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr
 
 SRFF_INSTANCE | iobm/ALE0.REG | iobm/ALE0 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ALE0.D | 9988 | ? | 576 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.XOR | 0 | 7 | ALU_F
+NODE | iobm/ALE0.D | 9864 | ? | 563 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ALE0.Q | 9991 | ? | 0 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ALE0.Q | 9867 | ? | 0 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/BERRrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/BERRrf.SI | iobm/BERRrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/BERRrf.D1 | 9993 | ? | 577 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/BERRrf.D1 | 9869 | ? | 564 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/BERRrf.D2 | 9994 | ? | 577 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/BERRrf.D2 | 9870 | ? | 564 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF
 
 SRFF_INSTANCE | iobm/BERRrf.REG | iobm/BERRrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/BERRrf.D | 9992 | ? | 577 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F
+NODE | iobm/BERRrf.D | 9868 | ? | 564 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/BERRrf.Q | 9995 | ? | 575 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/BERRrf.Q | 9871 | ? | 562 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BERRrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/BERRrr.SI | iobm/BERRrr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/BERRrr.D1 | 9997 | ? | 578 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/BERRrr.D1 | 9873 | ? | 565 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/BERRrr.D2 | 9998 | ? | 578 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/BERRrr.D2 | 9874 | ? | 565 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF
 
 SRFF_INSTANCE | iobm/BERRrr.REG | iobm/BERRrr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/BERRrr.D | 9996 | ? | 578 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F
+NODE | iobm/BERRrr.D | 9872 | ? | 565 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/BERRrr.Q | 9999 | ? | 575 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/BERRrr.Q | 9875 | ? | 562 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nDTACK_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nDTACK_IOB | 9643 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nDTACK_IOB | 9528 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nDTACK_IOB_IBUF | 9526 | ? | 580 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/DTACKrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9526 | ? | 580 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/DTACKrf.SI | iobm/DTACKrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9526 | ? | 580 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/DTACKrf.D1 | 10001 | ? | 579 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/DTACKrf.D1 | 9877 | ? | 566 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/DTACKrf.D2 | 10002 | ? | 579 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/DTACKrf.D2 | 9878 | ? | 566 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF
 
 SRFF_INSTANCE | iobm/DTACKrf.REG | iobm/DTACKrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/DTACKrf.D | 10000 | ? | 579 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F
+NODE | iobm/DTACKrf.D | 9876 | ? | 566 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/DTACKrf.Q | 10003 | ? | 575 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/DTACKrf.Q | 9879 | ? | 562 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DTACKrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9526 | ? | 580 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/DTACKrr.SI | iobm/DTACKrr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9526 | ? | 580 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/DTACKrr.D1 | 10005 | ? | 580 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/DTACKrr.D1 | 9881 | ? | 567 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/DTACKrr.D2 | 10006 | ? | 580 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/DTACKrr.D2 | 9882 | ? | 567 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF
 
 SRFF_INSTANCE | iobm/DTACKrr.REG | iobm/DTACKrr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/DTACKrr.D | 10004 | ? | 580 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F
+NODE | iobm/DTACKrr.D | 9880 | ? | 567 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/DTACKrr.Q | 10007 | ? | 575 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/DTACKrr.Q | 9883 | ? | 562 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DoutOE | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/DoutOE | 9529 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM
+NODE | iobm/DoutOE | 9414 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/DoutOE.SI | iobm/DoutOE | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/DoutOE.D1 | 10009 | ? | 581 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/DoutOE.D1 | 9885 | ? | 568 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/DoutOE.D2 | 10010 | ? | 581 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/DoutOE.D2 | 9886 | ? | 568 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobs/IORW0 | IV_TRUE | iobm/IOS_FSM_FFd3
 SPPTERM | 2 | IV_TRUE | iobs/IORW0 | IV_TRUE | iobm/IOS_FSM_FFd2
 
 SRFF_INSTANCE | iobm/DoutOE.REG | iobm/DoutOE | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/DoutOE.D | 10008 | ? | 581 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.XOR | 0 | 7 | ALU_F
+NODE | iobm/DoutOE.D | 9884 | ? | 568 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/DoutOE.Q | 10011 | ? | 0 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.REG | 0 | 8 | SRFF_Q
+NODE | iobm/DoutOE.Q | 9887 | ? | 0 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/Er2 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/Er2 | 9530 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/Er2.SI | iobm/Er2 | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9518 | ? | 582 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/Er2.D1 | 10013 | ? | 582 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/Er2.D1 | 9889 | ? | 569 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/Er2.D2 | 10014 | ? | 582 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/Er2.D2 | 9890 | ? | 569 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobm/Er
 
 SRFF_INSTANCE | iobm/Er2.REG | iobm/Er2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/Er2.D | 10012 | ? | 582 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F
+NODE | iobm/Er2.D | 9888 | ? | 569 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/Er2.Q | 10015 | ? | 571 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q
+NODE | iobm/Er2.Q | 9891 | ? | 558 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/RESrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | N01 | 9458 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
+NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/RESrf | 9531 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/RESrf.SI | iobm/RESrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | N01 | 9458 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
+NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/RESrf.D1 | 10017 | ? | 583 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/RESrf.D1 | 9893 | ? | 570 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/RESrf.D2 | 10018 | ? | 583 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/RESrf.D2 | 9894 | ? | 570 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | N01
 
 SRFF_INSTANCE | iobm/RESrf.REG | iobm/RESrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/RESrf.D | 10016 | ? | 583 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F
+NODE | iobm/RESrf.D | 9892 | ? | 570 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/RESrf.Q | 10019 | ? | 575 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/RESrf.Q | 9895 | ? | 562 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/RESrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | N01 | 9458 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
+NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/RESrr | 9532 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/RESrr.SI | iobm/RESrr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | N01 | 9458 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
+NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/RESrr.D1 | 10021 | ? | 584 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/RESrr.D1 | 9897 | ? | 571 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/RESrr.D2 | 10022 | ? | 584 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/RESrr.D2 | 9898 | ? | 571 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | N01
 
 SRFF_INSTANCE | iobm/RESrr.REG | iobm/RESrr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/RESrr.D | 10020 | ? | 584 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F
+NODE | iobm/RESrr.D | 9896 | ? | 571 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/RESrr.Q | 10023 | ? | 575 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/RESrr.Q | 9899 | ? | 562 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nVPA_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nVPA_IOB | 9644 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nVPA_IOB | 9529 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nVPA_IOB_IBUF | 9533 | ? | 586 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/VPArf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9533 | ? | 586 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/VPArf | 9534 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
+NODE | iobm/VPArf | 9419 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/VPArf.SI | iobm/VPArf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9533 | ? | 586 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/VPArf.D1 | 10025 | ? | 585 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/VPArf.D1 | 9901 | ? | 572 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/VPArf.D2 | 10026 | ? | 585 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/VPArf.D2 | 9902 | ? | 572 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF
 
 SRFF_INSTANCE | iobm/VPArf.REG | iobm/VPArf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/VPArf.D | 10024 | ? | 585 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F
+NODE | iobm/VPArf.D | 9900 | ? | 572 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/VPArf.Q | 10027 | ? | 556 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/VPArf.Q | 9903 | ? | 545 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/VPArr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9533 | ? | 586 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/VPArr | 9535 | ? | 556 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
+NODE | iobm/VPArr | 9420 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/VPArr.SI | iobm/VPArr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9533 | ? | 586 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/VPArr.D1 | 10029 | ? | 586 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/VPArr.D1 | 9905 | ? | 573 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/VPArr.D2 | 10030 | ? | 586 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/VPArr.D2 | 9906 | ? | 573 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF
 
 SRFF_INSTANCE | iobm/VPArr.REG | iobm/VPArr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/VPArr.D | 10028 | ? | 586 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F
+NODE | iobm/VPArr.D | 9904 | ? | 573 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
+NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/VPArr.Q | 10031 | ? | 556 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/nASr | WarpSE_COPY_0_COPY_0 | 2155873536 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nASout | 9429 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/nASr | 9536 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASr.Q | iobm/nASr | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/nASr.SI | iobm/nASr | 0 | 2 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/nASout | 9429 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/nASr.D1 | 10033 | ? | 587 | 4096 | iobm/nASr | NULL | NULL | iobm/nASr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/nASr.D2 | 10034 | ? | 587 | 4096 | iobm/nASr | NULL | NULL | iobm/nASr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | iobm/nASout | IV_TRUE | cnt/AoutOE
-
-SRFF_INSTANCE | iobm/nASr.REG | iobm/nASr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/nASr.D | 10032 | ? | 587 | 0 | iobm/nASr | NULL | NULL | iobm/nASr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK | 9423 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/nASr.Q | 10035 | ? | 563 | 0 | iobm/nASr | NULL | NULL | iobm/nASr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/VPArr.Q | 9907 | ? | 545 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/ALE0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/ALE0 | 9537 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM
+NODE | iobs/ALE0 | 9421 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/ALE0.SI | iobs/ALE0 | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/ALE0.D1 | 10037 | ? | 548 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/ALE0.D1 | 9909 | ? | 537 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/ALE0.D2 | 10038 | ? | 548 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/ALE0.D2 | 9910 | ? | 537 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | iobs/ALE0.REG | iobs/ALE0 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/ALE0.D | 10036 | ? | 548 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.XOR | 0 | 7 | ALU_F
+NODE | iobs/ALE0.D | 9908 | ? | 537 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/ALE0.Q | 10039 | ? | 0 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.REG | 0 | 8 | SRFF_Q
+NODE | iobs/ALE0.Q | 9911 | ? | 0 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 2
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Clear1 | 9538 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
+NODE | iobs/Clear1 | 9422 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobs/Clear1.EXP | 10204 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
+NODE | iobs/Clear1.EXP | 10138 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 5 | 3
+SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 4 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Clear1.D1 | 10041 | ? | 549 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/Clear1.D1 | 9913 | ? | 538 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Clear1.D2 | 10042 | ? | 549 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/Clear1.D2 | 9914 | ? | 538 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobs/Clear1.EXP | 10190 | ? | 518 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+SIGNAL | NODE | iobs/Clear1.EXP | 10125 | ? | 0 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF
 
 SRFF_INSTANCE | iobs/Clear1.REG | iobs/Clear1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Clear1.D | 10040 | ? | 549 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F
+NODE | iobs/Clear1.D | 9912 | ? | 538 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Clear1.Q | 10043 | ? | 555 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/Clear1.Q | 9915 | ? | 544 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/IOREQ | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOREQ | WarpSE_COPY_0_COPY_0 | 2155873280 | 24 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP26_.EXP | 10268 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nBR_IOB.EXP | 10269 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP17_.EXP | 10081 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOREQ | 9539 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM
+NODE | iobs/IOREQ | 9423 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | iobs/IOREQ.EXP | 10082 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.EXP | iobs/IOREQ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobs/IOREQ.SI | iobs/IOREQ | 0 | 11 | 2
+SIGNAL_INSTANCE | iobs/IOREQ.SI | iobs/IOREQ | 0 | 23 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9506 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP26_.EXP | 10268 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nBR_IOB.EXP | 10269 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP17_.EXP | 10081 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOREQ.D1 | 10045 | ? | 550 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOREQ.D1 | 9917 | ? | 539 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOREQ.D2 | 10046 | ? | 550 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP26_.EXP
-SPPTERM | 1 | IV_TRUE | cnt/nBR_IOB.EXP
-SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
-SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | iobs/IOREQ.D2 | 9918 | ? | 539 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP17_.EXP
+SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr
+SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | iobs/IOREQ.EXP | 10068 | ? | 520 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r
+SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady
 
 SRFF_INSTANCE | iobs/IOREQ.REG | iobs/IOREQ | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOREQ.D | 10044 | ? | 550 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOREQ.D | 9916 | ? | 539 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOREQ.Q | 10047 | ? | 573 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOREQ.Q | 9919 | ? | 560 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMReady | WarpSE_COPY_0_COPY_0 | 2155873280 | 14 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP22_.EXP | 10237 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
+NODE | EXP25_.EXP | 10115 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/RAMReady.EXP | 10238 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT
+NODE | ram/RAMReady.EXP | 10116 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | ram/RAMReady.SI | ram/RAMReady | 0 | 13 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP22_.EXP | 10237 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
+NODE | EXP25_.EXP | 10115 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMReady.D1 | 10049 | ? | 551 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RAMReady.D1 | 9921 | ? | 540 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMReady.D2 | 10050 | ? | 551 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP22_.EXP
+SIGNAL | NODE | ram/RAMReady.D2 | 9922 | ? | 540 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP25_.EXP
 SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3
 SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr
 SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/RAMReady.EXP | 10226 | ? | 533 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | ram/RAMReady.EXP | 10105 | ? | 522 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN
 SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | ram/RAMReady.REG | ram/RAMReady | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMReady.D | 10048 | ? | 551 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F
+NODE | ram/RAMReady.D | 9920 | ? | 540 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMReady.Q | 10051 | ? | 531 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q
+NODE | ram/RAMReady.Q | 9923 | ? | 520 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_1_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<1> | 9645 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<1> | 9530 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_1_IBUF | 9541 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_1_IBUF | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_2_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<2> | 9646 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<2> | 9531 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_2_IBUF | 9542 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_2_IBUF | 9426 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_3_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<3> | 9647 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<3> | 9532 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_3_IBUF | 9543 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_3_IBUF | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_4_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<4> | 9648 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<4> | 9533 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_4_IBUF | 9544 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_4_IBUF | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_5_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<5> | 9649 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<5> | 9534 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_5_IBUF | 9545 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_5_IBUF | 9429 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_6_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<6> | 9650 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<6> | 9535 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_6_IBUF | 9546 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_6_IBUF | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_7_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<7> | 9651 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<7> | 9536 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_7_IBUF | 9547 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_7_IBUF | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefRAS | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RefRAS | 9548 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM
+NODE | ram/RefRAS | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RefRAS.SI | ram/RefRAS | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RefRAS.D1 | 10053 | ? | 552 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RefRAS.D1 | 9925 | ? | 541 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RefRAS.D2 | 10054 | ? | 552 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RefRAS.D2 | 9926 | ? | 541 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2
 
 SRFF_INSTANCE | ram/RefRAS.REG | ram/RefRAS | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RefRAS.D | 10052 | ? | 552 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.XOR | 0 | 7 | ALU_F
+NODE | ram/RefRAS.D | 9924 | ? | 541 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RefRAS.Q | 10055 | ? | 0 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.REG | 0 | 8 | SRFF_Q
+NODE | ram/RefRAS.Q | 9927 | ? | 0 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RegUrgentSync | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefUrgent | 9521 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM
+NODE | cnt/RefUrgent | 9406 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RegUrgentSync | 9549 | ? | 537 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM
+NODE | ram/RegUrgentSync | 9433 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RegUrgentSync.SI | ram/RegUrgentSync | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefUrgent | 9521 | ? | 553 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM
+NODE | cnt/RefUrgent | 9406 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RegUrgentSync.D1 | 10057 | ? | 553 | 4096 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RegUrgentSync.D1 | 9929 | ? | 542 | 4096 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RegUrgentSync.D2 | 10058 | ? | 553 | 4096 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RegUrgentSync.D2 | 9930 | ? | 542 | 4096 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | cnt/RefUrgent
 
 SRFF_INSTANCE | ram/RegUrgentSync.REG | ram/RegUrgentSync | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RegUrgentSync.D | 10056 | ? | 553 | 0 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.XOR | 0 | 7 | ALU_F
+NODE | ram/RegUrgentSync.D | 9928 | ? | 542 | 0 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RegUrgentSync.Q | 10059 | ? | 537 | 0 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.REG | 0 | 8 | SRFF_Q
+NODE | ram/RegUrgentSync.Q | 9931 | ? | 526 | 0 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | OptxMapped | RA_0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9414 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_1_IBUF | 9541 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_1_IBUF | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_0_OBUF | 9550 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
+NODE | RA_0_OBUF | 9434 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | RA_0_OBUF.SI | RA_0_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9414 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_1_IBUF | 9541 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_1_IBUF | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_0_OBUF.D1 | 10061 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_0_OBUF.D1 | 9933 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_0_OBUF.D2 | 10062 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_0_OBUF.D2 | 9934 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_1_IBUF
 
 SRFF_INSTANCE | RA_0_OBUF.REG | RA_0_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_0_OBUF.D | 10060 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_0_OBUF.D | 9932 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_0_OBUF.Q | 10063 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_0_OBUF.Q | 9935 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_1_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9413 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_2_IBUF | 9542 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_2_IBUF | 9426 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_1_OBUF | 9551 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
+NODE | RA_1_OBUF | 9435 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | RA_1_OBUF.SI | RA_1_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9413 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_2_IBUF | 9542 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_2_IBUF | 9426 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_1_OBUF.D1 | 10065 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_1_OBUF.D1 | 9937 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_1_OBUF.D2 | 10066 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_1_OBUF.D2 | 9938 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_11_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_2_IBUF
 
 SRFF_INSTANCE | RA_1_OBUF.REG | RA_1_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_1_OBUF.D | 10064 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_1_OBUF.D | 9936 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_1_OBUF.Q | 10067 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_1_OBUF.Q | 9939 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_2_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9412 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_3_IBUF | 9543 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_3_IBUF | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_7_IBUF | 9547 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_7_IBUF | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_2_OBUF | 9552 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
+NODE | RA_2_OBUF | 9436 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_2_OBUF.EXP | 10235 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_2_OBUF.EXP | 10113 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | RA_2_OBUF.SI | RA_2_OBUF | 0 | 4 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9412 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_3_IBUF | 9543 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_3_IBUF | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_7_IBUF | 9547 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_7_IBUF | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_2_OBUF.D1 | 10069 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_2_OBUF.D1 | 9941 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_2_OBUF.D2 | 10070 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_2_OBUF.D2 | 9942 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_12_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_3_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_2_OBUF.EXP | 10223 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RA_2_OBUF.EXP | 10102 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_7_IBUF
 
 SRFF_INSTANCE | RA_2_OBUF.REG | RA_2_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_2_OBUF.D | 10068 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_2_OBUF.D | 9940 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_2_OBUF.Q | 10071 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_2_OBUF.Q | 9943 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_3_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 5 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_4_IBUF | 9544 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_4_IBUF | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9409 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_6_IBUF | 9546 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_6_IBUF | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_3_OBUF | 9553 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
+NODE | RA_3_OBUF | 9437 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_3_OBUF.EXP | 10233 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_3_OBUF.EXP | 10111 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | RA_3_OBUF.SI | RA_3_OBUF | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_4_IBUF | 9544 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_4_IBUF | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9409 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_6_IBUF | 9546 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_6_IBUF | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_3_OBUF.D1 | 10073 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_3_OBUF.D1 | 9945 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_3_OBUF.D2 | 10074 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_3_OBUF.D2 | 9946 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_4_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_3_OBUF.EXP | 10221 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RA_3_OBUF.EXP | 10100 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 2 | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_6_IBUF
 
 SRFF_INSTANCE | RA_3_OBUF.REG | RA_3_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_3_OBUF.D | 10072 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_3_OBUF.D | 9944 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_3_OBUF.Q | 10075 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_3_OBUF.Q | 9947 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_4_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0.EXP | 10231 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay0.EXP | 10109 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_4_OBUF | 9554 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
+NODE | RA_4_OBUF | 9438 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_4_OBUF.EXP | 10232 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_4_OBUF.EXP | 10110 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | RA_4_OBUF.SI | RA_4_OBUF | 0 | 11 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0.EXP | 10231 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay0.EXP | 10109 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_4_OBUF.D1 | 10077 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_4_OBUF.D1 | 9949 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_4_OBUF.D2 | 10078 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_4_OBUF.D2 | 9950 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | cs/nOverlay0.EXP
 SPPTERM | 2 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | ram/RASEL
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_4_OBUF.EXP | 10220 | ? | 540 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RA_4_OBUF.EXP | 10099 | ? | 529 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN | IV_TRUE | fsb/ASrf
 SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN
@@ -5448,65 +5347,65 @@ SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_F
 
 SRFF_INSTANCE | RA_4_OBUF.REG | RA_4_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_4_OBUF.D | 10076 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_4_OBUF.D | 9948 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_4_OBUF.Q | 10079 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_4_OBUF.Q | 9951 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_3_OBUF.EXP | 10233 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_3_OBUF.EXP | 10111 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_5_OBUF | 9555 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
+NODE | RA_5_OBUF | 9439 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_5_OBUF.EXP | 10234 | ? | 535 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_5_OBUF.EXP | 10112 | ? | 524 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 10 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_3_OBUF.EXP | 10233 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_3_OBUF.EXP | 10111 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_5_OBUF.D1 | 10081 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_5_OBUF.D1 | 9953 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_5_OBUF.D2 | 10082 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_5_OBUF.D2 | 9954 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | RA_3_OBUF.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_5_OBUF.EXP | 10222 | ? | 535 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RA_5_OBUF.EXP | 10101 | ? | 524 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
@@ -5515,74 +5414,74 @@ SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_F
 
 SRFF_INSTANCE | RA_5_OBUF.REG | RA_5_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_5_OBUF.D | 10080 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_5_OBUF.D | 9952 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_5_OBUF.Q | 10083 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_5_OBUF.Q | 9955 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_2_OBUF.EXP | 10235 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_2_OBUF.EXP | 10113 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_6_OBUF | 9556 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
+NODE | RA_6_OBUF | 9440 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_6_OBUF.EXP | 10236 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_6_OBUF.EXP | 10114 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 12 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_2_OBUF.EXP | 10235 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_2_OBUF.EXP | 10113 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_6_OBUF.D1 | 10085 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_6_OBUF.D1 | 9957 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_6_OBUF.D2 | 10086 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_6_OBUF.D2 | 9958 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | RA_2_OBUF.EXP
 SPPTERM | 2 | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | ram/RASEL
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_6_OBUF.EXP | 10224 | ? | 551 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RA_6_OBUF.EXP | 10103 | ? | 540 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq
 SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq
 SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN
@@ -5590,83 +5489,83 @@ SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_F
 
 SRFF_INSTANCE | RA_6_OBUF.REG | RA_6_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_6_OBUF.D | 10084 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_6_OBUF.D | 9956 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_6_OBUF.Q | 10087 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_6_OBUF.Q | 9959 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_7_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9408 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_7_OBUF | 9557 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
+NODE | RA_7_OBUF | 9441 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | RA_7_OBUF.SI | RA_7_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9408 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_7_OBUF.D1 | 10089 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_7_OBUF.D1 | 9961 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_7_OBUF.D2 | 10090 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_7_OBUF.D2 | 9962 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | A_FSB_17_IBUF | IV_FALSE | ram/RASEL
 
 SRFF_INSTANCE | RA_7_OBUF.REG | RA_7_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_7_OBUF.D | 10088 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_7_OBUF.D | 9960 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_7_OBUF.Q | 10091 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_7_OBUF.Q | 9963 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7>.EXP | 10246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT
+NODE | cnt/LTimer<7>.EXP | 10122 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF$BUF0.EXP | 10247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_21_IBUF$BUF0.EXP | 10123 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_8_OBUF | 9558 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
+NODE | RA_8_OBUF | 9442 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/LTimer<7>.EXP | 10246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT
+NODE | cnt/LTimer<7>.EXP | 10122 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF$BUF0.EXP | 10247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_21_IBUF$BUF0.EXP | 10123 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_8_OBUF.D1 | 10093 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_8_OBUF.D1 | 9965 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_8_OBUF.D2 | 10094 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_8_OBUF.D2 | 9966 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | cnt/LTimer<7>.EXP
 SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF$BUF0.EXP
 SPPTERM | 2 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_18_IBUF
@@ -5677,917 +5576,835 @@ SPPTERM | 3 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | cs
 
 SRFF_INSTANCE | RA_8_OBUF.REG | RA_8_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_8_OBUF.D | 10092 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_8_OBUF.D | 9964 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_8_OBUF.Q | 10095 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_8_OBUF.Q | 9967 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_9_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_9_OBUF | 9559 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
+NODE | RA_9_OBUF | 9443 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | RA_9_OBUF.SI | RA_9_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_9_OBUF.D1 | 10097 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_9_OBUF.D1 | 9969 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_9_OBUF.D2 | 10098 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_9_OBUF.D2 | 9970 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | A_FSB_19_IBUF | IV_FALSE | ram/RASEL
 
 SRFF_INSTANCE | RA_9_OBUF.REG | RA_9_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_9_OBUF.D | 10096 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_9_OBUF.D | 9968 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_9_OBUF.Q | 10099 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_9_OBUF.Q | 9971 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+OptxMapped | nDoutOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | iobm/DoutOE | 9414 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DoutOE | 9529 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDoutOE_OBUF | 9560 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
+NODE | nDoutOE_OBUF | 9444 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | nDoutOE_OBUF.SI | nDoutOE_OBUF | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/AoutOE | 9480 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 1 | 0 | MC_UIM
+NODE | iobm/DoutOE | 9414 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DoutOE | 9529 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDoutOE_OBUF.D1 | 10101 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nDoutOE_OBUF.D1 | 9973 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDoutOE_OBUF.D2 | 10102 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | cnt/AoutOE | IV_TRUE | iobm/DoutOE
+SIGNAL | NODE | nDoutOE_OBUF.D2 | 9974 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_TRUE | iobm/DoutOE | IV_FALSE | cnt/AoutOE
 
 SRFF_INSTANCE | nDoutOE_OBUF.REG | nDoutOE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDoutOE_OBUF.D | 10100 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nDoutOE_OBUF.D | 9972 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDoutOE_OBUF.Q | 10103 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nDoutOE_OBUF.Q | 9975 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 11 | 2
+MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nOE_OBUF | 9561 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nOE_OBUF.EXP | 10230 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nOE_OBUF | 9445 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
 
-SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 11 | 3
+SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nOE_OBUF.D1 | 10105 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nOE_OBUF.D1 | 9977 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nOE_OBUF.D2 | 10106 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nOE_OBUF.D2 | 9978 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nOE_OBUF.EXP | 10218 | ? | 534 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | nOE_OBUF.REG | nOE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nOE_OBUF.D | 10104 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nOE_OBUF.D | 9976 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nOE_OBUF.Q | 10107 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nOE_OBUF.Q | 9979 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 18 | 2
+MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 16 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nROMWE_OBUF | 9562 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
+NODE | nROMWE_OBUF | 9446 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nROMWE_OBUF.EXP | 10214 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nROMWE_OBUF.EXP | 10090 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 18 | 3
+SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 16 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nROMWE_OBUF.D1 | 10109 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nROMWE_OBUF.D1 | 9981 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nROMWE_OBUF.D2 | 10110 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nROMWE_OBUF.D2 | 9982 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nROMWE_OBUF.EXP | 10200 | ? | 514 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 16 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | nROMWE_OBUF.EXP | 10076 | ? | 503 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
 
 SRFF_INSTANCE | nROMWE_OBUF.REG | nROMWE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nROMWE_OBUF.D | 10108 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nROMWE_OBUF.D | 9980 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nROMWE_OBUF.Q | 10111 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nROMWE_OBUF.Q | 9983 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+OptxMapped | nVPA_FSB_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nVPA_FSB_OBUF | 9563 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
+NODE | nVPA_FSB_OBUF | 9447 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | nVPA_FSB_OBUF.SI | nVPA_FSB_OBUF | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 10113 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 9985 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 10114 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 9986 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF
 
 SRFF_INSTANCE | nVPA_FSB_OBUF.REG | nVPA_FSB_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nVPA_FSB_OBUF.D | 10112 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nVPA_FSB_OBUF.D | 9984 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nVPA_FSB_OBUF.Q | 10115 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nVPA_FSB_OBUF.Q | 9987 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/nDinLE | WarpSE_COPY_0_COPY_0 | 2424308736 | 13 | 2
+MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/nDinLE | WarpSE_COPY_0_COPY_0 | 2424308736 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9531 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9532 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | iobm/nDinLE | 9564 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q
+NODE | iobm/nDinLE | 9448 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobm/nDinLE.EXP | 10243 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT
+NODE | iobm/nDinLE.EXP | 10119 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobm/nDinLE.SI | iobm/nDinLE | 0 | 12 | 3
+SIGNAL_INSTANCE | iobm/nDinLE.SI | iobm/nDinLE | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9489 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9474 | ? | 578 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOBERR | 9511 | ? | 572 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9531 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9532 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9524 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9525 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9527 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9528 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/nDinLE.D1 | 10117 | ? | 588 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/nDinLE.D1 | 9989 | ? | 574 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/nDinLE.D2 | 10118 | ? | 588 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/nDinLE.D2 | 9990 | ? | 574 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobm/nDinLE.EXP | 10241 | ? | 572 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
-SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
+SIGNAL | NODE | iobm/nDinLE.EXP | 10118 | ? | 562 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
 
 SRFF_INSTANCE | iobm/nDinLE.REG | iobm/nDinLE | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/nDinLE.D | 10116 | ? | 588 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.XOR | 0 | 7 | ALU_F
+NODE | iobm/nDinLE.D | 9988 | ? | 574 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | C16M_IBUF/FCLK- | 9424 | ? | 587 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
+NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/nDinLE.Q | 10119 | ? | 0 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.REG | 0 | 8 | SRFF_Q
+NODE | iobm/nDinLE.Q | 9991 | ? | 0 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 7 | 2
+MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ALE0 | 9523 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM
+NODE | iobm/ALE0 | 9408 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE0 | 9537 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9531 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9532 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobs/ALE0 | 9421 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nADoutLE0_OBUF | 9565 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nADoutLE0_OBUF.EXP | 10242 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
+NODE | nADoutLE0_OBUF | 9449 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
 
-SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 7 | 3
+SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ALE0 | 9523 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM
+NODE | iobm/ALE0 | 9408 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE0 | 9537 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | C8M_IBUF | 9436 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9486 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9488 | ? | 588 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9531 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9532 | ? | 575 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobs/ALE0 | 9421 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nADoutLE0_OBUF.D1 | 10121 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nADoutLE0_OBUF.D1 | 9993 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nADoutLE0_OBUF.D2 | 10122 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nADoutLE0_OBUF.D2 | 9994 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | iobm/ALE0 | IV_FALSE | iobs/ALE0
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nADoutLE0_OBUF.EXP | 10240 | ? | 575 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
 
 SRFF_INSTANCE | nADoutLE0_OBUF.REG | nADoutLE0_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nADoutLE0_OBUF.D | 10120 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nADoutLE0_OBUF.D | 9992 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nADoutLE0_OBUF.Q | 10123 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nADoutLE0_OBUF.Q | 9995 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | nDinOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDinOE_OBUF | 9566 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
+NODE | nDinOE_OBUF | 9450 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | nDinOE_OBUF.SI | nDinOE_OBUF | 0 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDinOE_OBUF.D1 | 10125 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nDinOE_OBUF.D1 | 9997 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDinOE_OBUF.D2 | 10126 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nDinOE_OBUF.D2 | 9998 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
+SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
+SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
 
 SRFF_INSTANCE | nDinOE_OBUF.REG | nDinOE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDinOE_OBUF.D | 10124 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nDinOE_OBUF.D | 9996 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDinOE_OBUF.Q | 10127 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nDinOE_OBUF.Q | 9999 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 9 | 2
+MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefRAS | 9548 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM
+NODE | ram/RefRAS | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9466 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAS_OBUF | 9567 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nRAS_OBUF.EXP | 10262 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT
+NODE | nRAS_OBUF | 9451 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
 
-SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 9 | 3
+SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefRAS | 9548 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM
+NODE | ram/RefRAS | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9466 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAS_OBUF.D1 | 10129 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nRAS_OBUF.D1 | 10001 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAS_OBUF.D2 | 10130 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nRAS_OBUF.D2 | 10002 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | ram/RefRAS
 SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nRAS_OBUF.EXP | 10250 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 4 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN
 
 SRFF_INSTANCE | nRAS_OBUF.REG | nRAS_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAS_OBUF.D | 10128 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nRAS_OBUF.D | 10000 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAS_OBUF.Q | 10131 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nRAS_OBUF.Q | 10003 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | ram/nCAS | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK- | 9445 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
+NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | ram/nCAS | 9568 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q
+NODE | ram/nCAS | 9452 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | ram/nCAS.SI | ram/nCAS | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/nCAS.D1 | 10133 | ? | 554 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/nCAS.D1 | 10005 | ? | 543 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/nCAS.D2 | 10134 | ? | 554 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/nCAS.D2 | 10006 | ? | 543 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | ram/RASEL
 
 SRFF_INSTANCE | ram/nCAS.REG | ram/nCAS | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/nCAS.D | 10132 | ? | 554 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.XOR | 0 | 7 | ALU_F
+NODE | ram/nCAS.D | 10004 | ? | 543 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK- | 9445 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
+NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/nCAS.Q | 10135 | ? | 0 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.REG | 0 | 8 | SRFF_Q
+NODE | ram/nCAS.Q | 10007 | ? | 0 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | FbkInv+PinTrst+Merge+OptxMapped | N0 | WarpSE_COPY_0_COPY_0 | 2155923456 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nRESout | 9516 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
+NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | N0$Q | 9569 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q
+NODE | N0$Q | 9453 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
-NODE | N0$OE | 9570 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE
+NODE | N0$OE | 9454 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE
 
 SIGNAL_INSTANCE | N0.SI | N0 | 0 | 1 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/nRESout | 9516 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
+NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | N0.D1 | 10137 | ? | 584 | 4096 | N0 | NULL | NULL | N0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | N0.D1 | 10009 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | N0.D2 | 10138 | ? | 584 | 4096 | N0 | NULL | NULL | N0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | N0.D2 | 10010 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
-SIGNAL | NODE | N0.TRST | 10140 | ? | 584 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST
+SIGNAL | NODE | N0.TRST | 10012 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST
 SPPTERM | 1 | IV_FALSE | cnt/nRESout
 
 SRFF_INSTANCE | N0.REG | N0 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | N0.D | 10136 | ? | 584 | 0 | N0 | NULL | NULL | N0.XOR | 0 | 7 | ALU_F
+NODE | N0.D | 10008 | ? | 571 | 0 | N0 | NULL | NULL | N0.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | N0.Q | 10141 | ? | 584 | 0 | N0 | NULL | NULL | N0.REG | 0 | 8 | SRFF_Q
+NODE | N0.Q | 10013 | ? | 571 | 0 | N0 | NULL | NULL | N0.REG | 0 | 8 | SRFF_Q
 
 BUF_INSTANCE | N0.BUFOE | N0 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
-SIGNAL | NODE | N0.TRST | 10140 | ? | 584 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST
+SIGNAL | NODE | N0.TRST | 10012 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST
 SPPTERM | 1 | IV_FALSE | cnt/nRESout
 OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
-NODE | N0.BUFOE.OUT | 10139 | ? | 584 | 0 | N0 | NULL | NULL | N0.BUFOE | 0 | 10 | BUF_OUT
+NODE | N0.BUFOE.OUT | 10011 | ? | 571 | 0 | N0 | NULL | NULL | N0.BUFOE | 0 | 10 | BUF_OUT
 
-MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 8 | 2
+MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 19 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Clear1.EXP | 10138 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | A_FSB_19_IBUF$BUF0 | 9571 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_19_IBUF$BUF0 | 9455 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | A_FSB_19_IBUF$BUF0.EXP | 10261 | ? | 538 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_19_IBUF$BUF0.EXP | 10137 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 8 | 3
+SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 19 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9487 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Clear1.EXP | 10138 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 10143 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 10015 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 10144 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF
+SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 10016 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | iobs/Clear1.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10249 | ? | 538 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf
+SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10124 | ? | 499 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
 
 SRFF_INSTANCE | A_FSB_19_IBUF$BUF0.REG | A_FSB_19_IBUF$BUF0 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | A_FSB_19_IBUF$BUF0.D | 10142 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F
+NODE | A_FSB_19_IBUF$BUF0.D | 10014 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | A_FSB_19_IBUF$BUF0.Q | 10145 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
+NODE | A_FSB_19_IBUF$BUF0.Q | 10017 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | A_FSB_21_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | A_FSB_21_IBUF$BUF0 | 9572 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_21_IBUF$BUF0 | 9456 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | A_FSB_21_IBUF$BUF0.EXP | 10247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_21_IBUF$BUF0.EXP | 10123 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | A_FSB_21_IBUF$BUF0.SI | A_FSB_21_IBUF$BUF0 | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9483 | ? | 554 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 10147 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 10019 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 10148 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 10020 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.EXP | 10245 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | A_FSB_21_IBUF$BUF0.EXP | 10121 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 6 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/RASEL
 
 SRFF_INSTANCE | A_FSB_21_IBUF$BUF0.REG | A_FSB_21_IBUF$BUF0 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | A_FSB_21_IBUF$BUF0.D | 10146 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F
+NODE | A_FSB_21_IBUF$BUF0.D | 10018 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | A_FSB_21_IBUF$BUF0.Q | 10149 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
+NODE | A_FSB_21_IBUF$BUF0.Q | 10021 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | nADoutLE1_OBUF | WarpSE_COPY_0_COPY_0 | 2155873024 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1 | 9538 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
+NODE | iobs/Clear1 | 9422 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9508 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nADoutLE1_OBUF | 9573 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
+NODE | nADoutLE1_OBUF | 9457 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | nADoutLE1_OBUF.SI | nADoutLE1_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1 | 9538 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
+NODE | iobs/Clear1 | 9422 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9508 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nADoutLE1_OBUF.D1 | 10151 | ? | 555 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nADoutLE1_OBUF.D1 | 10023 | ? | 544 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nADoutLE1_OBUF.D2 | 10152 | ? | 555 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nADoutLE1_OBUF.D2 | 10024 | ? | 544 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 SPPTERM | 2 | IV_FALSE | iobs/Clear1 | IV_FALSE | iobs/ALE1
 
 SRFF_INSTANCE | nADoutLE1_OBUF.REG | nADoutLE1_OBUF | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nADoutLE1_OBUF.D | 10150 | ? | 555 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nADoutLE1_OBUF.D | 10022 | ? | 544 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK_IBUF/FCLK | 9444 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
+NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nADoutLE1_OBUF.Q | 10153 | ? | 555 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nADoutLE1_OBUF.Q | 10025 | ? | 544 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 11 | 2
+MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped+Ce | nAoutOE_OBUF | WarpSE_COPY_0_COPY_0 | 2424308480 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAS_OBUF.EXP | 10262 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAMLWE_OBUF | 9575 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nRAMLWE_OBUF.EXP | 10263 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nAoutOE_OBUF | 9459 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 11 | 3
+SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAS_OBUF.EXP | 10262 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAMLWE_OBUF.D1 | 10155 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nAoutOE_OBUF.D1 | 10027 | ? | 498 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAMLWE_OBUF.D2 | 10156 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nRAS_OBUF.EXP
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nRAMLWE_OBUF.EXP | 10251 | ? | 536 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | nAoutOE_OBUF.D2 | 10028 | ? | 498 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 3 | IV_FALSE | cnt/nBR_IOB | IV_TRUE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2
+
+SRFF_INSTANCE | nAoutOE_OBUF.REG | nAoutOE_OBUF | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | nAoutOE_OBUF.D | 10026 | ? | 498 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | nAoutOE_OBUF.Q | 10029 | ? | 551 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_IOB
+
+MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 4 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | nRAMLWE_OBUF | 9461 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
+
+SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 4 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nRAMLWE_OBUF.D1 | 10031 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nRAMLWE_OBUF.D2 | 10032 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 4 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN
 
 SRFF_INSTANCE | nRAMLWE_OBUF.REG | nRAMLWE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAMLWE_OBUF.D | 10154 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nRAMLWE_OBUF.D | 10030 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAMLWE_OBUF.Q | 10157 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nRAMLWE_OBUF.Q | 10033 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 15 | 2
+MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9471 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1.EXP | 10139 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAMUWE_OBUF | 9576 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
+NODE | nRAMUWE_OBUF | 9462 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nRAMUWE_OBUF.EXP | 10264 | ? | 536 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nRAMUWE_OBUF.EXP | 10140 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 15 | 3
+SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 12 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9471 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1.EXP | 10139 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAMUWE_OBUF.D1 | 10159 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nRAMUWE_OBUF.D1 | 10035 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAMUWE_OBUF.D2 | 10160 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 4 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN
+SIGNAL | NODE | nRAMUWE_OBUF.D2 | 10036 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd1.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nRAMUWE_OBUF.EXP | 10252 | ? | 536 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 7 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
+SIGNAL | NODE | nRAMUWE_OBUF.EXP | 10127 | ? | 523 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf
+SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN
+SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | nRAMUWE_OBUF.REG | nRAMUWE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAMUWE_OBUF.D | 10158 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nRAMUWE_OBUF.D | 10034 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAMUWE_OBUF.Q | 10161 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nRAMUWE_OBUF.Q | 10037 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone.EXP | 10229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT
+NODE | ram/RefDone.EXP | 10108 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nROMCS_OBUF | 9577 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
+NODE | nROMCS_OBUF | 9463 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nROMCS_OBUF.EXP | 10228 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
+NODE | nROMCS_OBUF.EXP | 10107 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 12 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMEN | 9496 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefDone.EXP | 10229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT
+NODE | ram/RefDone.EXP | 10108 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nROMCS_OBUF.D1 | 10163 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nROMCS_OBUF.D1 | 10039 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nROMCS_OBUF.D2 | 10164 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nROMCS_OBUF.D2 | 10040 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | ram/RefDone.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nROMCS_OBUF.EXP | 10216 | ? | 533 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | nROMCS_OBUF.EXP | 10096 | ? | 522 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq
 SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq
 SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq
@@ -6596,943 +6413,1075 @@ SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs
 
 SRFF_INSTANCE | nROMCS_OBUF.REG | nROMCS_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nROMCS_OBUF.D | 10162 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nROMCS_OBUF.D | 10038 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nROMCS_OBUF.Q | 10165 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nROMCS_OBUF.Q | 10041 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | N1 | WarpSE_COPY_0_COPY_0 | 2155907072 | 0 | 1
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | N1$Q | 9578 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1.Q | N1 | 0 | 0 | MC_Q
+NODE | N1$Q | 9464 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1.Q | N1 | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | N1.SI | N1 | 0 | 0 | 2
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | N1.D1 | 10167 | ? | 0 | 4096 | N1 | NULL | NULL | N1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | N1.D1 | 10043 | ? | 0 | 4096 | N1 | NULL | NULL | N1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | N1.D2 | 10168 | ? | 0 | 4096 | N1 | NULL | NULL | N1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | N1.D2 | 10044 | ? | 0 | 4096 | N1 | NULL | NULL | N1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 0 | IV_DC
 
 SRFF_INSTANCE | N1.REG | N1 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | N1.D | 10166 | ? | 0 | 0 | N1 | NULL | NULL | N1.XOR | 0 | 7 | ALU_F
+NODE | N1.D | 10042 | ? | 0 | 0 | N1 | NULL | NULL | N1.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | N1.Q | 10169 | ? | 0 | 0 | N1 | NULL | NULL | N1.REG | 0 | 8 | SRFF_Q
+NODE | N1.Q | 10045 | ? | 0 | 0 | N1 | NULL | NULL | N1.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | N1$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 0 | 1
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | N1$BUF0 | 9579 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1$BUF0.Q | N1$BUF0 | 0 | 0 | MC_Q
+NODE | N1$BUF0 | 9465 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1$BUF0.Q | N1$BUF0 | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | N1$BUF0.SI | N1$BUF0 | 0 | 0 | 2
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | N1$BUF0.D1 | 10171 | ? | 0 | 4096 | N1$BUF0 | NULL | NULL | N1$BUF0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | N1$BUF0.D1 | 10047 | ? | 0 | 4096 | N1$BUF0 | NULL | NULL | N1$BUF0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | N1$BUF0.D2 | 10172 | ? | 0 | 6144 | N1$BUF0 | NULL | NULL | N1$BUF0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | N1$BUF0.D2 | 10048 | ? | 0 | 6144 | N1$BUF0 | NULL | NULL | N1$BUF0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 0 | IV_DC
 
 SRFF_INSTANCE | N1$BUF0.REG | N1$BUF0 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | N1$BUF0.D | 10170 | ? | 0 | 0 | N1$BUF0 | NULL | NULL | N1$BUF0.XOR | 0 | 7 | ALU_F
+NODE | N1$BUF0.D | 10046 | ? | 0 | 0 | N1$BUF0 | NULL | NULL | N1$BUF0.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | N1$BUF0.Q | 10173 | ? | 0 | 0 | N1$BUF0 | NULL | NULL | N1$BUF0.REG | 0 | 8 | SRFF_Q
+NODE | N1$BUF0.Q | 10049 | ? | 0 | 0 | N1$BUF0 | NULL | NULL | N1$BUF0.REG | 0 | 8 | SRFF_Q
 
 OUTPUT_INSTANCE | 0 | nVMA_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | iobm/nVMA$Q | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q
+NODE | iobm/nVMA$Q | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q
 INPUT_NODE_TYPE | 2 | 6 | OI_OE
-NODE | iobm/nVMA$OE | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE
+NODE | iobm/nVMA$OE | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nVMA_IOB | 9580 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nAS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | iobm/nASout$Q | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q
-INPUT_NODE_TYPE | 2 | 6 | OI_OE
-NODE | iobm/nASout$OE | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nAS_IOB | 9581 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT
+NODE | nVMA_IOB | 9466 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nLDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | iobm/nLDS | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q
+NODE | iobm/nLDS | 9318 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q
 INPUT_NODE_TYPE | 2 | 6 | OI_OE
-NODE | iobm/nLDS$OE | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE
+NODE | iobm/nLDS$OE | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nLDS_IOB | 9582 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT
+NODE | nLDS_IOB | 9467 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nUDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | iobm/nUDS | 9433 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q
+NODE | iobm/nUDS | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q
 INPUT_NODE_TYPE | 2 | 6 | OI_OE
-NODE | iobm/nUDS$OE | 9434 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE
+NODE | iobm/nUDS$OE | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nUDS_IOB | 9583 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT
+NODE | nUDS_IOB | 9468 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nAS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | iobm/nASout | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q
+INPUT_NODE_TYPE | 2 | 6 | OI_OE
+NODE | iobm/nASout$OE | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nAS_IOB | 9469 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDTACK_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | fsb/nDTACK | 9475 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q
+NODE | fsb/nDTACK | 9362 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDTACK_FSB | 9584 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT
+NODE | nDTACK_FSB | 9470 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nBERR_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | iobs/nBERR_FSB | 9477 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 0 | 0 | MC_Q
+NODE | iobs/nBERR_FSB | 9364 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nBERR_FSB | 9585 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nAoutOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | cnt/AoutOE$Q | 9479 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/AoutOE.Q | cnt/AoutOE | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nAoutOE | 9586 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT
+NODE | nBERR_FSB | 9471 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nBR_IOB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | cnt/nBR_IOB$Q | 9481 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 0 | 0 | MC_Q
+NODE | cnt/nBR_IOB$Q | 9366 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nBR_IOB | 9587 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBR_IOB | 0 | 6 | OI_OUT
+NODE | nBR_IOB | 9472 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBR_IOB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<0> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_0_OBUF | 9550 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
+NODE | RA_0_OBUF | 9434 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<0> | 9588 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT
+NODE | RA<0> | 9473 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<1> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_1_OBUF | 9551 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
+NODE | RA_1_OBUF | 9435 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<1> | 9589 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT
+NODE | RA<1> | 9474 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<2> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_2_OBUF | 9552 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
+NODE | RA_2_OBUF | 9436 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<2> | 9590 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT
+NODE | RA<2> | 9475 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<3> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_3_OBUF | 9553 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
+NODE | RA_3_OBUF | 9437 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<3> | 9591 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT
+NODE | RA<3> | 9476 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<4> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_4_OBUF | 9554 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
+NODE | RA_4_OBUF | 9438 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<4> | 9592 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT
+NODE | RA<4> | 9477 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<5> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_5_OBUF | 9555 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
+NODE | RA_5_OBUF | 9439 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<5> | 9593 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT
+NODE | RA<5> | 9478 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<6> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_6_OBUF | 9556 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
+NODE | RA_6_OBUF | 9440 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<6> | 9594 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT
+NODE | RA<6> | 9479 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<7> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_7_OBUF | 9557 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
+NODE | RA_7_OBUF | 9441 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<7> | 9595 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT
+NODE | RA<7> | 9480 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<8> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_8_OBUF | 9558 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
+NODE | RA_8_OBUF | 9442 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<8> | 9596 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT
+NODE | RA<8> | 9481 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<9> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_9_OBUF | 9559 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
+NODE | RA_9_OBUF | 9443 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<9> | 9597 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT
+NODE | RA<9> | 9482 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDoutOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDoutOE_OBUF | 9560 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
+NODE | nDoutOE_OBUF | 9444 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDoutOE | 9598 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT
+NODE | nDoutOE | 9483 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nOE_OBUF | 9561 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
+NODE | nOE_OBUF | 9445 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nOE | 9599 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT
+NODE | nOE | 9484 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nROMWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nROMWE_OBUF | 9562 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
+NODE | nROMWE_OBUF | 9446 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nROMWE | 9600 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT
+NODE | nROMWE | 9485 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nVPA_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nVPA_FSB_OBUF | 9563 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
+NODE | nVPA_FSB_OBUF | 9447 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nVPA_FSB | 9601 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT
+NODE | nVPA_FSB | 9486 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDinLE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | iobm/nDinLE | 9564 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q
+NODE | iobm/nDinLE | 9448 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDinLE | 9602 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT
+NODE | nDinLE | 9487 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nADoutLE0 | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nADoutLE0_OBUF | 9565 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
+NODE | nADoutLE0_OBUF | 9449 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nADoutLE0 | 9603 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT
+NODE | nADoutLE0 | 9488 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDinOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDinOE_OBUF | 9566 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
+NODE | nDinOE_OBUF | 9450 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDinOE | 9604 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT
+NODE | nDinOE | 9489 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nRAS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAS_OBUF | 9567 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
+NODE | nRAS_OBUF | 9451 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAS | 9605 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT
+NODE | nRAS | 9490 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nCAS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | ram/nCAS | 9568 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q
+NODE | ram/nCAS | 9452 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nCAS | 9606 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT
+NODE | nCAS | 9491 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nRES | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | N0$Q | 9569 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q
+NODE | N0$Q | 9453 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q
 INPUT_NODE_TYPE | 2 | 6 | OI_OE
-NODE | N0$OE | 9570 | ? | 584 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE
+NODE | N0$OE | 9454 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRES | 9607 | PIPO | 584 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT
+NODE | nRES | 9492 | PIPO | 571 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<11> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | A_FSB_19_IBUF$BUF0 | 9571 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_19_IBUF$BUF0 | 9455 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<11> | 9608 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT
+NODE | RA<11> | 9493 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<10> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | A_FSB_21_IBUF$BUF0 | 9572 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_21_IBUF$BUF0 | 9456 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<10> | 9609 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT
+NODE | RA<10> | 9494 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nADoutLE1 | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nADoutLE1_OBUF | 9573 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
+NODE | nADoutLE1_OBUF | 9457 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nADoutLE1 | 9610 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT
+NODE | nADoutLE1 | 9495 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nAoutOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | nAoutOE_OBUF | 9459 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nAoutOE | 9496 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nRAMLWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAMLWE_OBUF | 9575 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
+NODE | nRAMLWE_OBUF | 9461 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAMLWE | 9611 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT
+NODE | nRAMLWE | 9497 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nRAMUWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAMUWE_OBUF | 9576 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
+NODE | nRAMUWE_OBUF | 9462 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAMUWE | 9612 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT
+NODE | nRAMUWE | 9498 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nROMCS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nROMCS_OBUF | 9577 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
+NODE | nROMCS_OBUF | 9463 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nROMCS | 9613 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT
+NODE | nROMCS | 9499 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | C25MEN | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | N1$Q | 9578 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1.Q | N1 | 0 | 0 | MC_Q
+NODE | N1$Q | 9464 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1.Q | N1 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | C25MEN | 9614 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C25MEN | 0 | 6 | OI_OUT
+NODE | C25MEN | 9500 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C25MEN | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | C20MEN | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | N1$BUF0 | 9579 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1$BUF0.Q | N1$BUF0 | 0 | 0 | MC_Q
+NODE | N1$BUF0 | 9465 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1$BUF0.Q | N1$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | C20MEN | 9615 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C20MEN | 0 | 6 | OI_OUT
+NODE | C20MEN | 9501 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C20MEN | 0 | 6 | OI_OUT
 
-MACROCELL_INSTANCE | NULL | EXP14_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 20 | 1
+MACROCELL_INSTANCE | NULL | EXP14_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 25 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP21_.EXP | 10215 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP15_.EXP | 10079 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP14_.EXP | 10202 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
+NODE | EXP14_.EXP | 10078 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 20 | 1
+SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 25 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP21_.EXP | 10215 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP15_.EXP | 10079 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP14_.EXP | 10188 | ? | 520 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP21_.EXP
+SIGNAL | NODE | EXP14_.EXP | 10064 | ? | 509 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | EXP15_.EXP
+SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | iobs/ALE1
+SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
+
+MACROCELL_INSTANCE | NULL | EXP15_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 20 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP15_.EXP | 10079 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 20 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP15_.EXP | 10065 | ? | 509 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r | IV_FALSE | nAS_FSB_IBUF
+SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r | IV_TRUE | fsb/ASrf
+SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady | IV_TRUE | fsb/ASrf
+
+MACROCELL_INSTANCE | NULL | EXP16_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 15 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP16_.EXP | 10080 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 15 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP16_.EXP | 10066 | ? | 539 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+
+MACROCELL_INSTANCE | NULL | EXP17_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP16_.EXP | 10080 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP17_.EXP | 10081 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP16_.EXP | 10080 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP17_.EXP | 10067 | ? | 539 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | EXP16_.EXP
+SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1
+
+MACROCELL_INSTANCE | NULL | EXP18_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOREQ.EXP | 10082 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.EXP | iobs/IOREQ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP18_.EXP | 10083 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 13 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOREQ.EXP | 10082 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.EXP | iobs/IOREQ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP18_.EXP | 10069 | ? | 520 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | iobs/IOREQ.EXP
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady
+
+MACROCELL_INSTANCE | NULL | EXP19_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r.EXP | 10085 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP19_.EXP | 10086 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r.EXP | 10085 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP19_.EXP | 10072 | ? | 514 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | fsb/Ready1r.EXP
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_19_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | nWE_FSB_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
+
+MACROCELL_INSTANCE | NULL | EXP20_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 7 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP20_.EXP | 10087 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 7 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP20_.EXP | 10073 | ? | 514 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_18_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_17_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_16_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF
+
+MACROCELL_INSTANCE | NULL | EXP21_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP21_.EXP | 10088 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 13 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP21_.EXP | 10074 | ? | 503 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_FALSE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1
+SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
+SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
+
+MACROCELL_INSTANCE | NULL | EXP22_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 18 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nROMWE_OBUF.EXP | 10090 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP22_.EXP | 10089 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 18 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nROMWE_OBUF.EXP | 10090 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP22_.EXP | 10075 | ? | 503 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | nROMWE_OBUF.EXP
+SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
+SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
+
+MACROCELL_INSTANCE | NULL | EXP23_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP23_.EXP | 10091 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 12 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP23_.EXP | 10077 | ? | 509 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady
 SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | ram/RAMReady
 SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady
 SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | ram/RAMReady
-SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
 
-MACROCELL_INSTANCE | NULL | EXP15_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 17 | 1
+MACROCELL_INSTANCE | NULL | EXP24_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP15_.EXP | 10203 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
+NODE | EXP24_.EXP | 10094 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 17 | 1
+SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP15_.EXP | 10189 | ? | 520 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf
-SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | iobs/ALE1
+SIGNAL | NODE | EXP24_.EXP | 10092 | ? | 559 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
+SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
+SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
 
-MACROCELL_INSTANCE | NULL | EXP16_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 18 | 1
+MACROCELL_INSTANCE | NULL | EXP25_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.UIM | 9476 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady.EXP | 10206 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT
+NODE | RA_6_OBUF.EXP | 10114 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP16_.EXP | 10207 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
+NODE | EXP25_.EXP | 10115 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 18 | 1
+SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9460 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/nDTACK.UIM | 9476 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9540 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady.EXP | 10206 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT
+NODE | RA_6_OBUF.EXP | 10114 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP16_.EXP | 10193 | ? | 531 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | iobs/IOReady.EXP
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady
-SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM
-SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM
-
-MACROCELL_INSTANCE | NULL | EXP17_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9468 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r.EXP | 10209 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP17_.EXP | 10210 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9468 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r.EXP | 10209 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP17_.EXP | 10196 | ? | 525 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | fsb/Ready1r.EXP
-SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
-
-MACROCELL_INSTANCE | NULL | EXP18_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP18_.EXP | 10211 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP18_.EXP | 10197 | ? | 525 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
-
-MACROCELL_INSTANCE | NULL | EXP19_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP19_.EXP | 10212 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP19_.EXP | 10198 | ? | 514 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
-
-MACROCELL_INSTANCE | NULL | EXP20_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 19 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nROMWE_OBUF.EXP | 10214 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP20_.EXP | 10213 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 19 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW0 | 9456 | ? | 581 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nROMWE_OBUF.EXP | 10214 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP20_.EXP | 10199 | ? | 514 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | nROMWE_OBUF.EXP
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | iobs/IORW0 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1
-
-MACROCELL_INSTANCE | NULL | EXP21_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 24 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9408 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9409 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9412 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9413 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9414 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP21_.EXP | 10215 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 24 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9418 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9461 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9462 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9469 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9522 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9407 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9408 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9409 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9412 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9413 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9414 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9473 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP21_.EXP | 10201 | ? | 520 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | iobs/ALE1
-SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r | IV_TRUE | fsb/ASrf
-SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady | IV_TRUE | fsb/ASrf
-
-MACROCELL_INSTANCE | NULL | EXP22_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_6_OBUF.EXP | 10236 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP22_.EXP | 10237 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_6_OBUF.EXP | 10236 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP22_.EXP | 10225 | ? | 551 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP25_.EXP | 10104 | ? | 540 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 1 | IV_TRUE | RA_6_OBUF.EXP
 SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq
 SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr
@@ -7540,53 +7489,53 @@ SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ra
 SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr
 SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr
 
-MACROCELL_INSTANCE | NULL | EXP23_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
+MACROCELL_INSTANCE | NULL | EXP26_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady.EXP | 10238 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT
+NODE | ram/RAMReady.EXP | 10116 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP23_.EXP | 10239 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
+NODE | EXP26_.EXP | 10117 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 10 | 1
+SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9490 | ? | 552 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefUrgent | 9492 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9493 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9509 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RefReq | 9510 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
+NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady.EXP | 10238 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT
+NODE | ram/RAMReady.EXP | 10116 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP23_.EXP | 10227 | ? | 533 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP26_.EXP | 10106 | ? | 522 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 1 | IV_TRUE | ram/RAMReady.EXP
 SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr
 SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq
@@ -7594,313 +7543,267 @@ SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ra
 SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr
 SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr
 
-MACROCELL_INSTANCE | NULL | EXP24_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 6 | 1
+MACROCELL_INSTANCE | NULL | EXP27_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1.EXP | 10141 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.EXP | ram/RS_FSM_FFd1 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP24_.EXP | 10265 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+NODE | EXP27_.EXP | 10142 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 6 | 1
+SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1.EXP | 10141 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.EXP | ram/RS_FSM_FFd1 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP24_.EXP | 10253 | ? | 542 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF
+SIGNAL | NODE | EXP27_.EXP | 10129 | ? | 527 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd1.EXP
+SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3
+SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf
+SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
 
-MACROCELL_INSTANCE | NULL | EXP25_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+MACROCELL_INSTANCE | NULL | EXP28_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/nBERR_FSB.EXP | 10144 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP25_.EXP | 10266 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
+NODE | EXP28_.EXP | 10145 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 9 | 1
+SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9410 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9411 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/nBERR_FSB.EXP | 10144 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP25_.EXP | 10254 | ? | 542 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
-
-MACROCELL_INSTANCE | NULL | EXP26_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/nBERR_FSB.EXP | 10267 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP26_.EXP | 10268 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/nBERR_FSB.EXP | 10267 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP26_.EXP | 10256 | ? | 550 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP28_.EXP | 10132 | ? | 525 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 1 | IV_TRUE | iobs/nBERR_FSB.EXP
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/ALE1
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
 
-MACROCELL_INSTANCE | NULL | EXP27_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 8 | 1
+MACROCELL_INSTANCE | NULL | EXP29_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 16 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP27_.EXP | 10270 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
+NODE | EXP29_.EXP | 10149 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 8 | 1
+SIGNAL_INSTANCE | EXP29_.SI | EXP29_ | 0 | 16 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9495 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9491 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/ALE1 | 9574 | ? | 555 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9416 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9446 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP27_.EXP | 10258 | ? | 513 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/ALE1
-SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once
-
-MACROCELL_INSTANCE | NULL | EXP28_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1.EXP | 10260 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.EXP | cnt/PORS_FSM_FFd1 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP28_.EXP | 10271 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9415 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9417 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9419 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9447 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9420 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9421 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9422 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9435 | ? | 550 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/PORS_FSM_FFd1.EXP | 10260 | ? | 513 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.EXP | cnt/PORS_FSM_FFd1 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP28_.EXP | 10259 | ? | 513 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | cnt/PORS_FSM_FFd1.EXP
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/Once
+SIGNAL | NODE | EXP29_.EXP | 10136 | ? | 499 | 0 | EXP29_ | NULL | NULL | EXP29_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 FB_INSTANCE | FOOBAR1_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | iobm/nASr | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | iobm/VPArr | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152
-FBPIN | 3 | iobm/VPArf | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152
-FBPIN | 4 | iobm/RESrr | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | iobm/RESrf | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152
-FBPIN | 6 | iobm/IOREQr | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152
-FBPIN | 7 | iobm/Er2 | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | iobm/Er | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152
-FBPIN | 9 | iobm/DTACKrr | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152
-FBPIN | 10 | iobm/DTACKrf | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | iobm/BERRrr | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152
-FBPIN | 12 | iobm/BERRrf | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152
-FBPIN | 13 | cnt/IPL2r | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | iobm/IOS_FSM_FFd1 | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152
-FBPIN | 15 | iobm/BG | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152
-FBPIN | 16 | iobs/IOU0 | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | iobs/IOL0 | 1 | C16M_IBUF | 0 | NULL | 0 | 22 | 57344
-FBPIN | 18 | iobm/IOS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | ram/RegUrgentSync | 1 | NULL | 0 | NULL | 0
+FBPIN | 2 | ram/RefUrgent | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152
+FBPIN | 3 | ram/RefReqSync | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152
+FBPIN | 4 | ram/RefReq | 1 | NULL | 0 | NULL | 0
+FBPIN | 5 | ram/RefRAS | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152
+FBPIN | 6 | iobs/IOACTr | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152
+FBPIN | 7 | fsb/ASrf | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | iobs/IOU1 | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152
+FBPIN | 9 | iobs/IOL1 | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152
+FBPIN | 10 | cnt/TimerTC | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | iobs/IOU0 | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152
+FBPIN | 12 | iobs/IOL0 | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152
+FBPIN | 13 | cnt/Timer<3> | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | cnt/Timer<2> | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152
+FBPIN | 15 | cnt/Timer<1> | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152
+FBPIN | 16 | cnt/RefUrgent | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | iobs/IOReady | 1 | C16M_IBUF | 0 | NULL | 0 | 22 | 57344
+FBPIN | 18 | cnt/RefReq | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR2_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
 FBPIN | 6 | NULL | 0 | A_FSB_5_IBUF | 1 | NULL | 0 | 2 | 53248
-FBPIN | 7 | ram/RegUrgentSync | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | ram/RefUrgent | 1 | A_FSB_6_IBUF | 1 | NULL | 0 | 3 | 53248
-FBPIN | 9 | ram/RefReqSync | 1 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248
-FBPIN | 10 | ram/RefReq | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | ram/RefRAS | 1 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152
-FBPIN | 12 | ram/BACTr | 1 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152
-FBPIN | 13 | iobs/IOACTr | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | iobs/ALE0 | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152
-FBPIN | 15 | fsb/ASrf | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152
-FBPIN | 16 | iobs/PS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | iobs/IOU1 | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152
-FBPIN | 18 | iobs/IOL1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | NULL | 0 | A_FSB_6_IBUF | 1 | NULL | 0 | 3 | 53248
+FBPIN | 9 | iobm/VPArr | 1 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248
+FBPIN | 10 | iobm/VPArf | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | iobm/RESrr | 1 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152
+FBPIN | 12 | iobm/RESrf | 1 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152
+FBPIN | 13 | iobm/IOREQr | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | iobm/Er2 | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152
+FBPIN | 15 | iobm/Er | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152
+FBPIN | 16 | iobm/DTACKrr | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | iobm/DTACKrf | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152
+FBPIN | 18 | cnt/Timer<0> | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR3_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | EXP14_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | fsb/VPA | 1 | C8M_IBUF | 1 | NULL | 0 | 23 | 57344
+FBPIN | 1 | fsb/VPA | 1 | NULL | 0 | NULL | 0
+FBPIN | 2 | EXP14_ | 1 | C8M_IBUF | 1 | NULL | 0 | 23 | 57344
 FBPIN | 3 | EXP15_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | iobs/Clear1 | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152
-FBPIN | 6 | fsb/Ready0r | 1 | E_IBUF | 1 | NULL | 0 | 25 | 49152
-FBPIN | 7 | iobs/IOReady | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | EXP16_ | 1 | FCLK_IBUF | 0 | NULL | 0 | 27 | 57344
+FBPIN | 5 | EXP16_ | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152
+FBPIN | 6 | EXP17_ | 1 | E_IBUF | 1 | NULL | 0 | 25 | 49152
+FBPIN | 7 | iobs/IOREQ | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | EXP18_ | 1 | FCLK_IBUF | 0 | NULL | 0 | 27 | 57344
 FBPIN | 9 | fsb/nDTACK | 1 | NULL | 0 | nDTACK_FSB | 1 | 28 | 49152
 FBPIN | 10 | fsb/Ready1r | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | EXP17_ | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152
+FBPIN | 11 | EXP19_ | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152
 FBPIN | 12 | iobs/IORW1 | 1 | nLDS_FSB_IBUF | 1 | NULL | 0 | 30 | 49152
-FBPIN | 13 | EXP18_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | EXP19_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152
+FBPIN | 13 | EXP20_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | EXP21_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152
 FBPIN | 15 | iobs/IORW0 | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 33 | 49152
-FBPIN | 16 | EXP20_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 16 | EXP22_ | 1 | NULL | 0 | NULL | 0
 FBPIN | 17 | nROMWE_OBUF | 1 | NULL | 0 | nROMWE | 1 | 34 | 49152
-FBPIN | 18 | EXP21_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 18 | EXP23_ | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR4_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | cnt/nRESout | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | cnt/AoutOE | 1 | NULL | 0 | nAoutOE | 1 | 87 | 49152
-FBPIN | 3 | cnt/TimerTC | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | cnt/Timer<0> | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | EXP24_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 2 | nAoutOE_OBUF | 1 | NULL | 0 | nAoutOE | 1 | 87 | 49152
+FBPIN | 3 | iobm/BERRrr | 1 | NULL | 0 | NULL | 0
+FBPIN | 4 | iobm/BERRrf | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | nDoutOE_OBUF | 1 | NULL | 0 | nDoutOE | 1 | 89 | 49152
 FBPIN | 6 | nDinOE_OBUF | 1 | NULL | 0 | nDinOE | 1 | 90 | 49152
-FBPIN | 7 | cnt/PORS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 7 | cnt/PORS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
 FBPIN | 8 | N0 | 1 | N01 | 1 | nRES | 1 | 91 | 49152
-FBPIN | 9 | cnt/LTimer<0> | 1 | nIPL2_IBUF | 1 | NULL | 0 | 92 | 49152
-FBPIN | 10 | cnt/Timer<3> | 1 | NULL | 0 | NULL | 0
+FBPIN | 9 | cnt/IPL2r | 1 | nIPL2_IBUF | 1 | NULL | 0 | 92 | 49152
+FBPIN | 10 | iobm/IOS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
 FBPIN | 11 | nVPA_FSB_OBUF | 1 | NULL | 0 | nVPA_FSB | 1 | 93 | 49152
-FBPIN | 12 | cnt/Timer<2> | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152
-FBPIN | 13 | cnt/Timer<1> | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | cnt/RefUrgent | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152
-FBPIN | 15 | cnt/RefReq | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152
-FBPIN | 16 | cnt/LTimer<3> | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | cnt/LTimer<2> | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152
-FBPIN | 18 | cnt/LTimer<1> | 1 | NULL | 0 | NULL | 0
+FBPIN | 12 | cnt/nRESout | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152
+FBPIN | 13 | cnt/PORS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | cnt/LTimer<0> | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152
+FBPIN | 15 | cnt/LTimer<3> | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152
+FBPIN | 16 | cnt/LTimer<2> | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | cnt/LTimer<1> | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152
+FBPIN | 18 | iobm/IOBERR | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR5_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
 FBPIN | 1 | ram/RASEL | 1 | NULL | 0 | NULL | 0
@@ -7909,7 +7812,7 @@ FBPIN | 3 | ram/RefDone | 1 | NULL | 0 | NULL | 0
 FBPIN | 4 | cs/nOverlay1 | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | ram/nCAS | 1 | NULL | 0 | nCAS | 1 | 36 | 49152
 FBPIN | 6 | nOE_OBUF | 1 | NULL | 0 | nOE | 1 | 37 | 49152
-FBPIN | 7 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 7 | fsb/Ready0r | 1 | NULL | 0 | NULL | 0
 FBPIN | 8 | cs/nOverlay0 | 1 | NULL | 0 | NULL | 0 | 39 | 49152
 FBPIN | 9 | RA_4_OBUF | 1 | NULL | 0 | RA<4> | 1 | 40 | 49152
 FBPIN | 10 | ram/RAMEN | 1 | NULL | 0 | NULL | 0
@@ -7918,29 +7821,29 @@ FBPIN | 12 | RA_5_OBUF | 1 | NULL | 0 | RA<5> | 1 | 42 | 49152
 FBPIN | 13 | ram/RS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
 FBPIN | 14 | RA_2_OBUF | 1 | NULL | 0 | RA<2> | 1 | 43 | 49152
 FBPIN | 15 | RA_6_OBUF | 1 | NULL | 0 | RA<6> | 1 | 46 | 49152
-FBPIN | 16 | EXP22_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 16 | EXP25_ | 1 | NULL | 0 | NULL | 0
 FBPIN | 17 | ram/RAMReady | 1 | NULL | 0 | NULL | 0 | 49 | 49152
-FBPIN | 18 | EXP23_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 18 | EXP26_ | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR6_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
 FBPIN | 1 | iobm/ETACK | 1 | NULL | 0 | NULL | 0
 FBPIN | 2 | iobm/nVMA | 1 | NULL | 0 | nVMA_IOB | 1 | 74 | 49152
 FBPIN | 3 | iobm/DoutOE | 1 | NULL | 0 | NULL | 0
 FBPIN | 4 | iobm/ALE0 | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | iobm/ES<3> | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 76 | 49152
-FBPIN | 6 | iobm/ES<1> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 77 | 49152
-FBPIN | 7 | iobm/ES<0> | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | iobm/ES<4> | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 78 | 49152
+FBPIN | 5 | iobm/IOS_FSM_FFd3 | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 76 | 49152
+FBPIN | 6 | iobm/ES<3> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 77 | 49152
+FBPIN | 7 | iobm/ES<1> | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | iobm/ES<0> | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 78 | 49152
 FBPIN | 9 | iobm/nLDS | 1 | NULL | 0 | nLDS_IOB | 1 | 79 | 49152
-FBPIN | 10 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 10 | iobm/ES<4> | 1 | NULL | 0 | NULL | 0
 FBPIN | 11 | iobm/nUDS | 1 | NULL | 0 | nUDS_IOB | 1 | 80 | 49152
 FBPIN | 12 | iobm/nASout | 1 | NULL | 0 | nAS_IOB | 1 | 81 | 49152
-FBPIN | 13 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0
+FBPIN | 13 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
 FBPIN | 14 | nADoutLE1_OBUF | 1 | NULL | 0 | nADoutLE1 | 1 | 82 | 49152
 FBPIN | 15 | nADoutLE0_OBUF | 1 | NULL | 0 | nADoutLE0 | 1 | 85 | 49152
-FBPIN | 16 | iobm/IOACT | 1 | NULL | 0 | NULL | 0
+FBPIN | 16 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0
 FBPIN | 17 | iobm/nDinLE | 1 | NULL | 0 | nDinLE | 1 | 86 | 49152
-FBPIN | 18 | iobm/IOBERR | 1 | NULL | 0 | NULL | 0
+FBPIN | 18 | iobm/IOACT | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR7_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
 FBPIN | 1 | cnt/LTimer<13> | 1 | NULL | 0 | NULL | 0
@@ -7963,23 +7866,24 @@ FBPIN | 17 | cnt/LTimer<11> | 1 | NULL | 0 | NULL | 0 | 61 | 49152
 FBPIN | 18 | cnt/LTimer<10> | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR8_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | cnt/PORS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | iobs/Once | 1 | NULL | 0 | NULL | 0
 FBPIN | 2 | A_FSB_19_IBUF$BUF0 | 1 | NULL | 0 | RA<11> | 1 | 63 | 49152
-FBPIN | 3 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0
+FBPIN | 3 | iobs/Clear1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 4 | iobs/ALE0 | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | nRAS_OBUF | 1 | NULL | 0 | nRAS | 1 | 64 | 49152
 FBPIN | 6 | nRAMLWE_OBUF | 1 | NULL | 0 | nRAMLWE | 1 | 65 | 49152
-FBPIN | 7 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 7 | iobs/PS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
 FBPIN | 8 | nRAMUWE_OBUF | 1 | NULL | 0 | nRAMUWE | 1 | 66 | 49152
-FBPIN | 9 | EXP24_ | 1 | NULL | 0 | NULL | 0 | 67 | 49152
-FBPIN | 10 | iobs/Load1 | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | EXP25_ | 1 | NULL | 0 | NULL | 0 | 68 | 49152
+FBPIN | 9 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 | 67 | 49152
+FBPIN | 10 | EXP27_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 | 68 | 49152
 FBPIN | 12 | iobs/nBERR_FSB | 1 | NULL | 0 | nBERR_FSB | 1 | 70 | 49152
-FBPIN | 13 | EXP26_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | iobs/IOREQ | 1 | NULL | 0 | NULL | 0 | 71 | 49152
+FBPIN | 13 | EXP28_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 | 71 | 49152
 FBPIN | 15 | cnt/nBR_IOB | 1 | NULL | 0 | nBR_IOB | 1 | 72 | 49152
-FBPIN | 16 | EXP27_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | iobs/Once | 1 | nBG_IOB_IBUF | 1 | NULL | 0 | 73 | 49152
-FBPIN | 18 | EXP28_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 16 | iobs/Load1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | ram/BACTr | 1 | NULL | 0 | NULL | 0 | 73 | 49152
+FBPIN | 18 | EXP29_ | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | INPUTPINS_FOOBAR9_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0
 
@@ -7987,83 +7891,85 @@ BUSINFO | A_FSB<23:1> | 23 | 0 | 0 | A_FSB<10> | 13 | A_FSB<11> | 12 | A_FSB<12>
 BUSINFO | RA<11:0> | 12 | 0 | 1 | RA<0> | 11 | RA<10> | 1 | RA<11> | 0 | RA<1> | 10 | RA<2> | 9 | RA<3> | 8 | RA<4> | 7 | RA<5> | 6 | RA<6> | 5 | RA<7> | 4 | RA<8> | 3 | RA<9> | 2
 BUSINFO | SW<3:1> | 3 | 0 | 0 | SW<1> | 2 | SW<2> | 1 | SW<3> | 0
 
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | iobm/nASr | NULL | 1 | cnt/AoutOE | NULL | 6 | iobs/PS_FSM_FFd2 | NULL | 7 | nDTACK_IOB | 78 | 9 | iobm/IOS_FSM_FFd2 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 11 | iobm/nASout | NULL | 12 | C8M | 23 | 13 | iobs/IOREQ | NULL | 14 | iobm/BG | NULL | 15 | iobs/PS_FSM_FFd1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 16 | iobs/IOU1 | NULL | 17 | iobs/IOL1 | NULL | 20 | nIPL2 | 92 | 27 | nUDS_FSB | 33 | 29 | nLDS_FSB | 30
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 34 | iobm/IOS_FSM_FFd3 | NULL | 43 | nBG_IOB | 73 | 44 | iobm/IOREQr | NULL | 45 | nVPA_IOB | 77 | 46 | nBERR_IOB | 76
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 48 | iobm/IOS_FSM_FFd1 | NULL | 49 | iobs/ALE1 | NULL | 51 | nRES | 91 | 52 | E | 25 | 53 | iobm/Er | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | ram/RegUrgentSync | NULL | 2 | ram/RefDone | NULL | 5 | iobs/IOACTr | NULL | 7 | iobs/IOU1 | NULL | 8 | iobs/IOL1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 9 | cnt/TimerTC | NULL | 12 | nUDS_FSB | 33 | 13 | cnt/Timer<2> | NULL | 14 | cnt/Timer<1> | NULL | 15 | cnt/RefUrgent | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 16 | E | 25 | 17 | cnt/RefReq | NULL | 20 | iobs/Once | NULL | 25 | iobs/PS_FSM_FFd2 | NULL | 27 | ram/RefReqSync | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 29 | nLDS_FSB | 30 | 30 | iobs/Load1 | NULL | 36 | nAS_FSB | 32 | 37 | ram/RS_FSM_FFd2 | NULL | 40 | cnt/Timer<0> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 41 | ram/RS_FSM_FFd1 | NULL | 43 | fsb/ASrf | NULL | 45 | iobs/IOReady | NULL | 47 | iobm/IOBERR | NULL | 49 | iobs/ALE1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 51 | iobs/PS_FSM_FFd1 | NULL | 52 | cnt/Timer<3> | NULL | 53 | iobm/IOACT | NULL
 
-FB_IMUX_INDEX | FOOBAR1_ | 0 | 55 | -1 | -1 | -1 | -1 | 132 | 167 | -1 | 99 | -1 | 101 | 238 | 139 | 14 | 33 | 34 | 35 | -1 | -1 | 150 | -1 | -1 | -1 | -1 | -1 | -1 | 272 | -1 | 260 | -1 | -1 | -1 | -1 | 17 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 183 | 5 | 171 | 175 | -1 | 13 | 103 | -1 | 148 | 242 | 7
+FB_IMUX_INDEX | FOOBAR1_ | 0 | -1 | 74 | -1 | -1 | 5 | -1 | 7 | 8 | 9 | -1 | -1 | 272 | 13 | 14 | 15 | 242 | 17 | -1 | -1 | 126 | -1 | -1 | -1 | -1 | 139 | -1 | 2 | -1 | 260 | 141 | -1 | -1 | -1 | -1 | -1 | 268 | 84 | -1 | -1 | 35 | 134 | -1 | 6 | -1 | 16 | -1 | 71 | -1 | 103 | -1 | 132 | 12 | 107
 
 
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 0 | nLDS_FSB | 30 | 6 | ram/RegUrgentSync | NULL | 8 | nAS_FSB | 32 | 9 | iobs/Load1 | NULL | 12 | iobs/IOACTr | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 13 | cnt/RefUrgent | NULL | 14 | cnt/RefReq | NULL | 15 | iobm/IOACT | NULL | 19 | ram/RS_FSM_FFd2 | NULL | 27 | nUDS_FSB | 33
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 33 | ram/RefReqSync | NULL | 37 | fsb/ASrf | NULL | 39 | ram/RefDone | NULL | 50 | ram/RS_FSM_FFd1 | NULL | 51 | iobs/PS_FSM_FFd2 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 52 | iobs/PS_FSM_FFd1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR2_ | 4 | nRES | 91 | 6 | iobs/IOREQ | NULL | 7 | nDTACK_IOB | 78 | 11 | nVPA_IOB | 77 | 17 | cnt/Timer<0> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR2_ | 37 | iobm/Er | NULL | 51 | cnt/TimerTC | NULL | 52 | E | 25
 
-FB_IMUX_INDEX | FOOBAR2_ | 260 | -1 | -1 | -1 | -1 | -1 | 24 | -1 | 268 | 135 | -1 | -1 | 30 | 67 | 68 | 105 | -1 | -1 | -1 | 84 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 272 | -1 | -1 | -1 | -1 | -1 | 26 | -1 | -1 | -1 | 32 | -1 | 74 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 78 | 132 | 33 | -1
+FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | 148 | -1 | 42 | 167 | -1 | -1 | -1 | 171 | -1 | -1 | -1 | -1 | -1 | 35 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 32 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 9 | 242 | -1
 
 
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | A_FSB<20> | 18 | 1 | fsb/VPA | NULL | 2 | A_FSB<8> | 6 | 3 | cs/nOverlay1 | NULL | 4 | A_FSB<9> | 7
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 5 | fsb/Ready0r | NULL | 6 | iobs/IOReady | NULL | 7 | A_FSB<17> | 15 | 8 | fsb/nDTACK.UIM | NULL | 9 | fsb/Ready1r | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 10 | A_FSB<11> | 9 | 11 | iobs/IORW1 | NULL | 12 | iobs/IOACTr | NULL | 13 | iobs/ALE1 | NULL | 14 | fsb/ASrf | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 15 | iobs/PS_FSM_FFd1 | NULL | 16 | ram/RAMReady | NULL | 17 | iobm/IOBERR | NULL | 21 | A_FSB<19> | 17 | 22 | A_FSB<12> | 10
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 28 | nWE_FSB | 29 | 33 | nAS_FSB | 32 | 35 | A_FSB<14> | 12 | 36 | A_FSB<23> | 24 | 39 | A_FSB<22> | 20
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 42 | iobs/IORW0 | NULL | 43 | A_FSB<10> | 8 | 44 | A_FSB<13> | 11 | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 50 | A_FSB<18> | 16 | 51 | iobs/PS_FSM_FFd2 | NULL | 52 | iobs/Once | NULL | 53 | A_FSB<16> | 14
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | iobs/Once | NULL | 1 | A_FSB<14> | 12 | 2 | A_FSB<8> | 6 | 3 | cs/nOverlay1 | NULL | 4 | A_FSB<9> | 7
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 5 | iobs/IOACTr | NULL | 6 | fsb/ASrf | NULL | 7 | A_FSB<17> | 15 | 8 | fsb/nDTACK.UIM | NULL | 9 | fsb/Ready1r | NULL
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 10 | A_FSB<11> | 9 | 11 | iobs/IORW1 | NULL | 13 | iobs/ALE1 | NULL | 14 | iobs/IORW0 | NULL | 16 | iobs/IOReady | NULL
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 21 | A_FSB<19> | 17 | 23 | A_FSB<23> | 24 | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18 | 31 | A_FSB<10> | 8
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 33 | nAS_FSB | 32 | 37 | A_FSB<13> | 11 | 39 | A_FSB<22> | 20 | 42 | A_FSB<12> | 10 | 43 | iobs/PS_FSM_FFd2 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 44 | fsb/VPA | NULL | 45 | A_FSB<18> | 16 | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19 | 49 | ram/RAMReady | NULL
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 50 | fsb/Ready0r | NULL | 51 | iobs/PS_FSM_FFd1 | NULL | 53 | A_FSB<16> | 14
 
-FB_IMUX_INDEX | FOOBAR3_ | 226 | 37 | 194 | 75 | 196 | 41 | 42 | 216 | 44 | 45 | 202 | 47 | 30 | 103 | 32 | 33 | 88 | 107 | -1 | -1 | -1 | 222 | 206 | -1 | -1 | -1 | -1 | -1 | 256 | -1 | -1 | -1 | -1 | 268 | -1 | 210 | 240 | -1 | -1 | 230 | -1 | -1 | 50 | 198 | 208 | -1 | 212 | 228 | -1 | -1 | 218 | 132 | 142 | 214
+FB_IMUX_INDEX | FOOBAR3_ | 126 | 210 | 194 | 75 | 196 | 5 | 6 | 216 | 44 | 45 | 202 | 47 | -1 | 103 | 50 | -1 | 16 | -1 | -1 | -1 | -1 | 222 | -1 | 240 | -1 | -1 | -1 | -1 | 256 | -1 | 226 | 198 | -1 | 268 | -1 | -1 | -1 | 208 | -1 | 230 | -1 | -1 | 206 | 139 | 36 | 218 | 212 | 228 | -1 | 88 | 78 | 132 | -1 | 214
 
 
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | cnt/LTimer<13> | NULL | 2 | cnt/TimerTC | NULL | 3 | cnt/Timer<0> | NULL | 8 | nAS_FSB | 32 | 9 | cnt/Timer<3> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 11 | cnt/Timer<2> | NULL | 12 | cnt/Timer<1> | NULL | 14 | A_FSB<23> | 24 | 16 | E | 25 | 19 | A_FSB<20> | 18
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 20 | cnt/PORS_FSM_FFd1 | NULL | 24 | A_FSB<22> | 20 | 27 | fsb/VPA | NULL | 28 | nWE_FSB | 29 | 35 | cnt/PORS_FSM_FFd2 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 37 | cnt/LTimer<2> | NULL | 38 | cnt/LTimer<0> | NULL | 39 | cnt/AoutOE | NULL | 42 | cnt/nBR_IOB | NULL | 45 | A_FSB<21> | 19
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 47 | cnt/LTimer<1> | NULL | 50 | cnt/LTimer<3> | NULL | 51 | iobm/DoutOE | NULL | 52 | cnt/nRESout | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | fsb/VPA | NULL | 1 | cnt/AoutOE | NULL | 2 | iobm/BERRrr | NULL | 3 | iobm/BERRrf | NULL | 4 | iobm/IOS_FSM_FFd3 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 6 | cnt/PORS_FSM_FFd1 | NULL | 8 | cnt/IPL2r | NULL | 9 | cnt/TimerTC | NULL | 10 | iobm/RESrr | NULL | 11 | iobm/RESrf | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 12 | cnt/PORS_FSM_FFd2 | NULL | 13 | cnt/LTimer<0> | NULL | 14 | cnt/LTimer<3> | NULL | 15 | iobm/DTACKrr | NULL | 16 | iobm/DTACKrf | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 17 | iobm/IOBERR | NULL | 23 | A_FSB<23> | 24 | 24 | iobm/ETACK | NULL | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 33 | nAS_FSB | 32 | 36 | iobm/IOS_FSM_FFd1 | NULL | 37 | cnt/LTimer<1> | NULL | 39 | A_FSB<22> | 20 | 42 | cnt/nBR_IOB | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 43 | iobm/IOS_FSM_FFd2 | NULL | 45 | A_FSB<21> | 19 | 46 | nBERR_IOB | 76 | 47 | cnt/LTimer<13> | NULL | 48 | C8M | 23
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 49 | nIPL2 | 92 | 50 | cnt/LTimer<2> | NULL | 51 | iobm/DoutOE | NULL | 53 | cnt/nRESout | NULL
 
-FB_IMUX_INDEX | FOOBAR4_ | 108 | -1 | 56 | 57 | -1 | -1 | -1 | -1 | 268 | 63 | -1 | 65 | 66 | -1 | 240 | -1 | 242 | -1 | -1 | 226 | 126 | -1 | -1 | -1 | 230 | -1 | -1 | 37 | 256 | -1 | -1 | -1 | -1 | -1 | -1 | 60 | -1 | 70 | 62 | 55 | -1 | -1 | 140 | -1 | -1 | 228 | -1 | 71 | -1 | -1 | 69 | 92 | 54 | -1
+FB_IMUX_INDEX | FOOBAR4_ | 36 | 55 | 56 | 57 | 94 | -1 | 60 | -1 | 62 | 9 | 28 | 29 | 66 | 67 | 68 | 33 | 34 | 71 | -1 | -1 | -1 | -1 | -1 | 240 | 90 | -1 | -1 | -1 | 256 | -1 | 226 | -1 | -1 | 268 | -1 | -1 | 63 | 70 | -1 | 230 | -1 | -1 | 140 | 102 | -1 | 228 | 175 | 108 | 238 | 150 | 69 | 92 | -1 | 65
 
 
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | ram/RASEL | NULL | 2 | ram/RefDone | NULL | 3 | A_FSB<15> | 13 | 4 | nRES | 91 | 6 | ram/RS_FSM_FFd1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 7 | cs/nOverlay0 | NULL | 8 | ram/RefReqSync | NULL | 9 | ram/RefReq | NULL | 10 | A_FSB<6> | 3 | 11 | ram/BACTr | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 12 | ram/RS_FSM_FFd2 | NULL | 13 | nWE_FSB | 29 | 14 | fsb/ASrf | NULL | 16 | A_FSB<13> | 11 | 19 | A_FSB<20> | 18
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 22 | A_FSB<12> | 10 | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20 | 30 | ram/RAMEN | NULL | 33 | nAS_FSB | 32
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 34 | ram/RefUrgent | NULL | 35 | A_FSB<14> | 12 | 36 | A_FSB<4> | 97 | 37 | ram/RS_FSM_FFd3 | NULL | 39 | A_FSB<5> | 2
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 40 | A_FSB<7> | 4 | 42 | A_FSB<3> | 96 | 47 | A_FSB<21> | 19 | 52 | cs/nOverlay1 | NULL | 53 | A_FSB<16> | 14
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | ram/RASEL | NULL | 2 | ram/RefReqSync | NULL | 3 | ram/RefReq | NULL | 4 | nRES | 91 | 5 | A_FSB<16> | 14
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 6 | fsb/ASrf | NULL | 7 | cs/nOverlay0 | NULL | 8 | A_FSB<3> | 96 | 10 | ram/RS_FSM_FFd3 | NULL | 12 | A_FSB<4> | 97
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 13 | nWE_FSB | 29 | 14 | A_FSB<7> | 4 | 16 | ram/RAMReady | NULL | 19 | A_FSB<20> | 18 | 22 | ram/RefUrgent | NULL
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20 | 30 | ram/RAMEN | NULL | 33 | A_FSB<6> | 3 | 34 | A_FSB<5> | 2
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 35 | A_FSB<14> | 12 | 36 | nAS_FSB | 32 | 37 | ram/RS_FSM_FFd2 | NULL | 39 | ram/RefDone | NULL | 42 | A_FSB<12> | 10
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 44 | A_FSB<13> | 11 | 45 | A_FSB<21> | 19 | 46 | A_FSB<15> | 13 | 47 | ram/BACTr | NULL | 50 | fsb/Ready0r | NULL
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 52 | cs/nOverlay1 | NULL | 53 | ram/RS_FSM_FFd1 | NULL
 
-FB_IMUX_INDEX | FOOBAR5_ | 72 | -1 | 74 | 212 | 148 | -1 | 78 | 79 | 26 | 27 | 186 | 29 | 84 | 256 | 32 | -1 | 208 | -1 | -1 | 226 | -1 | -1 | 206 | 240 | 230 | -1 | -1 | -1 | -1 | -1 | 81 | -1 | -1 | 268 | 25 | 210 | 172 | 128 | -1 | 182 | 190 | -1 | 168 | -1 | -1 | -1 | -1 | 228 | -1 | -1 | -1 | -1 | 75 | 214
+FB_IMUX_INDEX | FOOBAR5_ | 72 | -1 | 2 | 3 | 148 | 214 | 6 | 79 | 168 | -1 | 136 | -1 | 172 | 256 | 190 | -1 | 88 | -1 | -1 | 226 | -1 | -1 | 1 | 240 | 230 | -1 | -1 | -1 | -1 | -1 | 81 | -1 | -1 | 186 | 182 | 210 | 268 | 84 | -1 | 74 | -1 | -1 | 206 | -1 | 208 | 228 | 212 | 142 | -1 | -1 | 78 | -1 | 75 | 134
 
 
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/ETACK | NULL | 1 | iobm/VPArr | NULL | 2 | iobm/VPArf | NULL | 3 | iobm/RESrr | NULL | 4 | iobm/RESrf | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/IOREQr | NULL | 6 | iobm/Er2 | NULL | 7 | iobm/Er | NULL | 8 | iobm/DTACKrr | NULL | 9 | iobm/DTACKrf | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 10 | iobm/BERRrr | NULL | 11 | iobm/BERRrf | NULL | 12 | iobm/ES<2> | NULL | 13 | iobm/IOS_FSM_FFd1 | NULL | 14 | iobs/IORW0 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 15 | iobs/IOU0 | NULL | 16 | iobs/IOL0 | NULL | 17 | iobm/IOS_FSM_FFd3 | NULL | 26 | iobm/ES<1> | NULL | 28 | iobm/ES<3> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 32 | iobm/ES<0> | NULL | 33 | iobm/ALE0 | NULL | 38 | iobm/IOACT | NULL | 39 | cnt/AoutOE | NULL | 40 | iobs/Load1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 42 | iobm/ES<4> | NULL | 44 | iobm/nVMA | NULL | 46 | nBERR_IOB | 76 | 47 | iobm/IOS_FSM_FFd2 | NULL | 48 | C8M | 23
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 49 | iobs/ALE1 | NULL | 50 | iobs/ALE0 | NULL | 51 | iobs/Clear1 | NULL | 53 | iobm/IOBERR | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/ETACK | NULL | 1 | iobm/nVMA | NULL | 2 | iobs/Clear1 | NULL | 3 | iobm/BERRrf | NULL | 4 | iobm/IOS_FSM_FFd3 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/ES<3> | NULL | 6 | iobm/ES<1> | NULL | 7 | iobm/ES<0> | NULL | 8 | iobm/VPArr | NULL | 9 | iobm/VPArf | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 10 | iobs/IOU0 | NULL | 11 | iobs/IOL0 | NULL | 12 | iobm/IOREQr | NULL | 13 | iobm/Er2 | NULL | 14 | iobm/Er | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 15 | iobm/ES<2> | NULL | 17 | iobm/IOACT | NULL | 20 | iobm/ALE0 | NULL | 28 | iobm/RESrr | NULL | 29 | iobm/IOS_FSM_FFd2 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 30 | iobs/Load1 | NULL | 33 | iobm/BERRrr | NULL | 36 | iobm/IOS_FSM_FFd1 | NULL | 42 | iobs/IORW0 | NULL | 43 | iobm/RESrf | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 45 | iobs/ALE0 | NULL | 46 | iobm/DTACKrf | NULL | 47 | iobm/ES<4> | NULL | 48 | C8M | 23 | 49 | iobs/ALE1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 51 | cnt/AoutOE | NULL | 52 | iobm/DTACKrr | NULL
 
-FB_IMUX_INDEX | FOOBAR6_ | 90 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 102 | 13 | 50 | 15 | 16 | 17 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 95 | -1 | 94 | -1 | -1 | -1 | 96 | 93 | -1 | -1 | -1 | -1 | 105 | 55 | 135 | -1 | 97 | -1 | 91 | -1 | 175 | 99 | 238 | 103 | 31 | 40 | -1 | 107
+FB_IMUX_INDEX | FOOBAR6_ | 90 | 91 | 128 | 57 | 94 | 95 | 96 | 97 | 26 | 27 | 10 | 11 | 30 | 31 | 32 | 105 | -1 | 107 | -1 | -1 | 93 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 28 | 102 | 141 | -1 | -1 | 56 | -1 | -1 | 63 | -1 | -1 | -1 | -1 | -1 | 50 | 29 | -1 | 129 | 34 | 99 | 238 | 103 | -1 | 55 | 33 | -1
 
 
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 0 | A_FSB<20> | 18 | 2 | A_FSB<21> | 19 | 3 | cs/nOverlay1 | NULL | 4 | A_FSB<2> | 95 | 6 | cnt/LTimer<7> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 7 | A_FSB<17> | 15 | 8 | cnt/LTimer<0> | NULL | 9 | A_FSB<18> | 16 | 12 | cnt/LTimer<5> | NULL | 13 | A_FSB<19> | 17
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 14 | cnt/LTimer<4> | NULL | 15 | cnt/LTimer<3> | NULL | 16 | cnt/LTimer<2> | NULL | 17 | cnt/LTimer<1> | NULL | 19 | cnt/LTimer<12> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 23 | A_FSB<23> | 24 | 24 | cnt/LTimer<6> | NULL | 29 | cnt/LTimer<11> | NULL | 33 | cnt/TimerTC | NULL | 39 | A_FSB<22> | 20
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 40 | cnt/LTimer<10> | NULL | 43 | A_FSB<10> | 8 | 44 | cnt/LTimer<9> | NULL | 45 | A_FSB<1> | 94 | 47 | ram/RASEL | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 49 | A_FSB<8> | 6 | 50 | cnt/LTimer<13> | NULL | 51 | cnt/LTimer<8> | NULL | 52 | A_FSB<11> | 9 | 53 | A_FSB<9> | 7
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 0 | cnt/LTimer<13> | NULL | 2 | A_FSB<21> | 19 | 3 | cs/nOverlay1 | NULL | 4 | A_FSB<2> | 95 | 6 | cnt/LTimer<7> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 7 | A_FSB<17> | 15 | 9 | cnt/LTimer<6> | NULL | 12 | cnt/LTimer<5> | NULL | 13 | A_FSB<19> | 17 | 14 | cnt/LTimer<4> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 15 | cnt/LTimer<2> | NULL | 16 | cnt/LTimer<1> | NULL | 17 | cnt/LTimer<10> | NULL | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 27 | cnt/LTimer<8> | NULL | 29 | cnt/LTimer<11> | NULL | 30 | A_FSB<20> | 18 | 31 | cnt/LTimer<3> | NULL | 33 | cnt/LTimer<12> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 39 | A_FSB<1> | 94 | 43 | A_FSB<10> | 8 | 44 | cnt/LTimer<9> | NULL | 45 | cnt/LTimer<0> | NULL | 47 | ram/RASEL | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 49 | A_FSB<8> | 6 | 50 | A_FSB<18> | 16 | 51 | cnt/TimerTC | NULL | 52 | A_FSB<11> | 9 | 53 | A_FSB<9> | 7
 
-FB_IMUX_INDEX | FOOBAR7_ | 226 | -1 | 228 | 75 | 164 | -1 | 114 | 216 | 62 | 218 | -1 | -1 | 120 | 222 | 122 | 69 | 70 | 71 | -1 | 123 | -1 | -1 | -1 | 240 | 117 | -1 | -1 | -1 | -1 | 124 | -1 | -1 | -1 | 56 | -1 | -1 | -1 | -1 | -1 | 230 | 125 | -1 | -1 | 198 | 110 | 156 | -1 | 72 | -1 | 194 | 108 | 111 | 202 | 196
+FB_IMUX_INDEX | FOOBAR7_ | 108 | -1 | 228 | 75 | 164 | -1 | 114 | 216 | -1 | 117 | -1 | -1 | 120 | 222 | 122 | 69 | 70 | 125 | -1 | -1 | -1 | -1 | -1 | 240 | 230 | -1 | -1 | 111 | -1 | 124 | 226 | 68 | -1 | 123 | -1 | -1 | -1 | -1 | -1 | 156 | -1 | -1 | -1 | 198 | 110 | 67 | -1 | 72 | -1 | 194 | 218 | 9 | 202 | 196
 
 
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | cnt/LTimer<13> | NULL | 1 | A_FSB<14> | 12 | 2 | A_FSB<21> | 19 | 3 | cs/nOverlay1 | NULL | 4 | A_FSB<22> | 20
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 5 | A_FSB<16> | 14 | 6 | cnt/PORS_FSM_FFd2 | NULL | 7 | ram/RefUrgent | NULL | 8 | nAS_FSB | 32 | 9 | ram/RAMEN | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 10 | ram/RefRAS | NULL | 11 | iobs/nBERR_FSB.UIM | NULL | 12 | cnt/IPL2r | NULL | 13 | iobs/ALE1 | NULL | 14 | cnt/nBR_IOB | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 16 | iobs/Once | NULL | 17 | iobm/IOBERR | NULL | 19 | ram/RS_FSM_FFd2 | NULL | 20 | cnt/PORS_FSM_FFd1 | NULL | 21 | A_FSB<19> | 17
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 27 | nUDS_FSB | 33 | 28 | nWE_FSB | 29 | 29 | nLDS_FSB | 30 | 30 | A_FSB<20> | 18 | 33 | ram/RS_FSM_FFd3 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 36 | A_FSB<23> | 24 | 37 | fsb/ASrf | NULL | 44 | A_FSB<13> | 11 | 45 | A_FSB<18> | 16 | 47 | iobs/IOACTr | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 49 | A_FSB<17> | 15 | 50 | ram/RS_FSM_FFd1 | NULL | 51 | iobs/PS_FSM_FFd2 | NULL | 52 | iobs/PS_FSM_FFd1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | A_FSB<20> | 18 | 1 | ram/RefUrgent | NULL | 2 | A_FSB<21> | 19 | 4 | ram/RefRAS | NULL | 5 | A_FSB<16> | 14
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 6 | iobs/PS_FSM_FFd1 | NULL | 7 | A_FSB<17> | 15 | 8 | ram/RS_FSM_FFd1 | NULL | 9 | ram/RAMEN | NULL | 10 | ram/RS_FSM_FFd3 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 11 | iobs/nBERR_FSB.UIM | NULL | 12 | ram/RS_FSM_FFd2 | NULL | 13 | iobs/ALE1 | NULL | 14 | cnt/nBR_IOB | NULL | 16 | A_FSB<13> | 11
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 21 | A_FSB<19> | 17 | 23 | A_FSB<23> | 24 | 25 | iobs/PS_FSM_FFd2 | NULL | 27 | iobs/Once | NULL | 28 | nWE_FSB | 29
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 30 | cnt/PORS_FSM_FFd1 | NULL | 33 | nAS_FSB | 32 | 35 | A_FSB<14> | 12 | 37 | nLDS_FSB | 30 | 38 | cnt/IPL2r | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 39 | A_FSB<22> | 20 | 43 | fsb/ASrf | NULL | 44 | iobs/IOACTr | NULL | 45 | A_FSB<18> | 16 | 47 | iobm/IOBERR | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 49 | cnt/PORS_FSM_FFd2 | NULL | 51 | nUDS_FSB | 33 | 52 | cs/nOverlay1 | NULL
 
-FB_IMUX_INDEX | FOOBAR8_ | 108 | 210 | 228 | 75 | 230 | 214 | 60 | 25 | 268 | 81 | 28 | 137 | 12 | 103 | 140 | -1 | 142 | 107 | -1 | 84 | 126 | 222 | -1 | -1 | -1 | -1 | -1 | 272 | 256 | 260 | 226 | -1 | -1 | 128 | -1 | -1 | 240 | 32 | -1 | -1 | -1 | -1 | -1 | -1 | 208 | 218 | -1 | 30 | -1 | 216 | 78 | 132 | 33 | -1
+FB_IMUX_INDEX | FOOBAR8_ | 226 | 1 | 228 | -1 | 4 | 214 | 132 | 216 | 134 | 81 | 136 | 137 | 84 | 103 | 140 | -1 | 208 | -1 | -1 | -1 | -1 | 222 | -1 | 240 | -1 | 139 | -1 | 126 | 256 | -1 | 60 | -1 | -1 | 268 | -1 | 210 | -1 | 260 | 62 | 230 | -1 | -1 | -1 | 6 | 5 | 218 | -1 | 71 | -1 | 66 | -1 | 272 | 75 | -1
 
 
 GLOBAL_FCLK | C16M | 0 | 0 | C8M | 1 | 1 | FCLK | 2 | 2
diff --git a/cpld/XC95144XL/WarpSE.xml b/cpld/XC95144XL/WarpSE.xml
index b70f7e2..b36e1a7 100644
--- a/cpld/XC95144XL/WarpSE.xml
+++ b/cpld/XC95144XL/WarpSE.xml
@@ -1,3 +1,3 @@
 <?xml version='1.0' encoding='utf-8' ?>
 <!DOCTYPE document SYSTEM "file:///C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xmlReport9kxl.dtd">
-<document><ascFile>WarpSE.rpt</ascFile><devFile>C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chp</devFile><mfdFile>WarpSE.mfd</mfdFile><htmlFile logic_legend="logiclegend.htm" logo="xc9500xl_logo.jpg" pin_legend="pinlegend.htm"/><header date=" 3-20-2023" design="WarpSE" device="XC95144XL" eqnType="2" pkg="TQ100" speed="-10" status="1" statusStr="Successful" swVersion="P.20131013" time=" 11:54PM" version="1.0"/><inputs id="A_FSB9_SPECSIG" userloc="P7"/><inputs id="A_FSB8_SPECSIG" userloc="P6"/><inputs id="A_FSB15_SPECSIG" userloc="P13"/><inputs id="A_FSB14_SPECSIG" userloc="P12"/><inputs id="A_FSB13_SPECSIG" userloc="P11"/><inputs id="A_FSB12_SPECSIG" userloc="P10"/><inputs id="A_FSB11_SPECSIG" userloc="P9"/><inputs id="A_FSB10_SPECSIG" userloc="P8"/><inputs id="A_FSB23_SPECSIG" userloc="P24"/><inputs id="A_FSB22_SPECSIG" userloc="P20"/><inputs id="A_FSB21_SPECSIG" userloc="P19"/><inputs id="A_FSB20_SPECSIG" userloc="P18"/><inputs id="A_FSB19_SPECSIG" userloc="P17"/><inputs id="A_FSB18_SPECSIG" userloc="P16"/><inputs id="A_FSB17_SPECSIG" userloc="P15"/><inputs id="A_FSB16_SPECSIG" userloc="P14"/><inputs id="nWE_FSB" userloc="P29"/><inputs id="nAS_FSB" userloc="P32"/><inputs id="nRESPIN_SPECSIG" userloc="P91"/><inputs id="nBG_IOB" userloc="P73"/><inputs id="nLDS_FSB" userloc="P30"/><inputs id="nUDS_FSB" userloc="P33"/><inputs id="nBERR_IOB" userloc="P76"/><inputs id="E" userloc="P25"/><inputs id="nIPL2" userloc="P92"/><inputs id="nDTACK_IOB" userloc="P78"/><inputs id="nVPA_IOB" userloc="P77"/><inputs id="A_FSB1_SPECSIG" userloc="P94"/><inputs id="A_FSB2_SPECSIG" userloc="P95"/><inputs id="A_FSB3_SPECSIG" userloc="P96"/><inputs id="A_FSB4_SPECSIG" userloc="P97"/><inputs id="A_FSB5_SPECSIG" userloc="P2"/><inputs id="A_FSB6_SPECSIG" userloc="P3"/><inputs id="A_FSB7_SPECSIG" userloc="P4"/><global_inputs id="C16M" pinnum="GCK1" use="GCK1" userloc="P22"/><global_inputs id="C8M" pinnum="GCK2" use="GCK2" userloc="P23"/><global_inputs id="FCLK" pinnum="GCK3" use="GCK3" userloc="P27"/><pin id="FB1_MC2_PIN11" pinnum="11" signal="A_FSB13_SPECSIG" use="I"/><pin id="FB1_MC3_PIN12" pinnum="12" signal="A_FSB14_SPECSIG" use="I"/><pin id="FB1_MC5_PIN13" pinnum="13" signal="A_FSB15_SPECSIG" use="I"/><pin id="FB1_MC6_PIN14" pinnum="14" signal="A_FSB16_SPECSIG" use="I"/><pin id="FB1_MC8_PIN15" pinnum="15" signal="A_FSB17_SPECSIG" use="I"/><pin id="FB1_MC9_PIN16" pinnum="16" signal="A_FSB18_SPECSIG" use="I"/><pin id="FB1_MC11_PIN17" pinnum="17" signal="A_FSB19_SPECSIG" use="I"/><pin id="FB1_MC12_PIN18" pinnum="18" signal="A_FSB20_SPECSIG" use="I"/><pin id="FB1_MC14_PIN19" pinnum="19" signal="A_FSB21_SPECSIG" use="I"/><pin id="FB1_MC15_PIN20" pinnum="20" signal="A_FSB22_SPECSIG" use="I"/><pin id="FB1_MC17_PIN22" pinnum="22" signal="C16M" use="GCK"/><pin id="FB2_MC2_PIN99" pinnum="99"/><pin id="FB2_MC5_PIN1" pinnum="1"/><pin id="FB2_MC6_PIN2" pinnum="2" signal="A_FSB5_SPECSIG" use="I"/><pin id="FB2_MC8_PIN3" pinnum="3" signal="A_FSB6_SPECSIG" use="I"/><pin id="FB2_MC9_PIN4" pinnum="4" signal="A_FSB7_SPECSIG" use="I"/><pin id="FB2_MC11_PIN6" pinnum="6" signal="A_FSB8_SPECSIG" use="I"/><pin id="FB2_MC12_PIN7" pinnum="7" signal="A_FSB9_SPECSIG" use="I"/><pin id="FB2_MC14_PIN8" pinnum="8" signal="A_FSB10_SPECSIG" use="I"/><pin id="FB2_MC15_PIN9" pinnum="9" signal="A_FSB11_SPECSIG" use="I"/><pin id="FB2_MC17_PIN10" pinnum="10" signal="A_FSB12_SPECSIG" use="I"/><pin id="FB3_MC2_PIN23" pinnum="23" signal="C8M" use="GCKI_SPECSIG"/><pin id="FB3_MC5_PIN24" pinnum="24" signal="A_FSB23_SPECSIG" use="I"/><pin id="FB3_MC6_PIN25" pinnum="25" signal="E" use="I"/><pin id="FB3_MC8_PIN27" pinnum="27" signal="FCLK" use="GCK"/><pin id="FB3_MC9_PIN28" pinnum="28" signal="nDTACK_FSB" use="O"/><pin id="FB3_MC11_PIN29" pinnum="29" signal="nWE_FSB" use="I"/><pin id="FB3_MC12_PIN30" pinnum="30" signal="nLDS_FSB" use="I"/><pin id="FB3_MC14_PIN32" pinnum="32" signal="nAS_FSB" use="I"/><pin id="FB3_MC15_PIN33" pinnum="33" signal="nUDS_FSB" use="I"/><pin id="FB3_MC17_PIN34" pinnum="34" signal="nROMWE" use="O"/><pin id="FB4_MC2_PIN87" pinnum="87" signal="nAoutOE" use="O"/><pin id="FB4_MC5_PIN89" pinnum="89" signal="nDoutOE" use="O"/><pin id="FB4_MC6_PIN90" pinnum="90" signal="nDinOE" use="O"/><pin id="FB4_MC8_PIN91" pinnum="91" signal="nRES" use="IO_SPECSIG"/><pin id="FB4_MC9_PIN92" pinnum="92" signal="nIPL2" use="I"/><pin id="FB4_MC11_PIN93" pinnum="93" signal="nVPA_FSB" use="O"/><pin id="FB4_MC12_PIN94" pinnum="94" signal="A_FSB1_SPECSIG" use="I"/><pin id="FB4_MC14_PIN95" pinnum="95" signal="A_FSB2_SPECSIG" use="I"/><pin id="FB4_MC15_PIN96" pinnum="96" signal="A_FSB3_SPECSIG" use="I"/><pin id="FB4_MC17_PIN97" pinnum="97" signal="A_FSB4_SPECSIG" use="I"/><pin id="FB5_MC2_PIN35" pinnum="35" signal="nROMCS" use="O"/><pin id="FB5_MC5_PIN36" pinnum="36" signal="nCAS" use="O"/><pin id="FB5_MC6_PIN37" pinnum="37" signal="nOE" use="O"/><pin id="FB5_MC8_PIN39" pinnum="39" signal="csnOverlay0_SPECSIG" use="b_SPECSIG"/><pin id="FB5_MC9_PIN40" pinnum="40" signal="RA4_SPECSIG" use="O"/><pin id="FB5_MC11_PIN41" pinnum="41" signal="RA3_SPECSIG" use="O"/><pin id="FB5_MC12_PIN42" pinnum="42" signal="RA5_SPECSIG" use="O"/><pin id="FB5_MC14_PIN43" pinnum="43" signal="RA2_SPECSIG" use="O"/><pin id="FB5_MC15_PIN46" pinnum="46" signal="RA6_SPECSIG" use="O"/><pin id="FB5_MC17_PIN49" pinnum="49" signal="ramRAMReady_SPECSIG" use="b_SPECSIG"/><pin id="FB6_MC2_PIN74" pinnum="74" signal="nVMA_IOB" use="O"/><pin id="FB6_MC5_PIN76" pinnum="76" signal="nBERR_IOB" use="I"/><pin id="FB6_MC6_PIN77" pinnum="77" signal="nVPA_IOB" use="I"/><pin id="FB6_MC8_PIN78" pinnum="78" signal="nDTACK_IOB" use="I"/><pin id="FB6_MC9_PIN79" pinnum="79" signal="nLDS_IOB" use="O"/><pin id="FB6_MC11_PIN80" pinnum="80" signal="nUDS_IOB" use="O"/><pin id="FB6_MC12_PIN81" pinnum="81" signal="nAS_IOB" use="O"/><pin id="FB6_MC14_PIN82" pinnum="82" signal="nADoutLE1" use="O"/><pin id="FB6_MC15_PIN85" pinnum="85" signal="nADoutLE0" use="O"/><pin id="FB6_MC17_PIN86" pinnum="86" signal="nDinLE" use="O"/><pin id="FB7_MC2_PIN50" pinnum="50" signal="RA1_SPECSIG" use="O"/><pin id="FB7_MC5_PIN52" pinnum="52" signal="RA7_SPECSIG" use="O"/><pin id="FB7_MC6_PIN53" pinnum="53" signal="RA0_SPECSIG" use="O"/><pin id="FB7_MC8_PIN54" pinnum="54" signal="RA8_SPECSIG" use="O"/><pin id="FB7_MC9_PIN55" pinnum="55" signal="RA10_SPECSIG" use="O"/><pin id="FB7_MC11_PIN56" pinnum="56" signal="RA9_SPECSIG" use="O"/><pin id="FB7_MC12_PIN58" pinnum="58" signal="C25MEN" use="O"/><pin id="FB7_MC14_PIN59" pinnum="59" signal="C20MEN" use="O"/><pin id="FB7_MC15_PIN60" pinnum="60" signal="cntLTimer4_SPECSIG" use="b_SPECSIG"/><pin id="FB7_MC17_PIN61" pinnum="61" signal="cntLTimer11_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC2_PIN63" pinnum="63" signal="RA11_SPECSIG" use="O"/><pin id="FB8_MC5_PIN64" pinnum="64" signal="nRAS" use="O"/><pin id="FB8_MC6_PIN65" pinnum="65" signal="nRAMLWE" use="O"/><pin id="FB8_MC8_PIN66" pinnum="66" signal="nRAMUWE" use="O"/><pin id="FB8_MC9_PIN67" pinnum="67" use="b_SPECSIG"/><pin id="FB8_MC11_PIN68" pinnum="68" use="b_SPECSIG"/><pin id="FB8_MC12_PIN70" pinnum="70" signal="nBERR_FSB" use="O"/><pin id="FB8_MC14_PIN71" pinnum="71" signal="iobsIOREQ_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC15_PIN72" pinnum="72" signal="nBR_IOB" use="O"/><pin id="FB8_MC17_PIN73" pinnum="73" signal="nBG_IOB" use="I"/><fblock id="FB1" inputUse="25" pinUse="10"><macrocell id="FB1_MC1" sigUse="2" signal="iobmnASr_SPECSIG"><pterms pt1="FB1_1_1"/></macrocell><macrocell id="FB1_MC2" pin="FB1_MC2_PIN11" sigUse="1" signal="iobmVPArr_SPECSIG"><pterms pt1="FB1_2_1"/></macrocell><macrocell id="FB1_MC3" pin="FB1_MC3_PIN12" sigUse="1" signal="iobmVPArf_SPECSIG"><pterms pt1="FB1_3_1"/></macrocell><macrocell id="FB1_MC4" sigUse="1" signal="iobmRESrr_SPECSIG"><pterms pt1="FB1_4_1"/></macrocell><macrocell id="FB1_MC5" pin="FB1_MC5_PIN13" sigUse="1" signal="iobmRESrf_SPECSIG"><pterms pt1="FB1_5_1"/></macrocell><macrocell id="FB1_MC6" pin="FB1_MC6_PIN14" sigUse="1" signal="iobmIOREQr_SPECSIG"><pterms pt1="FB1_6_1"/></macrocell><macrocell id="FB1_MC7" sigUse="1" signal="iobmEr2_SPECSIG"><pterms pt1="FB1_7_1"/></macrocell><macrocell id="FB1_MC8" pin="FB1_MC8_PIN15" sigUse="1" signal="iobmEr_SPECSIG"><pterms pt1="FB1_8_1"/></macrocell><macrocell id="FB1_MC9" pin="FB1_MC9_PIN16" sigUse="1" signal="iobmDTACKrr_SPECSIG"><pterms pt1="FB1_9_1"/></macrocell><macrocell id="FB1_MC10" sigUse="1" signal="iobmDTACKrf_SPECSIG"><pterms pt1="FB1_10_1"/></macrocell><macrocell id="FB1_MC11" pin="FB1_MC11_PIN17" sigUse="1" signal="iobmBERRrr_SPECSIG"><pterms pt1="FB1_11_1"/></macrocell><macrocell id="FB1_MC12" pin="FB1_MC12_PIN18" sigUse="1" signal="iobmBERRrf_SPECSIG"><pterms pt1="FB1_12_1"/></macrocell><macrocell id="FB1_MC13" sigUse="1" signal="cntIPL2r_SPECSIG"><pterms pt1="FB1_13_1"/></macrocell><macrocell id="FB1_MC14" pin="FB1_MC14_PIN19" sigUse="3" signal="iobmIOS_FSM_FFd1_SPECSIG"><pterms pt1="FB1_14_1" pt2="FB1_14_2"/></macrocell><macrocell id="FB1_MC15" pin="FB1_MC15_PIN20" sigUse="2" signal="iobmBG_SPECSIG"><pterms pt1="FB1_15_1" pt2="FB1_15_2"/></macrocell><macrocell id="FB1_MC16" sigUse="5" signal="iobsIOU0_SPECSIG"><pterms pt1="FB1_16_1" pt2="FB1_16_2" pt3="FB1_16_3"/></macrocell><macrocell id="FB1_MC17" pin="FB1_MC17_PIN22" sigUse="5" signal="iobsIOL0_SPECSIG"><pterms pt1="FB1_17_1" pt2="FB1_17_2" pt3="FB1_17_3"/></macrocell><macrocell id="FB1_MC18" sigUse="6" signal="iobmIOS_FSM_FFd3_SPECSIG"><pterms pt1="FB1_18_1" pt2="FB1_18_2" pt3="FB1_18_3"/></macrocell><fbinput id="FB1_I1" signal="C8M"/><fbinput id="FB1_I2" signal="E"/><fbinput fbk="PIN" id="FB1_I3" signal="nRESPIN_SPECSIG"/><fbinput id="FB1_I4" signal="iobmBG_SPECSIG"/><fbinput id="FB1_I5" signal="iobmEr_SPECSIG"/><fbinput id="FB1_I6" signal="iobmIOREQr_SPECSIG"/><fbinput id="FB1_I7" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I8" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I9" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB1_I10" signal="iobmnASr_SPECSIG"/><fbinput id="FB1_I11" signal="iobsIOL1_SPECSIG"/><fbinput id="FB1_I12" signal="iobsIOREQ_SPECSIG"/><fbinput id="FB1_I13" signal="iobsIOU1_SPECSIG"/><fbinput id="FB1_I14" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I15" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I16" signal="nADoutLE1"/><fbinput id="FB1_I17" signal="nAS_IOB"/><fbinput id="FB1_I18" signal="nAoutOE"/><fbinput id="FB1_I19" signal="nBERR_IOB"/><fbinput id="FB1_I20" signal="nBG_IOB"/><fbinput id="FB1_I21" signal="nDTACK_IOB"/><fbinput id="FB1_I22" signal="nIPL2"/><fbinput id="FB1_I23" signal="nLDS_FSB"/><fbinput id="FB1_I24" signal="nUDS_FSB"/><fbinput id="FB1_I25" signal="nVPA_IOB"/><pterm id="FB1_1_1"><signal id="nAS_IOB" negated="ON"/><signal id="nAoutOE"/></pterm><pterm id="FB1_2_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB1_3_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB1_4_1"><signal id="nRESPIN_SPECSIG" negated="ON"/></pterm><pterm id="FB1_5_1"><signal id="nRESPIN_SPECSIG" negated="ON"/></pterm><pterm id="FB1_6_1"><signal id="iobsIOREQ_SPECSIG"/></pterm><pterm id="FB1_7_1"><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB1_8_1"><signal id="E"/></pterm><pterm id="FB1_9_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB1_10_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB1_11_1"><signal id="nBERR_IOB" negated="ON"/></pterm><pterm id="FB1_12_1"><signal id="nBERR_IOB" negated="ON"/></pterm><pterm id="FB1_13_1"><signal id="nIPL2" negated="ON"/></pterm><pterm id="FB1_14_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB1_14_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB1_15_1"><signal id="nBG_IOB" negated="ON"/></pterm><pterm id="FB1_15_2"><signal id="iobmnASr_SPECSIG"/></pterm><pterm id="FB1_16_1"><signal id="nUDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_16_2"><signal id="iobsIOU1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB1_16_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_17_1"><signal id="nLDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_17_2"><signal id="iobsIOL1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB1_17_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_18_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB1_18_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB1_18_3"><signal id="C8M" negated="ON"/><signal id="iobmBG_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG"/></pterm><equation id="iobmnASr_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB1_1_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmVPArr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_2_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmVPArf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_3_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_4_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_5_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOREQr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_6_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr2_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_7_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_8_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_9_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_10_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmBERRrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_11_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmBERRrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_12_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="cntIPL2r_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_13_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_14_1"/><eq_pterm ptindx="FB1_14_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmBG_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_15_1"/></d2><clk><fastsig signal="C16M"/></clk><ce><eq_pterm ptindx="FB1_15_2"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOU0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_16_1"/><eq_pterm ptindx="FB1_16_2"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB1_16_3"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOL0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_17_1"/><eq_pterm ptindx="FB1_17_2"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB1_17_3"/></ce><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd3_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_18_1"/><eq_pterm ptindx="FB1_18_2"/><eq_pterm ptindx="FB1_18_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB2" inputUse="16" pinUse="8"><macrocell id="FB2_MC1"/><macrocell id="FB2_MC2" pin="FB2_MC2_PIN99"/><macrocell id="FB2_MC3"/><macrocell id="FB2_MC4"/><macrocell id="FB2_MC5" pin="FB2_MC5_PIN1"/><macrocell id="FB2_MC6" pin="FB2_MC6_PIN2"/><macrocell id="FB2_MC7" sigUse="1" signal="ramRegUrgentSync_SPECSIG"><pterms pt1="FB2_7_1"/></macrocell><macrocell id="FB2_MC8" pin="FB2_MC8_PIN3" sigUse="2" signal="ramRefUrgent_SPECSIG"><pterms pt1="FB2_8_1"/></macrocell><macrocell id="FB2_MC9" pin="FB2_MC9_PIN4" sigUse="1" signal="ramRefReqSync_SPECSIG"><pterms pt1="FB2_9_1"/></macrocell><macrocell id="FB2_MC10" sigUse="2" signal="ramRefReq_SPECSIG"><pterms pt1="FB2_10_1"/></macrocell><macrocell id="FB2_MC11" pin="FB2_MC11_PIN6" sigUse="2" signal="ramRefRAS_SPECSIG"><pterms pt1="FB2_11_1"/></macrocell><macrocell id="FB2_MC12" pin="FB2_MC12_PIN7" sigUse="2" signal="ramBACTr_SPECSIG"><pterms pt1="FB2_12_1"/></macrocell><macrocell id="FB2_MC13" sigUse="1" signal="iobsIOACTr_SPECSIG"><pterms pt1="FB2_13_1"/></macrocell><macrocell id="FB2_MC14" pin="FB2_MC14_PIN8" sigUse="2" signal="iobsALE0_SPECSIG"><pterms pt1="FB2_14_1"/></macrocell><macrocell id="FB2_MC15" pin="FB2_MC15_PIN9" sigUse="1" signal="fsbASrf_SPECSIG"><pterms pt1="FB2_15_1"/></macrocell><macrocell id="FB2_MC16" sigUse="3" signal="iobsPS_FSM_FFd1_SPECSIG"><pterms pt1="FB2_16_1" pt2="FB2_16_2"/></macrocell><macrocell id="FB2_MC17" pin="FB2_MC17_PIN10" sigUse="2" signal="iobsIOU1_SPECSIG"><pterms pt1="FB2_17_1" pt2="FB2_17_2"/></macrocell><macrocell id="FB2_MC18" sigUse="2" signal="iobsIOL1_SPECSIG"><pterms pt1="FB2_18_1" pt2="FB2_18_2"/></macrocell><fbinput id="FB2_I1" signal="cntRefReq_SPECSIG"/><fbinput id="FB2_I2" signal="cntRefUrgent_SPECSIG"/><fbinput id="FB2_I3" signal="fsbASrf_SPECSIG"/><fbinput id="FB2_I4" signal="iobmIOACT_SPECSIG"/><fbinput id="FB2_I5" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB2_I6" signal="iobsLoad1_SPECSIG"/><fbinput id="FB2_I7" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB2_I8" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB2_I9" signal="nAS_FSB"/><fbinput id="FB2_I10" signal="nLDS_FSB"/><fbinput id="FB2_I11" signal="nUDS_FSB"/><fbinput id="FB2_I12" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB2_I13" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB2_I14" signal="ramRefDone_SPECSIG"/><fbinput id="FB2_I15" signal="ramRefReqSync_SPECSIG"/><fbinput id="FB2_I16" signal="ramRegUrgentSync_SPECSIG"/><pterm id="FB2_7_1"><signal id="cntRefUrgent_SPECSIG"/></pterm><pterm id="FB2_8_1"><signal id="ramRefDone_SPECSIG" negated="ON"/><signal id="ramRegUrgentSync_SPECSIG"/></pterm><pterm id="FB2_9_1"><signal id="cntRefReq_SPECSIG"/></pterm><pterm id="FB2_10_1"><signal id="ramRefDone_SPECSIG" negated="ON"/><signal id="ramRefReqSync_SPECSIG"/></pterm><pterm id="FB2_11_1"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB2_12_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB2_13_1"><signal id="iobmIOACT_SPECSIG"/></pterm><pterm id="FB2_14_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB2_15_1"><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB2_16_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB2_16_2"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB2_17_1"><signal id="nUDS_FSB" negated="ON"/></pterm><pterm id="FB2_17_2"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB2_18_1"><signal id="nLDS_FSB" negated="ON"/></pterm><pterm id="FB2_18_2"><signal id="iobsLoad1_SPECSIG"/></pterm><equation id="ramRegUrgentSync_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_7_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefUrgent_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_8_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefReqSync_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_9_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefReq_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_10_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefRAS_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_11_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramBACTr_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB2_12_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOACTr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_13_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsALE0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_14_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="fsbASrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_15_1"/></d2><clk negated="ON"><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsPS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_16_1"/><eq_pterm ptindx="FB2_16_2"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOU1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_17_1"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB2_17_2"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOL1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_18_1"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB2_18_2"/></ce><prld ptindx="GND"/></equation></fblock><fblock id="FB3" inputUse="34" pinUse="9"><macrocell id="FB3_MC1"><pterms pt1="FB3_1_1" pt2="FB3_1_2" pt3="FB3_1_3" pt4="FB3_1_4" pt5="FB3_1_5"/></macrocell><macrocell id="FB3_MC2" pin="FB3_MC2_PIN23" sigUse="26" signal="fsbVPA_SPECSIG"><pterms pt1="FB3_2_1" pt2="FB3_2_2" pt3="FB3_2_3" pt4="FB3_2_4" pt5="FB3_2_5"/></macrocell><macrocell id="FB3_MC3"><pterms pt1="FB3_3_1" pt2="FB3_3_2" pt3="FB3_3_3" pt4="FB3_3_4" pt5="FB3_3_5"/></macrocell><macrocell id="FB3_MC4"/><macrocell id="FB3_MC5" pin="FB3_MC5_PIN24" sigUse="3" signal="iobsClear1_SPECSIG"><pterms pt1="FB3_5_1" pt2="FB3_5_2"/></macrocell><macrocell id="FB3_MC6" pin="FB3_MC6_PIN25" sigUse="8" signal="fsbReady0r_SPECSIG"><pterms pt1="FB3_6_1" pt2="FB3_6_2" pt3="FB3_6_3" pt4="FB3_6_4" pt5="FB3_6_5"/></macrocell><macrocell id="FB3_MC7" sigUse="8" signal="iobsIOReady_SPECSIG"><pterms pt1="FB3_7_1" pt2="FB3_7_2" pt3="FB3_7_3" pt4="FB3_7_4" pt5="FB3_7_5"/></macrocell><macrocell id="FB3_MC8" pin="FB3_MC8_PIN27"><pterms pt1="FB3_8_1" pt2="FB3_8_2" pt3="FB3_8_3" pt4="FB3_8_4" pt5="FB3_8_5"/></macrocell><macrocell id="FB3_MC9" pin="FB3_MC9_PIN28" sigUse="26" signal="nDTACK_FSB"><pterms pt1="FB3_9_1" pt2="FB3_9_2" pt3="FB3_9_3" pt4="FB3_9_4" pt5="FB3_9_5"/></macrocell><macrocell id="FB3_MC10" sigUse="17" signal="fsbReady1r_SPECSIG"><pterms pt1="FB3_10_1" pt2="FB3_10_2" pt3="FB3_10_3" pt4="FB3_10_4" pt5="FB3_10_5"/></macrocell><macrocell id="FB3_MC11" pin="FB3_MC11_PIN29"><pterms pt1="FB3_11_1" pt2="FB3_11_2" pt3="FB3_11_3" pt4="FB3_11_4" pt5="FB3_11_5"/></macrocell><macrocell id="FB3_MC12" pin="FB3_MC12_PIN30" sigUse="19" signal="iobsIORW1_SPECSIG"><pterms pt1="FB3_12_1" pt2="FB3_12_2" pt3="FB3_12_3" pt4="FB3_12_4" pt5="FB3_12_5"/></macrocell><macrocell id="FB3_MC13"><pterms pt1="FB3_13_1" pt2="FB3_13_2" pt3="FB3_13_3" pt4="FB3_13_4" pt5="FB3_13_5"/></macrocell><macrocell id="FB3_MC14" pin="FB3_MC14_PIN32"><pterms pt1="FB3_14_1" pt2="FB3_14_2" pt3="FB3_14_3" pt4="FB3_14_4" pt5="FB3_14_5"/></macrocell><macrocell id="FB3_MC15" pin="FB3_MC15_PIN33" sigUse="20" signal="iobsIORW0_SPECSIG"><pterms pt1="FB3_15_1" pt2="FB3_15_2" pt3="FB3_15_3" pt4="FB3_15_4" pt5="FB3_15_5"/></macrocell><macrocell id="FB3_MC16"><pterms pt1="FB3_16_1" pt2="FB3_16_2" pt3="FB3_16_3" pt4="FB3_16_4" pt5="FB3_16_5"/></macrocell><macrocell id="FB3_MC17" pin="FB3_MC17_PIN34" sigUse="2" signal="nROMWE"><pterms pt1="FB3_17_1" pt2="FB3_17_2" pt3="FB3_17_3" pt4="FB3_17_4"/></macrocell><macrocell id="FB3_MC18"><pterms pt1="FB3_18_1" pt2="FB3_18_2" pt3="FB3_18_3" pt4="FB3_18_4" pt5="FB3_18_5"/></macrocell><fbinput id="FB3_I1" signal="A_FSB10_SPECSIG"/><fbinput id="FB3_I2" signal="A_FSB11_SPECSIG"/><fbinput id="FB3_I3" signal="A_FSB12_SPECSIG"/><fbinput id="FB3_I4" signal="A_FSB13_SPECSIG"/><fbinput id="FB3_I5" signal="A_FSB14_SPECSIG"/><fbinput id="FB3_I6" signal="A_FSB15_SPECSIG"/><fbinput id="FB3_I7" signal="A_FSB16_SPECSIG"/><fbinput id="FB3_I8" signal="A_FSB17_SPECSIG"/><fbinput id="FB3_I9" signal="A_FSB18_SPECSIG"/><fbinput id="FB3_I10" signal="A_FSB19_SPECSIG"/><fbinput id="FB3_I11" signal="A_FSB20_SPECSIG"/><fbinput id="FB3_I12" signal="A_FSB21_SPECSIG"/><fbinput id="FB3_I13" signal="A_FSB22_SPECSIG"/><fbinput id="FB3_I14" signal="A_FSB23_SPECSIG"/><fbinput id="FB3_I15" signal="A_FSB8_SPECSIG"/><fbinput id="FB3_I16" signal="A_FSB9_SPECSIG"/><fbinput id="FB3_I17" signal="csnOverlay1_SPECSIG"/><fbinput id="FB3_I18" signal="fsbASrf_SPECSIG"/><fbinput id="FB3_I19" signal="fsbReady0r_SPECSIG"/><fbinput id="FB3_I20" signal="fsbReady1r_SPECSIG"/><fbinput id="FB3_I21" signal="fsbVPA_SPECSIG"/><fbinput id="FB3_I22" signal="iobmIOBERR_SPECSIG"/><fbinput id="FB3_I23" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB3_I24" signal="iobsIORW0_SPECSIG"/><fbinput id="FB3_I25" signal="iobsIORW1_SPECSIG"/><fbinput id="FB3_I26" signal="iobsIOReady_SPECSIG"/><fbinput id="FB3_I27" signal="iobsOnce_SPECSIG"/><fbinput id="FB3_I28" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB3_I29" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB3_I30" signal="nADoutLE1"/><fbinput id="FB3_I31" signal="nAS_FSB"/><fbinput id="FB3_I32" signal="nDTACK_FSB"/><fbinput id="FB3_I33" signal="nWE_FSB"/><fbinput id="FB3_I34" signal="ramRAMReady_SPECSIG"/><pterm id="FB3_1_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_4"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_1_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_2_1"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal 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id="A_FSB23_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_14_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_14_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_14_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_14_5"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_15_1"><signal id="iobsIORW0_SPECSIG"/><signal id="iobsIORW1_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_15_2"><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="iobsIORW1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_15_3"><signal id="A_FSB23_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_15_4"><signal id="A_FSB23_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_15_5"><signal id="A_FSB23_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_16_1"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_16_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_16_3"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_16_4"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_16_5"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_17_1"><signal id="nWE_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_17_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_17_3"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_17_4"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsIORW0_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_18_1"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_18_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="fsbReady1r_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_18_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="fsbReady1r_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB3_18_4"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="iobsIOReady_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_18_5"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="iobsIOReady_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><equation id="fsbVPA_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_2_1"/><eq_pterm ptindx="FB3_2_2"/><eq_pterm ptindx="FB3_2_3"/><eq_pterm ptindx="FB3_2_4"/><eq_pterm ptindx="FB3_2_5"/><eq_pterm import="1" ptindx="FB3_1_1"/><eq_pterm import="1" ptindx="FB3_1_2"/><eq_pterm import="1" ptindx="FB3_1_3"/><eq_pterm import="1" ptindx="FB3_1_4"/><eq_pterm import="1" ptindx="FB3_1_5"/><eq_pterm import="1" ptindx="FB3_18_1"/><eq_pterm import="1" ptindx="FB3_18_2"/><eq_pterm import="1" ptindx="FB3_18_3"/><eq_pterm import="1" ptindx="FB3_18_4"/><eq_pterm import="1" ptindx="FB3_18_5"/><eq_pterm import="1" ptindx="FB3_3_1"/><eq_pterm import="1" ptindx="FB3_3_2"/><eq_pterm import="1" ptindx="FB3_3_3"/><eq_pterm import="1" ptindx="FB3_3_4"/><eq_pterm import="1" ptindx="FB3_3_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsClear1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_5_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="fsbReady0r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_6_1"/><eq_pterm ptindx="FB3_6_2"/><eq_pterm import="1" ptindx="FB3_5_2"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOReady_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB3_7_1"/><eq_pterm import="1" ptindx="FB3_6_3"/><eq_pterm import="1" ptindx="FB3_6_4"/><eq_pterm import="1" ptindx="FB3_6_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nDTACK_FSB" regUse="D" userloc="P28"><d2><eq_pterm ptindx="FB3_9_1"/><eq_pterm ptindx="FB3_9_2"/><eq_pterm import="1" ptindx="FB3_8_1"/><eq_pterm import="1" ptindx="FB3_8_2"/><eq_pterm import="1" ptindx="FB3_8_3"/><eq_pterm import="1" ptindx="FB3_8_4"/><eq_pterm import="1" ptindx="FB3_8_5"/><eq_pterm import="1" ptindx="FB3_7_2"/><eq_pterm import="1" ptindx="FB3_7_3"/><eq_pterm import="1" ptindx="FB3_7_4"/><eq_pterm import="1" ptindx="FB3_7_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="fsbReady1r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_10_1"/><eq_pterm ptindx="FB3_10_2"/><eq_pterm ptindx="FB3_10_3"/><eq_pterm ptindx="FB3_10_4"/><eq_pterm import="1" ptindx="FB3_9_3"/><eq_pterm import="1" ptindx="FB3_9_4"/><eq_pterm import="1" ptindx="FB3_9_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIORW1_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB3_12_1"/><eq_pterm ptindx="FB3_12_2"/><eq_pterm ptindx="FB3_12_3"/><eq_pterm ptindx="FB3_12_4"/><eq_pterm ptindx="FB3_12_5"/><eq_pterm import="1" ptindx="FB3_11_1"/><eq_pterm import="1" ptindx="FB3_11_2"/><eq_pterm import="1" ptindx="FB3_11_3"/><eq_pterm import="1" ptindx="FB3_11_4"/><eq_pterm import="1" ptindx="FB3_11_5"/><eq_pterm import="1" ptindx="FB3_10_5"/><eq_pterm import="1" ptindx="FB3_13_1"/><eq_pterm import="1" ptindx="FB3_13_2"/><eq_pterm import="1" ptindx="FB3_13_3"/><eq_pterm import="1" ptindx="FB3_13_4"/><eq_pterm import="1" ptindx="FB3_13_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIORW0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB3_15_1"/><eq_pterm ptindx="FB3_15_2"/><eq_pterm ptindx="FB3_15_3"/><eq_pterm ptindx="FB3_15_4"/><eq_pterm ptindx="FB3_15_5"/><eq_pterm import="1" ptindx="FB3_14_1"/><eq_pterm import="1" ptindx="FB3_14_2"/><eq_pterm import="1" ptindx="FB3_14_3"/><eq_pterm import="1" ptindx="FB3_14_4"/><eq_pterm import="1" ptindx="FB3_14_5"/><eq_pterm import="1" ptindx="FB3_16_1"/><eq_pterm import="1" ptindx="FB3_16_2"/><eq_pterm import="1" ptindx="FB3_16_3"/><eq_pterm import="1" ptindx="FB3_16_4"/><eq_pterm import="1" ptindx="FB3_16_5"/><eq_pterm import="1" ptindx="FB3_17_2"/><eq_pterm import="1" ptindx="FB3_17_3"/><eq_pterm import="1" ptindx="FB3_17_4"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nROMWE" negated="ON" userloc="P34"><d2><eq_pterm ptindx="FB3_17_1"/></d2></equation></fblock><fblock id="FB4" inputUse="24" pinUse="10"><macrocell id="FB4_MC1" sigUse="4" signal="cntnRESout_SPECSIG"><pterms pt1="FB4_1_1" pt2="FB4_1_2"/></macrocell><macrocell id="FB4_MC2" pin="FB4_MC2_PIN87" sigUse="3" signal="nAoutOE"><pterms pt1="FB4_2_1"/></macrocell><macrocell id="FB4_MC3" sigUse="5" signal="cntTimerTC_SPECSIG"><pterms pt1="FB4_3_1" pt2="FB4_3_2"/></macrocell><macrocell id="FB4_MC4" sigUse="3" signal="cntTimer0_SPECSIG"><pterms pt1="FB4_4_1" pt2="FB4_4_2"/></macrocell><macrocell id="FB4_MC5" pin="FB4_MC5_PIN89" sigUse="2" signal="nDoutOE"><pterms pt1="FB4_5_1"/></macrocell><macrocell id="FB4_MC6" pin="FB4_MC6_PIN90" sigUse="6" signal="nDinOE"><pterms pt1="FB4_6_1" pt2="FB4_6_2"/></macrocell><macrocell id="FB4_MC7" sigUse="3" signal="cntPORS_FSM_FFd2_SPECSIG"><pterms pt1="FB4_7_1" pt2="FB4_7_2"/></macrocell><macrocell id="FB4_MC8" pin="FB4_MC8_PIN91" sigUse="1" signal="nRES"><pterms pt1="FB4_8_1"/></macrocell><macrocell id="FB4_MC9" pin="FB4_MC9_PIN92" sigUse="3" signal="cntLTimer0_SPECSIG"><pterms pt1="FB4_9_1" pt2="FB4_9_2"/></macrocell><macrocell id="FB4_MC10" sigUse="6" signal="cntTimer3_SPECSIG"><pterms pt1="FB4_10_1" pt2="FB4_10_2" pt3="FB4_10_3"/></macrocell><macrocell id="FB4_MC11" pin="FB4_MC11_PIN93" sigUse="2" signal="nVPA_FSB"><pterms pt1="FB4_11_1"/></macrocell><macrocell id="FB4_MC12" pin="FB4_MC12_PIN94" sigUse="5" signal="cntTimer2_SPECSIG"><pterms pt1="FB4_12_1" pt2="FB4_12_2" pt3="FB4_12_3"/></macrocell><macrocell id="FB4_MC13" sigUse="4" signal="cntTimer1_SPECSIG"><pterms pt1="FB4_13_1" pt2="FB4_13_2" pt3="FB4_13_3"/></macrocell><macrocell id="FB4_MC14" pin="FB4_MC14_PIN95" sigUse="5" signal="cntRefUrgent_SPECSIG"><pterms pt1="FB4_14_1" pt2="FB4_14_2" pt3="FB4_14_3"/></macrocell><macrocell id="FB4_MC15" pin="FB4_MC15_PIN96" sigUse="5" signal="cntRefReq_SPECSIG"><pterms pt1="FB4_15_1" pt2="FB4_15_2" pt3="FB4_15_3" pt4="FB4_15_4"/></macrocell><macrocell id="FB4_MC16" sigUse="6" signal="cntLTimer3_SPECSIG"><pterms pt1="FB4_16_1" pt2="FB4_16_2" pt3="FB4_16_3" pt4="FB4_16_4"/></macrocell><macrocell id="FB4_MC17" pin="FB4_MC17_PIN97" sigUse="5" signal="cntLTimer2_SPECSIG"><pterms pt1="FB4_17_1" pt2="FB4_17_2" pt3="FB4_17_3" pt4="FB4_17_4"/></macrocell><macrocell id="FB4_MC18" sigUse="4" signal="cntLTimer1_SPECSIG"><pterms pt1="FB4_18_1" pt2="FB4_18_2" pt3="FB4_18_3" pt4="FB4_18_4"/></macrocell><fbinput id="FB4_I1" signal="A_FSB20_SPECSIG"/><fbinput id="FB4_I2" signal="A_FSB21_SPECSIG"/><fbinput id="FB4_I3" signal="A_FSB22_SPECSIG"/><fbinput id="FB4_I4" signal="A_FSB23_SPECSIG"/><fbinput id="FB4_I5" signal="E"/><fbinput id="FB4_I6" signal="cntLTimer0_SPECSIG"/><fbinput id="FB4_I7" signal="cntLTimer13_SPECSIG"/><fbinput id="FB4_I8" signal="cntLTimer1_SPECSIG"/><fbinput id="FB4_I9" signal="cntLTimer2_SPECSIG"/><fbinput id="FB4_I10" signal="cntLTimer3_SPECSIG"/><fbinput id="FB4_I11" signal="cntPORS_FSM_FFd1_SPECSIG"/><fbinput id="FB4_I12" signal="cntPORS_FSM_FFd2_SPECSIG"/><fbinput id="FB4_I13" signal="cntTimer0_SPECSIG"/><fbinput id="FB4_I14" signal="cntTimer1_SPECSIG"/><fbinput id="FB4_I15" signal="cntTimer2_SPECSIG"/><fbinput id="FB4_I16" signal="cntTimer3_SPECSIG"/><fbinput id="FB4_I17" signal="cntTimerTC_SPECSIG"/><fbinput id="FB4_I18" signal="cntnRESout_SPECSIG"/><fbinput id="FB4_I19" signal="fsbVPA_SPECSIG"/><fbinput id="FB4_I20" signal="iobmDoutOE_SPECSIG"/><fbinput id="FB4_I21" signal="nAS_FSB"/><fbinput id="FB4_I22" signal="nAoutOE"/><fbinput id="FB4_I23" signal="nBR_IOB"/><fbinput id="FB4_I24" signal="nWE_FSB"/><pterm id="FB4_1_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntPORS_FSM_FFd1_SPECSIG"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB4_1_2"><signal id="cntPORS_FSM_FFd1_SPECSIG"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="cntnRESout_SPECSIG"/></pterm><pterm id="FB4_2_1"><signal id="nBR_IOB" negated="ON"/><signal id="cntPORS_FSM_FFd1_SPECSIG"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB4_3_1"><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer2_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB4_3_2"><signal id="E"/></pterm><pterm id="FB4_4_1"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/></pterm><pterm id="FB4_4_2"><signal id="E"/></pterm><pterm id="FB4_5_1"><signal id="nAoutOE" negated="ON"/><signal id="iobmDoutOE_SPECSIG"/></pterm><pterm id="FB4_6_1"><signal id="A_FSB23_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_6_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_7_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_7_2"><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB4_8_1"><signal id="cntnRESout_SPECSIG" negated="ON"/></pterm><pterm id="FB4_9_1"><signal id="cntLTimer0_SPECSIG" negated="ON"/><signal id="cntLTimer13_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_9_2"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_10_1"><signal id="cntTimerTC_SPECSIG"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB4_10_2"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer2_SPECSIG"/><signal id="cntTimer0_SPECSIG"/></pterm><pterm id="FB4_10_3"><signal id="E"/></pterm><pterm id="FB4_11_1"><signal id="fsbVPA_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_12_1"><signal id="cntTimerTC_SPECSIG"/><signal id="cntTimer2_SPECSIG"/></pterm><pterm id="FB4_12_2"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer0_SPECSIG"/></pterm><pterm id="FB4_12_3"><signal id="E"/></pterm><pterm id="FB4_13_1"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer0_SPECSIG" negated="ON"/></pterm><pterm id="FB4_13_2"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG"/></pterm><pterm id="FB4_13_3"><signal id="E"/></pterm><pterm id="FB4_14_1"><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer2_SPECSIG"/><signal id="cntTimer3_SPECSIG" negated="ON"/></pterm><pterm id="FB4_14_2"><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer2_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB4_14_3"><signal id="E"/></pterm><pterm id="FB4_15_1"><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer3_SPECSIG" negated="ON"/></pterm><pterm id="FB4_15_2"><signal id="cntTimer2_SPECSIG"/><signal id="cntTimer3_SPECSIG" negated="ON"/></pterm><pterm id="FB4_15_3"><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer2_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB4_15_4"><signal id="E"/></pterm><pterm id="FB4_16_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_16_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/></pterm><pterm id="FB4_16_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB4_16_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_17_1"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/></pterm><pterm id="FB4_17_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB4_17_3"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_17_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_18_1"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/></pterm><pterm id="FB4_18_2"><signal id="cntLTimer0_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_18_3"><signal id="cntLTimer13_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_18_4"><signal id="cntTimerTC_SPECSIG"/></pterm><equation id="cntnRESout_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_1_1"/><eq_pterm ptindx="FB4_1_2"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="nAoutOE" regUse="D" userloc="P87"><d2><eq_pterm ptindx="FB4_2_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="cntTimerTC_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_3_1"/></d2><clk><eq_pterm ptindx="FB4_3_2"/></clk><prld ptindx="GND"/></equation><equation id="cntTimer0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_4_1"/></d2><clk><eq_pterm ptindx="FB4_4_2"/></clk><prld ptindx="GND"/></equation><equation id="nDoutOE" negated="ON" userloc="P89"><d2><eq_pterm ptindx="FB4_5_1"/></d2></equation><equation id="nDinOE" userloc="P90"><d2><eq_pterm ptindx="FB4_6_1"/><eq_pterm ptindx="FB4_6_2"/></d2></equation><equation id="cntPORS_FSM_FFd2_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_7_1"/><eq_pterm ptindx="FB4_7_2"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="nRES" userloc="P91"><d2><eq_pterm ptindx="GND"/></d2><oe><eq_pterm ptindx="FB4_8_1"/></oe></equation><equation id="cntLTimer0_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB4_9_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_9_2"/></ce><prld ptindx="GND"/></equation><equation id="cntTimer3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_10_1"/><eq_pterm ptindx="FB4_10_2"/></d2><clk><eq_pterm ptindx="FB4_10_3"/></clk><prld ptindx="GND"/></equation><equation id="nVPA_FSB" negated="ON" userloc="P93"><d2><eq_pterm ptindx="FB4_11_1"/></d2></equation><equation id="cntTimer2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_12_1"/><eq_pterm ptindx="FB4_12_2"/></d2><clk><eq_pterm ptindx="FB4_12_3"/></clk><prld ptindx="GND"/></equation><equation id="cntTimer1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_13_1"/><eq_pterm ptindx="FB4_13_2"/></d2><clk><eq_pterm ptindx="FB4_13_3"/></clk><prld ptindx="GND"/></equation><equation id="cntRefUrgent_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_14_1"/><eq_pterm ptindx="FB4_14_2"/></d2><clk><eq_pterm ptindx="FB4_14_3"/></clk><prld ptindx="GND"/></equation><equation id="cntRefReq_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_15_1"/><eq_pterm ptindx="FB4_15_2"/><eq_pterm ptindx="FB4_15_3"/></d2><clk><eq_pterm ptindx="FB4_15_4"/></clk><prld ptindx="GND"/></equation><equation id="cntLTimer3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_16_1"/><eq_pterm ptindx="FB4_16_2"/><eq_pterm ptindx="FB4_16_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_16_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_17_1"/><eq_pterm ptindx="FB4_17_2"/><eq_pterm ptindx="FB4_17_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_17_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB4_18_1"/><eq_pterm ptindx="FB4_18_2"/><eq_pterm ptindx="FB4_18_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_18_4"/></ce><prld ptindx="GND"/></equation></fblock><fblock id="FB5" inputUse="30" pinUse="8"><macrocell id="FB5_MC1" sigUse="13" signal="ramRASEL_SPECSIG"><pterms pt1="FB5_1_1" pt2="FB5_1_2" pt3="FB5_1_3" pt4="FB5_1_4" pt5="FB5_1_5"/></macrocell><macrocell id="FB5_MC2" pin="FB5_MC2_PIN35" sigUse="5" signal="nROMCS"><pterms pt1="FB5_2_1" pt2="FB5_2_2" pt3="FB5_2_3" pt4="FB5_2_4" pt5="FB5_2_5"/></macrocell><macrocell id="FB5_MC3" sigUse="4" signal="ramRefDone_SPECSIG"><pterms pt1="FB5_3_1" pt2="FB5_3_2" pt3="FB5_3_3" pt4="FB5_3_4"/></macrocell><macrocell id="FB5_MC4" sigUse="3" signal="csnOverlay1_SPECSIG"><pterms pt1="FB5_4_1" pt2="FB5_4_2"/></macrocell><macrocell id="FB5_MC5" pin="FB5_MC5_PIN36" sigUse="1" signal="nCAS"><pterms pt1="FB5_5_1"/></macrocell><macrocell id="FB5_MC6" pin="FB5_MC6_PIN37" sigUse="2" signal="nOE"><pterms pt1="FB5_6_1" pt2="FB5_6_2" pt3="FB5_6_3" pt4="FB5_6_4"/></macrocell><macrocell id="FB5_MC7" sigUse="11" signal="ramRS_FSM_FFd1_SPECSIG"><pterms pt1="FB5_7_1" pt2="FB5_7_2" pt3="FB5_7_3" pt4="FB5_7_4" pt5="FB5_7_5"/></macrocell><macrocell id="FB5_MC8" pin="FB5_MC8_PIN39" sigUse="8" signal="csnOverlay0_SPECSIG"><pterms pt1="FB5_8_1" pt2="FB5_8_2" pt3="FB5_8_3" pt4="FB5_8_4"/></macrocell><macrocell id="FB5_MC9" pin="FB5_MC9_PIN40" sigUse="3" signal="RA4_SPECSIG"><pterms pt1="FB5_9_1" pt2="FB5_9_2" pt3="FB5_9_3" pt4="FB5_9_4" pt5="FB5_9_5"/></macrocell><macrocell id="FB5_MC10" sigUse="13" signal="ramRAMEN_SPECSIG"><pterms pt1="FB5_10_1" pt2="FB5_10_2" pt3="FB5_10_3" pt4="FB5_10_4" pt5="FB5_10_5"/></macrocell><macrocell id="FB5_MC11" pin="FB5_MC11_PIN41" sigUse="3" signal="RA3_SPECSIG"><pterms pt1="FB5_11_1" pt2="FB5_11_2" pt3="FB5_11_3" pt4="FB5_11_4"/></macrocell><macrocell id="FB5_MC12" pin="FB5_MC12_PIN42" sigUse="3" signal="RA5_SPECSIG"><pterms pt1="FB5_12_1" pt2="FB5_12_2" pt3="FB5_12_3" pt4="FB5_12_4" pt5="FB5_12_5"/></macrocell><macrocell id="FB5_MC13" sigUse="12" signal="ramRS_FSM_FFd2_SPECSIG"><pterms pt1="FB5_13_1" pt2="FB5_13_2" pt3="FB5_13_3" pt4="FB5_13_4" pt5="FB5_13_5"/></macrocell><macrocell id="FB5_MC14" pin="FB5_MC14_PIN43" sigUse="3" signal="RA2_SPECSIG"><pterms pt1="FB5_14_1" pt2="FB5_14_2" pt3="FB5_14_3"/></macrocell><macrocell id="FB5_MC15" pin="FB5_MC15_PIN46" sigUse="3" signal="RA6_SPECSIG"><pterms pt1="FB5_15_1" pt2="FB5_15_2" pt3="FB5_15_3" pt4="FB5_15_4" pt5="FB5_15_5"/></macrocell><macrocell id="FB5_MC16"><pterms pt1="FB5_16_1" pt2="FB5_16_2" pt3="FB5_16_3" pt4="FB5_16_4" pt5="FB5_16_5"/></macrocell><macrocell id="FB5_MC17" pin="FB5_MC17_PIN49" sigUse="13" signal="ramRAMReady_SPECSIG"><pterms pt1="FB5_17_1" pt2="FB5_17_2" pt3="FB5_17_3" pt4="FB5_17_4" pt5="FB5_17_5"/></macrocell><macrocell id="FB5_MC18"><pterms pt1="FB5_18_1" pt2="FB5_18_2" pt3="FB5_18_3" pt4="FB5_18_4" pt5="FB5_18_5"/></macrocell><fbinput id="FB5_I1" signal="A_FSB12_SPECSIG"/><fbinput id="FB5_I2" signal="A_FSB13_SPECSIG"/><fbinput id="FB5_I3" signal="A_FSB14_SPECSIG"/><fbinput id="FB5_I4" signal="A_FSB15_SPECSIG"/><fbinput id="FB5_I5" signal="A_FSB16_SPECSIG"/><fbinput id="FB5_I6" signal="A_FSB20_SPECSIG"/><fbinput id="FB5_I7" signal="A_FSB21_SPECSIG"/><fbinput id="FB5_I8" signal="A_FSB22_SPECSIG"/><fbinput id="FB5_I9" signal="A_FSB23_SPECSIG"/><fbinput id="FB5_I10" signal="A_FSB3_SPECSIG"/><fbinput id="FB5_I11" signal="A_FSB4_SPECSIG"/><fbinput id="FB5_I12" signal="A_FSB5_SPECSIG"/><fbinput id="FB5_I13" signal="A_FSB6_SPECSIG"/><fbinput id="FB5_I14" signal="A_FSB7_SPECSIG"/><fbinput fbk="PIN" id="FB5_I15" signal="nRESPIN_SPECSIG"/><fbinput id="FB5_I16" signal="csnOverlay0_SPECSIG"/><fbinput id="FB5_I17" signal="csnOverlay1_SPECSIG"/><fbinput id="FB5_I18" signal="fsbASrf_SPECSIG"/><fbinput id="FB5_I19" signal="nAS_FSB"/><fbinput id="FB5_I20" signal="nWE_FSB"/><fbinput id="FB5_I21" signal="ramBACTr_SPECSIG"/><fbinput id="FB5_I22" signal="ramRAMEN_SPECSIG"/><fbinput id="FB5_I23" signal="ramRASEL_SPECSIG"/><fbinput id="FB5_I24" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB5_I25" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB5_I26" signal="ramRS_FSM_FFd3_SPECSIG"/><fbinput id="FB5_I27" signal="ramRefDone_SPECSIG"/><fbinput id="FB5_I28" signal="ramRefReq_SPECSIG"/><fbinput id="FB5_I29" signal="ramRefReqSync_SPECSIG"/><fbinput id="FB5_I30" signal="ramRefUrgent_SPECSIG"/><pterm id="FB5_1_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB5_1_2"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB5_1_3"><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_1_4"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_1_5"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_1"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_2"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_3"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_3_1"><signal id="ramRefDone_SPECSIG"/><signal id="ramRefReqSync_SPECSIG"/></pterm><pterm id="FB5_3_2"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRefReqSync_SPECSIG"/></pterm><pterm id="FB5_3_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB5_3_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_4_1"><signal id="csnOverlay0_SPECSIG"/></pterm><pterm id="FB5_4_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_5_1"><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_6_1"><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB5_6_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_6_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_6_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_7_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB5_7_2"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB5_7_3"><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_7_4"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_7_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB5_8_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_8_3"><signal id="nRESPIN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB5_SPECSIG"/></pterm><pterm id="FB5_9_1"><signal id="A_FSB14_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_9_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_9_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_9_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_9_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_10_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_10_2"><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_10_3"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_10_4"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_10_5"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_1"><signal id="A_FSB13_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB4_SPECSIG"/></pterm><pterm id="FB5_11_3"><signal id="A_FSB15_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB6_SPECSIG"/></pterm><pterm id="FB5_12_1"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_12_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_13_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB5_13_2"><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_3"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_13_4"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_13_5"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_1"><signal id="A_FSB12_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB3_SPECSIG"/></pterm><pterm id="FB5_14_3"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB7_SPECSIG"/></pterm><pterm id="FB5_15_1"><signal id="A_FSB16_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_2"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_3"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_1"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_16_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_4"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_16_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_17_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_2"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_17_3"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_18_1"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_18_2"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_18_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_18_4"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_18_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><equation id="ramRASEL_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB5_1_1"/><eq_pterm ptindx="FB5_1_2"/><eq_pterm ptindx="FB5_1_3"/><eq_pterm ptindx="FB5_1_4"/><eq_pterm ptindx="FB5_1_5"/><eq_pterm import="1" ptindx="FB5_2_1"/><eq_pterm import="1" ptindx="FB5_2_2"/><eq_pterm import="1" ptindx="FB5_2_3"/><eq_pterm import="1" ptindx="FB5_2_4"/><eq_pterm import="1" ptindx="FB5_2_5"/><eq_pterm import="1" ptindx="FB5_18_1"/><eq_pterm import="1" ptindx="FB5_18_2"/><eq_pterm import="1" ptindx="FB5_18_3"/><eq_pterm import="1" ptindx="FB5_18_4"/><eq_pterm import="1" ptindx="FB5_18_5"/><eq_pterm import="1" ptindx="FB5_17_4"/><eq_pterm import="1" ptindx="FB5_17_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nROMCS" negated="ON" userloc="P35"><d2><eq_pterm import="1" ptindx="FB5_3_3"/><eq_pterm import="1" ptindx="FB5_3_4"/></d2></equation><equation id="ramRefDone_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_3_1"/><eq_pterm ptindx="FB5_3_2"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_4_1"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB5_4_2"/></ce><prld ptindx="GND"/></equation><equation id="nCAS" regUse="D" userloc="P36"><d2><eq_pterm ptindx="FB5_5_1"/></d2><clk negated="ON"><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nOE" negated="ON" userloc="P37"><d2><eq_pterm ptindx="FB5_6_1"/></d2></equation><equation id="ramRS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_7_1"/><eq_pterm ptindx="FB5_7_2"/><eq_pterm ptindx="FB5_7_3"/><eq_pterm ptindx="FB5_7_4"/><eq_pterm ptindx="FB5_7_5"/><eq_pterm import="1" ptindx="FB5_6_2"/><eq_pterm import="1" ptindx="FB5_6_3"/><eq_pterm import="1" ptindx="FB5_6_4"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_8_1"/><eq_pterm ptindx="FB5_8_2"/></d2><clk><fastsig signal="FCLK"/></clk><reset><eq_pterm ptindx="FB5_8_3"/></reset><prld ptindx="GND"/></equation><equation id="RA4_SPECSIG" userloc="P40"><d2><eq_pterm ptindx="FB5_9_1"/><eq_pterm import="1" ptindx="FB5_8_4"/></d2></equation><equation id="ramRAMEN_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_10_1"/><eq_pterm ptindx="FB5_10_2"/><eq_pterm ptindx="FB5_10_3"/><eq_pterm ptindx="FB5_10_4"/><eq_pterm ptindx="FB5_10_5"/><eq_pterm import="1" ptindx="FB5_9_2"/><eq_pterm import="1" ptindx="FB5_9_3"/><eq_pterm import="1" ptindx="FB5_9_4"/><eq_pterm import="1" ptindx="FB5_9_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="RA3_SPECSIG" userloc="P41"><d2><eq_pterm ptindx="FB5_11_1"/><eq_pterm ptindx="FB5_11_2"/></d2></equation><equation id="RA5_SPECSIG" userloc="P42"><d2><eq_pterm import="1" ptindx="FB5_11_3"/><eq_pterm import="1" ptindx="FB5_11_4"/></d2></equation><equation id="ramRS_FSM_FFd2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB5_13_1"/><eq_pterm ptindx="FB5_13_2"/><eq_pterm ptindx="FB5_13_3"/><eq_pterm ptindx="FB5_13_4"/><eq_pterm ptindx="FB5_13_5"/><eq_pterm import="1" ptindx="FB5_12_1"/><eq_pterm import="1" ptindx="FB5_12_2"/><eq_pterm import="1" ptindx="FB5_12_3"/><eq_pterm import="1" ptindx="FB5_12_4"/><eq_pterm import="1" ptindx="FB5_12_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="RA2_SPECSIG" userloc="P43"><d2><eq_pterm ptindx="FB5_14_1"/><eq_pterm ptindx="FB5_14_2"/></d2></equation><equation id="RA6_SPECSIG" userloc="P46"><d2><eq_pterm ptindx="FB5_15_1"/><eq_pterm import="1" ptindx="FB5_14_3"/></d2></equation><equation id="ramRAMReady_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_17_1"/><eq_pterm ptindx="FB5_17_2"/><eq_pterm ptindx="FB5_17_3"/><eq_pterm import="1" ptindx="FB5_16_1"/><eq_pterm import="1" ptindx="FB5_16_2"/><eq_pterm import="1" ptindx="FB5_16_3"/><eq_pterm import="1" ptindx="FB5_16_4"/><eq_pterm import="1" ptindx="FB5_16_5"/><eq_pterm import="1" ptindx="FB5_15_2"/><eq_pterm import="1" ptindx="FB5_15_3"/><eq_pterm import="1" ptindx="FB5_15_4"/><eq_pterm import="1" ptindx="FB5_15_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB6" inputUse="34" pinUse="10"><macrocell id="FB6_MC1" sigUse="6" signal="iobmETACK_SPECSIG"><pterms pt1="FB6_1_1"/></macrocell><macrocell id="FB6_MC2" pin="FB6_MC2_PIN74" sigUse="10" signal="nVMA_IOB"><pterms pt1="FB6_2_1" pt2="FB6_2_2" pt3="FB6_2_3"/></macrocell><macrocell id="FB6_MC3" sigUse="3" signal="iobmDoutOE_SPECSIG"><pterms pt1="FB6_3_1" pt2="FB6_3_2"/></macrocell><macrocell id="FB6_MC4" sigUse="4" signal="iobmALE0_SPECSIG"><pterms pt1="FB6_4_1" pt2="FB6_4_2"/></macrocell><macrocell id="FB6_MC5" pin="FB6_MC5_PIN76" sigUse="6" signal="iobmES3_SPECSIG"><pterms pt1="FB6_5_1" pt2="FB6_5_2" pt3="FB6_5_3"/></macrocell><macrocell id="FB6_MC6" pin="FB6_MC6_PIN77" sigUse="4" signal="iobmES1_SPECSIG"><pterms pt1="FB6_6_1" pt2="FB6_6_2" pt3="FB6_6_3"/></macrocell><macrocell id="FB6_MC7" sigUse="7" signal="iobmES0_SPECSIG"><pterms pt1="FB6_7_1" pt2="FB6_7_2" pt3="FB6_7_3"/></macrocell><macrocell id="FB6_MC8" pin="FB6_MC8_PIN78" sigUse="7" signal="iobmES4_SPECSIG"><pterms pt1="FB6_8_1" pt2="FB6_8_2" pt3="FB6_8_3" pt4="FB6_8_4"/></macrocell><macrocell id="FB6_MC9" pin="FB6_MC9_PIN79" sigUse="6" signal="nLDS_IOB"><pterms pt1="FB6_9_1" pt2="FB6_9_2" pt3="FB6_9_3" pt4="FB6_9_4"/></macrocell><macrocell id="FB6_MC10" sigUse="11" signal="iobmIOS_FSM_FFd2_SPECSIG"><pterms pt1="FB6_10_1" pt2="FB6_10_2" pt3="FB6_10_3" pt4="FB6_10_4" pt5="FB6_10_5"/></macrocell><macrocell id="FB6_MC11" pin="FB6_MC11_PIN80" sigUse="6" signal="nUDS_IOB"><pterms pt1="FB6_11_1" pt2="FB6_11_2" pt3="FB6_11_3" pt4="FB6_11_4"/></macrocell><macrocell id="FB6_MC12" pin="FB6_MC12_PIN81" sigUse="4" signal="nAS_IOB"><pterms pt1="FB6_12_1" pt2="FB6_12_2" pt3="FB6_12_3"/></macrocell><macrocell id="FB6_MC13" sigUse="7" signal="iobmES2_SPECSIG"><pterms pt1="FB6_13_1" pt2="FB6_13_2" pt3="FB6_13_3" pt4="FB6_13_4" pt5="FB6_13_5"/></macrocell><macrocell id="FB6_MC14" pin="FB6_MC14_PIN82" sigUse="3" signal="nADoutLE1"><pterms pt1="FB6_14_1" pt2="FB6_14_2"/></macrocell><macrocell id="FB6_MC15" pin="FB6_MC15_PIN85" sigUse="2" signal="nADoutLE0"><pterms pt1="FB6_15_1" pt2="FB6_15_2"/></macrocell><macrocell id="FB6_MC16" sigUse="12" signal="iobmIOACT_SPECSIG"><pterms pt1="FB6_16_1" pt2="FB6_16_2" pt3="FB6_16_3" pt4="FB6_16_4" pt5="FB6_16_5"/></macrocell><macrocell id="FB6_MC17" pin="FB6_MC17_PIN86" sigUse="2" signal="nDinLE"><pterms pt1="FB6_17_1" pt2="FB6_17_2" pt3="FB6_17_3" pt4="FB6_17_4" pt5="FB6_17_5"/></macrocell><macrocell id="FB6_MC18" sigUse="13" signal="iobmIOBERR_SPECSIG"><pterms pt1="FB6_18_1" pt2="FB6_18_2" pt3="FB6_18_3" pt4="FB6_18_4" pt5="FB6_18_5"/></macrocell><fbinput id="FB6_I1" signal="C8M"/><fbinput id="FB6_I2" signal="iobmALE0_SPECSIG"/><fbinput id="FB6_I3" signal="iobmBERRrf_SPECSIG"/><fbinput id="FB6_I4" signal="iobmBERRrr_SPECSIG"/><fbinput id="FB6_I5" signal="iobmDTACKrf_SPECSIG"/><fbinput id="FB6_I6" signal="iobmDTACKrr_SPECSIG"/><fbinput id="FB6_I7" signal="iobmES0_SPECSIG"/><fbinput id="FB6_I8" signal="iobmES1_SPECSIG"/><fbinput id="FB6_I9" signal="iobmES2_SPECSIG"/><fbinput id="FB6_I10" signal="iobmES3_SPECSIG"/><fbinput id="FB6_I11" signal="iobmES4_SPECSIG"/><fbinput id="FB6_I12" signal="iobmETACK_SPECSIG"/><fbinput id="FB6_I13" signal="iobmEr_SPECSIG"/><fbinput id="FB6_I14" signal="iobmEr2_SPECSIG"/><fbinput id="FB6_I15" signal="iobmIOACT_SPECSIG"/><fbinput id="FB6_I16" signal="iobmIOBERR_SPECSIG"/><fbinput id="FB6_I17" signal="iobmIOREQr_SPECSIG"/><fbinput id="FB6_I18" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB6_I19" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB6_I20" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB6_I21" signal="iobmRESrf_SPECSIG"/><fbinput id="FB6_I22" signal="iobmRESrr_SPECSIG"/><fbinput id="FB6_I23" signal="iobmVPArf_SPECSIG"/><fbinput id="FB6_I24" signal="iobmVPArr_SPECSIG"/><fbinput id="FB6_I25" signal="iobsALE0_SPECSIG"/><fbinput id="FB6_I26" signal="iobsClear1_SPECSIG"/><fbinput id="FB6_I27" signal="iobsIOL0_SPECSIG"/><fbinput id="FB6_I28" signal="iobsIORW0_SPECSIG"/><fbinput id="FB6_I29" signal="iobsIOU0_SPECSIG"/><fbinput id="FB6_I30" signal="iobsLoad1_SPECSIG"/><fbinput id="FB6_I31" signal="nADoutLE1"/><fbinput id="FB6_I32" signal="nAoutOE"/><fbinput id="FB6_I33" signal="nBERR_IOB"/><fbinput id="FB6_I34" signal="nVMA_IOB"/><pterm id="FB6_1_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_2_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/></pterm><pterm id="FB6_2_2"><signal id="nVMA_IOB"/><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmIOACT_SPECSIG"/><signal id="iobmVPArf_SPECSIG"/><signal id="iobmVPArr_SPECSIG"/></pterm><pterm id="FB6_2_3"><signal id="nAoutOE"/></pterm><pterm id="FB6_3_1"><signal id="iobsIORW0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB6_3_2"><signal id="iobsIORW0_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_4_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_4_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG" negated="ON"/></pterm><pterm id="FB6_5_1"><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_5_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_5_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_6_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/></pterm><pterm id="FB6_6_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_6_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_7_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_7_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_7_3"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_8_1"><signal id="iobmES4_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_8_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_8_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_8_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_9_1"><signal id="iobsIOL0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_2"><signal id="iobsIOL0_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_3"><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="iobsIOL0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_9_4"><signal id="nAoutOE"/></pterm><pterm id="FB6_10_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_10_2"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_10_3"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_10_4"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_10_5"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_11_1"><signal id="iobsIOU0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_2"><signal id="iobsIOU0_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_3"><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="iobsIOU0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_11_4"><signal id="nAoutOE"/></pterm><pterm id="FB6_12_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_2"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_3"><signal id="nAoutOE"/></pterm><pterm id="FB6_13_1"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_13_2"><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_13_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_13_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/></pterm><pterm id="FB6_13_5"><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_14_1"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB6_14_2"><signal id="iobsClear1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB6_15_1"><signal id="iobmALE0_SPECSIG" negated="ON"/><signal id="iobsALE0_SPECSIG" negated="ON"/></pterm><pterm id="FB6_15_2"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_16_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_3"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_16_4"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_16_5"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_17_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_17_2"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_17_3"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_17_4"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_17_5"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_18_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG"/></pterm><pterm id="FB6_18_2"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_18_3"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_18_4"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_18_5"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><equation id="iobmETACK_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_1_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nVMA_IOB" regUse="T" userloc="P74"><d2><eq_pterm ptindx="FB6_2_1"/><eq_pterm ptindx="FB6_2_2"/></d2><clk><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_2_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmDoutOE_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_3_1"/><eq_pterm ptindx="FB6_3_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmALE0_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_4_1"/><eq_pterm ptindx="FB6_4_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmES3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_5_1"/><eq_pterm ptindx="FB6_5_2"/><eq_pterm ptindx="FB6_5_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmES1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_6_1"/><eq_pterm ptindx="FB6_6_2"/><eq_pterm ptindx="FB6_6_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmES0_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB6_7_1"/><eq_pterm ptindx="FB6_7_2"/><eq_pterm ptindx="FB6_7_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmES4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_8_1"/><eq_pterm ptindx="FB6_8_2"/><eq_pterm ptindx="FB6_8_3"/><eq_pterm ptindx="FB6_8_4"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nLDS_IOB" negated="ON" regUse="D" userloc="P79"><d2><eq_pterm ptindx="FB6_9_1"/><eq_pterm ptindx="FB6_9_2"/><eq_pterm ptindx="FB6_9_3"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_9_4"/></oe><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_10_1"/><eq_pterm ptindx="FB6_10_2"/><eq_pterm ptindx="FB6_10_3"/><eq_pterm ptindx="FB6_10_4"/><eq_pterm ptindx="FB6_10_5"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nUDS_IOB" negated="ON" regUse="D" userloc="P80"><d2><eq_pterm ptindx="FB6_11_1"/><eq_pterm ptindx="FB6_11_2"/><eq_pterm ptindx="FB6_11_3"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_11_4"/></oe><prld ptindx="GND"/></equation><equation id="nAS_IOB" regUse="D" userloc="P81"><d2><eq_pterm ptindx="FB6_12_1"/><eq_pterm ptindx="FB6_12_2"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_12_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmES2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_13_1"/><eq_pterm ptindx="FB6_13_2"/><eq_pterm ptindx="FB6_13_3"/><eq_pterm ptindx="FB6_13_4"/><eq_pterm ptindx="FB6_13_5"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nADoutLE1" negated="ON" regUse="D" userloc="P82"><d2><eq_pterm ptindx="FB6_14_1"/><eq_pterm ptindx="FB6_14_2"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="VCC"/></equation><equation id="nADoutLE0" userloc="P85"><d2><eq_pterm ptindx="FB6_15_1"/></d2></equation><equation id="iobmIOACT_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_16_1"/><eq_pterm ptindx="FB6_16_2"/><eq_pterm ptindx="FB6_16_3"/><eq_pterm ptindx="FB6_16_4"/><eq_pterm ptindx="FB6_16_5"/><eq_pterm import="1" ptindx="FB6_15_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nDinLE" regUse="D" userloc="P86"><d2><eq_pterm ptindx="FB6_17_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOBERR_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_18_1"/><eq_pterm ptindx="FB6_18_2"/><eq_pterm ptindx="FB6_18_3"/><eq_pterm ptindx="FB6_18_4"/><eq_pterm ptindx="FB6_18_5"/><eq_pterm import="1" ptindx="FB6_17_2"/><eq_pterm import="1" ptindx="FB6_17_3"/><eq_pterm import="1" ptindx="FB6_17_4"/><eq_pterm import="1" ptindx="FB6_17_5"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB7" inputUse="30" pinUse="8"><macrocell id="FB7_MC1" sigUse="15" signal="cntLTimer13_SPECSIG"><pterms pt1="FB7_1_1" pt2="FB7_1_2" pt3="FB7_1_3"/></macrocell><macrocell id="FB7_MC2" pin="FB7_MC2_PIN50" sigUse="3" signal="RA1_SPECSIG"><pterms pt1="FB7_2_1" pt2="FB7_2_2"/></macrocell><macrocell id="FB7_MC3" sigUse="12" signal="cntLTimer9_SPECSIG"><pterms pt1="FB7_3_1" pt2="FB7_3_2" pt3="FB7_3_3" pt4="FB7_3_4"/></macrocell><macrocell id="FB7_MC4" sigUse="11" signal="cntLTimer8_SPECSIG"><pterms pt1="FB7_4_1" pt2="FB7_4_2" pt3="FB7_4_3" pt4="FB7_4_4"/></macrocell><macrocell id="FB7_MC5" pin="FB7_MC5_PIN52" sigUse="3" signal="RA7_SPECSIG"><pterms pt1="FB7_5_1" pt2="FB7_5_2"/></macrocell><macrocell id="FB7_MC6" pin="FB7_MC6_PIN53" sigUse="3" signal="RA0_SPECSIG"><pterms pt1="FB7_6_1" pt2="FB7_6_2"/></macrocell><macrocell id="FB7_MC7" sigUse="10" signal="cntLTimer7_SPECSIG"><pterms pt1="FB7_7_1" pt2="FB7_7_2" pt3="FB7_7_3" pt4="FB7_7_4" pt5="FB7_7_5"/></macrocell><macrocell id="FB7_MC8" pin="FB7_MC8_PIN54" sigUse="7" signal="RA8_SPECSIG"><pterms pt1="FB7_8_1" pt2="FB7_8_2" pt3="FB7_8_3" pt4="FB7_8_4" pt5="FB7_8_5"/></macrocell><macrocell id="FB7_MC9" pin="FB7_MC9_PIN55" sigUse="1" signal="RA10_SPECSIG"><pterms pt1="FB7_9_1" pt2="FB7_9_2"/></macrocell><macrocell id="FB7_MC10" sigUse="9" signal="cntLTimer6_SPECSIG"><pterms pt1="FB7_10_1" pt2="FB7_10_2" pt3="FB7_10_3" pt4="FB7_10_4"/></macrocell><macrocell id="FB7_MC11" pin="FB7_MC11_PIN56" sigUse="3" signal="RA9_SPECSIG"><pterms pt1="FB7_11_1" pt2="FB7_11_2"/></macrocell><macrocell id="FB7_MC12" pin="FB7_MC12_PIN58" sigUse="0" signal="C25MEN"/><macrocell id="FB7_MC13" sigUse="8" signal="cntLTimer5_SPECSIG"><pterms pt1="FB7_13_1" pt2="FB7_13_2" pt3="FB7_13_3" pt4="FB7_13_4"/></macrocell><macrocell id="FB7_MC14" pin="FB7_MC14_PIN59" sigUse="0" signal="C20MEN"/><macrocell id="FB7_MC15" pin="FB7_MC15_PIN60" sigUse="7" signal="cntLTimer4_SPECSIG"><pterms pt1="FB7_15_1" pt2="FB7_15_2" pt3="FB7_15_3" pt4="FB7_15_4"/></macrocell><macrocell id="FB7_MC16" sigUse="15" signal="cntLTimer12_SPECSIG"><pterms pt1="FB7_16_1" pt2="FB7_16_2" pt3="FB7_16_3" pt4="FB7_16_4"/></macrocell><macrocell id="FB7_MC17" pin="FB7_MC17_PIN61" sigUse="14" signal="cntLTimer11_SPECSIG"><pterms pt1="FB7_17_1" pt2="FB7_17_2" pt3="FB7_17_3" pt4="FB7_17_4"/></macrocell><macrocell id="FB7_MC18" sigUse="13" signal="cntLTimer10_SPECSIG"><pterms pt1="FB7_18_1" pt2="FB7_18_2" pt3="FB7_18_3" pt4="FB7_18_4"/></macrocell><fbinput id="FB7_I1" signal="A_FSB10_SPECSIG"/><fbinput id="FB7_I2" signal="A_FSB11_SPECSIG"/><fbinput id="FB7_I3" signal="A_FSB17_SPECSIG"/><fbinput id="FB7_I4" signal="A_FSB18_SPECSIG"/><fbinput id="FB7_I5" signal="A_FSB19_SPECSIG"/><fbinput id="FB7_I6" signal="A_FSB1_SPECSIG"/><fbinput id="FB7_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB7_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB7_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB7_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB7_I11" signal="A_FSB2_SPECSIG"/><fbinput id="FB7_I12" signal="A_FSB8_SPECSIG"/><fbinput id="FB7_I13" signal="A_FSB9_SPECSIG"/><fbinput id="FB7_I14" signal="cntLTimer0_SPECSIG"/><fbinput id="FB7_I15" signal="cntLTimer10_SPECSIG"/><fbinput id="FB7_I16" signal="cntLTimer11_SPECSIG"/><fbinput id="FB7_I17" signal="cntLTimer12_SPECSIG"/><fbinput id="FB7_I18" signal="cntLTimer13_SPECSIG"/><fbinput id="FB7_I19" signal="cntLTimer1_SPECSIG"/><fbinput id="FB7_I20" signal="cntLTimer2_SPECSIG"/><fbinput id="FB7_I21" signal="cntLTimer3_SPECSIG"/><fbinput id="FB7_I22" signal="cntLTimer4_SPECSIG"/><fbinput id="FB7_I23" signal="cntLTimer5_SPECSIG"/><fbinput id="FB7_I24" signal="cntLTimer6_SPECSIG"/><fbinput id="FB7_I25" signal="cntLTimer7_SPECSIG"/><fbinput id="FB7_I26" signal="cntLTimer8_SPECSIG"/><fbinput id="FB7_I27" signal="cntLTimer9_SPECSIG"/><fbinput id="FB7_I28" signal="cntTimerTC_SPECSIG"/><fbinput id="FB7_I29" signal="csnOverlay1_SPECSIG"/><fbinput id="FB7_I30" signal="ramRASEL_SPECSIG"/><pterm id="FB7_1_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_1_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntLTimer12_SPECSIG"/></pterm><pterm id="FB7_1_3"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_2_1"><signal id="A_FSB11_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB2_SPECSIG"/></pterm><pterm id="FB7_3_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_3_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_3_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_4_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_4_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/></pterm><pterm id="FB7_4_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_4_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_5_1"><signal id="A_FSB8_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_5_2"><signal id="A_FSB17_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_1"><signal id="A_FSB10_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB1_SPECSIG"/></pterm><pterm id="FB7_7_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_7_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/></pterm><pterm id="FB7_7_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_7_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_7_5"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_8_1"><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_2"><signal id="A_FSB18_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_8_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB7_8_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_9_1"><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB7_9_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_10_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_10_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/></pterm><pterm id="FB7_10_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_10_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_11_1"><signal id="A_FSB20_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_11_2"><signal id="A_FSB19_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_13_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/></pterm><pterm id="FB7_13_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_15_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_15_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/></pterm><pterm id="FB7_15_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_15_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_16_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer12_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_16_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_16_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_17_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_17_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_17_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_18_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_18_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_18_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_18_4"><signal id="cntTimerTC_SPECSIG"/></pterm><equation id="cntLTimer13_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_1_1"/><eq_pterm ptindx="FB7_1_2"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_1_3"/></ce><prld ptindx="GND"/></equation><equation id="RA1_SPECSIG" userloc="P50"><d2><eq_pterm ptindx="FB7_2_1"/><eq_pterm ptindx="FB7_2_2"/></d2></equation><equation id="cntLTimer9_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_3_1"/><eq_pterm ptindx="FB7_3_2"/><eq_pterm ptindx="FB7_3_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_3_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer8_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_4_1"/><eq_pterm ptindx="FB7_4_2"/><eq_pterm ptindx="FB7_4_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_4_4"/></ce><prld ptindx="GND"/></equation><equation id="RA7_SPECSIG" userloc="P52"><d2><eq_pterm ptindx="FB7_5_1"/><eq_pterm ptindx="FB7_5_2"/></d2></equation><equation id="RA0_SPECSIG" userloc="P53"><d2><eq_pterm ptindx="FB7_6_1"/><eq_pterm ptindx="FB7_6_2"/></d2></equation><equation id="cntLTimer7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_7_1"/><eq_pterm ptindx="FB7_7_2"/><eq_pterm ptindx="FB7_7_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_7_4"/></ce><prld ptindx="GND"/></equation><equation id="RA8_SPECSIG" userloc="P54"><d2><eq_pterm ptindx="FB7_8_1"/><eq_pterm ptindx="FB7_8_2"/><eq_pterm ptindx="FB7_8_3"/><eq_pterm ptindx="FB7_8_4"/><eq_pterm ptindx="FB7_8_5"/><eq_pterm import="1" ptindx="FB7_7_5"/><eq_pterm import="1" ptindx="FB7_9_2"/></d2></equation><equation id="RA10_SPECSIG" userloc="P55"><d2><eq_pterm ptindx="FB7_9_1"/></d2></equation><equation id="cntLTimer6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_10_1"/><eq_pterm ptindx="FB7_10_2"/><eq_pterm ptindx="FB7_10_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_10_4"/></ce><prld ptindx="GND"/></equation><equation id="RA9_SPECSIG" userloc="P56"><d2><eq_pterm ptindx="FB7_11_1"/><eq_pterm ptindx="FB7_11_2"/></d2></equation><equation id="C25MEN" userloc="P58"><d2><eq_pterm ptindx="VCC"/></d2></equation><equation id="cntLTimer5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_13_1"/><eq_pterm ptindx="FB7_13_2"/><eq_pterm ptindx="FB7_13_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_13_4"/></ce><prld ptindx="GND"/></equation><equation id="C20MEN" userloc="P59"><d2><eq_pterm ptindx="VCC"/></d2></equation><equation id="cntLTimer4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_15_1"/><eq_pterm ptindx="FB7_15_2"/><eq_pterm ptindx="FB7_15_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_15_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer12_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_16_1"/><eq_pterm ptindx="FB7_16_2"/><eq_pterm ptindx="FB7_16_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_16_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer11_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_17_1"/><eq_pterm ptindx="FB7_17_2"/><eq_pterm ptindx="FB7_17_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_17_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer10_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_18_1"/><eq_pterm ptindx="FB7_18_2"/><eq_pterm ptindx="FB7_18_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_18_4"/></ce><prld ptindx="GND"/></equation></fblock><fblock id="FB8" inputUse="34" pinUse="7"><macrocell id="FB8_MC1" sigUse="4" signal="cntPORS_FSM_FFd1_SPECSIG"><pterms pt1="FB8_1_1" pt2="FB8_1_2" pt3="FB8_1_3"/></macrocell><macrocell id="FB8_MC2" pin="FB8_MC2_PIN63" sigUse="1" signal="RA11_SPECSIG"><pterms pt1="FB8_2_1" pt2="FB8_2_2" pt3="FB8_2_3" pt4="FB8_2_4" pt5="FB8_2_5"/></macrocell><macrocell id="FB8_MC3" sigUse="11" signal="ramRS_FSM_FFd3_SPECSIG"><pterms pt1="FB8_3_1" pt2="FB8_3_2" pt3="FB8_3_3" pt4="FB8_3_4" pt5="FB8_3_5"/></macrocell><macrocell id="FB8_MC4"/><macrocell id="FB8_MC5" pin="FB8_MC5_PIN64" sigUse="7" signal="nRAS"><pterms pt1="FB8_5_1" pt2="FB8_5_2" pt3="FB8_5_3" pt4="FB8_5_4"/></macrocell><macrocell id="FB8_MC6" pin="FB8_MC6_PIN65" sigUse="4" signal="nRAMLWE"><pterms pt1="FB8_6_1" pt2="FB8_6_2" pt3="FB8_6_3" pt4="FB8_6_4" pt5="FB8_6_5"/></macrocell><macrocell id="FB8_MC7" sigUse="19" signal="iobsPS_FSM_FFd2_SPECSIG"><pterms pt1="FB8_7_1" pt2="FB8_7_2" pt3="FB8_7_3" pt4="FB8_7_4" pt5="FB8_7_5"/></macrocell><macrocell id="FB8_MC8" pin="FB8_MC8_PIN66" sigUse="4" signal="nRAMUWE"><pterms pt1="FB8_8_1" pt2="FB8_8_2" pt3="FB8_8_3" pt4="FB8_8_4" pt5="FB8_8_5"/></macrocell><macrocell id="FB8_MC9" pin="FB8_MC9_PIN67"><pterms pt1="FB8_9_1" pt2="FB8_9_2" pt3="FB8_9_3" pt4="FB8_9_4"/></macrocell><macrocell id="FB8_MC10" sigUse="18" signal="iobsLoad1_SPECSIG"><pterms pt1="FB8_10_1" pt2="FB8_10_2" pt3="FB8_10_3" pt4="FB8_10_4" pt5="FB8_10_5"/></macrocell><macrocell id="FB8_MC11" pin="FB8_MC11_PIN68"><pterms pt1="FB8_11_1" pt2="FB8_11_2" pt3="FB8_11_3" pt4="FB8_11_4" pt5="FB8_11_5"/></macrocell><macrocell id="FB8_MC12" pin="FB8_MC12_PIN70" sigUse="8" signal="nBERR_FSB"><pterms pt1="FB8_12_1" pt2="FB8_12_2" pt3="FB8_12_3" pt4="FB8_12_4" pt5="FB8_12_5"/></macrocell><macrocell id="FB8_MC13"><pterms pt1="FB8_13_1" pt2="FB8_13_2" pt3="FB8_13_3" pt4="FB8_13_4" pt5="FB8_13_5"/></macrocell><macrocell id="FB8_MC14" pin="FB8_MC14_PIN71" sigUse="19" signal="iobsIOREQ_SPECSIG"><pterms pt1="FB8_14_1" pt2="FB8_14_2" pt3="FB8_14_3" pt4="FB8_14_4" pt5="FB8_14_5"/></macrocell><macrocell id="FB8_MC15" pin="FB8_MC15_PIN72" sigUse="4" signal="nBR_IOB"><pterms pt1="FB8_15_1" pt2="FB8_15_2" pt3="FB8_15_3" pt4="FB8_15_4" pt5="FB8_15_5"/></macrocell><macrocell id="FB8_MC16"><pterms pt1="FB8_16_1" pt2="FB8_16_2" pt3="FB8_16_3" pt4="FB8_16_4" pt5="FB8_16_5"/></macrocell><macrocell id="FB8_MC17" pin="FB8_MC17_PIN73" sigUse="18" signal="iobsOnce_SPECSIG"><pterms pt1="FB8_17_1" pt2="FB8_17_2" pt3="FB8_17_3" pt4="FB8_17_4" pt5="FB8_17_5"/></macrocell><macrocell id="FB8_MC18"><pterms pt1="FB8_18_1" pt2="FB8_18_2" pt3="FB8_18_3" pt4="FB8_18_4" pt5="FB8_18_5"/></macrocell><fbinput id="FB8_I1" signal="A_FSB13_SPECSIG"/><fbinput id="FB8_I2" signal="A_FSB14_SPECSIG"/><fbinput id="FB8_I3" signal="A_FSB16_SPECSIG"/><fbinput id="FB8_I4" signal="A_FSB17_SPECSIG"/><fbinput id="FB8_I5" signal="A_FSB18_SPECSIG"/><fbinput id="FB8_I6" signal="A_FSB19_SPECSIG"/><fbinput id="FB8_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB8_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB8_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB8_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB8_I11" signal="cntIPL2r_SPECSIG"/><fbinput id="FB8_I12" signal="cntLTimer13_SPECSIG"/><fbinput id="FB8_I13" signal="cntPORS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I14" signal="cntPORS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I15" signal="csnOverlay1_SPECSIG"/><fbinput id="FB8_I16" signal="fsbASrf_SPECSIG"/><fbinput id="FB8_I17" signal="iobmIOBERR_SPECSIG"/><fbinput id="FB8_I18" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB8_I19" signal="iobsOnce_SPECSIG"/><fbinput id="FB8_I20" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I21" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I22" signal="nADoutLE1"/><fbinput id="FB8_I23" signal="nAS_FSB"/><fbinput id="FB8_I24" signal="nBERR_FSB"/><fbinput id="FB8_I25" signal="nBR_IOB"/><fbinput id="FB8_I26" signal="nLDS_FSB"/><fbinput id="FB8_I27" signal="nUDS_FSB"/><fbinput id="FB8_I28" signal="nWE_FSB"/><fbinput id="FB8_I29" signal="ramRAMEN_SPECSIG"/><fbinput id="FB8_I30" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I31" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I32" signal="ramRS_FSM_FFd3_SPECSIG"/><fbinput id="FB8_I33" signal="ramRefRAS_SPECSIG"/><fbinput id="FB8_I34" signal="ramRefUrgent_SPECSIG"/><pterm id="FB8_1_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG"/><signal id="cntIPL2r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_1_2"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_1_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_2_1"><signal id="A_FSB19_SPECSIG"/></pterm><pterm id="FB8_2_2"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_2_3"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_2_4"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_2_5"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_3_1"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB8_3_2"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB8_3_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_3_4"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_3_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_5_1"><signal id="ramRefRAS_SPECSIG"/></pterm><pterm id="FB8_5_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_5_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_5_4"><signal id="nWE_FSB" negated="ON"/><signal id="nLDS_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_6_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_6_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_6_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_6_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_6_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_7_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_7_2"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB8_7_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_7_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_7_5"><signal id="nAS_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_1"><signal id="nWE_FSB" negated="ON"/><signal id="nUDS_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_8_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_9_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/></pterm><pterm id="FB8_9_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_9_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/></pterm><pterm id="FB8_9_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/></pterm><pterm id="FB8_10_1"><signal id="iobsOnce_SPECSIG"/></pterm><pterm id="FB8_10_2"><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_10_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB8_10_4"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_10_5"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB8_11_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB8_12_1"><signal id="nAS_FSB"/><signal id="nBERR_FSB" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_2"><signal id="iobsOnce_SPECSIG"/><signal id="nBERR_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_12_3"><signal id="iobsOnce_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="nBERR_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_12_4"><signal id="iobsOnce_SPECSIG"/><signal id="nBERR_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_12_5"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_13_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_13_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_13_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_13_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_13_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_14_1"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_14_2"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_14_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_14_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_14_5"><signal id="nAS_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_15_1"><signal id="nBR_IOB"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_2"><signal id="nBR_IOB" negated="ON"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG"/><signal id="cntIPL2r_SPECSIG"/></pterm><pterm id="FB8_15_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_15_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_15_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_16_1"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_16_2"><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_16_3"><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_16_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_2"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_17_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_4"><signal id="A_FSB22_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_17_5"><signal id="A_FSB22_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_18_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_18_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_18_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_18_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><equation id="cntPORS_FSM_FFd1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB8_1_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="RA11_SPECSIG" userloc="P63"><d2><eq_pterm ptindx="FB8_2_1"/></d2></equation><equation id="ramRS_FSM_FFd3_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB8_3_1"/><eq_pterm ptindx="FB8_3_2"/><eq_pterm ptindx="FB8_3_3"/><eq_pterm ptindx="FB8_3_4"/><eq_pterm ptindx="FB8_3_5"/><eq_pterm import="1" ptindx="FB8_2_2"/><eq_pterm import="1" ptindx="FB8_2_3"/><eq_pterm import="1" ptindx="FB8_2_4"/><eq_pterm import="1" ptindx="FB8_2_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nRAS" negated="ON" userloc="P64"><d2><eq_pterm ptindx="FB8_5_1"/><eq_pterm ptindx="FB8_5_2"/><eq_pterm ptindx="FB8_5_3"/></d2></equation><equation id="nRAMLWE" negated="ON" userloc="P65"><d2><eq_pterm import="1" ptindx="FB8_5_4"/></d2></equation><equation id="iobsPS_FSM_FFd2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_7_1"/><eq_pterm ptindx="FB8_7_2"/><eq_pterm ptindx="FB8_7_3"/><eq_pterm ptindx="FB8_7_4"/><eq_pterm ptindx="FB8_7_5"/><eq_pterm import="1" ptindx="FB8_6_1"/><eq_pterm import="1" ptindx="FB8_6_2"/><eq_pterm import="1" ptindx="FB8_6_3"/><eq_pterm import="1" ptindx="FB8_6_4"/><eq_pterm import="1" ptindx="FB8_6_5"/><eq_pterm import="1" ptindx="FB8_8_2"/><eq_pterm import="1" ptindx="FB8_8_3"/><eq_pterm import="1" ptindx="FB8_8_4"/><eq_pterm import="1" ptindx="FB8_8_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nRAMUWE" negated="ON" userloc="P66"><d2><eq_pterm ptindx="FB8_8_1"/></d2></equation><equation id="iobsLoad1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_10_1"/><eq_pterm ptindx="FB8_10_2"/><eq_pterm ptindx="FB8_10_3"/><eq_pterm ptindx="FB8_10_4"/><eq_pterm ptindx="FB8_10_5"/><eq_pterm import="1" ptindx="FB8_9_1"/><eq_pterm import="1" ptindx="FB8_9_2"/><eq_pterm import="1" ptindx="FB8_9_3"/><eq_pterm import="1" ptindx="FB8_9_4"/><eq_pterm import="1" ptindx="FB8_11_1"/><eq_pterm import="1" ptindx="FB8_11_2"/><eq_pterm import="1" ptindx="FB8_11_3"/><eq_pterm import="1" ptindx="FB8_11_4"/><eq_pterm import="1" ptindx="FB8_11_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nBERR_FSB" regUse="T" userloc="P70"><d2><eq_pterm ptindx="FB8_12_1"/><eq_pterm ptindx="FB8_12_2"/><eq_pterm ptindx="FB8_12_3"/><eq_pterm ptindx="FB8_12_4"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOREQ_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_14_1"/><eq_pterm ptindx="FB8_14_2"/><eq_pterm ptindx="FB8_14_3"/><eq_pterm ptindx="FB8_14_4"/><eq_pterm ptindx="FB8_14_5"/><eq_pterm import="1" ptindx="FB8_13_1"/><eq_pterm import="1" ptindx="FB8_13_2"/><eq_pterm import="1" ptindx="FB8_13_3"/><eq_pterm import="1" ptindx="FB8_13_4"/><eq_pterm import="1" ptindx="FB8_13_5"/><eq_pterm import="1" ptindx="FB8_12_5"/><eq_pterm import="1" ptindx="FB8_15_3"/><eq_pterm import="1" ptindx="FB8_15_4"/><eq_pterm import="1" ptindx="FB8_15_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nBR_IOB" regUse="T" userloc="P72"><d2><eq_pterm ptindx="FB8_15_1"/><eq_pterm ptindx="FB8_15_2"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="iobsOnce_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_17_1"/><eq_pterm ptindx="FB8_17_2"/><eq_pterm ptindx="FB8_17_3"/><eq_pterm ptindx="FB8_17_4"/><eq_pterm ptindx="FB8_17_5"/><eq_pterm import="1" ptindx="FB8_16_1"/><eq_pterm import="1" ptindx="FB8_16_2"/><eq_pterm import="1" ptindx="FB8_16_3"/><eq_pterm import="1" ptindx="FB8_16_4"/><eq_pterm import="1" ptindx="FB8_16_5"/><eq_pterm import="1" ptindx="FB8_18_1"/><eq_pterm import="1" ptindx="FB8_18_2"/><eq_pterm import="1" ptindx="FB8_18_3"/><eq_pterm import="1" ptindx="FB8_18_4"/><eq_pterm import="1" ptindx="FB8_18_5"/><eq_pterm import="1" ptindx="FB8_1_2"/><eq_pterm import="1" ptindx="FB8_1_3"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation></fblock><vcc/><gnd/><messages><warning>Cpld - Unable to retrieve the path to the iSE Project Repository. Will   use the default filename of 'WarpSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'C16M' based upon the LOC   constraint 'P22'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'C8M' based upon the LOC   constraint 'P23'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'FCLK' based upon the LOC   constraint 'P27'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW&lt;1&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW&lt;2&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW&lt;3&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning></messages><compOpts exhaust="OFF" gclkopt="ON" gsropt="ON" gtsopt="ON" ignorets="OFF" inputs="54" keepio="OFF" loc="ON" mlopt="ON" optimize="SPEED" part="xc95144xl-10-TQ100" power="STD" prld="LOW" pterms="50" slew="FAST" terminate="KEEPER" unused="OFF" wysiwyg="OFF"/><specSig signal="A_FSB9_SPECSIG" value="A_FSB&lt;9&gt;"/><specSig signal="A_FSB8_SPECSIG" value="A_FSB&lt;8&gt;"/><specSig signal="A_FSB15_SPECSIG" value="A_FSB&lt;15&gt;"/><specSig signal="A_FSB14_SPECSIG" value="A_FSB&lt;14&gt;"/><specSig signal="A_FSB13_SPECSIG" value="A_FSB&lt;13&gt;"/><specSig signal="A_FSB12_SPECSIG" value="A_FSB&lt;12&gt;"/><specSig signal="A_FSB11_SPECSIG" value="A_FSB&lt;11&gt;"/><specSig signal="A_FSB10_SPECSIG" value="A_FSB&lt;10&gt;"/><specSig signal="A_FSB23_SPECSIG" value="A_FSB&lt;23&gt;"/><specSig signal="A_FSB22_SPECSIG" value="A_FSB&lt;22&gt;"/><specSig signal="A_FSB21_SPECSIG" value="A_FSB&lt;21&gt;"/><specSig signal="A_FSB20_SPECSIG" value="A_FSB&lt;20&gt;"/><specSig signal="A_FSB19_SPECSIG" value="A_FSB&lt;19&gt;"/><specSig signal="A_FSB18_SPECSIG" value="A_FSB&lt;18&gt;"/><specSig signal="A_FSB17_SPECSIG" value="A_FSB&lt;17&gt;"/><specSig signal="A_FSB16_SPECSIG" value="A_FSB&lt;16&gt;"/><specSig signal="nRESPIN_SPECSIG" value="nRES.PIN"/><specSig signal="A_FSB1_SPECSIG" value="A_FSB&lt;1&gt;"/><specSig signal="A_FSB2_SPECSIG" value="A_FSB&lt;2&gt;"/><specSig signal="A_FSB3_SPECSIG" value="A_FSB&lt;3&gt;"/><specSig signal="A_FSB4_SPECSIG" value="A_FSB&lt;4&gt;"/><specSig signal="A_FSB5_SPECSIG" value="A_FSB&lt;5&gt;"/><specSig signal="A_FSB6_SPECSIG" value="A_FSB&lt;6&gt;"/><specSig signal="A_FSB7_SPECSIG" value="A_FSB&lt;7&gt;"/><specSig signal="GCKI_SPECSIG" value="GCK/I"/><specSig signal="IO_SPECSIG" value="I/O"/><specSig signal="b_SPECSIG" value="(b)"/><specSig signal="csnOverlay0_SPECSIG" value="cs/nOverlay0"/><specSig signal="RA4_SPECSIG" value="RA&lt;4&gt;"/><specSig signal="RA3_SPECSIG" value="RA&lt;3&gt;"/><specSig signal="RA5_SPECSIG" value="RA&lt;5&gt;"/><specSig signal="RA2_SPECSIG" value="RA&lt;2&gt;"/><specSig signal="RA6_SPECSIG" value="RA&lt;6&gt;"/><specSig signal="ramRAMReady_SPECSIG" value="ram/RAMReady"/><specSig signal="RA1_SPECSIG" value="RA&lt;1&gt;"/><specSig signal="RA7_SPECSIG" value="RA&lt;7&gt;"/><specSig signal="RA0_SPECSIG" value="RA&lt;0&gt;"/><specSig signal="RA8_SPECSIG" value="RA&lt;8&gt;"/><specSig signal="RA10_SPECSIG" value="RA&lt;10&gt;"/><specSig signal="RA9_SPECSIG" value="RA&lt;9&gt;"/><specSig signal="cntLTimer4_SPECSIG" value="cnt/LTimer&lt;4&gt;"/><specSig signal="cntLTimer11_SPECSIG" value="cnt/LTimer&lt;11&gt;"/><specSig signal="RA11_SPECSIG" value="RA&lt;11&gt;"/><specSig signal="iobsIOREQ_SPECSIG" value="iobs/IOREQ"/><specSig signal="iobmnASr_SPECSIG" value="iobm/nASr"/><specSig signal="iobmVPArr_SPECSIG" value="iobm/VPArr"/><specSig signal="iobmVPArf_SPECSIG" value="iobm/VPArf"/><specSig signal="iobmRESrr_SPECSIG" value="iobm/RESrr"/><specSig signal="iobmRESrf_SPECSIG" value="iobm/RESrf"/><specSig signal="iobmIOREQr_SPECSIG" value="iobm/IOREQr"/><specSig signal="iobmEr2_SPECSIG" value="iobm/Er2"/><specSig signal="iobmEr_SPECSIG" value="iobm/Er"/><specSig signal="iobmDTACKrr_SPECSIG" value="iobm/DTACKrr"/><specSig signal="iobmDTACKrf_SPECSIG" value="iobm/DTACKrf"/><specSig signal="iobmBERRrr_SPECSIG" value="iobm/BERRrr"/><specSig signal="iobmBERRrf_SPECSIG" value="iobm/BERRrf"/><specSig signal="cntIPL2r_SPECSIG" value="cnt/IPL2r"/><specSig signal="iobmIOS_FSM_FFd1_SPECSIG" value="iobm/IOS_FSM_FFd1"/><specSig signal="iobmBG_SPECSIG" value="iobm/BG"/><specSig signal="iobsIOU0_SPECSIG" value="iobs/IOU0"/><specSig signal="iobsIOL0_SPECSIG" value="iobs/IOL0"/><specSig signal="iobmIOS_FSM_FFd3_SPECSIG" value="iobm/IOS_FSM_FFd3"/><specSig signal="iobmIOS_FSM_FFd2_SPECSIG" value="iobm/IOS_FSM_FFd2"/><specSig signal="iobsIOL1_SPECSIG" value="iobs/IOL1"/><specSig signal="iobsIOU1_SPECSIG" value="iobs/IOU1"/><specSig signal="iobsPS_FSM_FFd1_SPECSIG" value="iobs/PS_FSM_FFd1"/><specSig signal="iobsPS_FSM_FFd2_SPECSIG" value="iobs/PS_FSM_FFd2"/><specSig signal="ramRegUrgentSync_SPECSIG" value="ram/RegUrgentSync"/><specSig signal="ramRefUrgent_SPECSIG" value="ram/RefUrgent"/><specSig signal="ramRefReqSync_SPECSIG" value="ram/RefReqSync"/><specSig signal="ramRefReq_SPECSIG" value="ram/RefReq"/><specSig signal="ramRefRAS_SPECSIG" value="ram/RefRAS"/><specSig signal="ramBACTr_SPECSIG" value="ram/BACTr"/><specSig signal="iobsIOACTr_SPECSIG" value="iobs/IOACTr"/><specSig signal="iobsALE0_SPECSIG" value="iobs/ALE0"/><specSig signal="fsbASrf_SPECSIG" value="fsb/ASrf"/><specSig signal="cntRefReq_SPECSIG" value="cnt/RefReq"/><specSig signal="cntRefUrgent_SPECSIG" value="cnt/RefUrgent"/><specSig signal="iobmIOACT_SPECSIG" value="iobm/IOACT"/><specSig signal="iobsLoad1_SPECSIG" value="iobs/Load1"/><specSig signal="ramRS_FSM_FFd1_SPECSIG" value="ram/RS_FSM_FFd1"/><specSig signal="ramRS_FSM_FFd2_SPECSIG" value="ram/RS_FSM_FFd2"/><specSig signal="ramRefDone_SPECSIG" value="ram/RefDone"/><specSig signal="fsbVPA_SPECSIG" value="fsb/VPA"/><specSig signal="iobsClear1_SPECSIG" value="iobs/Clear1"/><specSig signal="fsbReady0r_SPECSIG" value="fsb/Ready0r"/><specSig signal="iobsIOReady_SPECSIG" value="iobs/IOReady"/><specSig signal="fsbReady1r_SPECSIG" value="fsb/Ready1r"/><specSig signal="iobsIORW1_SPECSIG" value="iobs/IORW1"/><specSig signal="iobsIORW0_SPECSIG" value="iobs/IORW0"/><specSig signal="csnOverlay1_SPECSIG" value="cs/nOverlay1"/><specSig signal="iobmIOBERR_SPECSIG" value="iobm/IOBERR"/><specSig signal="iobsOnce_SPECSIG" value="iobs/Once"/><specSig signal="cntnRESout_SPECSIG" value="cnt/nRESout"/><specSig signal="cntTimerTC_SPECSIG" value="cnt/TimerTC"/><specSig signal="cntTimer0_SPECSIG" value="cnt/Timer&lt;0&gt;"/><specSig signal="cntPORS_FSM_FFd2_SPECSIG" value="cnt/PORS_FSM_FFd2"/><specSig signal="cntLTimer0_SPECSIG" value="cnt/LTimer&lt;0&gt;"/><specSig signal="cntTimer3_SPECSIG" value="cnt/Timer&lt;3&gt;"/><specSig signal="cntTimer2_SPECSIG" value="cnt/Timer&lt;2&gt;"/><specSig signal="cntTimer1_SPECSIG" value="cnt/Timer&lt;1&gt;"/><specSig signal="cntLTimer3_SPECSIG" value="cnt/LTimer&lt;3&gt;"/><specSig signal="cntLTimer2_SPECSIG" value="cnt/LTimer&lt;2&gt;"/><specSig signal="cntLTimer1_SPECSIG" value="cnt/LTimer&lt;1&gt;"/><specSig signal="cntLTimer13_SPECSIG" value="cnt/LTimer&lt;13&gt;"/><specSig signal="cntPORS_FSM_FFd1_SPECSIG" value="cnt/PORS_FSM_FFd1"/><specSig signal="iobmDoutOE_SPECSIG" value="iobm/DoutOE"/><specSig signal="ramRASEL_SPECSIG" value="ram/RASEL"/><specSig signal="ramRAMEN_SPECSIG" value="ram/RAMEN"/><specSig signal="ramRS_FSM_FFd3_SPECSIG" value="ram/RS_FSM_FFd3"/><specSig signal="iobmETACK_SPECSIG" value="iobm/ETACK"/><specSig signal="iobmALE0_SPECSIG" value="iobm/ALE0"/><specSig signal="iobmES3_SPECSIG" value="iobm/ES&lt;3&gt;"/><specSig signal="iobmES1_SPECSIG" value="iobm/ES&lt;1&gt;"/><specSig signal="iobmES0_SPECSIG" value="iobm/ES&lt;0&gt;"/><specSig signal="iobmES4_SPECSIG" value="iobm/ES&lt;4&gt;"/><specSig signal="iobmES2_SPECSIG" value="iobm/ES&lt;2&gt;"/><specSig signal="cntLTimer9_SPECSIG" value="cnt/LTimer&lt;9&gt;"/><specSig signal="cntLTimer8_SPECSIG" value="cnt/LTimer&lt;8&gt;"/><specSig signal="cntLTimer7_SPECSIG" value="cnt/LTimer&lt;7&gt;"/><specSig signal="cntLTimer6_SPECSIG" value="cnt/LTimer&lt;6&gt;"/><specSig signal="cntLTimer5_SPECSIG" value="cnt/LTimer&lt;5&gt;"/><specSig signal="cntLTimer12_SPECSIG" value="cnt/LTimer&lt;12&gt;"/><specSig signal="cntLTimer10_SPECSIG" value="cnt/LTimer&lt;10&gt;"/></document>
+<document><ascFile>WarpSE.rpt</ascFile><devFile>C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chp</devFile><mfdFile>WarpSE.mfd</mfdFile><htmlFile logic_legend="logiclegend.htm" logo="xc9500xl_logo.jpg" pin_legend="pinlegend.htm"/><header date=" 3-25-2023" design="WarpSE" device="XC95144XL" eqnType="2" pkg="TQ100" speed="-10" status="1" statusStr="Successful" swVersion="P.20131013" time="  0:52AM" version="1.0"/><inputs id="A_FSB9_SPECSIG" userloc="P7"/><inputs id="A_FSB8_SPECSIG" userloc="P6"/><inputs id="A_FSB15_SPECSIG" userloc="P13"/><inputs id="A_FSB14_SPECSIG" userloc="P12"/><inputs id="A_FSB13_SPECSIG" userloc="P11"/><inputs id="A_FSB12_SPECSIG" userloc="P10"/><inputs id="A_FSB11_SPECSIG" userloc="P9"/><inputs id="A_FSB10_SPECSIG" userloc="P8"/><inputs id="A_FSB23_SPECSIG" userloc="P24"/><inputs id="A_FSB22_SPECSIG" userloc="P20"/><inputs id="A_FSB21_SPECSIG" userloc="P19"/><inputs id="A_FSB20_SPECSIG" userloc="P18"/><inputs id="A_FSB19_SPECSIG" userloc="P17"/><inputs id="A_FSB18_SPECSIG" userloc="P16"/><inputs id="A_FSB17_SPECSIG" userloc="P15"/><inputs id="A_FSB16_SPECSIG" userloc="P14"/><inputs id="nWE_FSB" userloc="P29"/><inputs id="nAS_FSB" userloc="P32"/><inputs id="nRESPIN_SPECSIG" userloc="P91"/><inputs id="nLDS_FSB" userloc="P30"/><inputs id="nUDS_FSB" userloc="P33"/><inputs id="nBERR_IOB" userloc="P76"/><inputs id="E" userloc="P25"/><inputs id="nIPL2" userloc="P92"/><inputs id="nDTACK_IOB" userloc="P78"/><inputs id="nVPA_IOB" userloc="P77"/><inputs id="A_FSB1_SPECSIG" userloc="P94"/><inputs id="A_FSB2_SPECSIG" userloc="P95"/><inputs id="A_FSB3_SPECSIG" userloc="P96"/><inputs id="A_FSB4_SPECSIG" userloc="P97"/><inputs id="A_FSB5_SPECSIG" userloc="P2"/><inputs id="A_FSB6_SPECSIG" userloc="P3"/><inputs id="A_FSB7_SPECSIG" userloc="P4"/><global_inputs id="C16M" pinnum="GCK1" use="GCK1" userloc="P22"/><global_inputs id="C8M" pinnum="GCK2" use="GCK2" userloc="P23"/><global_inputs id="FCLK" pinnum="GCK3" use="GCK3" userloc="P27"/><pin id="FB1_MC2_PIN11" pinnum="11" signal="A_FSB13_SPECSIG" use="I"/><pin id="FB1_MC3_PIN12" pinnum="12" signal="A_FSB14_SPECSIG" use="I"/><pin id="FB1_MC5_PIN13" pinnum="13" signal="A_FSB15_SPECSIG" use="I"/><pin id="FB1_MC6_PIN14" pinnum="14" signal="A_FSB16_SPECSIG" use="I"/><pin id="FB1_MC8_PIN15" pinnum="15" signal="A_FSB17_SPECSIG" use="I"/><pin id="FB1_MC9_PIN16" pinnum="16" signal="A_FSB18_SPECSIG" use="I"/><pin id="FB1_MC11_PIN17" pinnum="17" signal="A_FSB19_SPECSIG" use="I"/><pin id="FB1_MC12_PIN18" pinnum="18" signal="A_FSB20_SPECSIG" use="I"/><pin id="FB1_MC14_PIN19" pinnum="19" signal="A_FSB21_SPECSIG" use="I"/><pin id="FB1_MC15_PIN20" pinnum="20" signal="A_FSB22_SPECSIG" use="I"/><pin id="FB1_MC17_PIN22" pinnum="22" signal="C16M" use="GCK"/><pin id="FB2_MC2_PIN99" pinnum="99"/><pin id="FB2_MC5_PIN1" pinnum="1"/><pin id="FB2_MC6_PIN2" pinnum="2" signal="A_FSB5_SPECSIG" use="I"/><pin id="FB2_MC8_PIN3" pinnum="3" signal="A_FSB6_SPECSIG" use="I"/><pin id="FB2_MC9_PIN4" pinnum="4" signal="A_FSB7_SPECSIG" use="I"/><pin id="FB2_MC11_PIN6" pinnum="6" signal="A_FSB8_SPECSIG" use="I"/><pin id="FB2_MC12_PIN7" pinnum="7" signal="A_FSB9_SPECSIG" use="I"/><pin id="FB2_MC14_PIN8" pinnum="8" signal="A_FSB10_SPECSIG" use="I"/><pin id="FB2_MC15_PIN9" pinnum="9" signal="A_FSB11_SPECSIG" use="I"/><pin id="FB2_MC17_PIN10" pinnum="10" signal="A_FSB12_SPECSIG" use="I"/><pin id="FB3_MC2_PIN23" pinnum="23" signal="C8M" use="GCKI_SPECSIG"/><pin id="FB3_MC5_PIN24" pinnum="24" signal="A_FSB23_SPECSIG" use="I"/><pin id="FB3_MC6_PIN25" pinnum="25" signal="E" use="I"/><pin id="FB3_MC8_PIN27" pinnum="27" signal="FCLK" use="GCK"/><pin id="FB3_MC9_PIN28" pinnum="28" signal="nDTACK_FSB" use="O"/><pin id="FB3_MC11_PIN29" pinnum="29" signal="nWE_FSB" use="I"/><pin id="FB3_MC12_PIN30" pinnum="30" signal="nLDS_FSB" use="I"/><pin id="FB3_MC14_PIN32" pinnum="32" signal="nAS_FSB" use="I"/><pin id="FB3_MC15_PIN33" pinnum="33" signal="nUDS_FSB" use="I"/><pin id="FB3_MC17_PIN34" pinnum="34" signal="nROMWE" use="O"/><pin id="FB4_MC2_PIN87" pinnum="87" signal="nAoutOE" use="O"/><pin id="FB4_MC5_PIN89" pinnum="89" signal="nDoutOE" use="O"/><pin id="FB4_MC6_PIN90" pinnum="90" signal="nDinOE" use="O"/><pin id="FB4_MC8_PIN91" pinnum="91" signal="nRES" use="IO_SPECSIG"/><pin id="FB4_MC9_PIN92" pinnum="92" signal="nIPL2" use="I"/><pin id="FB4_MC11_PIN93" pinnum="93" signal="nVPA_FSB" use="O"/><pin id="FB4_MC12_PIN94" pinnum="94" signal="A_FSB1_SPECSIG" use="I"/><pin id="FB4_MC14_PIN95" pinnum="95" signal="A_FSB2_SPECSIG" use="I"/><pin id="FB4_MC15_PIN96" pinnum="96" signal="A_FSB3_SPECSIG" use="I"/><pin id="FB4_MC17_PIN97" pinnum="97" signal="A_FSB4_SPECSIG" use="I"/><pin id="FB5_MC2_PIN35" pinnum="35" signal="nROMCS" use="O"/><pin id="FB5_MC5_PIN36" pinnum="36" signal="nCAS" use="O"/><pin id="FB5_MC6_PIN37" pinnum="37" signal="nOE" use="O"/><pin id="FB5_MC8_PIN39" pinnum="39" signal="csnOverlay0_SPECSIG" use="b_SPECSIG"/><pin id="FB5_MC9_PIN40" pinnum="40" signal="RA4_SPECSIG" use="O"/><pin id="FB5_MC11_PIN41" pinnum="41" signal="RA3_SPECSIG" use="O"/><pin id="FB5_MC12_PIN42" pinnum="42" signal="RA5_SPECSIG" use="O"/><pin id="FB5_MC14_PIN43" pinnum="43" signal="RA2_SPECSIG" use="O"/><pin id="FB5_MC15_PIN46" pinnum="46" signal="RA6_SPECSIG" use="O"/><pin id="FB5_MC17_PIN49" pinnum="49" signal="ramRAMReady_SPECSIG" use="b_SPECSIG"/><pin id="FB6_MC2_PIN74" pinnum="74" signal="nVMA_IOB" use="O"/><pin id="FB6_MC5_PIN76" pinnum="76" signal="nBERR_IOB" use="I"/><pin id="FB6_MC6_PIN77" pinnum="77" signal="nVPA_IOB" use="I"/><pin id="FB6_MC8_PIN78" pinnum="78" signal="nDTACK_IOB" use="I"/><pin id="FB6_MC9_PIN79" pinnum="79" signal="nLDS_IOB" use="O"/><pin id="FB6_MC11_PIN80" pinnum="80" signal="nUDS_IOB" use="O"/><pin id="FB6_MC12_PIN81" pinnum="81" signal="nAS_IOB" use="O"/><pin id="FB6_MC14_PIN82" pinnum="82" signal="nADoutLE1" use="O"/><pin id="FB6_MC15_PIN85" pinnum="85" signal="nADoutLE0" use="O"/><pin id="FB6_MC17_PIN86" pinnum="86" signal="nDinLE" use="O"/><pin id="FB7_MC2_PIN50" pinnum="50" signal="RA1_SPECSIG" use="O"/><pin id="FB7_MC5_PIN52" pinnum="52" signal="RA7_SPECSIG" use="O"/><pin id="FB7_MC6_PIN53" pinnum="53" signal="RA0_SPECSIG" use="O"/><pin id="FB7_MC8_PIN54" pinnum="54" signal="RA8_SPECSIG" use="O"/><pin id="FB7_MC9_PIN55" pinnum="55" signal="RA10_SPECSIG" use="O"/><pin id="FB7_MC11_PIN56" pinnum="56" signal="RA9_SPECSIG" use="O"/><pin id="FB7_MC12_PIN58" pinnum="58" signal="C25MEN" use="O"/><pin id="FB7_MC14_PIN59" pinnum="59" signal="C20MEN" use="O"/><pin id="FB7_MC15_PIN60" pinnum="60" signal="cntLTimer4_SPECSIG" use="b_SPECSIG"/><pin id="FB7_MC17_PIN61" pinnum="61" signal="cntLTimer11_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC2_PIN63" pinnum="63" signal="RA11_SPECSIG" use="O"/><pin id="FB8_MC5_PIN64" pinnum="64" signal="nRAS" use="O"/><pin id="FB8_MC6_PIN65" pinnum="65" signal="nRAMLWE" use="O"/><pin id="FB8_MC8_PIN66" pinnum="66" signal="nRAMUWE" use="O"/><pin id="FB8_MC9_PIN67" pinnum="67" signal="ramRS_FSM_FFd1_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC11_PIN68" pinnum="68" signal="ramRS_FSM_FFd3_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC12_PIN70" pinnum="70" signal="nBERR_FSB" use="O"/><pin id="FB8_MC14_PIN71" pinnum="71" signal="iobsPS_FSM_FFd2_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC15_PIN72" pinnum="72" signal="nBR_IOB" use="O"/><pin id="FB8_MC17_PIN73" pinnum="73" signal="ramBACTr_SPECSIG" use="b_SPECSIG"/><fblock id="FB1" inputUse="28" pinUse="10"><macrocell id="FB1_MC1" sigUse="1" signal="ramRegUrgentSync_SPECSIG"><pterms pt1="FB1_1_1"/></macrocell><macrocell id="FB1_MC2" pin="FB1_MC2_PIN11" sigUse="2" signal="ramRefUrgent_SPECSIG"><pterms pt1="FB1_2_1"/></macrocell><macrocell id="FB1_MC3" pin="FB1_MC3_PIN12" sigUse="1" signal="ramRefReqSync_SPECSIG"><pterms pt1="FB1_3_1"/></macrocell><macrocell id="FB1_MC4" sigUse="2" signal="ramRefReq_SPECSIG"><pterms pt1="FB1_4_1"/></macrocell><macrocell id="FB1_MC5" pin="FB1_MC5_PIN13" sigUse="2" signal="ramRefRAS_SPECSIG"><pterms pt1="FB1_5_1"/></macrocell><macrocell id="FB1_MC6" pin="FB1_MC6_PIN14" sigUse="1" signal="iobsIOACTr_SPECSIG"><pterms pt1="FB1_6_1"/></macrocell><macrocell id="FB1_MC7" sigUse="1" signal="fsbASrf_SPECSIG"><pterms pt1="FB1_7_1"/></macrocell><macrocell id="FB1_MC8" pin="FB1_MC8_PIN15" sigUse="2" signal="iobsIOU1_SPECSIG"><pterms pt1="FB1_8_1" pt2="FB1_8_2"/></macrocell><macrocell id="FB1_MC9" pin="FB1_MC9_PIN16" sigUse="2" signal="iobsIOL1_SPECSIG"><pterms pt1="FB1_9_1" pt2="FB1_9_2"/></macrocell><macrocell id="FB1_MC10" sigUse="5" signal="cntTimerTC_SPECSIG"><pterms pt1="FB1_10_1" pt2="FB1_10_2"/></macrocell><macrocell id="FB1_MC11" pin="FB1_MC11_PIN17" sigUse="5" signal="iobsIOU0_SPECSIG"><pterms pt1="FB1_11_1" pt2="FB1_11_2" pt3="FB1_11_3"/></macrocell><macrocell id="FB1_MC12" pin="FB1_MC12_PIN18" sigUse="5" signal="iobsIOL0_SPECSIG"><pterms pt1="FB1_12_1" pt2="FB1_12_2" pt3="FB1_12_3"/></macrocell><macrocell id="FB1_MC13" sigUse="6" signal="cntTimer3_SPECSIG"><pterms pt1="FB1_13_1" pt2="FB1_13_2" pt3="FB1_13_3"/></macrocell><macrocell id="FB1_MC14" pin="FB1_MC14_PIN19" sigUse="5" signal="cntTimer2_SPECSIG"><pterms pt1="FB1_14_1" pt2="FB1_14_2" pt3="FB1_14_3"/></macrocell><macrocell id="FB1_MC15" pin="FB1_MC15_PIN20" sigUse="4" signal="cntTimer1_SPECSIG"><pterms pt1="FB1_15_1" pt2="FB1_15_2" pt3="FB1_15_3"/></macrocell><macrocell id="FB1_MC16" sigUse="5" signal="cntRefUrgent_SPECSIG"><pterms pt1="FB1_16_1" pt2="FB1_16_2" pt3="FB1_16_3"/></macrocell><macrocell id="FB1_MC17" pin="FB1_MC17_PIN22" sigUse="8" signal="iobsIOReady_SPECSIG"><pterms pt1="FB1_17_1" pt2="FB1_17_2" pt3="FB1_17_3" pt4="FB1_17_4"/></macrocell><macrocell id="FB1_MC18" sigUse="5" signal="cntRefReq_SPECSIG"><pterms pt1="FB1_18_1" pt2="FB1_18_2" pt3="FB1_18_3" pt4="FB1_18_4"/></macrocell><fbinput id="FB1_I1" signal="E"/><fbinput id="FB1_I2" signal="cntRefReq_SPECSIG"/><fbinput id="FB1_I3" signal="cntRefUrgent_SPECSIG"/><fbinput id="FB1_I4" signal="cntTimer0_SPECSIG"/><fbinput id="FB1_I5" signal="cntTimer1_SPECSIG"/><fbinput id="FB1_I6" signal="cntTimer2_SPECSIG"/><fbinput id="FB1_I7" signal="cntTimer3_SPECSIG"/><fbinput id="FB1_I8" signal="cntTimerTC_SPECSIG"/><fbinput id="FB1_I9" signal="fsbASrf_SPECSIG"/><fbinput id="FB1_I10" signal="iobmIOACT_SPECSIG"/><fbinput id="FB1_I11" signal="iobmIOBERR_SPECSIG"/><fbinput id="FB1_I12" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB1_I13" signal="iobsIOL1_SPECSIG"/><fbinput id="FB1_I14" signal="iobsIOReady_SPECSIG"/><fbinput id="FB1_I15" signal="iobsIOU1_SPECSIG"/><fbinput id="FB1_I16" signal="iobsLoad1_SPECSIG"/><fbinput id="FB1_I17" signal="iobsOnce_SPECSIG"/><fbinput id="FB1_I18" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I19" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I20" signal="nADoutLE1"/><fbinput id="FB1_I21" signal="nAS_FSB"/><fbinput id="FB1_I22" signal="nLDS_FSB"/><fbinput id="FB1_I23" signal="nUDS_FSB"/><fbinput id="FB1_I24" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I25" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I26" signal="ramRefDone_SPECSIG"/><fbinput id="FB1_I27" signal="ramRefReqSync_SPECSIG"/><fbinput id="FB1_I28" signal="ramRegUrgentSync_SPECSIG"/><pterm id="FB1_1_1"><signal id="cntRefUrgent_SPECSIG"/></pterm><pterm id="FB1_2_1"><signal id="ramRefDone_SPECSIG" negated="ON"/><signal id="ramRegUrgentSync_SPECSIG"/></pterm><pterm id="FB1_3_1"><signal id="cntRefReq_SPECSIG"/></pterm><pterm id="FB1_4_1"><signal id="ramRefDone_SPECSIG" negated="ON"/><signal id="ramRefReqSync_SPECSIG"/></pterm><pterm id="FB1_5_1"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB1_6_1"><signal id="iobmIOACT_SPECSIG"/></pterm><pterm id="FB1_7_1"><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB1_8_1"><signal id="nUDS_FSB" negated="ON"/></pterm><pterm id="FB1_8_2"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB1_9_1"><signal id="nLDS_FSB" negated="ON"/></pterm><pterm id="FB1_9_2"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB1_10_1"><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer2_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB1_10_2"><signal id="E"/></pterm><pterm id="FB1_11_1"><signal id="nUDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_11_2"><signal id="iobsIOU1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB1_11_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_12_1"><signal id="nLDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_12_2"><signal id="iobsIOL1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB1_12_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_13_1"><signal id="cntTimerTC_SPECSIG"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB1_13_2"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer2_SPECSIG"/><signal id="cntTimer0_SPECSIG"/></pterm><pterm id="FB1_13_3"><signal id="E"/></pterm><pterm id="FB1_14_1"><signal id="cntTimerTC_SPECSIG"/><signal id="cntTimer2_SPECSIG"/></pterm><pterm id="FB1_14_2"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer0_SPECSIG"/></pterm><pterm id="FB1_14_3"><signal id="E"/></pterm><pterm id="FB1_15_1"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer0_SPECSIG" negated="ON"/></pterm><pterm id="FB1_15_2"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG"/></pterm><pterm id="FB1_15_3"><signal id="E"/></pterm><pterm id="FB1_16_1"><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer2_SPECSIG"/><signal id="cntTimer3_SPECSIG" negated="ON"/></pterm><pterm id="FB1_16_2"><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer2_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB1_16_3"><signal id="E"/></pterm><pterm id="FB1_17_1"><signal id="iobsIOReady_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB1_17_2"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_17_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_17_4"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_18_1"><signal id="cntTimer1_SPECSIG"/><signal id="cntTimer3_SPECSIG" negated="ON"/></pterm><pterm id="FB1_18_2"><signal id="cntTimer2_SPECSIG"/><signal id="cntTimer3_SPECSIG" negated="ON"/></pterm><pterm id="FB1_18_3"><signal id="cntTimer1_SPECSIG" negated="ON"/><signal id="cntTimer2_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/><signal id="cntTimer3_SPECSIG"/></pterm><pterm id="FB1_18_4"><signal id="E"/></pterm><equation id="ramRegUrgentSync_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_1_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefUrgent_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_2_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefReqSync_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_3_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefReq_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_4_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRefRAS_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_5_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOACTr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_6_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="fsbASrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_7_1"/></d2><clk negated="ON"><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOU1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_8_1"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB1_8_2"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOL1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_9_1"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB1_9_2"/></ce><prld ptindx="GND"/></equation><equation id="cntTimerTC_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_10_1"/></d2><clk><eq_pterm ptindx="FB1_10_2"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOU0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_11_1"/><eq_pterm ptindx="FB1_11_2"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB1_11_3"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOL0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_12_1"/><eq_pterm ptindx="FB1_12_2"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB1_12_3"/></ce><prld ptindx="GND"/></equation><equation id="cntTimer3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_13_1"/><eq_pterm ptindx="FB1_13_2"/></d2><clk><eq_pterm ptindx="FB1_13_3"/></clk><prld ptindx="GND"/></equation><equation id="cntTimer2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_14_1"/><eq_pterm ptindx="FB1_14_2"/></d2><clk><eq_pterm ptindx="FB1_14_3"/></clk><prld ptindx="GND"/></equation><equation id="cntTimer1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_15_1"/><eq_pterm ptindx="FB1_15_2"/></d2><clk><eq_pterm ptindx="FB1_15_3"/></clk><prld ptindx="GND"/></equation><equation id="cntRefUrgent_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_16_1"/><eq_pterm ptindx="FB1_16_2"/></d2><clk><eq_pterm ptindx="FB1_16_3"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOReady_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_17_1"/><eq_pterm ptindx="FB1_17_2"/><eq_pterm ptindx="FB1_17_3"/><eq_pterm ptindx="FB1_17_4"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="cntRefReq_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_18_1"/><eq_pterm ptindx="FB1_18_2"/><eq_pterm ptindx="FB1_18_3"/></d2><clk><eq_pterm ptindx="FB1_18_4"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB2" inputUse="8" pinUse="8"><macrocell id="FB2_MC1"/><macrocell id="FB2_MC2" pin="FB2_MC2_PIN99"/><macrocell id="FB2_MC3"/><macrocell id="FB2_MC4"/><macrocell id="FB2_MC5" pin="FB2_MC5_PIN1"/><macrocell id="FB2_MC6" pin="FB2_MC6_PIN2"/><macrocell id="FB2_MC7"/><macrocell id="FB2_MC8" pin="FB2_MC8_PIN3"/><macrocell id="FB2_MC9" pin="FB2_MC9_PIN4" sigUse="1" signal="iobmVPArr_SPECSIG"><pterms pt1="FB2_9_1"/></macrocell><macrocell id="FB2_MC10" sigUse="1" signal="iobmVPArf_SPECSIG"><pterms pt1="FB2_10_1"/></macrocell><macrocell id="FB2_MC11" pin="FB2_MC11_PIN6" sigUse="1" signal="iobmRESrr_SPECSIG"><pterms pt1="FB2_11_1"/></macrocell><macrocell id="FB2_MC12" pin="FB2_MC12_PIN7" sigUse="1" signal="iobmRESrf_SPECSIG"><pterms pt1="FB2_12_1"/></macrocell><macrocell id="FB2_MC13" sigUse="1" signal="iobmIOREQr_SPECSIG"><pterms pt1="FB2_13_1"/></macrocell><macrocell id="FB2_MC14" pin="FB2_MC14_PIN8" sigUse="1" signal="iobmEr2_SPECSIG"><pterms pt1="FB2_14_1"/></macrocell><macrocell id="FB2_MC15" pin="FB2_MC15_PIN9" sigUse="1" signal="iobmEr_SPECSIG"><pterms pt1="FB2_15_1"/></macrocell><macrocell id="FB2_MC16" sigUse="1" signal="iobmDTACKrr_SPECSIG"><pterms pt1="FB2_16_1"/></macrocell><macrocell id="FB2_MC17" pin="FB2_MC17_PIN10" sigUse="1" signal="iobmDTACKrf_SPECSIG"><pterms pt1="FB2_17_1"/></macrocell><macrocell id="FB2_MC18" sigUse="3" signal="cntTimer0_SPECSIG"><pterms pt1="FB2_18_1" pt2="FB2_18_2"/></macrocell><fbinput id="FB2_I1" signal="E"/><fbinput fbk="PIN" id="FB2_I2" signal="nRESPIN_SPECSIG"/><fbinput id="FB2_I3" signal="cntTimer0_SPECSIG"/><fbinput id="FB2_I4" signal="cntTimerTC_SPECSIG"/><fbinput id="FB2_I5" signal="iobmEr_SPECSIG"/><fbinput id="FB2_I6" signal="iobsIOREQ_SPECSIG"/><fbinput id="FB2_I7" signal="nDTACK_IOB"/><fbinput id="FB2_I8" signal="nVPA_IOB"/><pterm id="FB2_9_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB2_10_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB2_11_1"><signal id="nRESPIN_SPECSIG" negated="ON"/></pterm><pterm id="FB2_12_1"><signal id="nRESPIN_SPECSIG" negated="ON"/></pterm><pterm id="FB2_13_1"><signal id="iobsIOREQ_SPECSIG"/></pterm><pterm id="FB2_14_1"><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB2_15_1"><signal id="E"/></pterm><pterm id="FB2_16_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB2_17_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB2_18_1"><signal id="cntTimerTC_SPECSIG" negated="ON"/><signal id="cntTimer0_SPECSIG" negated="ON"/></pterm><pterm id="FB2_18_2"><signal id="E"/></pterm><equation id="iobmVPArr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_9_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmVPArf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_10_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_11_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_12_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOREQr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_13_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr2_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_14_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_15_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_16_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_17_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="cntTimer0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_18_1"/></d2><clk><eq_pterm ptindx="FB2_18_2"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB3" inputUse="33" pinUse="9"><macrocell id="FB3_MC1" sigUse="26" signal="fsbVPA_SPECSIG"><pterms pt1="FB3_1_1" pt2="FB3_1_2" pt3="FB3_1_3" pt4="FB3_1_4" pt5="FB3_1_5"/></macrocell><macrocell id="FB3_MC2" pin="FB3_MC2_PIN23"><pterms pt1="FB3_2_1" pt2="FB3_2_2" pt3="FB3_2_3" pt4="FB3_2_4" pt5="FB3_2_5"/></macrocell><macrocell id="FB3_MC3"><pterms pt1="FB3_3_1" pt2="FB3_3_2" pt3="FB3_3_3"/></macrocell><macrocell id="FB3_MC4"/><macrocell id="FB3_MC5" pin="FB3_MC5_PIN24"><pterms pt1="FB3_5_1" pt2="FB3_5_2" pt3="FB3_5_3" pt4="FB3_5_4" pt5="FB3_5_5"/></macrocell><macrocell id="FB3_MC6" pin="FB3_MC6_PIN25"><pterms pt1="FB3_6_1" pt2="FB3_6_2" pt3="FB3_6_3" pt4="FB3_6_4" pt5="FB3_6_5"/></macrocell><macrocell id="FB3_MC7" sigUse="19" signal="iobsIOREQ_SPECSIG"><pterms pt1="FB3_7_1" pt2="FB3_7_2" pt3="FB3_7_3" pt4="FB3_7_4" pt5="FB3_7_5"/></macrocell><macrocell id="FB3_MC8" pin="FB3_MC8_PIN27"><pterms pt1="FB3_8_1" pt2="FB3_8_2" pt3="FB3_8_3" pt4="FB3_8_4" pt5="FB3_8_5"/></macrocell><macrocell id="FB3_MC9" pin="FB3_MC9_PIN28" sigUse="26" signal="nDTACK_FSB"><pterms pt1="FB3_9_1" pt2="FB3_9_2" pt3="FB3_9_3" pt4="FB3_9_4" pt5="FB3_9_5"/></macrocell><macrocell id="FB3_MC10" sigUse="17" signal="fsbReady1r_SPECSIG"><pterms pt1="FB3_10_1" pt2="FB3_10_2" pt3="FB3_10_3" pt4="FB3_10_4" pt5="FB3_10_5"/></macrocell><macrocell id="FB3_MC11" pin="FB3_MC11_PIN29"><pterms pt1="FB3_11_1" pt2="FB3_11_2" pt3="FB3_11_3" pt4="FB3_11_4" pt5="FB3_11_5"/></macrocell><macrocell id="FB3_MC12" pin="FB3_MC12_PIN30" sigUse="19" signal="iobsIORW1_SPECSIG"><pterms pt1="FB3_12_1" pt2="FB3_12_2" pt3="FB3_12_3" pt4="FB3_12_4" pt5="FB3_12_5"/></macrocell><macrocell id="FB3_MC13"><pterms pt1="FB3_13_1" pt2="FB3_13_2" pt3="FB3_13_3" pt4="FB3_13_4" pt5="FB3_13_5"/></macrocell><macrocell id="FB3_MC14" pin="FB3_MC14_PIN32"><pterms pt1="FB3_14_1" pt2="FB3_14_2" pt3="FB3_14_3" pt4="FB3_14_4" pt5="FB3_14_5"/></macrocell><macrocell id="FB3_MC15" pin="FB3_MC15_PIN33" sigUse="20" signal="iobsIORW0_SPECSIG"><pterms pt1="FB3_15_1" pt2="FB3_15_2" pt3="FB3_15_3" pt4="FB3_15_4" pt5="FB3_15_5"/></macrocell><macrocell id="FB3_MC16"><pterms pt1="FB3_16_1" pt2="FB3_16_2" pt3="FB3_16_3" pt4="FB3_16_4" pt5="FB3_16_5"/></macrocell><macrocell id="FB3_MC17" pin="FB3_MC17_PIN34" sigUse="2" signal="nROMWE"><pterms pt1="FB3_17_1" pt2="FB3_17_2" pt3="FB3_17_3"/></macrocell><macrocell id="FB3_MC18"><pterms pt1="FB3_18_1" pt2="FB3_18_2" pt3="FB3_18_3" pt4="FB3_18_4" pt5="FB3_18_5"/></macrocell><fbinput id="FB3_I1" signal="A_FSB10_SPECSIG"/><fbinput id="FB3_I2" signal="A_FSB11_SPECSIG"/><fbinput id="FB3_I3" signal="A_FSB12_SPECSIG"/><fbinput id="FB3_I4" signal="A_FSB13_SPECSIG"/><fbinput id="FB3_I5" signal="A_FSB14_SPECSIG"/><fbinput id="FB3_I6" signal="A_FSB15_SPECSIG"/><fbinput id="FB3_I7" signal="A_FSB16_SPECSIG"/><fbinput id="FB3_I8" signal="A_FSB17_SPECSIG"/><fbinput id="FB3_I9" signal="A_FSB18_SPECSIG"/><fbinput id="FB3_I10" signal="A_FSB19_SPECSIG"/><fbinput id="FB3_I11" signal="A_FSB20_SPECSIG"/><fbinput id="FB3_I12" signal="A_FSB21_SPECSIG"/><fbinput id="FB3_I13" signal="A_FSB22_SPECSIG"/><fbinput id="FB3_I14" signal="A_FSB23_SPECSIG"/><fbinput id="FB3_I15" signal="A_FSB8_SPECSIG"/><fbinput id="FB3_I16" signal="A_FSB9_SPECSIG"/><fbinput id="FB3_I17" signal="csnOverlay1_SPECSIG"/><fbinput id="FB3_I18" signal="fsbASrf_SPECSIG"/><fbinput id="FB3_I19" signal="fsbReady0r_SPECSIG"/><fbinput id="FB3_I20" signal="fsbReady1r_SPECSIG"/><fbinput id="FB3_I21" signal="fsbVPA_SPECSIG"/><fbinput id="FB3_I22" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB3_I23" signal="iobsIORW0_SPECSIG"/><fbinput id="FB3_I24" signal="iobsIORW1_SPECSIG"/><fbinput id="FB3_I25" signal="iobsIOReady_SPECSIG"/><fbinput id="FB3_I26" signal="iobsOnce_SPECSIG"/><fbinput id="FB3_I27" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB3_I28" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB3_I29" signal="nADoutLE1"/><fbinput id="FB3_I30" signal="nAS_FSB"/><fbinput id="FB3_I31" signal="nDTACK_FSB"/><fbinput id="FB3_I32" signal="nWE_FSB"/><fbinput id="FB3_I33" signal="ramRAMReady_SPECSIG"/><pterm id="FB3_1_1"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_1_2"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB3_1_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_1_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB3_1_5"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_2_1"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_2_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_2_3"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_2_4"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_2_5"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="iobsIOReady_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_3_1"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="fsbReady1r_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_3_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="fsbReady1r_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB3_3_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="iobsIOReady_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB3_5_1"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB3_5_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal 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id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_17_1"><signal id="nWE_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_17_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_17_3"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB3_18_1"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB3_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><equation id="fsbVPA_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_1_1"/><eq_pterm ptindx="FB3_1_2"/><eq_pterm ptindx="FB3_1_3"/><eq_pterm ptindx="FB3_1_4"/><eq_pterm ptindx="FB3_1_5"/><eq_pterm import="1" ptindx="FB3_2_1"/><eq_pterm import="1" ptindx="FB3_2_2"/><eq_pterm import="1" ptindx="FB3_2_3"/><eq_pterm import="1" ptindx="FB3_2_4"/><eq_pterm import="1" ptindx="FB3_2_5"/><eq_pterm import="1" ptindx="FB3_3_1"/><eq_pterm import="1" ptindx="FB3_3_2"/><eq_pterm import="1" ptindx="FB3_3_3"/><eq_pterm import="1" ptindx="FB3_18_1"/><eq_pterm import="1" ptindx="FB3_18_2"/><eq_pterm import="1" ptindx="FB3_18_3"/><eq_pterm import="1" ptindx="FB3_18_4"/><eq_pterm import="1" ptindx="FB3_18_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIOREQ_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_7_1"/><eq_pterm ptindx="FB3_7_2"/><eq_pterm ptindx="FB3_7_3"/><eq_pterm import="1" ptindx="FB3_6_1"/><eq_pterm import="1" ptindx="FB3_6_2"/><eq_pterm import="1" ptindx="FB3_6_3"/><eq_pterm import="1" ptindx="FB3_6_4"/><eq_pterm import="1" ptindx="FB3_6_5"/><eq_pterm import="1" ptindx="FB3_5_1"/><eq_pterm import="1" ptindx="FB3_5_2"/><eq_pterm import="1" ptindx="FB3_5_3"/><eq_pterm import="1" ptindx="FB3_5_4"/><eq_pterm import="1" ptindx="FB3_5_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nDTACK_FSB" regUse="D" userloc="P28"><d2><eq_pterm ptindx="FB3_9_1"/><eq_pterm ptindx="FB3_9_2"/><eq_pterm ptindx="FB3_9_3"/><eq_pterm import="1" ptindx="FB3_8_1"/><eq_pterm import="1" ptindx="FB3_8_2"/><eq_pterm import="1" ptindx="FB3_8_3"/><eq_pterm import="1" ptindx="FB3_8_4"/><eq_pterm import="1" ptindx="FB3_8_5"/><eq_pterm import="1" ptindx="FB3_7_4"/><eq_pterm import="1" ptindx="FB3_7_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="fsbReady1r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_10_1"/><eq_pterm ptindx="FB3_10_2"/><eq_pterm ptindx="FB3_10_3"/><eq_pterm ptindx="FB3_10_4"/><eq_pterm import="1" ptindx="FB3_9_4"/><eq_pterm import="1" ptindx="FB3_9_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIORW1_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB3_12_1"/><eq_pterm ptindx="FB3_12_2"/><eq_pterm ptindx="FB3_12_3"/><eq_pterm ptindx="FB3_12_4"/><eq_pterm ptindx="FB3_12_5"/><eq_pterm import="1" ptindx="FB3_11_1"/><eq_pterm import="1" ptindx="FB3_11_2"/><eq_pterm import="1" ptindx="FB3_11_3"/><eq_pterm import="1" ptindx="FB3_11_4"/><eq_pterm import="1" ptindx="FB3_11_5"/><eq_pterm import="1" ptindx="FB3_10_5"/><eq_pterm import="1" ptindx="FB3_13_1"/><eq_pterm import="1" ptindx="FB3_13_2"/><eq_pterm import="1" ptindx="FB3_13_3"/><eq_pterm import="1" ptindx="FB3_13_4"/><eq_pterm import="1" ptindx="FB3_13_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsIORW0_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_15_1"/><eq_pterm ptindx="FB3_15_2"/><eq_pterm ptindx="FB3_15_3"/><eq_pterm ptindx="FB3_15_4"/><eq_pterm ptindx="FB3_15_5"/><eq_pterm import="1" ptindx="FB3_14_1"/><eq_pterm import="1" ptindx="FB3_14_2"/><eq_pterm import="1" ptindx="FB3_14_3"/><eq_pterm import="1" ptindx="FB3_14_4"/><eq_pterm import="1" ptindx="FB3_14_5"/><eq_pterm import="1" ptindx="FB3_16_1"/><eq_pterm import="1" ptindx="FB3_16_2"/><eq_pterm import="1" ptindx="FB3_16_3"/><eq_pterm import="1" ptindx="FB3_16_4"/><eq_pterm import="1" ptindx="FB3_16_5"/><eq_pterm import="1" ptindx="FB3_17_2"/><eq_pterm import="1" ptindx="FB3_17_3"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nROMWE" negated="ON" userloc="P34"><d2><eq_pterm ptindx="FB3_17_1"/></d2></equation></fblock><fblock id="FB4" inputUse="34" pinUse="10"><macrocell id="FB4_MC1"><pterms pt1="FB4_1_1" pt2="FB4_1_2" pt3="FB4_1_3"/></macrocell><macrocell id="FB4_MC2" pin="FB4_MC2_PIN87" sigUse="3" signal="nAoutOE"><pterms pt1="FB4_2_1"/></macrocell><macrocell id="FB4_MC3" sigUse="1" signal="iobmBERRrr_SPECSIG"><pterms pt1="FB4_3_1"/></macrocell><macrocell id="FB4_MC4" sigUse="1" signal="iobmBERRrf_SPECSIG"><pterms pt1="FB4_4_1"/></macrocell><macrocell id="FB4_MC5" pin="FB4_MC5_PIN89" sigUse="2" signal="nDoutOE"><pterms pt1="FB4_5_1"/></macrocell><macrocell id="FB4_MC6" pin="FB4_MC6_PIN90" sigUse="6" signal="nDinOE"><pterms pt1="FB4_6_1" pt2="FB4_6_2" pt3="FB4_6_3"/></macrocell><macrocell id="FB4_MC7" sigUse="4" signal="cntPORS_FSM_FFd1_SPECSIG"><pterms pt1="FB4_7_1"/></macrocell><macrocell id="FB4_MC8" pin="FB4_MC8_PIN91" sigUse="1" signal="nRES"><pterms pt1="FB4_8_1"/></macrocell><macrocell id="FB4_MC9" pin="FB4_MC9_PIN92" sigUse="1" signal="cntIPL2r_SPECSIG"><pterms pt1="FB4_9_1"/></macrocell><macrocell id="FB4_MC10" sigUse="3" signal="iobmIOS_FSM_FFd1_SPECSIG"><pterms pt1="FB4_10_1" pt2="FB4_10_2"/></macrocell><macrocell id="FB4_MC11" pin="FB4_MC11_PIN93" sigUse="2" signal="nVPA_FSB"><pterms pt1="FB4_11_1"/></macrocell><macrocell id="FB4_MC12" pin="FB4_MC12_PIN94" sigUse="4" signal="cntnRESout_SPECSIG"><pterms pt1="FB4_12_1" pt2="FB4_12_2"/></macrocell><macrocell id="FB4_MC13" sigUse="3" signal="cntPORS_FSM_FFd2_SPECSIG"><pterms pt1="FB4_13_1" pt2="FB4_13_2"/></macrocell><macrocell id="FB4_MC14" pin="FB4_MC14_PIN95" sigUse="3" signal="cntLTimer0_SPECSIG"><pterms pt1="FB4_14_1" pt2="FB4_14_2"/></macrocell><macrocell id="FB4_MC15" pin="FB4_MC15_PIN96" sigUse="6" signal="cntLTimer3_SPECSIG"><pterms pt1="FB4_15_1" pt2="FB4_15_2" pt3="FB4_15_3" pt4="FB4_15_4"/></macrocell><macrocell id="FB4_MC16" sigUse="5" signal="cntLTimer2_SPECSIG"><pterms pt1="FB4_16_1" pt2="FB4_16_2" pt3="FB4_16_3" pt4="FB4_16_4"/></macrocell><macrocell id="FB4_MC17" pin="FB4_MC17_PIN97" sigUse="4" signal="cntLTimer1_SPECSIG"><pterms pt1="FB4_17_1" pt2="FB4_17_2" pt3="FB4_17_3" pt4="FB4_17_4" pt5="FB4_17_5"/></macrocell><macrocell id="FB4_MC18" sigUse="13" signal="iobmIOBERR_SPECSIG"><pterms pt1="FB4_18_1" pt2="FB4_18_2" pt3="FB4_18_3" pt4="FB4_18_4" pt5="FB4_18_5"/></macrocell><fbinput id="FB4_I1" signal="A_FSB20_SPECSIG"/><fbinput id="FB4_I2" signal="A_FSB21_SPECSIG"/><fbinput id="FB4_I3" signal="A_FSB22_SPECSIG"/><fbinput id="FB4_I4" signal="A_FSB23_SPECSIG"/><fbinput id="FB4_I5" signal="C8M"/><fbinput id="FB4_I6" signal="cntIPL2r_SPECSIG"/><fbinput id="FB4_I7" signal="cntLTimer0_SPECSIG"/><fbinput id="FB4_I8" signal="cntLTimer13_SPECSIG"/><fbinput id="FB4_I9" signal="cntLTimer1_SPECSIG"/><fbinput id="FB4_I10" signal="cntLTimer2_SPECSIG"/><fbinput id="FB4_I11" signal="cntLTimer3_SPECSIG"/><fbinput id="FB4_I12" signal="cntPORS_FSM_FFd1_SPECSIG"/><fbinput id="FB4_I13" signal="cntPORS_FSM_FFd2_SPECSIG"/><fbinput id="FB4_I14" signal="cntTimerTC_SPECSIG"/><fbinput id="FB4_I15" signal="cntnRESout_SPECSIG"/><fbinput id="FB4_I16" signal="fsbVPA_SPECSIG"/><fbinput id="FB4_I17" signal="iobmBERRrf_SPECSIG"/><fbinput id="FB4_I18" signal="iobmBERRrr_SPECSIG"/><fbinput id="FB4_I19" signal="iobmDTACKrf_SPECSIG"/><fbinput id="FB4_I20" signal="iobmDTACKrr_SPECSIG"/><fbinput id="FB4_I21" signal="iobmDoutOE_SPECSIG"/><fbinput id="FB4_I22" signal="iobmETACK_SPECSIG"/><fbinput id="FB4_I23" signal="iobmIOBERR_SPECSIG"/><fbinput id="FB4_I24" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB4_I25" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB4_I26" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB4_I27" signal="iobmRESrf_SPECSIG"/><fbinput id="FB4_I28" signal="iobmRESrr_SPECSIG"/><fbinput id="FB4_I29" signal="nAS_FSB"/><fbinput id="FB4_I30" signal="nAoutOE"/><fbinput id="FB4_I31" signal="nBERR_IOB"/><fbinput id="FB4_I32" signal="nBR_IOB"/><fbinput id="FB4_I33" signal="nIPL2"/><fbinput id="FB4_I34" signal="nWE_FSB"/><pterm id="FB4_1_1"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB4_1_2"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB4_1_3"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB4_2_1"><signal id="nBR_IOB" negated="ON"/><signal id="cntPORS_FSM_FFd1_SPECSIG"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB4_3_1"><signal id="nBERR_IOB" negated="ON"/></pterm><pterm id="FB4_4_1"><signal id="nBERR_IOB" negated="ON"/></pterm><pterm id="FB4_5_1"><signal id="iobmDoutOE_SPECSIG"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB4_6_1"><signal id="A_FSB23_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_6_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_6_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_7_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG"/><signal id="cntIPL2r_SPECSIG" negated="ON"/></pterm><pterm id="FB4_8_1"><signal id="cntnRESout_SPECSIG" negated="ON"/></pterm><pterm id="FB4_9_1"><signal id="nIPL2" negated="ON"/></pterm><pterm id="FB4_10_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB4_10_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB4_11_1"><signal id="fsbVPA_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_12_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntPORS_FSM_FFd1_SPECSIG"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB4_12_2"><signal id="cntPORS_FSM_FFd1_SPECSIG"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="cntnRESout_SPECSIG"/></pterm><pterm id="FB4_13_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_13_2"><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB4_14_1"><signal id="cntLTimer0_SPECSIG" negated="ON"/><signal id="cntLTimer13_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_14_2"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_15_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_15_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/></pterm><pterm id="FB4_15_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB4_15_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_16_1"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/></pterm><pterm id="FB4_16_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB4_16_3"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_16_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_17_1"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/></pterm><pterm id="FB4_17_2"><signal id="cntLTimer0_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_17_3"><signal id="cntLTimer13_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_17_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB4_17_5"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB4_18_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG"/></pterm><pterm id="FB4_18_2"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB4_18_3"><signal id="C8M"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB4_18_4"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB4_18_5"><signal id="C8M"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmIOBERR_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><equation id="nAoutOE" negated="ON" regUse="D" userloc="P87"><d2><eq_pterm ptindx="FB4_2_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="VCC"/></equation><equation id="iobmBERRrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_3_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmBERRrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_4_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nDoutOE" negated="ON" userloc="P89"><d2><eq_pterm ptindx="FB4_5_1"/></d2></equation><equation id="nDinOE" userloc="P90"><d2><eq_pterm ptindx="FB4_6_1"/><eq_pterm ptindx="FB4_6_2"/><eq_pterm ptindx="FB4_6_3"/></d2></equation><equation id="cntPORS_FSM_FFd1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_7_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="nRES" userloc="P91"><d2><eq_pterm ptindx="GND"/></d2><oe><eq_pterm ptindx="FB4_8_1"/></oe></equation><equation id="cntIPL2r_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_9_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_10_1"/><eq_pterm ptindx="FB4_10_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nVPA_FSB" negated="ON" userloc="P93"><d2><eq_pterm ptindx="FB4_11_1"/></d2></equation><equation id="cntnRESout_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_12_1"/><eq_pterm ptindx="FB4_12_2"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="cntPORS_FSM_FFd2_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_13_1"/><eq_pterm ptindx="FB4_13_2"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="cntLTimer0_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB4_14_1"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_14_2"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_15_1"/><eq_pterm ptindx="FB4_15_2"/><eq_pterm ptindx="FB4_15_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_15_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_16_1"/><eq_pterm ptindx="FB4_16_2"/><eq_pterm ptindx="FB4_16_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_16_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB4_17_1"/><eq_pterm ptindx="FB4_17_2"/><eq_pterm ptindx="FB4_17_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB4_17_4"/></ce><prld ptindx="GND"/></equation><equation id="iobmIOBERR_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_18_1"/><eq_pterm ptindx="FB4_18_2"/><eq_pterm ptindx="FB4_18_3"/><eq_pterm ptindx="FB4_18_4"/><eq_pterm ptindx="FB4_18_5"/><eq_pterm import="1" ptindx="FB4_1_1"/><eq_pterm import="1" ptindx="FB4_1_2"/><eq_pterm import="1" ptindx="FB4_1_3"/><eq_pterm import="1" ptindx="FB4_17_5"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB5" inputUse="32" pinUse="8"><macrocell id="FB5_MC1" sigUse="13" signal="ramRASEL_SPECSIG"><pterms pt1="FB5_1_1" pt2="FB5_1_2" pt3="FB5_1_3" pt4="FB5_1_4" pt5="FB5_1_5"/></macrocell><macrocell id="FB5_MC2" pin="FB5_MC2_PIN35" sigUse="5" signal="nROMCS"><pterms pt1="FB5_2_1" pt2="FB5_2_2" pt3="FB5_2_3" pt4="FB5_2_4" pt5="FB5_2_5"/></macrocell><macrocell id="FB5_MC3" sigUse="4" signal="ramRefDone_SPECSIG"><pterms pt1="FB5_3_1" pt2="FB5_3_2" pt3="FB5_3_3" pt4="FB5_3_4"/></macrocell><macrocell id="FB5_MC4" sigUse="3" signal="csnOverlay1_SPECSIG"><pterms pt1="FB5_4_1" pt2="FB5_4_2"/></macrocell><macrocell id="FB5_MC5" pin="FB5_MC5_PIN36" sigUse="1" signal="nCAS"><pterms pt1="FB5_5_1"/></macrocell><macrocell id="FB5_MC6" pin="FB5_MC6_PIN37" sigUse="2" signal="nOE"><pterms pt1="FB5_6_1"/></macrocell><macrocell id="FB5_MC7" sigUse="8" signal="fsbReady0r_SPECSIG"><pterms pt1="FB5_7_1" pt2="FB5_7_2" pt3="FB5_7_3"/></macrocell><macrocell id="FB5_MC8" pin="FB5_MC8_PIN39" sigUse="8" signal="csnOverlay0_SPECSIG"><pterms pt1="FB5_8_1" pt2="FB5_8_2" pt3="FB5_8_3" pt4="FB5_8_4"/></macrocell><macrocell id="FB5_MC9" pin="FB5_MC9_PIN40" sigUse="3" signal="RA4_SPECSIG"><pterms pt1="FB5_9_1" pt2="FB5_9_2" pt3="FB5_9_3" pt4="FB5_9_4" pt5="FB5_9_5"/></macrocell><macrocell id="FB5_MC10" sigUse="13" signal="ramRAMEN_SPECSIG"><pterms pt1="FB5_10_1" pt2="FB5_10_2" pt3="FB5_10_3" pt4="FB5_10_4" pt5="FB5_10_5"/></macrocell><macrocell id="FB5_MC11" pin="FB5_MC11_PIN41" sigUse="3" signal="RA3_SPECSIG"><pterms pt1="FB5_11_1" pt2="FB5_11_2" pt3="FB5_11_3" pt4="FB5_11_4"/></macrocell><macrocell id="FB5_MC12" pin="FB5_MC12_PIN42" sigUse="3" signal="RA5_SPECSIG"><pterms pt1="FB5_12_1" pt2="FB5_12_2" pt3="FB5_12_3" pt4="FB5_12_4" pt5="FB5_12_5"/></macrocell><macrocell id="FB5_MC13" sigUse="12" signal="ramRS_FSM_FFd2_SPECSIG"><pterms pt1="FB5_13_1" pt2="FB5_13_2" pt3="FB5_13_3" pt4="FB5_13_4" pt5="FB5_13_5"/></macrocell><macrocell id="FB5_MC14" pin="FB5_MC14_PIN43" sigUse="3" signal="RA2_SPECSIG"><pterms pt1="FB5_14_1" pt2="FB5_14_2" pt3="FB5_14_3"/></macrocell><macrocell id="FB5_MC15" pin="FB5_MC15_PIN46" sigUse="3" signal="RA6_SPECSIG"><pterms pt1="FB5_15_1" pt2="FB5_15_2" pt3="FB5_15_3" pt4="FB5_15_4" pt5="FB5_15_5"/></macrocell><macrocell id="FB5_MC16"><pterms pt1="FB5_16_1" pt2="FB5_16_2" pt3="FB5_16_3" pt4="FB5_16_4" pt5="FB5_16_5"/></macrocell><macrocell id="FB5_MC17" pin="FB5_MC17_PIN49" sigUse="13" signal="ramRAMReady_SPECSIG"><pterms pt1="FB5_17_1" pt2="FB5_17_2" pt3="FB5_17_3" pt4="FB5_17_4" pt5="FB5_17_5"/></macrocell><macrocell id="FB5_MC18"><pterms pt1="FB5_18_1" pt2="FB5_18_2" pt3="FB5_18_3" pt4="FB5_18_4" pt5="FB5_18_5"/></macrocell><fbinput id="FB5_I1" signal="A_FSB12_SPECSIG"/><fbinput id="FB5_I2" signal="A_FSB13_SPECSIG"/><fbinput id="FB5_I3" signal="A_FSB14_SPECSIG"/><fbinput id="FB5_I4" signal="A_FSB15_SPECSIG"/><fbinput id="FB5_I5" signal="A_FSB16_SPECSIG"/><fbinput id="FB5_I6" signal="A_FSB20_SPECSIG"/><fbinput id="FB5_I7" signal="A_FSB21_SPECSIG"/><fbinput id="FB5_I8" signal="A_FSB22_SPECSIG"/><fbinput id="FB5_I9" signal="A_FSB23_SPECSIG"/><fbinput id="FB5_I10" signal="A_FSB3_SPECSIG"/><fbinput id="FB5_I11" signal="A_FSB4_SPECSIG"/><fbinput id="FB5_I12" signal="A_FSB5_SPECSIG"/><fbinput id="FB5_I13" signal="A_FSB6_SPECSIG"/><fbinput id="FB5_I14" signal="A_FSB7_SPECSIG"/><fbinput fbk="PIN" id="FB5_I15" signal="nRESPIN_SPECSIG"/><fbinput id="FB5_I16" signal="csnOverlay0_SPECSIG"/><fbinput id="FB5_I17" signal="csnOverlay1_SPECSIG"/><fbinput id="FB5_I18" signal="fsbASrf_SPECSIG"/><fbinput id="FB5_I19" signal="fsbReady0r_SPECSIG"/><fbinput id="FB5_I20" signal="nAS_FSB"/><fbinput id="FB5_I21" signal="nWE_FSB"/><fbinput id="FB5_I22" signal="ramBACTr_SPECSIG"/><fbinput id="FB5_I23" signal="ramRAMEN_SPECSIG"/><fbinput id="FB5_I24" signal="ramRAMReady_SPECSIG"/><fbinput id="FB5_I25" signal="ramRASEL_SPECSIG"/><fbinput id="FB5_I26" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB5_I27" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB5_I28" signal="ramRS_FSM_FFd3_SPECSIG"/><fbinput id="FB5_I29" signal="ramRefDone_SPECSIG"/><fbinput id="FB5_I30" signal="ramRefReq_SPECSIG"/><fbinput id="FB5_I31" signal="ramRefReqSync_SPECSIG"/><fbinput id="FB5_I32" signal="ramRefUrgent_SPECSIG"/><pterm id="FB5_1_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB5_1_2"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB5_1_3"><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_1_4"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_1_5"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_1"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_2"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_3"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_3_1"><signal id="ramRefDone_SPECSIG"/><signal id="ramRefReqSync_SPECSIG"/></pterm><pterm id="FB5_3_2"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRefReqSync_SPECSIG"/></pterm><pterm id="FB5_3_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB5_3_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_4_1"><signal id="csnOverlay0_SPECSIG"/></pterm><pterm id="FB5_4_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_5_1"><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_6_1"><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB5_7_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_7_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB5_7_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB5_8_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_8_3"><signal id="nRESPIN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB5_SPECSIG"/></pterm><pterm id="FB5_9_1"><signal id="A_FSB14_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_9_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_9_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_9_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_9_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_10_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_10_2"><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB5_10_3"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_10_4"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_10_5"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_1"><signal id="A_FSB13_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB4_SPECSIG"/></pterm><pterm id="FB5_11_3"><signal id="A_FSB15_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB6_SPECSIG"/></pterm><pterm id="FB5_12_1"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_12_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_13_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB5_13_2"><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_3"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_13_4"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_13_5"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_1"><signal id="A_FSB12_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB3_SPECSIG"/></pterm><pterm id="FB5_14_3"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB7_SPECSIG"/></pterm><pterm id="FB5_15_1"><signal id="A_FSB16_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_2"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_3"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_1"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_16_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_4"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_16_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_17_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_2"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_17_3"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_18_1"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_18_2"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRefReq_SPECSIG" negated="ON"/></pterm><pterm id="FB5_18_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_18_4"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB5_18_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><equation id="ramRASEL_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB5_1_1"/><eq_pterm ptindx="FB5_1_2"/><eq_pterm ptindx="FB5_1_3"/><eq_pterm ptindx="FB5_1_4"/><eq_pterm ptindx="FB5_1_5"/><eq_pterm import="1" ptindx="FB5_2_1"/><eq_pterm import="1" ptindx="FB5_2_2"/><eq_pterm import="1" ptindx="FB5_2_3"/><eq_pterm import="1" ptindx="FB5_2_4"/><eq_pterm import="1" ptindx="FB5_2_5"/><eq_pterm import="1" ptindx="FB5_18_1"/><eq_pterm import="1" ptindx="FB5_18_2"/><eq_pterm import="1" ptindx="FB5_18_3"/><eq_pterm import="1" ptindx="FB5_18_4"/><eq_pterm import="1" ptindx="FB5_18_5"/><eq_pterm import="1" ptindx="FB5_17_4"/><eq_pterm import="1" ptindx="FB5_17_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nROMCS" negated="ON" userloc="P35"><d2><eq_pterm import="1" ptindx="FB5_3_3"/><eq_pterm import="1" ptindx="FB5_3_4"/></d2></equation><equation id="ramRefDone_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_3_1"/><eq_pterm ptindx="FB5_3_2"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_4_1"/></d2><clk><fastsig signal="FCLK"/></clk><ce><eq_pterm ptindx="FB5_4_2"/></ce><prld ptindx="GND"/></equation><equation id="nCAS" regUse="D" userloc="P36"><d2><eq_pterm ptindx="FB5_5_1"/></d2><clk negated="ON"><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nOE" negated="ON" userloc="P37"><d2><eq_pterm ptindx="FB5_6_1"/></d2></equation><equation id="fsbReady0r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB5_7_1"/><eq_pterm ptindx="FB5_7_2"/><eq_pterm ptindx="FB5_7_3"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_8_1"/><eq_pterm ptindx="FB5_8_2"/></d2><clk><fastsig signal="FCLK"/></clk><reset><eq_pterm ptindx="FB5_8_3"/></reset><prld ptindx="GND"/></equation><equation id="RA4_SPECSIG" userloc="P40"><d2><eq_pterm ptindx="FB5_9_1"/><eq_pterm import="1" ptindx="FB5_8_4"/></d2></equation><equation id="ramRAMEN_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_10_1"/><eq_pterm ptindx="FB5_10_2"/><eq_pterm ptindx="FB5_10_3"/><eq_pterm ptindx="FB5_10_4"/><eq_pterm ptindx="FB5_10_5"/><eq_pterm import="1" ptindx="FB5_9_2"/><eq_pterm import="1" ptindx="FB5_9_3"/><eq_pterm import="1" ptindx="FB5_9_4"/><eq_pterm import="1" ptindx="FB5_9_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="RA3_SPECSIG" userloc="P41"><d2><eq_pterm ptindx="FB5_11_1"/><eq_pterm ptindx="FB5_11_2"/></d2></equation><equation id="RA5_SPECSIG" userloc="P42"><d2><eq_pterm import="1" ptindx="FB5_11_3"/><eq_pterm import="1" ptindx="FB5_11_4"/></d2></equation><equation id="ramRS_FSM_FFd2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB5_13_1"/><eq_pterm ptindx="FB5_13_2"/><eq_pterm ptindx="FB5_13_3"/><eq_pterm ptindx="FB5_13_4"/><eq_pterm ptindx="FB5_13_5"/><eq_pterm import="1" ptindx="FB5_12_1"/><eq_pterm import="1" ptindx="FB5_12_2"/><eq_pterm import="1" ptindx="FB5_12_3"/><eq_pterm import="1" ptindx="FB5_12_4"/><eq_pterm import="1" ptindx="FB5_12_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="RA2_SPECSIG" userloc="P43"><d2><eq_pterm ptindx="FB5_14_1"/><eq_pterm ptindx="FB5_14_2"/></d2></equation><equation id="RA6_SPECSIG" userloc="P46"><d2><eq_pterm ptindx="FB5_15_1"/><eq_pterm import="1" ptindx="FB5_14_3"/></d2></equation><equation id="ramRAMReady_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_17_1"/><eq_pterm ptindx="FB5_17_2"/><eq_pterm ptindx="FB5_17_3"/><eq_pterm import="1" ptindx="FB5_16_1"/><eq_pterm import="1" ptindx="FB5_16_2"/><eq_pterm import="1" ptindx="FB5_16_3"/><eq_pterm import="1" ptindx="FB5_16_4"/><eq_pterm import="1" ptindx="FB5_16_5"/><eq_pterm import="1" ptindx="FB5_15_2"/><eq_pterm import="1" ptindx="FB5_15_3"/><eq_pterm import="1" ptindx="FB5_15_4"/><eq_pterm import="1" ptindx="FB5_15_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB6" inputUse="32" pinUse="10"><macrocell id="FB6_MC1" sigUse="6" signal="iobmETACK_SPECSIG"><pterms pt1="FB6_1_1"/></macrocell><macrocell id="FB6_MC2" pin="FB6_MC2_PIN74" sigUse="10" signal="nVMA_IOB"><pterms pt1="FB6_2_1" pt2="FB6_2_2" pt3="FB6_2_3"/></macrocell><macrocell id="FB6_MC3" sigUse="3" signal="iobmDoutOE_SPECSIG"><pterms pt1="FB6_3_1" pt2="FB6_3_2"/></macrocell><macrocell id="FB6_MC4" sigUse="4" signal="iobmALE0_SPECSIG"><pterms pt1="FB6_4_1" pt2="FB6_4_2"/></macrocell><macrocell id="FB6_MC5" pin="FB6_MC5_PIN76" sigUse="6" signal="iobmIOS_FSM_FFd3_SPECSIG"><pterms pt1="FB6_5_1" pt2="FB6_5_2" pt3="FB6_5_3"/></macrocell><macrocell id="FB6_MC6" pin="FB6_MC6_PIN77" sigUse="6" signal="iobmES3_SPECSIG"><pterms pt1="FB6_6_1" pt2="FB6_6_2" pt3="FB6_6_3"/></macrocell><macrocell id="FB6_MC7" sigUse="4" signal="iobmES1_SPECSIG"><pterms pt1="FB6_7_1" pt2="FB6_7_2" pt3="FB6_7_3"/></macrocell><macrocell id="FB6_MC8" pin="FB6_MC8_PIN78" sigUse="7" signal="iobmES0_SPECSIG"><pterms pt1="FB6_8_1" pt2="FB6_8_2" pt3="FB6_8_3"/></macrocell><macrocell id="FB6_MC9" pin="FB6_MC9_PIN79" sigUse="6" signal="nLDS_IOB"><pterms pt1="FB6_9_1" pt2="FB6_9_2" pt3="FB6_9_3" pt4="FB6_9_4"/></macrocell><macrocell id="FB6_MC10" sigUse="7" signal="iobmES4_SPECSIG"><pterms pt1="FB6_10_1" pt2="FB6_10_2" pt3="FB6_10_3" pt4="FB6_10_4"/></macrocell><macrocell id="FB6_MC11" pin="FB6_MC11_PIN80" sigUse="6" signal="nUDS_IOB"><pterms pt1="FB6_11_1" pt2="FB6_11_2" pt3="FB6_11_3" pt4="FB6_11_4"/></macrocell><macrocell id="FB6_MC12" pin="FB6_MC12_PIN81" sigUse="4" signal="nAS_IOB"><pterms pt1="FB6_12_1" pt2="FB6_12_2" pt3="FB6_12_3"/></macrocell><macrocell id="FB6_MC13" sigUse="11" signal="iobmIOS_FSM_FFd2_SPECSIG"><pterms pt1="FB6_13_1" pt2="FB6_13_2" pt3="FB6_13_3" pt4="FB6_13_4" pt5="FB6_13_5"/></macrocell><macrocell id="FB6_MC14" pin="FB6_MC14_PIN82" sigUse="3" signal="nADoutLE1"><pterms pt1="FB6_14_1" pt2="FB6_14_2"/></macrocell><macrocell id="FB6_MC15" pin="FB6_MC15_PIN85" sigUse="2" signal="nADoutLE0"><pterms pt1="FB6_15_1"/></macrocell><macrocell id="FB6_MC16" sigUse="7" signal="iobmES2_SPECSIG"><pterms pt1="FB6_16_1" pt2="FB6_16_2" pt3="FB6_16_3" pt4="FB6_16_4" pt5="FB6_16_5"/></macrocell><macrocell id="FB6_MC17" pin="FB6_MC17_PIN86" sigUse="2" signal="nDinLE"><pterms pt1="FB6_17_1" pt2="FB6_17_2"/></macrocell><macrocell id="FB6_MC18" sigUse="12" signal="iobmIOACT_SPECSIG"><pterms pt1="FB6_18_1" pt2="FB6_18_2" pt3="FB6_18_3" pt4="FB6_18_4" pt5="FB6_18_5"/></macrocell><fbinput id="FB6_I1" signal="C8M"/><fbinput id="FB6_I2" signal="iobmALE0_SPECSIG"/><fbinput id="FB6_I3" signal="iobmBERRrf_SPECSIG"/><fbinput id="FB6_I4" signal="iobmBERRrr_SPECSIG"/><fbinput id="FB6_I5" signal="iobmDTACKrf_SPECSIG"/><fbinput id="FB6_I6" signal="iobmDTACKrr_SPECSIG"/><fbinput id="FB6_I7" signal="iobmES0_SPECSIG"/><fbinput id="FB6_I8" signal="iobmES1_SPECSIG"/><fbinput id="FB6_I9" signal="iobmES2_SPECSIG"/><fbinput id="FB6_I10" signal="iobmES3_SPECSIG"/><fbinput id="FB6_I11" signal="iobmES4_SPECSIG"/><fbinput id="FB6_I12" signal="iobmETACK_SPECSIG"/><fbinput id="FB6_I13" signal="iobmEr_SPECSIG"/><fbinput id="FB6_I14" signal="iobmEr2_SPECSIG"/><fbinput id="FB6_I15" signal="iobmIOACT_SPECSIG"/><fbinput id="FB6_I16" signal="iobmIOREQr_SPECSIG"/><fbinput id="FB6_I17" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB6_I18" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB6_I19" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB6_I20" signal="iobmRESrf_SPECSIG"/><fbinput id="FB6_I21" signal="iobmRESrr_SPECSIG"/><fbinput id="FB6_I22" signal="iobmVPArf_SPECSIG"/><fbinput id="FB6_I23" signal="iobmVPArr_SPECSIG"/><fbinput id="FB6_I24" signal="iobsALE0_SPECSIG"/><fbinput id="FB6_I25" signal="iobsClear1_SPECSIG"/><fbinput id="FB6_I26" signal="iobsIOL0_SPECSIG"/><fbinput id="FB6_I27" signal="iobsIORW0_SPECSIG"/><fbinput id="FB6_I28" signal="iobsIOU0_SPECSIG"/><fbinput id="FB6_I29" signal="iobsLoad1_SPECSIG"/><fbinput id="FB6_I30" signal="nADoutLE1"/><fbinput id="FB6_I31" signal="nAoutOE"/><fbinput id="FB6_I32" signal="nVMA_IOB"/><pterm id="FB6_1_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_2_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/></pterm><pterm id="FB6_2_2"><signal id="nVMA_IOB"/><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmIOACT_SPECSIG"/><signal id="iobmVPArf_SPECSIG"/><signal id="iobmVPArr_SPECSIG"/></pterm><pterm id="FB6_2_3"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_3_1"><signal id="iobsIORW0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB6_3_2"><signal id="iobsIORW0_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_4_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_4_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG" negated="ON"/></pterm><pterm id="FB6_5_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_5_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_5_3"><signal id="C8M" negated="ON"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_6_1"><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_6_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_6_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_7_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/></pterm><pterm id="FB6_7_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_7_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_8_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_8_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_8_3"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_9_1"><signal id="iobsIOL0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_2"><signal id="iobsIOL0_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_3"><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="iobsIOL0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_9_4"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_10_1"><signal id="iobmES4_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_10_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_10_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_10_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_11_1"><signal id="iobsIOU0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_2"><signal id="iobsIOU0_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_3"><signal id="iobsIORW0_SPECSIG" negated="ON"/><signal id="iobsIOU0_SPECSIG"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_11_4"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_12_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_2"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_3"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_13_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_13_2"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_13_3"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_13_4"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_13_5"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_14_1"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB6_14_2"><signal id="iobsClear1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB6_15_1"><signal id="iobmALE0_SPECSIG" negated="ON"/><signal id="iobsALE0_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_1"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_2"><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_16_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/></pterm><pterm id="FB6_16_5"><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_17_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_17_2"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_18_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_18_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG" negated="ON"/></pterm><pterm id="FB6_18_3"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_18_4"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_18_5"><signal id="C8M"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><equation id="iobmETACK_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_1_1"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nVMA_IOB" regUse="T" userloc="P74"><d2><eq_pterm ptindx="FB6_2_1"/><eq_pterm ptindx="FB6_2_2"/></d2><clk><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_2_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmDoutOE_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_3_1"/><eq_pterm ptindx="FB6_3_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmALE0_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_4_1"/><eq_pterm ptindx="FB6_4_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd3_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_5_1"/><eq_pterm ptindx="FB6_5_2"/><eq_pterm ptindx="FB6_5_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmES3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_6_1"/><eq_pterm ptindx="FB6_6_2"/><eq_pterm ptindx="FB6_6_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmES1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_7_1"/><eq_pterm ptindx="FB6_7_2"/><eq_pterm ptindx="FB6_7_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmES0_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB6_8_1"/><eq_pterm ptindx="FB6_8_2"/><eq_pterm ptindx="FB6_8_3"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nLDS_IOB" negated="ON" regUse="D" userloc="P79"><d2><eq_pterm ptindx="FB6_9_1"/><eq_pterm ptindx="FB6_9_2"/><eq_pterm ptindx="FB6_9_3"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_9_4"/></oe><prld ptindx="GND"/></equation><equation id="iobmES4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_10_1"/><eq_pterm ptindx="FB6_10_2"/><eq_pterm ptindx="FB6_10_3"/><eq_pterm ptindx="FB6_10_4"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nUDS_IOB" negated="ON" regUse="D" userloc="P80"><d2><eq_pterm ptindx="FB6_11_1"/><eq_pterm ptindx="FB6_11_2"/><eq_pterm ptindx="FB6_11_3"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_11_4"/></oe><prld ptindx="GND"/></equation><equation id="nAS_IOB" regUse="D" userloc="P81"><d2><eq_pterm ptindx="FB6_12_1"/><eq_pterm ptindx="FB6_12_2"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><oe><eq_pterm ptindx="FB6_12_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_13_1"/><eq_pterm ptindx="FB6_13_2"/><eq_pterm ptindx="FB6_13_3"/><eq_pterm ptindx="FB6_13_4"/><eq_pterm ptindx="FB6_13_5"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nADoutLE1" negated="ON" regUse="D" userloc="P82"><d2><eq_pterm ptindx="FB6_14_1"/><eq_pterm ptindx="FB6_14_2"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="VCC"/></equation><equation id="nADoutLE0" userloc="P85"><d2><eq_pterm ptindx="FB6_15_1"/></d2></equation><equation id="iobmES2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_16_1"/><eq_pterm ptindx="FB6_16_2"/><eq_pterm ptindx="FB6_16_3"/><eq_pterm ptindx="FB6_16_4"/><eq_pterm ptindx="FB6_16_5"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="nDinLE" regUse="D" userloc="P86"><d2><eq_pterm ptindx="FB6_17_1"/></d2><clk negated="ON"><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOACT_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_18_1"/><eq_pterm ptindx="FB6_18_2"/><eq_pterm ptindx="FB6_18_3"/><eq_pterm ptindx="FB6_18_4"/><eq_pterm ptindx="FB6_18_5"/><eq_pterm import="1" ptindx="FB6_17_2"/></d2><clk><fastsig signal="C16M"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB7" inputUse="30" pinUse="8"><macrocell id="FB7_MC1" sigUse="15" signal="cntLTimer13_SPECSIG"><pterms pt1="FB7_1_1" pt2="FB7_1_2" pt3="FB7_1_3"/></macrocell><macrocell id="FB7_MC2" pin="FB7_MC2_PIN50" sigUse="3" signal="RA1_SPECSIG"><pterms pt1="FB7_2_1" pt2="FB7_2_2"/></macrocell><macrocell id="FB7_MC3" sigUse="12" signal="cntLTimer9_SPECSIG"><pterms pt1="FB7_3_1" pt2="FB7_3_2" pt3="FB7_3_3" pt4="FB7_3_4"/></macrocell><macrocell id="FB7_MC4" sigUse="11" signal="cntLTimer8_SPECSIG"><pterms pt1="FB7_4_1" pt2="FB7_4_2" pt3="FB7_4_3" pt4="FB7_4_4"/></macrocell><macrocell id="FB7_MC5" pin="FB7_MC5_PIN52" sigUse="3" signal="RA7_SPECSIG"><pterms pt1="FB7_5_1" pt2="FB7_5_2"/></macrocell><macrocell id="FB7_MC6" pin="FB7_MC6_PIN53" sigUse="3" signal="RA0_SPECSIG"><pterms pt1="FB7_6_1" pt2="FB7_6_2"/></macrocell><macrocell id="FB7_MC7" sigUse="10" signal="cntLTimer7_SPECSIG"><pterms pt1="FB7_7_1" pt2="FB7_7_2" pt3="FB7_7_3" pt4="FB7_7_4" pt5="FB7_7_5"/></macrocell><macrocell id="FB7_MC8" pin="FB7_MC8_PIN54" sigUse="7" signal="RA8_SPECSIG"><pterms pt1="FB7_8_1" pt2="FB7_8_2" pt3="FB7_8_3" pt4="FB7_8_4" pt5="FB7_8_5"/></macrocell><macrocell id="FB7_MC9" pin="FB7_MC9_PIN55" sigUse="1" signal="RA10_SPECSIG"><pterms pt1="FB7_9_1" pt2="FB7_9_2"/></macrocell><macrocell id="FB7_MC10" sigUse="9" signal="cntLTimer6_SPECSIG"><pterms pt1="FB7_10_1" pt2="FB7_10_2" pt3="FB7_10_3" pt4="FB7_10_4"/></macrocell><macrocell id="FB7_MC11" pin="FB7_MC11_PIN56" sigUse="3" signal="RA9_SPECSIG"><pterms pt1="FB7_11_1" pt2="FB7_11_2"/></macrocell><macrocell id="FB7_MC12" pin="FB7_MC12_PIN58" sigUse="0" signal="C25MEN"/><macrocell id="FB7_MC13" sigUse="8" signal="cntLTimer5_SPECSIG"><pterms pt1="FB7_13_1" pt2="FB7_13_2" pt3="FB7_13_3" pt4="FB7_13_4"/></macrocell><macrocell id="FB7_MC14" pin="FB7_MC14_PIN59" sigUse="0" signal="C20MEN"/><macrocell id="FB7_MC15" pin="FB7_MC15_PIN60" sigUse="7" signal="cntLTimer4_SPECSIG"><pterms pt1="FB7_15_1" pt2="FB7_15_2" pt3="FB7_15_3" pt4="FB7_15_4"/></macrocell><macrocell id="FB7_MC16" sigUse="15" signal="cntLTimer12_SPECSIG"><pterms pt1="FB7_16_1" pt2="FB7_16_2" pt3="FB7_16_3" pt4="FB7_16_4"/></macrocell><macrocell id="FB7_MC17" pin="FB7_MC17_PIN61" sigUse="14" signal="cntLTimer11_SPECSIG"><pterms pt1="FB7_17_1" pt2="FB7_17_2" pt3="FB7_17_3" pt4="FB7_17_4"/></macrocell><macrocell id="FB7_MC18" sigUse="13" signal="cntLTimer10_SPECSIG"><pterms pt1="FB7_18_1" pt2="FB7_18_2" pt3="FB7_18_3" pt4="FB7_18_4"/></macrocell><fbinput id="FB7_I1" signal="A_FSB10_SPECSIG"/><fbinput id="FB7_I2" signal="A_FSB11_SPECSIG"/><fbinput id="FB7_I3" signal="A_FSB17_SPECSIG"/><fbinput id="FB7_I4" signal="A_FSB18_SPECSIG"/><fbinput id="FB7_I5" signal="A_FSB19_SPECSIG"/><fbinput id="FB7_I6" signal="A_FSB1_SPECSIG"/><fbinput id="FB7_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB7_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB7_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB7_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB7_I11" signal="A_FSB2_SPECSIG"/><fbinput id="FB7_I12" signal="A_FSB8_SPECSIG"/><fbinput id="FB7_I13" signal="A_FSB9_SPECSIG"/><fbinput id="FB7_I14" signal="cntLTimer0_SPECSIG"/><fbinput id="FB7_I15" signal="cntLTimer10_SPECSIG"/><fbinput id="FB7_I16" signal="cntLTimer11_SPECSIG"/><fbinput id="FB7_I17" signal="cntLTimer12_SPECSIG"/><fbinput id="FB7_I18" signal="cntLTimer13_SPECSIG"/><fbinput id="FB7_I19" signal="cntLTimer1_SPECSIG"/><fbinput id="FB7_I20" signal="cntLTimer2_SPECSIG"/><fbinput id="FB7_I21" signal="cntLTimer3_SPECSIG"/><fbinput id="FB7_I22" signal="cntLTimer4_SPECSIG"/><fbinput id="FB7_I23" signal="cntLTimer5_SPECSIG"/><fbinput id="FB7_I24" signal="cntLTimer6_SPECSIG"/><fbinput id="FB7_I25" signal="cntLTimer7_SPECSIG"/><fbinput id="FB7_I26" signal="cntLTimer8_SPECSIG"/><fbinput id="FB7_I27" signal="cntLTimer9_SPECSIG"/><fbinput id="FB7_I28" signal="cntTimerTC_SPECSIG"/><fbinput id="FB7_I29" signal="csnOverlay1_SPECSIG"/><fbinput id="FB7_I30" signal="ramRASEL_SPECSIG"/><pterm id="FB7_1_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_1_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntLTimer12_SPECSIG"/></pterm><pterm id="FB7_1_3"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_2_1"><signal id="A_FSB11_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB2_SPECSIG"/></pterm><pterm id="FB7_3_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_3_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_3_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_4_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_4_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/></pterm><pterm id="FB7_4_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_4_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_5_1"><signal id="A_FSB8_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_5_2"><signal id="A_FSB17_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_1"><signal id="A_FSB10_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB1_SPECSIG"/></pterm><pterm id="FB7_7_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_7_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/></pterm><pterm id="FB7_7_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_7_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_7_5"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_8_1"><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_2"><signal id="A_FSB18_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_8_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB7_8_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_9_1"><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB7_9_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_10_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_10_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/></pterm><pterm id="FB7_10_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_10_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_11_1"><signal id="A_FSB20_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_11_2"><signal id="A_FSB19_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_13_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/></pterm><pterm id="FB7_13_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_15_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_15_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/></pterm><pterm id="FB7_15_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_15_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_16_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer12_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_16_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_16_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_17_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer11_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_17_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_17_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_4"><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_18_1"><signal id="cntLTimer13_SPECSIG"/><signal id="cntLTimer10_SPECSIG"/><signal id="cntTimerTC_SPECSIG"/></pterm><pterm id="FB7_18_2"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer13_SPECSIG" negated="ON"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/></pterm><pterm id="FB7_18_3"><signal id="cntLTimer0_SPECSIG"/><signal id="cntLTimer1_SPECSIG"/><signal id="cntLTimer2_SPECSIG"/><signal id="cntLTimer3_SPECSIG"/><signal id="cntLTimer5_SPECSIG"/><signal id="cntLTimer4_SPECSIG"/><signal id="cntLTimer6_SPECSIG"/><signal id="cntLTimer7_SPECSIG"/><signal id="cntLTimer9_SPECSIG"/><signal id="cntLTimer8_SPECSIG"/><signal id="cntTimerTC_SPECSIG" negated="ON"/></pterm><pterm id="FB7_18_4"><signal id="cntTimerTC_SPECSIG"/></pterm><equation id="cntLTimer13_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_1_1"/><eq_pterm ptindx="FB7_1_2"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_1_3"/></ce><prld ptindx="GND"/></equation><equation id="RA1_SPECSIG" userloc="P50"><d2><eq_pterm ptindx="FB7_2_1"/><eq_pterm ptindx="FB7_2_2"/></d2></equation><equation id="cntLTimer9_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_3_1"/><eq_pterm ptindx="FB7_3_2"/><eq_pterm ptindx="FB7_3_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_3_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer8_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_4_1"/><eq_pterm ptindx="FB7_4_2"/><eq_pterm ptindx="FB7_4_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_4_4"/></ce><prld ptindx="GND"/></equation><equation id="RA7_SPECSIG" userloc="P52"><d2><eq_pterm ptindx="FB7_5_1"/><eq_pterm ptindx="FB7_5_2"/></d2></equation><equation id="RA0_SPECSIG" userloc="P53"><d2><eq_pterm ptindx="FB7_6_1"/><eq_pterm ptindx="FB7_6_2"/></d2></equation><equation id="cntLTimer7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_7_1"/><eq_pterm ptindx="FB7_7_2"/><eq_pterm ptindx="FB7_7_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_7_4"/></ce><prld ptindx="GND"/></equation><equation id="RA8_SPECSIG" userloc="P54"><d2><eq_pterm ptindx="FB7_8_1"/><eq_pterm ptindx="FB7_8_2"/><eq_pterm ptindx="FB7_8_3"/><eq_pterm ptindx="FB7_8_4"/><eq_pterm ptindx="FB7_8_5"/><eq_pterm import="1" ptindx="FB7_7_5"/><eq_pterm import="1" ptindx="FB7_9_2"/></d2></equation><equation id="RA10_SPECSIG" userloc="P55"><d2><eq_pterm ptindx="FB7_9_1"/></d2></equation><equation id="cntLTimer6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_10_1"/><eq_pterm ptindx="FB7_10_2"/><eq_pterm ptindx="FB7_10_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_10_4"/></ce><prld ptindx="GND"/></equation><equation id="RA9_SPECSIG" userloc="P56"><d2><eq_pterm ptindx="FB7_11_1"/><eq_pterm ptindx="FB7_11_2"/></d2></equation><equation id="C25MEN" userloc="P58"><d2><eq_pterm ptindx="VCC"/></d2></equation><equation id="cntLTimer5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_13_1"/><eq_pterm ptindx="FB7_13_2"/><eq_pterm ptindx="FB7_13_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_13_4"/></ce><prld ptindx="GND"/></equation><equation id="C20MEN" userloc="P59"><d2><eq_pterm ptindx="VCC"/></d2></equation><equation id="cntLTimer4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_15_1"/><eq_pterm ptindx="FB7_15_2"/><eq_pterm ptindx="FB7_15_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_15_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer12_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_16_1"/><eq_pterm ptindx="FB7_16_2"/><eq_pterm ptindx="FB7_16_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_16_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer11_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_17_1"/><eq_pterm ptindx="FB7_17_2"/><eq_pterm ptindx="FB7_17_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_17_4"/></ce><prld ptindx="GND"/></equation><equation id="cntLTimer10_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_18_1"/><eq_pterm ptindx="FB7_18_2"/><eq_pterm ptindx="FB7_18_3"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><ce><eq_pterm ptindx="FB7_18_4"/></ce><prld ptindx="GND"/></equation></fblock><fblock id="FB8" inputUse="33" pinUse="6"><macrocell id="FB8_MC1" sigUse="18" signal="iobsOnce_SPECSIG"><pterms pt1="FB8_1_1" pt2="FB8_1_2" pt3="FB8_1_3" pt4="FB8_1_4" pt5="FB8_1_5"/></macrocell><macrocell id="FB8_MC2" pin="FB8_MC2_PIN63" sigUse="1" signal="RA11_SPECSIG"><pterms pt1="FB8_2_1" pt2="FB8_2_2" pt3="FB8_2_3" pt4="FB8_2_4" pt5="FB8_2_5"/></macrocell><macrocell id="FB8_MC3" sigUse="3" signal="iobsClear1_SPECSIG"><pterms pt1="FB8_3_1" pt2="FB8_3_2"/></macrocell><macrocell id="FB8_MC4" sigUse="2" signal="iobsALE0_SPECSIG"><pterms pt1="FB8_4_1"/></macrocell><macrocell id="FB8_MC5" pin="FB8_MC5_PIN64" sigUse="7" signal="nRAS"><pterms pt1="FB8_5_1" pt2="FB8_5_2" pt3="FB8_5_3"/></macrocell><macrocell id="FB8_MC6" pin="FB8_MC6_PIN65" sigUse="4" signal="nRAMLWE"><pterms pt1="FB8_6_1"/></macrocell><macrocell id="FB8_MC7" sigUse="3" signal="iobsPS_FSM_FFd1_SPECSIG"><pterms pt1="FB8_7_1" pt2="FB8_7_2" pt3="FB8_7_3"/></macrocell><macrocell id="FB8_MC8" pin="FB8_MC8_PIN66" sigUse="4" signal="nRAMUWE"><pterms pt1="FB8_8_1" pt2="FB8_8_2" pt3="FB8_8_3" pt4="FB8_8_4" pt5="FB8_8_5"/></macrocell><macrocell id="FB8_MC9" pin="FB8_MC9_PIN67" sigUse="11" signal="ramRS_FSM_FFd1_SPECSIG"><pterms pt1="FB8_9_1" pt2="FB8_9_2" pt3="FB8_9_3" pt4="FB8_9_4" pt5="FB8_9_5"/></macrocell><macrocell id="FB8_MC10"><pterms pt1="FB8_10_1" pt2="FB8_10_2" pt3="FB8_10_3" pt4="FB8_10_4" pt5="FB8_10_5"/></macrocell><macrocell id="FB8_MC11" pin="FB8_MC11_PIN68" sigUse="11" signal="ramRS_FSM_FFd3_SPECSIG"><pterms pt1="FB8_11_1" pt2="FB8_11_2" pt3="FB8_11_3" pt4="FB8_11_4" pt5="FB8_11_5"/></macrocell><macrocell id="FB8_MC12" pin="FB8_MC12_PIN70" sigUse="8" signal="nBERR_FSB"><pterms pt1="FB8_12_1" pt2="FB8_12_2" pt3="FB8_12_3" pt4="FB8_12_4" pt5="FB8_12_5"/></macrocell><macrocell id="FB8_MC13"><pterms pt1="FB8_13_1" pt2="FB8_13_2" pt3="FB8_13_3" pt4="FB8_13_4" pt5="FB8_13_5"/></macrocell><macrocell id="FB8_MC14" pin="FB8_MC14_PIN71" sigUse="19" signal="iobsPS_FSM_FFd2_SPECSIG"><pterms pt1="FB8_14_1" pt2="FB8_14_2" pt3="FB8_14_3" pt4="FB8_14_4" pt5="FB8_14_5"/></macrocell><macrocell id="FB8_MC15" pin="FB8_MC15_PIN72" sigUse="4" signal="nBR_IOB"><pterms pt1="FB8_15_1" pt2="FB8_15_2" pt3="FB8_15_3" pt4="FB8_15_4" pt5="FB8_15_5"/></macrocell><macrocell id="FB8_MC16" sigUse="18" signal="iobsLoad1_SPECSIG"><pterms pt1="FB8_16_1" pt2="FB8_16_2" pt3="FB8_16_3" pt4="FB8_16_4" pt5="FB8_16_5"/></macrocell><macrocell id="FB8_MC17" pin="FB8_MC17_PIN73" sigUse="2" signal="ramBACTr_SPECSIG"><pterms pt1="FB8_17_1" pt2="FB8_17_2" pt3="FB8_17_3" pt4="FB8_17_4" pt5="FB8_17_5"/></macrocell><macrocell id="FB8_MC18"><pterms pt1="FB8_18_1" pt2="FB8_18_2" pt3="FB8_18_3" pt4="FB8_18_4" pt5="FB8_18_5"/></macrocell><fbinput id="FB8_I1" signal="A_FSB13_SPECSIG"/><fbinput id="FB8_I2" signal="A_FSB14_SPECSIG"/><fbinput id="FB8_I3" signal="A_FSB16_SPECSIG"/><fbinput id="FB8_I4" signal="A_FSB17_SPECSIG"/><fbinput id="FB8_I5" signal="A_FSB18_SPECSIG"/><fbinput id="FB8_I6" signal="A_FSB19_SPECSIG"/><fbinput id="FB8_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB8_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB8_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB8_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB8_I11" signal="cntIPL2r_SPECSIG"/><fbinput id="FB8_I12" signal="cntPORS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I13" signal="cntPORS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I14" signal="csnOverlay1_SPECSIG"/><fbinput id="FB8_I15" signal="fsbASrf_SPECSIG"/><fbinput id="FB8_I16" signal="iobmIOBERR_SPECSIG"/><fbinput id="FB8_I17" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB8_I18" signal="iobsOnce_SPECSIG"/><fbinput id="FB8_I19" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I20" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I21" signal="nADoutLE1"/><fbinput id="FB8_I22" signal="nAS_FSB"/><fbinput id="FB8_I23" signal="nBERR_FSB"/><fbinput id="FB8_I24" signal="nBR_IOB"/><fbinput id="FB8_I25" signal="nLDS_FSB"/><fbinput id="FB8_I26" signal="nUDS_FSB"/><fbinput id="FB8_I27" signal="nWE_FSB"/><fbinput id="FB8_I28" signal="ramRAMEN_SPECSIG"/><fbinput id="FB8_I29" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I30" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I31" signal="ramRS_FSM_FFd3_SPECSIG"/><fbinput id="FB8_I32" signal="ramRefRAS_SPECSIG"/><fbinput id="FB8_I33" signal="ramRefUrgent_SPECSIG"/><pterm id="FB8_1_1"><signal id="iobsOnce_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_1_2"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_1_3"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_1_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_1_5"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_2_1"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_2_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_2_3"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_2_4"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_2_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_3_2"><signal id="A_FSB19_SPECSIG"/></pterm><pterm id="FB8_4_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_5_1"><signal id="ramRefRAS_SPECSIG"/></pterm><pterm id="FB8_5_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_5_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_6_1"><signal id="nWE_FSB" negated="ON"/><signal id="nLDS_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_7_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_7_2"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_7_3"><signal id="nWE_FSB" negated="ON"/><signal id="nUDS_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMEN_SPECSIG"/></pterm><pterm id="FB8_8_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_8_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB8_8_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_8_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB8_8_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRAMEN_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_9_1"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_9_2"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB8_9_3"><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRefUrgent_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_9_4"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_9_5"><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_10_1"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB8_10_2"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_10_3"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_10_4"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRefUrgent_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramRAMEN_SPECSIG" negated="ON"/></pterm><pterm id="FB8_10_5"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_1"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_3"><signal id="iobsOnce_SPECSIG"/><signal id="nBERR_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_11_4"><signal id="iobsOnce_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="nBERR_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_11_5"><signal id="iobsOnce_SPECSIG"/><signal id="nBERR_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="iobmIOBERR_SPECSIG"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_12_1"><signal id="nAS_FSB"/><signal id="nBERR_FSB" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_3"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_12_4"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_13_1"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_13_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_13_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_13_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_13_5"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_14_1"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_14_2"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_14_3"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_14_4"><signal id="nBR_IOB"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB8_14_5"><signal id="nBR_IOB" negated="ON"/><signal id="cntPORS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntPORS_FSM_FFd2_SPECSIG"/><signal id="cntIPL2r_SPECSIG"/></pterm><pterm id="FB8_15_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB19_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB17_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB16_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_1"><signal id="iobsOnce_SPECSIG"/></pterm><pterm id="FB8_16_2"><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_16_3"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_4"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="nWE_FSB"/></pterm><pterm id="FB8_17_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_5"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/></pterm><pterm id="FB8_18_1"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_18_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_18_3"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_18_4"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB8_18_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><equation id="iobsOnce_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB8_1_1"/><eq_pterm ptindx="FB8_1_2"/><eq_pterm ptindx="FB8_1_3"/><eq_pterm ptindx="FB8_1_4"/><eq_pterm ptindx="FB8_1_5"/><eq_pterm import="1" ptindx="FB8_2_1"/><eq_pterm import="1" ptindx="FB8_2_2"/><eq_pterm import="1" ptindx="FB8_2_3"/><eq_pterm import="1" ptindx="FB8_2_4"/><eq_pterm import="1" ptindx="FB8_2_5"/><eq_pterm import="1" ptindx="FB8_18_1"/><eq_pterm import="1" ptindx="FB8_18_2"/><eq_pterm import="1" ptindx="FB8_18_3"/><eq_pterm import="1" ptindx="FB8_18_4"/><eq_pterm import="1" ptindx="FB8_18_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="RA11_SPECSIG" userloc="P63"><d2><eq_pterm import="1" ptindx="FB8_3_2"/></d2></equation><equation id="iobsClear1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB8_3_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsALE0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB8_4_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nRAS" negated="ON" userloc="P64"><d2><eq_pterm ptindx="FB8_5_1"/><eq_pterm ptindx="FB8_5_2"/><eq_pterm ptindx="FB8_5_3"/></d2></equation><equation id="nRAMLWE" negated="ON" userloc="P65"><d2><eq_pterm ptindx="FB8_6_1"/></d2></equation><equation id="iobsPS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB8_7_1"/><eq_pterm ptindx="FB8_7_2"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nRAMUWE" negated="ON" userloc="P66"><d2><eq_pterm import="1" ptindx="FB8_7_3"/></d2></equation><equation id="ramRS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB8_9_1"/><eq_pterm ptindx="FB8_9_2"/><eq_pterm ptindx="FB8_9_3"/><eq_pterm import="1" ptindx="FB8_8_1"/><eq_pterm import="1" ptindx="FB8_8_2"/><eq_pterm import="1" ptindx="FB8_8_3"/><eq_pterm import="1" ptindx="FB8_8_4"/><eq_pterm import="1" ptindx="FB8_8_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramRS_FSM_FFd3_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB8_11_1"/><eq_pterm ptindx="FB8_11_2"/><eq_pterm import="1" ptindx="FB8_10_1"/><eq_pterm import="1" ptindx="FB8_10_2"/><eq_pterm import="1" ptindx="FB8_10_3"/><eq_pterm import="1" ptindx="FB8_10_4"/><eq_pterm import="1" ptindx="FB8_10_5"/><eq_pterm import="1" ptindx="FB8_9_4"/><eq_pterm import="1" ptindx="FB8_9_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nBERR_FSB" regUse="T" userloc="P70"><d2><eq_pterm ptindx="FB8_12_1"/><eq_pterm import="1" ptindx="FB8_11_3"/><eq_pterm import="1" ptindx="FB8_11_4"/><eq_pterm import="1" ptindx="FB8_11_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="iobsPS_FSM_FFd2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB8_14_1"/><eq_pterm ptindx="FB8_14_2"/><eq_pterm ptindx="FB8_14_3"/><eq_pterm import="1" ptindx="FB8_13_1"/><eq_pterm import="1" ptindx="FB8_13_2"/><eq_pterm import="1" ptindx="FB8_13_3"/><eq_pterm import="1" ptindx="FB8_13_4"/><eq_pterm import="1" ptindx="FB8_13_5"/><eq_pterm import="1" ptindx="FB8_12_2"/><eq_pterm import="1" ptindx="FB8_12_3"/><eq_pterm import="1" ptindx="FB8_12_4"/><eq_pterm import="1" ptindx="FB8_12_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="nBR_IOB" regUse="T" userloc="P72"><d2><eq_pterm import="1" ptindx="FB8_14_4"/><eq_pterm import="1" ptindx="FB8_14_5"/></d2><clk negated="ON"><fastsig signal="C8M"/></clk><prld ptindx="GND"/></equation><equation id="iobsLoad1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_16_1"/><eq_pterm ptindx="FB8_16_2"/><eq_pterm ptindx="FB8_16_3"/><eq_pterm ptindx="FB8_16_4"/><eq_pterm ptindx="FB8_16_5"/><eq_pterm import="1" ptindx="FB8_15_1"/><eq_pterm import="1" ptindx="FB8_15_2"/><eq_pterm import="1" ptindx="FB8_15_3"/><eq_pterm import="1" ptindx="FB8_15_4"/><eq_pterm import="1" ptindx="FB8_15_5"/><eq_pterm import="1" ptindx="FB8_17_2"/><eq_pterm import="1" ptindx="FB8_17_3"/><eq_pterm import="1" ptindx="FB8_17_4"/><eq_pterm import="1" ptindx="FB8_17_5"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation><equation id="ramBACTr_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_17_1"/></d2><clk><fastsig signal="FCLK"/></clk><prld ptindx="GND"/></equation></fblock><vcc/><gnd/><messages><warning>Cpld - Unable to retrieve the path to the iSE Project Repository. Will   use the default filename of 'WarpSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'C16M' based upon the LOC   constraint 'P22'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'C8M' based upon the LOC   constraint 'P23'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'FCLK' based upon the LOC   constraint 'P27'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW&lt;1&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW&lt;2&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW&lt;3&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning><warning>Cpld:1007 - Removing unused input(s) 'nBG_IOB'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning></messages><compOpts exhaust="OFF" gclkopt="ON" gsropt="ON" gtsopt="ON" ignorets="OFF" inputs="54" keepio="OFF" loc="ON" mlopt="ON" optimize="SPEED" part="xc95144xl-10-TQ100" power="STD" prld="LOW" pterms="50" slew="FAST" terminate="KEEPER" unused="OFF" wysiwyg="OFF"/><specSig signal="A_FSB9_SPECSIG" value="A_FSB&lt;9&gt;"/><specSig signal="A_FSB8_SPECSIG" value="A_FSB&lt;8&gt;"/><specSig signal="A_FSB15_SPECSIG" value="A_FSB&lt;15&gt;"/><specSig signal="A_FSB14_SPECSIG" value="A_FSB&lt;14&gt;"/><specSig signal="A_FSB13_SPECSIG" value="A_FSB&lt;13&gt;"/><specSig signal="A_FSB12_SPECSIG" value="A_FSB&lt;12&gt;"/><specSig signal="A_FSB11_SPECSIG" value="A_FSB&lt;11&gt;"/><specSig signal="A_FSB10_SPECSIG" value="A_FSB&lt;10&gt;"/><specSig signal="A_FSB23_SPECSIG" value="A_FSB&lt;23&gt;"/><specSig signal="A_FSB22_SPECSIG" value="A_FSB&lt;22&gt;"/><specSig signal="A_FSB21_SPECSIG" value="A_FSB&lt;21&gt;"/><specSig signal="A_FSB20_SPECSIG" value="A_FSB&lt;20&gt;"/><specSig signal="A_FSB19_SPECSIG" value="A_FSB&lt;19&gt;"/><specSig signal="A_FSB18_SPECSIG" value="A_FSB&lt;18&gt;"/><specSig signal="A_FSB17_SPECSIG" value="A_FSB&lt;17&gt;"/><specSig signal="A_FSB16_SPECSIG" value="A_FSB&lt;16&gt;"/><specSig signal="nRESPIN_SPECSIG" value="nRES.PIN"/><specSig signal="A_FSB1_SPECSIG" value="A_FSB&lt;1&gt;"/><specSig signal="A_FSB2_SPECSIG" value="A_FSB&lt;2&gt;"/><specSig signal="A_FSB3_SPECSIG" value="A_FSB&lt;3&gt;"/><specSig signal="A_FSB4_SPECSIG" value="A_FSB&lt;4&gt;"/><specSig signal="A_FSB5_SPECSIG" value="A_FSB&lt;5&gt;"/><specSig signal="A_FSB6_SPECSIG" value="A_FSB&lt;6&gt;"/><specSig signal="A_FSB7_SPECSIG" value="A_FSB&lt;7&gt;"/><specSig signal="GCKI_SPECSIG" value="GCK/I"/><specSig signal="IO_SPECSIG" value="I/O"/><specSig signal="b_SPECSIG" value="(b)"/><specSig signal="csnOverlay0_SPECSIG" value="cs/nOverlay0"/><specSig signal="RA4_SPECSIG" value="RA&lt;4&gt;"/><specSig signal="RA3_SPECSIG" value="RA&lt;3&gt;"/><specSig signal="RA5_SPECSIG" value="RA&lt;5&gt;"/><specSig signal="RA2_SPECSIG" value="RA&lt;2&gt;"/><specSig signal="RA6_SPECSIG" value="RA&lt;6&gt;"/><specSig signal="ramRAMReady_SPECSIG" value="ram/RAMReady"/><specSig signal="RA1_SPECSIG" value="RA&lt;1&gt;"/><specSig signal="RA7_SPECSIG" value="RA&lt;7&gt;"/><specSig signal="RA0_SPECSIG" value="RA&lt;0&gt;"/><specSig signal="RA8_SPECSIG" value="RA&lt;8&gt;"/><specSig signal="RA10_SPECSIG" value="RA&lt;10&gt;"/><specSig signal="RA9_SPECSIG" value="RA&lt;9&gt;"/><specSig signal="cntLTimer4_SPECSIG" value="cnt/LTimer&lt;4&gt;"/><specSig signal="cntLTimer11_SPECSIG" value="cnt/LTimer&lt;11&gt;"/><specSig signal="RA11_SPECSIG" value="RA&lt;11&gt;"/><specSig signal="ramRS_FSM_FFd1_SPECSIG" value="ram/RS_FSM_FFd1"/><specSig signal="ramRS_FSM_FFd3_SPECSIG" value="ram/RS_FSM_FFd3"/><specSig signal="iobsPS_FSM_FFd2_SPECSIG" value="iobs/PS_FSM_FFd2"/><specSig signal="ramBACTr_SPECSIG" value="ram/BACTr"/><specSig signal="ramRegUrgentSync_SPECSIG" value="ram/RegUrgentSync"/><specSig signal="ramRefUrgent_SPECSIG" value="ram/RefUrgent"/><specSig signal="ramRefReqSync_SPECSIG" value="ram/RefReqSync"/><specSig signal="ramRefReq_SPECSIG" value="ram/RefReq"/><specSig signal="ramRefRAS_SPECSIG" value="ram/RefRAS"/><specSig signal="iobsIOACTr_SPECSIG" value="iobs/IOACTr"/><specSig signal="fsbASrf_SPECSIG" value="fsb/ASrf"/><specSig signal="iobsIOU1_SPECSIG" value="iobs/IOU1"/><specSig signal="iobsIOL1_SPECSIG" value="iobs/IOL1"/><specSig signal="cntTimerTC_SPECSIG" value="cnt/TimerTC"/><specSig signal="iobsIOU0_SPECSIG" value="iobs/IOU0"/><specSig signal="iobsIOL0_SPECSIG" value="iobs/IOL0"/><specSig signal="cntTimer3_SPECSIG" value="cnt/Timer&lt;3&gt;"/><specSig signal="cntTimer2_SPECSIG" value="cnt/Timer&lt;2&gt;"/><specSig signal="cntTimer1_SPECSIG" value="cnt/Timer&lt;1&gt;"/><specSig signal="cntRefUrgent_SPECSIG" value="cnt/RefUrgent"/><specSig signal="iobsIOReady_SPECSIG" value="iobs/IOReady"/><specSig signal="cntRefReq_SPECSIG" value="cnt/RefReq"/><specSig signal="cntTimer0_SPECSIG" value="cnt/Timer&lt;0&gt;"/><specSig signal="iobmIOACT_SPECSIG" value="iobm/IOACT"/><specSig signal="iobmIOBERR_SPECSIG" value="iobm/IOBERR"/><specSig signal="iobsLoad1_SPECSIG" value="iobs/Load1"/><specSig signal="iobsOnce_SPECSIG" value="iobs/Once"/><specSig signal="iobsPS_FSM_FFd1_SPECSIG" value="iobs/PS_FSM_FFd1"/><specSig signal="ramRS_FSM_FFd2_SPECSIG" value="ram/RS_FSM_FFd2"/><specSig signal="ramRefDone_SPECSIG" value="ram/RefDone"/><specSig signal="iobmVPArr_SPECSIG" value="iobm/VPArr"/><specSig signal="iobmVPArf_SPECSIG" value="iobm/VPArf"/><specSig signal="iobmRESrr_SPECSIG" value="iobm/RESrr"/><specSig signal="iobmRESrf_SPECSIG" value="iobm/RESrf"/><specSig signal="iobmIOREQr_SPECSIG" value="iobm/IOREQr"/><specSig signal="iobmEr2_SPECSIG" value="iobm/Er2"/><specSig signal="iobmEr_SPECSIG" value="iobm/Er"/><specSig signal="iobmDTACKrr_SPECSIG" value="iobm/DTACKrr"/><specSig signal="iobmDTACKrf_SPECSIG" value="iobm/DTACKrf"/><specSig signal="iobsIOREQ_SPECSIG" value="iobs/IOREQ"/><specSig signal="fsbVPA_SPECSIG" value="fsb/VPA"/><specSig signal="fsbReady1r_SPECSIG" value="fsb/Ready1r"/><specSig signal="iobsIORW1_SPECSIG" value="iobs/IORW1"/><specSig signal="iobsIORW0_SPECSIG" value="iobs/IORW0"/><specSig signal="csnOverlay1_SPECSIG" value="cs/nOverlay1"/><specSig signal="fsbReady0r_SPECSIG" value="fsb/Ready0r"/><specSig signal="iobmBERRrr_SPECSIG" value="iobm/BERRrr"/><specSig signal="iobmBERRrf_SPECSIG" value="iobm/BERRrf"/><specSig signal="cntPORS_FSM_FFd1_SPECSIG" value="cnt/PORS_FSM_FFd1"/><specSig signal="cntIPL2r_SPECSIG" value="cnt/IPL2r"/><specSig signal="iobmIOS_FSM_FFd1_SPECSIG" value="iobm/IOS_FSM_FFd1"/><specSig signal="cntnRESout_SPECSIG" value="cnt/nRESout"/><specSig signal="cntPORS_FSM_FFd2_SPECSIG" value="cnt/PORS_FSM_FFd2"/><specSig signal="cntLTimer0_SPECSIG" value="cnt/LTimer&lt;0&gt;"/><specSig signal="cntLTimer3_SPECSIG" value="cnt/LTimer&lt;3&gt;"/><specSig signal="cntLTimer2_SPECSIG" value="cnt/LTimer&lt;2&gt;"/><specSig signal="cntLTimer1_SPECSIG" value="cnt/LTimer&lt;1&gt;"/><specSig signal="cntLTimer13_SPECSIG" value="cnt/LTimer&lt;13&gt;"/><specSig signal="iobmDoutOE_SPECSIG" value="iobm/DoutOE"/><specSig signal="iobmETACK_SPECSIG" value="iobm/ETACK"/><specSig signal="iobmIOS_FSM_FFd2_SPECSIG" value="iobm/IOS_FSM_FFd2"/><specSig signal="iobmIOS_FSM_FFd3_SPECSIG" value="iobm/IOS_FSM_FFd3"/><specSig signal="ramRASEL_SPECSIG" value="ram/RASEL"/><specSig signal="ramRAMEN_SPECSIG" value="ram/RAMEN"/><specSig signal="iobmALE0_SPECSIG" value="iobm/ALE0"/><specSig signal="iobmES3_SPECSIG" value="iobm/ES&lt;3&gt;"/><specSig signal="iobmES1_SPECSIG" value="iobm/ES&lt;1&gt;"/><specSig signal="iobmES0_SPECSIG" value="iobm/ES&lt;0&gt;"/><specSig signal="iobmES4_SPECSIG" value="iobm/ES&lt;4&gt;"/><specSig signal="iobmES2_SPECSIG" value="iobm/ES&lt;2&gt;"/><specSig signal="iobsALE0_SPECSIG" value="iobs/ALE0"/><specSig signal="iobsClear1_SPECSIG" value="iobs/Clear1"/><specSig signal="cntLTimer9_SPECSIG" value="cnt/LTimer&lt;9&gt;"/><specSig signal="cntLTimer8_SPECSIG" value="cnt/LTimer&lt;8&gt;"/><specSig signal="cntLTimer7_SPECSIG" value="cnt/LTimer&lt;7&gt;"/><specSig signal="cntLTimer6_SPECSIG" value="cnt/LTimer&lt;6&gt;"/><specSig signal="cntLTimer5_SPECSIG" value="cnt/LTimer&lt;5&gt;"/><specSig signal="cntLTimer12_SPECSIG" value="cnt/LTimer&lt;12&gt;"/><specSig signal="cntLTimer10_SPECSIG" value="cnt/LTimer&lt;10&gt;"/></document>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/ascii.htm b/cpld/XC95144XL/WarpSE_html/fit/ascii.htm
index 771db51..f49539f 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/ascii.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/ascii.htm
@@ -3,7 +3,7 @@
  
 cpldfit:  version P.20131013                        Xilinx Inc.
                                   Fitter Report
-Design Name: WarpSE                              Date:  3-20-2023, 11:54PM
+Design Name: WarpSE                              Date:  3-25-2023,  0:52AM
 Device Used: XC95144XL-10-TQ100
 Fitting Status: Successful
 
@@ -11,22 +11,22 @@ Fitting Status: Successful
 
 Macrocells     Product Terms    Function Block   Registers      Pins           
 Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-121/144 ( 84%) 440 /720  ( 61%) 227/432 ( 53%)   96 /144 ( 67%) 72 /81  ( 89%)
+119/144 ( 83%) 428 /720  ( 59%) 230/432 ( 53%)   94 /144 ( 65%) 71 /81  ( 88%)
 
 ** Function Block Resources **
 
 Function    Mcells      FB Inps     Pterms      IO          
 Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1          18/18*      25/54       26/90      11/11*
-FB2          12/18       16/54       15/90       8/10
-FB3           9/18       34/54       81/90      10/10*
-FB4          18/18*      24/54       44/90      10/10*
-FB5          16/18       30/54       77/90       8/10
-FB6          18/18*      34/54       61/90      10/10*
+FB1          18/18*      28/54       39/90      11/11*
+FB2          10/18        8/54       11/90       8/10
+FB3           7/18       33/54       81/90      10/10*
+FB4          17/18       34/54       40/90      10/10*
+FB5          16/18       32/54       72/90       8/10
+FB6          18/18*      32/54       55/90      10/10*
 FB7          18/18*      30/54       55/90       8/10
-FB8          12/18       34/54       81/90       7/10
+FB8          15/18       33/54       75/90       6/10
              -----       -----       -----      -----    
-            121/144     227/432     440/720     72/81 
+            119/144     230/432     428/720     71/81 
 
 * - Resource is exhausted
 
@@ -42,18 +42,18 @@ Global set/reset net(s) unused.
 
 Signal Type    Required     Mapped  |  Pin Type            Used    Total 
 ------------------------------------|------------------------------------
-Input         :   33          33    |  I/O              :    66      73
+Input         :   32          32    |  I/O              :    65      73
 Output        :   35          35    |  GCK/IO           :     3       3
 Bidirectional :    1           1    |  GTS/IO           :     3       4
 GCK           :    3           3    |  GSR/IO           :     0       1
 GTS           :    0           0    |
 GSR           :    0           0    |
                  ----        ----
-        Total     72          72
+        Total     71          71
 
 ** Power Data **
 
-There are 121 macrocells in high performance mode (MCHP).
+There are 119 macrocells in high performance mode (MCHP).
 There are 0 macrocells in low power mode (MCLP).
 End of Mapped Resource Summary
 **************************  Errors and Warnings  ***************************
@@ -81,17 +81,19 @@ WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'.  The input(s) are unused
    after optimization. Please verify functionality via simulation.
 WARNING:Cpld:1007 - Removing unused input(s) 'SW<3>'.  The input(s) are unused
    after optimization. Please verify functionality via simulation.
+WARNING:Cpld:1007 - Removing unused input(s) 'nBG_IOB'.  The input(s) are unused
+   after optimization. Please verify functionality via simulation.
 *************************  Summary of Mapped Logic  ************************
 
 ** 36 Outputs **
 
 Signal              Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
 Name                Pts   Inps          No.  Type    Use     Mode Rate State
-nDTACK_FSB          11    26    FB3_9   28   I/O     O       STD  FAST RESET
+nDTACK_FSB          10    26    FB3_9   28   I/O     O       STD  FAST RESET
 nROMWE              1     2     FB3_17  34   I/O     O       STD  FAST 
-nAoutOE             1     3     FB4_2   87   I/O     O       STD  FAST RESET
+nAoutOE             1     3     FB4_2   87   I/O     O       STD  FAST SET
 nDoutOE             1     2     FB4_5   89   I/O     O       STD  FAST 
-nDinOE              2     6     FB4_6   90   I/O     O       STD  FAST 
+nDinOE              3     6     FB4_6   90   I/O     O       STD  FAST 
 nRES                1     1     FB4_8   91   I/O     I/O     STD  FAST 
 nVPA_FSB            1     2     FB4_11  93   I/O     O       STD  FAST 
 nROMCS              2     5     FB5_2   35   I/O     O       STD  FAST 
@@ -124,67 +126,62 @@ nRAMUWE             1     4     FB8_8   66   I/O     O       STD  FAST
 nBERR_FSB           4     8     FB8_12  70   I/O     O       STD  FAST RESET
 nBR_IOB             2     4     FB8_15  72   I/O     O       STD  FAST RESET
 
-** 85 Buried Nodes **
+** 83 Buried Nodes **
 
 Signal              Total Total Loc     Pwr  Reg Init
 Name                Pts   Inps          Mode State
-iobm/nASr           1     2     FB1_1   STD  RESET
-iobm/VPArr          1     1     FB1_2   STD  RESET
-iobm/VPArf          1     1     FB1_3   STD  RESET
-iobm/RESrr          1     1     FB1_4   STD  RESET
-iobm/RESrf          1     1     FB1_5   STD  RESET
-iobm/IOREQr         1     1     FB1_6   STD  RESET
-iobm/Er2            1     1     FB1_7   STD  RESET
-iobm/Er             1     1     FB1_8   STD  RESET
-iobm/DTACKrr        1     1     FB1_9   STD  RESET
-iobm/DTACKrf        1     1     FB1_10  STD  RESET
-iobm/BERRrr         1     1     FB1_11  STD  RESET
-iobm/BERRrf         1     1     FB1_12  STD  RESET
-cnt/IPL2r           1     1     FB1_13  STD  RESET
-iobm/IOS_FSM_FFd1   2     3     FB1_14  STD  RESET
-iobm/BG             2     2     FB1_15  STD  RESET
-iobs/IOU0           3     5     FB1_16  STD  RESET
-iobs/IOL0           3     5     FB1_17  STD  RESET
-iobm/IOS_FSM_FFd3   3     6     FB1_18  STD  RESET
-ram/RegUrgentSync   1     1     FB2_7   STD  RESET
-ram/RefUrgent       1     2     FB2_8   STD  RESET
-ram/RefReqSync      1     1     FB2_9   STD  RESET
-ram/RefReq          1     2     FB2_10  STD  RESET
-ram/RefRAS          1     2     FB2_11  STD  RESET
-ram/BACTr           1     2     FB2_12  STD  RESET
-iobs/IOACTr         1     1     FB2_13  STD  RESET
-iobs/ALE0           1     2     FB2_14  STD  RESET
-fsb/ASrf            1     1     FB2_15  STD  RESET
-iobs/PS_FSM_FFd1    2     3     FB2_16  STD  RESET
-iobs/IOU1           2     2     FB2_17  STD  RESET
-iobs/IOL1           2     2     FB2_18  STD  RESET
-fsb/VPA             20    26    FB3_2   STD  RESET
-iobs/Clear1         1     3     FB3_5   STD  RESET
-fsb/Ready0r         3     8     FB3_6   STD  RESET
-iobs/IOReady        4     8     FB3_7   STD  RESET
-fsb/Ready1r         7     17    FB3_10  STD  RESET
+ram/RegUrgentSync   1     1     FB1_1   STD  RESET
+ram/RefUrgent       1     2     FB1_2   STD  RESET
+ram/RefReqSync      1     1     FB1_3   STD  RESET
+ram/RefReq          1     2     FB1_4   STD  RESET
+ram/RefRAS          1     2     FB1_5   STD  RESET
+iobs/IOACTr         1     1     FB1_6   STD  RESET
+fsb/ASrf            1     1     FB1_7   STD  RESET
+iobs/IOU1           2     2     FB1_8   STD  RESET
+iobs/IOL1           2     2     FB1_9   STD  RESET
+cnt/TimerTC         2     5     FB1_10  STD  RESET
+iobs/IOU0           3     5     FB1_11  STD  RESET
+iobs/IOL0           3     5     FB1_12  STD  RESET
+cnt/Timer<3>        3     6     FB1_13  STD  RESET
+cnt/Timer<2>        3     5     FB1_14  STD  RESET
+cnt/Timer<1>        3     4     FB1_15  STD  RESET
+cnt/RefUrgent       3     5     FB1_16  STD  RESET
+iobs/IOReady        4     8     FB1_17  STD  RESET
+cnt/RefReq          4     5     FB1_18  STD  RESET
+iobm/VPArr          1     1     FB2_9   STD  RESET
+iobm/VPArf          1     1     FB2_10  STD  RESET
+iobm/RESrr          1     1     FB2_11  STD  RESET
+iobm/RESrf          1     1     FB2_12  STD  RESET
+iobm/IOREQr         1     1     FB2_13  STD  RESET
+iobm/Er2            1     1     FB2_14  STD  RESET
+iobm/Er             1     1     FB2_15  STD  RESET
+iobm/DTACKrr        1     1     FB2_16  STD  RESET
+iobm/DTACKrf        1     1     FB2_17  STD  RESET
+cnt/Timer<0>        2     3     FB2_18  STD  RESET
+fsb/VPA             18    26    FB3_1   STD  RESET
+iobs/IOREQ          13    19    FB3_7   STD  RESET
+fsb/Ready1r         6     17    FB3_10  STD  RESET
 iobs/IORW1          16    19    FB3_12  STD  RESET
-iobs/IORW0          18    20    FB3_15  STD  RESET
-cnt/nRESout         2     4     FB4_1   STD  RESET
-cnt/TimerTC         2     5     FB4_3   STD  RESET
-cnt/Timer<0>        2     3     FB4_4   STD  RESET
+iobs/IORW0          17    20    FB3_15  STD  RESET
+iobm/BERRrr         1     1     FB4_3   STD  RESET
+iobm/BERRrf         1     1     FB4_4   STD  RESET
+cnt/PORS_FSM_FFd1   1     4     FB4_7   STD  RESET
+cnt/IPL2r           1     1     FB4_9   STD  RESET
+iobm/IOS_FSM_FFd1   2     3     FB4_10  STD  RESET
+cnt/nRESout         2     4     FB4_12  STD  RESET
+cnt/PORS_FSM_FFd2   2     3     FB4_13  STD  RESET
 
 Signal              Total Total Loc     Pwr  Reg Init
 Name                Pts   Inps          Mode State
-cnt/PORS_FSM_FFd2   2     3     FB4_7   STD  RESET
-cnt/LTimer<0>       2     3     FB4_9   STD  RESET
-cnt/Timer<3>        3     6     FB4_10  STD  RESET
-cnt/Timer<2>        3     5     FB4_12  STD  RESET
-cnt/Timer<1>        3     4     FB4_13  STD  RESET
-cnt/RefUrgent       3     5     FB4_14  STD  RESET
-cnt/RefReq          4     5     FB4_15  STD  RESET
-cnt/LTimer<3>       4     6     FB4_16  STD  RESET
-cnt/LTimer<2>       4     5     FB4_17  STD  RESET
-cnt/LTimer<1>       4     4     FB4_18  STD  RESET
+cnt/LTimer<0>       2     3     FB4_14  STD  RESET
+cnt/LTimer<3>       4     6     FB4_15  STD  RESET
+cnt/LTimer<2>       4     5     FB4_16  STD  RESET
+cnt/LTimer<1>       4     4     FB4_17  STD  RESET
+iobm/IOBERR         9     13    FB4_18  STD  RESET
 ram/RASEL           17    13    FB5_1   STD  RESET
 ram/RefDone         2     4     FB5_3   STD  RESET
 cs/nOverlay1        2     3     FB5_4   STD  RESET
-ram/RS_FSM_FFd1     8     11    FB5_7   STD  RESET
+fsb/Ready0r         3     8     FB5_7   STD  RESET
 cs/nOverlay0        3     8     FB5_8   STD  RESET
 ram/RAMEN           9     13    FB5_10  STD  RESET
 ram/RS_FSM_FFd2     10    12    FB5_13  STD  RESET
@@ -192,14 +189,14 @@ ram/RAMReady        12    13    FB5_17  STD  RESET
 iobm/ETACK          1     6     FB6_1   STD  RESET
 iobm/DoutOE         2     3     FB6_3   STD  RESET
 iobm/ALE0           2     4     FB6_4   STD  RESET
-iobm/ES<3>          3     6     FB6_5   STD  RESET
-iobm/ES<1>          3     4     FB6_6   STD  RESET
-iobm/ES<0>          3     7     FB6_7   STD  RESET
-iobm/ES<4>          4     7     FB6_8   STD  RESET
-iobm/IOS_FSM_FFd2   5     11    FB6_10  STD  RESET
-iobm/ES<2>          5     7     FB6_13  STD  RESET
-iobm/IOACT          6     12    FB6_16  STD  RESET
-iobm/IOBERR         9     13    FB6_18  STD  RESET
+iobm/IOS_FSM_FFd3   3     6     FB6_5   STD  RESET
+iobm/ES<3>          3     6     FB6_6   STD  RESET
+iobm/ES<1>          3     4     FB6_7   STD  RESET
+iobm/ES<0>          3     7     FB6_8   STD  RESET
+iobm/ES<4>          4     7     FB6_10  STD  RESET
+iobm/IOS_FSM_FFd2   5     11    FB6_13  STD  RESET
+iobm/ES<2>          5     7     FB6_16  STD  RESET
+iobm/IOACT          6     12    FB6_18  STD  RESET
 cnt/LTimer<13>      3     15    FB7_1   STD  RESET
 cnt/LTimer<9>       4     12    FB7_3   STD  RESET
 cnt/LTimer<8>       4     11    FB7_4   STD  RESET
@@ -210,17 +207,20 @@ cnt/LTimer<4>       4     7     FB7_15  STD  RESET
 cnt/LTimer<12>      4     15    FB7_16  STD  RESET
 cnt/LTimer<11>      4     14    FB7_17  STD  RESET
 cnt/LTimer<10>      4     13    FB7_18  STD  RESET
-cnt/PORS_FSM_FFd1   1     4     FB8_1   STD  RESET
+iobs/Once           15    18    FB8_1   STD  RESET
+iobs/Clear1         1     3     FB8_3   STD  RESET
+iobs/ALE0           1     2     FB8_4   STD  RESET
+iobs/PS_FSM_FFd1    2     3     FB8_7   STD  RESET
+ram/RS_FSM_FFd1     8     11    FB8_9   STD  RESET
+ram/RS_FSM_FFd3     9     11    FB8_11  STD  RESET
 
 Signal              Total Total Loc     Pwr  Reg Init
 Name                Pts   Inps          Mode State
-ram/RS_FSM_FFd3     9     11    FB8_3   STD  RESET
-iobs/PS_FSM_FFd2    14    19    FB8_7   STD  RESET
-iobs/Load1          14    18    FB8_10  STD  RESET
-iobs/IOREQ          14    19    FB8_14  STD  RESET
-iobs/Once           17    18    FB8_17  STD  RESET
+iobs/PS_FSM_FFd2    12    19    FB8_14  STD  RESET
+iobs/Load1          14    18    FB8_16  STD  RESET
+ram/BACTr           1     2     FB8_17  STD  RESET
 
-** 36 Inputs **
+** 35 Inputs **
 
 Signal              Loc     Pin  Pin     Pin     
 Name                        No.  Type    Use     
@@ -259,7 +259,6 @@ A_FSB<4>            FB4_17  97   I/O     I
 nBERR_IOB           FB6_5   76   I/O     I
 nVPA_IOB            FB6_6   77   I/O     I
 nDTACK_IOB          FB6_8   78   I/O     I
-nBG_IOB             FB8_17  73   I/O     I
 
 Legend:
 Pin No. - ~ - User Assigned
@@ -277,65 +276,66 @@ Pin Type/Use - I  - Input             GCK - Global Clock
 X            - Signal used as input to the macrocell logic.
 Pin No.      - ~  - User Assigned
 *********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               25/29
-Number of signals used by logic mapping into function block:  25
+Number of function block inputs used/remaining:               28/26
+Number of signals used by logic mapping into function block:  28
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/nASr             1       0     0   4     FB1_1         (b)     (b)
-iobm/VPArr            1       0     0   4     FB1_2   11    I/O     I
-iobm/VPArf            1       0     0   4     FB1_3   12    I/O     I
-iobm/RESrr            1       0     0   4     FB1_4         (b)     (b)
-iobm/RESrf            1       0     0   4     FB1_5   13    I/O     I
-iobm/IOREQr           1       0     0   4     FB1_6   14    I/O     I
-iobm/Er2              1       0     0   4     FB1_7         (b)     (b)
-iobm/Er               1       0     0   4     FB1_8   15    I/O     I
-iobm/DTACKrr          1       0     0   4     FB1_9   16    I/O     I
-iobm/DTACKrf          1       0     0   4     FB1_10        (b)     (b)
-iobm/BERRrr           1       0     0   4     FB1_11  17    I/O     I
-iobm/BERRrf           1       0     0   4     FB1_12  18    I/O     I
-cnt/IPL2r             1       0     0   4     FB1_13        (b)     (b)
-iobm/IOS_FSM_FFd1     2       0     0   3     FB1_14  19    I/O     I
-iobm/BG               2       0     0   3     FB1_15  20    I/O     I
-iobs/IOU0             3       0     0   2     FB1_16        (b)     (b)
-iobs/IOL0             3       0     0   2     FB1_17  22    GCK/I/O GCK
-iobm/IOS_FSM_FFd3     3       0     0   2     FB1_18        (b)     (b)
+ram/RegUrgentSync     1       0     0   4     FB1_1         (b)     (b)
+ram/RefUrgent         1       0     0   4     FB1_2   11    I/O     I
+ram/RefReqSync        1       0     0   4     FB1_3   12    I/O     I
+ram/RefReq            1       0     0   4     FB1_4         (b)     (b)
+ram/RefRAS            1       0     0   4     FB1_5   13    I/O     I
+iobs/IOACTr           1       0     0   4     FB1_6   14    I/O     I
+fsb/ASrf              1       0     0   4     FB1_7         (b)     (b)
+iobs/IOU1             2       0     0   3     FB1_8   15    I/O     I
+iobs/IOL1             2       0     0   3     FB1_9   16    I/O     I
+cnt/TimerTC           2       0     0   3     FB1_10        (b)     (b)
+iobs/IOU0             3       0     0   2     FB1_11  17    I/O     I
+iobs/IOL0             3       0     0   2     FB1_12  18    I/O     I
+cnt/Timer<3>          3       0     0   2     FB1_13        (b)     (b)
+cnt/Timer<2>          3       0     0   2     FB1_14  19    I/O     I
+cnt/Timer<1>          3       0     0   2     FB1_15  20    I/O     I
+cnt/RefUrgent         3       0     0   2     FB1_16        (b)     (b)
+iobs/IOReady          4       0     0   1     FB1_17  22    GCK/I/O GCK
+cnt/RefReq            4       0     0   1     FB1_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: C8M                10: iobm/nASr         18: nAoutOE 
-  2: E                  11: iobs/IOL1         19: nBERR_IOB 
-  3: nRES.PIN           12: iobs/IOREQ        20: nBG_IOB 
-  4: iobm/BG            13: iobs/IOU1         21: nDTACK_IOB 
-  5: iobm/Er            14: iobs/PS_FSM_FFd1  22: nIPL2 
-  6: iobm/IOREQr        15: iobs/PS_FSM_FFd2  23: nLDS_FSB 
-  7: iobm/IOS_FSM_FFd1  16: nADoutLE1         24: nUDS_FSB 
-  8: iobm/IOS_FSM_FFd2  17: nAS_IOB           25: nVPA_IOB 
-  9: iobm/IOS_FSM_FFd3 
+  1: E                 11: iobm/IOBERR       20: nADoutLE1 
+  2: cnt/RefReq        12: iobs/IOACTr       21: nAS_FSB 
+  3: cnt/RefUrgent     13: iobs/IOL1         22: nLDS_FSB 
+  4: cnt/Timer<0>      14: iobs/IOReady      23: nUDS_FSB 
+  5: cnt/Timer<1>      15: iobs/IOU1         24: ram/RS_FSM_FFd1 
+  6: cnt/Timer<2>      16: iobs/Load1        25: ram/RS_FSM_FFd2 
+  7: cnt/Timer<3>      17: iobs/Once         26: ram/RefDone 
+  8: cnt/TimerTC       18: iobs/PS_FSM_FFd1  27: ram/RefReqSync 
+  9: fsb/ASrf          19: iobs/PS_FSM_FFd2  28: ram/RegUrgentSync 
+ 10: iobm/IOACT       
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/nASr            ................XX...................... 2
-iobm/VPArr           ........................X............... 1
-iobm/VPArf           ........................X............... 1
-iobm/RESrr           ..X..................................... 1
-iobm/RESrf           ..X..................................... 1
-iobm/IOREQr          ...........X............................ 1
-iobm/Er2             ....X................................... 1
-iobm/Er              .X...................................... 1
-iobm/DTACKrr         ....................X................... 1
-iobm/DTACKrf         ....................X................... 1
-iobm/BERRrr          ..................X..................... 1
-iobm/BERRrf          ..................X..................... 1
-cnt/IPL2r            .....................X.................. 1
-iobm/IOS_FSM_FFd1    ......XXX............................... 3
-iobm/BG              .........X.........X.................... 2
-iobs/IOU0            ............XXXX.......X................ 5
-iobs/IOL0            ..........X..XXX......X................. 5
-iobm/IOS_FSM_FFd3    X..X.XXXX............................... 6
+ram/RegUrgentSync    ..X..................................... 1
+ram/RefUrgent        .........................X.X............ 2
+ram/RefReqSync       .X...................................... 1
+ram/RefReq           .........................XX............. 2
+ram/RefRAS           .......................XX............... 2
+iobs/IOACTr          .........X.............................. 1
+fsb/ASrf             ....................X................... 1
+iobs/IOU1            ...............X......X................. 2
+iobs/IOL1            ...............X.....X.................. 2
+cnt/TimerTC          X..XXXX................................. 5
+iobs/IOU0            ..............X..XXX..X................. 5
+iobs/IOL0            ............X....XXX.X.................. 5
+cnt/Timer<3>         X..XXXXX................................ 6
+cnt/Timer<2>         X..XXX.X................................ 5
+cnt/Timer<1>         X..XX..X................................ 4
+cnt/RefUrgent        X..XXXX................................. 5
+iobs/IOReady         ........X.XX.X..X.XXX................... 8
+cnt/RefReq           X..XXXX................................. 5
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               16/38
-Number of signals used by logic mapping into function block:  16
+Number of function block inputs used/remaining:               8/46
+Number of signals used by logic mapping into function block:  8
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_1         (b)     
@@ -344,153 +344,148 @@ Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_4         (b)     
 (unused)              0       0     0   5     FB2_5   1     GTS/I/O 
 (unused)              0       0     0   5     FB2_6   2     GTS/I/O I
-ram/RegUrgentSync     1       0     0   4     FB2_7         (b)     (b)
-ram/RefUrgent         1       0     0   4     FB2_8   3     GTS/I/O I
-ram/RefReqSync        1       0     0   4     FB2_9   4     GTS/I/O I
-ram/RefReq            1       0     0   4     FB2_10        (b)     (b)
-ram/RefRAS            1       0     0   4     FB2_11  6     I/O     I
-ram/BACTr             1       0     0   4     FB2_12  7     I/O     I
-iobs/IOACTr           1       0     0   4     FB2_13        (b)     (b)
-iobs/ALE0             1       0     0   4     FB2_14  8     I/O     I
-fsb/ASrf              1       0     0   4     FB2_15  9     I/O     I
-iobs/PS_FSM_FFd1      2       0     0   3     FB2_16        (b)     (b)
-iobs/IOU1             2       0     0   3     FB2_17  10    I/O     I
-iobs/IOL1             2       0     0   3     FB2_18        (b)     (b)
+(unused)              0       0     0   5     FB2_7         (b)     
+(unused)              0       0     0   5     FB2_8   3     GTS/I/O I
+iobm/VPArr            1       0     0   4     FB2_9   4     GTS/I/O I
+iobm/VPArf            1       0     0   4     FB2_10        (b)     (b)
+iobm/RESrr            1       0     0   4     FB2_11  6     I/O     I
+iobm/RESrf            1       0     0   4     FB2_12  7     I/O     I
+iobm/IOREQr           1       0     0   4     FB2_13        (b)     (b)
+iobm/Er2              1       0     0   4     FB2_14  8     I/O     I
+iobm/Er               1       0     0   4     FB2_15  9     I/O     I
+iobm/DTACKrr          1       0     0   4     FB2_16        (b)     (b)
+iobm/DTACKrf          1       0     0   4     FB2_17  10    I/O     I
+cnt/Timer<0>          2       0     0   3     FB2_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: cnt/RefReq         7: iobs/PS_FSM_FFd1  12: ram/RS_FSM_FFd1 
-  2: cnt/RefUrgent      8: iobs/PS_FSM_FFd2  13: ram/RS_FSM_FFd2 
-  3: fsb/ASrf           9: nAS_FSB           14: ram/RefDone 
-  4: iobm/IOACT        10: nLDS_FSB          15: ram/RefReqSync 
-  5: iobs/IOACTr       11: nUDS_FSB          16: ram/RegUrgentSync 
-  6: iobs/Load1       
+  1: E                  4: cnt/TimerTC        7: nDTACK_IOB 
+  2: nRES.PIN           5: iobm/Er            8: nVPA_IOB 
+  3: cnt/Timer<0>       6: iobs/IOREQ       
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RegUrgentSync    .X...................................... 1
-ram/RefUrgent        .............X.X........................ 2
-ram/RefReqSync       X....................................... 1
-ram/RefReq           .............XX......................... 2
-ram/RefRAS           ...........XX........................... 2
-ram/BACTr            ..X.....X............................... 2
-iobs/IOACTr          ...X.................................... 1
-iobs/ALE0            ......XX................................ 2
-fsb/ASrf             ........X............................... 1
-iobs/PS_FSM_FFd1     ....X.XX................................ 3
-iobs/IOU1            .....X....X............................. 2
-iobs/IOL1            .....X...X.............................. 2
+iobm/VPArr           .......X................................ 1
+iobm/VPArf           .......X................................ 1
+iobm/RESrr           .X...................................... 1
+iobm/RESrf           .X...................................... 1
+iobm/IOREQr          .....X.................................. 1
+iobm/Er2             ....X................................... 1
+iobm/Er              X....................................... 1
+iobm/DTACKrr         ......X................................. 1
+iobm/DTACKrf         ......X................................. 1
+cnt/Timer<0>         X.XX.................................... 3
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               34/20
-Number of signals used by logic mapping into function block:  34
+Number of function block inputs used/remaining:               33/21
+Number of signals used by logic mapping into function block:  33
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/5   0     FB3_1         (b)     (b)
-fsb/VPA              20      15<-   0   0     FB3_2   23    GCK/I/O GCK/I
-(unused)              0       0   /\5   0     FB3_3         (b)     (b)
+fsb/VPA              18      13<-   0   0     FB3_1         (b)     (b)
+(unused)              0       0   /\5   0     FB3_2   23    GCK/I/O GCK/I
+(unused)              0       0   /\3   2     FB3_3         (b)     (b)
 (unused)              0       0     0   5     FB3_4         (b)     
-iobs/Clear1           1       0   \/1   3     FB3_5   24    I/O     I
-fsb/Ready0r           3       1<- \/3   0     FB3_6   25    I/O     I
-iobs/IOReady          4       3<- \/4   0     FB3_7         (b)     (b)
+(unused)              0       0   \/5   0     FB3_5   24    I/O     I
+(unused)              0       0   \/5   0     FB3_6   25    I/O     I
+iobs/IOREQ           13      10<- \/2   0     FB3_7         (b)     (b)
 (unused)              0       0   \/5   0     FB3_8   27    GCK/I/O GCK
-nDTACK_FSB           11       9<- \/3   0     FB3_9   28    I/O     O
-fsb/Ready1r           7       3<- \/1   0     FB3_10        (b)     (b)
+nDTACK_FSB           10       7<- \/2   0     FB3_9   28    I/O     O
+fsb/Ready1r           6       2<- \/1   0     FB3_10        (b)     (b)
 (unused)              0       0   \/5   0     FB3_11  29    I/O     I
 iobs/IORW1           16      11<-   0   0     FB3_12  30    I/O     I
 (unused)              0       0   /\5   0     FB3_13        (b)     (b)
 (unused)              0       0   \/5   0     FB3_14  32    I/O     I
-iobs/IORW0           18      13<-   0   0     FB3_15  33    I/O     I
+iobs/IORW0           17      12<-   0   0     FB3_15  33    I/O     I
 (unused)              0       0   /\5   0     FB3_16        (b)     (b)
-nROMWE                1       0   /\3   1     FB3_17  34    I/O     O
+nROMWE                1       0   /\2   2     FB3_17  34    I/O     O
 (unused)              0       0   \/5   0     FB3_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<10>         13: A_FSB<22>         24: iobs/IORW0 
-  2: A_FSB<11>         14: A_FSB<23>         25: iobs/IORW1 
-  3: A_FSB<12>         15: A_FSB<8>          26: iobs/IOReady 
-  4: A_FSB<13>         16: A_FSB<9>          27: iobs/Once 
-  5: A_FSB<14>         17: cs/nOverlay1      28: iobs/PS_FSM_FFd1 
-  6: A_FSB<15>         18: fsb/ASrf          29: iobs/PS_FSM_FFd2 
-  7: A_FSB<16>         19: fsb/Ready0r       30: nADoutLE1 
-  8: A_FSB<17>         20: fsb/Ready1r       31: nAS_FSB 
-  9: A_FSB<18>         21: fsb/VPA           32: nDTACK_FSB 
- 10: A_FSB<19>         22: iobm/IOBERR       33: nWE_FSB 
- 11: A_FSB<20>         23: iobs/IOACTr       34: ram/RAMReady 
- 12: A_FSB<21>        
+  1: A_FSB<10>         12: A_FSB<21>         23: iobs/IORW0 
+  2: A_FSB<11>         13: A_FSB<22>         24: iobs/IORW1 
+  3: A_FSB<12>         14: A_FSB<23>         25: iobs/IOReady 
+  4: A_FSB<13>         15: A_FSB<8>          26: iobs/Once 
+  5: A_FSB<14>         16: A_FSB<9>          27: iobs/PS_FSM_FFd1 
+  6: A_FSB<15>         17: cs/nOverlay1      28: iobs/PS_FSM_FFd2 
+  7: A_FSB<16>         18: fsb/ASrf          29: nADoutLE1 
+  8: A_FSB<17>         19: fsb/Ready0r       30: nAS_FSB 
+  9: A_FSB<18>         20: fsb/Ready1r       31: nDTACK_FSB 
+ 10: A_FSB<19>         21: fsb/VPA           32: nWE_FSB 
+ 11: A_FSB<20>         22: iobs/IOACTr       33: ram/RAMReady 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-fsb/VPA              XXXXXXXXXXXXXXXXXXXXX....X...XX.XX...... 26
-iobs/Clear1          ...........................XXX.......... 3
-fsb/Ready0r          ...........XXX..XXX...........X..X...... 8
-iobs/IOReady         .................X...XX..XX.XXX......... 8
-nDTACK_FSB           XXXXXXXXXXXXXXXXXXXX.....X...XXXXX...... 26
-fsb/Ready1r          ...XX.XXXXXXXX..XX.X.....X...XX.X....... 17
-iobs/IORW1           ...XX.XXXXXXXX..XX......X.XXXXX.X....... 19
-iobs/IORW0           ...XX.XXXXXXXX..XX.....XX.XXXXX.X....... 20
-nROMWE               ..............................X.X....... 2
+fsb/VPA              XXXXXXXXXXXXXXXXXXXXX...X...XX.XX....... 26
+iobs/IOREQ           ...XX.XXXXXXXX..XX...X...XXXXX.X........ 19
+nDTACK_FSB           XXXXXXXXXXXXXXXXXXXX....X...XXXXX....... 26
+fsb/Ready1r          ...XX.XXXXXXXX..XX.X....X...XX.X........ 17
+iobs/IORW1           ...XX.XXXXXXXX..XX.....X.XXXXX.X........ 19
+iobs/IORW0           ...XX.XXXXXXXX..XX....XX.XXXXX.X........ 20
+nROMWE               .............................X.X........ 2
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               24/30
-Number of signals used by logic mapping into function block:  24
+Number of function block inputs used/remaining:               34/20
+Number of signals used by logic mapping into function block:  34
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-cnt/nRESout           2       0     0   3     FB4_1         (b)     (b)
+(unused)              0       0   /\3   2     FB4_1         (b)     (b)
 nAoutOE               1       0     0   4     FB4_2   87    I/O     O
-cnt/TimerTC           2       0     0   3     FB4_3         (b)     (b)
-cnt/Timer<0>          2       0     0   3     FB4_4         (b)     (b)
+iobm/BERRrr           1       0     0   4     FB4_3         (b)     (b)
+iobm/BERRrf           1       0     0   4     FB4_4         (b)     (b)
 nDoutOE               1       0     0   4     FB4_5   89    I/O     O
-nDinOE                2       0     0   3     FB4_6   90    I/O     O
-cnt/PORS_FSM_FFd2     2       0     0   3     FB4_7         (b)     (b)
+nDinOE                3       0     0   2     FB4_6   90    I/O     O
+cnt/PORS_FSM_FFd1     1       0     0   4     FB4_7         (b)     (b)
 nRES                  1       0     0   4     FB4_8   91    I/O     I/O
-cnt/LTimer<0>         2       0     0   3     FB4_9   92    I/O     I
-cnt/Timer<3>          3       0     0   2     FB4_10        (b)     (b)
+cnt/IPL2r             1       0     0   4     FB4_9   92    I/O     I
+iobm/IOS_FSM_FFd1     2       0     0   3     FB4_10        (b)     (b)
 nVPA_FSB              1       0     0   4     FB4_11  93    I/O     O
-cnt/Timer<2>          3       0     0   2     FB4_12  94    I/O     I
-cnt/Timer<1>          3       0     0   2     FB4_13        (b)     (b)
-cnt/RefUrgent         3       0     0   2     FB4_14  95    I/O     I
-cnt/RefReq            4       0     0   1     FB4_15  96    I/O     I
-cnt/LTimer<3>         4       0     0   1     FB4_16        (b)     (b)
-cnt/LTimer<2>         4       0     0   1     FB4_17  97    I/O     I
-cnt/LTimer<1>         4       0     0   1     FB4_18        (b)     (b)
+cnt/nRESout           2       0     0   3     FB4_12  94    I/O     I
+cnt/PORS_FSM_FFd2     2       0     0   3     FB4_13        (b)     (b)
+cnt/LTimer<0>         2       0     0   3     FB4_14  95    I/O     I
+cnt/LTimer<3>         4       0     0   1     FB4_15  96    I/O     I
+cnt/LTimer<2>         4       0     0   1     FB4_16        (b)     (b)
+cnt/LTimer<1>         4       0   \/1   0     FB4_17  97    I/O     I
+iobm/IOBERR           9       4<-   0   0     FB4_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<20>          9: cnt/LTimer<2>      17: cnt/TimerTC 
-  2: A_FSB<21>         10: cnt/LTimer<3>      18: cnt/nRESout 
-  3: A_FSB<22>         11: cnt/PORS_FSM_FFd1  19: fsb/VPA 
-  4: A_FSB<23>         12: cnt/PORS_FSM_FFd2  20: iobm/DoutOE 
-  5: E                 13: cnt/Timer<0>       21: nAS_FSB 
-  6: cnt/LTimer<0>     14: cnt/Timer<1>       22: nAoutOE 
-  7: cnt/LTimer<13>    15: cnt/Timer<2>       23: nBR_IOB 
-  8: cnt/LTimer<1>     16: cnt/Timer<3>       24: nWE_FSB 
+  1: A_FSB<20>          13: cnt/PORS_FSM_FFd2  24: iobm/IOS_FSM_FFd1 
+  2: A_FSB<21>          14: cnt/TimerTC        25: iobm/IOS_FSM_FFd2 
+  3: A_FSB<22>          15: cnt/nRESout        26: iobm/IOS_FSM_FFd3 
+  4: A_FSB<23>          16: fsb/VPA            27: iobm/RESrf 
+  5: C8M                17: iobm/BERRrf        28: iobm/RESrr 
+  6: cnt/IPL2r          18: iobm/BERRrr        29: nAS_FSB 
+  7: cnt/LTimer<0>      19: iobm/DTACKrf       30: nAoutOE 
+  8: cnt/LTimer<13>     20: iobm/DTACKrr       31: nBERR_IOB 
+  9: cnt/LTimer<1>      21: iobm/DoutOE        32: nBR_IOB 
+ 10: cnt/LTimer<2>      22: iobm/ETACK         33: nIPL2 
+ 11: cnt/LTimer<3>      23: iobm/IOBERR        34: nWE_FSB 
+ 12: cnt/PORS_FSM_FFd1 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-cnt/nRESout          ......X...XX.....X...................... 4
-nAoutOE              ..........XX..........X................. 3
-cnt/TimerTC          ....X.......XXXX........................ 5
-cnt/Timer<0>         ....X.......X...X....................... 3
-nDoutOE              ...................X.X.................. 2
-nDinOE               XXXX................X..X................ 6
-cnt/PORS_FSM_FFd2    ......X...XX............................ 3
-nRES                 .................X...................... 1
-cnt/LTimer<0>        .....XX.........X....................... 3
-cnt/Timer<3>         ....X.......XXXXX....................... 6
-nVPA_FSB             ..................X.X................... 2
-cnt/Timer<2>         ....X.......XXX.X....................... 5
-cnt/Timer<1>         ....X.......XX..X....................... 4
-cnt/RefUrgent        ....X.......XXXX........................ 5
-cnt/RefReq           ....X.......XXXX........................ 5
-cnt/LTimer<3>        .....XXXXX......X....................... 6
-cnt/LTimer<2>        .....XXXX.......X....................... 5
-cnt/LTimer<1>        .....XXX........X....................... 4
+nAoutOE              ...........XX..................X........ 3
+iobm/BERRrr          ..............................X......... 1
+iobm/BERRrf          ..............................X......... 1
+nDoutOE              ....................X........X.......... 2
+nDinOE               XXXX........................X....X...... 6
+cnt/PORS_FSM_FFd1    .....X.X...XX........................... 4
+nRES                 ..............X......................... 1
+cnt/IPL2r            ................................X....... 1
+iobm/IOS_FSM_FFd1    .......................XXX.............. 3
+nVPA_FSB             ...............X............X........... 2
+cnt/nRESout          .......X...XX.X......................... 4
+cnt/PORS_FSM_FFd2    .......X...XX........................... 3
+cnt/LTimer<0>        ......XX.....X.......................... 3
+cnt/LTimer<3>        ......XXXXX..X.......................... 6
+cnt/LTimer<2>        ......XXXX...X.......................... 5
+cnt/LTimer<1>        ......XXX....X.......................... 4
+iobm/IOBERR          ....X...........XXXX.XXXXXXX..X......... 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB5  ***********************************
-Number of function block inputs used/remaining:               30/24
-Number of signals used by logic mapping into function block:  30
+Number of function block inputs used/remaining:               32/22
+Number of signals used by logic mapping into function block:  32
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 ram/RASEL            17      12<-   0   0     FB5_1         (b)     (b)
@@ -498,8 +493,8 @@ nROMCS                2       2<- /\5   0     FB5_2   35    I/O     O
 ram/RefDone           2       0   /\2   1     FB5_3         (b)     (b)
 cs/nOverlay1          2       0     0   3     FB5_4         (b)     (b)
 nCAS                  1       0     0   4     FB5_5   36    I/O     O
-nOE                   1       0   \/3   1     FB5_6   37    I/O     O
-ram/RS_FSM_FFd1       8       3<-   0   0     FB5_7         (b)     (b)
+nOE                   1       0     0   4     FB5_6   37    I/O     O
+fsb/Ready0r           3       0     0   2     FB5_7         (b)     (b)
 cs/nOverlay0          3       0   \/1   1     FB5_8   39    I/O     (b)
 RA<4>                 2       1<- \/4   0     FB5_9   40    I/O     O
 ram/RAMEN             9       4<-   0   0     FB5_10        (b)     (b)
@@ -513,95 +508,95 @@ ram/RAMReady         12       9<- \/2   0     FB5_17  49    I/O     (b)
 (unused)              0       0   \/5   0     FB5_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<12>         11: A_FSB<4>          21: ram/BACTr 
-  2: A_FSB<13>         12: A_FSB<5>          22: ram/RAMEN 
-  3: A_FSB<14>         13: A_FSB<6>          23: ram/RASEL 
-  4: A_FSB<15>         14: A_FSB<7>          24: ram/RS_FSM_FFd1 
-  5: A_FSB<16>         15: nRES.PIN          25: ram/RS_FSM_FFd2 
-  6: A_FSB<20>         16: cs/nOverlay0      26: ram/RS_FSM_FFd3 
-  7: A_FSB<21>         17: cs/nOverlay1      27: ram/RefDone 
-  8: A_FSB<22>         18: fsb/ASrf          28: ram/RefReq 
-  9: A_FSB<23>         19: nAS_FSB           29: ram/RefReqSync 
- 10: A_FSB<3>          20: nWE_FSB           30: ram/RefUrgent 
+  1: A_FSB<12>         12: A_FSB<5>          23: ram/RAMEN 
+  2: A_FSB<13>         13: A_FSB<6>          24: ram/RAMReady 
+  3: A_FSB<14>         14: A_FSB<7>          25: ram/RASEL 
+  4: A_FSB<15>         15: nRES.PIN          26: ram/RS_FSM_FFd1 
+  5: A_FSB<16>         16: cs/nOverlay0      27: ram/RS_FSM_FFd2 
+  6: A_FSB<20>         17: cs/nOverlay1      28: ram/RS_FSM_FFd3 
+  7: A_FSB<21>         18: fsb/ASrf          29: ram/RefDone 
+  8: A_FSB<22>         19: fsb/Ready0r       30: ram/RefReq 
+  9: A_FSB<23>         20: nAS_FSB           31: ram/RefReqSync 
+ 10: A_FSB<3>          21: nWE_FSB           32: ram/RefUrgent 
+ 11: A_FSB<4>          22: ram/BACTr        
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RASEL            ......XXX.......XXX.XX.XXX.X.X.......... 13
+ram/RASEL            ......XXX.......XX.X.XX..XXX.X.X........ 13
 nROMCS               .....XXXX.......X....................... 5
-ram/RefDone          .......................XX.X.X........... 4
-cs/nOverlay1         ...............X.XX..................... 3
-nCAS                 ......................X................. 1
-nOE                  ..................XX.................... 2
-ram/RS_FSM_FFd1      ......XXX.......XXX..X.XXX...X.......... 11
-cs/nOverlay0         .....XXXX.....XX.XX..................... 8
-RA<4>                ..X........X..........X................. 3
-ram/RAMEN            ......XXX.......XXX.XX.XXX.X.X.......... 13
-RA<3>                .X........X...........X................. 3
-RA<5>                ...X........X.........X................. 3
-ram/RS_FSM_FFd2      ......XXX.......XXX.X..XXX.X.X.......... 12
-RA<2>                X........X............X................. 3
-RA<6>                ....X........X........X................. 3
-ram/RAMReady         ......XXX.......XXX.XX.XXX.X.X.......... 13
+ram/RefDone          .........................XX.X.X......... 4
+cs/nOverlay1         ...............X.X.X.................... 3
+nCAS                 ........................X............... 1
+nOE                  ...................XX................... 2
+fsb/Ready0r          ......XXX.......XXXX...X................ 8
+cs/nOverlay0         .....XXXX.....XX.X.X.................... 8
+RA<4>                ..X........X............X............... 3
+ram/RAMEN            ......XXX.......XX.X.XX..XXX.X.X........ 13
+RA<3>                .X........X.............X............... 3
+RA<5>                ...X........X...........X............... 3
+ram/RS_FSM_FFd2      ......XXX.......XX.X.X...XXX.X.X........ 12
+RA<2>                X........X..............X............... 3
+RA<6>                ....X........X..........X............... 3
+ram/RAMReady         ......XXX.......XX.X.XX..XXX.X.X........ 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB6  ***********************************
-Number of function block inputs used/remaining:               34/20
-Number of signals used by logic mapping into function block:  34
+Number of function block inputs used/remaining:               32/22
+Number of signals used by logic mapping into function block:  32
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 iobm/ETACK            1       0     0   4     FB6_1         (b)     (b)
 nVMA_IOB              3       0     0   2     FB6_2   74    I/O     O
 iobm/DoutOE           2       0     0   3     FB6_3         (b)     (b)
 iobm/ALE0             2       0     0   3     FB6_4         (b)     (b)
-iobm/ES<3>            3       0     0   2     FB6_5   76    I/O     I
-iobm/ES<1>            3       0     0   2     FB6_6   77    I/O     I
-iobm/ES<0>            3       0     0   2     FB6_7         (b)     (b)
-iobm/ES<4>            4       0     0   1     FB6_8   78    I/O     I
+iobm/IOS_FSM_FFd3     3       0     0   2     FB6_5   76    I/O     I
+iobm/ES<3>            3       0     0   2     FB6_6   77    I/O     I
+iobm/ES<1>            3       0     0   2     FB6_7         (b)     (b)
+iobm/ES<0>            3       0     0   2     FB6_8   78    I/O     I
 nLDS_IOB              4       0     0   1     FB6_9   79    I/O     O
-iobm/IOS_FSM_FFd2     5       0     0   0     FB6_10        (b)     (b)
+iobm/ES<4>            4       0     0   1     FB6_10        (b)     (b)
 nUDS_IOB              4       0     0   1     FB6_11  80    I/O     O
 nAS_IOB               3       0     0   2     FB6_12  81    I/O     O
-iobm/ES<2>            5       0     0   0     FB6_13        (b)     (b)
+iobm/IOS_FSM_FFd2     5       0     0   0     FB6_13        (b)     (b)
 nADoutLE1             2       0     0   3     FB6_14  82    I/O     O
-nADoutLE0             1       0   \/1   3     FB6_15  85    I/O     O
-iobm/IOACT            6       1<-   0   0     FB6_16        (b)     (b)
-nDinLE                1       0   \/4   0     FB6_17  86    I/O     O
-iobm/IOBERR           9       4<-   0   0     FB6_18        (b)     (b)
+nADoutLE0             1       0     0   4     FB6_15  85    I/O     O
+iobm/ES<2>            5       0     0   0     FB6_16        (b)     (b)
+nDinLE                1       0   \/1   3     FB6_17  86    I/O     O
+iobm/IOACT            6       1<-   0   0     FB6_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: C8M               13: iobm/Er            24: iobm/VPArr 
-  2: iobm/ALE0         14: iobm/Er2           25: iobs/ALE0 
-  3: iobm/BERRrf       15: iobm/IOACT         26: iobs/Clear1 
-  4: iobm/BERRrr       16: iobm/IOBERR        27: iobs/IOL0 
-  5: iobm/DTACKrf      17: iobm/IOREQr        28: iobs/IORW0 
-  6: iobm/DTACKrr      18: iobm/IOS_FSM_FFd1  29: iobs/IOU0 
-  7: iobm/ES<0>        19: iobm/IOS_FSM_FFd2  30: iobs/Load1 
-  8: iobm/ES<1>        20: iobm/IOS_FSM_FFd3  31: nADoutLE1 
-  9: iobm/ES<2>        21: iobm/RESrf         32: nAoutOE 
- 10: iobm/ES<3>        22: iobm/RESrr         33: nBERR_IOB 
- 11: iobm/ES<4>        23: iobm/VPArf         34: nVMA_IOB 
- 12: iobm/ETACK       
+  1: C8M               12: iobm/ETACK         23: iobm/VPArr 
+  2: iobm/ALE0         13: iobm/Er            24: iobs/ALE0 
+  3: iobm/BERRrf       14: iobm/Er2           25: iobs/Clear1 
+  4: iobm/BERRrr       15: iobm/IOACT         26: iobs/IOL0 
+  5: iobm/DTACKrf      16: iobm/IOREQr        27: iobs/IORW0 
+  6: iobm/DTACKrr      17: iobm/IOS_FSM_FFd1  28: iobs/IOU0 
+  7: iobm/ES<0>        18: iobm/IOS_FSM_FFd2  29: iobs/Load1 
+  8: iobm/ES<1>        19: iobm/IOS_FSM_FFd3  30: nADoutLE1 
+  9: iobm/ES<2>        20: iobm/RESrf         31: nAoutOE 
+ 10: iobm/ES<3>        21: iobm/RESrr         32: nVMA_IOB 
+ 11: iobm/ES<4>        22: iobm/VPArf        
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/ETACK           ......XXXXX......................X...... 6
-nVMA_IOB             ......XXXXX...X.......XX.......X.X...... 10
-iobm/DoutOE          ..................XX.......X............ 3
-iobm/ALE0            ................XXXX.................... 4
+iobm/ETACK           ......XXXXX....................X........ 6
+nVMA_IOB             ......XXXXX...X......XX.......XX........ 10
+iobm/DoutOE          .................XX.......X............. 3
+iobm/ALE0            ...............XXXX..................... 4
+iobm/IOS_FSM_FFd3    X..............XXXX...........X......... 6
 iobm/ES<3>           ......XXXX..XX.......................... 6
 iobm/ES<1>           ......XX....XX.......................... 4
 iobm/ES<0>           ......XXXXX.XX.......................... 7
+nLDS_IOB             ................XXX......XX...X......... 6
 iobm/ES<4>           ......XXXXX.XX.......................... 7
-nLDS_IOB             .................XXX......XX...X........ 6
-iobm/IOS_FSM_FFd2    X.XXXX.....X.....XXXXX.................. 11
-nUDS_IOB             .................XXX.......XX..X........ 6
-nAS_IOB              .................XXX...........X........ 4
+nUDS_IOB             ................XXX.......XX..X......... 6
+nAS_IOB              ................XXX...........X......... 4
+iobm/IOS_FSM_FFd2    X.XXXX.....X....XXXXX................... 11
+nADoutLE1            ........................X...XX.......... 3
+nADoutLE0            .X.....................X................ 2
 iobm/ES<2>           ......XXXXX.XX.......................... 7
-nADoutLE1            .........................X...XX......... 3
-nADoutLE0            .X......................X............... 2
-iobm/IOACT           X.XXXX.....X....XXXXXX.................. 12
-nDinLE               .................XX..................... 2
-iobm/IOBERR          X.XXXX.....X...X.XXXXX..........X....... 13
+nDinLE               ................XX...................... 2
+iobm/IOACT           X.XXXX.....X...XXXXXX................... 12
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB7  ***********************************
@@ -663,57 +658,59 @@ cnt/LTimer<10>       .............XX..XXXXXXXXXXX............ 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB8  ***********************************
-Number of function block inputs used/remaining:               34/20
-Number of signals used by logic mapping into function block:  34
+Number of function block inputs used/remaining:               33/21
+Number of signals used by logic mapping into function block:  33
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-cnt/PORS_FSM_FFd1     1       0   /\2   2     FB8_1         (b)     (b)
-RA<11>                1       0   \/4   0     FB8_2   63    I/O     O
-ram/RS_FSM_FFd3       9       4<-   0   0     FB8_3         (b)     (b)
-(unused)              0       0     0   5     FB8_4         (b)     
-nRAS                  3       0   \/1   1     FB8_5   64    I/O     O
-nRAMLWE               1       1<- \/5   0     FB8_6   65    I/O     O
-iobs/PS_FSM_FFd2     14       9<-   0   0     FB8_7         (b)     (b)
-nRAMUWE               1       0   /\4   0     FB8_8   66    I/O     O
-(unused)              0       0   \/4   1     FB8_9   67    I/O     (b)
-iobs/Load1           14       9<-   0   0     FB8_10        (b)     (b)
-(unused)              0       0   /\5   0     FB8_11  68    I/O     (b)
-nBERR_FSB             4       0   \/1   0     FB8_12  70    I/O     O
+iobs/Once            15      10<-   0   0     FB8_1         (b)     (b)
+RA<11>                1       1<- /\5   0     FB8_2   63    I/O     O
+iobs/Clear1           1       0   /\1   3     FB8_3         (b)     (b)
+iobs/ALE0             1       0     0   4     FB8_4         (b)     (b)
+nRAS                  3       0     0   2     FB8_5   64    I/O     O
+nRAMLWE               1       0     0   4     FB8_6   65    I/O     O
+iobs/PS_FSM_FFd1      2       0   \/1   2     FB8_7         (b)     (b)
+nRAMUWE               1       1<- \/5   0     FB8_8   66    I/O     O
+ram/RS_FSM_FFd1       8       5<- \/2   0     FB8_9   67    I/O     (b)
+(unused)              0       0   \/5   0     FB8_10        (b)     (b)
+ram/RS_FSM_FFd3       9       7<- \/3   0     FB8_11  68    I/O     (b)
+nBERR_FSB             4       3<- \/4   0     FB8_12  70    I/O     O
 (unused)              0       0   \/5   0     FB8_13        (b)     (b)
-iobs/IOREQ           14       9<-   0   0     FB8_14  71    I/O     (b)
-nBR_IOB               2       0   /\3   0     FB8_15  72    I/O     O
-(unused)              0       0   \/5   0     FB8_16        (b)     (b)
-iobs/Once            17      12<-   0   0     FB8_17  73    I/O     I
-(unused)              0       0   /\5   0     FB8_18        (b)     (b)
+iobs/PS_FSM_FFd2     12       9<- \/2   0     FB8_14  71    I/O     (b)
+nBR_IOB               2       2<- \/5   0     FB8_15  72    I/O     O
+iobs/Load1           14       9<-   0   0     FB8_16        (b)     (b)
+ram/BACTr             1       0   /\4   0     FB8_17  73    I/O     (b)
+(unused)              0       0   \/5   0     FB8_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<13>         13: cnt/PORS_FSM_FFd1  24: nBERR_FSB 
-  2: A_FSB<14>         14: cnt/PORS_FSM_FFd2  25: nBR_IOB 
-  3: A_FSB<16>         15: cs/nOverlay1       26: nLDS_FSB 
-  4: A_FSB<17>         16: fsb/ASrf           27: nUDS_FSB 
-  5: A_FSB<18>         17: iobm/IOBERR        28: nWE_FSB 
-  6: A_FSB<19>         18: iobs/IOACTr        29: ram/RAMEN 
-  7: A_FSB<20>         19: iobs/Once          30: ram/RS_FSM_FFd1 
-  8: A_FSB<21>         20: iobs/PS_FSM_FFd1   31: ram/RS_FSM_FFd2 
-  9: A_FSB<22>         21: iobs/PS_FSM_FFd2   32: ram/RS_FSM_FFd3 
- 10: A_FSB<23>         22: nADoutLE1          33: ram/RefRAS 
- 11: cnt/IPL2r         23: nAS_FSB            34: ram/RefUrgent 
- 12: cnt/LTimer<13>   
+  1: A_FSB<13>         12: cnt/PORS_FSM_FFd1  23: nBERR_FSB 
+  2: A_FSB<14>         13: cnt/PORS_FSM_FFd2  24: nBR_IOB 
+  3: A_FSB<16>         14: cs/nOverlay1       25: nLDS_FSB 
+  4: A_FSB<17>         15: fsb/ASrf           26: nUDS_FSB 
+  5: A_FSB<18>         16: iobm/IOBERR        27: nWE_FSB 
+  6: A_FSB<19>         17: iobs/IOACTr        28: ram/RAMEN 
+  7: A_FSB<20>         18: iobs/Once          29: ram/RS_FSM_FFd1 
+  8: A_FSB<21>         19: iobs/PS_FSM_FFd1   30: ram/RS_FSM_FFd2 
+  9: A_FSB<22>         20: iobs/PS_FSM_FFd2   31: ram/RS_FSM_FFd3 
+ 10: A_FSB<23>         21: nADoutLE1          32: ram/RefRAS 
+ 11: cnt/IPL2r         22: nAS_FSB            33: ram/RefUrgent 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-cnt/PORS_FSM_FFd1    ..........XXXX.......................... 4
+iobs/Once            XXXXXXXXXX...XX..XXXXX....X............. 18
 RA<11>               .....X.................................. 1
-ram/RS_FSM_FFd3      .......XXX....XX......X.....XXXX.X...... 11
-nRAS                 .......XXX....X.......X.....X...X....... 7
-nRAMLWE              ......................X..X.XX........... 4
-iobs/PS_FSM_FFd2     XXXXXXXXXX....XX.XXXXXX....X............ 19
-nRAMUWE              ......................X...XXX........... 4
-iobs/Load1           XXXXXXXXXX....XX..XXXXX....X............ 18
-nBERR_FSB            ...............XXXX.XXXX................ 8
-iobs/IOREQ           XXXXXXXXXX....XX.XXXXXX....X............ 19
-nBR_IOB              ..........X.XX..........X............... 4
-iobs/Once            XXXXXXXXXX....XX..XXXXX....X............ 18
+iobs/Clear1          ..................XXX................... 3
+iobs/ALE0            ..................XX.................... 2
+nRAS                 .......XXX...X.......X.....X...X........ 7
+nRAMLWE              .....................X..X.XX............ 4
+iobs/PS_FSM_FFd1     ................X.XX.................... 3
+nRAMUWE              .....................X...XXX............ 4
+ram/RS_FSM_FFd1      .......XXX...XX......X.....XXXX.X....... 11
+ram/RS_FSM_FFd3      .......XXX...XX......X.....XXXX.X....... 11
+nBERR_FSB            ..............XXXX.XXXX................. 8
+iobs/PS_FSM_FFd2     XXXXXXXXXX...XX.XXXXXX....X............. 19
+nBR_IOB              ..........XXX..........X................ 4
+iobs/Load1           XXXXXXXXXX...XX..XXXXX....X............. 18
+ram/BACTr            ..............X......X.................. 2
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *******************************  Equations  ********************************
@@ -754,6 +751,8 @@ assign C25MEN = 1'b1;
 
 
 
+
+
 
 
 
@@ -981,65 +980,57 @@ assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf)
 	!cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady));
 
 FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,FCLK,1'b0,1'b0);
-assign fsb/Ready1r_D = ((A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
+assign fsb/Ready1r_D = ((A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
 	|| (nAS_FSB && !fsb/ASrf)
 	|| (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && 
 	!iobs/IOReady)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady));
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && 
+	!iobs/IOReady));
 
 FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,FCLK,1'b0,1'b0);
-assign fsb/VPA_D = ((EXP21_.EXP)
+assign fsb/VPA_D = ((EXP15_.EXP)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1)
+	|| (A_FSB[9] && A_FSB[8] && A_FSB[15] && A_FSB[14] && 
+	A_FSB[13] && A_FSB[12] && A_FSB[11] && A_FSB[10] && A_FSB[23] && 
+	A_FSB[22] && A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && 
+	A_FSB[17] && A_FSB[16] && iobs/IOReady && !nAS_FSB)
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+	!fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
 	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 	!fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 	!cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 	!cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && 
-	!nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && 
-	!nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && 
-	!nADoutLE1)
 	|| (A_FSB[23] && !fsb/Ready1r && fsb/VPA && 
 	!iobs/IOReady && !nAS_FSB)
 	|| (A_FSB[23] && !fsb/Ready1r && fsb/VPA && 
 	!iobs/IOReady && fsb/ASrf)
-	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
-	!fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-	fsb/VPA && !iobs/IOReady && !nAS_FSB)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-	fsb/VPA && !iobs/IOReady && fsb/ASrf));
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && !nAS_FSB)
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && 
+	!iobs/IOReady && !nAS_FSB));
 
 FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,C16M,1'b0,1'b0);
 assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)
@@ -1050,8 +1041,6 @@ FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!C16M,1'b0,1'b0);
 
 FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,C16M,1'b0,1'b0);
 
-FDCPE FDCPE_iobm/BG (iobm/BG,!nBG_IOB,C16M,1'b0,1'b0,iobm/nASr);
-
 FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!C16M,1'b0,1'b0);
 
 FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,C16M,1'b0,1'b0);
@@ -1115,10 +1104,7 @@ assign iobm/IOACT_D = ((C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 &&
 	iobm/DTACKrf && iobm/DTACKrr));
 
 FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,C16M,1'b0,1'b0);
-assign iobm/IOBERR_T = ((C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
-	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && 
-	iobm/RESrr)
-	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+assign iobm/IOBERR_T = ((C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
 	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && 
 	iobm/BERRrr)
 	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
@@ -1127,6 +1113,9 @@ assign iobm/IOBERR_T = ((C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 &&
 	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
 	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && 
 	iobm/RESrr)
+	|| (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && 
+	iobm/RESrr)
 	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
 	!iobm/IOS_FSM_FFd2 && iobm/IOBERR)
 	|| (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
@@ -1162,8 +1151,8 @@ FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,1'b0,1
 assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2)
 	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
 	!iobm/IOS_FSM_FFd2)
-	|| (!C8M && iobm/BG && !iobm/IOS_FSM_FFd1 && 
-	!iobm/IOS_FSM_FFd2 && iobm/IOREQr));
+	|| (!C8M && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && 
+	iobm/IOREQr && !nAoutOE));
 
 FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES.PIN,!C16M,1'b0,1'b0);
 
@@ -1173,9 +1162,6 @@ FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!C16M,1'b0,1'b0);
 
 FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,C16M,1'b0,1'b0);
 
-FDCPE FDCPE_iobm/nASr (iobm/nASr,iobm/nASr_D,C16M,1'b0,1'b0);
-assign iobm/nASr_D = (!nAS_IOB && nAoutOE);
-
 FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,FCLK,1'b0,1'b0);
 assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
 
@@ -1192,105 +1178,79 @@ assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
 FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,FCLK,1'b0,1'b0,iobs/Load1);
 
 FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,FCLK,1'b0,1'b0);
-assign iobs/IOREQ_D = ((iobs/nBERR_FSB.EXP)
-	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
-	!iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1)
-	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr)
-	|| (iobs/Once && !iobs/PS_FSM_FFd2 && nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
-	nADoutLE1)
-	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !fsb/ASrf && 
-	nADoutLE1));
+assign iobs/IOREQ_D = ((EXP16_.EXP)
+	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd1)
+	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd1 && 
+	fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd1)
+	|| (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (iobs/PS_FSM_FFd2 && !iobs/IOACTr)
+	|| (!iobs/PS_FSM_FFd1 && !nADoutLE1));
 
-FTCPE FTCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_T,FCLK,1'b0,1'b0);
-assign iobs/IORW0_T = ((A_FSB[23] && nWE_FSB && !iobs/Once && !iobs/IORW0 && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-	!iobs/Once && !iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-	!iobs/Once && !iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !nWE_FSB && 
-	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !nWE_FSB && 
-	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (nROMWE_OBUF.EXP)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	fsb/ASrf && nADoutLE1)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !iobs/Once && iobs/IORW0 && !nAS_FSB && 
+FDCPE FDCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_D,FCLK,1'b0,1'b0);
+assign iobs/IORW0_D = ((!iobs/IORW1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	!nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && !iobs/IORW0 && 
+	nADoutLE1)
+	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && !nAS_FSB && 
 	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (iobs/IORW0 && !iobs/IORW1 && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && !nADoutLE1)
-	|| (!iobs/IORW0 && iobs/IORW1 && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && !nADoutLE1)
-	|| (A_FSB[23] && nWE_FSB && !iobs/Once && !iobs/IORW0 && 
+	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && 
 	!nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && iobs/IORW0 && 
+	|| (nROMWE_OBUF.EXP)
+	|| (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && 
 	!nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && iobs/IORW0 && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1));
+	|| (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+	nADoutLE1)
+	|| (!iobs/IORW0 && iobs/PS_FSM_FFd2)
+	|| (!iobs/IORW0 && iobs/PS_FSM_FFd1)
+	|| (iobs/Once && !iobs/IORW0 && nADoutLE1)
+	|| (!A_FSB[23] && !A_FSB[22] && !iobs/IORW0 && nADoutLE1)
+	|| (!iobs/IORW0 && nAS_FSB && !fsb/ASrf && nADoutLE1));
 
 FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,FCLK,1'b0,1'b0);
 assign iobs/IORW1_T = ((iobs/Once)
 	|| (!nADoutLE1)
 	|| (fsb/Ready1r.EXP)
-	|| (!nWE_FSB && !iobs/IORW1)
 	|| (nAS_FSB && !fsb/ASrf)
-	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
 	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[19])
+	|| (!A_FSB[23] && !A_FSB[22] && nWE_FSB)
 	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1)
-	|| (!A_FSB[23] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[18])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[17])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[16])
+	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20])
 	|| (nWE_FSB && iobs/IORW1)
-	|| (!A_FSB[23] && A_FSB[21] && !iobs/IORW1));
+	|| (!nWE_FSB && !iobs/IORW1)
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 
 FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,FCLK,1'b0,1'b0);
-assign iobs/IOReady_T = ((iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && 
+assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf)
+	|| (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && 
 	!iobs/IOACTr && iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && !iobs/IOReady && !nAS_FSB && 
 	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && 
-	!iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)
-	|| (iobs/IOReady && nAS_FSB && !fsb/ASrf));
+	!iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1));
 
 FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,FCLK,1'b0,1'b0,iobs/IOU0_CE);
 assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1)
@@ -1303,71 +1263,77 @@ FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,FCLK,1'b0,1'b0);
 assign iobs/Load1_D = ((iobs/Once)
 	|| (!nADoutLE1)
 	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[19])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[17])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[16])
 	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
-	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21])
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1)
-	|| (!A_FSB[23] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[20])
+	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[18])
+	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20])
+	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && !A_FSB[22])
 	|| (nAS_FSB && !fsb/ASrf)
-	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (!A_FSB[23] && !A_FSB[22] && nWE_FSB));
 
-FDCPE FDCPE_iobs/Once (iobs/Once,iobs/Once_D,FCLK,1'b0,1'b0);
-assign iobs/Once_D = ((A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd1)
-	|| (!iobs/Once && iobs/PS_FSM_FFd2 && !nADoutLE1)
-	|| (!iobs/Once && iobs/PS_FSM_FFd1 && !nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !iobs/Once)
-	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-	!iobs/Once)
-	|| (cnt/PORS_FSM_FFd1.EXP)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && !iobs/Once)
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && !iobs/Once)
-	|| (nAS_FSB && !fsb/ASrf)
-	|| (A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd2)
-	|| (!A_FSB[23] && !A_FSB[20] && !iobs/Once)
-	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd2)
-	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd1));
+FTCPE FTCPE_iobs/Once (iobs/Once,iobs/Once_T,FCLK,1'b0,1'b0);
+assign iobs/Once_T = ((A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1)
+	|| (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1)
+	|| (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+	!nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (iobs/Once && nAS_FSB && !fsb/ASrf)
+	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && 
+	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 
 FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,1'b0,1'b0);
 assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2)
 	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr));
 
-FDCPE FDCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,FCLK,1'b0,1'b0);
-assign iobs/PS_FSM_FFd2_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && 
-	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
-	iobs/IOACTr)
-	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
-	!iobs/IOACTr)
-	|| (iobs/Once && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	nADoutLE1)
-	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
-	!iobs/PS_FSM_FFd1 && nADoutLE1)
-	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-	!fsb/ASrf && nADoutLE1));
+FTCPE FTCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,1'b0,1'b0);
+assign iobs/PS_FSM_FFd2_T = ((iobs/nBERR_FSB.EXP)
+	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && 
+	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr)
+	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1)
+	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 
 
 assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0);
@@ -1380,19 +1346,19 @@ FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!C16M,1'b0,1'b0);
 assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2)
 	|| (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2));
 assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ;
-assign nAS_IOB_OE = nAoutOE;
+assign nAS_IOB_OE = !nAoutOE;
 
 FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,!C8M,1'b0,1'b0);
 assign nAoutOE_D = (!nBR_IOB && cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2);
 
 FTCPE FTCPE_nBERR_FSB (nBERR_FSB,nBERR_FSB_T,FCLK,1'b0,1'b0);
-assign nBERR_FSB_T = ((nAS_FSB && !nBERR_FSB && !fsb/ASrf)
-	|| (iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && 
+assign nBERR_FSB_T = ((iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && 
 	!iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && !nAS_FSB && nBERR_FSB && 
 	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1)
 	|| (iobs/Once && nBERR_FSB && !iobs/PS_FSM_FFd2 && 
-	!iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1));
+	!iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1)
+	|| (nAS_FSB && !nBERR_FSB && !fsb/ASrf));
 
 FTCPE FTCPE_nBR_IOB (nBR_IOB,nBR_IOB_T,!C8M,1'b0,1'b0);
 assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2)
@@ -1402,38 +1368,35 @@ assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2)
 FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!FCLK,1'b0,1'b0);
 
 FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,FCLK,1'b0,1'b0);
-assign nDTACK_FSB_D = ((iobs/IOReady.EXP)
+assign nDTACK_FSB_D = ((iobs/IOREQ.EXP)
+	|| (nAS_FSB && !fsb/ASrf)
+	|| (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady && 
+	nDTACK_FSB)
+	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && 
+	!iobs/IOReady && nDTACK_FSB)
+	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && 
+	!iobs/IOReady && nDTACK_FSB)
 	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 	!fsb/Ready0r && nDTACK_FSB && !ram/RAMReady)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-	!iobs/IOReady && nDTACK_FSB)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 	!cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady)
-	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
-	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
-	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
-	!nADoutLE1)
-	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
-	!nADoutLE1));
+	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1)
+	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1));
 
 FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!C16M,1'b0,1'b0);
 assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2);
 
 
 assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB)
-	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-	!nAS_FSB));
+	|| (A_FSB[22] && A_FSB[21] && nWE_FSB && !nAS_FSB)
+	|| (A_FSB[22] && A_FSB[20] && nWE_FSB && !nAS_FSB));
 
 
-assign nDoutOE = !((!nAoutOE && iobm/DoutOE));
+assign nDoutOE = !((iobm/DoutOE && !nAoutOE));
 
 FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!C16M,1'b0,1'b0);
 assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && 
@@ -1443,7 +1406,7 @@ assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 &&
 	|| (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && 
 	!iobm/IOS_FSM_FFd1));
 assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ;
-assign nLDS_IOB_OE = nAoutOE;
+assign nLDS_IOB_OE = !nAoutOE;
 
 
 assign nOE = !((nWE_FSB && !nAS_FSB));
@@ -1482,7 +1445,7 @@ assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 &&
 	|| (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && 
 	!iobm/IOS_FSM_FFd1));
 assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ;
-assign nUDS_IOB_OE = nAoutOE;
+assign nUDS_IOB_OE = !nAoutOE;
 
 FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,C16M,1'b0,1'b0);
 assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && 
@@ -1491,7 +1454,7 @@ assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] &&
 	!iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && 
 	iobm/VPArr));
 assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ;
-assign nVMA_IOB_OE = nAoutOE;
+assign nVMA_IOB_OE = !nAoutOE;
 
 
 assign nVPA_FSB = !((fsb/VPA && !nAS_FSB));
@@ -1566,7 +1529,11 @@ assign ram/RASEL_D = ((A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 &&
 	!ram/RS_FSM_FFd3 && !fsb/ASrf));
 
 FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,1'b0,1'b0);
-assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+assign ram/RS_FSM_FFd1_D = ((ram/RS_FSM_FFd1 && ram/RefUrgent && 
+	!ram/RS_FSM_FFd3 && fsb/ASrf)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && 
+	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN)
+	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN && 
 	fsb/ASrf)
 	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
@@ -1578,11 +1545,7 @@ assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 &&
 	|| (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2)
 	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3)
 	|| (!nAS_FSB && ram/RS_FSM_FFd1 && ram/RefUrgent && 
-	!ram/RS_FSM_FFd3)
-	|| (ram/RS_FSM_FFd1 && ram/RefUrgent && 
-	!ram/RS_FSM_FFd3 && fsb/ASrf)
-	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && 
-	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN));
+	!ram/RS_FSM_FFd3));
 
 FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,1'b0,1'b0);
 assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && 
@@ -1604,16 +1567,13 @@ assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent &&
 	!ram/RS_FSM_FFd3 && !ram/RefReq));
 
 FTCPE FTCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,1'b0,1'b0);
-assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
-	!ram/RS_FSM_FFd3)
-	|| (ram/RS_FSM_FFd1 && !ram/RefUrgent && 
-	!ram/RS_FSM_FFd3)
+assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1.EXP)
+	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
+	ram/RS_FSM_FFd3)
 	|| (A_FSB[23] && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
 	!ram/RS_FSM_FFd3)
 	|| (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
 	!fsb/ASrf)
-	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
-	ram/RS_FSM_FFd3)
 	|| (!ram/RS_FSM_FFd2 && !ram/RefUrgent && 
 	!ram/RS_FSM_FFd3 && !ram/RAMEN)
 	|| (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd1 && 
@@ -1708,7 +1668,7 @@ No. Name                           No. Name
  20 A_FSB<22>                        70 nBERR_FSB                     
  21 GND                              71 KPR                           
  22 C16M                             72 nBR_IOB                       
- 23 C8M                              73 nBG_IOB                       
+ 23 C8M                              73 KPR                           
  24 A_FSB<23>                        74 nVMA_IOB                      
  25 E                                75 GND                           
  26 VCC                              76 nBERR_IOB                     
diff --git a/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm b/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm
index e47c983..9136855 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm
@@ -42,6 +42,8 @@ assign C25MEN = 1'b1;
 </td></tr><tr><td>
 </td></tr><tr><td>
 </td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
 assign RA[0] = ((A_FSB[10] && !ram/RASEL)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (ram/RASEL && A_FSB[1]));
 </td></tr><tr><td>
@@ -266,65 +268,57 @@ FDCPE FDCPE_fsb/Ready0r (fsb/Ready0r,fsb/Ready0r_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady));
 </td></tr><tr><td>
 FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign fsb/Ready1r_D = ((A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign fsb/Ready1r_D = ((A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady && !nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady));
 </td></tr><tr><td>
 FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign fsb/VPA_D = ((EXP21_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign fsb/VPA_D = ((EXP15_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[9] && A_FSB[8] && A_FSB[15] && A_FSB[14] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[13] && A_FSB[12] && A_FSB[11] && A_FSB[10] && A_FSB[23] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[22] && A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[17] && A_FSB[16] && iobs/IOReady && !nAS_FSB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !fsb/Ready1r && fsb/VPA && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && !nAS_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !fsb/Ready1r && fsb/VPA && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA && !iobs/IOReady && !nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA && !iobs/IOReady && fsb/ASrf));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && !nAS_FSB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && !nAS_FSB));
 </td></tr><tr><td>
 FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)
@@ -335,8 +329,6 @@ FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!C16M,1'b0,1'b0);
 </td></tr><tr><td>
 FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,C16M,1'b0,1'b0);
 </td></tr><tr><td>
-FDCPE FDCPE_iobm/BG (iobm/BG,!nBG_IOB,C16M,1'b0,1'b0,iobm/nASr);
-</td></tr><tr><td>
 FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!C16M,1'b0,1'b0);
 </td></tr><tr><td>
 FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,C16M,1'b0,1'b0);
@@ -400,10 +392,7 @@ FDCPE FDCPE_iobm/IOACT (iobm/IOACT,iobm/IOACT_D,C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrf && iobm/DTACKrr));
 </td></tr><tr><td>
 FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,C16M,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobm/IOBERR_T = ((C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobm/IOBERR_T = ((C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
@@ -412,6 +401,9 @@ FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobm/IOS_FSM_FFd2 && iobm/IOBERR)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && 
@@ -447,8 +439,8 @@ FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,1'b0,1
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobm/IOS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!C8M && iobm/BG && !iobm/IOS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobm/IOS_FSM_FFd2 && iobm/IOREQr));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!C8M && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOREQr && !nAoutOE));
 </td></tr><tr><td>
 FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES.PIN,!C16M,1'b0,1'b0);
 </td></tr><tr><td>
@@ -458,9 +450,6 @@ FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!C16M,1'b0,1'b0);
 </td></tr><tr><td>
 FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,C16M,1'b0,1'b0);
 </td></tr><tr><td>
-FDCPE FDCPE_iobm/nASr (iobm/nASr,iobm/nASr_D,C16M,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobm/nASr_D = (!nAS_IOB && nAoutOE);
-</td></tr><tr><td>
 FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1);
 </td></tr><tr><td>
@@ -477,105 +466,79 @@ FDCPE FDCPE_iobs/IOL0 (iobs/IOL0,iobs/IOL0_D,FCLK,1'b0,1'b0,iobs/IOL0_CE);
 FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,FCLK,1'b0,1'b0,iobs/Load1);
 </td></tr><tr><td>
 FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IOREQ_D = ((iobs/nBERR_FSB.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && !iobs/PS_FSM_FFd2 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !fsb/ASrf && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IOREQ_D = ((EXP16_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/PS_FSM_FFd2 && !iobs/IOACTr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd1 && !nADoutLE1));
 </td></tr><tr><td>
-FTCPE FTCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_T,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IORW0_T = ((A_FSB[23] && nWE_FSB && !iobs/Once && !iobs/IORW0 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && !iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && !iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nROMWE_OBUF.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && iobs/IORW0 && !nAS_FSB && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once && iobs/IORW0 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !iobs/Once && iobs/IORW0 && !nAS_FSB && 
+FDCPE FDCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_D,FCLK,1'b0,1'b0);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IORW0_D = ((!iobs/IORW1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && !iobs/IORW0 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && !nAS_FSB && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/IORW0 && !iobs/IORW1 && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && !nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/IORW0 && iobs/IORW1 && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && !nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && nWE_FSB && !iobs/Once && !iobs/IORW0 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && iobs/IORW0 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nROMWE_OBUF.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !nWE_FSB && !iobs/Once && iobs/IORW0 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/IORW0 && iobs/PS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/IORW0 && iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && !iobs/IORW0 && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !iobs/IORW0 && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/IORW0 && nAS_FSB && !fsb/ASrf && nADoutLE1));
 </td></tr><tr><td>
 FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IORW1_T = ((iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (fsb/Ready1r.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!nWE_FSB && !iobs/IORW1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[19])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && nWE_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[20])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[20])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[18])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[17])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[16])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20])
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nWE_FSB && iobs/IORW1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !iobs/IORW1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!nWE_FSB && !iobs/IORW1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 </td></tr><tr><td>
 FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IOReady_T = ((iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOACTr && iobm/IOBERR && nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && !iobs/IOReady && !nAS_FSB && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/IOReady && nAS_FSB && !fsb/ASrf));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1));
 </td></tr><tr><td>
 FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,FCLK,1'b0,1'b0,iobs/IOU0_CE);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1)
@@ -588,71 +551,77 @@ FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/Load1_D = ((iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[19])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[17])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[16])
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21])
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[20])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[20])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[18])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[21] && !A_FSB[20])
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && !A_FSB[22])
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && nWE_FSB));
 </td></tr><tr><td>
-FDCPE FDCPE_iobs/Once (iobs/Once,iobs/Once_D,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/Once_D = ((A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/Once && iobs/PS_FSM_FFd2 && !nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/Once && iobs/PS_FSM_FFd1 && !nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && !iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (cnt/PORS_FSM_FFd1.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && !iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && !iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && !iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && !iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && !iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !iobs/Once && iobs/PS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[20] && !iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !iobs/Once && iobs/PS_FSM_FFd1));
+FTCPE FTCPE_iobs/Once (iobs/Once,iobs/Once_T,FCLK,1'b0,1'b0);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/Once_T = ((A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && nAS_FSB && !fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 </td></tr><tr><td>
 FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr));
 </td></tr><tr><td>
-FDCPE FDCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/PS_FSM_FFd2_D = ((!A_FSB[23] && !A_FSB[22] && !A_FSB[21] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[16] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[18] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[21] && !A_FSB[17] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && A_FSB[21] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobs/IOACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd2 && iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[20] && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/ASrf && nADoutLE1));
+FTCPE FTCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,1'b0,1'b0);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign iobs/PS_FSM_FFd2_T = ((iobs/nBERR_FSB.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !iobs/Once && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/PS_FSM_FFd1 && iobs/IOACTr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !iobs/Once && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1));
 </td></tr><tr><td>
 </td></tr><tr><td>
 assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0);
@@ -665,19 +634,19 @@ FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2));
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ;
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nAS_IOB_OE = nAoutOE;
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nAS_IOB_OE = !nAoutOE;
 </td></tr><tr><td>
 FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,!C8M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nAoutOE_D = (!nBR_IOB && cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2);
 </td></tr><tr><td>
 FTCPE FTCPE_nBERR_FSB (nBERR_FSB,nBERR_FSB_T,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nBERR_FSB_T = ((nAS_FSB && !nBERR_FSB && !fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nBERR_FSB_T = ((iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOACTr && !iobm/IOBERR && nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && !nAS_FSB && nBERR_FSB && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (iobs/Once && nBERR_FSB && !iobs/PS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !nBERR_FSB && !fsb/ASrf));
 </td></tr><tr><td>
 FTCPE FTCPE_nBR_IOB (nBR_IOB,nBR_IOB_T,!C8M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2)
@@ -687,38 +656,35 @@ FTCPE FTCPE_nBR_IOB (nBR_IOB,nBR_IOB_T,!C8M,1'b0,1'b0);
 FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!FCLK,1'b0,1'b0);
 </td></tr><tr><td>
 FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nDTACK_FSB_D = ((iobs/IOReady.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nDTACK_FSB_D = ((iobs/IOREQ.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nDTACK_FSB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && nDTACK_FSB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && nDTACK_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready0r && nDTACK_FSB && !ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && !fsb/Ready1r && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobs/IOReady && nDTACK_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[22] && A_FSB[20] && A_FSB[19] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !cs/nOverlay1 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && !A_FSB[22] && A_FSB[21] && A_FSB[20] && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 && !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nADoutLE1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1));
 </td></tr><tr><td>
 FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2);
 </td></tr><tr><td>
 </td></tr><tr><td>
 assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && A_FSB[20] && nWE_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!nAS_FSB));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[21] && nWE_FSB && !nAS_FSB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && A_FSB[20] && nWE_FSB && !nAS_FSB));
 </td></tr><tr><td>
 </td></tr><tr><td>
-assign nDoutOE = !((!nAoutOE && iobm/DoutOE));
+assign nDoutOE = !((iobm/DoutOE && !nAoutOE));
 </td></tr><tr><td>
 FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && 
@@ -728,7 +694,7 @@ FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobm/IOS_FSM_FFd1));
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ;
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nLDS_IOB_OE = nAoutOE;
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nLDS_IOB_OE = !nAoutOE;
 </td></tr><tr><td>
 </td></tr><tr><td>
 assign nOE = !((nWE_FSB && !nAS_FSB));
@@ -767,7 +733,7 @@ FDCPE FDCPE_nUDS_IOB (nUDS_IOB_I,nUDS_IOB,!C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobm/IOS_FSM_FFd1));
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ;
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nUDS_IOB_OE = nAoutOE;
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nUDS_IOB_OE = !nAoutOE;
 </td></tr><tr><td>
 FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && 
@@ -776,7 +742,7 @@ FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,C16M,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/VPArr));
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ;
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nVMA_IOB_OE = nAoutOE;
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign nVMA_IOB_OE = !nAoutOE;
 </td></tr><tr><td>
 </td></tr><tr><td>
 assign nVPA_FSB = !((fsb/VPA && !nAS_FSB));
@@ -851,7 +817,11 @@ FDCPE FDCPE_ram/RASEL (ram/RASEL,ram/RASEL_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3 && !fsb/ASrf));
 </td></tr><tr><td>
 FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign ram/RS_FSM_FFd1_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign ram/RS_FSM_FFd1_D = ((ram/RS_FSM_FFd1 && ram/RefUrgent && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3 && fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && A_FSB[22] && A_FSB[21] && 
@@ -863,11 +833,7 @@ FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!nAS_FSB && ram/RS_FSM_FFd1 && ram/RefUrgent && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (ram/RS_FSM_FFd1 && ram/RefUrgent && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3 && fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3));
 </td></tr><tr><td>
 FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && 
@@ -889,16 +855,13 @@ FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,1'b0,1'b0);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3 && !ram/RefReq));
 </td></tr><tr><td>
 FTCPE FTCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,1'b0,1'b0);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (ram/RS_FSM_FFd1 && !ram/RefUrgent && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd3)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[23] && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd3)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (!ram/RS_FSM_FFd2 && !ram/RefUrgent && 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	!ram/RS_FSM_FFd3 && !ram/RAMEN)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	|| (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd1 && 
diff --git a/cpld/XC95144XL/WarpSE_html/fit/eqns.htm b/cpld/XC95144XL/WarpSE_html/fit/eqns.htm
index 38a24fb..85f944b 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/eqns.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/eqns.htm
@@ -3,9 +3,9 @@
 <script src="paths.js"></script><script src="eqns.js"></script><script>
       var design = "WarpSE";
       var device = "XC95144XL";
-      signals = new Array("C20MEN","C25MEN","RA0_SPECSIG","RA10_SPECSIG","RA11_SPECSIG","RA1_SPECSIG","RA2_SPECSIG","RA3_SPECSIG","RA4_SPECSIG","RA5_SPECSIG","RA6_SPECSIG","RA7_SPECSIG","RA8_SPECSIG","RA9_SPECSIG","cntIPL2r_SPECSIG","cntLTimer0_SPECSIG","cntLTimer10_SPECSIG","cntLTimer11_SPECSIG","cntLTimer12_SPECSIG","cntLTimer13_SPECSIG","cntLTimer1_SPECSIG","cntLTimer2_SPECSIG","cntLTimer3_SPECSIG","cntLTimer4_SPECSIG","cntLTimer5_SPECSIG","cntLTimer6_SPECSIG","cntLTimer7_SPECSIG","cntLTimer8_SPECSIG","cntLTimer9_SPECSIG","cntPORS_FSM_FFd1_SPECSIG","cntPORS_FSM_FFd2_SPECSIG","cntRefReq_SPECSIG","cntRefUrgent_SPECSIG","cntTimer0_SPECSIG","cntTimer1_SPECSIG","cntTimer2_SPECSIG","cntTimer3_SPECSIG","cntTimerTC_SPECSIG","cntnRESout_SPECSIG","csnOverlay0_SPECSIG","csnOverlay1_SPECSIG","fsbASrf_SPECSIG","fsbReady0r_SPECSIG","fsbReady1r_SPECSIG","fsbVPA_SPECSIG","iobmALE0_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG","iobmBG_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG","iobmDoutOE_SPECSIG","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmES4_SPECSIG","iobmETACK_SPECSIG","iobmEr2_SPECSIG","iobmEr_SPECSIG","iobmIOACT_SPECSIG","iobmIOBERR_SPECSIG","iobmIOREQr_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG","iobmnASr_SPECSIG","iobsALE0_SPECSIG","iobsClear1_SPECSIG","iobsIOACTr_SPECSIG","iobsIOL0_SPECSIG","iobsIOL1_SPECSIG","iobsIOREQ_SPECSIG","iobsIORW0_SPECSIG","iobsIORW1_SPECSIG","iobsIOReady_SPECSIG","iobsIOU0_SPECSIG","iobsIOU1_SPECSIG","iobsLoad1_SPECSIG","iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","nADoutLE0","nADoutLE1","nAS_IOB","nAoutOE","nBERR_FSB","nBR_IOB","nCAS","nDTACK_FSB","nDinLE","nDinOE","nDoutOE","nLDS_IOB","nOE","nRAMLWE","nRAMUWE","nRAS","nRES","nROMCS","nROMWE","nUDS_IOB","nVMA_IOB","nVPA_FSB","ramBACTr_SPECSIG","ramRAMEN_SPECSIG","ramRAMReady_SPECSIG","ramRASEL_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG","ramRefDone_SPECSIG","ramRefRAS_SPECSIG","ramRefReqSync_SPECSIG","ramRefReq_SPECSIG","ramRefUrgent_SPECSIG","ramRegUrgentSync_SPECSIG");
-      sigNegs = new Array("OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","ON","OFF","ON","OFF","OFF","OFF","ON","ON","OFF","ON","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","ON","ON","ON","OFF","ON","ON","ON","OFF","ON","ON","OFF","OFF","ON","OFF","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF");
-      sigTypes = new Array("","","","","","","","","","","","","","","D","T","T","T","T","T","D","T","T","T","T","T","T","T","T","T","D","D","D","D","D","T","T","D","D","T","D","D","D","D","D","D","D","D","D","D","D","D","T","D","D","T","T","D","D","D","D","T","D","D","T","D","D","D","D","D","D","D","D","D","D","D","D","T","T","T","D","D","D","D","D","D","","D","D","D","T","T","D","D","D","","","D","","","","","","","","D","T","","D","D","D","D","D","D","T","D","D","D","D","D","D");
+      signals = new Array("C20MEN","C25MEN","RA0_SPECSIG","RA10_SPECSIG","RA11_SPECSIG","RA1_SPECSIG","RA2_SPECSIG","RA3_SPECSIG","RA4_SPECSIG","RA5_SPECSIG","RA6_SPECSIG","RA7_SPECSIG","RA8_SPECSIG","RA9_SPECSIG","cntIPL2r_SPECSIG","cntLTimer0_SPECSIG","cntLTimer10_SPECSIG","cntLTimer11_SPECSIG","cntLTimer12_SPECSIG","cntLTimer13_SPECSIG","cntLTimer1_SPECSIG","cntLTimer2_SPECSIG","cntLTimer3_SPECSIG","cntLTimer4_SPECSIG","cntLTimer5_SPECSIG","cntLTimer6_SPECSIG","cntLTimer7_SPECSIG","cntLTimer8_SPECSIG","cntLTimer9_SPECSIG","cntPORS_FSM_FFd1_SPECSIG","cntPORS_FSM_FFd2_SPECSIG","cntRefReq_SPECSIG","cntRefUrgent_SPECSIG","cntTimer0_SPECSIG","cntTimer1_SPECSIG","cntTimer2_SPECSIG","cntTimer3_SPECSIG","cntTimerTC_SPECSIG","cntnRESout_SPECSIG","csnOverlay0_SPECSIG","csnOverlay1_SPECSIG","fsbASrf_SPECSIG","fsbReady0r_SPECSIG","fsbReady1r_SPECSIG","fsbVPA_SPECSIG","iobmALE0_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG","iobmDoutOE_SPECSIG","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmES4_SPECSIG","iobmETACK_SPECSIG","iobmEr2_SPECSIG","iobmEr_SPECSIG","iobmIOACT_SPECSIG","iobmIOBERR_SPECSIG","iobmIOREQr_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG","iobsALE0_SPECSIG","iobsClear1_SPECSIG","iobsIOACTr_SPECSIG","iobsIOL0_SPECSIG","iobsIOL1_SPECSIG","iobsIOREQ_SPECSIG","iobsIORW0_SPECSIG","iobsIORW1_SPECSIG","iobsIOReady_SPECSIG","iobsIOU0_SPECSIG","iobsIOU1_SPECSIG","iobsLoad1_SPECSIG","iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","nADoutLE0","nADoutLE1","nAS_IOB","nAoutOE","nBERR_FSB","nBR_IOB","nCAS","nDTACK_FSB","nDinLE","nDinOE","nDoutOE","nLDS_IOB","nOE","nRAMLWE","nRAMUWE","nRAS","nRES","nROMCS","nROMWE","nUDS_IOB","nVMA_IOB","nVPA_FSB","ramBACTr_SPECSIG","ramRAMEN_SPECSIG","ramRAMReady_SPECSIG","ramRASEL_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG","ramRefDone_SPECSIG","ramRefRAS_SPECSIG","ramRefReqSync_SPECSIG","ramRefReq_SPECSIG","ramRefUrgent_SPECSIG","ramRegUrgentSync_SPECSIG");
+      sigNegs = new Array("OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","OFF","ON","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","ON","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","ON","ON","ON","OFF","ON","ON","ON","OFF","ON","ON","OFF","OFF","ON","OFF","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF");
+      sigTypes = new Array("","","","","","","","","","","","","","","D","T","T","T","T","T","D","T","T","T","T","T","T","T","T","T","D","D","D","D","D","T","T","D","D","T","D","D","D","D","D","D","D","D","D","D","D","T","D","D","T","T","D","D","D","D","T","D","D","T","D","D","D","D","D","D","D","D","D","D","D","D","T","T","D","D","D","T","D","T","","D","D","D","T","T","D","D","D","","","D","","","","","","","","D","T","","D","D","D","D","D","D","T","D","D","D","D","D","D");
 
       
         specSig["A_FSB9_SPECSIG"]=new Array("A_FSB<9>");
@@ -94,9 +94,65 @@
       
         specSig["RA11_SPECSIG"]=new Array("RA<11>");
       
-        specSig["iobsIOREQ_SPECSIG"]=new Array("iobs/IOREQ");
+        specSig["ramRS_FSM_FFd1_SPECSIG"]=new Array("ram/RS_FSM_FFd1");
       
-        specSig["iobmnASr_SPECSIG"]=new Array("iobm/nASr");
+        specSig["ramRS_FSM_FFd3_SPECSIG"]=new Array("ram/RS_FSM_FFd3");
+      
+        specSig["iobsPS_FSM_FFd2_SPECSIG"]=new Array("iobs/PS_FSM_FFd2");
+      
+        specSig["ramBACTr_SPECSIG"]=new Array("ram/BACTr");
+      
+        specSig["ramRegUrgentSync_SPECSIG"]=new Array("ram/RegUrgentSync");
+      
+        specSig["ramRefUrgent_SPECSIG"]=new Array("ram/RefUrgent");
+      
+        specSig["ramRefReqSync_SPECSIG"]=new Array("ram/RefReqSync");
+      
+        specSig["ramRefReq_SPECSIG"]=new Array("ram/RefReq");
+      
+        specSig["ramRefRAS_SPECSIG"]=new Array("ram/RefRAS");
+      
+        specSig["iobsIOACTr_SPECSIG"]=new Array("iobs/IOACTr");
+      
+        specSig["fsbASrf_SPECSIG"]=new Array("fsb/ASrf");
+      
+        specSig["iobsIOU1_SPECSIG"]=new Array("iobs/IOU1");
+      
+        specSig["iobsIOL1_SPECSIG"]=new Array("iobs/IOL1");
+      
+        specSig["cntTimerTC_SPECSIG"]=new Array("cnt/TimerTC");
+      
+        specSig["iobsIOU0_SPECSIG"]=new Array("iobs/IOU0");
+      
+        specSig["iobsIOL0_SPECSIG"]=new Array("iobs/IOL0");
+      
+        specSig["cntTimer3_SPECSIG"]=new Array("cnt/Timer<3>");
+      
+        specSig["cntTimer2_SPECSIG"]=new Array("cnt/Timer<2>");
+      
+        specSig["cntTimer1_SPECSIG"]=new Array("cnt/Timer<1>");
+      
+        specSig["cntRefUrgent_SPECSIG"]=new Array("cnt/RefUrgent");
+      
+        specSig["iobsIOReady_SPECSIG"]=new Array("iobs/IOReady");
+      
+        specSig["cntRefReq_SPECSIG"]=new Array("cnt/RefReq");
+      
+        specSig["cntTimer0_SPECSIG"]=new Array("cnt/Timer<0>");
+      
+        specSig["iobmIOACT_SPECSIG"]=new Array("iobm/IOACT");
+      
+        specSig["iobmIOBERR_SPECSIG"]=new Array("iobm/IOBERR");
+      
+        specSig["iobsLoad1_SPECSIG"]=new Array("iobs/Load1");
+      
+        specSig["iobsOnce_SPECSIG"]=new Array("iobs/Once");
+      
+        specSig["iobsPS_FSM_FFd1_SPECSIG"]=new Array("iobs/PS_FSM_FFd1");
+      
+        specSig["ramRS_FSM_FFd2_SPECSIG"]=new Array("ram/RS_FSM_FFd2");
+      
+        specSig["ramRefDone_SPECSIG"]=new Array("ram/RefDone");
       
         specSig["iobmVPArr_SPECSIG"]=new Array("iobm/VPArr");
       
@@ -116,72 +172,10 @@
       
         specSig["iobmDTACKrf_SPECSIG"]=new Array("iobm/DTACKrf");
       
-        specSig["iobmBERRrr_SPECSIG"]=new Array("iobm/BERRrr");
-      
-        specSig["iobmBERRrf_SPECSIG"]=new Array("iobm/BERRrf");
-      
-        specSig["cntIPL2r_SPECSIG"]=new Array("cnt/IPL2r");
-      
-        specSig["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("iobm/IOS_FSM_FFd1");
-      
-        specSig["iobmBG_SPECSIG"]=new Array("iobm/BG");
-      
-        specSig["iobsIOU0_SPECSIG"]=new Array("iobs/IOU0");
-      
-        specSig["iobsIOL0_SPECSIG"]=new Array("iobs/IOL0");
-      
-        specSig["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("iobm/IOS_FSM_FFd3");
-      
-        specSig["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("iobm/IOS_FSM_FFd2");
-      
-        specSig["iobsIOL1_SPECSIG"]=new Array("iobs/IOL1");
-      
-        specSig["iobsIOU1_SPECSIG"]=new Array("iobs/IOU1");
-      
-        specSig["iobsPS_FSM_FFd1_SPECSIG"]=new Array("iobs/PS_FSM_FFd1");
-      
-        specSig["iobsPS_FSM_FFd2_SPECSIG"]=new Array("iobs/PS_FSM_FFd2");
-      
-        specSig["ramRegUrgentSync_SPECSIG"]=new Array("ram/RegUrgentSync");
-      
-        specSig["ramRefUrgent_SPECSIG"]=new Array("ram/RefUrgent");
-      
-        specSig["ramRefReqSync_SPECSIG"]=new Array("ram/RefReqSync");
-      
-        specSig["ramRefReq_SPECSIG"]=new Array("ram/RefReq");
-      
-        specSig["ramRefRAS_SPECSIG"]=new Array("ram/RefRAS");
-      
-        specSig["ramBACTr_SPECSIG"]=new Array("ram/BACTr");
-      
-        specSig["iobsIOACTr_SPECSIG"]=new Array("iobs/IOACTr");
-      
-        specSig["iobsALE0_SPECSIG"]=new Array("iobs/ALE0");
-      
-        specSig["fsbASrf_SPECSIG"]=new Array("fsb/ASrf");
-      
-        specSig["cntRefReq_SPECSIG"]=new Array("cnt/RefReq");
-      
-        specSig["cntRefUrgent_SPECSIG"]=new Array("cnt/RefUrgent");
-      
-        specSig["iobmIOACT_SPECSIG"]=new Array("iobm/IOACT");
-      
-        specSig["iobsLoad1_SPECSIG"]=new Array("iobs/Load1");
-      
-        specSig["ramRS_FSM_FFd1_SPECSIG"]=new Array("ram/RS_FSM_FFd1");
-      
-        specSig["ramRS_FSM_FFd2_SPECSIG"]=new Array("ram/RS_FSM_FFd2");
-      
-        specSig["ramRefDone_SPECSIG"]=new Array("ram/RefDone");
+        specSig["iobsIOREQ_SPECSIG"]=new Array("iobs/IOREQ");
       
         specSig["fsbVPA_SPECSIG"]=new Array("fsb/VPA");
       
-        specSig["iobsClear1_SPECSIG"]=new Array("iobs/Clear1");
-      
-        specSig["fsbReady0r_SPECSIG"]=new Array("fsb/Ready0r");
-      
-        specSig["iobsIOReady_SPECSIG"]=new Array("iobs/IOReady");
-      
         specSig["fsbReady1r_SPECSIG"]=new Array("fsb/Ready1r");
       
         specSig["iobsIORW1_SPECSIG"]=new Array("iobs/IORW1");
@@ -190,26 +184,24 @@
       
         specSig["csnOverlay1_SPECSIG"]=new Array("cs/nOverlay1");
       
-        specSig["iobmIOBERR_SPECSIG"]=new Array("iobm/IOBERR");
+        specSig["fsbReady0r_SPECSIG"]=new Array("fsb/Ready0r");
       
-        specSig["iobsOnce_SPECSIG"]=new Array("iobs/Once");
+        specSig["iobmBERRrr_SPECSIG"]=new Array("iobm/BERRrr");
+      
+        specSig["iobmBERRrf_SPECSIG"]=new Array("iobm/BERRrf");
+      
+        specSig["cntPORS_FSM_FFd1_SPECSIG"]=new Array("cnt/PORS_FSM_FFd1");
+      
+        specSig["cntIPL2r_SPECSIG"]=new Array("cnt/IPL2r");
+      
+        specSig["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("iobm/IOS_FSM_FFd1");
       
         specSig["cntnRESout_SPECSIG"]=new Array("cnt/nRESout");
       
-        specSig["cntTimerTC_SPECSIG"]=new Array("cnt/TimerTC");
-      
-        specSig["cntTimer0_SPECSIG"]=new Array("cnt/Timer<0>");
-      
         specSig["cntPORS_FSM_FFd2_SPECSIG"]=new Array("cnt/PORS_FSM_FFd2");
       
         specSig["cntLTimer0_SPECSIG"]=new Array("cnt/LTimer<0>");
       
-        specSig["cntTimer3_SPECSIG"]=new Array("cnt/Timer<3>");
-      
-        specSig["cntTimer2_SPECSIG"]=new Array("cnt/Timer<2>");
-      
-        specSig["cntTimer1_SPECSIG"]=new Array("cnt/Timer<1>");
-      
         specSig["cntLTimer3_SPECSIG"]=new Array("cnt/LTimer<3>");
       
         specSig["cntLTimer2_SPECSIG"]=new Array("cnt/LTimer<2>");
@@ -218,18 +210,18 @@
       
         specSig["cntLTimer13_SPECSIG"]=new Array("cnt/LTimer<13>");
       
-        specSig["cntPORS_FSM_FFd1_SPECSIG"]=new Array("cnt/PORS_FSM_FFd1");
-      
         specSig["iobmDoutOE_SPECSIG"]=new Array("iobm/DoutOE");
       
+        specSig["iobmETACK_SPECSIG"]=new Array("iobm/ETACK");
+      
+        specSig["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("iobm/IOS_FSM_FFd2");
+      
+        specSig["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("iobm/IOS_FSM_FFd3");
+      
         specSig["ramRASEL_SPECSIG"]=new Array("ram/RASEL");
       
         specSig["ramRAMEN_SPECSIG"]=new Array("ram/RAMEN");
       
-        specSig["ramRS_FSM_FFd3_SPECSIG"]=new Array("ram/RS_FSM_FFd3");
-      
-        specSig["iobmETACK_SPECSIG"]=new Array("iobm/ETACK");
-      
         specSig["iobmALE0_SPECSIG"]=new Array("iobm/ALE0");
       
         specSig["iobmES3_SPECSIG"]=new Array("iobm/ES<3>");
@@ -242,6 +234,10 @@
       
         specSig["iobmES2_SPECSIG"]=new Array("iobm/ES<2>");
       
+        specSig["iobsALE0_SPECSIG"]=new Array("iobs/ALE0");
+      
+        specSig["iobsClear1_SPECSIG"]=new Array("iobs/Clear1");
+      
         specSig["cntLTimer9_SPECSIG"]=new Array("cnt/LTimer<9>");
       
         specSig["cntLTimer8_SPECSIG"]=new Array("cnt/LTimer<8>");
@@ -256,179 +252,199 @@
       
         specSig["cntLTimer10_SPECSIG"]=new Array("cnt/LTimer<10>");
       
-            pterms["FB1_1_1"]=new Array("/nAS_IOB","nAoutOE");
+            pterms["FB1_1_1"]=new Array("cntRefUrgent_SPECSIG");
           
-            pterms["FB1_2_1"]=new Array("/nVPA_IOB");
+            pterms["FB1_2_1"]=new Array("/ramRefDone_SPECSIG","ramRegUrgentSync_SPECSIG");
           
-            pterms["FB1_3_1"]=new Array("/nVPA_IOB");
+            pterms["FB1_3_1"]=new Array("cntRefReq_SPECSIG");
           
-            pterms["FB1_4_1"]=new Array("/nRESPIN_SPECSIG");
+            pterms["FB1_4_1"]=new Array("/ramRefDone_SPECSIG","ramRefReqSync_SPECSIG");
           
-            pterms["FB1_5_1"]=new Array("/nRESPIN_SPECSIG");
+            pterms["FB1_5_1"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG");
           
-            pterms["FB1_6_1"]=new Array("iobsIOREQ_SPECSIG");
+            pterms["FB1_6_1"]=new Array("iobmIOACT_SPECSIG");
           
-            pterms["FB1_7_1"]=new Array("iobmEr_SPECSIG");
+            pterms["FB1_7_1"]=new Array("/nAS_FSB");
           
-            pterms["FB1_8_1"]=new Array("E");
+            pterms["FB1_8_1"]=new Array("/nUDS_FSB");
           
-            pterms["FB1_9_1"]=new Array("/nDTACK_IOB");
+            pterms["FB1_8_2"]=new Array("iobsLoad1_SPECSIG");
           
-            pterms["FB1_10_1"]=new Array("/nDTACK_IOB");
+            pterms["FB1_9_1"]=new Array("/nLDS_FSB");
           
-            pterms["FB1_11_1"]=new Array("/nBERR_IOB");
+            pterms["FB1_9_2"]=new Array("iobsLoad1_SPECSIG");
           
-            pterms["FB1_12_1"]=new Array("/nBERR_IOB");
+            pterms["FB1_10_1"]=new Array("/cntTimer1_SPECSIG","/cntTimer2_SPECSIG","/cntTimer0_SPECSIG","cntTimer3_SPECSIG");
           
-            pterms["FB1_13_1"]=new Array("/nIPL2");
+            pterms["FB1_10_2"]=new Array("E");
           
-            pterms["FB1_14_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB1_11_1"]=new Array("/nUDS_FSB","nADoutLE1");
           
-            pterms["FB1_14_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB1_11_2"]=new Array("iobsIOU1_SPECSIG","/nADoutLE1");
           
-            pterms["FB1_15_1"]=new Array("/nBG_IOB");
+            pterms["FB1_11_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB1_15_2"]=new Array("iobmnASr_SPECSIG");
+            pterms["FB1_12_1"]=new Array("/nLDS_FSB","nADoutLE1");
           
-            pterms["FB1_16_1"]=new Array("/nUDS_FSB","nADoutLE1");
+            pterms["FB1_12_2"]=new Array("iobsIOL1_SPECSIG","/nADoutLE1");
           
-            pterms["FB1_16_2"]=new Array("iobsIOU1_SPECSIG","/nADoutLE1");
+            pterms["FB1_12_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB1_16_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB1_13_1"]=new Array("cntTimerTC_SPECSIG","cntTimer3_SPECSIG");
           
-            pterms["FB1_17_1"]=new Array("/nLDS_FSB","nADoutLE1");
+            pterms["FB1_13_2"]=new Array("/cntTimerTC_SPECSIG","cntTimer1_SPECSIG","cntTimer2_SPECSIG","cntTimer0_SPECSIG");
           
-            pterms["FB1_17_2"]=new Array("iobsIOL1_SPECSIG","/nADoutLE1");
+            pterms["FB1_13_3"]=new Array("E");
           
-            pterms["FB1_17_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB1_14_1"]=new Array("cntTimerTC_SPECSIG","cntTimer2_SPECSIG");
           
-            pterms["FB1_18_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB1_14_2"]=new Array("/cntTimerTC_SPECSIG","cntTimer1_SPECSIG","cntTimer0_SPECSIG");
           
-            pterms["FB1_18_2"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB1_14_3"]=new Array("E");
           
-            pterms["FB1_18_3"]=new Array("/C8M","iobmBG_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","iobmIOREQr_SPECSIG");
+            pterms["FB1_15_1"]=new Array("/cntTimerTC_SPECSIG","cntTimer1_SPECSIG","/cntTimer0_SPECSIG");
           
-            pterms["FB2_7_1"]=new Array("cntRefUrgent_SPECSIG");
+            pterms["FB1_15_2"]=new Array("/cntTimerTC_SPECSIG","/cntTimer1_SPECSIG","cntTimer0_SPECSIG");
           
-            pterms["FB2_8_1"]=new Array("/ramRefDone_SPECSIG","ramRegUrgentSync_SPECSIG");
+            pterms["FB1_15_3"]=new Array("E");
           
-            pterms["FB2_9_1"]=new Array("cntRefReq_SPECSIG");
+            pterms["FB1_16_1"]=new Array("cntTimer1_SPECSIG","cntTimer2_SPECSIG","/cntTimer3_SPECSIG");
           
-            pterms["FB2_10_1"]=new Array("/ramRefDone_SPECSIG","ramRefReqSync_SPECSIG");
+            pterms["FB1_16_2"]=new Array("/cntTimer1_SPECSIG","/cntTimer2_SPECSIG","/cntTimer0_SPECSIG","cntTimer3_SPECSIG");
           
-            pterms["FB2_11_1"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG");
+            pterms["FB1_16_3"]=new Array("E");
           
-            pterms["FB2_12_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB1_17_1"]=new Array("iobsIOReady_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB2_13_1"]=new Array("iobmIOACT_SPECSIG");
+            pterms["FB1_17_2"]=new Array("iobsOnce_SPECSIG","iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","iobmIOBERR_SPECSIG","nADoutLE1");
           
-            pterms["FB2_14_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB1_17_3"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/iobmIOBERR_SPECSIG","nADoutLE1");
           
-            pterms["FB2_15_1"]=new Array("/nAS_FSB");
+            pterms["FB1_17_4"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/iobmIOBERR_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB2_16_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG");
+            pterms["FB1_18_1"]=new Array("cntTimer1_SPECSIG","/cntTimer3_SPECSIG");
           
-            pterms["FB2_16_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
+            pterms["FB1_18_2"]=new Array("cntTimer2_SPECSIG","/cntTimer3_SPECSIG");
           
-            pterms["FB2_17_1"]=new Array("/nUDS_FSB");
+            pterms["FB1_18_3"]=new Array("/cntTimer1_SPECSIG","/cntTimer2_SPECSIG","/cntTimer0_SPECSIG","cntTimer3_SPECSIG");
           
-            pterms["FB2_17_2"]=new Array("iobsLoad1_SPECSIG");
+            pterms["FB1_18_4"]=new Array("E");
           
-            pterms["FB2_18_1"]=new Array("/nLDS_FSB");
+            pterms["FB2_9_1"]=new Array("/nVPA_IOB");
           
-            pterms["FB2_18_2"]=new Array("iobsLoad1_SPECSIG");
+            pterms["FB2_10_1"]=new Array("/nVPA_IOB");
           
-            pterms["FB3_1_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG","/ramRAMReady_SPECSIG");
+            pterms["FB2_11_1"]=new Array("/nRESPIN_SPECSIG");
           
-            pterms["FB3_1_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB","/ramRAMReady_SPECSIG");
+            pterms["FB2_12_1"]=new Array("/nRESPIN_SPECSIG");
           
-            pterms["FB3_1_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG","/ramRAMReady_SPECSIG");
+            pterms["FB2_13_1"]=new Array("iobsIOREQ_SPECSIG");
           
-            pterms["FB3_1_4"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB");
+            pterms["FB2_14_1"]=new Array("iobmEr_SPECSIG");
           
-            pterms["FB3_1_5"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB");
+            pterms["FB2_15_1"]=new Array("E");
           
-            pterms["FB3_2_1"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB");
+            pterms["FB2_16_1"]=new Array("/nDTACK_IOB");
           
-            pterms["FB3_2_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB2_17_1"]=new Array("/nDTACK_IOB");
           
-            pterms["FB3_2_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB","/ramRAMReady_SPECSIG");
+            pterms["FB2_18_1"]=new Array("/cntTimerTC_SPECSIG","/cntTimer0_SPECSIG");
           
-            pterms["FB3_2_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB");
+            pterms["FB2_18_2"]=new Array("E");
           
-            pterms["FB3_2_5"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB3_1_1"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB");
           
-            pterms["FB3_3_1"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB3_1_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB3_3_2"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB3_1_3"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB");
           
-            pterms["FB3_3_3"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/nADoutLE1");
+            pterms["FB3_1_4"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB3_3_4"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/nADoutLE1");
+            pterms["FB3_1_5"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB");
           
-            pterms["FB3_3_5"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG","/nADoutLE1");
+            pterms["FB3_2_1"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/nADoutLE1");
           
-            pterms["FB3_5_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB3_2_2"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG","/nADoutLE1");
           
-            pterms["FB3_5_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_2_3"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/nADoutLE1");
           
-            pterms["FB3_6_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
+            pterms["FB3_2_4"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG","/nADoutLE1");
           
-            pterms["FB3_6_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
+            pterms["FB3_2_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","iobsIOReady_SPECSIG","/nAS_FSB");
           
-            pterms["FB3_6_3"]=new Array("iobsOnce_SPECSIG","iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","iobmIOBERR_SPECSIG","nADoutLE1");
+            pterms["FB3_3_1"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","fsbReady1r_SPECSIG","/nAS_FSB");
           
-            pterms["FB3_6_4"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/iobmIOBERR_SPECSIG","nADoutLE1");
+            pterms["FB3_3_2"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","fsbReady1r_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB3_6_5"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/iobmIOBERR_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_3_3"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB3_7_1"]=new Array("iobsIOReady_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_5_1"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB3_7_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_5_2"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB3_7_3"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
+            pterms["FB3_5_3"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+          
+            pterms["FB3_5_4"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd1_SPECSIG");
+          
+            pterms["FB3_5_5"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+          
+            pterms["FB3_6_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd1_SPECSIG");
+          
+            pterms["FB3_6_2"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+          
+            pterms["FB3_6_3"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd1_SPECSIG");
+          
+            pterms["FB3_6_4"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+          
+            pterms["FB3_6_5"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd1_SPECSIG");
+          
+            pterms["FB3_7_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+          
+            pterms["FB3_7_2"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG");
+          
+            pterms["FB3_7_3"]=new Array("/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
           
             pterms["FB3_7_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","fsbReady1r_SPECSIG");
           
             pterms["FB3_7_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","iobsIOReady_SPECSIG");
           
-            pterms["FB3_8_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
+            pterms["FB3_8_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB3_8_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
+            pterms["FB3_8_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
           
-            pterms["FB3_8_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
+            pterms["FB3_8_3"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
           
-            pterms["FB3_8_4"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
+            pterms["FB3_8_4"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
           
-            pterms["FB3_8_5"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
+            pterms["FB3_8_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
           
-            pterms["FB3_9_1"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB","/nADoutLE1");
+            pterms["FB3_9_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
           
-            pterms["FB3_9_2"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB","/nADoutLE1");
+            pterms["FB3_9_2"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB","/nADoutLE1");
           
-            pterms["FB3_9_3"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
+            pterms["FB3_9_3"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB","/nADoutLE1");
           
-            pterms["FB3_9_4"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
+            pterms["FB3_9_4"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
           
-            pterms["FB3_9_5"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
+            pterms["FB3_9_5"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
           
             pterms["FB3_10_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
             pterms["FB3_10_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
           
-            pterms["FB3_10_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
+            pterms["FB3_10_3"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
           
-            pterms["FB3_10_4"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
+            pterms["FB3_10_4"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
           
-            pterms["FB3_10_5"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
+            pterms["FB3_10_5"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG");
           
-            pterms["FB3_11_1"]=new Array("/nWE_FSB","/iobsIORW1_SPECSIG");
+            pterms["FB3_11_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB3_11_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_11_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
           
-            pterms["FB3_11_3"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB3_11_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB19_SPECSIG");
           
-            pterms["FB3_11_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
+            pterms["FB3_11_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","nWE_FSB");
           
             pterms["FB3_11_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
           
@@ -436,157 +452,147 @@
           
             pterms["FB3_12_2"]=new Array("/nADoutLE1");
           
-            pterms["FB3_12_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG");
+            pterms["FB3_12_3"]=new Array("nWE_FSB","iobsIORW1_SPECSIG");
           
-            pterms["FB3_12_4"]=new Array("nWE_FSB","iobsIORW1_SPECSIG");
+            pterms["FB3_12_4"]=new Array("/nWE_FSB","/iobsIORW1_SPECSIG");
           
-            pterms["FB3_12_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsIORW1_SPECSIG");
+            pterms["FB3_12_5"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB3_13_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
+            pterms["FB3_13_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB20_SPECSIG");
           
-            pterms["FB3_13_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
+            pterms["FB3_13_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB18_SPECSIG");
           
-            pterms["FB3_13_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
+            pterms["FB3_13_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB17_SPECSIG");
           
-            pterms["FB3_13_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
+            pterms["FB3_13_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB16_SPECSIG");
           
-            pterms["FB3_13_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
+            pterms["FB3_13_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG");
           
-            pterms["FB3_14_1"]=new Array("A_FSB23_SPECSIG","nWE_FSB","/iobsOnce_SPECSIG","/iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_14_1"]=new Array("/iobsIORW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
           
-            pterms["FB3_14_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","nWE_FSB","/iobsOnce_SPECSIG","/iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_14_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/iobsIORW0_SPECSIG","nADoutLE1");
           
-            pterms["FB3_14_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","nWE_FSB","/iobsOnce_SPECSIG","/iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_14_3"]=new Array("A_FSB23_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB3_14_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_14_4"]=new Array("A_FSB23_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB3_14_5"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_14_5"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB3_15_1"]=new Array("iobsIORW0_SPECSIG","/iobsIORW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB3_15_1"]=new Array("/iobsIORW0_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
           
-            pterms["FB3_15_2"]=new Array("/iobsIORW0_SPECSIG","iobsIORW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB3_15_2"]=new Array("/iobsIORW0_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB3_15_3"]=new Array("A_FSB23_SPECSIG","nWE_FSB","/iobsOnce_SPECSIG","/iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_15_3"]=new Array("iobsOnce_SPECSIG","/iobsIORW0_SPECSIG","nADoutLE1");
           
-            pterms["FB3_15_4"]=new Array("A_FSB23_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_15_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/iobsIORW0_SPECSIG","nADoutLE1");
           
-            pterms["FB3_15_5"]=new Array("A_FSB23_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_15_5"]=new Array("/iobsIORW0_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB3_16_1"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_16_1"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB3_16_2"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_16_2"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB3_16_3"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_16_3"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB3_16_4"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_16_4"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB3_16_5"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_16_5"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
             pterms["FB3_17_1"]=new Array("/nWE_FSB","/nAS_FSB");
           
-            pterms["FB3_17_2"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_17_2"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB3_17_3"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB3_17_3"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB3_17_4"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","iobsIORW0_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB3_18_1"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB3_18_1"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","csnOverlay1_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG","/nADoutLE1");
+            pterms["FB3_18_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB","/ramRAMReady_SPECSIG");
           
-            pterms["FB3_18_2"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","fsbReady1r_SPECSIG","/nAS_FSB");
+            pterms["FB3_18_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG","/ramRAMReady_SPECSIG");
           
-            pterms["FB3_18_3"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","fsbReady1r_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB3_18_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB","/ramRAMReady_SPECSIG");
           
-            pterms["FB3_18_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","iobsIOReady_SPECSIG","/nAS_FSB");
+            pterms["FB3_18_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG","/ramRAMReady_SPECSIG");
           
-            pterms["FB3_18_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","iobsIOReady_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB4_1_1"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
           
-            pterms["FB4_1_1"]=new Array("cntLTimer13_SPECSIG","cntPORS_FSM_FFd1_SPECSIG","/cntPORS_FSM_FFd2_SPECSIG");
+            pterms["FB4_1_2"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
           
-            pterms["FB4_1_2"]=new Array("cntPORS_FSM_FFd1_SPECSIG","/cntPORS_FSM_FFd2_SPECSIG","cntnRESout_SPECSIG");
+            pterms["FB4_1_3"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
           
             pterms["FB4_2_1"]=new Array("/nBR_IOB","cntPORS_FSM_FFd1_SPECSIG","/cntPORS_FSM_FFd2_SPECSIG");
           
-            pterms["FB4_3_1"]=new Array("/cntTimer1_SPECSIG","/cntTimer2_SPECSIG","/cntTimer0_SPECSIG","cntTimer3_SPECSIG");
+            pterms["FB4_3_1"]=new Array("/nBERR_IOB");
           
-            pterms["FB4_3_2"]=new Array("E");
+            pterms["FB4_4_1"]=new Array("/nBERR_IOB");
           
-            pterms["FB4_4_1"]=new Array("/cntTimerTC_SPECSIG","/cntTimer0_SPECSIG");
-          
-            pterms["FB4_4_2"]=new Array("E");
-          
-            pterms["FB4_5_1"]=new Array("/nAoutOE","iobmDoutOE_SPECSIG");
+            pterms["FB4_5_1"]=new Array("iobmDoutOE_SPECSIG","/nAoutOE");
           
             pterms["FB4_6_1"]=new Array("A_FSB23_SPECSIG","nWE_FSB","/nAS_FSB");
           
-            pterms["FB4_6_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","nWE_FSB","/nAS_FSB");
+            pterms["FB4_6_2"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/nAS_FSB");
           
-            pterms["FB4_7_1"]=new Array("cntLTimer13_SPECSIG","/cntPORS_FSM_FFd1_SPECSIG");
+            pterms["FB4_6_3"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","nWE_FSB","/nAS_FSB");
           
-            pterms["FB4_7_2"]=new Array("/cntLTimer13_SPECSIG","cntPORS_FSM_FFd2_SPECSIG");
+            pterms["FB4_7_1"]=new Array("cntLTimer13_SPECSIG","/cntPORS_FSM_FFd1_SPECSIG","cntPORS_FSM_FFd2_SPECSIG","/cntIPL2r_SPECSIG");
           
             pterms["FB4_8_1"]=new Array("/cntnRESout_SPECSIG");
           
-            pterms["FB4_9_1"]=new Array("/cntLTimer0_SPECSIG","cntLTimer13_SPECSIG","cntTimerTC_SPECSIG");
+            pterms["FB4_9_1"]=new Array("/nIPL2");
           
-            pterms["FB4_9_2"]=new Array("cntTimerTC_SPECSIG");
+            pterms["FB4_10_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
           
-            pterms["FB4_10_1"]=new Array("cntTimerTC_SPECSIG","cntTimer3_SPECSIG");
-          
-            pterms["FB4_10_2"]=new Array("/cntTimerTC_SPECSIG","cntTimer1_SPECSIG","cntTimer2_SPECSIG","cntTimer0_SPECSIG");
-          
-            pterms["FB4_10_3"]=new Array("E");
+            pterms["FB4_10_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
             pterms["FB4_11_1"]=new Array("fsbVPA_SPECSIG","/nAS_FSB");
           
-            pterms["FB4_12_1"]=new Array("cntTimerTC_SPECSIG","cntTimer2_SPECSIG");
+            pterms["FB4_12_1"]=new Array("cntLTimer13_SPECSIG","cntPORS_FSM_FFd1_SPECSIG","/cntPORS_FSM_FFd2_SPECSIG");
           
-            pterms["FB4_12_2"]=new Array("/cntTimerTC_SPECSIG","cntTimer1_SPECSIG","cntTimer0_SPECSIG");
+            pterms["FB4_12_2"]=new Array("cntPORS_FSM_FFd1_SPECSIG","/cntPORS_FSM_FFd2_SPECSIG","cntnRESout_SPECSIG");
           
-            pterms["FB4_12_3"]=new Array("E");
+            pterms["FB4_13_1"]=new Array("cntLTimer13_SPECSIG","/cntPORS_FSM_FFd1_SPECSIG");
           
-            pterms["FB4_13_1"]=new Array("/cntTimerTC_SPECSIG","cntTimer1_SPECSIG","/cntTimer0_SPECSIG");
+            pterms["FB4_13_2"]=new Array("/cntLTimer13_SPECSIG","cntPORS_FSM_FFd2_SPECSIG");
           
-            pterms["FB4_13_2"]=new Array("/cntTimerTC_SPECSIG","/cntTimer1_SPECSIG","cntTimer0_SPECSIG");
+            pterms["FB4_14_1"]=new Array("/cntLTimer0_SPECSIG","cntLTimer13_SPECSIG","cntTimerTC_SPECSIG");
           
-            pterms["FB4_13_3"]=new Array("E");
+            pterms["FB4_14_2"]=new Array("cntTimerTC_SPECSIG");
           
-            pterms["FB4_14_1"]=new Array("cntTimer1_SPECSIG","cntTimer2_SPECSIG","/cntTimer3_SPECSIG");
+            pterms["FB4_15_1"]=new Array("cntLTimer13_SPECSIG","cntLTimer3_SPECSIG","cntTimerTC_SPECSIG");
           
-            pterms["FB4_14_2"]=new Array("/cntTimer1_SPECSIG","/cntTimer2_SPECSIG","/cntTimer0_SPECSIG","cntTimer3_SPECSIG");
+            pterms["FB4_15_2"]=new Array("cntLTimer0_SPECSIG","/cntLTimer13_SPECSIG","cntLTimer1_SPECSIG","cntLTimer2_SPECSIG");
           
-            pterms["FB4_14_3"]=new Array("E");
+            pterms["FB4_15_3"]=new Array("cntLTimer0_SPECSIG","cntLTimer1_SPECSIG","cntLTimer2_SPECSIG","/cntTimerTC_SPECSIG");
           
-            pterms["FB4_15_1"]=new Array("cntTimer1_SPECSIG","/cntTimer3_SPECSIG");
+            pterms["FB4_15_4"]=new Array("cntTimerTC_SPECSIG");
           
-            pterms["FB4_15_2"]=new Array("cntTimer2_SPECSIG","/cntTimer3_SPECSIG");
+            pterms["FB4_16_1"]=new Array("cntLTimer0_SPECSIG","/cntLTimer13_SPECSIG","cntLTimer1_SPECSIG");
           
-            pterms["FB4_15_3"]=new Array("/cntTimer1_SPECSIG","/cntTimer2_SPECSIG","/cntTimer0_SPECSIG","cntTimer3_SPECSIG");
+            pterms["FB4_16_2"]=new Array("cntLTimer0_SPECSIG","cntLTimer1_SPECSIG","/cntTimerTC_SPECSIG");
           
-            pterms["FB4_15_4"]=new Array("E");
-          
-            pterms["FB4_16_1"]=new Array("cntLTimer13_SPECSIG","cntLTimer3_SPECSIG","cntTimerTC_SPECSIG");
-          
-            pterms["FB4_16_2"]=new Array("cntLTimer0_SPECSIG","/cntLTimer13_SPECSIG","cntLTimer1_SPECSIG","cntLTimer2_SPECSIG");
-          
-            pterms["FB4_16_3"]=new Array("cntLTimer0_SPECSIG","cntLTimer1_SPECSIG","cntLTimer2_SPECSIG","/cntTimerTC_SPECSIG");
+            pterms["FB4_16_3"]=new Array("cntLTimer13_SPECSIG","cntLTimer2_SPECSIG","cntTimerTC_SPECSIG");
           
             pterms["FB4_16_4"]=new Array("cntTimerTC_SPECSIG");
           
-            pterms["FB4_17_1"]=new Array("cntLTimer0_SPECSIG","/cntLTimer13_SPECSIG","cntLTimer1_SPECSIG");
+            pterms["FB4_17_1"]=new Array("cntLTimer0_SPECSIG","cntLTimer1_SPECSIG");
           
-            pterms["FB4_17_2"]=new Array("cntLTimer0_SPECSIG","cntLTimer1_SPECSIG","/cntTimerTC_SPECSIG");
+            pterms["FB4_17_2"]=new Array("/cntLTimer0_SPECSIG","/cntLTimer1_SPECSIG");
           
-            pterms["FB4_17_3"]=new Array("cntLTimer13_SPECSIG","cntLTimer2_SPECSIG","cntTimerTC_SPECSIG");
+            pterms["FB4_17_3"]=new Array("cntLTimer13_SPECSIG","cntTimerTC_SPECSIG");
           
             pterms["FB4_17_4"]=new Array("cntTimerTC_SPECSIG");
           
-            pterms["FB4_18_1"]=new Array("cntLTimer0_SPECSIG","cntLTimer1_SPECSIG");
+            pterms["FB4_17_5"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
           
-            pterms["FB4_18_2"]=new Array("/cntLTimer0_SPECSIG","/cntLTimer1_SPECSIG");
+            pterms["FB4_18_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG");
           
-            pterms["FB4_18_3"]=new Array("cntLTimer13_SPECSIG","cntTimerTC_SPECSIG");
+            pterms["FB4_18_2"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmETACK_SPECSIG");
           
-            pterms["FB4_18_4"]=new Array("cntTimerTC_SPECSIG");
+            pterms["FB4_18_3"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmETACK_SPECSIG");
+          
+            pterms["FB4_18_4"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+          
+            pterms["FB4_18_5"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
           
             pterms["FB5_1_1"]=new Array("ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG");
           
@@ -624,21 +630,11 @@
           
             pterms["FB5_6_1"]=new Array("nWE_FSB","/nAS_FSB");
           
-            pterms["FB5_6_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB5_7_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB5_6_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG");
+            pterms["FB5_7_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
           
-            pterms["FB5_6_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB5_7_1"]=new Array("ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG");
-          
-            pterms["FB5_7_2"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB5_7_3"]=new Array("/nAS_FSB","ramRS_FSM_FFd1_SPECSIG","ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB5_7_4"]=new Array("ramRS_FSM_FFd1_SPECSIG","ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB5_7_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG");
+            pterms["FB5_7_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
           
             pterms["FB5_8_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay0_SPECSIG","/nAS_FSB");
           
@@ -748,7 +744,7 @@
           
             pterms["FB6_2_2"]=new Array("nVMA_IOB","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","iobmIOACT_SPECSIG","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG");
           
-            pterms["FB6_2_3"]=new Array("nAoutOE");
+            pterms["FB6_2_3"]=new Array("/nAoutOE");
           
             pterms["FB6_3_1"]=new Array("iobsIORW0_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG");
           
@@ -758,31 +754,29 @@
           
             pterms["FB6_4_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOREQr_SPECSIG");
           
-            pterms["FB6_5_1"]=new Array("iobmES3_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
+            pterms["FB6_5_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_5_2"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmEr_SPECSIG");
+            pterms["FB6_5_2"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_5_3"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","/iobmEr2_SPECSIG");
+            pterms["FB6_5_3"]=new Array("/C8M","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","iobmIOREQr_SPECSIG","/nAoutOE");
           
-            pterms["FB6_6_1"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG");
+            pterms["FB6_6_1"]=new Array("iobmES3_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
           
-            pterms["FB6_6_2"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG");
+            pterms["FB6_6_2"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmEr_SPECSIG");
           
-            pterms["FB6_6_3"]=new Array("/iobmEr_SPECSIG","iobmEr2_SPECSIG");
+            pterms["FB6_6_3"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","/iobmEr2_SPECSIG");
           
-            pterms["FB6_7_1"]=new Array("iobmES0_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
+            pterms["FB6_7_1"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG");
           
-            pterms["FB6_7_2"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","iobmEr_SPECSIG");
+            pterms["FB6_7_2"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG");
           
-            pterms["FB6_7_3"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","/iobmEr2_SPECSIG");
+            pterms["FB6_7_3"]=new Array("/iobmEr_SPECSIG","iobmEr2_SPECSIG");
           
-            pterms["FB6_8_1"]=new Array("iobmES4_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
+            pterms["FB6_8_1"]=new Array("iobmES0_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
           
-            pterms["FB6_8_2"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmEr_SPECSIG");
+            pterms["FB6_8_2"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","iobmEr_SPECSIG");
           
-            pterms["FB6_8_3"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","/iobmEr2_SPECSIG");
-          
-            pterms["FB6_8_4"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
+            pterms["FB6_8_3"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","/iobmEr2_SPECSIG");
           
             pterms["FB6_9_1"]=new Array("iobsIOL0_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
@@ -790,17 +784,15 @@
           
             pterms["FB6_9_3"]=new Array("/iobsIORW0_SPECSIG","iobsIOL0_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
           
-            pterms["FB6_9_4"]=new Array("nAoutOE");
+            pterms["FB6_9_4"]=new Array("/nAoutOE");
           
-            pterms["FB6_10_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB6_10_1"]=new Array("iobmES4_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
           
-            pterms["FB6_10_2"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmETACK_SPECSIG");
+            pterms["FB6_10_2"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmEr_SPECSIG");
           
-            pterms["FB6_10_3"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+            pterms["FB6_10_3"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","/iobmEr2_SPECSIG");
           
-            pterms["FB6_10_4"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
-          
-            pterms["FB6_10_5"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB6_10_4"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
           
             pterms["FB6_11_1"]=new Array("iobsIOU0_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
@@ -808,23 +800,23 @@
           
             pterms["FB6_11_3"]=new Array("/iobsIORW0_SPECSIG","iobsIOU0_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
           
-            pterms["FB6_11_4"]=new Array("nAoutOE");
+            pterms["FB6_11_4"]=new Array("/nAoutOE");
           
             pterms["FB6_12_1"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
             pterms["FB6_12_2"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_12_3"]=new Array("nAoutOE");
+            pterms["FB6_12_3"]=new Array("/nAoutOE");
           
-            pterms["FB6_13_1"]=new Array("/iobmES0_SPECSIG","/iobmES2_SPECSIG");
+            pterms["FB6_13_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_13_2"]=new Array("/iobmES1_SPECSIG","/iobmES2_SPECSIG");
+            pterms["FB6_13_2"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmETACK_SPECSIG");
           
-            pterms["FB6_13_3"]=new Array("/iobmEr_SPECSIG","iobmEr2_SPECSIG");
+            pterms["FB6_13_3"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
           
-            pterms["FB6_13_4"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG");
+            pterms["FB6_13_4"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
           
-            pterms["FB6_13_5"]=new Array("/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
+            pterms["FB6_13_5"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
           
             pterms["FB6_14_1"]=new Array("iobsLoad1_SPECSIG");
           
@@ -832,37 +824,29 @@
           
             pterms["FB6_15_1"]=new Array("/iobmALE0_SPECSIG","/iobsALE0_SPECSIG");
           
-            pterms["FB6_15_2"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB6_16_1"]=new Array("/iobmES0_SPECSIG","/iobmES2_SPECSIG");
           
-            pterms["FB6_16_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB6_16_2"]=new Array("/iobmES1_SPECSIG","/iobmES2_SPECSIG");
           
-            pterms["FB6_16_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOREQr_SPECSIG");
+            pterms["FB6_16_3"]=new Array("/iobmEr_SPECSIG","iobmEr2_SPECSIG");
           
-            pterms["FB6_16_3"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmETACK_SPECSIG");
+            pterms["FB6_16_4"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG");
           
-            pterms["FB6_16_4"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB6_16_5"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+            pterms["FB6_16_5"]=new Array("/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
           
             pterms["FB6_17_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_17_2"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB6_17_2"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
           
-            pterms["FB6_17_3"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+            pterms["FB6_18_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_17_4"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+            pterms["FB6_18_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOREQr_SPECSIG");
           
-            pterms["FB6_17_5"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB6_18_3"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmETACK_SPECSIG");
           
-            pterms["FB6_18_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG");
+            pterms["FB6_18_4"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
           
-            pterms["FB6_18_2"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmETACK_SPECSIG");
-          
-            pterms["FB6_18_3"]=new Array("C8M","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/iobmIOBERR_SPECSIG","iobmETACK_SPECSIG");
-          
-            pterms["FB6_18_4"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB6_18_5"]=new Array("C8M","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOBERR_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+            pterms["FB6_18_5"]=new Array("C8M","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
           
             pterms["FB7_1_1"]=new Array("cntLTimer13_SPECSIG","cntTimerTC_SPECSIG");
           
@@ -974,31 +958,31 @@
           
             pterms["FB7_18_4"]=new Array("cntTimerTC_SPECSIG");
           
-            pterms["FB8_1_1"]=new Array("cntLTimer13_SPECSIG","/cntPORS_FSM_FFd1_SPECSIG","cntPORS_FSM_FFd2_SPECSIG","/cntIPL2r_SPECSIG");
+            pterms["FB8_1_1"]=new Array("iobsOnce_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB8_1_2"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_1_2"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_1_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_1_3"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_2_1"]=new Array("A_FSB19_SPECSIG");
+            pterms["FB8_1_4"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_2_2"]=new Array("ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_1_5"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_2_3"]=new Array("ramRS_FSM_FFd1_SPECSIG","/ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_2_1"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_2_4"]=new Array("A_FSB23_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_2_2"]=new Array("A_FSB14_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","nADoutLE1");
           
-            pterms["FB8_2_5"]=new Array("nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB8_2_3"]=new Array("A_FSB14_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB8_3_1"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_2_4"]=new Array("A_FSB13_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","nADoutLE1");
           
-            pterms["FB8_3_2"]=new Array("/ramRS_FSM_FFd2_SPECSIG","/ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/ramRAMEN_SPECSIG");
+            pterms["FB8_2_5"]=new Array("A_FSB13_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB8_3_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_3_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
           
-            pterms["FB8_3_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_3_2"]=new Array("A_FSB19_SPECSIG");
           
-            pterms["FB8_3_5"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_4_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
             pterms["FB8_5_1"]=new Array("ramRefRAS_SPECSIG");
           
@@ -1006,369 +990,343 @@
           
             pterms["FB8_5_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","ramRAMEN_SPECSIG");
           
-            pterms["FB8_5_4"]=new Array("/nWE_FSB","/nLDS_FSB","/nAS_FSB","ramRAMEN_SPECSIG");
+            pterms["FB8_6_1"]=new Array("/nWE_FSB","/nLDS_FSB","/nAS_FSB","ramRAMEN_SPECSIG");
           
-            pterms["FB8_6_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_7_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG");
           
-            pterms["FB8_6_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_7_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
           
-            pterms["FB8_6_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_7_3"]=new Array("/nWE_FSB","/nUDS_FSB","/nAS_FSB","ramRAMEN_SPECSIG");
           
-            pterms["FB8_6_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_8_1"]=new Array("ramRS_FSM_FFd1_SPECSIG","ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_6_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_8_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG");
           
-            pterms["FB8_7_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
+            pterms["FB8_8_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_7_2"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/iobsIOACTr_SPECSIG");
+            pterms["FB8_8_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG");
           
-            pterms["FB8_7_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_8_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","ramRefUrgent_SPECSIG","/ramRAMEN_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_7_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_9_1"]=new Array("ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG");
           
-            pterms["FB8_7_5"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB8_9_2"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_8_1"]=new Array("/nWE_FSB","/nUDS_FSB","/nAS_FSB","ramRAMEN_SPECSIG");
+            pterms["FB8_9_3"]=new Array("/nAS_FSB","ramRS_FSM_FFd1_SPECSIG","ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_8_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_9_4"]=new Array("ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_8_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_9_5"]=new Array("ramRS_FSM_FFd1_SPECSIG","/ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_8_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_10_1"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_8_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB8_10_2"]=new Array("A_FSB23_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_9_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
+            pterms["FB8_10_3"]=new Array("nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB8_9_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
+            pterms["FB8_10_4"]=new Array("/ramRS_FSM_FFd2_SPECSIG","/ramRefUrgent_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/ramRAMEN_SPECSIG");
           
-            pterms["FB8_9_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
+            pterms["FB8_10_5"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_9_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB");
+            pterms["FB8_11_1"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_10_1"]=new Array("iobsOnce_SPECSIG");
+            pterms["FB8_11_2"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB8_10_2"]=new Array("/nADoutLE1");
+            pterms["FB8_11_3"]=new Array("iobsOnce_SPECSIG","/nBERR_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/iobmIOBERR_SPECSIG","nADoutLE1");
           
-            pterms["FB8_10_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG");
+            pterms["FB8_11_4"]=new Array("iobsOnce_SPECSIG","/nAS_FSB","nBERR_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","iobmIOBERR_SPECSIG","nADoutLE1");
           
-            pterms["FB8_10_4"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB8_10_5"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB8_11_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
-          
-            pterms["FB8_11_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
-          
-            pterms["FB8_11_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
-          
-            pterms["FB8_11_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
-          
-            pterms["FB8_11_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
+            pterms["FB8_11_5"]=new Array("iobsOnce_SPECSIG","nBERR_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","iobmIOBERR_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
           
             pterms["FB8_12_1"]=new Array("nAS_FSB","/nBERR_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB8_12_2"]=new Array("iobsOnce_SPECSIG","/nBERR_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/iobmIOBERR_SPECSIG","nADoutLE1");
+            pterms["FB8_12_2"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_12_3"]=new Array("iobsOnce_SPECSIG","/nAS_FSB","nBERR_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","iobmIOBERR_SPECSIG","nADoutLE1");
+            pterms["FB8_12_3"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_12_4"]=new Array("iobsOnce_SPECSIG","nBERR_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","iobmIOBERR_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB8_12_4"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_12_5"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_12_5"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_13_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_13_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_13_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_13_2"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_13_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_13_3"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_13_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_13_4"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_13_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_13_5"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_14_1"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB8_14_1"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
           
-            pterms["FB8_14_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
+            pterms["FB8_14_2"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
           
-            pterms["FB8_14_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_14_3"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_14_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_14_4"]=new Array("nBR_IOB","/cntPORS_FSM_FFd1_SPECSIG","/cntPORS_FSM_FFd2_SPECSIG");
           
-            pterms["FB8_14_5"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB8_14_5"]=new Array("/nBR_IOB","/cntPORS_FSM_FFd1_SPECSIG","cntPORS_FSM_FFd2_SPECSIG","cntIPL2r_SPECSIG");
           
-            pterms["FB8_15_1"]=new Array("nBR_IOB","/cntPORS_FSM_FFd1_SPECSIG","/cntPORS_FSM_FFd2_SPECSIG");
+            pterms["FB8_15_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
           
-            pterms["FB8_15_2"]=new Array("/nBR_IOB","/cntPORS_FSM_FFd1_SPECSIG","cntPORS_FSM_FFd2_SPECSIG","cntIPL2r_SPECSIG");
+            pterms["FB8_15_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB19_SPECSIG");
           
-            pterms["FB8_15_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_15_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB17_SPECSIG");
           
-            pterms["FB8_15_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_15_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB16_SPECSIG");
           
-            pterms["FB8_15_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB8_15_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
           
-            pterms["FB8_16_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB8_16_1"]=new Array("iobsOnce_SPECSIG");
           
-            pterms["FB8_16_2"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","/nADoutLE1");
+            pterms["FB8_16_2"]=new Array("/nADoutLE1");
           
-            pterms["FB8_16_3"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB8_16_3"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB8_16_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_16_4"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_16_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_16_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","nWE_FSB");
           
             pterms["FB8_17_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB8_17_2"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
+            pterms["FB8_17_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB20_SPECSIG");
           
-            pterms["FB8_17_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_17_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB18_SPECSIG");
           
-            pterms["FB8_17_4"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
+            pterms["FB8_17_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG");
           
-            pterms["FB8_17_5"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB8_17_5"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG");
           
-            pterms["FB8_18_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_18_1"]=new Array("A_FSB22_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_18_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_18_2"]=new Array("A_FSB22_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_18_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_18_3"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_18_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB8_18_4"]=new Array("A_FSB14_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB8_18_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsOnce_SPECSIG");
+            pterms["FB8_18_5"]=new Array("A_FSB13_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/nWE_FSB","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-          d2["iobmnASr_SPECSIG"]=new Array("FB1_1_1");
-          
-            d2imp["iobmnASr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmnASr_SPECSIG"]=new Array("C16M");
-            prld["iobmnASr_SPECSIG"]="GND";
-          d2["iobmVPArr_SPECSIG"]=new Array("FB1_2_1");
-          
-            d2imp["iobmVPArr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmVPArr_SPECSIG"]=new Array("C16M");
-            prld["iobmVPArr_SPECSIG"]="GND";
-          d2["iobmVPArf_SPECSIG"]=new Array("FB1_3_1");
-          
-            d2imp["iobmVPArf_SPECSIG"]=new Array("1");
-          clkNegs["iobmVPArf_SPECSIG"]=1;
-              gblclk["iobmVPArf_SPECSIG"]=new Array("C16M");
-            prld["iobmVPArf_SPECSIG"]="GND";
-          d2["iobmRESrr_SPECSIG"]=new Array("FB1_4_1");
-          
-            d2imp["iobmRESrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmRESrr_SPECSIG"]=new Array("C16M");
-            prld["iobmRESrr_SPECSIG"]="GND";
-          d2["iobmRESrf_SPECSIG"]=new Array("FB1_5_1");
-          
-            d2imp["iobmRESrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmRESrf_SPECSIG"]=1;
-              gblclk["iobmRESrf_SPECSIG"]=new Array("C16M");
-            prld["iobmRESrf_SPECSIG"]="GND";
-          d2["iobmIOREQr_SPECSIG"]=new Array("FB1_6_1");
-          
-            d2imp["iobmIOREQr_SPECSIG"]=new Array("1");
-          clkNegs["iobmIOREQr_SPECSIG"]=1;
-              gblclk["iobmIOREQr_SPECSIG"]=new Array("C16M");
-            prld["iobmIOREQr_SPECSIG"]="GND";
-          d2["iobmEr2_SPECSIG"]=new Array("FB1_7_1");
-          
-            d2imp["iobmEr2_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmEr2_SPECSIG"]=new Array("C16M");
-            prld["iobmEr2_SPECSIG"]="GND";
-          d2["iobmEr_SPECSIG"]=new Array("FB1_8_1");
-          
-            d2imp["iobmEr_SPECSIG"]=new Array("1");
-          clkNegs["iobmEr_SPECSIG"]=1;
-              gblclk["iobmEr_SPECSIG"]=new Array("C8M");
-            prld["iobmEr_SPECSIG"]="GND";
-          d2["iobmDTACKrr_SPECSIG"]=new Array("FB1_9_1");
-          
-            d2imp["iobmDTACKrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmDTACKrr_SPECSIG"]=new Array("C16M");
-            prld["iobmDTACKrr_SPECSIG"]="GND";
-          d2["iobmDTACKrf_SPECSIG"]=new Array("FB1_10_1");
-          
-            d2imp["iobmDTACKrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmDTACKrf_SPECSIG"]=1;
-              gblclk["iobmDTACKrf_SPECSIG"]=new Array("C16M");
-            prld["iobmDTACKrf_SPECSIG"]="GND";
-          d2["iobmBERRrr_SPECSIG"]=new Array("FB1_11_1");
-          
-            d2imp["iobmBERRrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmBERRrr_SPECSIG"]=new Array("C16M");
-            prld["iobmBERRrr_SPECSIG"]="GND";
-          d2["iobmBERRrf_SPECSIG"]=new Array("FB1_12_1");
-          
-            d2imp["iobmBERRrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmBERRrf_SPECSIG"]=1;
-              gblclk["iobmBERRrf_SPECSIG"]=new Array("C16M");
-            prld["iobmBERRrf_SPECSIG"]="GND";
-          d2["cntIPL2r_SPECSIG"]=new Array("FB1_13_1");
-          
-            d2imp["cntIPL2r_SPECSIG"]=new Array("1");
-          clkNegs["cntIPL2r_SPECSIG"]=1;
-              gblclk["cntIPL2r_SPECSIG"]=new Array("C8M");
-            prld["cntIPL2r_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("FB1_14_1","FB1_14_2");
-          
-            d2imp["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("C16M");
-            prld["iobmIOS_FSM_FFd1_SPECSIG"]="GND";
-          d2["iobmBG_SPECSIG"]=new Array("FB1_15_1");
-          
-            d2imp["iobmBG_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmBG_SPECSIG"]=new Array("C16M");
-            
-          ce["iobmBG_SPECSIG"]=new Array("FB1_15_2");
-          
-            ceimp["iobmBG_SPECSIG"]=new Array("1");
-          prld["iobmBG_SPECSIG"]="GND";
-          d2["iobsIOU0_SPECSIG"]=new Array("FB1_16_1","FB1_16_2");
-          
-            d2imp["iobsIOU0_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobsIOU0_SPECSIG"]=new Array("FCLK");
-            
-          ce["iobsIOU0_SPECSIG"]=new Array("FB1_16_3");
-          
-            ceimp["iobsIOU0_SPECSIG"]=new Array("1");
-          prld["iobsIOU0_SPECSIG"]="GND";
-          d2["iobsIOL0_SPECSIG"]=new Array("FB1_17_1","FB1_17_2");
-          
-            d2imp["iobsIOL0_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobsIOL0_SPECSIG"]=new Array("FCLK");
-            
-          ce["iobsIOL0_SPECSIG"]=new Array("FB1_17_3");
-          
-            ceimp["iobsIOL0_SPECSIG"]=new Array("1");
-          prld["iobsIOL0_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("FB1_18_1","FB1_18_2","FB1_18_3");
-          
-            d2imp["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("1","1","1");
-          
-              gblclk["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("C16M");
-            prld["iobmIOS_FSM_FFd3_SPECSIG"]="GND";
-          d2["ramRegUrgentSync_SPECSIG"]=new Array("FB2_7_1");
+          d2["ramRegUrgentSync_SPECSIG"]=new Array("FB1_1_1");
           
             d2imp["ramRegUrgentSync_SPECSIG"]=new Array("1");
           
               gblclk["ramRegUrgentSync_SPECSIG"]=new Array("FCLK");
             prld["ramRegUrgentSync_SPECSIG"]="GND";
-          d2["ramRefUrgent_SPECSIG"]=new Array("FB2_8_1");
+          d2["ramRefUrgent_SPECSIG"]=new Array("FB1_2_1");
           
             d2imp["ramRefUrgent_SPECSIG"]=new Array("1");
           
               gblclk["ramRefUrgent_SPECSIG"]=new Array("FCLK");
             prld["ramRefUrgent_SPECSIG"]="GND";
-          d2["ramRefReqSync_SPECSIG"]=new Array("FB2_9_1");
+          d2["ramRefReqSync_SPECSIG"]=new Array("FB1_3_1");
           
             d2imp["ramRefReqSync_SPECSIG"]=new Array("1");
           
               gblclk["ramRefReqSync_SPECSIG"]=new Array("FCLK");
             prld["ramRefReqSync_SPECSIG"]="GND";
-          d2["ramRefReq_SPECSIG"]=new Array("FB2_10_1");
+          d2["ramRefReq_SPECSIG"]=new Array("FB1_4_1");
           
             d2imp["ramRefReq_SPECSIG"]=new Array("1");
           
               gblclk["ramRefReq_SPECSIG"]=new Array("FCLK");
             prld["ramRefReq_SPECSIG"]="GND";
-          d2["ramRefRAS_SPECSIG"]=new Array("FB2_11_1");
+          d2["ramRefRAS_SPECSIG"]=new Array("FB1_5_1");
           
             d2imp["ramRefRAS_SPECSIG"]=new Array("1");
           
               gblclk["ramRefRAS_SPECSIG"]=new Array("FCLK");
             prld["ramRefRAS_SPECSIG"]="GND";
-          d2["ramBACTr_SPECSIG"]=new Array("FB2_12_1");
-          
-            d2imp["ramBACTr_SPECSIG"]=new Array("1");
-          
-              gblclk["ramBACTr_SPECSIG"]=new Array("FCLK");
-            prld["ramBACTr_SPECSIG"]="GND";
-          d2["iobsIOACTr_SPECSIG"]=new Array("FB2_13_1");
+          d2["iobsIOACTr_SPECSIG"]=new Array("FB1_6_1");
           
             d2imp["iobsIOACTr_SPECSIG"]=new Array("1");
           
               gblclk["iobsIOACTr_SPECSIG"]=new Array("FCLK");
             prld["iobsIOACTr_SPECSIG"]="GND";
-          d2["iobsALE0_SPECSIG"]=new Array("FB2_14_1");
-          
-            d2imp["iobsALE0_SPECSIG"]=new Array("1");
-          
-              gblclk["iobsALE0_SPECSIG"]=new Array("FCLK");
-            prld["iobsALE0_SPECSIG"]="GND";
-          d2["fsbASrf_SPECSIG"]=new Array("FB2_15_1");
+          d2["fsbASrf_SPECSIG"]=new Array("FB1_7_1");
           
             d2imp["fsbASrf_SPECSIG"]=new Array("1");
           clkNegs["fsbASrf_SPECSIG"]=1;
               gblclk["fsbASrf_SPECSIG"]=new Array("FCLK");
             prld["fsbASrf_SPECSIG"]="GND";
-          d2["iobsPS_FSM_FFd1_SPECSIG"]=new Array("FB2_16_1","FB2_16_2");
-          
-            d2imp["iobsPS_FSM_FFd1_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobsPS_FSM_FFd1_SPECSIG"]=new Array("FCLK");
-            prld["iobsPS_FSM_FFd1_SPECSIG"]="GND";
-          d2["iobsIOU1_SPECSIG"]=new Array("FB2_17_1");
+          d2["iobsIOU1_SPECSIG"]=new Array("FB1_8_1");
           
             d2imp["iobsIOU1_SPECSIG"]=new Array("1");
           
               gblclk["iobsIOU1_SPECSIG"]=new Array("FCLK");
             
-          ce["iobsIOU1_SPECSIG"]=new Array("FB2_17_2");
+          ce["iobsIOU1_SPECSIG"]=new Array("FB1_8_2");
           
             ceimp["iobsIOU1_SPECSIG"]=new Array("1");
           prld["iobsIOU1_SPECSIG"]="GND";
-          d2["iobsIOL1_SPECSIG"]=new Array("FB2_18_1");
+          d2["iobsIOL1_SPECSIG"]=new Array("FB1_9_1");
           
             d2imp["iobsIOL1_SPECSIG"]=new Array("1");
           
               gblclk["iobsIOL1_SPECSIG"]=new Array("FCLK");
             
-          ce["iobsIOL1_SPECSIG"]=new Array("FB2_18_2");
+          ce["iobsIOL1_SPECSIG"]=new Array("FB1_9_2");
           
             ceimp["iobsIOL1_SPECSIG"]=new Array("1");
           prld["iobsIOL1_SPECSIG"]="GND";
-          d2["fsbVPA_SPECSIG"]=new Array("FB3_2_1","FB3_2_2","FB3_2_3","FB3_2_4","FB3_2_5","FB3_1_1","FB3_1_2","FB3_1_3","FB3_1_4","FB3_1_5","FB3_18_1","FB3_18_2","FB3_18_3","FB3_18_4","FB3_18_5","FB3_3_1","FB3_3_2","FB3_3_3","FB3_3_4","FB3_3_5");
+          d2["cntTimerTC_SPECSIG"]=new Array("FB1_10_1");
           
-            d2imp["fsbVPA_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["cntTimerTC_SPECSIG"]=new Array("1");
           
-              gblclk["fsbVPA_SPECSIG"]=new Array("FCLK");
-            prld["fsbVPA_SPECSIG"]="GND";
-          d2["iobsClear1_SPECSIG"]=new Array("FB3_5_1");
+              clk["cntTimerTC_SPECSIG"]=new Array("FB1_10_2");
+              
+                clkimp["cntTimerTC_SPECSIG"]=new Array("1");
+              prld["cntTimerTC_SPECSIG"]="GND";
+          d2["iobsIOU0_SPECSIG"]=new Array("FB1_11_1","FB1_11_2");
           
-            d2imp["iobsClear1_SPECSIG"]=new Array("1");
+            d2imp["iobsIOU0_SPECSIG"]=new Array("1","1");
           
-              gblclk["iobsClear1_SPECSIG"]=new Array("FCLK");
-            prld["iobsClear1_SPECSIG"]="GND";
-          d2["fsbReady0r_SPECSIG"]=new Array("FB3_6_1","FB3_6_2","FB3_5_2");
+              gblclk["iobsIOU0_SPECSIG"]=new Array("FCLK");
+            
+          ce["iobsIOU0_SPECSIG"]=new Array("FB1_11_3");
           
-            d2imp["fsbReady0r_SPECSIG"]=new Array("1","1","1");
+            ceimp["iobsIOU0_SPECSIG"]=new Array("1");
+          prld["iobsIOU0_SPECSIG"]="GND";
+          d2["iobsIOL0_SPECSIG"]=new Array("FB1_12_1","FB1_12_2");
           
-              gblclk["fsbReady0r_SPECSIG"]=new Array("FCLK");
-            prld["fsbReady0r_SPECSIG"]="GND";
-          d2["iobsIOReady_SPECSIG"]=new Array("FB3_7_1","FB3_6_3","FB3_6_4","FB3_6_5");
+            d2imp["iobsIOL0_SPECSIG"]=new Array("1","1");
+          
+              gblclk["iobsIOL0_SPECSIG"]=new Array("FCLK");
+            
+          ce["iobsIOL0_SPECSIG"]=new Array("FB1_12_3");
+          
+            ceimp["iobsIOL0_SPECSIG"]=new Array("1");
+          prld["iobsIOL0_SPECSIG"]="GND";
+          d2["cntTimer3_SPECSIG"]=new Array("FB1_13_1","FB1_13_2");
+          
+            d2imp["cntTimer3_SPECSIG"]=new Array("1","1");
+          
+              clk["cntTimer3_SPECSIG"]=new Array("FB1_13_3");
+              
+                clkimp["cntTimer3_SPECSIG"]=new Array("1");
+              prld["cntTimer3_SPECSIG"]="GND";
+          d2["cntTimer2_SPECSIG"]=new Array("FB1_14_1","FB1_14_2");
+          
+            d2imp["cntTimer2_SPECSIG"]=new Array("1","1");
+          
+              clk["cntTimer2_SPECSIG"]=new Array("FB1_14_3");
+              
+                clkimp["cntTimer2_SPECSIG"]=new Array("1");
+              prld["cntTimer2_SPECSIG"]="GND";
+          d2["cntTimer1_SPECSIG"]=new Array("FB1_15_1","FB1_15_2");
+          
+            d2imp["cntTimer1_SPECSIG"]=new Array("1","1");
+          
+              clk["cntTimer1_SPECSIG"]=new Array("FB1_15_3");
+              
+                clkimp["cntTimer1_SPECSIG"]=new Array("1");
+              prld["cntTimer1_SPECSIG"]="GND";
+          d2["cntRefUrgent_SPECSIG"]=new Array("FB1_16_1","FB1_16_2");
+          
+            d2imp["cntRefUrgent_SPECSIG"]=new Array("1","1");
+          
+              clk["cntRefUrgent_SPECSIG"]=new Array("FB1_16_3");
+              
+                clkimp["cntRefUrgent_SPECSIG"]=new Array("1");
+              prld["cntRefUrgent_SPECSIG"]="GND";
+          d2["iobsIOReady_SPECSIG"]=new Array("FB1_17_1","FB1_17_2","FB1_17_3","FB1_17_4");
           
             d2imp["iobsIOReady_SPECSIG"]=new Array("1","1","1","1");
           
               gblclk["iobsIOReady_SPECSIG"]=new Array("FCLK");
             prld["iobsIOReady_SPECSIG"]="GND";
-          d2["nDTACK_FSB"]=new Array("FB3_9_1","FB3_9_2","FB3_8_1","FB3_8_2","FB3_8_3","FB3_8_4","FB3_8_5","FB3_7_2","FB3_7_3","FB3_7_4","FB3_7_5");
+          d2["cntRefReq_SPECSIG"]=new Array("FB1_18_1","FB1_18_2","FB1_18_3");
           
-            d2imp["nDTACK_FSB"]=new Array("1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["cntRefReq_SPECSIG"]=new Array("1","1","1");
+          
+              clk["cntRefReq_SPECSIG"]=new Array("FB1_18_4");
+              
+                clkimp["cntRefReq_SPECSIG"]=new Array("1");
+              prld["cntRefReq_SPECSIG"]="GND";
+          d2["iobmVPArr_SPECSIG"]=new Array("FB2_9_1");
+          
+            d2imp["iobmVPArr_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmVPArr_SPECSIG"]=new Array("C16M");
+            prld["iobmVPArr_SPECSIG"]="GND";
+          d2["iobmVPArf_SPECSIG"]=new Array("FB2_10_1");
+          
+            d2imp["iobmVPArf_SPECSIG"]=new Array("1");
+          clkNegs["iobmVPArf_SPECSIG"]=1;
+              gblclk["iobmVPArf_SPECSIG"]=new Array("C16M");
+            prld["iobmVPArf_SPECSIG"]="GND";
+          d2["iobmRESrr_SPECSIG"]=new Array("FB2_11_1");
+          
+            d2imp["iobmRESrr_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmRESrr_SPECSIG"]=new Array("C16M");
+            prld["iobmRESrr_SPECSIG"]="GND";
+          d2["iobmRESrf_SPECSIG"]=new Array("FB2_12_1");
+          
+            d2imp["iobmRESrf_SPECSIG"]=new Array("1");
+          clkNegs["iobmRESrf_SPECSIG"]=1;
+              gblclk["iobmRESrf_SPECSIG"]=new Array("C16M");
+            prld["iobmRESrf_SPECSIG"]="GND";
+          d2["iobmIOREQr_SPECSIG"]=new Array("FB2_13_1");
+          
+            d2imp["iobmIOREQr_SPECSIG"]=new Array("1");
+          clkNegs["iobmIOREQr_SPECSIG"]=1;
+              gblclk["iobmIOREQr_SPECSIG"]=new Array("C16M");
+            prld["iobmIOREQr_SPECSIG"]="GND";
+          d2["iobmEr2_SPECSIG"]=new Array("FB2_14_1");
+          
+            d2imp["iobmEr2_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmEr2_SPECSIG"]=new Array("C16M");
+            prld["iobmEr2_SPECSIG"]="GND";
+          d2["iobmEr_SPECSIG"]=new Array("FB2_15_1");
+          
+            d2imp["iobmEr_SPECSIG"]=new Array("1");
+          clkNegs["iobmEr_SPECSIG"]=1;
+              gblclk["iobmEr_SPECSIG"]=new Array("C8M");
+            prld["iobmEr_SPECSIG"]="GND";
+          d2["iobmDTACKrr_SPECSIG"]=new Array("FB2_16_1");
+          
+            d2imp["iobmDTACKrr_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmDTACKrr_SPECSIG"]=new Array("C16M");
+            prld["iobmDTACKrr_SPECSIG"]="GND";
+          d2["iobmDTACKrf_SPECSIG"]=new Array("FB2_17_1");
+          
+            d2imp["iobmDTACKrf_SPECSIG"]=new Array("1");
+          clkNegs["iobmDTACKrf_SPECSIG"]=1;
+              gblclk["iobmDTACKrf_SPECSIG"]=new Array("C16M");
+            prld["iobmDTACKrf_SPECSIG"]="GND";
+          d2["cntTimer0_SPECSIG"]=new Array("FB2_18_1");
+          
+            d2imp["cntTimer0_SPECSIG"]=new Array("1");
+          
+              clk["cntTimer0_SPECSIG"]=new Array("FB2_18_2");
+              
+                clkimp["cntTimer0_SPECSIG"]=new Array("1");
+              prld["cntTimer0_SPECSIG"]="GND";
+          d2["fsbVPA_SPECSIG"]=new Array("FB3_1_1","FB3_1_2","FB3_1_3","FB3_1_4","FB3_1_5","FB3_2_1","FB3_2_2","FB3_2_3","FB3_2_4","FB3_2_5","FB3_3_1","FB3_3_2","FB3_3_3","FB3_18_1","FB3_18_2","FB3_18_3","FB3_18_4","FB3_18_5");
+          
+            d2imp["fsbVPA_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+          
+              gblclk["fsbVPA_SPECSIG"]=new Array("FCLK");
+            prld["fsbVPA_SPECSIG"]="GND";
+          d2["iobsIOREQ_SPECSIG"]=new Array("FB3_7_1","FB3_7_2","FB3_7_3","FB3_6_1","FB3_6_2","FB3_6_3","FB3_6_4","FB3_6_5","FB3_5_1","FB3_5_2","FB3_5_3","FB3_5_4","FB3_5_5");
+          
+            d2imp["iobsIOREQ_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1");
+          
+              gblclk["iobsIOREQ_SPECSIG"]=new Array("FCLK");
+            prld["iobsIOREQ_SPECSIG"]="GND";
+          d2["nDTACK_FSB"]=new Array("FB3_9_1","FB3_9_2","FB3_9_3","FB3_8_1","FB3_8_2","FB3_8_3","FB3_8_4","FB3_8_5","FB3_7_4","FB3_7_5");
+          
+            d2imp["nDTACK_FSB"]=new Array("1","1","1","1","1","1","1","1","1","1");
           
               gblclk["nDTACK_FSB"]=new Array("FCLK");
             prld["nDTACK_FSB"]="GND";
-          d2["fsbReady1r_SPECSIG"]=new Array("FB3_10_1","FB3_10_2","FB3_10_3","FB3_10_4","FB3_9_3","FB3_9_4","FB3_9_5");
+          d2["fsbReady1r_SPECSIG"]=new Array("FB3_10_1","FB3_10_2","FB3_10_3","FB3_10_4","FB3_9_4","FB3_9_5");
           
-            d2imp["fsbReady1r_SPECSIG"]=new Array("1","1","1","1","1","1","1");
+            d2imp["fsbReady1r_SPECSIG"]=new Array("1","1","1","1","1","1");
           
               gblclk["fsbReady1r_SPECSIG"]=new Array("FCLK");
             prld["fsbReady1r_SPECSIG"]="GND";
@@ -1378,9 +1336,9 @@
           
               gblclk["iobsIORW1_SPECSIG"]=new Array("FCLK");
             prld["iobsIORW1_SPECSIG"]="GND";
-          d2["iobsIORW0_SPECSIG"]=new Array("FB3_15_1","FB3_15_2","FB3_15_3","FB3_15_4","FB3_15_5","FB3_14_1","FB3_14_2","FB3_14_3","FB3_14_4","FB3_14_5","FB3_16_1","FB3_16_2","FB3_16_3","FB3_16_4","FB3_16_5","FB3_17_2","FB3_17_3","FB3_17_4");
+          d2["iobsIORW0_SPECSIG"]=new Array("FB3_15_1","FB3_15_2","FB3_15_3","FB3_15_4","FB3_15_5","FB3_14_1","FB3_14_2","FB3_14_3","FB3_14_4","FB3_14_5","FB3_16_1","FB3_16_2","FB3_16_3","FB3_16_4","FB3_16_5","FB3_17_2","FB3_17_3");
           
-            d2imp["iobsIORW0_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["iobsIORW0_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
               gblclk["iobsIORW0_SPECSIG"]=new Array("FCLK");
             prld["iobsIORW0_SPECSIG"]="GND";
@@ -1388,48 +1346,38 @@
           
             d2imp["nROMWE"]=new Array("1");
           
-          d2["cntnRESout_SPECSIG"]=new Array("FB4_1_1","FB4_1_2");
-          
-            d2imp["cntnRESout_SPECSIG"]=new Array("1","1");
-          clkNegs["cntnRESout_SPECSIG"]=1;
-              gblclk["cntnRESout_SPECSIG"]=new Array("C8M");
-            prld["cntnRESout_SPECSIG"]="GND";
           d2["nAoutOE"]=new Array("FB4_2_1");
           
             d2imp["nAoutOE"]=new Array("1");
           clkNegs["nAoutOE"]=1;
               gblclk["nAoutOE"]=new Array("C8M");
-            prld["nAoutOE"]="GND";
-          d2["cntTimerTC_SPECSIG"]=new Array("FB4_3_1");
+            prld["nAoutOE"]="VCC";
+          d2["iobmBERRrr_SPECSIG"]=new Array("FB4_3_1");
           
-            d2imp["cntTimerTC_SPECSIG"]=new Array("1");
+            d2imp["iobmBERRrr_SPECSIG"]=new Array("1");
           
-              clk["cntTimerTC_SPECSIG"]=new Array("FB4_3_2");
-              
-                clkimp["cntTimerTC_SPECSIG"]=new Array("1");
-              prld["cntTimerTC_SPECSIG"]="GND";
-          d2["cntTimer0_SPECSIG"]=new Array("FB4_4_1");
+              gblclk["iobmBERRrr_SPECSIG"]=new Array("C16M");
+            prld["iobmBERRrr_SPECSIG"]="GND";
+          d2["iobmBERRrf_SPECSIG"]=new Array("FB4_4_1");
           
-            d2imp["cntTimer0_SPECSIG"]=new Array("1");
-          
-              clk["cntTimer0_SPECSIG"]=new Array("FB4_4_2");
-              
-                clkimp["cntTimer0_SPECSIG"]=new Array("1");
-              prld["cntTimer0_SPECSIG"]="GND";
+            d2imp["iobmBERRrf_SPECSIG"]=new Array("1");
+          clkNegs["iobmBERRrf_SPECSIG"]=1;
+              gblclk["iobmBERRrf_SPECSIG"]=new Array("C16M");
+            prld["iobmBERRrf_SPECSIG"]="GND";
           d2["nDoutOE"]=new Array("FB4_5_1");
           
             d2imp["nDoutOE"]=new Array("1");
           
-          d2["nDinOE"]=new Array("FB4_6_1","FB4_6_2");
+          d2["nDinOE"]=new Array("FB4_6_1","FB4_6_2","FB4_6_3");
           
-            d2imp["nDinOE"]=new Array("1","1");
+            d2imp["nDinOE"]=new Array("1","1","1");
           
-          d2["cntPORS_FSM_FFd2_SPECSIG"]=new Array("FB4_7_1","FB4_7_2");
+          d2["cntPORS_FSM_FFd1_SPECSIG"]=new Array("FB4_7_1");
           
-            d2imp["cntPORS_FSM_FFd2_SPECSIG"]=new Array("1","1");
-          clkNegs["cntPORS_FSM_FFd2_SPECSIG"]=1;
-              gblclk["cntPORS_FSM_FFd2_SPECSIG"]=new Array("C8M");
-            prld["cntPORS_FSM_FFd2_SPECSIG"]="GND";
+            d2imp["cntPORS_FSM_FFd1_SPECSIG"]=new Array("1");
+          clkNegs["cntPORS_FSM_FFd1_SPECSIG"]=1;
+              gblclk["cntPORS_FSM_FFd1_SPECSIG"]=new Array("C8M");
+            prld["cntPORS_FSM_FFd1_SPECSIG"]="GND";
           d2["nRES"]=new Array("GND");
           
             d2imp["nRES"]=new Array("1");
@@ -1438,90 +1386,80 @@
               
                 trstimp["nRES"]=new Array("1");
               
-          d2["cntLTimer0_SPECSIG"]=new Array("FB4_9_1");
+          d2["cntIPL2r_SPECSIG"]=new Array("FB4_9_1");
+          
+            d2imp["cntIPL2r_SPECSIG"]=new Array("1");
+          clkNegs["cntIPL2r_SPECSIG"]=1;
+              gblclk["cntIPL2r_SPECSIG"]=new Array("C8M");
+            prld["cntIPL2r_SPECSIG"]="GND";
+          d2["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("FB4_10_1","FB4_10_2");
+          
+            d2imp["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("1","1");
+          
+              gblclk["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("C16M");
+            prld["iobmIOS_FSM_FFd1_SPECSIG"]="GND";
+          d2["nVPA_FSB"]=new Array("FB4_11_1");
+          
+            d2imp["nVPA_FSB"]=new Array("1");
+          
+          d2["cntnRESout_SPECSIG"]=new Array("FB4_12_1","FB4_12_2");
+          
+            d2imp["cntnRESout_SPECSIG"]=new Array("1","1");
+          clkNegs["cntnRESout_SPECSIG"]=1;
+              gblclk["cntnRESout_SPECSIG"]=new Array("C8M");
+            prld["cntnRESout_SPECSIG"]="GND";
+          d2["cntPORS_FSM_FFd2_SPECSIG"]=new Array("FB4_13_1","FB4_13_2");
+          
+            d2imp["cntPORS_FSM_FFd2_SPECSIG"]=new Array("1","1");
+          clkNegs["cntPORS_FSM_FFd2_SPECSIG"]=1;
+              gblclk["cntPORS_FSM_FFd2_SPECSIG"]=new Array("C8M");
+            prld["cntPORS_FSM_FFd2_SPECSIG"]="GND";
+          d2["cntLTimer0_SPECSIG"]=new Array("FB4_14_1");
           
             d2imp["cntLTimer0_SPECSIG"]=new Array("1");
           clkNegs["cntLTimer0_SPECSIG"]=1;
               gblclk["cntLTimer0_SPECSIG"]=new Array("C8M");
             
-          ce["cntLTimer0_SPECSIG"]=new Array("FB4_9_2");
+          ce["cntLTimer0_SPECSIG"]=new Array("FB4_14_2");
           
             ceimp["cntLTimer0_SPECSIG"]=new Array("1");
           prld["cntLTimer0_SPECSIG"]="GND";
-          d2["cntTimer3_SPECSIG"]=new Array("FB4_10_1","FB4_10_2");
-          
-            d2imp["cntTimer3_SPECSIG"]=new Array("1","1");
-          
-              clk["cntTimer3_SPECSIG"]=new Array("FB4_10_3");
-              
-                clkimp["cntTimer3_SPECSIG"]=new Array("1");
-              prld["cntTimer3_SPECSIG"]="GND";
-          d2["nVPA_FSB"]=new Array("FB4_11_1");
-          
-            d2imp["nVPA_FSB"]=new Array("1");
-          
-          d2["cntTimer2_SPECSIG"]=new Array("FB4_12_1","FB4_12_2");
-          
-            d2imp["cntTimer2_SPECSIG"]=new Array("1","1");
-          
-              clk["cntTimer2_SPECSIG"]=new Array("FB4_12_3");
-              
-                clkimp["cntTimer2_SPECSIG"]=new Array("1");
-              prld["cntTimer2_SPECSIG"]="GND";
-          d2["cntTimer1_SPECSIG"]=new Array("FB4_13_1","FB4_13_2");
-          
-            d2imp["cntTimer1_SPECSIG"]=new Array("1","1");
-          
-              clk["cntTimer1_SPECSIG"]=new Array("FB4_13_3");
-              
-                clkimp["cntTimer1_SPECSIG"]=new Array("1");
-              prld["cntTimer1_SPECSIG"]="GND";
-          d2["cntRefUrgent_SPECSIG"]=new Array("FB4_14_1","FB4_14_2");
-          
-            d2imp["cntRefUrgent_SPECSIG"]=new Array("1","1");
-          
-              clk["cntRefUrgent_SPECSIG"]=new Array("FB4_14_3");
-              
-                clkimp["cntRefUrgent_SPECSIG"]=new Array("1");
-              prld["cntRefUrgent_SPECSIG"]="GND";
-          d2["cntRefReq_SPECSIG"]=new Array("FB4_15_1","FB4_15_2","FB4_15_3");
-          
-            d2imp["cntRefReq_SPECSIG"]=new Array("1","1","1");
-          
-              clk["cntRefReq_SPECSIG"]=new Array("FB4_15_4");
-              
-                clkimp["cntRefReq_SPECSIG"]=new Array("1");
-              prld["cntRefReq_SPECSIG"]="GND";
-          d2["cntLTimer3_SPECSIG"]=new Array("FB4_16_1","FB4_16_2","FB4_16_3");
+          d2["cntLTimer3_SPECSIG"]=new Array("FB4_15_1","FB4_15_2","FB4_15_3");
           
             d2imp["cntLTimer3_SPECSIG"]=new Array("1","1","1");
           clkNegs["cntLTimer3_SPECSIG"]=1;
               gblclk["cntLTimer3_SPECSIG"]=new Array("C8M");
             
-          ce["cntLTimer3_SPECSIG"]=new Array("FB4_16_4");
+          ce["cntLTimer3_SPECSIG"]=new Array("FB4_15_4");
           
             ceimp["cntLTimer3_SPECSIG"]=new Array("1");
           prld["cntLTimer3_SPECSIG"]="GND";
-          d2["cntLTimer2_SPECSIG"]=new Array("FB4_17_1","FB4_17_2","FB4_17_3");
+          d2["cntLTimer2_SPECSIG"]=new Array("FB4_16_1","FB4_16_2","FB4_16_3");
           
             d2imp["cntLTimer2_SPECSIG"]=new Array("1","1","1");
           clkNegs["cntLTimer2_SPECSIG"]=1;
               gblclk["cntLTimer2_SPECSIG"]=new Array("C8M");
             
-          ce["cntLTimer2_SPECSIG"]=new Array("FB4_17_4");
+          ce["cntLTimer2_SPECSIG"]=new Array("FB4_16_4");
           
             ceimp["cntLTimer2_SPECSIG"]=new Array("1");
           prld["cntLTimer2_SPECSIG"]="GND";
-          d2["cntLTimer1_SPECSIG"]=new Array("FB4_18_1","FB4_18_2","FB4_18_3");
+          d2["cntLTimer1_SPECSIG"]=new Array("FB4_17_1","FB4_17_2","FB4_17_3");
           
             d2imp["cntLTimer1_SPECSIG"]=new Array("1","1","1");
           clkNegs["cntLTimer1_SPECSIG"]=1;
               gblclk["cntLTimer1_SPECSIG"]=new Array("C8M");
             
-          ce["cntLTimer1_SPECSIG"]=new Array("FB4_18_4");
+          ce["cntLTimer1_SPECSIG"]=new Array("FB4_17_4");
           
             ceimp["cntLTimer1_SPECSIG"]=new Array("1");
           prld["cntLTimer1_SPECSIG"]="GND";
+          d2["iobmIOBERR_SPECSIG"]=new Array("FB4_18_1","FB4_18_2","FB4_18_3","FB4_18_4","FB4_18_5","FB4_1_1","FB4_1_2","FB4_1_3","FB4_17_5");
+          
+            d2imp["iobmIOBERR_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1");
+          
+              gblclk["iobmIOBERR_SPECSIG"]=new Array("C16M");
+            prld["iobmIOBERR_SPECSIG"]="GND";
           d2["ramRASEL_SPECSIG"]=new Array("FB5_1_1","FB5_1_2","FB5_1_3","FB5_1_4","FB5_1_5","FB5_2_1","FB5_2_2","FB5_2_3","FB5_2_4","FB5_2_5","FB5_18_1","FB5_18_2","FB5_18_3","FB5_18_4","FB5_18_5","FB5_17_4","FB5_17_5");
           
             d2imp["ramRASEL_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
@@ -1558,12 +1496,12 @@
           
             d2imp["nOE"]=new Array("1");
           
-          d2["ramRS_FSM_FFd1_SPECSIG"]=new Array("FB5_7_1","FB5_7_2","FB5_7_3","FB5_7_4","FB5_7_5","FB5_6_2","FB5_6_3","FB5_6_4");
+          d2["fsbReady0r_SPECSIG"]=new Array("FB5_7_1","FB5_7_2","FB5_7_3");
           
-            d2imp["ramRS_FSM_FFd1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1");
+            d2imp["fsbReady0r_SPECSIG"]=new Array("1","1","1");
           
-              gblclk["ramRS_FSM_FFd1_SPECSIG"]=new Array("FCLK");
-            prld["ramRS_FSM_FFd1_SPECSIG"]="GND";
+              gblclk["fsbReady0r_SPECSIG"]=new Array("FCLK");
+            prld["fsbReady0r_SPECSIG"]="GND";
           d2["csnOverlay0_SPECSIG"]=new Array("FB5_8_1","FB5_8_2");
           
             d2imp["csnOverlay0_SPECSIG"]=new Array("1","1");
@@ -1640,30 +1578,30 @@
           
               gblclk["iobmALE0_SPECSIG"]=new Array("C16M");
             prld["iobmALE0_SPECSIG"]="GND";
-          d2["iobmES3_SPECSIG"]=new Array("FB6_5_1","FB6_5_2","FB6_5_3");
+          d2["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("FB6_5_1","FB6_5_2","FB6_5_3");
+          
+            d2imp["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("1","1","1");
+          
+              gblclk["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("C16M");
+            prld["iobmIOS_FSM_FFd3_SPECSIG"]="GND";
+          d2["iobmES3_SPECSIG"]=new Array("FB6_6_1","FB6_6_2","FB6_6_3");
           
             d2imp["iobmES3_SPECSIG"]=new Array("1","1","1");
           
               gblclk["iobmES3_SPECSIG"]=new Array("C16M");
             prld["iobmES3_SPECSIG"]="GND";
-          d2["iobmES1_SPECSIG"]=new Array("FB6_6_1","FB6_6_2","FB6_6_3");
+          d2["iobmES1_SPECSIG"]=new Array("FB6_7_1","FB6_7_2","FB6_7_3");
           
             d2imp["iobmES1_SPECSIG"]=new Array("1","1","1");
           
               gblclk["iobmES1_SPECSIG"]=new Array("C16M");
             prld["iobmES1_SPECSIG"]="GND";
-          d2["iobmES0_SPECSIG"]=new Array("FB6_7_1","FB6_7_2","FB6_7_3");
+          d2["iobmES0_SPECSIG"]=new Array("FB6_8_1","FB6_8_2","FB6_8_3");
           
             d2imp["iobmES0_SPECSIG"]=new Array("1","1","1");
           
               gblclk["iobmES0_SPECSIG"]=new Array("C16M");
             prld["iobmES0_SPECSIG"]="GND";
-          d2["iobmES4_SPECSIG"]=new Array("FB6_8_1","FB6_8_2","FB6_8_3","FB6_8_4");
-          
-            d2imp["iobmES4_SPECSIG"]=new Array("1","1","1","1");
-          
-              gblclk["iobmES4_SPECSIG"]=new Array("C16M");
-            prld["iobmES4_SPECSIG"]="GND";
           d2["nLDS_IOB"]=new Array("FB6_9_1","FB6_9_2","FB6_9_3");
           
             d2imp["nLDS_IOB"]=new Array("1","1","1");
@@ -1674,12 +1612,12 @@
               
                 trstimp["nLDS_IOB"]=new Array("1");
               prld["nLDS_IOB"]="GND";
-          d2["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("FB6_10_1","FB6_10_2","FB6_10_3","FB6_10_4","FB6_10_5");
+          d2["iobmES4_SPECSIG"]=new Array("FB6_10_1","FB6_10_2","FB6_10_3","FB6_10_4");
           
-            d2imp["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1");
+            d2imp["iobmES4_SPECSIG"]=new Array("1","1","1","1");
           
-              gblclk["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("C16M");
-            prld["iobmIOS_FSM_FFd2_SPECSIG"]="GND";
+              gblclk["iobmES4_SPECSIG"]=new Array("C16M");
+            prld["iobmES4_SPECSIG"]="GND";
           d2["nUDS_IOB"]=new Array("FB6_11_1","FB6_11_2","FB6_11_3");
           
             d2imp["nUDS_IOB"]=new Array("1","1","1");
@@ -1700,12 +1638,12 @@
               
                 trstimp["nAS_IOB"]=new Array("1");
               prld["nAS_IOB"]="GND";
-          d2["iobmES2_SPECSIG"]=new Array("FB6_13_1","FB6_13_2","FB6_13_3","FB6_13_4","FB6_13_5");
+          d2["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("FB6_13_1","FB6_13_2","FB6_13_3","FB6_13_4","FB6_13_5");
           
-            d2imp["iobmES2_SPECSIG"]=new Array("1","1","1","1","1");
+            d2imp["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1");
           
-              gblclk["iobmES2_SPECSIG"]=new Array("C16M");
-            prld["iobmES2_SPECSIG"]="GND";
+              gblclk["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("C16M");
+            prld["iobmIOS_FSM_FFd2_SPECSIG"]="GND";
           d2["nADoutLE1"]=new Array("FB6_14_1","FB6_14_2");
           
             d2imp["nADoutLE1"]=new Array("1","1");
@@ -1716,24 +1654,24 @@
           
             d2imp["nADoutLE0"]=new Array("1");
           
-          d2["iobmIOACT_SPECSIG"]=new Array("FB6_16_1","FB6_16_2","FB6_16_3","FB6_16_4","FB6_16_5","FB6_15_2");
+          d2["iobmES2_SPECSIG"]=new Array("FB6_16_1","FB6_16_2","FB6_16_3","FB6_16_4","FB6_16_5");
           
-            d2imp["iobmIOACT_SPECSIG"]=new Array("1","1","1","1","1","1");
+            d2imp["iobmES2_SPECSIG"]=new Array("1","1","1","1","1");
           
-              gblclk["iobmIOACT_SPECSIG"]=new Array("C16M");
-            prld["iobmIOACT_SPECSIG"]="GND";
+              gblclk["iobmES2_SPECSIG"]=new Array("C16M");
+            prld["iobmES2_SPECSIG"]="GND";
           d2["nDinLE"]=new Array("FB6_17_1");
           
             d2imp["nDinLE"]=new Array("1");
           clkNegs["nDinLE"]=1;
               gblclk["nDinLE"]=new Array("C16M");
             prld["nDinLE"]="GND";
-          d2["iobmIOBERR_SPECSIG"]=new Array("FB6_18_1","FB6_18_2","FB6_18_3","FB6_18_4","FB6_18_5","FB6_17_2","FB6_17_3","FB6_17_4","FB6_17_5");
+          d2["iobmIOACT_SPECSIG"]=new Array("FB6_18_1","FB6_18_2","FB6_18_3","FB6_18_4","FB6_18_5","FB6_17_2");
           
-            d2imp["iobmIOBERR_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1");
+            d2imp["iobmIOACT_SPECSIG"]=new Array("1","1","1","1","1","1");
           
-              gblclk["iobmIOBERR_SPECSIG"]=new Array("C16M");
-            prld["iobmIOBERR_SPECSIG"]="GND";
+              gblclk["iobmIOACT_SPECSIG"]=new Array("C16M");
+            prld["iobmIOACT_SPECSIG"]="GND";
           d2["cntLTimer13_SPECSIG"]=new Array("FB7_1_1","FB7_1_2");
           
             d2imp["cntLTimer13_SPECSIG"]=new Array("1","1");
@@ -1866,70 +1804,88 @@
           
             ceimp["cntLTimer10_SPECSIG"]=new Array("1");
           prld["cntLTimer10_SPECSIG"]="GND";
-          d2["cntPORS_FSM_FFd1_SPECSIG"]=new Array("FB8_1_1");
+          d2["iobsOnce_SPECSIG"]=new Array("FB8_1_1","FB8_1_2","FB8_1_3","FB8_1_4","FB8_1_5","FB8_2_1","FB8_2_2","FB8_2_3","FB8_2_4","FB8_2_5","FB8_18_1","FB8_18_2","FB8_18_3","FB8_18_4","FB8_18_5");
           
-            d2imp["cntPORS_FSM_FFd1_SPECSIG"]=new Array("1");
-          clkNegs["cntPORS_FSM_FFd1_SPECSIG"]=1;
-              gblclk["cntPORS_FSM_FFd1_SPECSIG"]=new Array("C8M");
-            prld["cntPORS_FSM_FFd1_SPECSIG"]="GND";
-          d2["RA11_SPECSIG"]=new Array("FB8_2_1");
+            d2imp["iobsOnce_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+          
+              gblclk["iobsOnce_SPECSIG"]=new Array("FCLK");
+            prld["iobsOnce_SPECSIG"]="GND";
+          d2["RA11_SPECSIG"]=new Array("FB8_3_2");
           
             d2imp["RA11_SPECSIG"]=new Array("1");
           
-          d2["ramRS_FSM_FFd3_SPECSIG"]=new Array("FB8_3_1","FB8_3_2","FB8_3_3","FB8_3_4","FB8_3_5","FB8_2_2","FB8_2_3","FB8_2_4","FB8_2_5");
+          d2["iobsClear1_SPECSIG"]=new Array("FB8_3_1");
+          
+            d2imp["iobsClear1_SPECSIG"]=new Array("1");
+          
+              gblclk["iobsClear1_SPECSIG"]=new Array("FCLK");
+            prld["iobsClear1_SPECSIG"]="GND";
+          d2["iobsALE0_SPECSIG"]=new Array("FB8_4_1");
+          
+            d2imp["iobsALE0_SPECSIG"]=new Array("1");
+          
+              gblclk["iobsALE0_SPECSIG"]=new Array("FCLK");
+            prld["iobsALE0_SPECSIG"]="GND";
+          d2["nRAS"]=new Array("FB8_5_1","FB8_5_2","FB8_5_3");
+          
+            d2imp["nRAS"]=new Array("1","1","1");
+          
+          d2["nRAMLWE"]=new Array("FB8_6_1");
+          
+            d2imp["nRAMLWE"]=new Array("1");
+          
+          d2["iobsPS_FSM_FFd1_SPECSIG"]=new Array("FB8_7_1","FB8_7_2");
+          
+            d2imp["iobsPS_FSM_FFd1_SPECSIG"]=new Array("1","1");
+          
+              gblclk["iobsPS_FSM_FFd1_SPECSIG"]=new Array("FCLK");
+            prld["iobsPS_FSM_FFd1_SPECSIG"]="GND";
+          d2["nRAMUWE"]=new Array("FB8_7_3");
+          
+            d2imp["nRAMUWE"]=new Array("1");
+          
+          d2["ramRS_FSM_FFd1_SPECSIG"]=new Array("FB8_9_1","FB8_9_2","FB8_9_3","FB8_8_1","FB8_8_2","FB8_8_3","FB8_8_4","FB8_8_5");
+          
+            d2imp["ramRS_FSM_FFd1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1");
+          
+              gblclk["ramRS_FSM_FFd1_SPECSIG"]=new Array("FCLK");
+            prld["ramRS_FSM_FFd1_SPECSIG"]="GND";
+          d2["ramRS_FSM_FFd3_SPECSIG"]=new Array("FB8_11_1","FB8_11_2","FB8_10_1","FB8_10_2","FB8_10_3","FB8_10_4","FB8_10_5","FB8_9_4","FB8_9_5");
           
             d2imp["ramRS_FSM_FFd3_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1");
           
               gblclk["ramRS_FSM_FFd3_SPECSIG"]=new Array("FCLK");
             prld["ramRS_FSM_FFd3_SPECSIG"]="GND";
-          d2["nRAS"]=new Array("FB8_5_1","FB8_5_2","FB8_5_3");
-          
-            d2imp["nRAS"]=new Array("1","1","1");
-          
-          d2["nRAMLWE"]=new Array("FB8_5_4");
-          
-            d2imp["nRAMLWE"]=new Array("1");
-          
-          d2["iobsPS_FSM_FFd2_SPECSIG"]=new Array("FB8_7_1","FB8_7_2","FB8_7_3","FB8_7_4","FB8_7_5","FB8_6_1","FB8_6_2","FB8_6_3","FB8_6_4","FB8_6_5","FB8_8_2","FB8_8_3","FB8_8_4","FB8_8_5");
-          
-            d2imp["iobsPS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["iobsPS_FSM_FFd2_SPECSIG"]=new Array("FCLK");
-            prld["iobsPS_FSM_FFd2_SPECSIG"]="GND";
-          d2["nRAMUWE"]=new Array("FB8_8_1");
-          
-            d2imp["nRAMUWE"]=new Array("1");
-          
-          d2["iobsLoad1_SPECSIG"]=new Array("FB8_10_1","FB8_10_2","FB8_10_3","FB8_10_4","FB8_10_5","FB8_9_1","FB8_9_2","FB8_9_3","FB8_9_4","FB8_11_1","FB8_11_2","FB8_11_3","FB8_11_4","FB8_11_5");
-          
-            d2imp["iobsLoad1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["iobsLoad1_SPECSIG"]=new Array("FCLK");
-            prld["iobsLoad1_SPECSIG"]="GND";
-          d2["nBERR_FSB"]=new Array("FB8_12_1","FB8_12_2","FB8_12_3","FB8_12_4");
+          d2["nBERR_FSB"]=new Array("FB8_12_1","FB8_11_3","FB8_11_4","FB8_11_5");
           
             d2imp["nBERR_FSB"]=new Array("1","1","1","1");
           
               gblclk["nBERR_FSB"]=new Array("FCLK");
             prld["nBERR_FSB"]="GND";
-          d2["iobsIOREQ_SPECSIG"]=new Array("FB8_14_1","FB8_14_2","FB8_14_3","FB8_14_4","FB8_14_5","FB8_13_1","FB8_13_2","FB8_13_3","FB8_13_4","FB8_13_5","FB8_12_5","FB8_15_3","FB8_15_4","FB8_15_5");
+          d2["iobsPS_FSM_FFd2_SPECSIG"]=new Array("FB8_14_1","FB8_14_2","FB8_14_3","FB8_13_1","FB8_13_2","FB8_13_3","FB8_13_4","FB8_13_5","FB8_12_2","FB8_12_3","FB8_12_4","FB8_12_5");
           
-            d2imp["iobsIOREQ_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["iobsPS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["iobsIOREQ_SPECSIG"]=new Array("FCLK");
-            prld["iobsIOREQ_SPECSIG"]="GND";
-          d2["nBR_IOB"]=new Array("FB8_15_1","FB8_15_2");
+              gblclk["iobsPS_FSM_FFd2_SPECSIG"]=new Array("FCLK");
+            prld["iobsPS_FSM_FFd2_SPECSIG"]="GND";
+          d2["nBR_IOB"]=new Array("FB8_14_4","FB8_14_5");
           
             d2imp["nBR_IOB"]=new Array("1","1");
           clkNegs["nBR_IOB"]=1;
               gblclk["nBR_IOB"]=new Array("C8M");
             prld["nBR_IOB"]="GND";
-          d2["iobsOnce_SPECSIG"]=new Array("FB8_17_1","FB8_17_2","FB8_17_3","FB8_17_4","FB8_17_5","FB8_16_1","FB8_16_2","FB8_16_3","FB8_16_4","FB8_16_5","FB8_18_1","FB8_18_2","FB8_18_3","FB8_18_4","FB8_18_5","FB8_1_2","FB8_1_3");
+          d2["iobsLoad1_SPECSIG"]=new Array("FB8_16_1","FB8_16_2","FB8_16_3","FB8_16_4","FB8_16_5","FB8_15_1","FB8_15_2","FB8_15_3","FB8_15_4","FB8_15_5","FB8_17_2","FB8_17_3","FB8_17_4","FB8_17_5");
           
-            d2imp["iobsOnce_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["iobsLoad1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["iobsOnce_SPECSIG"]=new Array("FCLK");
-            prld["iobsOnce_SPECSIG"]="GND";
+              gblclk["iobsLoad1_SPECSIG"]=new Array("FCLK");
+            prld["iobsLoad1_SPECSIG"]="GND";
+          d2["ramBACTr_SPECSIG"]=new Array("FB8_17_1");
+          
+            d2imp["ramBACTr_SPECSIG"]=new Array("1");
+          
+              gblclk["ramBACTr_SPECSIG"]=new Array("FCLK");
+            prld["ramBACTr_SPECSIG"]="GND";
 
       uimSignals = new Array();
 
diff --git a/cpld/XC95144XL/WarpSE_html/fit/errs.htm b/cpld/XC95144XL/WarpSE_html/fit/errs.htm
index 447feaa..bad2905 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/errs.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/errs.htm
@@ -5,11 +5,12 @@
 </head>
 <body class="pgBgnd" id="XC95144XL">
 <span id="error" class="pgRef"><h3 align="center">Errors and Warnings</h3>
-<b>There are 0 error(s), 4 warning(s), and 0 information.</b><br><br><table width="90%" border="1" cellpadding="0" cellspacing="0">
+<b>There are 0 error(s), 5 warning(s), and 0 information.</b><br><br><table width="90%" border="1" cellpadding="0" cellspacing="0">
 <tr><td>[Warning]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will   use the default filename of 'WarpSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'C16M' based upon the LOC   constraint 'P22'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'C8M' based upon the LOC   constraint 'P23'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'FCLK' based upon the LOC   constraint 'P27'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.</td></tr>
 <tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'SW&lt;1&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</td></tr>
 <tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'SW&lt;2&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</td></tr>
 <tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'SW&lt;3&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</td></tr>
+<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'nBG_IOB'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</td></tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs.htm
index c52e6e8..b0940f9 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs.htm
@@ -16,43 +16,43 @@
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB1');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">18 / 18</td>
-<td align="center">25 / 54</td>
-<td align="center">26 / 90</td>
+<td align="center">28 / 54</td>
+<td align="center">39 / 90</td>
 <td align="center">10 / 11</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB2');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">12 / 18</td>
-<td align="center">16 / 54</td>
-<td align="center">15 / 90</td>
+<td align="center">10 / 18</td>
+<td align="center">8 / 54</td>
+<td align="center">11 / 90</td>
 <td align="center">8 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB3');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">9 / 18</td>
-<td align="center">34 / 54</td>
+<td align="center">7 / 18</td>
+<td align="center">33 / 54</td>
 <td align="center">81 / 90</td>
 <td align="center">9 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB4');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">18 / 18</td>
-<td align="center">24 / 54</td>
-<td align="center">44 / 90</td>
+<td align="center">17 / 18</td>
+<td align="center">34 / 54</td>
+<td align="center">40 / 90</td>
 <td align="center">10 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB5');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">16 / 18</td>
-<td align="center">30 / 54</td>
-<td align="center">77 / 90</td>
+<td align="center">32 / 54</td>
+<td align="center">72 / 90</td>
 <td align="center">8 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB6');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">18 / 18</td>
-<td align="center">34 / 54</td>
-<td align="center">61 / 90</td>
+<td align="center">32 / 54</td>
+<td align="center">55 / 90</td>
 <td align="center">10 / 10</td>
 </tr>
 <tr>
@@ -64,10 +64,10 @@
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB8');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">12 / 18</td>
-<td align="center">34 / 54</td>
-<td align="center">81 / 90</td>
-<td align="center">7 / 10</td>
+<td align="center">15 / 18</td>
+<td align="center">33 / 54</td>
+<td align="center">75 / 90</td>
+<td align="center">6 / 10</td>
 </tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB1.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB1.htm
index fcb3872..2c17f39 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB1.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB1.htm
@@ -27,7 +27,7 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmnASr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/nASr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a>
 </td>
@@ -38,7 +38,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefUrgent</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a>
 </td>
@@ -49,7 +49,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;13&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
 </td>
@@ -60,7 +60,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;14&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReq</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
 </td>
@@ -71,7 +71,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRefRAS_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefRAS</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a>
 </td>
@@ -82,7 +82,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;15&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
 </td>
@@ -93,7 +93,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;16&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
 </td>
@@ -104,9 +104,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB1_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a>
 </td>
 <td align="center" width="10%">MC8</td>
 <td align="center" width="10%">STD</td>
@@ -115,9 +115,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;17&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB1_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
 </td>
 <td align="center" width="10%">MC9</td>
 <td align="center" width="10%">STD</td>
@@ -126,9 +126,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;18&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB1_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a>
 </td>
 <td align="center" width="10%">MC10</td>
 <td align="center" width="10%">STD</td>
@@ -137,9 +137,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOU0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU0</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB1_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB1_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a>
 </td>
 <td align="center" width="10%">MC11</td>
 <td align="center" width="10%">STD</td>
@@ -148,9 +148,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;19&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOL0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL0</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB1_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB1_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a>
 </td>
 <td align="center" width="10%">MC12</td>
 <td align="center" width="10%">STD</td>
@@ -159,9 +159,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;20&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB1_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB1_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a>
 </td>
 <td align="center" width="10%">MC13</td>
 <td align="center" width="10%">STD</td>
@@ -170,9 +170,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB1_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB1_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB1_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a>
 </td>
 <td align="center" width="10%">MC14</td>
 <td align="center" width="10%">STD</td>
@@ -181,9 +181,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;21&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmBG_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BG</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB1_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB1_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB1_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a>
 </td>
 <td align="center" width="10%">MC15</td>
 <td align="center" width="10%">STD</td>
@@ -192,7 +192,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;22&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOU0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU0</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></td>
 <td align="center" width="10%">3</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB1_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB1_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a>
 </td>
@@ -203,9 +203,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOL0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL0</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB1_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB1_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td align="center" width="10%">4</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB1_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB1_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB1_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a>
 </td>
 <td align="center" width="10%">MC17</td>
 <td align="center" width="10%">STD</td>
@@ -214,9 +214,9 @@
 <td align="center" width="10%">GCK</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB1_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB1_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></td>
+<td align="center" width="10%">4</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB1_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB1_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB1_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a>
 </td>
 <td align="center" width="10%">MC18</td>
 <td align="center" width="10%">STD</td>
@@ -227,31 +227,34 @@
 </table></span></div>
 <div id="tipBox"></div>
 <br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li>C8M</li>
 <li>E</li>
-<li>nRES.PIN</li>
-<li><a href="Javascript:showEqn('iobmBG_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BG</a></li>
-<li><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></li>
-<li><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
-<li><a href="Javascript:showEqn('iobmnASr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/nASr</a></li>
+<li><a href="Javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></li>
+<li><a href="Javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></li>
+<li><a href="Javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></li>
+<li><a href="Javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></li>
+<li><a href="Javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></li>
+<li><a href="Javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></li>
+<li><a href="Javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></li>
+<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
+<li><a href="Javascript:showEqn('iobmIOACT_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOACT</a></li>
+<li><a href="Javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></li>
+<li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
 <li><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></li>
-<li><a href="Javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></li>
+<li><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></li>
 <li><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></li>
+<li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
+<li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
 <li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
-<li><a href="Javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></li>
-<li><a href="Javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></li>
-<li>nBERR_IOB</li>
-<li>nBG_IOB</li>
-<li>nDTACK_IOB</li>
-<li>nIPL2</li>
+<li>nAS_FSB</li>
 <li>nLDS_FSB</li>
 <li>nUDS_FSB</li>
-<li>nVPA_IOB</li>
+<li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
+<li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
+<li><a href="Javascript:showEqn('ramRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefDone</a></li>
+<li><a href="Javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></li>
+<li><a href="Javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center"><input type="button" onclick="javascript:showFB('FB2')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next"></td></tr></table></td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB2.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB2.htm
index b41fd35..806508e 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB2.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB2.htm
@@ -87,29 +87,27 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;5&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC7</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
+<td align="center" width="10%"> </td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefUrgent</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC8</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%">3</td>
 <td width="8%" align="center">I/O/GTS1</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;6&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
 </td>
@@ -120,7 +118,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;7&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReq</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a>
 </td>
@@ -131,7 +129,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRefRAS_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefRAS</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a>
 </td>
@@ -142,7 +140,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;8&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
 </td>
@@ -153,7 +151,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;9&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a>
 </td>
@@ -164,7 +162,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a>
 </td>
@@ -175,7 +173,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;10&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a>
 </td>
@@ -186,9 +184,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;11&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB2_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a>
 </td>
 <td align="center" width="10%">MC16</td>
 <td align="center" width="10%">STD</td>
@@ -197,9 +195,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB2_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a>
 </td>
 <td align="center" width="10%">MC17</td>
 <td align="center" width="10%">STD</td>
@@ -208,7 +206,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;12&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></td>
 <td align="center" width="10%">2</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB2_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a>
 </td>
@@ -221,22 +219,14 @@
 </table></span></div>
 <div id="tipBox"></div>
 <br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li><a href="Javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></li>
-<li><a href="Javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></li>
-<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('iobmIOACT_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOACT</a></li>
-<li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
-<li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
-<li>nAS_FSB</li>
-<li>nLDS_FSB</li>
-<li>nUDS_FSB</li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('ramRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefDone</a></li>
-<li><a href="Javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></li>
-<li><a href="Javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></li>
+<li>E</li>
+<li>nRES.PIN</li>
+<li><a href="Javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></li>
+<li><a href="Javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></li>
+<li><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></li>
+<li><a href="Javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></li>
+<li>nDTACK_IOB</li>
+<li>nVPA_IOB</li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB3.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB3.htm
index 888229a..d609930 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB3.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB3.htm
@@ -27,22 +27,22 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
+<td align="center" width="10%">18</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB3_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB3_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB3_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB3_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB3_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB3_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB3_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB3_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB3_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB3_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB3_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB3_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB3_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB3_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a> <a href="Javascript:showPT('FB3_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB3_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB3_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a>
+</td>
 <td align="center" width="10%">MC1</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center" width="10%">20</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB3_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB3_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB3_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB3_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB3_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB3_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB3_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB3_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB3_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB3_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB3_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB3_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB3_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB3_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a> <a href="Javascript:showPT('FB3_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB3_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB3_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB3_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB3_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%">23</td>
 <td width="8%" align="center">I/O/GCK2</td>
 <td align="center" width="10%">GCK/I</td>
@@ -68,31 +68,29 @@
 <td align="center" width="10%"> </td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC5</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%">24</td>
 <td width="8%" align="center">I/O</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;23&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB3_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB3_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%">25</td>
 <td width="8%" align="center">I/O</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'E'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB3_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB3_6_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_5</a> <a href="Javascript:showPT('FB3_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></td>
+<td align="center" width="10%">13</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB3_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB3_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a> <a href="Javascript:showPT('FB3_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a> <a href="Javascript:showPT('FB3_5_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_5</a> <a href="Javascript:showPT('FB3_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB3_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB3_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB3_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB3_6_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_5</a> <a href="Javascript:showPT('FB3_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB3_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB3_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -112,8 +110,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center" width="10%">11</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB3_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB3_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB3_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a> <a href="Javascript:showPT('FB3_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB3_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB3_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB3_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB3_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB3_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB3_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
+<td align="center" width="10%">10</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB3_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a> <a href="Javascript:showPT('FB3_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB3_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB3_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB3_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB3_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB3_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB3_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB3_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a>
 </td>
 <td align="center" width="10%">MC9</td>
 <td align="center" width="10%">STD</td>
@@ -123,8 +121,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center" width="10%">7</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB3_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB3_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB3_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB3_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB3_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB3_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
+<td align="center" width="10%">6</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB3_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB3_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB3_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB3_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB3_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
 </td>
 <td align="center" width="10%">MC10</td>
 <td align="center" width="10%">STD</td>
@@ -175,8 +173,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('iobsIORW0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW0</a></td>
-<td align="center" width="10%">18</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB3_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB3_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB3_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB3_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB3_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB3_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB3_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB3_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB3_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a> <a href="Javascript:showPT('FB3_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB3_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB3_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB3_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB3_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB3_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB3_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB3_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a>
+<td align="center" width="10%">17</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB3_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB3_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB3_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB3_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB3_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB3_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB3_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB3_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB3_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a> <a href="Javascript:showPT('FB3_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB3_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB3_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB3_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB3_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB3_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB3_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a>
 </td>
 <td align="center" width="10%">MC15</td>
 <td align="center" width="10%">STD</td>
@@ -239,7 +237,6 @@
 <li><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></li>
 <li><a href="Javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></li>
 <li><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></li>
-<li><a href="Javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></li>
 <li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
 <li><a href="Javascript:showEqn('iobsIORW0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW0</a></li>
 <li><a href="Javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></li>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB4.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB4.htm
index f7efb5a..13cd525 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB4.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB4.htm
@@ -27,12 +27,11 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntnRESout_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/nRESout</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB4_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC1</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -49,9 +48,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB4_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
 </td>
 <td align="center" width="10%">MC3</td>
 <td align="center" width="10%">STD</td>
@@ -60,9 +59,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB4_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
 </td>
 <td align="center" width="10%">MC4</td>
 <td align="center" width="10%">STD</td>
@@ -83,8 +82,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB4_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB4_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB4_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a>
 </td>
 <td align="center" width="10%">MC6</td>
 <td align="center" width="10%">STD</td>
@@ -93,9 +92,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntPORS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd2</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB4_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -115,9 +114,9 @@
 <td align="center" width="10%">I/O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;0&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB4_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
 </td>
 <td align="center" width="10%">MC9</td>
 <td align="center" width="10%">STD</td>
@@ -126,9 +125,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nIPL2'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB4_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB4_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB4_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a>
 </td>
 <td align="center" width="10%">MC10</td>
 <td align="center" width="10%">STD</td>
@@ -148,9 +147,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB4_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB4_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntnRESout_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/nRESout</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB4_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a>
 </td>
 <td align="center" width="10%">MC12</td>
 <td align="center" width="10%">STD</td>
@@ -159,9 +158,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;1&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB4_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB4_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntPORS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd2</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB4_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a>
 </td>
 <td align="center" width="10%">MC13</td>
 <td align="center" width="10%">STD</td>
@@ -170,9 +169,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB4_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB4_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;0&gt;</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB4_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a>
 </td>
 <td align="center" width="10%">MC14</td>
 <td align="center" width="10%">STD</td>
@@ -181,7 +180,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;2&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
 <td align="center" width="10%">4</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB4_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB4_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB4_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a>
 </td>
@@ -192,7 +191,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;3&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
 <td align="center" width="10%">4</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB4_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB4_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB4_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a>
 </td>
@@ -203,7 +202,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;1&gt;</a></td>
 <td align="center" width="10%">4</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB4_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB4_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB4_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a>
 </td>
@@ -214,9 +213,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;4&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntLTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;1&gt;</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB4_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB4_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB4_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></td>
+<td align="center" width="10%">9</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB4_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB4_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB4_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB4_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB4_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB4_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB4_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB4_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a>
 </td>
 <td align="center" width="10%">MC18</td>
 <td align="center" width="10%">STD</td>
@@ -231,7 +230,8 @@
 <li>A_FSB&lt;21&gt;</li>
 <li>A_FSB&lt;22&gt;</li>
 <li>A_FSB&lt;23&gt;</li>
-<li>E</li>
+<li>C8M</li>
+<li><a href="Javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></li>
 <li><a href="Javascript:showEqn('cntLTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;0&gt;</a></li>
 <li><a href="Javascript:showEqn('cntLTimer13_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;13&gt;</a></li>
 <li><a href="Javascript:showEqn('cntLTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;1&gt;</a></li>
@@ -239,17 +239,26 @@
 <li><a href="Javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></li>
 <li><a href="Javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('cntPORS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></li>
-<li><a href="Javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></li>
-<li><a href="Javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></li>
-<li><a href="Javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></li>
 <li><a href="Javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></li>
 <li><a href="Javascript:showEqn('cntnRESout_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/nRESout</a></li>
 <li><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></li>
+<li><a href="Javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></li>
+<li><a href="Javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></li>
+<li><a href="Javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></li>
+<li><a href="Javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></li>
 <li><a href="Javascript:showEqn('iobmDoutOE_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DoutOE</a></li>
+<li><a href="Javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></li>
+<li><a href="Javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></li>
+<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></li>
+<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
+<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
+<li><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></li>
+<li><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></li>
 <li>nAS_FSB</li>
 <li><a href="Javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></li>
+<li>nBERR_IOB</li>
 <li><a href="Javascript:showEqn('nBR_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></li>
+<li>nIPL2</li>
 <li>nWE_FSB</li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB5.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB5.htm
index b39d695..03cbb6f 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB5.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB5.htm
@@ -93,9 +93,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center" width="10%">8</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB5_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB5_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB5_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB5_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB5_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB5_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB5_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB5_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB5_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -243,10 +243,12 @@
 <li><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></li>
 <li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
 <li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
+<li><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></li>
 <li>nAS_FSB</li>
 <li>nWE_FSB</li>
 <li><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></li>
 <li><a href="Javascript:showEqn('ramRAMEN_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMEN</a></li>
+<li><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></li>
 <li><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></li>
 <li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB6.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB6.htm
index 0a8acbe..6b49d0f 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB6.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB6.htm
@@ -71,7 +71,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
 <td align="center" width="10%">3</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB6_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB6_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB6_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a>
 </td>
@@ -82,7 +82,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nBERR_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
 <td align="center" width="10%">3</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB6_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB6_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB6_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a>
 </td>
@@ -93,7 +93,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nVPA_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
 <td align="center" width="10%">3</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB6_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB6_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB6_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a>
 </td>
@@ -104,9 +104,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB6_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB6_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB6_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB6_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB6_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a>
 </td>
 <td align="center" width="10%">MC8</td>
 <td align="center" width="10%">STD</td>
@@ -126,9 +126,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB6_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB6_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB6_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB6_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
+<td align="center" width="10%">4</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB6_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB6_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB6_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a>
 </td>
 <td align="center" width="10%">MC10</td>
 <td align="center" width="10%">STD</td>
@@ -159,7 +159,7 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
 <td align="center" width="10%">5</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB6_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB6_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB6_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB6_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB6_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a>
 </td>
@@ -192,9 +192,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOACT_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOACT</a></td>
-<td align="center" width="10%">6</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB6_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB6_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB6_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB6_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB6_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
+<td align="center" width="10%">5</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB6_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB6_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB6_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB6_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
 </td>
 <td align="center" width="10%">MC16</td>
 <td align="center" width="10%">STD</td>
@@ -214,9 +214,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></td>
-<td align="center" width="10%">9</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB6_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB6_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB6_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB6_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB6_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB6_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB6_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB6_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOACT_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOACT</a></td>
+<td align="center" width="10%">6</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB6_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB6_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB6_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB6_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB6_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a>
 </td>
 <td align="center" width="10%">MC18</td>
 <td align="center" width="10%">STD</td>
@@ -242,7 +242,6 @@
 <li><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></li>
 <li><a href="Javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></li>
 <li><a href="Javascript:showEqn('iobmIOACT_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOACT</a></li>
-<li><a href="Javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></li>
 <li><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></li>
 <li><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
@@ -259,7 +258,6 @@
 <li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
 <li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
 <li><a href="Javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></li>
-<li>nBERR_IOB</li>
 <li><a href="Javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB8.htm b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB8.htm
index f0ee75d..140caa9 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/fbs_FB8.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/fbs_FB8.htm
@@ -27,9 +27,9 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
+<td align="center" width="10%">15</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB8_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB8_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB8_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB8_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB8_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB8_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB8_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB8_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB8_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB8_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB8_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB8_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB8_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB8_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
 </td>
 <td align="center" width="10%">MC1</td>
 <td align="center" width="10%">STD</td>
@@ -40,7 +40,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('RA11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;11&gt;</a></td>
 <td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a>
 </td>
 <td align="center" width="10%">MC2</td>
 <td align="center" width="10%">STD</td>
@@ -49,9 +49,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center" width="10%">9</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB8_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB8_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB8_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a> <a href="Javascript:showPT('FB8_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB8_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB8_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB8_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB8_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
 </td>
 <td align="center" width="10%">MC3</td>
 <td align="center" width="10%">STD</td>
@@ -60,14 +60,15 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
+</td>
 <td align="center" width="10%">MC4</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">(b)</td>
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nRAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
@@ -83,7 +84,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nRAMLWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMLWE</a></td>
 <td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
 </td>
 <td align="center" width="10%">MC6</td>
 <td align="center" width="10%">STD</td>
@@ -92,9 +93,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB8_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB8_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB8_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB8_6_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_5</a> <a href="Javascript:showPT('FB8_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB8_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB8_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB8_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB8_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a> <a href="Javascript:showPT('FB8_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB8_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB8_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB8_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB8_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -105,7 +106,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nRAMUWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMUWE</a></td>
 <td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a>
 </td>
 <td align="center" width="10%">MC8</td>
 <td align="center" width="10%">STD</td>
@@ -114,32 +115,33 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td align="center" width="10%">8</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB8_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB8_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB8_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB8_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB8_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB8_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB8_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a>
+</td>
 <td align="center" width="10%">MC9</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">67</td>
 <td width="8%" align="center">I/O</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB8_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB8_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB8_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB8_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB8_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB8_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB8_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a> <a href="Javascript:showPT('FB8_11_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_4</a> <a href="Javascript:showPT('FB8_11_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_5</a> <a href="Javascript:showPT('FB8_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB8_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB8_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB8_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC10</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
+<td align="center" width="10%">9</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB8_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB8_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB8_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB8_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB8_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB8_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB8_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB8_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
+</td>
 <td align="center" width="10%">MC11</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">68</td>
 <td width="8%" align="center">I/O</td>
 <td align="center" width="10%">(b)</td>
@@ -147,7 +149,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
 <td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB8_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB8_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB8_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a> <a href="Javascript:showPT('FB8_11_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_4</a> <a href="Javascript:showPT('FB8_11_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_5</a> <a href="Javascript:showPT('FB8_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
 </td>
 <td align="center" width="10%">MC12</td>
 <td align="center" width="10%">STD</td>
@@ -166,9 +168,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB8_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB8_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB8_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB8_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB8_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB8_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB8_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB8_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB8_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB8_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB8_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB8_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB8_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
+<td align="center" width="10%">12</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB8_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB8_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB8_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB8_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB8_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB8_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB8_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB8_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB8_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB8_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB8_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a>
 </td>
 <td align="center" width="10%">MC14</td>
 <td align="center" width="10%">STD</td>
@@ -179,7 +181,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nBR_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></td>
 <td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB8_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB8_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a>
 </td>
 <td align="center" width="10%">MC15</td>
 <td align="center" width="10%">STD</td>
@@ -188,25 +190,26 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
+<td align="center" width="10%">14</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB8_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB8_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB8_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB8_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a> <a href="Javascript:showPT('FB8_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB8_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB8_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB8_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB8_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB8_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB8_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB8_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB8_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a>
+</td>
 <td align="center" width="10%">MC16</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center" width="10%">17</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB8_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB8_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB8_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB8_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB8_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB8_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB8_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB8_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB8_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB8_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB8_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB8_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB8_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB8_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB8_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB8_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a>
 </td>
 <td align="center" width="10%">MC17</td>
 <td align="center" width="10%">STD</td>
 <td align="center" width="10%">73</td>
 <td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nBG_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
+<td align="center" width="10%">(b)</td>
 </tr>
 <tr>
 <td align="center" width="10%">(unused)</td>
@@ -232,7 +235,6 @@
 <li>A_FSB&lt;22&gt;</li>
 <li>A_FSB&lt;23&gt;</li>
 <li><a href="Javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></li>
-<li><a href="Javascript:showEqn('cntLTimer13_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;13&gt;</a></li>
 <li><a href="Javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('cntPORS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd2</a></li>
 <li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/mapinput_00.htm b/cpld/XC95144XL/WarpSE_html/fit/mapinput_00.htm
index abf2d10..5ca80ec 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/mapinput_00.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/mapinput_00.htm
@@ -247,14 +247,6 @@
 <td align="center">I</td>
 </tr>
 <tr>
-<td width="60%">nBG_IOB</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
 <td width="60%">nDTACK_IOB</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC8</td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/mapinput_01.htm b/cpld/XC95144XL/WarpSE_html/fit/mapinput_01.htm
index a6a08b4..18b67e8 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/mapinput_01.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/mapinput_01.htm
@@ -294,14 +294,6 @@
 <td align="center">I/O</td>
 <td align="center">I</td>
 </tr>
-<tr>
-<td width="60%">nBG_IOB</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="right">
diff --git a/cpld/XC95144XL/WarpSE_html/fit/mapinput_02.htm b/cpld/XC95144XL/WarpSE_html/fit/mapinput_02.htm
index 5836d88..4bf28c4 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/mapinput_02.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/mapinput_02.htm
@@ -231,14 +231,6 @@
 <td align="center">I</td>
 </tr>
 <tr>
-<td width="60%">nBG_IOB</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
 <td width="60%">nBERR_IOB</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC5</td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm
index 3ff8299..a3d79e5 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm
@@ -205,13 +205,13 @@
 <td width="28%"><a href="javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC13</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC9</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">92</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -219,10 +219,10 @@
 <td align="center">2</td>
 <td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC9</td>
+<td align="center">MC14</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">92</td>
+<td align="center">95</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -284,19 +284,6 @@
 <td align="center">4</td>
 <td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
-<td align="center">4</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -306,9 +293,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
 <td align="center">4</td>
-<td align="center">6</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -319,6 +306,19 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
+<td align="center">4</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC15</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">96</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('cntLTimer4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;4&gt;</a></td>
 <td align="center">4</td>
 <td align="center">7</td>
@@ -400,8 +400,8 @@
 <td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></td>
 <td align="center">1</td>
 <td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC1</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -414,7 +414,7 @@
 <td align="center">2</td>
 <td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC7</td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -426,34 +426,34 @@
 <td width="28%"><a href="javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></td>
 <td align="center">4</td>
 <td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC15</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">96</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></td>
 <td align="center">3</td>
 <td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></td>
 <td align="center">2</td>
 <td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC4</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -465,24 +465,24 @@
 <td width="28%"><a href="javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></td>
 <td align="center">3</td>
 <td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC13</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC15</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">20</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></td>
 <td align="center">3</td>
 <td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC12</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC14</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">94</td>
+<td align="center">19</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -491,8 +491,8 @@
 <td width="28%"><a href="javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></td>
 <td align="center">3</td>
 <td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC10</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -504,8 +504,8 @@
 <td width="28%"><a href="javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></td>
 <td align="center">2</td>
 <td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC3</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC10</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -518,12 +518,12 @@
 <td align="center">2</td>
 <td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC1</td>
+<td align="center">MC12</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">94</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -556,31 +556,31 @@
 <td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
 <td align="center">3</td>
 <td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
+<td align="center">6</td>
 <td align="center">17</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC10</td>
@@ -593,15 +593,15 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">20</td>
+<td align="center">18</td>
 <td align="center">26</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
+<td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK/I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -621,65 +621,52 @@
 <td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC4</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC11</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC3</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">17</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmBG_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BG</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC10</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">10</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC9</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">16</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -700,6 +687,19 @@
 <td align="center">3</td>
 <td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
+<td align="center">MC8</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">78</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
+<td align="center">3</td>
+<td align="center">4</td>
+<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -709,24 +709,11 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
-<td align="center">3</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">77</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
 <td align="center">5</td>
 <td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC13</td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -739,10 +726,10 @@
 <td align="center">3</td>
 <td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC5</td>
+<td align="center">MC6</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">76</td>
+<td align="center">77</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -752,12 +739,12 @@
 <td align="center">4</td>
 <td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC8</td>
+<td align="center">MC10</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">78</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -777,24 +764,24 @@
 <td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC7</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC14</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">8</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC8</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC15</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">15</td>
+<td align="center">9</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -804,7 +791,7 @@
 <td align="center">6</td>
 <td align="center">12</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC16</td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -816,7 +803,7 @@
 <td width="28%"><a href="javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></td>
 <td align="center">9</td>
 <td align="center">13</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -829,26 +816,26 @@
 <td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC6</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">14</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
 <td align="center">2</td>
 <td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC14</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC10</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">19</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -856,7 +843,7 @@
 <td align="center">5</td>
 <td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC10</td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -868,24 +855,24 @@
 <td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
 <td align="center">3</td>
 <td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC18</td>
+<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
+<td align="center">MC5</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">76</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC5</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC12</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">13</td>
+<td align="center">7</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -894,7 +881,46 @@
 <td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC11</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">6</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC9</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">4</td>
+<td align="center">I/O/GTS2</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
+<td align="center">1</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -904,81 +930,29 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">12</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">11</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmnASr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/nASr</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">8</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
 <td align="center">1</td>
 <td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC5</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC3</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">24</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC13</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC6</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">14</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -986,43 +960,43 @@
 <td align="center">3</td>
 <td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
+<td align="center">MC12</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
+<td align="center">18</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
 <td align="center">2</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC18</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC9</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">16</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></td>
-<td align="center">14</td>
+<td align="center">13</td>
 <td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC14</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">71</td>
-<td align="center">I/O</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIORW0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW0</a></td>
-<td align="center">18</td>
+<td align="center">17</td>
 <td align="center">20</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC15</td>
@@ -1050,13 +1024,13 @@
 <td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
 <td align="center">4</td>
 <td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC7</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">22</td>
+<td align="center">I/O/GCK1</td>
+<td align="center">GCK</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -1064,23 +1038,23 @@
 <td align="center">3</td>
 <td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC16</td>
+<td align="center">MC11</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">17</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
 <td align="center">2</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC17</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC8</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">10</td>
+<td align="center">15</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -1090,32 +1064,6 @@
 <td align="center">14</td>
 <td align="center">18</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -1125,9 +1073,22 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
+<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
+<td align="center">15</td>
+<td align="center">18</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC1</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
+<td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1138,6 +1099,19 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
+<td align="center">12</td>
+<td align="center">19</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC14</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">71</td>
+<td align="center">I/O</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('nADoutLE0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE0</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
@@ -1187,7 +1161,7 @@
 <td align="center">87</td>
 <td align="center">I/O</td>
 <td align="center">O</td>
-<td align="center">RESET</td>
+<td align="center">SET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
@@ -1230,7 +1204,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center">11</td>
+<td align="center">10</td>
 <td align="center">26</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC9</td>
@@ -1256,7 +1230,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
+<td align="center">3</td>
 <td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC6</td>
@@ -1427,13 +1401,13 @@
 <td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC12</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">7</td>
+<td align="center">73</td>
 <td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -1479,12 +1453,12 @@
 <td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
 <td align="center">8</td>
 <td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC7</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC9</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
+<td align="center">67</td>
+<td align="center">I/O</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
@@ -1506,11 +1480,11 @@
 <td align="center">9</td>
 <td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC3</td>
+<td align="center">MC11</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
+<td align="center">68</td>
+<td align="center">I/O</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
@@ -1531,11 +1505,11 @@
 <td width="28%"><a href="javascript:showEqn('ramRefRAS_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefRAS</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC11</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC5</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">6</td>
+<td align="center">13</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -1544,12 +1518,12 @@
 <td width="28%"><a href="javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC9</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC3</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">4</td>
-<td align="center">I/O/GTS2</td>
+<td align="center">12</td>
+<td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
@@ -1557,8 +1531,8 @@
 <td width="28%"><a href="javascript:showEqn('ramRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReq</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC10</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC4</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1570,12 +1544,12 @@
 <td width="28%"><a href="javascript:showEqn('ramRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefUrgent</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC8</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC2</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">3</td>
-<td align="center">I/O/GTS1</td>
+<td align="center">11</td>
+<td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
@@ -1583,8 +1557,8 @@
 <td width="28%"><a href="javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC7</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm
index 580d6e5..c0e0856 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm
@@ -20,9 +20,9 @@
 <th align="center">Reg Init State</th>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmnASr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/nASr</a></td>
+<td width="28%"><a href="javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -33,9 +33,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('ramRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefUrgent</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -46,7 +46,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td width="28%"><a href="javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -59,9 +59,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('ramRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReq</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
@@ -72,9 +72,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('ramRefRAS_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefRAS</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -85,7 +85,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -98,7 +98,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -111,9 +111,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC8</td>
 <td align="center">STD</td>
@@ -124,9 +124,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -137,9 +137,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></td>
+<td align="center">2</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -150,9 +150,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOU0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU0</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC11</td>
 <td align="center">STD</td>
@@ -163,9 +163,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOL0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL0</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -176,9 +176,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></td>
+<td align="center">3</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC13</td>
 <td align="center">STD</td>
@@ -189,9 +189,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></td>
 <td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -202,9 +202,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBG_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BG</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></td>
+<td align="center">3</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -215,7 +215,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU0</a></td>
+<td width="28%"><a href="javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></td>
 <td align="center">3</td>
 <td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -228,9 +228,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td align="center">4</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -241,9 +241,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center">3</td>
-<td align="center">6</td>
+<td width="28%"><a href="javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></td>
+<td align="center">4</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -254,33 +254,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefUrgent</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">3</td>
-<td align="center">I/O/GTS1</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -293,9 +267,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReq</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -306,9 +280,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRefRAS_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefRAS</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC11</td>
 <td align="center">STD</td>
@@ -319,9 +293,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -332,7 +306,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -345,9 +319,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -358,7 +332,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -371,9 +345,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -384,9 +358,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -397,9 +371,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></td>
 <td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -411,47 +385,21 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">20</td>
+<td align="center">18</td>
 <td align="center">26</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
+<td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK/I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">24</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></td>
+<td align="center">13</td>
+<td align="center">19</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -463,7 +411,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center">11</td>
+<td align="center">10</td>
 <td align="center">26</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC9</td>
@@ -476,7 +424,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
+<td align="center">6</td>
 <td align="center">17</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC10</td>
@@ -502,7 +450,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIORW0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW0</a></td>
-<td align="center">18</td>
+<td align="center">17</td>
 <td align="center">20</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC15</td>
@@ -527,19 +475,6 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntnRESout_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/nRESout</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
 <td align="center">1</td>
 <td align="center">3</td>
@@ -550,12 +485,12 @@
 <td align="center">87</td>
 <td align="center">I/O</td>
 <td align="center">O</td>
-<td align="center">RESET</td>
+<td align="center">SET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -566,9 +501,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
@@ -593,7 +528,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
+<td align="center">3</td>
 <td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC6</td>
@@ -605,9 +540,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd2</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
+<td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></td>
+<td align="center">1</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -631,9 +566,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;0&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
+<td width="28%"><a href="javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -644,9 +579,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td align="center">2</td>
 <td align="center">3</td>
-<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -670,9 +605,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('cntnRESout_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/nRESout</a></td>
+<td align="center">2</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -683,9 +618,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd2</a></td>
+<td align="center">2</td>
 <td align="center">3</td>
-<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC13</td>
 <td align="center">STD</td>
@@ -696,9 +631,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;0&gt;</a></td>
+<td align="center">2</td>
 <td align="center">3</td>
-<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -709,9 +644,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
 <td align="center">4</td>
-<td align="center">5</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -722,9 +657,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
 <td align="center">4</td>
-<td align="center">6</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -735,9 +670,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;1&gt;</a></td>
+<td align="center">4</td>
 <td align="center">4</td>
-<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -748,9 +683,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;1&gt;</a></td>
-<td align="center">4</td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></td>
+<td align="center">9</td>
+<td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -839,9 +774,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
+<td align="center">3</td>
 <td align="center">8</td>
-<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1021,7 +956,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
 <td align="center">3</td>
 <td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
@@ -1034,9 +969,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
 <td align="center">3</td>
-<td align="center">4</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC6</td>
 <td align="center">STD</td>
@@ -1047,9 +982,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
 <td align="center">3</td>
-<td align="center">7</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1060,8 +995,8 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
+<td align="center">3</td>
 <td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC8</td>
@@ -1086,9 +1021,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center">5</td>
-<td align="center">11</td>
+<td width="28%"><a href="javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
+<td align="center">4</td>
+<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -1125,9 +1060,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
 <td align="center">5</td>
-<td align="center">7</td>
+<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC13</td>
 <td align="center">STD</td>
@@ -1164,9 +1099,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOACT_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOACT</a></td>
-<td align="center">6</td>
-<td align="center">12</td>
+<td width="28%"><a href="javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
+<td align="center">5</td>
+<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -1190,9 +1125,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></td>
-<td align="center">9</td>
-<td align="center">13</td>
+<td width="28%"><a href="javascript:showEqn('iobmIOACT_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOACT</a></td>
+<td align="center">6</td>
+<td align="center">12</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -1437,9 +1372,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></td>
-<td align="center">1</td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
+<td align="center">15</td>
+<td align="center">18</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -1463,9 +1398,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center">9</td>
-<td align="center">11</td>
+<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
+<td align="center">1</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -1476,6 +1411,19 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
+<td align="center">1</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC4</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('nRAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
 <td align="center">3</td>
 <td align="center">7</td>
@@ -1502,9 +1450,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
+<td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1528,15 +1476,28 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center">14</td>
-<td align="center">18</td>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td align="center">8</td>
+<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC10</td>
+<td align="center">MC9</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
+<td align="center">67</td>
+<td align="center">I/O</td>
 <td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
+<td align="center">9</td>
+<td align="center">11</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC11</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">68</td>
+<td align="center">I/O</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
@@ -1554,8 +1515,8 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></td>
-<td align="center">14</td>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
+<td align="center">12</td>
 <td align="center">19</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC14</td>
@@ -1580,16 +1541,29 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
+<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
+<td align="center">14</td>
 <td align="center">18</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC16</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td align="center">1</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center">73</td>
 <td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm
index 2016169..8d9ee73 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm
@@ -20,20 +20,7 @@
 <th align="center">Reg Init State</th>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefUrgent</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">3</td>
-<td align="center">I/O/GTS1</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -46,9 +33,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRefRAS_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefRAS</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC11</td>
 <td align="center">STD</td>
@@ -59,9 +46,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -72,9 +59,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -85,7 +72,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -98,9 +85,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -111,9 +98,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('ramRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefUrgent</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -124,7 +111,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td width="28%"><a href="javascript:showEqn('ramRefReqSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReqSync</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -137,9 +124,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('ramRefRAS_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefRAS</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -150,7 +137,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -163,9 +150,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC8</td>
 <td align="center">STD</td>
@@ -176,9 +163,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -189,9 +176,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOU0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU0</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC11</td>
 <td align="center">STD</td>
@@ -202,9 +189,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOL0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL0</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -215,9 +202,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></td>
 <td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -228,9 +215,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBG_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BG</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></td>
+<td align="center">3</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -241,9 +228,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td align="center">4</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -254,47 +241,8 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">20</td>
-<td align="center">26</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">24</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center">11</td>
+<td align="center">10</td>
 <td align="center">26</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC9</td>
@@ -320,7 +268,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIORW0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW0</a></td>
-<td align="center">18</td>
+<td align="center">17</td>
 <td align="center">20</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC15</td>
@@ -657,6 +605,32 @@
 <td align="center"> </td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td align="center">8</td>
+<td align="center">11</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC9</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">67</td>
+<td align="center">I/O</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
+<td align="center">9</td>
+<td align="center">11</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC11</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">68</td>
+<td align="center">I/O</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
 <td align="center">4</td>
 <td align="center">8</td>
@@ -670,8 +644,8 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></td>
-<td align="center">14</td>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
+<td align="center">12</td>
 <td align="center">19</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC14</td>
@@ -696,16 +670,16 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
-<td align="center">18</td>
+<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center">73</td>
 <td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -722,7 +696,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
 <td align="center">3</td>
 <td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
@@ -735,9 +709,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
 <td align="center">3</td>
-<td align="center">4</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC6</td>
 <td align="center">STD</td>
@@ -748,8 +722,8 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
+<td align="center">3</td>
 <td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC8</td>
@@ -849,7 +823,7 @@
 <td align="center">87</td>
 <td align="center">I/O</td>
 <td align="center">O</td>
-<td align="center">RESET</td>
+<td align="center">SET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
@@ -866,7 +840,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
+<td align="center">3</td>
 <td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC6</td>
@@ -891,9 +865,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;0&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
+<td width="28%"><a href="javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -917,9 +891,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;2&gt;</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('cntnRESout_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/nRESout</a></td>
+<td align="center">2</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -930,9 +904,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;0&gt;</a></td>
+<td align="center">2</td>
 <td align="center">3</td>
-<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -943,9 +917,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
 <td align="center">4</td>
-<td align="center">5</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -956,9 +930,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;1&gt;</a></td>
+<td align="center">4</td>
 <td align="center">4</td>
-<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -969,123 +943,11 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmnASr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/nASr</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntIPL2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/IPL2r</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center">3</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('ramRegUrgentSync_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RegUrgentSync</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC7</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1100,6 +962,102 @@
 <td width="28%"><a href="javascript:showEqn('ramRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RefReq</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC4</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC7</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></td>
+<td align="center">2</td>
+<td align="center">5</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></td>
+<td align="center">3</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC13</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefUrgent_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefUrgent</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC16</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefReq_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefReq</a></td>
+<td align="center">4</td>
+<td align="center">5</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC18</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -1113,7 +1071,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -1129,9 +1087,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -1145,89 +1103,89 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
-<td align="center">17</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntnRESout_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/nRESout</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntTimerTC_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimerTC</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('cntTimer0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;0&gt;</a></td>
 <td align="center">2</td>
 <td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC18</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
+<td align="center">18</td>
+<td align="center">26</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC1</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsIOREQ_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOREQ</a></td>
+<td align="center">13</td>
+<td align="center">19</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC7</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
+<td align="center">6</td>
+<td align="center">17</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
@@ -1241,42 +1199,42 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></td>
+<td align="center">1</td>
+<td align="center">4</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC7</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td align="center">2</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd2</a></td>
 <td align="center">2</td>
 <td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;3&gt;</a></td>
-<td align="center">3</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/Timer&lt;1&gt;</a></td>
-<td align="center">3</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -1289,9 +1247,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('cntLTimer2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;2&gt;</a></td>
 <td align="center">4</td>
-<td align="center">6</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -1305,9 +1263,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntLTimer1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/LTimer&lt;1&gt;</a></td>
-<td align="center">4</td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></td>
+<td align="center">9</td>
+<td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -1315,7 +1273,7 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">D</td>
+<td align="center">T</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">RESET</td>
@@ -1369,9 +1327,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
+<td align="center">3</td>
 <td align="center">8</td>
-<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1465,9 +1423,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
 <td align="center">3</td>
-<td align="center">7</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1475,6 +1433,22 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
+<td align="center">4</td>
+<td align="center">7</td>
+<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">T</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1485,7 +1459,7 @@
 <td align="center">5</td>
 <td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC10</td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1501,7 +1475,7 @@
 <td align="center">5</td>
 <td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC13</td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1517,29 +1491,13 @@
 <td align="center">6</td>
 <td align="center">12</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOBERR_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOBERR</a></td>
-<td align="center">9</td>
-<td align="center">13</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">T</td>
+<td align="center">D</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">RESET</td>
@@ -1673,9 +1631,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntPORS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/PORS_FSM_FFd1</a></td>
-<td align="center">1</td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
+<td align="center">15</td>
+<td align="center">18</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -1689,9 +1647,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center">9</td>
-<td align="center">11</td>
+<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
+<td align="center">1</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -1699,15 +1657,31 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">T</td>
+<td align="center">D</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
+<td width="28%"><a href="javascript:showEqn('iobsALE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/ALE0</a></td>
+<td align="center">1</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC4</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
+<td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1725,7 +1699,7 @@
 <td align="center">14</td>
 <td align="center">18</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC10</td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/pins.htm b/cpld/XC95144XL/WarpSE_html/fit/pins.htm
index aa3a277..4c71467 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/pins.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/pins.htm
@@ -374,7 +374,7 @@
 <tr>
 <td width="10%" align="center">73</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nBG_IOB</td>
+<td width="70%" align="center">KPR</td>
 </tr>
 <tr>
 <td width="10%" align="center">74</td>
diff --git a/cpld/XC95144XL/WarpSE_html/fit/summary.htm b/cpld/XC95144XL/WarpSE_html/fit/summary.htm
index aa71aef..88af5c6 100644
--- a/cpld/XC95144XL/WarpSE_html/fit/summary.htm
+++ b/cpld/XC95144XL/WarpSE_html/fit/summary.htm
@@ -30,7 +30,7 @@
 <tr>
 <td width="40%"> <b>Date</b>
 </td>
-<td width="60%">  3-20-2023, 11:54PM</td>
+<td width="60%">  3-25-2023,  0:52AM</td>
 </tr>
 </table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
 <table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
@@ -42,11 +42,11 @@
 <th width="20%">Function Block Inputs Used</th>
 </tr>
 <tr>
-<td width="20%" align="center">121/144  (85%)</td>
-<td width="20%" align="center">440/720  (62%)</td>
-<td width="20%" align="center">96/144  (67%)</td>
-<td width="20%" align="center">72/81  (89%)</td>
-<td width="20%" align="center">227/432  (53%)</td>
+<td width="20%" align="center">119/144  (83%)</td>
+<td width="20%" align="center">428/720  (60%)</td>
+<td width="20%" align="center">94/144  (66%)</td>
+<td width="20%" align="center">71/81  (88%)</td>
+<td width="20%" align="center">230/432  (54%)</td>
 </tr>
 </table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
 <table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
@@ -58,8 +58,8 @@
 </tr>
 <tr>
 <td width="33%"> Input</td>
-<td width="33%" align="center"> 33</td>
-<td width="33%" align="center"> 33</td>
+<td width="33%" align="center"> 32</td>
+<td width="33%" align="center"> 32</td>
 </tr>
 <tr>
 <td width="33%"> Output</td>
@@ -96,7 +96,7 @@
 <tr>
 <td width="33%"> I/O</td>
 <td width="33%" align="center"> 
-              66</td>
+              65</td>
 <td width="33%" align="center"> 74</td>
 </tr>
 <tr>
@@ -133,7 +133,7 @@
 <table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
 <tr>
 <td width="50%"> Macrocells in high performance mode (MCHP)</td>
-<td width="50%"> 121</td>
+<td width="50%"> 119</td>
 </tr>
 <tr>
 <td width="50%"> Macrocells in low power mode (MCLP)</td>
@@ -141,7 +141,7 @@
 </tr>
 <tr>
 <td width="50%"> Total macrocells used (MC)</td>
-<td width="50%"> 121</td>
+<td width="50%"> 119</td>
 </tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm b/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm
index 85350fe..bcf71ad 100644
--- a/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm
+++ b/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm
@@ -27,7 +27,7 @@
   <TD WIDTH="65%" CLASS="cpldta_text_normal"><A HREF="Javascript:popWin('http://www.xilinx.com/literature/index.htm','800','800','test');">XC95144XL</A>, -10 (3.0)</TD>
  </TR>
  <TR>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Date Created</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Mon Mar 20 21:19:09 2023
+  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Date Created</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Sat Mar 25 00:05:47 2023
 </TD>
  </TR>
  <TR>
@@ -44,18 +44,18 @@
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Min. Clock Period</B></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">12.200 ns.</TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">14.000 ns.</TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Max. Clock Frequency </B><A HREF="cpldta_glossary.htm#fSYSTEM">(fSYSTEM)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">81.967 MHz. </TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">71.429 MHz. </TD>
  </TR>
  <TR>
-  <TD WIDTH="100%" colspan="2" CLASS="cpldta_text_normal">Limited by Cycle Time for CLK_FSB</TD>
+  <TD WIDTH="100%" colspan="2" CLASS="cpldta_text_normal">Limited by Clock Pulse Width for E</TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock to Setup </B><A HREF="cpldta_glossary.htm#tCYC">(tCYC)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">12.200 ns. </TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">11.400 ns. </TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Pad to Pad Delay </B><A HREF="cpldta_glossary.htm#tPD">(tPD)</A></TD>
@@ -63,7 +63,7 @@
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Setup to Clock at the Pad </B><A HREF="cpldta_glossary.htm#tSU">(tSU)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">8.700 ns. </TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">7.900 ns. </TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock Pad to Output Pad Delay </B><A HREF="cpldta_glossary.htm#tCO">(tCO)</A></TD>
@@ -83,22 +83,22 @@
  <TR>
   <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK_IOB">TS_CLK_IOB</A></TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">142.8</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">0.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">10.0</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">136</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
  </TR>
  <TR>
   <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK_FSB">TS_CLK_FSB</A></TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">40.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">12.2</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">140</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">11.4</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">164</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
  </TR>
  <TR>
   <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK2X_IOB">TS_CLK2X_IOB</A></TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">66.6</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">11.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">99</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">100</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
  </TR>
 </TABLE>
@@ -114,6 +114,4630 @@
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay (ns)</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Slack (ns)</TH>
   </TR>
+  <TR>
+   <A NAME="_cnt_IPL2r_Q_to_cnt_PORS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_IPL2r_Q_to_cnt_PORS_FSM_FFd1_D();">cnt/IPL2r.Q to cnt/PORS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_IPL2r_Q_to_cnt_PORS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/IPL2r.Q to cnt/PORS_FSM_FFd1.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/IPL2r</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_IPL2r_Q_to_nBR_IOB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_IPL2r_Q_to_nBR_IOB_D();">cnt/IPL2r.Q to nBR_IOB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_IPL2r_Q_to_nBR_IOB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/IPL2r.Q to nBR_IOB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/IPL2r</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBR_IOB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_0__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_0__D();">cnt/LTimer<0>.Q to cnt/LTimer<0>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_0__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<0>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_10__D();">cnt/LTimer<0>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_11__D();">cnt/LTimer<0>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_12__D();">cnt/LTimer<0>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_13__D();">cnt/LTimer<0>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_1__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_1__D();">cnt/LTimer<0>.Q to cnt/LTimer<1>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_1__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<1>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_2__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_2__D();">cnt/LTimer<0>.Q to cnt/LTimer<2>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_2__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<2>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_3__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_3__D();">cnt/LTimer<0>.Q to cnt/LTimer<3>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_3__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<3>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_4__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_4__D();">cnt/LTimer<0>.Q to cnt/LTimer<4>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_4__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<4>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_5__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_5__D();">cnt/LTimer<0>.Q to cnt/LTimer<5>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_5__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<5>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_6__D();">cnt/LTimer<0>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_7__D();">cnt/LTimer<0>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_8__D();">cnt/LTimer<0>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_0__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_9__D();">cnt/LTimer<0>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_0__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<0>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_10__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_10__D();">cnt/LTimer<10>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<10>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_10__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_11__D();">cnt/LTimer<10>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<10>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_10__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_12__D();">cnt/LTimer<10>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<10>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_10__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_13__D();">cnt/LTimer<10>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_10__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<10>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_11__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_11__Q_to_cnt_LTimer_11__D();">cnt/LTimer<11>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_11__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<11>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_11__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_11__Q_to_cnt_LTimer_12__D();">cnt/LTimer<11>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_11__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<11>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_11__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_11__Q_to_cnt_LTimer_13__D();">cnt/LTimer<11>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_11__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<11>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_12__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_12__Q_to_cnt_LTimer_12__D();">cnt/LTimer<12>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_12__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<12>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_12__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_12__Q_to_cnt_LTimer_13__D();">cnt/LTimer<12>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_12__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<12>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_0__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_0__D();">cnt/LTimer<13>.Q to cnt/LTimer<0>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_0__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<0>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<0>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_10__D();">cnt/LTimer<13>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_11__D();">cnt/LTimer<13>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_12__D();">cnt/LTimer<13>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_13__D();">cnt/LTimer<13>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_1__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_1__D();">cnt/LTimer<13>.Q to cnt/LTimer<1>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_1__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<1>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_2__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_2__D();">cnt/LTimer<13>.Q to cnt/LTimer<2>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_2__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<2>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_3__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_3__D();">cnt/LTimer<13>.Q to cnt/LTimer<3>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_3__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<3>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_4__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_4__D();">cnt/LTimer<13>.Q to cnt/LTimer<4>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_4__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<4>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_5__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_5__D();">cnt/LTimer<13>.Q to cnt/LTimer<5>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_5__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<5>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_6__D();">cnt/LTimer<13>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_7__D();">cnt/LTimer<13>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_8__D();">cnt/LTimer<13>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_9__D();">cnt/LTimer<13>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_PORS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_PORS_FSM_FFd1_D();">cnt/LTimer<13>.Q to cnt/PORS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_PORS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/PORS_FSM_FFd1.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_PORS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_PORS_FSM_FFd2_D();">cnt/LTimer<13>.Q to cnt/PORS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_PORS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/PORS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_13__Q_to_cnt_nRESout_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_nRESout_D();">cnt/LTimer<13>.Q to cnt/nRESout.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_13__Q_to_cnt_nRESout_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<13>.Q to cnt/nRESout.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/nRESout.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_10__D();">cnt/LTimer<1>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_11__D();">cnt/LTimer<1>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_12__D();">cnt/LTimer<1>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_13__D();">cnt/LTimer<1>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_1__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_1__D();">cnt/LTimer<1>.Q to cnt/LTimer<1>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_1__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<1>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_2__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_2__D();">cnt/LTimer<1>.Q to cnt/LTimer<2>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_2__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<2>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_3__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_3__D();">cnt/LTimer<1>.Q to cnt/LTimer<3>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_3__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<3>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_4__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_4__D();">cnt/LTimer<1>.Q to cnt/LTimer<4>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_4__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<4>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_5__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_5__D();">cnt/LTimer<1>.Q to cnt/LTimer<5>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_5__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<5>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_6__D();">cnt/LTimer<1>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_7__D();">cnt/LTimer<1>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_8__D();">cnt/LTimer<1>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_1__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_9__D();">cnt/LTimer<1>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_1__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<1>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<1></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_10__D();">cnt/LTimer<2>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_11__D();">cnt/LTimer<2>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_12__D();">cnt/LTimer<2>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_13__D();">cnt/LTimer<2>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_2__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_2__D();">cnt/LTimer<2>.Q to cnt/LTimer<2>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_2__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<2>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_3__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_3__D();">cnt/LTimer<2>.Q to cnt/LTimer<3>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_3__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<3>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_4__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_4__D();">cnt/LTimer<2>.Q to cnt/LTimer<4>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_4__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<4>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_5__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_5__D();">cnt/LTimer<2>.Q to cnt/LTimer<5>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_5__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<5>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_6__D();">cnt/LTimer<2>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_7__D();">cnt/LTimer<2>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_8__D();">cnt/LTimer<2>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_2__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_9__D();">cnt/LTimer<2>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_2__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<2>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<2></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_10__D();">cnt/LTimer<3>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_11__D();">cnt/LTimer<3>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_12__D();">cnt/LTimer<3>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_13__D();">cnt/LTimer<3>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_3__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_3__D();">cnt/LTimer<3>.Q to cnt/LTimer<3>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_3__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<3>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_4__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_4__D();">cnt/LTimer<3>.Q to cnt/LTimer<4>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_4__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<4>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_5__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_5__D();">cnt/LTimer<3>.Q to cnt/LTimer<5>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_5__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<5>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_6__D();">cnt/LTimer<3>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_7__D();">cnt/LTimer<3>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_8__D();">cnt/LTimer<3>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_3__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_9__D();">cnt/LTimer<3>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_3__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<3>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<3></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_10__D();">cnt/LTimer<4>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_11__D();">cnt/LTimer<4>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_12__D();">cnt/LTimer<4>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_13__D();">cnt/LTimer<4>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_4__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_4__D();">cnt/LTimer<4>.Q to cnt/LTimer<4>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_4__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<4>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_5__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_5__D();">cnt/LTimer<4>.Q to cnt/LTimer<5>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_5__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<5>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_6__D();">cnt/LTimer<4>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_7__D();">cnt/LTimer<4>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_8__D();">cnt/LTimer<4>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_4__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_9__D();">cnt/LTimer<4>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_4__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<4>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<4></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_10__D();">cnt/LTimer<5>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_11__D();">cnt/LTimer<5>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_12__D();">cnt/LTimer<5>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_13__D();">cnt/LTimer<5>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_5__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_5__D();">cnt/LTimer<5>.Q to cnt/LTimer<5>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_5__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<5>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_6__D();">cnt/LTimer<5>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_7__D();">cnt/LTimer<5>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_8__D();">cnt/LTimer<5>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_5__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_9__D();">cnt/LTimer<5>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_5__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<5>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<5></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_10__D();">cnt/LTimer<6>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_11__D();">cnt/LTimer<6>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_12__D();">cnt/LTimer<6>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_13__D();">cnt/LTimer<6>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_6__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_6__D();">cnt/LTimer<6>.Q to cnt/LTimer<6>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_6__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<6>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_7__D();">cnt/LTimer<6>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_8__D();">cnt/LTimer<6>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_6__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_9__D();">cnt/LTimer<6>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_6__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<6>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<6></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_7__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_10__D();">cnt/LTimer<7>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<7>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_7__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_11__D();">cnt/LTimer<7>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<7>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_7__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_12__D();">cnt/LTimer<7>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<7>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_7__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_13__D();">cnt/LTimer<7>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<7>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_7__Q_to_cnt_LTimer_7__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_7__D();">cnt/LTimer<7>.Q to cnt/LTimer<7>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_7__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<7>.Q to cnt/LTimer<7>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_7__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_8__D();">cnt/LTimer<7>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<7>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_7__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_9__D();">cnt/LTimer<7>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_7__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<7>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<7></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_8__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_10__D();">cnt/LTimer<8>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<8>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_8__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_11__D();">cnt/LTimer<8>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<8>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_8__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_12__D();">cnt/LTimer<8>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<8>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_8__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_13__D();">cnt/LTimer<8>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<8>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_8__Q_to_cnt_LTimer_8__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_8__D();">cnt/LTimer<8>.Q to cnt/LTimer<8>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_8__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<8>.Q to cnt/LTimer<8>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_8__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_9__D();">cnt/LTimer<8>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_8__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<8>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<8></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_9__Q_to_cnt_LTimer_10__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_10__D();">cnt/LTimer<9>.Q to cnt/LTimer<10>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_10__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<9>.Q to cnt/LTimer<10>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<10>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_9__Q_to_cnt_LTimer_11__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_11__D();">cnt/LTimer<9>.Q to cnt/LTimer<11>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_11__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<9>.Q to cnt/LTimer<11>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<11>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_9__Q_to_cnt_LTimer_12__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_12__D();">cnt/LTimer<9>.Q to cnt/LTimer<12>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_12__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<9>.Q to cnt/LTimer<12>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<12>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_9__Q_to_cnt_LTimer_13__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_13__D();">cnt/LTimer<9>.Q to cnt/LTimer<13>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_13__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<9>.Q to cnt/LTimer<13>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<13>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_LTimer_9__Q_to_cnt_LTimer_9__D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_9__D();">cnt/LTimer<9>.Q to cnt/LTimer<9>.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_LTimer_9__Q_to_cnt_LTimer_9__D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/LTimer<9>.Q to cnt/LTimer<9>.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9></TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/LTimer<9>.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd1_Q_to_cnt_PORS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_cnt_PORS_FSM_FFd1_D();">cnt/PORS_FSM_FFd1.Q to cnt/PORS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_cnt_PORS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd1.Q to cnt/PORS_FSM_FFd1.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd1_Q_to_cnt_PORS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_cnt_PORS_FSM_FFd2_D();">cnt/PORS_FSM_FFd1.Q to cnt/PORS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_cnt_PORS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd1.Q to cnt/PORS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd1_Q_to_cnt_nRESout_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_cnt_nRESout_D();">cnt/PORS_FSM_FFd1.Q to cnt/nRESout.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_cnt_nRESout_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd1.Q to cnt/nRESout.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/nRESout.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd1_Q_to_nAoutOE_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_nAoutOE_D();">cnt/PORS_FSM_FFd1.Q to nAoutOE.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_nAoutOE_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd1.Q to nAoutOE.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nAoutOE.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd1_Q_to_nBR_IOB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_nBR_IOB_D();">cnt/PORS_FSM_FFd1.Q to nBR_IOB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd1_Q_to_nBR_IOB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd1.Q to nBR_IOB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBR_IOB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd2_Q_to_cnt_PORS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_cnt_PORS_FSM_FFd1_D();">cnt/PORS_FSM_FFd2.Q to cnt/PORS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_cnt_PORS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd2.Q to cnt/PORS_FSM_FFd1.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd2_Q_to_cnt_PORS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_cnt_PORS_FSM_FFd2_D();">cnt/PORS_FSM_FFd2.Q to cnt/PORS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_cnt_PORS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd2.Q to cnt/PORS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd2_Q_to_cnt_nRESout_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_cnt_nRESout_D();">cnt/PORS_FSM_FFd2.Q to cnt/nRESout.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_cnt_nRESout_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd2.Q to cnt/nRESout.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/nRESout.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd2_Q_to_nAoutOE_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_nAoutOE_D();">cnt/PORS_FSM_FFd2.Q to nAoutOE.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_nAoutOE_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd2.Q to nAoutOE.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nAoutOE.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_PORS_FSM_FFd2_Q_to_nBR_IOB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_nBR_IOB_D();">cnt/PORS_FSM_FFd2.Q to nBR_IOB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_PORS_FSM_FFd2_Q_to_nBR_IOB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/PORS_FSM_FFd2.Q to nBR_IOB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/PORS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBR_IOB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cnt_nRESout_Q_to_cnt_nRESout_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_cnt_nRESout_Q_to_cnt_nRESout_D();">cnt/nRESout.Q to cnt/nRESout.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_cnt_nRESout_Q_to_cnt_nRESout_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cnt/nRESout.Q to cnt/nRESout.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/nRESout</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cnt/nRESout.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_nBR_IOB_Q_to_nAoutOE_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_nBR_IOB_Q_to_nAoutOE_D();">nBR_IOB.Q to nAoutOE.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_nBR_IOB_Q_to_nAoutOE_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("nBR_IOB.Q to nAoutOE.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBR_IOB</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nAoutOE.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_nBR_IOB_Q_to_nBR_IOB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_IOB_nBR_IOB_Q_to_nBR_IOB_D();">nBR_IOB.Q to nBR_IOB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">142.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">132.800</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_IOB_nBR_IOB_Q_to_nBR_IOB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("nBR_IOB.Q to nBR_IOB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBR_IOB</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBR_IOB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
  </TABLE>
  </BR>
  </BR>
@@ -131,8 +4755,8 @@
    <A NAME="_cs_nOverlay1_Q_to_fsb_VPA_D"></A>
    <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_VPA_D();">cs/nOverlay1.Q to fsb/VPA.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">12.200</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">27.800</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
@@ -153,110 +4777,8 @@ function TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_VPA_D() {
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
    aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tPTA2 + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">11.200</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_ASrf_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_fsb_VPA_D();">fsb/ASrf.Q to fsb/VPA.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">12.200</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">7.800</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_VPA_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to fsb/VPA.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tPTA2 + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">11.200</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_Ready2r_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_Ready2r_Q_to_fsb_VPA_D();">fsb/Ready2r.Q to fsb/VPA.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">12.200</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">27.800</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_Ready2r_Q_to_fsb_VPA_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/Ready2r.Q to fsb/VPA.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready2r</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tPTA2 + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">11.200</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_VPA_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_VPA_Q_to_fsb_VPA_D();">fsb/VPA.Q to fsb/VPA.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">12.200</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">27.800</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_VPA_Q_to_fsb_VPA_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/VPA.Q to fsb/VPA.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tPTA2 + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">11.200</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
@@ -330,6 +4852,108 @@ function TS_CLK_FSB_cs_nOverlay1_Q_to_iobs_Once_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cs_nOverlay1_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RAMReady_D();">cs/nOverlay1.Q to ram/RAMReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RAMReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cs/nOverlay1.Q to ram/RAMReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_cs_nOverlay1_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RASEL_D();">cs/nOverlay1.Q to ram/RASEL.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RASEL_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cs/nOverlay1.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_ASrf_Q_to_fsb_VPA_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_fsb_VPA_D();">fsb/ASrf.Q to fsb/VPA.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">8.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_VPA_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/ASrf.Q to fsb/VPA.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_fsb_ASrf_Q_to_iobs_IORW0_D"></A>
@@ -398,6 +5022,40 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_nDTACK_FSB_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_ASrf_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RASEL_D();">fsb/ASrf.Q to ram/RASEL.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">8.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RASEL_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/ASrf.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_fsb_Ready1r_Q_to_fsb_VPA_D"></A>
@@ -466,6 +5124,40 @@ function TS_CLK_FSB_fsb_Ready1r_Q_to_nDTACK_FSB_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_VPA_Q_to_fsb_VPA_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_VPA_Q_to_fsb_VPA_D();">fsb/VPA.Q to fsb/VPA.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_VPA_Q_to_fsb_VPA_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/VPA.Q to fsb/VPA.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_IORW0_Q_to_iobs_IORW0_D"></A>
@@ -670,6 +5362,40 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_IORW0_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IOREQ_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOREQ_D();">iobs/PS_FSM_FFd2.Q to iobs/IOREQ.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOREQ_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to iobs/IOREQ.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOREQ.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IORW0_D"></A>
@@ -738,6 +5464,40 @@ function TS_CLK_FSB_nADoutLE1_Q_to_fsb_VPA_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_nADoutLE1_Q_to_iobs_IOREQ_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOREQ_D();">nADoutLE1.Q to iobs/IOREQ.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOREQ_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("nADoutLE1.Q to iobs/IOREQ.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nADoutLE1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOREQ.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_nADoutLE1_Q_to_iobs_IORW0_D"></A>
@@ -806,6 +5566,278 @@ function TS_CLK_FSB_nDTACK_FSB_Q_to_nDTACK_FSB_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RAMEN_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMReady_D();">ram/RAMEN.Q to ram/RAMReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RAMEN.Q to ram/RAMReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RAMEN_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RAMEN_Q_to_ram_RASEL_D();">ram/RAMEN.Q to ram/RASEL.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RASEL_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RAMEN.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RAMReady_D();">ram/RS_FSM_FFd2.Q to ram/RAMReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RAMReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RAMReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RASEL_D();">ram/RS_FSM_FFd2.Q to ram/RASEL.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RASEL_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RAMReady_D();">ram/RS_FSM_FFd3.Q to ram/RAMReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RAMReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RAMReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RASEL_D();">ram/RS_FSM_FFd3.Q to ram/RASEL.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RASEL_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefReq_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefReq_Q_to_ram_RAMReady_D();">ram/RefReq.Q to ram/RAMReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefReq_Q_to_ram_RAMReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefReq.Q to ram/RAMReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReq</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefUrgent_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RAMReady_D();">ram/RefUrgent.Q to ram/RAMReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RAMReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefUrgent.Q to ram/RAMReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_cs_nOverlay1_Q_to_fsb_Ready1r_D"></A>
@@ -840,40 +5872,6 @@ function TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_Ready1r_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_cs_nOverlay1_Q_to_fsb_Ready2r_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_Ready2r_D();">cs/nOverlay1.Q to fsb/Ready2r.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_Ready2r_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("cs/nOverlay1.Q to fsb/Ready2r.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready2r.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_cs_nOverlay1_Q_to_iobs_IOREQ_D"></A>
@@ -1046,19 +6044,19 @@ function TS_CLK_FSB_cs_nOverlay1_Q_to_nDTACK_FSB_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_cs_nOverlay1_Q_to_ram_RAMReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RAMReady_D();">cs/nOverlay1.Q to ram/RAMReady.D</A></TD>
+   <A NAME="_cs_nOverlay1_Q_to_ram_RAMEN_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RAMEN_D();">cs/nOverlay1.Q to ram/RAMEN.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RAMReady_D() {
+function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RAMEN_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("cs/nOverlay1.Q to ram/RAMReady.D")
+   aWindow.document.writeln("cs/nOverlay1.Q to ram/RAMEN.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1073,26 +6071,26 @@ function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RAMReady_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_cs_nOverlay1_Q_to_ram_RASEL_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RASEL_D();">cs/nOverlay1.Q to ram/RASEL.D</A></TD>
+   <A NAME="_cs_nOverlay1_Q_to_ram_RS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RS_FSM_FFd1_D();">cs/nOverlay1.Q to ram/RS_FSM_FFd1.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RASEL_D() {
+function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RS_FSM_FFd1_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("cs/nOverlay1.Q to ram/RASEL.D")
+   aWindow.document.writeln("cs/nOverlay1.Q to ram/RS_FSM_FFd1.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1107,26 +6105,60 @@ function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RASEL_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_fsb_ASrf_Q_to_fsb_Ready2r_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready2r_D();">fsb/ASrf.Q to fsb/Ready2r.D</A></TD>
+   <A NAME="_cs_nOverlay1_Q_to_ram_RS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RS_FSM_FFd2_D();">cs/nOverlay1.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_cs_nOverlay1_Q_to_ram_RS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("cs/nOverlay1.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_ASrf_Q_to_fsb_Ready0r_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready0r_D();">fsb/ASrf.Q to fsb/Ready0r.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">9.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready2r_D() {
+function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready0r_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to fsb/Ready2r.D")
+   aWindow.document.writeln("fsb/ASrf.Q to fsb/Ready0r.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1141,7 +6173,7 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready2r_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready2r.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready0r.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -1182,19 +6214,19 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IORW1_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_fsb_ASrf_Q_to_ram_RAMReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMReady_D();">fsb/ASrf.Q to ram/RAMReady.D</A></TD>
+   <A NAME="_fsb_ASrf_Q_to_iobs_IOReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IOReady_D();">fsb/ASrf.Q to iobs/IOReady.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">9.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMReady_D() {
+function TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IOReady_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to ram/RAMReady.D")
+   aWindow.document.writeln("fsb/ASrf.Q to iobs/IOReady.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1209,26 +6241,26 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMReady_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_fsb_ASrf_Q_to_ram_RASEL_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RASEL_D();">fsb/ASrf.Q to ram/RASEL.D</A></TD>
+   <A NAME="_fsb_ASrf_Q_to_ram_RAMEN_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMEN_D();">fsb/ASrf.Q to ram/RAMEN.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">9.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RASEL_D() {
+function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMEN_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to ram/RASEL.D")
+   aWindow.document.writeln("fsb/ASrf.Q to ram/RAMEN.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1243,7 +6275,109 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RASEL_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_ASrf_Q_to_ram_RS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd1_D();">fsb/ASrf.Q to ram/RS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">9.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/ASrf.Q to ram/RS_FSM_FFd1.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_ASrf_Q_to_ram_RS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd2_D();">fsb/ASrf.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">9.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/ASrf.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_ASrf_Q_to_ram_RS_FSM_FFd3_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd3_D();">fsb/ASrf.Q to ram/RS_FSM_FFd3.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">9.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd3_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/ASrf.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -1352,19 +6486,19 @@ function TS_CLK_FSB_fsb_Ready1r_Q_to_fsb_Ready1r_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_fsb_Ready2r_Q_to_fsb_Ready2r_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_Ready2r_Q_to_fsb_Ready2r_D();">fsb/Ready2r.Q to fsb/Ready2r.D</A></TD>
+   <A NAME="_iobs_IOACTr_Q_to_iobs_IOReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_IOReady_D();">iobs/IOACTr.Q to iobs/IOReady.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_fsb_Ready2r_Q_to_fsb_Ready2r_D() {
+function TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_IOReady_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/Ready2r.Q to fsb/Ready2r.D")
+   aWindow.document.writeln("iobs/IOACTr.Q to iobs/IOReady.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1375,45 +6509,11 @@ function TS_CLK_FSB_fsb_Ready2r_Q_to_fsb_Ready2r_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready2r</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOACTr</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready2r.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_Ready2r_Q_to_nDTACK_FSB_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_Ready2r_Q_to_nDTACK_FSB_D();">fsb/Ready2r.Q to nDTACK_FSB.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_Ready2r_Q_to_nDTACK_FSB_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/Ready2r.Q to nDTACK_FSB.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready2r</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nDTACK_FSB.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -1488,19 +6588,19 @@ function TS_CLK_FSB_iobs_IOReady_Q_to_fsb_Ready1r_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_iobs_PS_FSM_FFd1_Q_to_iobs_ALE0_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_ALE0_D();">iobs/PS_FSM_FFd1.Q to iobs/ALE0.D</A></TD>
+   <A NAME="_iobs_IOReady_Q_to_iobs_IOReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_IOReady_Q_to_iobs_IOReady_D();">iobs/IOReady.Q to iobs/IOReady.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_ALE0_D() {
+function TS_CLK_FSB_iobs_IOReady_Q_to_iobs_IOReady_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/PS_FSM_FFd1.Q to iobs/ALE0.D")
+   aWindow.document.writeln("iobs/IOReady.Q to iobs/IOReady.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1511,11 +6611,45 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_ALE0_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/ALE0.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobs_Once_Q_to_iobs_IOReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_Once_Q_to_iobs_IOReady_D();">iobs/Once.Q to iobs/IOReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_iobs_Once_Q_to_iobs_IOReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobs/Once.Q to iobs/IOReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/Once</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -1622,74 +6756,6 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_PS_FSM_FFd2_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_ALE0_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_ALE0_D();">iobs/PS_FSM_FFd2.Q to iobs/ALE0.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_ALE0_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to iobs/ALE0.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/ALE0.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IOREQ_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOREQ_D();">iobs/PS_FSM_FFd2.Q to iobs/IOREQ.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOREQ_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to iobs/IOREQ.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOREQ.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IORW1_D"></A>
@@ -1724,6 +6790,40 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IORW1_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IOReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOReady_D();">iobs/PS_FSM_FFd2.Q to iobs/IOReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to iobs/IOReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_Once_D"></A>
@@ -1828,19 +6928,19 @@ function TS_CLK_FSB_nADoutLE1_Q_to_fsb_Ready1r_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_nADoutLE1_Q_to_iobs_IOREQ_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOREQ_D();">nADoutLE1.Q to iobs/IOREQ.D</A></TD>
+   <A NAME="_nADoutLE1_Q_to_iobs_IOReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOReady_D();">nADoutLE1.Q to iobs/IOReady.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOREQ_D() {
+function TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOReady_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("nADoutLE1.Q to iobs/IOREQ.D")
+   aWindow.document.writeln("nADoutLE1.Q to iobs/IOReady.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1855,7 +6955,7 @@ function TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOREQ_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOREQ.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -1930,19 +7030,19 @@ function TS_CLK_FSB_nADoutLE1_Q_to_iobs_PS_FSM_FFd2_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_nADoutLE1_Q_to_nDTACK_FSB_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_nDTACK_FSB_D();">nADoutLE1.Q to nDTACK_FSB.D</A></TD>
+   <A NAME="_ram_BACTr_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_BACTr_Q_to_ram_RAMReady_D();">ram/BACTr.Q to ram/RAMReady.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_nADoutLE1_Q_to_nDTACK_FSB_D() {
+function TS_CLK_FSB_ram_BACTr_Q_to_ram_RAMReady_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("nADoutLE1.Q to nDTACK_FSB.D")
+   aWindow.document.writeln("ram/BACTr.Q to ram/RAMReady.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -1953,41 +7053,7 @@ function TS_CLK_FSB_nADoutLE1_Q_to_nDTACK_FSB_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nADoutLE1</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nDTACK_FSB.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_ram_RAMEN_Q_to_ram_RAMReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMReady_D();">ram/RAMEN.Q to ram/RAMReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RAMEN.Q to ram/RAMReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/BACTr</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
@@ -1998,19 +7064,53 @@ function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMReady_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RAMEN_Q_to_ram_RASEL_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RAMEN_Q_to_ram_RASEL_D();">ram/RAMEN.Q to ram/RASEL.D</A></TD>
+   <A NAME="_ram_BACTr_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_BACTr_Q_to_ram_RASEL_D();">ram/BACTr.Q to ram/RASEL.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RASEL_D() {
+function TS_CLK_FSB_ram_BACTr_Q_to_ram_RASEL_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RAMEN.Q to ram/RASEL.D")
+   aWindow.document.writeln("ram/BACTr.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/BACTr</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RAMEN_Q_to_ram_RAMEN_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMEN_D();">ram/RAMEN.Q to ram/RAMEN.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMEN_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RAMEN.Q to ram/RAMEN.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -2025,7 +7125,41 @@ function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RASEL_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RAMEN_Q_to_ram_RS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RAMEN_Q_to_ram_RS_FSM_FFd1_D();">ram/RAMEN.Q to ram/RS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RAMEN.Q to ram/RS_FSM_FFd1.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -2100,19 +7234,19 @@ function TS_CLK_FSB_ram_RAMReady_Q_to_nDTACK_FSB_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RAMReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMReady_D();">ram/RS_FSM_FFd1.Q to ram/RAMReady.D</A></TD>
+   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RAMEN_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMEN_D();">ram/RS_FSM_FFd1.Q to ram/RAMEN.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMReady_D() {
+function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMEN_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RAMReady.D")
+   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RAMEN.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -2127,26 +7261,26 @@ function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMReady_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RASEL_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RASEL_D();">ram/RS_FSM_FFd1.Q to ram/RASEL.D</A></TD>
+   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd1_D();">ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd1.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RASEL_D() {
+function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd1_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RASEL.D")
+   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd1.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -2161,26 +7295,60 @@ function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RASEL_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RASEL_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RASEL_D();">ram/RS_FSM_FFd2.Q to ram/RASEL.D</A></TD>
+   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd3_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd3_D();">ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd3.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RASEL_D() {
+function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd3_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RASEL.D")
+   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd1_D();">ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd1.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -2195,11 +7363,317 @@ function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RASEL_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd2_D();">ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd3_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd3_D();">ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd3.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd3_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D();">ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd3_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd3_D();">ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd3.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd3_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefReq_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefReq_Q_to_ram_RASEL_D();">ram/RefReq.Q to ram/RASEL.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefReq_Q_to_ram_RASEL_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefReq.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReq</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefUrgent_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RASEL_D();">ram/RefUrgent.Q to ram/RASEL.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RASEL_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefUrgent.Q to ram/RASEL.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefUrgent_Q_to_ram_RS_FSM_FFd1_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RS_FSM_FFd1_D();">ram/RefUrgent.Q to ram/RS_FSM_FFd1.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RS_FSM_FFd1_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefUrgent.Q to ram/RS_FSM_FFd1.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefUrgent_Q_to_ram_RS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RS_FSM_FFd2_D();">ram/RefUrgent.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefUrgent.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefUrgent_Q_to_ram_RS_FSM_FFd3_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RS_FSM_FFd3_D();">ram/RefUrgent.Q to ram/RS_FSM_FFd3.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">29.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RS_FSM_FFd3_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefUrgent.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_cs_nOverlay0_Q_to_cs_nOverlay0_D"></A>
@@ -2404,40 +7878,6 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_cs_nOverlay1_CE() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_ASrf_Q_to_fsb_Ready0r_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready0r_D();">fsb/ASrf.Q to fsb/Ready0r.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready0r_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to fsb/Ready0r.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready0r.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_fsb_ASrf_Q_to_fsb_Ready1r_D"></A>
@@ -2472,40 +7912,6 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_Ready1r_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_ASrf_Q_to_iobs_IOBS_BERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IOBS_BERR_D();">fsb/ASrf.Q to iobs/IOBS_BERR.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IOBS_BERR_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to iobs/IOBS_BERR.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOBS_BERR.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_fsb_ASrf_Q_to_iobs_IOREQ_D"></A>
@@ -2540,40 +7946,6 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IOREQ_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_ASrf_Q_to_iobs_IOReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IOReady_D();">fsb/ASrf.Q to iobs/IOReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_iobs_IOReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to iobs/IOReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_fsb_ASrf_Q_to_iobs_Load1_D"></A>
@@ -2678,19 +8050,19 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_iobs_PS_FSM_FFd2_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_fsb_ASrf_Q_to_ram_RAMEN_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMEN_D();">fsb/ASrf.Q to ram/RAMEN.D</A></TD>
+   <A NAME="_fsb_ASrf_Q_to_nBERR_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_nBERR_FSB_D();">fsb/ASrf.Q to nBERR_FSB.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMEN_D() {
+function TS_CLK_FSB_fsb_ASrf_Q_to_nBERR_FSB_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to ram/RAMEN.D")
+   aWindow.document.writeln("fsb/ASrf.Q to nBERR_FSB.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -2705,26 +8077,26 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMEN_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBERR_FSB.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_fsb_ASrf_Q_to_ram_RS_FSM_FFd3_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd3_D();">fsb/ASrf.Q to ram/RS_FSM_FFd3.D</A></TD>
+   <A NAME="_fsb_ASrf_Q_to_ram_BACTr_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_BACTr_D();">fsb/ASrf.Q to ram/BACTr.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd3_D() {
+function TS_CLK_FSB_fsb_ASrf_Q_to_ram_BACTr_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("fsb/ASrf.Q to ram/BACTr.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -2739,7 +8111,41 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RS_FSM_FFd3_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/BACTr.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_ASrf_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMReady_D();">fsb/ASrf.Q to ram/RAMReady.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_ASrf_Q_to_ram_RAMReady_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/ASrf.Q to ram/RAMReady.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -2812,40 +8218,6 @@ function TS_CLK_FSB_iobs_Clear1_Q_to_nADoutLE1_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_IOACTr_Q_to_iobs_IOBS_BERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_IOBS_BERR_D();">iobs/IOACTr.Q to iobs/IOBS_BERR.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_IOBS_BERR_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/IOACTr.Q to iobs/IOBS_BERR.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOACTr</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOBS_BERR.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_IOACTr_Q_to_iobs_IOREQ_D"></A>
@@ -2880,40 +8252,6 @@ function TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_IOREQ_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_IOACTr_Q_to_iobs_IOReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_IOReady_D();">iobs/IOACTr.Q to iobs/IOReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_IOReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/IOACTr.Q to iobs/IOReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOACTr</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_IOACTr_Q_to_iobs_PS_FSM_FFd1_D"></A>
@@ -2984,19 +8322,19 @@ function TS_CLK_FSB_iobs_IOACTr_Q_to_iobs_PS_FSM_FFd2_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_iobs_IOBS_BERR_Q_to_iobs_IOBS_BERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_IOBS_BERR_Q_to_iobs_IOBS_BERR_D();">iobs/IOBS_BERR.Q to iobs/IOBS_BERR.D</A></TD>
+   <A NAME="_iobs_IOACTr_Q_to_nBERR_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_IOACTr_Q_to_nBERR_FSB_D();">iobs/IOACTr.Q to nBERR_FSB.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_iobs_IOBS_BERR_Q_to_iobs_IOBS_BERR_D() {
+function TS_CLK_FSB_iobs_IOACTr_Q_to_nBERR_FSB_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/IOBS_BERR.Q to iobs/IOBS_BERR.D")
+   aWindow.document.writeln("iobs/IOACTr.Q to nBERR_FSB.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -3007,11 +8345,11 @@ function TS_CLK_FSB_iobs_IOBS_BERR_Q_to_iobs_IOBS_BERR_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOBS_BERR</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOACTr</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOBS_BERR.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBERR_FSB.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -3084,40 +8422,6 @@ function TS_CLK_FSB_iobs_IORW1_Q_to_iobs_IORW0_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_IOReady_Q_to_iobs_IOReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_IOReady_Q_to_iobs_IOReady_D();">iobs/IOReady.Q to iobs/IOReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_IOReady_Q_to_iobs_IOReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/IOReady.Q to iobs/IOReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_IOU1_Q_to_iobs_IOU0_D"></A>
@@ -3254,40 +8558,6 @@ function TS_CLK_FSB_iobs_Load1_Q_to_nADoutLE1_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_Once_Q_to_iobs_IOBS_BERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_Once_Q_to_iobs_IOBS_BERR_D();">iobs/Once.Q to iobs/IOBS_BERR.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_Once_Q_to_iobs_IOBS_BERR_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/Once.Q to iobs/IOBS_BERR.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/Once</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOBS_BERR.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_Once_Q_to_iobs_IOREQ_D"></A>
@@ -3356,40 +8626,6 @@ function TS_CLK_FSB_iobs_Once_Q_to_iobs_IORW1_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_Once_Q_to_iobs_IOReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_Once_Q_to_iobs_IOReady_D();">iobs/Once.Q to iobs/IOReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_Once_Q_to_iobs_IOReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/Once.Q to iobs/IOReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/Once</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_Once_Q_to_iobs_Load1_D"></A>
@@ -3458,6 +8694,74 @@ function TS_CLK_FSB_iobs_Once_Q_to_iobs_PS_FSM_FFd2_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobs_Once_Q_to_nBERR_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_Once_Q_to_nBERR_FSB_D();">iobs/Once.Q to nBERR_FSB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_iobs_Once_Q_to_nBERR_FSB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobs/Once.Q to nBERR_FSB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/Once</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBERR_FSB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobs_PS_FSM_FFd1_Q_to_iobs_ALE0_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_ALE0_D();">iobs/PS_FSM_FFd1.Q to iobs/ALE0.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_ALE0_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobs/PS_FSM_FFd1.Q to iobs/ALE0.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/ALE0.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_PS_FSM_FFd1_Q_to_iobs_Clear1_D"></A>
@@ -3662,6 +8966,40 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd1_Q_to_iobs_PS_FSM_FFd1_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_ALE0_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_ALE0_D();">iobs/PS_FSM_FFd2.Q to iobs/ALE0.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_ALE0_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to iobs/ALE0.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/ALE0.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_Clear1_D"></A>
@@ -3696,40 +9034,6 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_Clear1_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IOBS_BERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOBS_BERR_D();">iobs/PS_FSM_FFd2.Q to iobs/IOBS_BERR.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOBS_BERR_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to iobs/IOBS_BERR.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOBS_BERR.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IOL0_CE"></A>
@@ -3764,40 +9068,6 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOL0_CE() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IOReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOReady_D();">iobs/PS_FSM_FFd2.Q to iobs/IOReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_IOReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to iobs/IOReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobs_PS_FSM_FFd2_Q_to_iobs_IOU0_CE"></A>
@@ -3900,6 +9170,40 @@ function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_iobs_PS_FSM_FFd1_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobs_PS_FSM_FFd2_Q_to_nBERR_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_nBERR_FSB_D();">iobs/PS_FSM_FFd2.Q to nBERR_FSB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_iobs_PS_FSM_FFd2_Q_to_nBERR_FSB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobs/PS_FSM_FFd2.Q to nBERR_FSB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/PS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBERR_FSB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_nADoutLE1_Q_to_iobs_Clear1_D"></A>
@@ -3934,40 +9238,6 @@ function TS_CLK_FSB_nADoutLE1_Q_to_iobs_Clear1_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_nADoutLE1_Q_to_iobs_IOBS_BERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOBS_BERR_D();">nADoutLE1.Q to iobs/IOBS_BERR.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOBS_BERR_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("nADoutLE1.Q to iobs/IOBS_BERR.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nADoutLE1</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOBS_BERR.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_nADoutLE1_Q_to_iobs_IOL0_D"></A>
@@ -4036,40 +9306,6 @@ function TS_CLK_FSB_nADoutLE1_Q_to_iobs_IORW1_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_nADoutLE1_Q_to_iobs_IOReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOReady_D();">nADoutLE1.Q to iobs/IOReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_nADoutLE1_Q_to_iobs_IOReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("nADoutLE1.Q to iobs/IOReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nADoutLE1</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobs/IOReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_nADoutLE1_Q_to_iobs_IOU0_D"></A>
@@ -4174,19 +9410,19 @@ function TS_CLK_FSB_nADoutLE1_Q_to_nADoutLE1_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RAMEN_Q_to_ram_RAMEN_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMEN_D();">ram/RAMEN.Q to ram/RAMEN.D</A></TD>
+   <A NAME="_nADoutLE1_Q_to_nBERR_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_nBERR_FSB_D();">nADoutLE1.Q to nBERR_FSB.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMEN_D() {
+function TS_CLK_FSB_nADoutLE1_Q_to_nBERR_FSB_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RAMEN.Q to ram/RAMEN.D")
+   aWindow.document.writeln("nADoutLE1.Q to nBERR_FSB.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -4197,7 +9433,109 @@ function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMEN_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nADoutLE1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBERR_FSB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_nADoutLE1_Q_to_nDTACK_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nADoutLE1_Q_to_nDTACK_FSB_D();">nADoutLE1.Q to nDTACK_FSB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_nADoutLE1_Q_to_nDTACK_FSB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("nADoutLE1.Q to nDTACK_FSB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nADoutLE1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nDTACK_FSB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_nBERR_FSB_Q_to_nBERR_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_nBERR_FSB_Q_to_nBERR_FSB_D();">nBERR_FSB.Q to nBERR_FSB.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_nBERR_FSB_Q_to_nBERR_FSB_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("nBERR_FSB.Q to nBERR_FSB.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBERR_FSB</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nBERR_FSB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_BACTr_Q_to_ram_RAMEN_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_BACTr_Q_to_ram_RAMEN_D();">ram/BACTr.Q to ram/RAMEN.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_BACTr_Q_to_ram_RAMEN_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/BACTr.Q to ram/RAMEN.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/BACTr</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
@@ -4206,6 +9544,40 @@ function TS_CLK_FSB_ram_RAMEN_Q_to_ram_RAMEN_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_BACTr_Q_to_ram_RS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_BACTr_Q_to_ram_RS_FSM_FFd2_D();">ram/BACTr.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_BACTr_Q_to_ram_RS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/BACTr.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/BACTr</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_ram_RAMEN_Q_to_ram_RS_FSM_FFd3_D"></A>
@@ -4310,19 +9682,19 @@ function TS_CLK_FSB_ram_RASEL_Q_to_nCAS_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RAMEN_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMEN_D();">ram/RS_FSM_FFd1.Q to ram/RAMEN.D</A></TD>
+   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RAMReady_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMReady_D();">ram/RS_FSM_FFd1.Q to ram/RAMReady.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMEN_D() {
+function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMReady_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RAMEN.D")
+   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RAMReady.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -4337,26 +9709,26 @@ function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RAMEN_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd1_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd1_D();">ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd1.D</A></TD>
+   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RASEL_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RASEL_D();">ram/RS_FSM_FFd1.Q to ram/RASEL.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd1_D() {
+function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RASEL_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd1.D")
+   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RASEL.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -4371,7 +9743,7 @@ function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd1_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -4412,19 +9784,19 @@ function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd2_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd3_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd3_D();">ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd3.D</A></TD>
+   <A NAME="_ram_RS_FSM_FFd1_Q_to_ram_RefDone_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RefDone_D();">ram/RS_FSM_FFd1.Q to ram/RefDone.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd3_D() {
+function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RefDone_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("ram/RS_FSM_FFd1.Q to ram/RefDone.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -4439,7 +9811,7 @@ function TS_CLK_FSB_ram_RS_FSM_FFd1_Q_to_ram_RS_FSM_FFd3_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefDone.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -4514,19 +9886,19 @@ function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RAMEN_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RAMReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RAMReady_D();">ram/RS_FSM_FFd2.Q to ram/RAMReady.D</A></TD>
+   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RefDone_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RefDone_D();">ram/RS_FSM_FFd2.Q to ram/RefDone.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RAMReady_D() {
+function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RefDone_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RAMReady.D")
+   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RefDone.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -4541,109 +9913,7 @@ function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RAMReady_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd1_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd1_D();">ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd1.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd1_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd1.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd1.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd2_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd2_D();">ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd2.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd2_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd2.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd3_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd3_D();">ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd3.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_ram_RS_FSM_FFd2_Q_to_ram_RS_FSM_FFd3_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd3.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefDone.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -4716,74 +9986,6 @@ function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RAMEN_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RAMReady_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RAMReady_D();">ram/RS_FSM_FFd3.Q to ram/RAMReady.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RAMReady_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RAMReady.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMReady.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RASEL_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RASEL_D();">ram/RS_FSM_FFd3.Q to ram/RASEL.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RASEL_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RASEL.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RASEL.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd1_D"></A>
@@ -4820,19 +10022,19 @@ function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd1_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D();">ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <A NAME="_ram_RefDone_Q_to_ram_RefDone_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefDone_Q_to_ram_RefDone_D();">ram/RefDone.Q to ram/RefDone.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D() {
+function TS_CLK_FSB_ram_RefDone_Q_to_ram_RefDone_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("ram/RefDone.Q to ram/RefDone.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -4843,7 +10045,143 @@ function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefDone</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefDone.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefDone_Q_to_ram_RefReq_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefDone_Q_to_ram_RefReq_D();">ram/RefDone.Q to ram/RefReq.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefDone_Q_to_ram_RefReq_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefDone.Q to ram/RefReq.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefDone</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReq.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefDone_Q_to_ram_RefUrgent_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefDone_Q_to_ram_RefUrgent_D();">ram/RefDone.Q to ram/RefUrgent.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefDone_Q_to_ram_RefUrgent_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefDone.Q to ram/RefUrgent.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefDone</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefReq_Q_to_ram_RAMEN_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefReq_Q_to_ram_RAMEN_D();">ram/RefReq.Q to ram/RAMEN.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefReq_Q_to_ram_RAMEN_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefReq.Q to ram/RAMEN.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReq</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefReq_Q_to_ram_RS_FSM_FFd2_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefReq_Q_to_ram_RS_FSM_FFd2_D();">ram/RefReq.Q to ram/RS_FSM_FFd2.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefReq_Q_to_ram_RS_FSM_FFd2_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefReq.Q to ram/RS_FSM_FFd2.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReq</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
@@ -4854,19 +10192,19 @@ function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd2_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd3_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd3_D();">ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd3.D</A></TD>
+   <A NAME="_ram_RefReqSync_Q_to_ram_RefDone_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefReqSync_Q_to_ram_RefDone_D();">ram/RefReqSync.Q to ram/RefDone.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd3_D() {
+function TS_CLK_FSB_ram_RefReqSync_Q_to_ram_RefDone_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd3.D")
+   aWindow.document.writeln("ram/RefReqSync.Q to ram/RefDone.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -4877,11 +10215,113 @@ function TS_CLK_FSB_ram_RS_FSM_FFd3_Q_to_ram_RS_FSM_FFd3_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReqSync</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RS_FSM_FFd3.D</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefDone.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefReqSync_Q_to_ram_RefReq_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefReqSync_Q_to_ram_RefReq_D();">ram/RefReqSync.Q to ram/RefReq.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefReqSync_Q_to_ram_RefReq_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefReqSync.Q to ram/RefReq.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReqSync</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefReq.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RefUrgent_Q_to_ram_RAMEN_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RAMEN_D();">ram/RefUrgent.Q to ram/RAMEN.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RefUrgent_Q_to_ram_RAMEN_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RefUrgent.Q to ram/RAMEN.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RAMEN.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_ram_RegUrgentSync_Q_to_ram_RefUrgent_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_ram_RegUrgentSync_Q_to_ram_RefUrgent_D();">ram/RegUrgentSync.Q to ram/RefUrgent.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">30.000</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_ram_RegUrgentSync_Q_to_ram_RefUrgent_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("ram/RegUrgentSync.Q to ram/RefUrgent.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RegUrgentSync</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">ram/RefUrgent.D</TD>")
    aWindow.document.writeln("</TABLE>")
    aWindow.document.close()
 }
@@ -7449,6 +12889,40 @@ function TS_CLK2X_IOB_iobm_IOS_FSM_FFd2_Q_to_iobm_ALE0_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobm_IOS_FSM_FFd2_Q_to_iobm_DoutOE_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_IOS_FSM_FFd2_Q_to_iobm_DoutOE_D();">iobm/IOS_FSM_FFd2.Q to iobm/DoutOE.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">66.600</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">56.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK2X_IOB_iobm_IOS_FSM_FFd2_Q_to_iobm_DoutOE_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobm/IOS_FSM_FFd2.Q to iobm/DoutOE.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/IOS_FSM_FFd2</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/DoutOE.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobm_IOS_FSM_FFd2_Q_to_iobm_IOACT_D"></A>
@@ -7653,40 +13127,6 @@ function TS_CLK2X_IOB_iobm_IOS_FSM_FFd2_Q_to_nDinLE_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobm_IOS_FSM_FFd2_Q_to_nDoutOE_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_IOS_FSM_FFd2_Q_to_nDoutOE_D();">iobm/IOS_FSM_FFd2.Q to nDoutOE.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">66.600</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">56.600</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK2X_IOB_iobm_IOS_FSM_FFd2_Q_to_nDoutOE_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobm/IOS_FSM_FFd2.Q to nDoutOE.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/IOS_FSM_FFd2</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nDoutOE.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobm_IOS_FSM_FFd2_Q_to_nLDS_IOB_D"></A>
@@ -7789,6 +13229,40 @@ function TS_CLK2X_IOB_iobm_IOS_FSM_FFd3_Q_to_iobm_ALE0_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobm_IOS_FSM_FFd3_Q_to_iobm_DoutOE_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_IOS_FSM_FFd3_Q_to_iobm_DoutOE_D();">iobm/IOS_FSM_FFd3.Q to iobm/DoutOE.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">66.600</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">56.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK2X_IOB_iobm_IOS_FSM_FFd3_Q_to_iobm_DoutOE_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobm/IOS_FSM_FFd3.Q to iobm/DoutOE.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/IOS_FSM_FFd3</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/DoutOE.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobm_IOS_FSM_FFd3_Q_to_iobm_IOS_FSM_FFd1_D"></A>
@@ -7925,40 +13399,6 @@ function TS_CLK2X_IOB_iobm_IOS_FSM_FFd3_Q_to_nAS_IOB_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobm_IOS_FSM_FFd3_Q_to_nDoutOE_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_IOS_FSM_FFd3_Q_to_nDoutOE_D();">iobm/IOS_FSM_FFd3.Q to nDoutOE.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">66.600</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">56.600</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK2X_IOB_iobm_IOS_FSM_FFd3_Q_to_nDoutOE_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobm/IOS_FSM_FFd3.Q to nDoutOE.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/IOS_FSM_FFd3</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nDoutOE.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobm_IOS_FSM_FFd3_Q_to_nLDS_IOB_D"></A>
@@ -8061,40 +13501,6 @@ function TS_CLK2X_IOB_iobm_RESrf_Q_to_iobm_IOS_FSM_FFd2_D() {
    aWindow.document.close()
 }
 //-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobm_RESrr_Q_to_iobm_BG_CE"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_RESrr_Q_to_iobm_BG_CE();">iobm/RESrr.Q to iobm/BG.CE</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">66.600</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">56.600</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK2X_IOB_iobm_RESrr_Q_to_iobm_BG_CE() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobm/RESrr.Q to iobm/BG.CE")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/RESrr</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tPTSR + tECSU</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/BG.CE</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
 </SCRIPT>
   <TR>
    <A NAME="_iobm_RESrr_Q_to_iobm_IOS_FSM_FFd2_D"></A>
@@ -8197,6 +13603,74 @@ function TS_CLK2X_IOB_iobm_VPArr_Q_to_nVMA_IOB_D() {
    aWindow.document.close()
 }
 //-->
+</SCRIPT>
+  <TR>
+   <A NAME="_iobm_nASr_Q_to_iobm_BG_CE"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_nASr_Q_to_iobm_BG_CE();">iobm/nASr.Q to iobm/BG.CE</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">66.600</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">56.600</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK2X_IOB_iobm_nASr_Q_to_iobm_BG_CE() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("iobm/nASr.Q to iobm/BG.CE")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/nASr</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tPTSR + tECSU</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/BG.CE</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_nAS_IOB_Q_to_iobm_nASr_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_nAS_IOB_Q_to_iobm_nASr_D();">nAS_IOB.Q to iobm/nASr.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">33.300</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">10.000</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">23.300</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK2X_IOB_nAS_IOB_Q_to_iobm_nASr_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("nAS_IOB.Q to iobm/nASr.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nAS_IOB</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">9.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/nASr.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
 </SCRIPT>
   <TR>
    <A NAME="_nVMA_IOB_Q_to_iobm_ETACK_D"></A>
@@ -8282,39 +13756,31 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Reason</TH>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">111.111</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Clock Pulse Width for CLK_IOB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">E</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">71.429</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Clock Pulse Width for E</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">81.967</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for CLK_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">FCLK</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">87.719</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for FCLK</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK2X_IOB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">C8M</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">100.000</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for C8M</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">C16M</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">90.909</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for CLK2X_IOB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for C16M</TD>
   </TR>
  </TABLE>
  <BR>
  <A NAME="SetupHoldTimesForClocks"></a>
  <h3 CLASS="cpldta_text_subsection_header">Setup/Hold Times for Clocks</h3>
  <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock CLK_IOB</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="60%" CLASS="cpldta_constraint_header">Source Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Setup to clk (edge) </TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Hold to clk (edge) </TH>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">E_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
- </TABLE><BR>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock CLK_FSB</B></CAPTION>
+  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock FCLK</B></CAPTION>
   <TR>
    <TH BGCOLOR="#FFFFCC" WIDTH="60%" CLASS="cpldta_constraint_header">Source Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Setup to clk (edge) </TH>
@@ -8322,87 +13788,87 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<10></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<11></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<12></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<13></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<14></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<15></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<16></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<17></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<18></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<19></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<8></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<9></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.300</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.300</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
@@ -8417,19 +13883,37 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">8.700</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
  </TABLE><BR>
  <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock CLK2X_IOB</B></CAPTION>
+  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock C8M</B></CAPTION>
   <TR>
    <TH BGCOLOR="#FFFFCC" WIDTH="60%" CLASS="cpldta_constraint_header">Source Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Setup to clk (edge) </TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Hold to clk (edge) </TH>
   </TR>
   <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">CLK_IOB</TD>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">E</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nIPL2</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
+  </TR>
+ </TABLE><BR>
+ <TABLE  WIDTH="80%" border="1" ALIGN="center">
+  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock C16M</B></CAPTION>
+  <TR>
+   <TH BGCOLOR="#FFFFCC" WIDTH="60%" CLASS="cpldta_constraint_header">Source Pad</TH>
+   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Setup to clk (edge) </TH>
+   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Hold to clk (edge) </TH>
+  </TR>
+  <TR>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">C8M</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.500</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
@@ -8448,6 +13932,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nRES</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nVPA_IOB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
@@ -8458,19 +13947,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
  <A NAME="ClockToPadTiming"></a>
  <h3 CLASS="cpldta_text_subsection_header">Clock to Pad Timing</h3>
  <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock CLK_FSB to Pad</B></CAPTION>
+  <CAPTION CLASS="cpldta_text_caption"><B>Clock FCLK to Pad</B></CAPTION>
   <TR>
    <TH BGCOLOR="#FFFFCC" WIDTH="80%" CLASS="cpldta_constraint_header">Destination Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Clock (edge) to Pad </TH>
   </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
-  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<4></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
@@ -8479,20 +13960,36 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
   <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
   <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
   <TR>
@@ -8507,14 +14004,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE0</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
@@ -8523,10 +14012,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nVPA_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
@@ -8535,6 +14020,10 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE1</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nCAS</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
@@ -8545,7 +14034,46 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
  </TABLE><BR>
  <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock CLK2X_IOB to Pad</B></CAPTION>
+  <CAPTION CLASS="cpldta_text_caption"><B>Clock C8M to Pad</B></CAPTION>
+  <TR>
+   <TH BGCOLOR="#FFFFCC" WIDTH="80%" CLASS="cpldta_constraint_header">Destination Pad</TH>
+   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Clock (edge) to Pad </TH>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nAS_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nLDS_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRES</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nUDS_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nVMA_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDoutOE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nAoutOE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nBR_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
+  </TR>
+ </TABLE><BR>
+ <TABLE  WIDTH="80%" border="1" ALIGN="center">
+  <CAPTION CLASS="cpldta_text_caption"><B>Clock C16M to Pad</B></CAPTION>
   <TR>
    <TH BGCOLOR="#FFFFCC" WIDTH="80%" CLASS="cpldta_constraint_header">Destination Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Clock (edge) to Pad </TH>
@@ -8554,6 +14082,10 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE0</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDoutOE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nAS_IOB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
@@ -8562,10 +14094,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDinLE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
   </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDoutOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nLDS_IOB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
@@ -8583,7 +14111,145 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
  <A NAME="ClockToSetupTimesForClocks"></a>
  <h3 CLASS="cpldta_text_subsection_header">Clock to Setup Times for Clocks</h3>
  <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock CLK_FSB</B></CAPTION>
+  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock E</B></CAPTION>
+  <TR>
+   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Source</TH>
+   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination</TH>
+   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefReq.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefUrgent.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefReq.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefUrgent.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefReq.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefUrgent.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefReq.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefUrgent.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<0>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<1>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimerTC.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/Timer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+ </TABLE><BR>
+ <TABLE  WIDTH="80%" border="1" ALIGN="center">
+  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock FCLK</B></CAPTION>
   <TR>
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Source</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination</TH>
@@ -8592,22 +14258,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">12.200</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">12.200</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">12.200</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">12.200</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
@@ -8619,6 +14270,21 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW0.D</TD>
@@ -8629,6 +14295,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
@@ -8639,6 +14310,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW0.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW0.D</TD>
@@ -8669,6 +14345,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW0.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOREQ.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW0.D</TD>
@@ -8679,6 +14360,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOREQ.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW0.D</TD>
@@ -8690,13 +14376,48 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReq.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -8726,17 +14447,22 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -8746,12 +14472,27 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -8770,13 +14511,8 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -8790,8 +14526,13 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/ALE0.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -8809,21 +14550,16 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/ALE0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
@@ -8841,7 +14577,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOREQ.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -8855,20 +14591,25 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
@@ -8881,19 +14622,69 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReq.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay0.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay0.D</TD>
@@ -8924,31 +14715,16 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.CE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOBS_BERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOREQ.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
@@ -8966,12 +14742,17 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -8984,21 +14765,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOBS_BERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOREQ.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.D</TD>
@@ -9010,8 +14781,8 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOBS_BERR.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOBS_BERR.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -9024,11 +14795,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW0.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOU1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOU0.D</TD>
@@ -9049,11 +14815,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOBS_BERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOREQ.D</TD>
@@ -9064,11 +14825,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
@@ -9079,6 +14835,16 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/ALE0.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.D</TD>
@@ -9109,26 +14875,21 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/ALE0.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOBS_BERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOL0.CE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOU0.CE</TD>
@@ -9145,13 +14906,13 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOBS_BERR.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -9164,11 +14925,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOU0.D</TD>
@@ -9185,10 +14941,30 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
@@ -9206,92 +14982,790 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefRAS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefRAS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefDone.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefRAS.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefDone.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefRAS.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefDone.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefDone.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefDone.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReq.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefDone.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReq.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReq.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReqSync.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefDone.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReqSync.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefReq.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMEN.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RegUrgentSync.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RefUrgent.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
  </TABLE><BR>
  <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock CLK2X_IOB</B></CAPTION>
+  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock C8M</B></CAPTION>
+  <TR>
+   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Source</TH>
+   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination</TH>
+   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/IPL2r.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/IPL2r.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<0>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/nRESout.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<8>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<10>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<11>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<12>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<13>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/LTimer<9>.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/nRESout.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/nRESout.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/PORS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/nRESout.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/nRESout.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+ </TABLE><BR>
+ <TABLE  WIDTH="80%" border="1" ALIGN="center">
+  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock C16M</B></CAPTION>
   <TR>
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Source</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination</TH>
@@ -9672,6 +16146,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ALE0.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOACT.D</TD>
@@ -9702,11 +16181,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinLE.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
@@ -9722,6 +16196,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ALE0.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.D</TD>
@@ -9742,11 +16221,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
@@ -9762,11 +16236,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BG.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrr.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
@@ -9782,6 +16251,16 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/nASr.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BG.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/nASr.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
@@ -9802,44 +16281,44 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<11></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<14></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<4></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<15></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<2></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<3></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -9852,16 +16331,41 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<7></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<9></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<10></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<11></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<12></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
@@ -9872,6 +16376,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<14></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<4></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<16></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
@@ -9912,11 +16421,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<10></TD>
@@ -9932,11 +16436,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
@@ -9947,11 +16446,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
@@ -9963,8 +16457,13 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<2></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<3></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -9972,21 +16471,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<7></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<8></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<7></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
@@ -9997,11 +16486,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
@@ -10022,11 +16506,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVPA_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_FSB</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
@@ -10042,11 +16521,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
@@ -10061,10 +16535,10 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
  <BR>
 <HR>
 <BR><SPAN CLASS="cpldta_text_normal_bold"><B>Number of paths analyzed:</B></SPAN> 
-<SPAN CLASS="cpldta_text_normal">239</SPAN>
+<SPAN CLASS="cpldta_text_normal">400</SPAN>
 <BR><SPAN CLASS="cpldta_text_normal_bold"><B>Number of Timing errors:</B></SPAN> 
 <SPAN CLASS="cpldta_text_normal">0</SPAN>
-<BR><SPAN CLASS="cpldta_text_normal_bold"><B>Analysis Completed:</B></SPAN> <SPAN CLASS="cpldta_text_normal">Mon Mar 20 21:19:09 2023
+<BR><SPAN CLASS="cpldta_text_normal_bold"><B>Analysis Completed:</B></SPAN> <SPAN CLASS="cpldta_text_normal">Sat Mar 25 00:05:47 2023
 </SPAN>
 <HR>
 </HTML>
diff --git a/cpld/XC95144XL/WarpSE_ngdbuild.xrpt b/cpld/XC95144XL/WarpSE_ngdbuild.xrpt
index 6fe6300..e48de28 100644
--- a/cpld/XC95144XL/WarpSE_ngdbuild.xrpt
+++ b/cpld/XC95144XL/WarpSE_ngdbuild.xrpt
@@ -5,7 +5,7 @@
     The structure and the elements are likely to change over the next few releases.
     This means code written to parse this file will need to be revisited each subsequent release.-->
 
-  <application stringID="NgdBuild" timeStamp="Mon Mar 20 23:54:00 2023">
+  <application stringID="NgdBuild" timeStamp="Sat Mar 25 00:52:21 2023">
     <section stringID="User_Env">
       <table stringID="User_EnvVar">
         <column stringID="variable"/>
@@ -67,15 +67,14 @@
       </section>
       <section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
         <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="172"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="20"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="19"/>
         <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="15"/>
         <item dataType="int" stringID="NGDBUILD_NUM_AND5" value="3"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_BUFE" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_FD" value="63"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="33"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_FD" value="62"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="32"/>
         <item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="36"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="238"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="35"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="236"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="31"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="98"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="4"/>
@@ -84,13 +83,12 @@
       </section>
       <section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
         <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="172"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="20"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="19"/>
         <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="15"/>
         <item dataType="int" stringID="NGDBUILD_NUM_AND5" value="3"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_BUFE" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="64"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="63"/>
         <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="40"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="238"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="236"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="31"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="98"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="4"/>
diff --git a/cpld/XC95144XL/WarpSE_pad.csv b/cpld/XC95144XL/WarpSE_pad.csv
index 503fc99..d608956 100644
--- a/cpld/XC95144XL/WarpSE_pad.csv
+++ b/cpld/XC95144XL/WarpSE_pad.csv
@@ -1,7 +1,7 @@
 Release 8.1i - Fit P.20131013
 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
 
- 3-20-2023 11:54PM
+ 3-25-2023  0:52AM
 
 NOTE: This file is designed to be imported into a spreadsheet program
 such as Microsoft Excel for viewing, printing and sorting. The comma ','
@@ -90,7 +90,7 @@ P69,GND,,GND,,,,,,,,,,
 P70,nBERR_FSB,O,I/O,OUTPUT,,,,,,,,,
 P71,TIE,,I/O,,,,,,,,,,
 P72,nBR_IOB,O,I/O,OUTPUT,,,,,,,,,
-P73,nBG_IOB,I,I/O,INPUT,,,,,,,,,
+P73,TIE,,I/O,,,,,,,,,,
 P74,nVMA_IOB,O,I/O,OUTPUT,,,,,,,,,
 P75,GND,,GND,,,,,,,,,,
 P76,nBERR_IOB,I,I/O,INPUT,,,,,,,,,
diff --git a/cpld/XC95144XL/WarpSE_summary.html b/cpld/XC95144XL/WarpSE_summary.html
index 8f716d5..61e962a 100644
--- a/cpld/XC95144XL/WarpSE_summary.html
+++ b/cpld/XC95144XL/WarpSE_summary.html
@@ -2,7 +2,7 @@
 <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
 <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='4'><B>WarpSE Project Status</B></TD></TR>
+<TD ALIGN=CENTER COLSPAN='4'><B>WarpSE Project Status (03/25/2023 - 00:52:44)</B></TD></TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
 <TD>WarpSE.xise</TD>
@@ -25,7 +25,7 @@ No Errors</TD>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
 <TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
-<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/*.xmsgs?&DataKey=Warning'>4 Warnings (0 new)</A></TD>
+<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/*.xmsgs?&DataKey=Warning'>5 Warnings (0 new)</A></TD>
 </TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
@@ -65,9 +65,9 @@ System Settings</A>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
 <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
 <TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\WarpSE.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Mon Mar 20 23:53:54 2023</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/xst.xmsgs?&DataKey=Warning'>4 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\WarpSE.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mon Mar 20 23:54:00 2023</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\WarpSE.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Mon Mar 20 23:54:12 2023</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>4 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\WarpSE.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Sat Mar 25 00:52:16 2023</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/xst.xmsgs?&DataKey=Warning'>5 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\WarpSE.bld'>Translation Report</A></TD><TD>Current</TD><TD>Sat Mar 25 00:52:22 2023</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\WarpSE.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Sat Mar 25 00:52:35 2023</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>5 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
 <TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
 </TABLE>
 &nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
@@ -77,5 +77,5 @@ System Settings</A>
 </TABLE>
 
 
-<br><center><b>Date Generated:</b> 03/21/2023 - 00:22:40</center>
+<br><center><b>Date Generated:</b> 03/25/2023 - 00:52:44</center>
 </BODY></HTML>
\ No newline at end of file
diff --git a/cpld/XC95144XL/WarpSE_xst.xrpt b/cpld/XC95144XL/WarpSE_xst.xrpt
index 26370f2..16abc98 100644
--- a/cpld/XC95144XL/WarpSE_xst.xrpt
+++ b/cpld/XC95144XL/WarpSE_xst.xrpt
@@ -5,7 +5,7 @@
     The structure and the elements are likely to change over the next few releases.
     This means code written to parse this file will need to be revisited each subsequent release.-->
 
-  <application stringID="Xst" timeStamp="Mon Mar 20 23:53:39 2023">
+  <application stringID="Xst" timeStamp="Sat Mar 25 00:52:01 2023">
     <section stringID="User_Env">
       <table stringID="User_EnvVar">
         <column stringID="variable"/>
@@ -78,8 +78,8 @@
       <item dataType="int" stringID="XST_COUNTERS" value="3">
         <item dataType="int" stringID="XST_4BIT_UP_COUNTER" value="1"/>
       </item>
-      <item dataType="int" stringID="XST_REGISTERS" value="63">
-        <item dataType="int" stringID="XST_1BIT_REGISTER" value="63"/>
+      <item dataType="int" stringID="XST_REGISTERS" value="61">
+        <item dataType="int" stringID="XST_1BIT_REGISTER" value="61"/>
       </item>
       <item dataType="int" stringID="XST_TRISTATES" value="5">
         <item dataType="int" stringID="XST_1BIT_TRISTATE_BUFFER" value="5"/>
@@ -90,8 +90,8 @@
       <item dataType="int" stringID="XST_COUNTERS" value="3">
         <item dataType="int" stringID="XST_4BIT_UP_COUNTER" value="1"/>
       </item>
-      <item dataType="int" stringID="XST_REGISTERS" value="51">
-        <item dataType="int" stringID="XST_FLIPFLOPS" value="51"/>
+      <item dataType="int" stringID="XST_REGISTERS" value="49">
+        <item dataType="int" stringID="XST_FLIPFLOPS" value="49"/>
       </item>
     </section>
     <section stringID="XST_PARTITION_REPORT">
@@ -111,30 +111,29 @@
         <item stringID="XST_IOS" value="75"/>
       </section>
       <section stringID="XST_CELL_USAGE">
-        <item dataType="int" stringID="XST_BELS" value="577">
+        <item dataType="int" stringID="XST_BELS" value="574">
           <item dataType="int" stringID="XST_AND2" value="172"/>
-          <item dataType="int" stringID="XST_AND3" value="20"/>
+          <item dataType="int" stringID="XST_AND3" value="19"/>
           <item dataType="int" stringID="XST_AND4" value="15"/>
           <item dataType="int" stringID="XST_GND" value="1"/>
-          <item dataType="int" stringID="XST_INV" value="238"/>
+          <item dataType="int" stringID="XST_INV" value="236"/>
           <item dataType="int" stringID="XST_OR2" value="98"/>
           <item dataType="int" stringID="XST_VCC" value="1"/>
           <item dataType="int" stringID="XST_XOR2" value="20"/>
         </item>
-        <item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="96">
-          <item dataType="int" stringID="XST_FD" value="63"/>
-          <item dataType="int" stringID="XST_FDCE" value="33"/>
+        <item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="94">
+          <item dataType="int" stringID="XST_FD" value="62"/>
+          <item dataType="int" stringID="XST_FDCE" value="32"/>
         </item>
-        <item dataType="int" stringID="XST_TRISTATES" value="1"></item>
-        <item dataType="int" stringID="XST_IO_BUFFERS" value="72">
-          <item dataType="int" stringID="XST_IBUF" value="36"/>
+        <item dataType="int" stringID="XST_IO_BUFFERS" value="71">
+          <item dataType="int" stringID="XST_IBUF" value="35"/>
           <item dataType="int" stringID="XST_OBUF" value="31"/>
         </item>
       </section>
     </section>
     <section stringID="XST_ERRORS_STATISTICS">
       <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
-      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="4"/>
+      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="5"/>
       <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="0"/>
     </section>
   </application>
diff --git a/cpld/XC95144XL/_impact.cmd b/cpld/XC95144XL/_impact.cmd
new file mode 100644
index 0000000..e69de29
diff --git a/cpld/XC95144XL/_impact.log b/cpld/XC95144XL/_impact.log
new file mode 100644
index 0000000..6dfc460
--- /dev/null
+++ b/cpld/XC95144XL/_impact.log
@@ -0,0 +1,121 @@
+iMPACT Version: 14.7
+
+iMPACT log file Started on Sat Mar 25 00:06:03 2023
+
+Welcome to iMPACT
+iMPACT Version: 14.7
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : addDevice -p 1 -file"C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed"
+'1': Loading file'C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed' ...
+done.
+INFO:iMPACT:1777 - 
+   Reading C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.bsd...
+INFO:iMPACT:501 - '1': Added Device xc95144xl successfully.
+----------------------------------------------------------------------
+GUI --- Auto connect to cable...
+// *** BATCH CMD : setCable -port auto
+INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.4
+INFO:iMPACT - Digilent Plugin: found 1 device(s).
+INFO:iMPACT - Digilent Plugin: opening device: "JtagSmt2", SN:210251A08870
+INFO:iMPACT - Digilent Plugin: User Name: JtagSmt2
+INFO:iMPACT - Digilent Plugin: Product Name: Digilent JTAG-SMT2
+INFO:iMPACT - Digilent Plugin: Serial Number: 210251A08870
+INFO:iMPACT - Digilent Plugin: Product ID: 31000154
+INFO:iMPACT - Digilent Plugin: Firmware Version: 0108
+INFO:iMPACT - Digilent Plugin: JTAG Port Number: 0
+INFO:iMPACT - Digilent Plugin: JTAG Clock Frequency: 10000000 Hz
+INFO:iMPACT - Current time: 3/25/2023 12:06:33 AM
+// *** BATCH CMD : Program -p 1 -e 
+Maximum TCK operating frequency for this device chain: 10000000.
+Validating chain...
+Boundary-scan chain validated successfully.
+'1': Erasing device...
+PROGRESS_START - Starting Operation.
+'1': Erasure completed successfully.
+'1': Programming device...
+done.
+'1': Putting device in ISP mode...done.
+'1': Putting device in ISP mode...done.
+'1': Programming completed successfully.
+PROGRESS_END - End Operation.
+Elapsed time =      4 sec.
+INFO:iMPACT - Current time: 3/25/2023 12:15:44 AM
+Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed...
+// *** BATCH CMD : Program -p 1 -e 
+Maximum TCK operating frequency for this device chain: 10000000.
+Validating chain...
+Boundary-scan chain validated successfully.
+'1': Erasing device...
+PROGRESS_START - Starting Operation.
+'1': Erasure completed successfully.
+'1': Programming device...
+done.
+'1': Putting device in ISP mode...done.
+'1': Putting device in ISP mode...done.
+'1': Programming completed successfully.
+PROGRESS_END - End Operation.
+Elapsed time =      2 sec.
+INFO:iMPACT - Current time: 3/25/2023 12:25:37 AM
+Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed...
+// *** BATCH CMD : Program -p 1 -e 
+Maximum TCK operating frequency for this device chain: 10000000.
+Validating chain...
+Boundary-scan chain validated successfully.
+'1': Erasing device...
+PROGRESS_START - Starting Operation.
+'1': Erasure completed successfully.
+'1': Programming device...
+done.
+'1': Putting device in ISP mode...done.
+'1': Putting device in ISP mode...done.
+'1': Programming completed successfully.
+PROGRESS_END - End Operation.
+Elapsed time =      5 sec.
+INFO:iMPACT - Current time: 3/25/2023 12:28:53 AM
+Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed...
+// *** BATCH CMD : Program -p 1 -e 
+Maximum TCK operating frequency for this device chain: 10000000.
+Validating chain...
+Boundary-scan chain validated successfully.
+'1': Erasing device...
+PROGRESS_START - Starting Operation.
+'1': Erasure completed successfully.
+'1': Programming device...
+done.
+'1': Putting device in ISP mode...done.
+'1': Putting device in ISP mode...done.
+'1': Programming completed successfully.
+PROGRESS_END - End Operation.
+Elapsed time =      5 sec.
+INFO:iMPACT - Current time: 3/25/2023 12:45:23 AM
+Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed...
+// *** BATCH CMD : Program -p 1 -e 
+Maximum TCK operating frequency for this device chain: 10000000.
+Validating chain...
+Boundary-scan chain validated successfully.
+'1': Erasing device...
+PROGRESS_START - Starting Operation.
+'1': Erasure completed successfully.
+'1': Programming device...
+done.
+'1': Putting device in ISP mode...done.
+'1': Putting device in ISP mode...done.
+'1': Programming completed successfully.
+PROGRESS_END - End Operation.
+Elapsed time =      4 sec.
+INFO:iMPACT - Current time: 3/25/2023 12:54:24 AM
+Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed...
+// *** BATCH CMD : Program -p 1 -e 
+Maximum TCK operating frequency for this device chain: 10000000.
+Validating chain...
+Boundary-scan chain validated successfully.
+'1': Erasing device...
+PROGRESS_START - Starting Operation.
+'1': Erasure completed successfully.
+'1': Programming device...
+done.
+'1': Putting device in ISP mode...done.
+'1': Putting device in ISP mode...done.
+'1': Programming completed successfully.
+PROGRESS_END - End Operation.
+Elapsed time =      5 sec.
diff --git a/cpld/XC95144XL/_ngo/netlist.lst b/cpld/XC95144XL/_ngo/netlist.lst
index cc510e4..4b32a75 100644
--- a/cpld/XC95144XL/_ngo/netlist.lst
+++ b/cpld/XC95144XL/_ngo/netlist.lst
@@ -1,2 +1,2 @@
-C:\Users\Wolf\Documents\GitHub\Warp-SE\cpld\XC95144XL\WarpSE.ngc 1679370834
+C:\Users\Wolf\Documents\GitHub\Warp-SE\cpld\XC95144XL\WarpSE.ngc 1679719936
 OK
diff --git a/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs b/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs
index 097ef6c..b14994b 100644
--- a/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs
+++ b/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs
@@ -26,5 +26,8 @@
 <msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">SW&lt;3&gt;</arg>&apos;.  The input(s) are unused after optimization. Please verify functionality via simulation.
 </msg>
 
+<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">nBG_IOB</arg>&apos;.  The input(s) are unused after optimization. Please verify functionality via simulation.
+</msg>
+
 </messages>
 
diff --git a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs
index fad331c..f90a5c8 100644
--- a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs
+++ b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs
@@ -8,26 +8,8 @@
 <!-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.    -->
 
 <messages>
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/CNT.v&quot; into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/CS.v&quot; into library work</arg>
-</msg>
-
 <msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/FSB.v&quot; into library work</arg>
 </msg>
 
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/IOBM.v&quot; into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/IOBS.v&quot; into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/RAM.v&quot; into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE.v&quot; into library work</arg>
-</msg>
-
 </messages>
 
diff --git a/cpld/XC95144XL/_xmsgs/xst.xmsgs b/cpld/XC95144XL/_xmsgs/xst.xmsgs
index 02e54d3..e9ee543 100644
--- a/cpld/XC95144XL/_xmsgs/xst.xmsgs
+++ b/cpld/XC95144XL/_xmsgs/xst.xmsgs
@@ -11,6 +11,9 @@
 <msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">SW</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
 </msg>
 
+<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">nBG_IOB</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+</msg>
+
 <msg type="warning" file="Xst" num="646" delta="old" >Signal &lt;<arg fmt="%s" index="1">SndRAMCSWR</arg>&gt; is assigned but never used. This unconnected signal will be trimmed during the optimization process.
 </msg>
 
diff --git a/cpld/XC95144XL/iseconfig/WarpSE.projectmgr b/cpld/XC95144XL/iseconfig/WarpSE.projectmgr
index 3289b80..cc2d495 100644
--- a/cpld/XC95144XL/iseconfig/WarpSE.projectmgr
+++ b/cpld/XC95144XL/iseconfig/WarpSE.projectmgr
@@ -10,17 +10,20 @@
          <ClosedNode>/MXSE Z:|Warp-SE|cpld|WarpSE.v</ClosedNode>
       </ClosedNodes>
       <SelectedItems>
-         <SelectedItem>iobs - IOBS (C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/IOBS.v)</SelectedItem>
+         <SelectedItem>WarpSE (C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE.v)</SelectedItem>
       </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
       <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000000d2000000020000000000000000000000000200000064ffffffff000000810000000300000002000000d20000000100000003000000000000000100000003</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
-      <CurrentItem>iobs - IOBS (C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/IOBS.v)</CurrentItem>
+      <CurrentItem>WarpSE (C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE.v)</CurrentItem>
    </ItemView>
    <ItemView engineview="SynthesisOnly" sourcetype="DESUT_VERILOG" guiview="Process" >
       <ClosedNodes>
          <ClosedNodesVersion>1</ClosedNodesVersion>
+         <ClosedNode>Design Utilities</ClosedNode>
+         <ClosedNode>Implement Design/Optional Implementation Tools</ClosedNode>
+         <ClosedNode>Implement Design/Synthesize - XST</ClosedNode>
          <ClosedNode>User Constraints</ClosedNode>
       </ClosedNodes>
       <SelectedItems>
diff --git a/cpld/XC95144XL/iseconfig/WarpSE.xreport b/cpld/XC95144XL/iseconfig/WarpSE.xreport
index 065fa18..2c16786 100644
--- a/cpld/XC95144XL/iseconfig/WarpSE.xreport
+++ b/cpld/XC95144XL/iseconfig/WarpSE.xreport
@@ -1,7 +1,7 @@
 <?xml version='1.0' encoding='UTF-8'?>
 <report-views version="2.0" >
  <header>
-  <DateModified>2023-03-21T00:22:40</DateModified>
+  <DateModified>2023-03-25T00:05:10</DateModified>
   <ModuleName>WarpSE</ModuleName>
   <SummaryTimeStamp>Unknown</SummaryTimeStamp>
   <SavedFilePath>C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/iseconfig/WarpSE.xreport</SavedFilePath>
diff --git a/cpld/XC95144XL/webtalk_pn.xml b/cpld/XC95144XL/webtalk_pn.xml
index 3cc7e70..79fb39d 100644
--- a/cpld/XC95144XL/webtalk_pn.xml
+++ b/cpld/XC95144XL/webtalk_pn.xml
@@ -3,7 +3,7 @@
 <!--The data in this file is primarily intended for consumption by Xilinx tools.
 The structure and the elements are likely to change over the next few releases.
 This means code written to parse this file will need to be revisited each subsequent release.-->
-<application name="pn" timeStamp="Mon Mar 20 23:53:38 2023">
+<application name="pn" timeStamp="Sat Mar 25 00:52:00 2023">
 <section name="Project Information" visible="false">
 <property name="ProjectID" value="8B3C87EB1A1F4FD6BCA39339C89EC1EE" type="project"/>
 <property name="ProjectIteration" value="0" type="project"/>
diff --git a/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd b/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd
index 78dd83c..1c3bef3 100644
Binary files a/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd and b/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd differ
diff --git a/cpld/XC95144XL/xst/work/hdllib.ref b/cpld/XC95144XL/xst/work/hdllib.ref
index bdb6ede..321ecd1 100644
--- a/cpld/XC95144XL/xst/work/hdllib.ref
+++ b/cpld/XC95144XL/xst/work/hdllib.ref
@@ -1,8 +1,8 @@
-MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1679370820
-MO CS NULL ../CS.v vlg22/_c_s.bin 1679370820
-MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1679370820
-MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1679370820
-MO WarpSE NULL ../WarpSE.v vlg52/_warp_s_e.bin 1679370820
-MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1679370820
-MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1679370820
+MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1679719921
+MO CS NULL ../CS.v vlg22/_c_s.bin 1679719921
+MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1679719921
+MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1679719921
+MO WarpSE NULL ../WarpSE.v vlg52/_warp_s_e.bin 1679719921
+MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1679719921
+MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1679719921
 MO MXSE NULL ../MXSE.v vlg15/_m_x_s_e.bin 1648473402
diff --git a/cpld/XC95144XL/xst/work/vlg22/_c_s.bin b/cpld/XC95144XL/xst/work/vlg22/_c_s.bin
index de42e5e..4ff801d 100644
Binary files a/cpld/XC95144XL/xst/work/vlg22/_c_s.bin and b/cpld/XC95144XL/xst/work/vlg22/_c_s.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin b/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin
index 83f7ace..527a31f 100644
Binary files a/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin and b/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin b/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin
index ae608cc..fc01353 100644
Binary files a/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin and b/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin b/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin
index ce0c732..32a5204 100644
Binary files a/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin and b/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin b/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin
index d57b081..02fc395 100644
Binary files a/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin and b/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin b/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin
index dba039e..d8df2ff 100644
Binary files a/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin and b/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin differ