diff --git a/cpld/CNT.v b/cpld/CNT.v
index 984b403..60efccd 100644
--- a/cpld/CNT.v
+++ b/cpld/CNT.v
@@ -1,115 +1,78 @@
module CNT(
/* C8M clock input */
- input C8M,
- /* FSB clock and bus active signal */
- input FCLK, input LBACT,
+ input C8M, input E,
/* Refresh request */
- output reg RefReq, output RefUrgent,
- /* BERR output */
- output reg BERRTimeout,
+ output reg RefReq, output reg RefUrgent,
/* Reset, switch, button */
- input [3:1] SW, input nRESin, output reg nRESout, input nIPL2,
+ input [3:1] SW, output reg nRESout, input nIPL2,
/* Mac PDS bus master control outputs */
- output reg AoutOE, output nAoutOE, output nBR_IOB,
+ output reg AoutOE, output nAoutOE, output reg nBR_IOB,
/* Configuration outputs */
- output reg WarpEnable, output reg FastROMEN, output C20MEN, output C25MEN);
+ output C20MEN, output C25MEN, output FastROMEN);
- /* Timer counts from 0 to 1100000 (96) -- 97 states == 12.382 us */
- reg [6:0] Timer = 0;
- wire TimerTC = Timer[6:5]==2'b11;
- always @(posedge C8M) Timer <= TimerTC ? 0 : Timer+1;
-
- /* Refresh timer sequence
- * | Timer | RefReq | RefUrgent |
- * |----------------------------|
- * | 0 | 0 | 0 |
- * | 1 | 0 | 0 |
- * | 2 | 0 | 0 |
- * | 3 | 0 | 0 |
- * | 4 | 0 | 0 |
- * | 5 | 0 | 0 |
- * | 6 | 0 | 0 |
- * | 7 | 0 | 0 |
- * | 8 | 0 | 0 |
- * | 9 | 1 | 0 |
- * | 10 | 1 | 0 |
- * | 11 | 1 | 0 |
- * | ... | 1 | 0 |
- * | 62 | 1 | 0 |
- * | 63 | 1 | 0 |
- * | 64 | 1 | 1 |
- * | 65 | 1 | 1 |
- * | 66 | 1 | 1 |
- * | ... | 1 | 1 |
- * | 93 | 1 | 1 |
- * | 94 | 1 | 1 |
- * | 95 | 1 | 1 |
- * | 96 | 1 | 1 |
+ /* Timer counts from 0 to 1001 (9) -- 10 states == 12.766 us
+ * Refresh timer sequence
+ * | Timer | RefReq | RefUrgent |
+ * |------------------------------|
+ * | 0 0000 | 0 | 0 |
+ * | 1 0001 | 0 | 0 |
+ * | 2 0010 | 0 | 0 |
+ * | 3 0011 | 1 | 0 |
+ * | 4 0100 | 1 | 0 |
+ * | 5 0101 | 1 | 0 |
+ * | 6 0110 | 1 | 0 |
+ * | 7 0111 | 1 | 1 |
+ * | 8 1000 | 1 | 1 |
+ * | 9 1001 | 1 | 1 |
* back to timer==0
*/
- assign RefUrgent = Timer[6];
- always @(posedge C8M) begin
- if (Timer[3]) RefReq <= 1;
- else if (TimerTC) RefReq <= 0;
+ reg [3:0] Timer = 0;
+ reg TimerTC;
+ always @(posedge E) begin
+ TimerTC <= Timer[3:0]==4'h8;
+ if (TimerTC) Timer <= 0;
+ else Timer <= Timer+1;
+ RefReq <= Timer[3:0]==4'h2 ||
+ Timer[3:0]==4'h3 || Timer[3:0]==4'h4 || Timer[3:0]==4'h5 ||
+ Timer[3:0]==4'h6 || Timer[3:0]==4'h7 || Timer[3:0]==4'h8;
+ RefUrgent <= Timer[3:0]==4'h6 || Timer[3:0]==4'h7 || Timer[3:0]==4'h8;
end
-
- /* LBACTr - LBACT synchronized to C16M clock domain */
- reg LBACTr;
- always @(posedge C8M) LBACTr <= LBACT;
-
- /* BERR generation in C8M clock domain */
- reg BERRArm = 0;
- always @(posedge C8M) begin
- if (LBACTr && TimerTC) begin
- BERRArm <= 1;
- if (BERRArm) BERRTimeout <= 1;
- end else if (!LBACTr) begin
- BERRArm <= 0;
- BERRTimeout <= 0;
+
+ /* Long timer counts from 0 to 8192 -- 8193 states == 104.588 ms */
+ reg [13:0] LTimer;
+ wire LTimerTC = LTimer[13];
+ always @(negedge C8M) begin
+ if (TimerTC) begin
+ if (LTimerTC) LTimer <= 0;
+ else LTimer <= LTimer+1;
end
end
-
- /* Long timer counts from 0 to 16384 -- 16385 states == 202.888 ms */
- reg [14:0] LTimer; // Long timer
- wire LTimerTC = LTimer[14];
- always @(posedge C8M) begin
- if (LTimerTC) LTimer <= 0;
- else LTimer <= LTimer+1;
- end
/* IPL2 synchronizer */
- reg IPL2r;
- always @(posedge C8M) IPL2r <= !nIPL2;
+ reg IPL2r; always @(negedge C8M) IPL2r <= !nIPL2;
/* Startup sequence control */
reg [1:0] PORS = 0;
- reg Disable = 0;
- reg BR_IOB = 0; assign nBR_IOB = !BR_IOB;
assign nAoutOE = !AoutOE;
- always @(posedge C8M) begin
+ always @(negedge C8M) begin
case (PORS)
0: begin
AoutOE <= 0; // Tristate PDS address and control
nRESout <= 0; // Hold reset low
- Disable <= 0;
+ nBR_IOB <= 0; // Default to request bus
if (LTimerTC) PORS <= 1;
end 1: begin
AoutOE <= 0; // Tristate PDS address and control
nRESout <= 0; // Hold reset low
- Disable <= Disable | IPL2r;
- if (!IPL2r && LTimerTC) begin
- BR_IOB <= !Disable;
- PORS <= 2;
- end
+ nBR_IOB <= nBR_IOB | IPL2r; // Disable bus request if NMI pressed
+ if (LTimerTC && !IPL2r) PORS <= 2;
end 2: begin
AoutOE <= 0; // Tristate PDS address and control
nRESout <= 0; // Hold reset low
if (LTimerTC) PORS <= 3;
end 3: begin
- AoutOE <= BR_IOB;
- // Wait until LTimerTC to release reset
- if (LTimerTC) nRESout <= 1;
- else nRESout = 0;
+ AoutOE <= !nBR_IOB;
+ if (LTimerTC) nRESout <= 1; // Wait until LTimerTC to release reset
PORS <= 3;
end
endcase
diff --git a/cpld/FSB.v b/cpld/FSB.v
index f2441dc..09c2614 100644
--- a/cpld/FSB.v
+++ b/cpld/FSB.v
@@ -1,12 +1,10 @@
module FSB(
/* MC68HC000 interface */
- input FCLK, input nAS, output reg nDTACK, output nVPA, output nBERR,
+ input FCLK, input nAS, output reg nDTACK, output nVPA,
/* AS cycle detection */
- output BACT, output LBACT,
+ output BACT,
/* Ready inputs */
input Ready0, input Ready1, input Ready2,
- /* BERR input from IOB slave port */
- input IOBS_BERR,
/* Interrupt acknowledge select */
input IACS);
@@ -14,18 +12,6 @@ module FSB(
reg ASrf = 0;
always @(negedge FCLK) begin ASrf <= ~nAS; end
assign BACT = ~nAS || ASrf; // BACT - bus active
-
- /* LBACT - "Long BACT" */
- reg [1:0] BACTCnt = 0;
- always @(posedge FCLK) begin
- if (!BACT) begin
- BACTCnt <= 0;
- LBACT <= 0;
- end else begin
- BACTCnt <= BACTCnt+1;
- if (BACTCnt==2'b11 && BACT) LBACT <= 1;
- end
- end
/* Ready generation and bypass */
reg Ready0r, Ready1r, Ready2r;
@@ -44,9 +30,6 @@ module FSB(
end
end
- /* BERR generation */
- assign nBERR = ~(~nAS && IOBS_BERR);
-
/* DTACK/VPA control */
reg VPA;
assign nVPA = ~(~nAS && VPA);
diff --git a/cpld/IOBS.v b/cpld/IOBS.v
index 0fdf80f..73ea325 100644
--- a/cpld/IOBS.v
+++ b/cpld/IOBS.v
@@ -4,7 +4,7 @@ module IOBS(
/* AS cycle detection */
input BACT,
/* Select and ready signals */
- input IOCS, input IOPWCS, output IOBS_Ready, output reg IOBS_BERR,
+ input IOCS, input IOPWCS, output IOBS_Ready, output reg nBERR_FSB,
/* Read data OE control */
output nDinOE,
/* IOB Master Controller Interface */
@@ -106,10 +106,10 @@ module IOBS(
always @(posedge CLK) begin
if (~BACT) begin
IOReady <= 0;
- BERR <= 0;
+ nBERR_FSB <= 1;
end else if (Once && (PS==0 || PS==1) && ~IOACTr && IOPWReady) begin
- IOReady <= ~IOBERR;
- IOBS_BERR <= IOBERR;
+ IOReady <= !IOBERR;
+ nBERR_FSB <= !IOBERR;
end
end
assign IOBS_Ready = ~IOCS || IOReady || (IOPWCS && IOPWReady);
diff --git a/cpld/RAM.v b/cpld/RAM.v
index 01a6471..3c522a9 100644
--- a/cpld/RAM.v
+++ b/cpld/RAM.v
@@ -4,13 +4,16 @@ module RAM(
/* AS cycle detection */
input BACT,
/* Select and ready signals */
- input RAMCS, input ROMCS, output Ready,
+ input RAMCS, input ROMCS, output RAM_Ready,
/* Refresh Counter Interface */
input RefReqIn, input RefUrgentIn,
/* DRAM and NOR flash interface */
output [11:0] RA, output nRAS, output reg nCAS,
output nLWE, output nUWE, output nOE, output nROMCS, output nROMWE);
+ // Save BACT from last clock
+ reg BACTr; always @(posedge CLK) BACTr <= BACT;
+
/* RAM control state */
reg [2:0] RS = 0;
reg RAMEN = 0;
@@ -18,46 +21,42 @@ module RAM(
reg RASEL = 0; // RASEL controls /CAS signal
/* Refresh request synchronization */
- reg RefReqR; // Refresh synchronization
- always @(posedge CLK) RefReqR <= RefReqIn;
+ reg RefReqSync; always @(posedge CLK) RefReqSync <= RefReqIn;
+ reg RegUrgentSync; always @(posedge CLK) RegUrgentSync <= RefUrgentIn;
+
+ /* Refresh command generation */
reg RefReq, RefUrgent; // Refresh commands
reg RefDone; // Refresh done "remember"
always @(posedge CLK) begin
- RefReq <= RefReqR && !RefDone;
- RefUrgent <= RefReqR && RefUrgentIn && !RefDone;
- if (!RefReqR) RefDone <= 0;
+ RefReq <= RefReqSync && !RefDone;
+ RefUrgent <= RegUrgentSync && !RefDone;
+ if (!RefReqSync) RefDone <= 0;
else if (RS==2 || RS==3) RefDone <= 1; // RS2 || RS3 to save 1 input
end
- /* RAM enable
- */
-
/* Refresh init conditions */
- wire RAMRefFromRS0Next = RS==0 && (
+ wire RefFromRS0Next = RS==0 && (
// Non-urgent refresh can start during first clock of non-RAM cycle
( BACT && ~BACTr && ~RAMCS && RefReq) ||
// Urgent refresh can start during bus idle
(~BACT && RefUrgent) ||
// Urgent refresh can start during non-ram cycle
( BACT && ~RAMCS && RefUrgent));
- wire RAMRefFromRS0Pre = RS==0 &&
+ wire RefFromRS0Pre = RS==0 &&
// Urgent refresh can start during long RAM cycle after RAM access done.
BACT && RAMCS && !RAMEN && RefUrgent;
- wire RAMRefFromRS0 = RAMRefFromRS0Next || RAMRefFromRS0Pre;
+ wire RefFromRS0 = RefFromRS0Next || RefFromRS0Pre;
// Urgent refresh cannot start when BACT and RAMCS and RAMEN,
// since /RAS has already been asserted. For this we wait for RS7.
- wire RAMRefFromRS7 = RS==7 && RefUrgent;
-
- /* RAM access start condition */
- wire RAMStart = RS==0 && BACT && RAMCS && RAMEN;
+ wire RefFromRS7 = RS==7 && RefUrgent;
/* RAM enable (/AS -> /RAS) */
always @(posedge CLK) begin
if (RS==0) begin
- if (RAMRefFromRS0) RAMEN <= 0;
+ if (RefFromRS0) RAMEN <= 0;
else if (!BACT) RAMEN <= 1;
end else if (RS==7) begin
- if (RAMRefFromRS7) RAMEN <= 0;
+ if (RefFromRS7) RAMEN <= 0;
else if (BACT) RAMEN <= 0;
else if (!BACT) RAMEN <= 1;
end
@@ -87,9 +86,6 @@ module RAM(
assign RA[01] = RASEL ? A[02] : A[11];
assign RA[00] = RASEL ? A[01] : A[10];
- // Save BACT from last clock
- reg BACTr;
- always @(posedge CLK) BACTr <= BACT;
always @(posedge CLK) begin
if (RS==0) begin
// In RS0, RAM is idle and ready for new command.
@@ -108,7 +104,7 @@ module RAM(
RS <= 5;
RAMReady <= 0;
RASEL <= 1;
- end else if (RAMRefFromRS0Pre) begin
+ end else if (RefFromRS0Pre) begin
RS <= 1;
RAMReady <= 0;
RASEL <= 0;
@@ -180,6 +176,6 @@ module RAM(
end
always @(negedge CLK) begin nCAS <= ~RASEL; end
- assign Ready = ~RAMCS || RAMReady;
+ assign RAM_Ready = ~RAMCS || RAMReady;
endmodule
diff --git a/cpld/WarpSE-XC95144XL.ucf b/cpld/WarpSE-XC95144XL.ucf
index d63b818..510a57a 100644
--- a/cpld/WarpSE-XC95144XL.ucf
+++ b/cpld/WarpSE-XC95144XL.ucf
@@ -1,9 +1,9 @@
#Created by Constraints Editor (xc95144xl-tq100-10) - 2022/02/07
-NET "CLK_FSB" TNM_NET = CLK_FSB;
+NET "FCLK" TNM_NET = CLK_FSB;
TIMESPEC TS_CLK_FSB = PERIOD "CLK_FSB" 25 MHz HIGH 50%;
-NET "CLK2X_IOB" TNM_NET = CLK2X_IOB;
+NET "C16M" TNM_NET = CLK2X_IOB;
TIMESPEC TS_CLK2X_IOB = PERIOD "CLK2X_IOB" 15.6672 MHz HIGH 50%;
-NET "CLK_IOB" TNM_NET = CLK_IOB;
+NET "C8M" TNM_NET = CLK_IOB;
TIMESPEC TS_CLK_IOB = PERIOD "CLK_IOB" 7.8336 MHz HIGH 50%;
#PACE: Start of Constraints generated by PACE
@@ -31,12 +31,12 @@ NET "A_FSB<6>" LOC = "P3" ;
NET "A_FSB<7>" LOC = "P4" ;
NET "A_FSB<8>" LOC = "P6" ;
NET "A_FSB<9>" LOC = "P7" ;
-NET "CLK20EN" LOC = "P59" ;
-NET "CLK25EN" LOC = "P58" ;
-NET "CLK2X_IOB" LOC = "P22" ;
-NET "CLK_FSB" LOC = "P27" ;
-NET "CLK_IOB" LOC = "P23" ;
-NET "E_IOB" LOC = "P25" ;
+NET "C20MEN" LOC = "P59" ;
+NET "C25MEN" LOC = "P58" ;
+NET "FCLK" LOC = "P27" ;
+NET "C16M" LOC = "P22" ;
+NET "C8M" LOC = "P23" ;
+NET "E" LOC = "P25" ;
NET "nADoutLE0" LOC = "P85" ;
NET "nADoutLE1" LOC = "P82" ;
NET "nAoutOE" LOC = "P87" ;
@@ -80,9 +80,9 @@ NET "RA<6>" LOC = "P46" ;
NET "RA<7>" LOC = "P52" ;
NET "RA<8>" LOC = "P54" ;
NET "RA<9>" LOC = "P56" ;
-NET "SW<0>" LOC = "P61" ;
-NET "SW<1>" LOC = "P60" ;
-NET "SW<2>" LOC = "P67" ;
+NET "SW<1>" LOC = "P61" ;
+NET "SW<2>" LOC = "P60" ;
+NET "SW<3>" LOC = "P67" ;
#PACE: Start of PACE Area Constraints
diff --git a/cpld/WarpSE.v b/cpld/WarpSE.v
index b61fc87..472ac88 100644
--- a/cpld/WarpSE.v
+++ b/cpld/WarpSE.v
@@ -7,10 +7,10 @@ module WarpSE(
output nDTACK_FSB,
output nVPA_FSB,
output nBERR_FSB,
- input CLK_FSB,
- input CLK2X_IOB,
- input CLK_IOB,
- input E_IOB,
+ input FCLK,
+ input C16M,
+ input C8M,
+ input E,
input nDTACK_IOB,
input nVPA_IOB,
output nVMA_IOB,
@@ -47,7 +47,6 @@ module WarpSE(
/* AS cycle detection */
wire BACT;
- wire LBACT;
/* Refresh request/ack signals */
wire RefReq, RefUrgent;
@@ -55,32 +54,33 @@ module WarpSE(
/* Fast ROM enable setting */
wire FastROMEN;
+ /* FSB chip select signals */
wire IOCS, SCSICS, IOPWCS, IACS, ROMCS, RAMCS, SndRAMCSWR;
CS cs(
/* Setting input */
FastROMEN,
/* MC68HC000 interface */
- A_FSB[23:08], CLK_FSB, nRESin, nWE_FSB,
+ A_FSB[23:08], FCLK, nRESin, nWE_FSB,
/* AS cycle detection */
BACT,
/* Device select outputs */
IOCS, SCSICS, IOPWCS, IACS, ROMCS, RAMCS, SndRAMCSWR);
- wire Ready_RAM;
+ wire RAM_Ready;
RAM ram(
/* MC68HC000 interface */
- CLK_FSB, A_FSB[21:1], nWE_FSB, nAS_FSB, nLDS_FSB, nUDS_FSB,
+ FCLK, A_FSB[21:1], nWE_FSB, nAS_FSB, nLDS_FSB, nUDS_FSB,
/* AS cycle detection */
BACT,
/* Select and ready signals */
- RAMCS, ROMCS, Ready_RAM,
+ RAMCS, ROMCS, RAM_Ready,
/* Refresh Counter Interface */
RefReq, RefUrgent,
/* DRAM and NOR flash interface */
RA[11:0], nRAS, nCAS,
nRAMLWE, nRAMUWE, nOE, nROMCS, nROMWE);
- wire IOBS_Ready, IOBS_BERR;
+ wire IOBS_Ready;
wire IOREQ, IOACT, IOBERR;
wire ALE0S, ALE0M, ALE1;
assign nADoutLE0 = ~(ALE0S || ALE0M);
@@ -88,11 +88,11 @@ module WarpSE(
wire IORW0, IOL0, IOU0;
IOBS iobs(
/* MC68HC000 interface */
- CLK_FSB, nWE_FSB, nAS_FSB, nLDS_FSB, nUDS_FSB,
+ FCLK, nWE_FSB, nAS_FSB, nLDS_FSB, nUDS_FSB,
/* AS cycle detection, FSB BERR */
BACT,
/* Select and ready signals */
- IOCS, IOPWCS, IOBS_Ready, IOBS_BERR,
+ IOCS, IOPWCS, IOBS_Ready, nBERR_FSB,
/* Read data OE control */
nDinOE,
/* IOB Master Controller Interface */
@@ -110,7 +110,7 @@ module WarpSE(
assign nVMA_IOB = AoutOE ? 1'bZ : nVMA_IOBout;
IOBM iobm(
/* PDS interface */
- CLK2X_IOB, CLK_IOB, E_IOB,
+ C16M, C8M, E,
nAS_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout,
nAS_IOB, nBG_IOB, nDTACK_IOB, nVPA_IOB, nBERR_IOB, nRESin,
/* PDS address and data latch control */
@@ -119,18 +119,14 @@ module WarpSE(
IOACT, IOBERR,
IOREQ, IOL0, IOU0, IORW0);
- wire BERRTimeout;
+
CNT cnt(
- /* C8M clock */
- C8M,
- /* FSB bus active signals */
- BACT, LBACT,
+ /* C8M and E clocks */
+ C8M, E,
/* Refresh request */
RefReq, RefUrgent,
- /* BERR and QoS speed limit output */
- BERRTimeout,
/* Reset, switch, button */
- SW[3:1], nRESin, nRESout, nIPL2,
+ SW[3:1], nRESout, nIPL2,
/* Mac PDS bus master control outputs */
nAoutOE, AoutOE, nBR_IOB,
/* Configuration outputs */
@@ -138,13 +134,11 @@ module WarpSE(
FSB fsb(
/* MC68HC000 interface */
- CLK_FSB, nAS_FSB, nDTACK_FSB, nVPA_FSB, nBERR_FSB,
- /* AS cycle detection */
- BACT, LBACT,
- /* Ready and IA inputs */
- Ready_RAM, IOBS_Ready, (!SndRAMCSWR || QoSReady),
- /* IOB slabe port BERR input */
- IOBS_BERR,
+ FCLK, nAS_FSB, nDTACK_FSB, nVPA_FSB,
+ /* FSB cycle detection */
+ BACT,
+ /* Ready inputs */
+ RAM_Ready, IOBS_Ready, 1,
/* Interrupt acknowledge select */
IACS);
diff --git a/cpld/XC95144XL/WarpSE.bld b/cpld/XC95144XL/WarpSE.bld
index d9b29ae..09a190b 100644
--- a/cpld/XC95144XL/WarpSE.bld
+++ b/cpld/XC95144XL/WarpSE.bld
@@ -1,16 +1,18 @@
-Release 14.7 ngdbuild P.20131013 (nt)
+Release 14.7 ngdbuild P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
-Command Line: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt\unwrapped\ngdbuild.exe -intstyle
-ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10
-WarpSE.ngc WarpSE.ngd
+Command Line: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\ngdbuild.exe
+-intstyle ise -dd _ngo -uc
+C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p
+xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
-Reading NGO file "Z:/Warp-SE/cpld/XC95144XL/WarpSE.ngc" ...
+Reading NGO file
+"C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.ngc" ...
Gathering constraint information from source properties...
Done.
Annotating constraints to design from ucf file
-"Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf" ...
+"C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
Done...
@@ -28,10 +30,10 @@ NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 0
-Total memory usage is 117172 kilobytes
+Total memory usage is 155236 kilobytes
Writing NGD file "WarpSE.ngd" ...
-Total REAL time to NGDBUILD completion: 17 sec
-Total CPU time to NGDBUILD completion: 16 sec
+Total REAL time to NGDBUILD completion: 3 sec
+Total CPU time to NGDBUILD completion: 3 sec
Writing NGDBUILD log file "WarpSE.bld"...
diff --git a/cpld/XC95144XL/WarpSE.cmd_log b/cpld/XC95144XL/WarpSE.cmd_log
index de0c7a6..1cd9427 100644
--- a/cpld/XC95144XL/WarpSE.cmd_log
+++ b/cpld/XC95144XL/WarpSE.cmd_log
@@ -33,3 +33,189 @@ xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/Wa
xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
+xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr"
+ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd
+XSLTProcess WarpSE_build.xml
+tsim -intstyle ise WarpSE WarpSE.nga
+hprep6 -s IEEE1149 -n WarpSE -i WarpSE
diff --git a/cpld/XC95144XL/WarpSE.gise b/cpld/XC95144XL/WarpSE.gise
index 76f2cd9..02f5ed0 100644
--- a/cpld/XC95144XL/WarpSE.gise
+++ b/cpld/XC95144XL/WarpSE.gise
@@ -37,6 +37,7 @@
+
@@ -78,16 +79,16 @@
-
-
+
+
+
-
-
+
@@ -95,36 +96,44 @@
-
+
-
+
-
-
-
+
-
+
-
-
+
-
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/cpld/XC95144XL/WarpSE.gyd b/cpld/XC95144XL/WarpSE.gyd
index 1aad900..6a2529e 100644
--- a/cpld/XC95144XL/WarpSE.gyd
+++ b/cpld/XC95144XL/WarpSE.gyd
@@ -24,27 +24,24 @@ A_FSB<6> S:PIN3
A_FSB<7> S:PIN4
A_FSB<8> S:PIN6
A_FSB<9> S:PIN7
-SW<0> S:PIN61
-CLK2X_IOB S:PIN22
-CLK_FSB S:PIN27
-CLK_IOB S:PIN23
-E_IOB S:PIN25
-SW<1> S:PIN60
+C16M S:PIN22
+C8M S:PIN23
+E S:PIN25
+FCLK S:PIN27
nAS_FSB S:PIN32
nBERR_IOB S:PIN76
nBG_IOB S:PIN73
nDTACK_IOB S:PIN78
nIPL2 S:PIN92
nLDS_FSB S:PIN30
-nRES S:PIN91
nUDS_FSB S:PIN33
nVPA_IOB S:PIN77
nWE_FSB S:PIN29
RA<11> S:PIN63
RA<10> S:PIN55
-CLK20EN S:PIN59
-CLK25EN S:PIN58
-nBR_IOB S:PIN72
+nRES S:PIN91
+C25MEN S:PIN58
+C20MEN S:PIN59
RA<0> S:PIN53
RA<1> S:PIN50
RA<2> S:PIN43
@@ -55,18 +52,19 @@ RA<6> S:PIN46
RA<7> S:PIN52
RA<8> S:PIN54
RA<9> S:PIN56
+nAoutOE S:PIN87
+nBR_IOB S:PIN72
nDTACK_FSB S:PIN28
nAS_IOB S:PIN81
nDinLE S:PIN86
-nDoutOE S:PIN89
nLDS_IOB S:PIN79
nUDS_IOB S:PIN80
nVMA_IOB S:PIN74
+nBERR_FSB S:PIN70
nADoutLE0 S:PIN85
nADoutLE1 S:PIN82
-nAoutOE S:PIN87
-nBERR_FSB S:PIN70
nDinOE S:PIN90
+nDoutOE S:PIN89
nOE S:PIN37
nRAMLWE S:PIN65
nRAMUWE S:PIN66
@@ -80,43 +78,43 @@ nCAS S:PIN36
;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.
-PARTITION FB1_1 ram/RefRAS ram/BACTr iobm/RESrr iobm/RESrf
- iobm/BERRrf fsb/ASrf cnt/RefCnt<1> RESr2
- RESr1 RESr0 IPL2r1 IPL2r0
- $OpTx$FX_DC$591 iobs/IOU1 iobs/IOL1 iobm/IOS_FSM_FFd1
- fsb/BERR1r cs/nOverlay1
-PARTITION FB2_7 iobs/IOACTr iobm/VPArr iobm/VPArf iobm/IOREQr
- iobm/Er2 iobm/Er iobm/DTACKrr iobm/DTACKrf
- iobm/BGr1 iobm/BGr0 iobm/BERRrr cnt/RefCnt<0>
+PARTITION FB1_1 iobm/nASr iobm/VPArr iobm/VPArf iobm/RESrr
+ iobm/RESrf iobm/IOREQr iobm/Er2 iobm/Er
+ iobm/DTACKrr iobm/DTACKrf iobm/BERRrr iobm/BERRrf
+ cnt/IPL2r iobm/IOS_FSM_FFd1 iobm/BG iobs/IOU0
+ iobs/IOL0 iobm/IOS_FSM_FFd3
+PARTITION FB2_7 ram/RegUrgentSync ram/RefUrgent ram/RefReqSync ram/RefReq
+ ram/RefRAS ram/BACTr iobs/IOACTr iobs/ALE0
+ fsb/ASrf iobs/PS_FSM_FFd1 iobs/IOU1 iobs/IOL1
-PARTITION FB3_1 fsb/VPA EXP14_ EXP15_ fsb/Ready0r
- EXP16_ EXP17_ EXP18_ EXP19_
- fsb/nDTACK EXP20_ EXP21_ fsb/BERR0r
- cs/nOverlay0 EXP22_ fsb/Ready1r fsb/Ready2r
- nROMWE_OBUF EXP23_
-PARTITION FB4_1 iobs/Clear1 nAoutOE_OBUF iobs/ALE0 cnt/RefCnt<7>
- iobm/nDoutOE nDinOE_OBUF cnt/RefCnt<6> cnt/RefCnt<5>
- cnt/RefCnt<4> cnt/RefCnt<3> nVPA_FSB_OBUF cnt/RefCnt<2>
- iobs/PS_FSM_FFd1 cnt/RefDone iobs/IOU0 cnt/TimeoutA
- iobs/IOReady ram/RS_FSM_FFd1
-PARTITION FB5_1 EXP24_ nROMCS_OBUF ram/RAMDIS2 iobs/IOL0
- ram/nCAS nOE_OBUF iobs/Once EXP25_
- RA_4_OBUF ram/Once RA_3_OBUF RA_5_OBUF
- iobs/Load1 RA_2_OBUF RA_6_OBUF EXP26_
- EXP27_ ram/RASEL
-PARTITION FB6_1 iobm/ETACK iobm/nVMA iobm/IOS_FSM_FFd3 iobm/ES<3>
- iobm/ES<1> iobm/ES<0> iobm/ALE0 iobm/ES<4>
+PARTITION FB3_1 EXP14_ fsb/VPA EXP15_
+PARTITION FB3_5 iobs/Clear1 fsb/Ready0r iobs/IOReady EXP16_
+ fsb/nDTACK fsb/Ready1r EXP17_ iobs/IORW1
+ EXP18_ EXP19_ iobs/IORW0 EXP20_
+ nROMWE_OBUF EXP21_
+PARTITION FB4_1 cnt/nRESout cnt/AoutOE cnt/TimerTC cnt/Timer<0>
+ nDoutOE_OBUF nDinOE_OBUF cnt/PORS_FSM_FFd2 N0
+ cnt/LTimer<0> cnt/Timer<3> nVPA_FSB_OBUF cnt/Timer<2>
+ cnt/Timer<1> cnt/RefUrgent cnt/RefReq cnt/LTimer<3>
+ cnt/LTimer<2> cnt/LTimer<1>
+PARTITION FB5_1 ram/RASEL nROMCS_OBUF ram/RefDone cs/nOverlay1
+ ram/nCAS nOE_OBUF ram/RS_FSM_FFd1 cs/nOverlay0
+ RA_4_OBUF ram/RAMEN RA_3_OBUF RA_5_OBUF
+ ram/RS_FSM_FFd2 RA_2_OBUF RA_6_OBUF EXP22_
+ ram/RAMReady EXP23_
+PARTITION FB6_1 iobm/ETACK iobm/nVMA iobm/DoutOE iobm/ALE0
+ iobm/ES<3> iobm/ES<1> iobm/ES<0> iobm/ES<4>
iobm/nLDS iobm/IOS_FSM_FFd2 iobm/nUDS iobm/nASout
iobm/ES<2> nADoutLE1_OBUF nADoutLE0_OBUF iobm/IOACT
iobm/nDinLE iobm/IOBERR
-PARTITION FB7_1 EXP28_ RA_1_OBUF EXP29_ ram/RS_FSM_FFd3
- RA_7_OBUF RA_0_OBUF cnt/TimeoutBPre RA_8_OBUF
- A_FSB_21_IBUF$BUF0 ram/RS_FSM_FFd2 RA_9_OBUF CLK25EN_OBUF
- cnt/TimeoutB CLK20EN_OBUF$BUF0 ram/RAMReady EXP30_
- EXP31_ ram/RAMDIS1
-PARTITION FB8_1 EXP32_ A_FSB_19_IBUF$BUF0 EXP33_ iobs/PS_FSM_FFd2
- nRAS_OBUF nRAMLWE_OBUF RESDone nRAMUWE_OBUF
- iobs/IOREQ EXP34_ EXP35_ nBERR_FSB_OBUF
- EXP36_ iobs/IORW1 Park iobs/BERR
- EXP37_ iobs/IORW0
+PARTITION FB7_1 cnt/LTimer<13> RA_1_OBUF cnt/LTimer<9> cnt/LTimer<8>
+ RA_7_OBUF RA_0_OBUF cnt/LTimer<7> RA_8_OBUF
+ A_FSB_21_IBUF$BUF0 cnt/LTimer<6> RA_9_OBUF N1
+ cnt/LTimer<5> N1$BUF0 cnt/LTimer<4> cnt/LTimer<12>
+ cnt/LTimer<11> cnt/LTimer<10>
+PARTITION FB8_1 cnt/PORS_FSM_FFd1 A_FSB_19_IBUF$BUF0 ram/RS_FSM_FFd3
+PARTITION FB8_5 nRAS_OBUF nRAMLWE_OBUF iobs/PS_FSM_FFd2 nRAMUWE_OBUF
+ EXP24_ iobs/Load1 EXP25_ iobs/nBERR_FSB
+ EXP26_ iobs/IOREQ cnt/nBR_IOB EXP27_
+ iobs/Once EXP28_
diff --git a/cpld/XC95144XL/WarpSE.jed b/cpld/XC95144XL/WarpSE.jed
new file mode 100644
index 0000000..4d5e8fe
--- /dev/null
+++ b/cpld/XC95144XL/WarpSE.jed
@@ -0,0 +1,1714 @@
+Programmer Jedec Bit Map
+Date Extracted: Mon Mar 20 23:54:20 2023
+
+QF93312*
+QP100*
+QV0*
+F0*
+X0*
+J0 0*
+N VERSION P.20131013*
+N DEVICE XC95144XL-10-TQ100*
+N PPMAP 2 1*
+N PPMAP 17 10*
+N PPMAP 18 11*
+N PPMAP 19 12*
+N PPMAP 21 13*
+N PPMAP 22 14*
+N PPMAP 23 15*
+N PPMAP 24 16*
+N PPMAP 26 17*
+N PPMAP 28 18*
+N PPMAP 29 19*
+N PPMAP 4 2*
+N PPMAP 30 20*
+N PPMAP 33 22*
+N PPMAP 35 23*
+N PPMAP 36 24*
+N PPMAP 37 25*
+N PPMAP 42 27*
+N PPMAP 44 28*
+N PPMAP 47 29*
+N PPMAP 6 3*
+N PPMAP 49 30*
+N PPMAP 54 32*
+N PPMAP 56 33*
+N PPMAP 57 34*
+N PPMAP 58 35*
+N PPMAP 59 36*
+N PPMAP 60 37*
+N PPMAP 62 39*
+N PPMAP 8 4*
+N PPMAP 63 40*
+N PPMAP 64 41*
+N PPMAP 68 42*
+N PPMAP 69 43*
+N PPMAP 72 46*
+N PPMAP 77 49*
+N PPMAP 79 50*
+N PPMAP 82 52*
+N PPMAP 86 53*
+N PPMAP 88 54*
+N PPMAP 90 55*
+N PPMAP 92 56*
+N PPMAP 95 58*
+N PPMAP 96 59*
+N PPMAP 11 6*
+N PPMAP 97 60*
+N PPMAP 98 61*
+N PPMAP 102 63*
+N PPMAP 103 64*
+N PPMAP 104 65*
+N PPMAP 105 66*
+N PPMAP 107 67*
+N PPMAP 109 68*
+N PPMAP 12 7*
+N PPMAP 112 70*
+N PPMAP 114 71*
+N PPMAP 116 72*
+N PPMAP 117 73*
+N PPMAP 118 74*
+N PPMAP 123 76*
+N PPMAP 125 77*
+N PPMAP 127 78*
+N PPMAP 130 79*
+N PPMAP 13 8*
+N PPMAP 134 80*
+N PPMAP 135 81*
+N PPMAP 136 82*
+N PPMAP 139 85*
+N PPMAP 140 86*
+N PPMAP 141 87*
+N PPMAP 143 89*
+N PPMAP 15 9*
+N PPMAP 144 90*
+N PPMAP 145 91*
+N PPMAP 146 92*
+N PPMAP 147 93*
+N PPMAP 149 94*
+N PPMAP 153 95*
+N PPMAP 155 96*
+N PPMAP 157 97*
+N PPMAP 160 99*
+L0000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0000064 00000000 00000000 00000000 00100100 00000000 00000000 00000000 00000000*
+L0000128 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0000192 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0000256 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0000320 00000000 00000000 00000000 00000100 01011000 00000000 00000000 00000000*
+L0000384 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0000448 00000000 00000000 00000000 00000000 00010000 00000000 00000000 00000000*
+L0000512 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0000576 000000 000000 000000 000000 000000 000000 000000 000000*
+L0000624 000000 000001 000000 000000 001010 000000 000000 000000*
+L0000672 000000 000000 000000 000000 000000 000000 000000 000000*
+L0000720 000000 000000 000100 000000 000000 000000 000000 000000*
+L0000768 000000 000000 000000 000000 000000 000000 000000 000000*
+L0000816 000000 000000 000000 000000 000000 000000 000000 000000*
+L0000864 00000000 00000000 00000100 10100100 00000000 00000000 00000000 10000000*
+L0000928 00000000 00000000 00000100 00000000 00000000 00010000 00000000 00000000*
+L0000992 00000000 00000000 00010100 00000000 00000000 00000100 00000000 00000000*
+L0001056 00000000 00000000 10110100 00000000 00000000 00000000 00000000 00000000*
+L0001120 00000000 00000000 10100100 00000000 00000000 00000000 00000000 00000000*
+L0001184 00000000 00000000 00000000 00000000 00000000 00000000 00010000 00000000*
+L0001248 00000000 00000000 00101100 00000000 00011000 00000000 00000000 00000000*
+L0001312 00000000 00000000 00001100 00000100 00001000 00000000 00000000 00000000*
+L0001376 00000000 00000000 10101100 00000000 00110000 00000000 00000000 00000000*
+L0001440 000000 000000 101010 000000 000000 000000 000000 000000*
+L0001488 000000 000000 101001 001000 000000 000000 000000 000000*
+L0001536 000000 000000 101001 000000 000000 000001 000000 000000*
+L0001584 000000 000000 101001 000001 000000 000001 000000 000000*
+L0001632 000010 000000 101001 000000 000000 000000 000000 000000*
+L0001680 000000 000000 101001 000000 000000 000000 000000 000000*
+L0001728 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0001792 00000010 00000000 00000000 00000000 00000000 00000000 00000000 10000000*
+L0001856 00000010 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0001920 00000010 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0001984 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0002048 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0002112 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0002176 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0002240 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00110000*
+L0002304 000000 000000 000000 000000 000000 000000 000000 000000*
+L0002352 000000 000000 000000 000000 000000 000000 000000 000000*
+L0002400 000000 000000 000000 000000 000000 000000 000000 000000*
+L0002448 000000 000000 000000 000000 000000 000000 000000 000000*
+L0002496 000000 000000 000000 000000 000000 000000 000000 000000*
+L0002544 000000 000000 000000 000000 000000 000000 000000 000100*
+L0002592 10000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0002656 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0002720 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0002784 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0002848 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0002912 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0002976 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0003040 00000000 00000000 10000000 00000000 00000000 10000000 00000000 00000000*
+L0003104 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0003168 000000 000000 100000 000000 000000 000000 000000 000000*
+L0003216 000000 000000 100001 000000 000000 000000 000000 000000*
+L0003264 000000 000000 100000 000000 000000 000000 000000 000000*
+L0003312 000000 000000 100000 000000 000000 000000 000000 000000*
+L0003360 000000 000000 100000 000000 000000 000000 000000 000000*
+L0003408 000000 000000 100000 000000 000000 000000 000000 000000*
+L0003456 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001000*
+L0003520 00000000 00000000 00000000 01001000 00000000 00000000 00000000 00000000*
+L0003584 00000000 00000000 00000000 00011100 00000000 00000000 00000000 00000000*
+L0003648 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0003712 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0003776 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0003840 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0003904 00000000 00000000 00000000 00000000 00000000 00000000 00100000 00000000*
+L0003968 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0004032 000000 000000 000000 000000 000000 000000 000000 000000*
+L0004080 000000 000000 000000 000000 000000 000000 000000 011000*
+L0004128 000000 000000 000000 000000 000000 000000 000000 000000*
+L0004176 000000 000000 000000 000100 000000 000000 000000 100000*
+L0004224 000000 000000 000000 000000 000000 000000 000000 000000*
+L0004272 000000 000000 000000 000000 000000 000000 000000 000000*
+L0004320 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0004384 00000000 00000000 00000000 00010000 00000000 00000000 00000000 10000000*
+L0004448 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10001000*
+L0004512 00000000 00000000 00100000 00000100 00000000 00000000 00000000 00001000*
+L0004576 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00001000*
+L0004640 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00010000*
+L0004704 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00110000*
+L0004768 00000000 00000000 00000000 00000100 00000000 10000000 00000000 01110000*
+L0004832 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00110000*
+L0004896 000000 000000 000000 000000 000000 000000 000000 001100*
+L0004944 000000 000000 000000 001000 100000 000000 001000 000001*
+L0004992 000000 000000 000001 000100 000000 000000 001000 000001*
+L0005040 000000 000000 000001 000001 000000 000000 000000 011011*
+L0005088 000000 000000 000001 001001 000000 000000 000000 011011*
+L0005136 000000 000000 000001 000000 000000 000000 000000 010111*
+L0005184 00000010 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0005248 00000010 00000000 10000100 01001000 00000000 00000000 00000000 00001000*
+L0005312 00000010 00000000 10000100 00000000 00000000 00000000 00000000 00000000*
+L0005376 00000011 00000000 10010100 00000000 00000000 00000000 00000000 00000000*
+L0005440 00000010 00000000 10000000 00000000 00000000 00000000 00000000 00000100*
+L0005504 00000001 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0005568 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0005632 00000010 00000000 00100000 00001000 00000000 00000000 00000000 01000000*
+L0005696 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0005760 000000 000000 001100 000000 000000 000000 001000 000000*
+L0005808 000000 000000 100000 000000 000000 000000 000000 000000*
+L0005856 000000 000000 110000 100000 000000 000000 001000 011000*
+L0005904 000000 000000 001000 000000 000000 000000 000000 000000*
+L0005952 000000 000000 000000 000010 000000 000000 000000 000000*
+L0006000 000000 000000 000000 000000 000000 000000 000000 100000*
+L0006048 00000010 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0006112 00000011 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0006176 00000000 00000000 00000000 00011000 00000000 00000000 00000000 10000000*
+L0006240 00000001 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0006304 00000010 00000000 00001100 00000000 00000000 00010000 00100000 00000000*
+L0006368 00000011 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0006432 00000000 00000000 00000100 00000000 00000000 00000100 00000000 01000000*
+L0006496 00000000 00000000 10000100 00000000 00010000 00000000 00000000 00000000*
+L0006560 00000000 00000000 00000100 00000000 00000000 00000000 00100000 00000000*
+L0006624 000000 000000 000000 000000 000000 000001 000000 001100*
+L0006672 000000 000000 011001 000000 000000 000000 000000 000000*
+L0006720 000000 000000 001000 000000 000000 000010 000000 000000*
+L0006768 000000 000000 100000 000100 000000 000000 000000 000000*
+L0006816 000000 000000 101000 000000 000000 000000 000000 100000*
+L0006864 000000 000000 101000 000000 000000 000000 000000 000010*
+L0006912 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001000*
+L0006976 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001000*
+L0007040 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0007104 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0007168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0007232 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0007296 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01000000*
+L0007360 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
+L0007424 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0007488 000000 000000 000000 000000 000000 000000 000000 000000*
+L0007536 000000 000000 000000 000000 000000 000000 000000 011000*
+L0007584 000000 000000 000000 000000 000000 000000 000000 011000*
+L0007632 000000 000000 000000 000000 000000 000000 000000 000000*
+L0007680 000000 000000 000000 000000 000000 000000 000000 000000*
+L0007728 000000 000000 000000 000000 000000 000000 000000 100000*
+L0007776 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0007840 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0007904 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10000000*
+L0007968 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0008032 00000000 00000000 00100000 00000000 00000000 00010000 00000000 00000000*
+L0008096 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0008160 00000000 00000000 00000000 00000000 00000000 00000100 10000000 00000000*
+L0008224 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01000000*
+L0008288 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0008352 000000 000000 000000 000000 000000 000001 000000 001101*
+L0008400 000000 000000 000000 000000 000000 000000 000000 000000*
+L0008448 000000 000000 000001 000000 000000 000010 000000 000000*
+L0008496 000000 000000 000001 000000 000000 000000 000000 100000*
+L0008544 000000 000000 000001 000000 000000 000000 000000 100000*
+L0008592 000000 000000 000001 000000 000000 000000 000000 000010*
+L0008640 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0008704 00000000 00000000 10000000 00000000 00000000 01000100 00000000 00000000*
+L0008768 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0008832 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001000*
+L0008896 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0008960 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0009024 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009088 00000000 00000000 10100000 00000000 00000000 00000000 00000000 00010000*
+L0009152 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009216 000000 000000 000000 000000 000000 000000 000000 000000*
+L0009264 000000 000000 010000 000000 000000 000000 000000 000000*
+L0009312 000000 000000 010000 000000 000000 000000 000000 000000*
+L0009360 000000 000000 000000 000000 000000 000000 000000 000000*
+L0009408 000000 000000 000000 000000 000000 000000 000000 010001*
+L0009456 000000 000000 000000 000000 000000 000000 000000 000000*
+L0009504 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009568 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009632 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009696 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009760 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009824 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009888 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0009952 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0010016 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0010080 000000 000000 000000 000000 000000 000000 000000 000000*
+L0010128 000000 000000 000000 000000 000000 000000 000000 000000*
+L0010176 000000 000000 000000 000000 000000 000000 000000 000000*
+L0010224 000000 000000 000000 000000 000000 000000 000000 000000*
+L0010272 000000 000000 000000 000000 000000 000000 000000 000000*
+L0010320 000000 000000 000000 000000 000000 000000 000000 000000*
+L0010368 00000011 00000001 00000001 00000011 00000011 00000011 00000011 00000011*
+L0010432 00000011 00000001 00010010 00000011 00100001 00000011 00000011 00000010*
+L0010496 00000011 00000001 00110001 00000011 00010010 00100011 00000010 00000011*
+L0010560 00000011 00000001 10010000 00000011 00010011 00000011 00000011 00000000*
+L0010624 00000011 00000001 10000010 00000011 00100011 00000011 00000010 00000011*
+L0010688 00000011 00000001 10000011 00000011 00000011 00000011 00000011 00000001*
+L0010752 00000011 00000011 10100010 00000011 00000010 00000011 00000011 00000010*
+L0010816 00000011 00000011 00000001 00000001 00000011 01100011 00000011 00000011*
+L0010880 00000011 00000011 10100010 00000011 00000010 00000011 00000011 00000000*
+L0010944 000000 000000 101000 000000 000000 000000 000000 000000*
+L0010992 000000 000000 101001 000000 000000 000000 000000 000010*
+L0011040 000000 000000 101000 000000 111000 000000 000000 000000*
+L0011088 000000 000000 101000 000000 011000 000000 000000 000000*
+L0011136 000000 000000 111000 000000 011000 000000 000000 000000*
+L0011184 000000 000000 111000 000000 001000 000000 000000 000000*
+L0011232 00000000 00000000 00100010 00000001 10101000 00100000 00100000 10000000*
+L0011296 00000000 00000000 00000001 00000000 00001010 00000000 11000100 00000001*
+L0011360 00000000 00000000 00000010 00000011 10101001 00001000 01000100 00000000*
+L0011424 00000100 00000000 00100001 00000011 10100000 00000000 00000000 00000001*
+L0011488 00000000 00000000 00000001 00000001 00000000 00000000 00000000 00000000*
+L0011552 00000000 00100000 00000000 00000001 00000100 01100000 00000000 00000010*
+L0011616 00000000 00000000 00000001 00000000 00000001 00000000 00000100 00000001*
+L0011680 00000000 00000000 00000010 00000000 00000000 00000000 00000100 00000000*
+L0011744 00000100 00000000 00000001 00000000 00000001 00000000 00000000 00000011*
+L0011808 000000 000000 000000 000000 000000 000000 000000 000000*
+L0011856 000000 000000 000000 000000 000000 000000 000000 000000*
+L0011904 000000 000000 000001 000000 000000 000000 100001 000010*
+L0011952 000000 000000 010000 000000 000000 010000 100001 000000*
+L0012000 000000 000000 000001 000000 000000 000000 000000 000000*
+L0012048 000000 000000 000000 000000 000000 000000 000000 000000*
+L0012096 00010000 00000000 00000001 00000011 00000011 00100001 00000011 00000001*
+L0012160 00000000 00000000 00000010 00000000 00000001 00000011 00000011 00000000*
+L0012224 00000000 00000000 00001001 00000011 00000010 00001011 00000010 00000011*
+L0012288 00000000 00000000 00000000 00000011 00000001 00000011 00000011 00000000*
+L0012352 00000001 00000000 00000000 00000001 00000001 00000011 00000010 00000011*
+L0012416 00000000 00000000 00000011 00000011 00100000 01100010 00000011 00000001*
+L0012480 00000001 00000001 00000000 00000011 00100010 00000011 00000011 00000010*
+L0012544 00000001 00000000 00000000 00000011 00000011 00000010 00000011 10000001*
+L0012608 00000001 00000000 00000010 00000001 00000000 00000011 00000001 00000000*
+L0012672 000000 000000 000000 000000 000000 000000 000000 000000*
+L0012720 001000 000000 000000 000000 000000 000000 000000 000000*
+L0012768 000000 000000 000000 000000 000000 000000 000000 100000*
+L0012816 000000 000000 000000 000000 000000 010000 000000 000000*
+L0012864 000000 000000 000000 000000 000000 000000 000000 000000*
+L0012912 000000 000000 000000 000000 000000 000000 000000 000000*
+L0012960 00000000 00000000 00000110 00000000 01000000 00000000 00000000 00000010*
+L0013024 00000000 00000000 00000101 00000000 00000010 00100011 00000000 00000011*
+L0013088 00000000 00000000 00000110 00000000 00000001 00000001 00000000 00000000*
+L0013152 00000000 00000000 10110101 00000000 00000000 00000000 00000000 00000001*
+L0013216 00000000 00000000 10100111 00000000 00000000 00000000 00000000 00000000*
+L0013280 00000000 00000000 00000000 00000000 00000011 00000001 00000000 00000010*
+L0013344 00000000 00000000 00000111 00000000 00000001 01100000 01000000 00000001*
+L0013408 00000000 00000000 00000111 00000010 00000000 00000001 00000000 00000010*
+L0013472 00000000 00000000 00100101 00000000 00000011 00000010 00000010 00000011*
+L0013536 000000 000000 001000 000000 000000 000000 000000 000000*
+L0013584 000000 000000 101001 000000 000000 000000 000000 000000*
+L0013632 000000 000000 101001 000000 000000 000000 000000 000000*
+L0013680 000000 000000 101001 000000 000000 000000 000000 000000*
+L0013728 000000 000000 101001 000000 000000 000000 000000 000000*
+L0013776 000000 000000 101001 000000 000000 000000 000000 000000*
+L0013824 00000000 00000000 00000001 00000001 00000011 00000001 00000001 00000001*
+L0013888 00000000 00000000 00000010 00000000 00000000 00000011 00000000 00000000*
+L0013952 00000000 00000000 00000001 00000001 00000000 00000001 00000010 00000011*
+L0014016 00000000 00000000 00000000 00000001 00000001 00000001 00000011 00000000*
+L0014080 00000000 00000000 00000000 00000001 00000000 00000010 00000000 00000011*
+L0014144 00000000 00000000 00000001 00010001 00000000 00000010 00000001 00100000*
+L0014208 00000000 00000000 00000000 00000001 00000010 00000011 00000011 01000010*
+L0014272 00000000 00000000 00000000 00000001 00000011 00000010 00000011 01000001*
+L0014336 00000001 00000000 00000000 00000001 00000000 00000011 00000001 01000000*
+L0014400 000000 000000 000000 000000 000000 000000 000000 000000*
+L0014448 000000 000010 000000 010000 000000 000000 000000 000000*
+L0014496 000000 000000 000000 010000 000000 000000 000000 000000*
+L0014544 000000 000000 000000 000000 000000 000000 000000 000100*
+L0014592 000000 000000 000000 000000 000000 000000 000000 000000*
+L0014640 000000 000000 000000 000000 000000 000000 000000 000000*
+L0014688 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000010*
+L0014752 00000000 00000000 00000001 00000000 00000011 00000000 11111100 00000011*
+L0014816 00000000 00000000 00100010 00000000 00000011 00000000 01111100 00000000*
+L0014880 00000000 00000000 00000001 00000000 00000000 00010000 00000000 00010001*
+L0014944 00000000 00000000 00000001 00000000 00000001 00000100 00000000 00100000*
+L0015008 00000000 00000000 00100010 00000000 00000011 00000000 00000000 00000111*
+L0015072 00000000 00000000 00100011 00000000 00000001 00000000 00000100 00000001*
+L0015136 00000000 00000000 00100011 00000000 00000010 00000001 00000100 00000010*
+L0015200 00000000 00000000 00100011 00000000 00000011 00000100 00000000 00000011*
+L0015264 000000 000000 001000 000000 000000 000000 000000 100010*
+L0015312 000000 000100 001000 000000 100000 000000 000000 000100*
+L0015360 000000 000000 001000 000000 100000 000000 100011 000000*
+L0015408 000000 000000 000000 000000 000000 000000 100011 000000*
+L0015456 000000 000000 000000 000000 000000 000000 000000 000000*
+L0015504 000000 000000 000000 000000 000000 000001 000000 000000*
+L0015552 00000000 00000000 00000001 00000000 00000111 00000001 00000011 00000001*
+L0015616 00000000 00000000 00010010 00000000 00000100 00000001 00000000 00000000*
+L0015680 00000000 00000000 00110001 00000000 00010000 00000000 00000010 00000011*
+L0015744 00000000 00000000 10010000 00000000 00001011 00000001 00000011 00000000*
+L0015808 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000001*
+L0015872 00000001 00000000 10000001 00000001 10000000 00000000 00000001 00000000*
+L0015936 00000001 00000000 10100000 00001001 10000010 00000001 00000011 00000010*
+L0016000 00000001 00000001 00000000 00000001 10000000 00000010 00000011 00000001*
+L0016064 00000000 00000001 10100000 00000011 00000000 00000011 00000001 00000000*
+L0016128 000000 000000 101000 000000 000000 000000 000000 000000*
+L0016176 000000 000000 101001 000000 000001 000000 000000 000000*
+L0016224 000001 000000 101000 000010 000010 000000 000000 100000*
+L0016272 000001 000000 101000 000010 000010 000000 000000 000000*
+L0016320 000000 000000 101000 000000 000000 000000 000000 000000*
+L0016368 000000 000000 101000 000000 000000 000000 000000 000000*
+L0016416 00000000 00000000 00000010 00000000 00000000 00000000 00000011 00000000*
+L0016480 00000000 00000000 00000001 00010000 00000011 00000000 00000000 00000011*
+L0016544 00000000 00000000 00000010 00000000 00000011 00000000 00000010 00000000*
+L0016608 00000000 00000000 00000001 00000000 00000010 00010000 00000011 00000001*
+L0016672 00000000 00000000 00100001 00000000 00000000 00000100 00000000 00000010*
+L0016736 00000001 00000000 00000010 00000000 00000011 00000000 00100001 00100011*
+L0016800 00001001 00000000 00000011 00000001 00000001 00000000 00100011 01000001*
+L0016864 00000001 00000001 00000011 00001001 00000011 00000001 00100001 01000010*
+L0016928 00000000 00000101 00000011 00000011 00000011 00000100 00100001 01000011*
+L0016992 000000 000000 000000 000000 000000 000000 001000 000000*
+L0017040 000001 000000 000000 000000 000000 000000 000000 000000*
+L0017088 000000 000000 000000 100000 000000 000000 000000 000000*
+L0017136 000000 000000 000001 000000 000000 000000 000000 000000*
+L0017184 000000 000001 000000 000010 000000 000000 000000 000000*
+L0017232 000000 000000 000001 000000 000000 000001 000000 000000*
+L0017280 00000000 00000000 00000000 00000000 00000011 00000001 00000000 00000001*
+L0017344 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000000*
+L0017408 00000000 00000000 00000001 00000000 00000000 00000000 00000000 00000010*
+L0017472 00000000 00000000 00000000 00000000 00000001 00000001 00000000 00000000*
+L0017536 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000001*
+L0017600 00000000 00000000 00000001 00000000 00000000 00000000 00000000 00000000*
+L0017664 00000000 00000000 00000000 00000000 00000010 00000001 00000000 00000010*
+L0017728 00000000 00000000 00000000 00000000 00000000 00000000 00000010 00000001*
+L0017792 00000000 00000000 00000000 00000000 00000000 00000001 00000000 00000000*
+L0017856 000000 000000 000000 000000 000000 000000 000000 000000*
+L0017904 000000 000000 000000 000000 000000 000000 000000 000000*
+L0017952 000000 000000 000000 000000 000000 000000 000000 000000*
+L0018000 000000 000000 000000 000000 000000 000000 000000 000000*
+L0018048 000000 000000 000000 000000 000000 000000 000000 000000*
+L0018096 000000 000000 000000 000000 000000 000000 000000 000000*
+L0018144 00000000 00000000 00000011 00000000 00000000 00000000 00000000 00000000*
+L0018208 00000000 00000000 00000001 00000000 00000010 00000000 00000000 00000011*
+L0018272 00000000 00000000 00000010 00000000 00000001 00010000 00000000 00000001*
+L0018336 00000000 00000000 00100001 00000000 00000000 00000100 00000000 00000001*
+L0018400 00000000 00000000 00100001 00000000 00000000 00000000 00000000 00000000*
+L0018464 00000000 00000000 00000010 00000000 00000001 00000000 00000000 01000011*
+L0018528 00000000 00000000 00000011 00000000 00000001 00000000 00000010 00000001*
+L0018592 00000000 00000000 00000010 00000000 00000001 00000101 00000000 00000010*
+L0018656 00000000 00000000 00000011 00000000 00010011 00000000 00000000 00000001*
+L0018720 000000 000000 000000 000000 000000 000000 000000 000000*
+L0018768 000000 000000 000000 000000 000000 000000 000000 000000*
+L0018816 000000 000000 000001 000000 000000 000000 000000 000000*
+L0018864 000000 000000 000001 000000 000000 000000 000000 000000*
+L0018912 000000 000000 000001 000000 000000 000001 000000 000000*
+L0018960 000000 000000 000001 000000 000000 000000 000000 000000*
+L0019008 10000010 00000000 00000001 00000000 00000010 00000000 00000000 00000001*
+L0019072 00000000 00000000 00000000 00000001 00000010 00000001 00000000 00000000*
+L0019136 00000000 00000001 00000001 00000000 00000000 00000000 00000001 00000010*
+L0019200 00000000 00000000 00000000 00000000 00000001 00000011 00000000 00000000*
+L0019264 00000000 00000000 00000000 00000010 00000000 00000001 00000001 00000011*
+L0019328 00000000 00000000 00010010 00000000 00000010 00000010 00000000 00000010*
+L0019392 00000000 00000000 00000000 00000000 00000000 00000011 00000000 00000010*
+L0019456 00000000 00000000 00000001 00001000 00000000 00000000 00000000 00000011*
+L0019520 00000000 00000000 00000000 00000011 00000000 00000010 00000000 00000000*
+L0019584 000000 000000 000000 000000 000000 000000 000000 000000*
+L0019632 000000 000000 000010 000000 000000 000000 000000 000100*
+L0019680 000000 000000 000000 100000 000000 000000 000000 000100*
+L0019728 000000 000000 000000 000000 000000 000000 000000 000000*
+L0019776 000000 000000 000000 000010 000000 000000 000000 000000*
+L0019824 000000 000000 000100 000000 000000 000000 000000 000000*
+L0019872 00000000 00000000 00000001 00000000 00000011 00000000 00000000 00000001*
+L0019936 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000000*
+L0020000 00000000 00000000 00000001 00010000 00000101 00010000 00000000 00000010*
+L0020064 00000000 00000000 00000000 00000000 00010101 00000100 00000000 00000000*
+L0020128 00000000 00000000 00000000 00000000 00001100 00000000 00000000 00000001*
+L0020192 00000000 00000000 00000011 00000000 00000001 00000000 00000000 00000010*
+L0020256 00000000 00000000 00000010 00001000 00000110 00000001 00000000 00000010*
+L0020320 00000000 00000000 00000000 00000000 00000001 00000100 00000010 00000001*
+L0020384 00000000 00000000 00000010 00000000 00000010 00000001 00000000 00000000*
+L0020448 000000 000000 000000 000000 000000 000000 000000 000000*
+L0020496 000000 000000 000000 000000 000000 000000 000000 000000*
+L0020544 000000 000000 000010 000100 000001 000000 000000 000000*
+L0020592 000000 000000 000000 000010 000001 000000 000000 000100*
+L0020640 000000 000000 000100 000000 000001 000001 000000 000100*
+L0020688 000000 000000 000000 000000 000001 000000 000000 000000*
+L0020736 00000000 00000000 00000000 00000000 00000110 10001000 00000000 10000001*
+L0020800 00000000 00000000 00000010 00000000 00000110 00101000 00000000 00000000*
+L0020864 00000000 00000000 00000001 00001000 00000100 00100000 00000000 00000000*
+L0020928 00000000 00000000 00000000 00000000 00001100 00000000 00000000 00000000*
+L0020992 00000000 00000000 00000000 00000000 10111100 00001000 00000000 00000001*
+L0021056 00000000 00000000 00000001 00000000 10000100 10000000 00000000 00000000*
+L0021120 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00000010*
+L0021184 00000000 00000000 00000000 00001000 10000100 00000000 00000010 00000001*
+L0021248 00000000 00000000 00000000 00000000 10000100 00100000 00000000 00000000*
+L0021312 000000 000000 000000 000000 100001 000000 000000 000000*
+L0021360 000000 000000 000000 000000 000101 000000 000000 000000*
+L0021408 000000 000000 000000 100000 010111 000000 000000 000000*
+L0021456 000001 000000 010000 000000 010111 000000 000000 000000*
+L0021504 000000 000000 010000 000010 010111 000000 000000 000000*
+L0021552 000000 000000 010000 000000 000111 000000 000000 000000*
+L0021600 00000000 00000000 00000000 00000000 10111000 00000000 00001000 00000010*
+L0021664 00000000 00000100 00000000 00001000 10000010 00000000 11110100 00000001*
+L0021728 00000000 00000000 00000010 00010000 00000010 00000000 01110100 00000000*
+L0021792 00000000 00000000 00000001 00000000 00000000 00001000 00000000 00000000*
+L0021856 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0021920 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000001*
+L0021984 00000000 00000000 00000001 00001000 00000000 01100000 00000100 00000000*
+L0022048 00000000 00000000 00000001 00000000 00000000 11100000 00000100 00000010*
+L0022112 00000000 00000000 00000000 00000000 00000000 00000000 00000010 00000001*
+L0022176 000000 000000 000000 000000 000000 000000 000000 000000*
+L0022224 000000 000000 000000 000000 000000 000000 000000 000000*
+L0022272 000000 000000 000000 000010 100000 000000 100001 000010*
+L0022320 000000 000000 000000 000100 000000 000000 100001 000000*
+L0022368 000000 000000 000000 000000 000000 000000 000000 000000*
+L0022416 000000 000000 000000 000000 000000 000000 000000 000000*
+L0022464 00000011 00000001 00000001 00000011 00000011 00010011 00000011 00000011*
+L0022528 00000011 00000001 00000010 00000011 00000011 00000011 00000011 00010110*
+L0022592 00000011 00000001 00000001 00000011 00000011 00000011 00000011 00000111*
+L0022656 00000011 00000001 00000000 00000011 00000011 00000011 00000011 00000000*
+L0022720 00000011 00000001 00000010 00000011 00000011 00000011 00000011 00000011*
+L0022784 00000011 00000001 01000011 00000011 00000011 00000011 00000011 00000011*
+L0022848 00000011 00000011 00000010 00000011 00000010 00000011 00000011 00000010*
+L0022912 00000011 00000011 00000001 00000011 00000011 00000011 00000011 00000011*
+L0022976 00000011 00000011 00000010 00000011 00000010 00010011 00000011 00000000*
+L0023040 000000 000000 000000 000000 000000 000000 000000 000000*
+L0023088 000000 000000 001011 000000 000000 000001 000000 000000*
+L0023136 000000 000000 001110 000000 000000 000000 000000 000000*
+L0023184 000000 000000 100000 000000 000000 000000 000000 000000*
+L0023232 000000 000000 101000 000000 000000 001000 000000 000000*
+L0023280 000000 000000 101000 000000 000000 000000 000000 000000*
+L0023328 00000000 00100000 00000100 00000000 00000000 01000100 00000000 00001000*
+L0023392 00000000 00000000 00000100 00000000 00000000 00010000 00000000 00001000*
+L0023456 00000000 00000000 00000100 00000000 00000000 00010100 00000000 00101000*
+L0023520 00000000 00000000 00000100 00000000 00000000 00010100 00000000 00101000*
+L0023584 00000000 00000000 00000100 00000000 00000000 00010100 00000000 00101000*
+L0023648 00000000 00000000 00001000 00000000 00000000 00010100 00000000 00000000*
+L0023712 00000000 00000000 00001100 00000000 00000000 00000100 00010000 00100000*
+L0023776 00000000 00000000 00001100 00000000 00000000 00000100 00000000 00101000*
+L0023840 00000000 00000000 00001100 00000000 00000000 00000100 00000000 00101000*
+L0023904 000000 000000 000010 000000 000000 000001 000000 001010*
+L0023952 010000 000000 000000 000000 010000 001100 000000 010000*
+L0024000 000000 000000 000000 000000 000000 000011 000000 010100*
+L0024048 000000 000000 010010 000000 000000 000001 000000 010110*
+L0024096 000000 000000 010010 000000 000000 000001 000000 010110*
+L0024144 000000 000000 010010 000000 000000 000001 000000 010110*
+L0024192 00000000 00000000 00110000 00000000 00000000 00000000 00000000 00000000*
+L0024256 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0024320 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0024384 00000000 00000000 00000000 00000000 01000000 00000000 00000000 00000000*
+L0024448 00000000 00000000 00000000 00000000 10010000 00000000 00000000 00000000*
+L0024512 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0024576 00000000 00000000 01010000 00000000 00000000 00000000 00000000 00000000*
+L0024640 00000000 00000000 00000000 00000000 00000100 00000000 00000000 00000000*
+L0024704 00000000 00000000 00000000 00000000 00000000 00010000 00000000 00000000*
+L0024768 000000 000000 000000 000000 000000 000000 000000 000000*
+L0024816 000000 000000 000000 000000 000100 000000 000000 000000*
+L0024864 000000 000000 000000 000000 000000 000000 000000 000010*
+L0024912 000000 000000 000000 000000 000000 000000 000000 000000*
+L0024960 000000 000000 000000 000000 000000 001000 000000 000000*
+L0025008 000000 000000 000000 000000 000000 000000 000000 000000*
+L0025056 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0025120 00000000 00000000 00000100 00000000 00000000 00000000 11111100 00000000*
+L0025184 00000000 00000000 10000000 00000000 00001000 00000000 01111100 00000000*
+L0025248 00000000 00000000 00000100 00000000 10100000 00000000 00000000 00000000*
+L0025312 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0025376 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0025440 00000000 00000000 10000100 00000000 00100000 00000000 00000100 00000000*
+L0025504 00000000 00000000 00001000 00000000 00000000 00000000 00000100 00000000*
+L0025568 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0025632 000000 000000 100010 000000 100001 000000 000000 000000*
+L0025680 000000 001000 100001 010000 000000 100000 000010 000010*
+L0025728 000000 000000 100000 000000 010000 100000 100001 000000*
+L0025776 000001 000000 000000 000000 001100 000000 100001 000000*
+L0025824 000000 000000 000011 000000 010000 000000 000000 000000*
+L0025872 000000 000000 110001 000000 001100 000000 000000 000000*
+L0025920 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0025984 00000000 00000000 00000100 00000011 00000011 00000000 00000011 00000010*
+L0026048 00000000 00000000 00000100 00000000 00000001 00000000 00000001 00000001*
+L0026112 00000100 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0026176 00000000 00000000 00000100 00000010 00000011 00000001 00000011 00000010*
+L0026240 00000000 00000000 01001000 00000010 00000011 00000001 00000010 00000011*
+L0026304 00000000 00000000 00001100 00000000 00000000 00000000 00000000 00000000*
+L0026368 00000000 00000000 00011101 00000000 00000000 00000001 00000010 00000010*
+L0026432 00000100 00000000 00001110 00000000 00000010 00000000 00000010 00000000*
+L0026496 000000 000000 000010 000000 000000 000000 000000 000000*
+L0026544 000000 000000 000010 000000 000000 000000 000000 000000*
+L0026592 000000 000000 000010 000000 000000 000000 000000 000000*
+L0026640 000000 000000 000010 000000 000000 000000 000000 000000*
+L0026688 000000 000000 000010 000000 000000 000000 000000 000000*
+L0026736 000000 000000 000010 000000 000000 000000 000000 000000*
+L0026784 00000000 00001000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0026848 00000000 00000000 00000000 00000000 00000000 00000000 11111100 00000000*
+L0026912 00000000 00000000 00000000 00000000 00000000 00000000 01111100 00000000*
+L0026976 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0027040 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0027104 00000000 00000000 00000000 00000000 00000000 00010000 00000000 00000000*
+L0027168 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0027232 00000000 00000000 00000000 00000000 00000000 00010000 00000100 00000000*
+L0027296 00000000 00000000 00000000 00000000 00000000 00010000 00000000 00000000*
+L0027360 000000 000000 000000 000000 000000 000000 000000 000000*
+L0027408 000000 000000 000000 000000 000000 000000 000000 000000*
+L0027456 000000 000000 000000 000000 000000 000000 100011 000000*
+L0027504 000000 000000 000000 000000 000000 000000 100011 000000*
+L0027552 000000 000000 000000 000000 000000 000000 000000 000000*
+L0027600 000000 000000 000000 000000 000000 000000 000000 000000*
+L0027648 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000100*
+L0027712 00000000 00000000 10000000 00000001 00000011 00000000 00000011 10000110*
+L0027776 00000000 00000000 10000000 00000000 00000001 00000000 00000001 10000100*
+L0027840 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0027904 00000000 00000000 00000000 00000010 00000001 00000000 00000011 00000110*
+L0027968 00000000 00000000 00100000 00000010 00000011 00000001 00000010 00000010*
+L0028032 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0028096 00000000 00000000 10100001 00000010 00000000 00000000 00000010 00000110*
+L0028160 00000000 00000000 00000000 00000000 00000010 00000000 00000010 00000100*
+L0028224 000000 000000 000000 000000 000000 000000 000000 000001*
+L0028272 000000 000000 010000 000000 000000 000000 000000 000001*
+L0028320 000000 000000 010000 000000 000000 000000 000000 000001*
+L0028368 000000 000000 000000 000000 000000 000000 000000 000001*
+L0028416 000000 000000 000000 000000 000000 000000 000000 000001*
+L0028464 000000 000000 000000 000000 000000 000000 000000 000001*
+L0028512 00000000 00000001 00000001 01011001 00000011 00000000 00000000 00010001*
+L0028576 00000100 00000001 00000010 00000000 00000000 00000000 11111100 00000000*
+L0028640 00000000 00000001 00000001 00000011 00000010 00000000 01111100 00100011*
+L0028704 00000000 00000001 00000000 00000011 00000011 00000000 00000000 00000000*
+L0028768 00000000 00000001 00000010 00000001 00000010 00000001 00000000 00000001*
+L0028832 00000000 00000001 00000011 00001001 00010000 00000000 00000000 00000000*
+L0028896 00000001 00000011 00000010 00000000 00000010 00000000 00000100 00000010*
+L0028960 00000001 00000011 00000000 00000000 00000011 00000000 00000100 00001001*
+L0029024 00000000 00000011 00000010 00000000 00000000 00000000 00000000 00000000*
+L0029088 000000 000000 000000 000000 000000 000000 000000 000000*
+L0029136 000000 000000 000000 100110 000000 001000 000000 000000*
+L0029184 000000 000000 000000 000000 000000 000000 100011 000100*
+L0029232 000000 000000 000000 000000 000000 001000 100011 000100*
+L0029280 000000 000000 000000 000000 000000 001000 000000 000100*
+L0029328 000000 000000 000000 000000 000000 000000 000000 000000*
+L0029376 00000011 00000000 00000000 00000001 00000000 00000011 00000000 00000000*
+L0029440 00000011 00000000 00000000 00000000 00000000 01000111 00000000 00000000*
+L0029504 00000011 00000000 00000000 00000011 00000000 00000011 00000000 00000000*
+L0029568 00000010 00000000 00000000 00000011 00000000 00000011 00000000 00000000*
+L0029632 00000011 00000000 00000000 00000001 00000000 00000010 00000000 00000000*
+L0029696 00000011 00000000 00000000 00000001 00000000 00000010 00000000 00000000*
+L0029760 00000010 00000000 00000000 00000000 00000000 00000011 00000000 00000000*
+L0029824 00000000 00000000 00000000 00000000 00000000 00010011 00000000 00000000*
+L0029888 00000011 00000000 00000000 00000000 00000000 00000011 00000000 00000000*
+L0029952 000000 000000 000000 000000 000000 000000 000000 000000*
+L0030000 000000 000000 000000 000000 000000 000000 000000 000000*
+L0030048 000000 000000 000000 000000 000000 000000 000000 000100*
+L0030096 000000 000000 000000 000000 000000 001100 000000 000000*
+L0030144 000000 000000 010000 000000 000000 000000 000000 000000*
+L0030192 000000 000000 010000 000000 000000 000000 000000 000000*
+L0030240 00000001 00000000 00000000 00000010 00000000 00010000 00000011 00000010*
+L0030304 00000000 00000000 00000000 00000010 00000000 00010001 11111100 00000000*
+L0030368 00000011 00000000 00000000 00000000 00000000 00010101 01111110 00000000*
+L0030432 00000001 00000000 00000000 00000000 00000000 00010100 00000011 00000000*
+L0030496 00000010 00000000 00000000 00000000 00000010 00010100 00000000 00000000*
+L0030560 00000010 00000001 00000000 00000000 00000000 00000000 00000001 00000001*
+L0030624 00000100 00000000 00000000 00000011 00000000 00000100 00000111 00000000*
+L0030688 00000010 00000000 00000000 00000001 00000000 00000101 00000101 00000000*
+L0030752 00000000 00000000 00000000 00000011 00000000 00010110 00000001 00000000*
+L0030816 000000 000000 000000 000000 000000 000001 000000 000000*
+L0030864 000000 000000 000000 000000 000000 000001 000000 000000*
+L0030912 000000 000000 000000 000000 000000 100011 100011 000000*
+L0030960 000000 000000 010000 000000 000000 000001 100011 000100*
+L0031008 000000 000000 000000 000000 000000 001001 000000 000100*
+L0031056 000000 000000 000000 000000 000000 000001 000000 000000*
+L0031104 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031232 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031296 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031360 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031424 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031488 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031552 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031616 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0031680 000000 000000 000000 000000 000000 000000 000000 000000*
+L0031728 000000 000000 000000 000000 000000 000000 000000 000000*
+L0031776 000000 000000 000000 000000 000000 000000 000000 000000*
+L0031824 000000 000000 000000 000000 000000 000000 000000 000000*
+L0031872 000000 000000 000000 000000 000000 000000 000000 000000*
+L0031920 000000 000000 000000 000000 000000 000000 000000 000000*
+L0031968 00000000 00000000 00000000 00000000 00000000 00000000 00000011 00000000*
+L0032032 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0032096 00000000 00000000 00000000 00000000 00000000 00000000 00000010 00000000*
+L0032160 00000000 00000000 00000000 00000000 00000010 00000000 00000011 00000000*
+L0032224 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0032288 00000001 00000000 00000000 00000000 00000000 00000000 00000001 00000000*
+L0032352 00000001 00000000 00000000 00000001 00000000 00000000 00000011 00000000*
+L0032416 00000001 00000001 00000000 00000001 00000000 00000000 00000001 00000000*
+L0032480 00000000 00000001 00000000 00000011 00000000 00000000 00000001 00000000*
+L0032544 000000 000000 000000 000000 000000 000000 000000 000000*
+L0032592 000000 000000 000000 000000 000000 000000 000000 000000*
+L0032640 000000 000000 000000 000000 000000 000000 000000 000000*
+L0032688 000000 000000 000000 000000 000000 000000 000000 000000*
+L0032736 000000 000000 000000 000000 000000 000000 000000 000000*
+L0032784 000000 000000 000000 000000 000000 000000 000000 000000*
+L0032832 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0032896 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0032960 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0033024 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0033088 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0033152 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
+L0033216 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
+L0033280 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0033344 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10000000*
+L0033408 000000 000000 000000 000000 000000 000000 000000 100000*
+L0033456 000000 000000 000000 000000 000000 000000 000000 000000*
+L0033504 000000 000000 000000 000000 000000 000000 000000 100000*
+L0033552 000000 000000 000000 000000 100000 000000 000000 100000*
+L0033600 000000 000000 000000 000000 100000 000000 000000 100000*
+L0033648 000000 000000 000000 000000 000000 000000 000000 100000*
+L0033696 00000000 00000000 00000000 00000001 00000000 00000001 00000111 00000010*
+L0033760 00000000 00000000 00000000 00000000 00000000 00000010 10000000 00000000*
+L0033824 00000000 00000000 00000001 00000001 00000000 00000000 00000010 00000011*
+L0033888 00000000 00000000 00000000 00000000 00000000 00000000 00000011 00000000*
+L0033952 00000000 00000000 00000000 00000000 00000000 00000010 00000000 00000000*
+L0034016 00000000 00010000 00000001 00000000 00000000 00000000 00000001 00000001*
+L0034080 00000000 00000000 00000010 00000001 00000000 00000010 00000011 10000000*
+L0034144 00000000 00000000 00000000 00000001 00000010 00000010 00000001 00000000*
+L0034208 00000000 00000000 00000000 00000010 00000000 00000001 00000001 00000000*
+L0034272 000000 000000 000000 000000 000000 000000 000000 000000*
+L0034320 000000 000000 000000 000000 000000 000000 000000 100000*
+L0034368 000000 000000 000000 010000 000000 000000 000000 000000*
+L0034416 000000 000000 000000 000000 000000 000000 000000 000000*
+L0034464 000000 000000 000000 000000 000000 000000 000000 000000*
+L0034512 000000 000000 000000 000000 000000 000000 000000 000000*
+L0034560 00001000 00000000 00000000 00100000 00000000 00000000 00000000 10000000*
+L0034624 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0034688 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0034752 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0034816 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0034880 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0034944 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035008 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035072 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035136 000000 000000 000000 000000 000000 000000 000000 000000*
+L0035184 000000 000000 000000 000000 000000 000000 000000 000010*
+L0035232 000000 000000 000000 000000 000000 000000 000000 000010*
+L0035280 000000 000000 000000 000000 000000 000000 000000 000000*
+L0035328 000000 000000 000000 000000 000000 000000 000000 000000*
+L0035376 000000 000000 000000 000000 000000 000000 000000 000000*
+L0035424 00000000 00000000 00000000 10000000 00000000 00000000 00000000 00000000*
+L0035488 00000000 00000000 00000000 10000000 00000000 00000000 00000000 00000000*
+L0035552 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035616 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035680 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035744 00000000 00000000 00000000 10000000 00000000 00000000 00000000 00000000*
+L0035808 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035872 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0035936 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0036000 000000 000000 000000 000000 000000 000000 000000 000000*
+L0036048 000000 000000 000000 000000 000000 000000 000000 000000*
+L0036096 000000 000000 000000 000000 000000 000000 000000 000000*
+L0036144 000000 000000 000000 000000 000000 000000 000000 000000*
+L0036192 000000 000000 000000 000000 000000 000000 000000 000000*
+L0036240 000000 000000 000000 000000 000000 000000 000000 000000*
+L0036288 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0036352 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0036416 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001000*
+L0036480 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0036544 00000000 00000000 00000000 00000000 00000000 00000001 00000000 00000000*
+L0036608 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0036672 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0036736 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0036800 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0036864 000000 000000 000000 000000 000000 000000 000000 000000*
+L0036912 000000 000000 000000 000000 000000 000000 000000 000001*
+L0036960 000000 000000 000000 000000 000000 000000 000000 000000*
+L0037008 000000 000000 000000 000000 000000 000000 000000 011000*
+L0037056 000000 000000 000000 000000 000000 000000 000000 000000*
+L0037104 000000 000000 000000 000000 000000 000000 000000 000000*
+L0037152 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0037216 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0037280 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0037344 00000000 00000000 10110100 00000000 00000000 00000000 00000000 00000000*
+L0037408 00000000 00000000 10100100 00000000 00000000 00000000 00000000 00000000*
+L0037472 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10000000*
+L0037536 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0037600 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0037664 00000000 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
+L0037728 000000 000000 001000 000000 000000 000000 000000 000000*
+L0037776 000000 000000 101001 000000 000000 000000 000000 000000*
+L0037824 000000 000000 101001 000000 000000 000000 000000 000000*
+L0037872 000000 000000 101001 000000 000000 000000 000000 000000*
+L0037920 000000 000000 101001 000000 000000 000000 000000 000000*
+L0037968 000000 000000 101001 000000 000000 000000 000000 000000*
+L0038016 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0038080 00000000 00000000 00000000 00000011 00000011 00000011 00000011 00000010*
+L0038144 00000000 00000000 00000000 00000000 00000001 00000001 00000001 00000001*
+L0038208 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0038272 00000000 00000000 00000000 00000010 00000011 00000001 00000011 00000010*
+L0038336 00000000 00000000 00000000 00000010 00000011 00000001 00000010 00000011*
+L0038400 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0038464 00000000 00000000 00000001 00000010 00000000 00000001 00000010 00000010*
+L0038528 00000000 00000000 00000010 00000000 00000010 00000010 00000010 00000000*
+L0038592 000000 000000 000000 000000 000000 000000 000000 000000*
+L0038640 000000 000000 000000 000000 000000 000000 000000 000000*
+L0038688 000000 000000 000000 000000 000000 000000 000000 000000*
+L0038736 000000 000000 000000 000000 000000 000000 000000 000000*
+L0038784 000000 000000 000000 000000 000000 000000 000000 000000*
+L0038832 000000 000000 000000 000000 000000 000000 000000 000000*
+L0038880 00000011 00000001 00000011 00000011 00000011 00000011 00000011 00000011*
+L0038944 00000011 00000001 00000011 00000011 00000011 00000011 00000011 00000011*
+L0039008 00000011 00000001 00000011 00000011 00000011 00000011 00000010 00000011*
+L0039072 00000011 00000001 00100001 00000011 00000011 00000011 00000011 00000001*
+L0039136 00000011 00000001 00100011 00000011 00000011 00000011 00000010 00000011*
+L0039200 00000011 00000001 00000011 00000011 00001011 00000011 00000011 00000011*
+L0039264 00000011 00000011 00000011 00000011 00000011 00000011 00000011 00000011*
+L0039328 00000011 00000011 00000011 00000001 00000011 00000011 00000011 00000011*
+L0039392 00000011 00000011 00000011 00000011 00000011 00000011 00000011 00000011*
+L0039456 000000 000000 000000 000000 000000 000000 000000 000000*
+L0039504 000000 000000 000000 000000 000000 000000 000000 000000*
+L0039552 000000 000000 000001 000000 000000 000000 000000 000000*
+L0039600 000000 000000 000001 000000 000000 000000 000000 000000*
+L0039648 000000 000000 000001 000000 000000 000000 000000 000000*
+L0039696 000000 000000 000001 000000 000000 000000 000000 000000*
+L0039744 00000000 00000000 00000011 00000011 00000011 00000001 00000011 00000011*
+L0039808 00000000 00000000 00000011 00000000 00000011 00000011 00000011 00000011*
+L0039872 00000000 00000000 00000011 00000011 00000011 00000011 00000010 00000011*
+L0039936 00000000 00000000 00000001 00000011 00000001 00000011 00000011 00000001*
+L0040000 00000001 00000000 00000011 00000001 00100001 00000011 00100010 00000011*
+L0040064 00000000 00000000 00000011 00000011 00100011 00000011 00000011 00000011*
+L0040128 00000001 00000001 00000011 00000011 00100011 00000011 00000011 00000011*
+L0040192 00000001 00000000 00000011 00000011 00000011 00000011 00000011 00000011*
+L0040256 00000001 00000000 00000011 00000001 10000111 00000011 00000011 00000011*
+L0040320 000000 000000 000000 000000 100001 000000 000000 000000*
+L0040368 000000 000000 000000 000000 000000 000000 000000 000000*
+L0040416 000000 000000 000000 000000 011100 000000 001000 000000*
+L0040464 000000 000000 000000 000000 111100 000000 000000 000000*
+L0040512 000000 000000 000000 000000 111110 000000 000000 000000*
+L0040560 000000 000000 000000 000000 001110 000000 000000 000000*
+L0040608 00000000 00000000 00000011 00000001 00000111 00000001 00000001 00000011*
+L0040672 00000000 00000000 00000011 00000000 00000011 00000011 00000000 00000011*
+L0040736 00000000 00000000 00000011 00000001 00000011 00000001 00000010 00000011*
+L0040800 00000000 00000000 00000001 00000001 00000001 00000001 00000011 00000001*
+L0040864 00000000 00000000 00000001 00000001 00000001 00000010 00000000 00000011*
+L0040928 00000000 00000000 00000011 00000001 00000011 00000010 00100001 00000011*
+L0040992 00000000 00000000 00000011 00000001 00000111 00000011 00000011 00000011*
+L0041056 00000000 00000000 00000011 00000001 00000011 00000011 00000011 00000011*
+L0041120 00000001 00000000 00000011 00000001 00000011 00000011 00000001 00000011*
+L0041184 000000 000000 000000 000000 000000 000000 000000 000000*
+L0041232 000000 000000 000000 000000 000001 000000 000000 000000*
+L0041280 000000 000000 000000 000000 000001 000000 000000 000000*
+L0041328 000000 000000 000000 000000 000000 000000 000000 000000*
+L0041376 000000 000000 000000 000000 000000 000000 000000 000000*
+L0041424 000000 000000 000000 000000 000000 000000 000000 000000*
+L0041472 00000000 00000000 00000011 00000000 00000011 00000001 00000011 00000001*
+L0041536 00000000 00000000 00000011 00000000 00000011 00000001 00000000 00000011*
+L0041600 00000000 00000000 00000011 00000000 00000011 00000000 00000010 00000011*
+L0041664 00000000 00000000 00000001 00000000 00000011 00000001 00000011 00000001*
+L0041728 00000000 00000000 00000001 00000000 00100100 00000000 00000000 00000011*
+L0041792 00000001 00000000 00000011 00000001 00000011 00000000 00000001 00000011*
+L0041856 00000001 00000000 00000011 00000001 00000011 00000001 00000011 00000011*
+L0041920 00000001 00000001 00000011 00000001 10000011 00000011 00000011 00000011*
+L0041984 00000000 00000001 00000011 00000011 10000011 00000011 00000001 00000011*
+L0042048 000000 000000 000000 000000 100000 000000 000000 000000*
+L0042096 000000 000000 000000 000000 000000 000000 000000 000000*
+L0042144 000000 000000 000000 000000 011100 000000 000000 000000*
+L0042192 000000 000000 000000 000000 001110 000000 000000 000000*
+L0042240 000000 000000 000000 000000 000010 000000 000000 000000*
+L0042288 000000 000000 000000 000000 000001 000000 000000 000000*
+L0042336 00000000 00000000 00000011 00000000 00000011 00000001 00010000 00000001*
+L0042400 00000000 00000000 00000011 00000000 00000110 00000000 11100100 00000011*
+L0042464 00000000 00000000 00000011 00000000 00000101 00000000 01100100 00000011*
+L0042528 00000000 00000000 00000001 00000000 00000101 00000001 00000000 00000001*
+L0042592 00000000 00000000 00000001 00000000 00000000 00000000 00000000 00000001*
+L0042656 00000000 00000000 00000011 00000000 10100001 00000000 00000000 00000011*
+L0042720 00000000 00000000 00000011 00000000 10100011 00000001 00000110 00000011*
+L0042784 00000000 00000000 00000010 00000000 00000001 00000001 00000110 00000011*
+L0042848 00000000 00000000 00000011 00000000 00000111 00000001 00000000 00000001*
+L0042912 000000 000000 000000 000000 000001 000000 000000 000000*
+L0042960 000000 000000 000000 000000 000000 000000 000000 000000*
+L0043008 000000 000000 000000 010000 000010 000000 100001 000000*
+L0043056 000000 000000 000000 000000 110001 000000 100001 000000*
+L0043104 000000 000000 000000 000000 011101 000000 000000 000000*
+L0043152 000000 000000 000000 000000 001110 000000 000000 000000*
+L0043200 00000000 00000000 00000000 00000011 00000000 00000000 00000000 00000010*
+L0043264 00000000 00000000 00000010 00000010 00000010 00000010 00000010 00000010*
+L0043328 00000000 00000000 00000010 00000000 00000000 00000010 00000010 00000000*
+L0043392 00000001 00000011 00000000 00000000 00000000 00000000 00000000 00000001*
+L0043456 00000010 00000000 00000000 00000011 00000010 00000010 00000000 00000010*
+L0043520 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0043584 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0043648 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0043712 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0043776 000000 000000 000000 000000 000000 000000 000000 000000*
+L0043824 000000 000000 000000 000000 000000 000000 000000 000000*
+L0043872 000000 000000 000000 000000 000000 000000 000000 000000*
+L0043920 000000 000000 000000 000000 000000 000000 000000 000000*
+L0043968 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044016 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044064 00000010 00000000 00000011 00000001 00000000 00000000 00000000 00000011*
+L0044128 00000000 00000000 00000001 00000001 00000000 00000001 00000000 00000001*
+L0044192 00000010 00000000 00000001 00000001 00000000 00000001 00000000 00000011*
+L0044256 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0044320 00000010 00000000 00000010 00000000 00000000 00000011 00000000 00000000*
+L0044384 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0044448 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0044512 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0044576 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0044640 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044688 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044736 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044784 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044832 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044880 000000 000000 000000 000000 000000 000000 000000 000000*
+L0044928 00000000 00000000 00000000 00000010 00000000 10000000 00000001 00000000*
+L0044992 00000000 00000000 00000000 00000000 00000010 00101000 00000011 00000010*
+L0045056 00000000 00000000 00000010 00000010 00000000 00100000 00000010 00000010*
+L0045120 00000001 00000000 00000000 00000000 00000000 00000000 00000000 00000001*
+L0045184 00000000 00000000 00000000 00000010 00000010 00000010 00000001 00000000*
+L0045248 00000000 00000000 00000000 00000000 00000000 10000000 00000000 00000000*
+L0045312 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0045376 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0045440 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0045504 000000 000000 000000 000000 000000 000000 000000 000000*
+L0045552 000000 000000 000000 000000 000000 000000 000000 000000*
+L0045600 000000 000000 000000 000000 000000 010000 000000 000000*
+L0045648 000000 000000 000000 000000 000000 000000 000000 000000*
+L0045696 000000 000000 000000 000000 000000 000000 000000 000000*
+L0045744 000000 000000 000000 000000 000000 000000 000000 000000*
+L0045792 00000000 00000000 00000000 00000010 00000010 00000000 00000000 00000000*
+L0045856 00000000 00000000 00000010 00000000 00000001 00000000 00000010 00000011*
+L0045920 00000000 00000000 00000000 00000010 00000010 00000000 00000000 00000001*
+L0045984 00000000 00000000 00000000 00000000 00000000 00001000 00000000 00000000*
+L0046048 00000000 00000000 00000010 00000010 00000001 00000010 00000010 00000010*
+L0046112 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0046176 00000000 00000000 00000000 00000000 00000000 01100000 00000000 00000000*
+L0046240 00000000 00000000 00000000 00000000 00000000 11100000 00000000 00000000*
+L0046304 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000*
+L0046368 000000 000000 000000 000000 000000 000000 000000 000000*
+L0046416 000000 000000 000000 000000 000000 010000 000000 000000*
+L0046464 000000 000000 000000 000000 000000 000000 000000 000000*
+L0046512 000000 000000 000000 000000 000000 000000 000000 000000*
+L0046560 000000 000000 000000 000000 000000 000000 000000 000000*
+L0046608 000000 000000 000000 000000 000000 000000 000000 000000*
+L0046656 00000100 00000000 00000000 00000000 00000010 00000000 00000000 00000000*
+L0046720 00000000 00000000 00000000 00000000 00000000 00000000 00000010 00000010*
+L0046784 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000010*
+L0046848 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0046912 00000000 00000000 00000000 00000000 00000000 00000010 00000000 00000000*
+L0046976 00000000 00000100 00000000 00000000 00000000 00000000 00000000 00100000*
+L0047040 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0047104 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0047168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0047232 000000 000000 000000 000000 000000 000000 000000 000000*
+L0047280 000000 000000 000000 000000 000000 000000 000000 000000*
+L0047328 000000 000000 000000 000000 000000 000000 000000 000000*
+L0047376 000000 000000 000000 000000 000000 000000 000000 000000*
+L0047424 000000 000000 000000 000000 000000 000000 000000 000000*
+L0047472 000000 000000 000000 000000 000000 000000 000000 000000*
+L0047520 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000010*
+L0047584 00000000 00000000 00000000 00000000 00000000 00000001 00000000 00000000*
+L0047648 00000000 00000000 00000000 00000000 00000000 00000001 00000000 00000010*
+L0047712 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0047776 00000000 00000000 00000010 00000000 00000000 00000011 00000000 00000000*
+L0047840 00000000 00000000 00000000 00010000 00000000 00000000 00000000 00000000*
+L0047904 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0047968 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0048032 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0048096 000000 000000 000000 000000 000000 000000 000000 000000*
+L0048144 000000 000000 000000 000000 000000 000000 000000 000000*
+L0048192 000000 000000 000000 000000 000000 000000 000000 000000*
+L0048240 000000 000000 000000 000000 000000 000000 000000 000000*
+L0048288 000000 000000 000000 000000 000000 000000 000000 000000*
+L0048336 000000 000000 000000 000000 000000 000000 000000 000000*
+L0048384 00000010 00000000 00000110 00000000 00000000 10000000 00000011 00000011*
+L0048448 00000010 00000000 00000100 00000000 00000010 00100001 00000010 00000001*
+L0048512 00000010 00000011 00000100 00000000 00000000 00100001 00000001 00000011*
+L0048576 00000000 00000000 10010101 00000000 00000001 00000000 00000000 00000000*
+L0048640 00000010 00000011 10000110 00000000 00000010 00001011 00000011 00000011*
+L0048704 00000000 00000000 00010100 00000000 00000000 10000000 00000000 00100000*
+L0048768 00000000 00000000 00001100 00000000 00000000 00000000 00000000 00000000*
+L0048832 00000000 00000000 00001100 00000000 00000000 10000000 00000000 00000000*
+L0048896 00000000 00000000 00100100 00000000 00000000 00100000 00000000 01000000*
+L0048960 000000 000000 001000 000000 000000 000000 000000 000000*
+L0049008 000000 000000 101001 000000 000000 000000 000000 000000*
+L0049056 000000 000000 101000 000000 000000 000000 000000 000000*
+L0049104 000000 000000 101010 000000 000000 000000 000000 000000*
+L0049152 000000 000000 101010 000000 000000 000000 000000 000000*
+L0049200 000000 000000 101000 000000 000000 000000 000000 000000*
+L0049248 00000000 00000000 00000010 00000000 00000000 00000000 00000010 00000000*
+L0049312 00000010 00000000 00000000 00000000 00000010 00000000 00000000 00000000*
+L0049376 00000000 00000000 00000010 00000000 00000001 00000000 00000010 00000010*
+L0049440 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0049504 00000001 00000000 00000000 00000000 00000011 00000010 00000000 00001010*
+L0049568 00000000 00000000 00001000 00000000 00000000 01000000 00000000 00000000*
+L0049632 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000*
+L0049696 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000*
+L0049760 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0049824 000000 000000 000010 000000 000000 000000 000000 000000*
+L0049872 000000 000000 000000 010000 000000 000000 000000 000000*
+L0049920 000000 000000 000000 010000 000000 000000 000000 000000*
+L0049968 000000 000000 000000 000000 000000 000000 000000 000000*
+L0050016 000000 000000 000100 000000 000000 000000 000000 001000*
+L0050064 000000 000000 000010 000000 000000 000000 000000 010001*
+L0050112 00000000 00000000 00000011 00000001 00000001 00000000 00000010 00000000*
+L0050176 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0050240 00000000 00000000 00000001 00000001 00000011 00000000 00000010 00000000*
+L0050304 00000000 00000010 00000000 00000010 00000000 00000000 00000000 00000010*
+L0050368 00000000 00000000 00000010 00000001 00000010 00000010 00000010 00000000*
+L0050432 00000100 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0050496 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0050560 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0050624 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01000000*
+L0050688 000000 000000 000000 000000 000000 000000 000000 000000*
+L0050736 000000 000000 000000 000000 000000 000000 000000 000000*
+L0050784 000000 000000 000000 000000 000000 000000 000000 000000*
+L0050832 000000 000000 000000 000000 000000 000000 000000 000000*
+L0050880 000000 000000 000000 000000 000000 000000 000000 000000*
+L0050928 000000 000000 000000 000000 000000 000000 000000 000000*
+L0050976 00000000 00000010 00000010 00000010 00000000 00000000 00000010 00000000*
+L0051040 00000010 00000010 00000001 00000000 00000001 00000000 10000100 00000011*
+L0051104 00000010 00000010 00000001 00000010 00000010 00000000 00000110 00000001*
+L0051168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0051232 00000010 00000010 00000010 00000010 00000010 00000010 00000000 00000010*
+L0051296 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0051360 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0051424 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0051488 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0051552 000000 000000 000000 000000 000000 000000 000000 000000*
+L0051600 000000 000000 000000 000000 000000 000000 000000 000000*
+L0051648 000000 000000 000000 000000 000000 000000 000000 000000*
+L0051696 000000 000000 000000 000000 000000 000000 000000 000000*
+L0051744 000000 000000 000000 000000 000000 000000 000000 000000*
+L0051792 000000 000000 000000 000000 000000 000000 000000 000000*
+L0051840 00000000 00000000 00000000 00000001 00000011 00000000 00000000 00000000*
+L0051904 00000000 00000000 00000000 00000000 00000011 00000000 00000000 00000000*
+L0051968 00000000 00000001 00000010 00000001 00000001 00000000 00000000 00010011*
+L0052032 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00100000*
+L0052096 00000000 00000001 00000000 00000001 00100001 00000010 00000000 00000011*
+L0052160 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0052224 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0052288 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0052352 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00001000*
+L0052416 000000 000000 000000 000000 100001 000000 000000 000000*
+L0052464 000000 000000 000000 000000 000000 000000 000000 000000*
+L0052512 000000 000000 000000 000000 010000 000000 000000 000000*
+L0052560 000000 000000 000000 000000 010000 000000 000000 000000*
+L0052608 000000 000000 000000 000000 010010 000000 000000 000000*
+L0052656 000000 000000 000000 000000 000010 000000 000000 000000*
+L0052704 00000000 00000000 00000010 00000011 00010000 00000000 00000000 00000010*
+L0052768 00000010 00000000 00000000 00000000 00010000 00000001 00000000 00000010*
+L0052832 00000010 00000000 00000000 00000011 00010010 00000001 00000000 00000010*
+L0052896 00000000 00000000 00000000 00000000 00010000 00000000 00000000 00000000*
+L0052960 00000010 00000000 00000010 00000011 00000010 00000011 00000000 00000010*
+L0053024 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0053088 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0053152 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0053216 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0053280 000000 000000 000000 000000 000000 000000 000000 000000*
+L0053328 000000 000000 000000 000000 000000 000000 000000 000000*
+L0053376 000000 000000 000000 000000 001000 000000 000000 000000*
+L0053424 000000 000000 000000 000000 001000 000000 000000 000000*
+L0053472 000000 000000 000000 000000 001000 000000 000000 000000*
+L0053520 000000 000000 000000 000000 001000 000000 000000 000000*
+L0053568 00000000 00000000 00000000 00000011 00000001 00000001 00000010 00000000*
+L0053632 00000010 00000001 00000001 00000000 00000011 00000010 00000011 00000000*
+L0053696 00000010 00000010 00000011 00000011 00000000 00000011 00000001 00000000*
+L0053760 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0053824 00000000 00000011 00000010 00000011 00000010 00000011 00000010 00000010*
+L0053888 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0053952 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0054016 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0054080 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0054144 000000 000000 000000 000000 000000 000000 000000 000000*
+L0054192 000000 000000 000000 000000 000000 000000 000000 000000*
+L0054240 000000 000000 000000 000000 000000 000000 000000 000000*
+L0054288 000000 000000 000000 000000 000000 000000 000000 000000*
+L0054336 000000 000000 000000 000000 000000 000000 000000 000000*
+L0054384 000000 000000 000000 000000 000000 000000 000000 000000*
+L0054432 00000010 00000010 00000000 00000000 00000011 00000001 00000011 00000000*
+L0054496 00000010 00000000 00000010 00000000 00000011 00000001 00000001 00000010*
+L0054560 00000010 00000010 00000010 00000000 00000010 00000001 00000010 00000010*
+L0054624 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0054688 00000010 00000010 00000010 00000000 00000000 00000011 00000001 00000010*
+L0054752 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0054816 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0054880 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0054944 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0055008 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055056 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055104 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055152 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055200 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055248 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055296 00000000 00000010 00000000 00000000 00000000 10001010 00000010 00000010*
+L0055360 00000000 00000000 00000000 00000010 00000000 00100000 00000010 00000010*
+L0055424 00000000 00000010 00000010 00000010 00000010 00100000 00000000 00000010*
+L0055488 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0055552 00000010 00000010 00000010 00000000 00000010 00000010 00000010 00000010*
+L0055616 00000000 00000000 00000000 00000000 00000000 10000000 00000000 00000000*
+L0055680 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0055744 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0055808 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0055872 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055920 000000 000000 000000 000000 000000 000000 000000 000000*
+L0055968 000000 000000 000000 000000 000000 010000 000000 000000*
+L0056016 000000 000000 000000 000000 000000 000000 000000 000000*
+L0056064 000000 000000 000000 000000 000000 000000 000000 000000*
+L0056112 000000 000000 000000 000000 000000 000000 000000 000000*
+L0056160 00000000 00000000 00000001 00000001 00000000 00100000 00000010 00000000*
+L0056224 00000000 00000010 00000000 00000001 00000001 00000001 00000000 00000000*
+L0056288 00000010 00000010 00000010 00000001 00000000 00000001 00000010 00000000*
+L0056352 00000000 00000000 00000000 00000000 00000000 00001000 00000000 00000000*
+L0056416 00000010 00000010 00000011 00000001 00000000 00000011 00000010 00000000*
+L0056480 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0056544 00000000 00000000 00000000 00000000 00000000 01100000 00000000 00000000*
+L0056608 00000000 00000000 00000000 00000000 00000000 11100000 00000000 00000000*
+L0056672 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000*
+L0056736 000000 000000 000000 000000 000000 000000 000000 000000*
+L0056784 000000 000000 000000 000000 000000 010000 000000 000000*
+L0056832 000000 000000 000000 000000 000000 000000 000000 000000*
+L0056880 000000 000000 000000 000000 000000 000000 000000 000000*
+L0056928 000000 000000 000000 000000 000000 000000 000000 000000*
+L0056976 000000 000000 000000 000000 000000 000000 000000 000000*
+L0057024 00000001 00000000 00000100 00000000 00000000 00000000 00000010 00000010*
+L0057088 00000001 00000000 10000010 00000010 00001000 00000000 00000000 00000010*
+L0057152 00000010 00000000 00000101 00000010 10100010 00000000 01111111 00000010*
+L0057216 00000000 00000000 10000000 00000000 00000000 00000000 00000000 00000000*
+L0057280 00000010 00000000 10000110 00000000 00100000 00000010 00000010 00000010*
+L0057344 00000000 00000000 10000100 00000000 00100000 00000000 00000000 00000000*
+L0057408 00000000 00000000 00001000 00000000 00000000 00000000 00000000 10000000*
+L0057472 00000000 00000000 10000100 00000000 00000000 00000000 00000100 10000000*
+L0057536 00000000 00000000 10001000 00000000 10000100 00000000 00000000 10000000*
+L0057600 000000 000000 000000 000000 000000 000000 000000 100000*
+L0057648 000000 000000 000000 000000 010000 000010 000000 000000*
+L0057696 000000 000000 000001 000000 001100 000000 000000 100000*
+L0057744 000000 000000 100011 000000 010000 000000 100011 100000*
+L0057792 000000 000000 110000 000000 001100 000000 000000 100000*
+L0057840 000000 000000 000010 000000 000000 000000 000000 100000*
+L0057888 00000000 00010000 00110000 00000000 00000000 00000000 11111111 00000000*
+L0057952 00000000 00000000 00100010 00000000 00000000 00000001 00000001 00000010*
+L0058016 00000010 00000000 00000011 00000000 00000000 00000001 00000010 00000011*
+L0058080 00000000 00000000 00000000 00000000 01000000 00000000 11111100 00000000*
+L0058144 00000011 00000000 00000010 00000000 10010000 00000011 00000011 00000010*
+L0058208 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0058272 00000000 00000000 01010000 00000000 00000000 00000000 00000000 00000000*
+L0058336 00000000 00000000 00000000 00000000 00000100 00000000 00000000 00000000*
+L0058400 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0058464 000000 000000 000000 000000 000000 000000 000000 000000*
+L0058512 000000 000000 000000 000000 000100 000000 100011 100000*
+L0058560 000000 000000 000000 000000 000000 000000 000000 000000*
+L0058608 000000 000000 000000 000000 000000 000000 000000 000000*
+L0058656 000000 000000 000000 000000 000000 000000 100011 000000*
+L0058704 000000 000000 000000 000000 000000 000000 000000 000000*
+L0058752 00000000 00000000 00000000 00000000 00000100 00000000 00000001 00000001*
+L0058816 00000001 00000000 00000000 00000001 00000100 00000000 00000000 00000000*
+L0058880 00000000 00000000 00000000 00000001 00010100 00000000 00000000 00000001*
+L0058944 00000000 00000000 00000000 00000000 00011100 00000000 00000000 00000000*
+L0059008 00000000 00000000 00000000 00000000 10011100 00000000 00000000 00000000*
+L0059072 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00000000*
+L0059136 00001000 00000000 00000000 00000000 10000100 00000000 00000000 00000000*
+L0059200 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00000000*
+L0059264 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0059328 000000 000000 000000 000000 000000 000000 000000 000000*
+L0059376 000000 000000 000000 000000 000101 000000 000000 000000*
+L0059424 000000 000000 000000 000000 000011 000000 000000 000000*
+L0059472 000000 000000 000000 000000 000011 000000 000000 000000*
+L0059520 000000 000000 000000 000000 000011 000000 000000 000000*
+L0059568 000000 000000 000000 000000 000011 000000 000000 000000*
+L0059616 00000000 00000000 00000001 00000000 00000000 00000000 00000010 00000000*
+L0059680 00000001 00000010 00000000 00000010 00000010 00000001 00000010 00000010*
+L0059744 00000000 00000000 00000001 00000010 00100010 00000000 00000000 00000000*
+L0059808 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
+L0059872 00000000 00000010 00000000 00000000 00100000 00000000 00000010 00000010*
+L0059936 00001000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0060000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0060064 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0060128 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0060192 000000 000000 000000 000000 000000 000000 000000 000000*
+L0060240 000000 000000 000000 000000 000000 000000 000000 000000*
+L0060288 000001 000000 000000 000000 010000 000000 000000 000000*
+L0060336 000000 000000 000000 000000 010000 000000 000000 000000*
+L0060384 000000 000000 000000 000000 010000 000000 000000 000000*
+L0060432 000000 000000 000000 000000 000000 000000 000000 000000*
+L0060480 00000010 00000000 00000000 10000011 00000000 00000000 00000000 00000010*
+L0060544 00000000 00000000 00000001 10000010 00000001 00000001 00000001 00000010*
+L0060608 00000000 00000000 00000001 00000011 00000001 00000001 00000000 00000011*
+L0060672 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0060736 00000000 00000000 00010000 00000011 00000000 00000001 00000001 00000011*
+L0060800 00000000 00000000 00000000 10000000 00000000 00000000 00000000 00000000*
+L0060864 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0060928 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0060992 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0061056 000000 000000 000000 000000 000000 000000 000000 000000*
+L0061104 000000 000000 000000 000000 000000 000000 000000 000000*
+L0061152 000000 000000 000000 000000 000000 000000 000000 000000*
+L0061200 000000 000000 000000 000000 000000 000000 000000 000000*
+L0061248 000000 000000 000000 000000 000000 000000 000000 000000*
+L0061296 000000 000000 000000 000000 000000 000000 000000 000000*
+L0061344 00000000 00000000 00000110 00000000 00000000 00000000 00000000 00000010*
+L0061408 00000000 00000000 00000100 00100000 00000000 00000001 00000000 00000000*
+L0061472 00000000 00000000 00000010 00000000 00000000 00000001 00000000 00000010*
+L0061536 00000000 00000000 10110000 00000000 00000000 00000000 00000000 00000000*
+L0061600 00000001 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
+L0061664 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0061728 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0061792 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0061856 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0061920 000000 000000 000000 000000 000000 000000 000000 000000*
+L0061968 000000 000000 101001 000000 001000 000000 000000 000000*
+L0062016 000000 000000 000001 000000 000000 000000 000000 000000*
+L0062064 000000 000000 100001 000000 000000 000000 000000 000000*
+L0062112 000000 000000 001001 000000 000000 000000 000000 000000*
+L0062160 000000 000000 000001 000000 000000 000000 000000 000000*
+L0062208 00000000 00000000 10001000 00000000 00000000 00000000 00000000 00001001*
+L0062272 00000001 00000000 10001000 00000000 00000000 00000001 00000000 10001000*
+L0062336 00000001 00000000 10001010 00000000 00000010 00000001 00000001 10011001*
+L0062400 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00101100*
+L0062464 00000001 00000000 00011000 00000000 00000000 00000001 00000000 00001100*
+L0062528 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00010000*
+L0062592 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01110000*
+L0062656 00000000 00000000 10100000 00000000 00000000 00000000 00000000 01110100*
+L0062720 00000000 00000000 00010000 00000000 00000000 00000000 00000000 00111000*
+L0062784 000000 000000 000100 000000 000000 000000 000000 001100*
+L0062832 000000 000000 010000 000000 000000 000000 000000 011001*
+L0062880 000000 000000 010000 000000 000000 000000 000000 011001*
+L0062928 000000 000000 000100 000000 000000 000000 000000 011011*
+L0062976 000000 000000 000000 000000 000000 000000 000000 011011*
+L0063024 000000 000000 000100 000000 000000 000000 000000 010111*
+L0063072 00000000 00000000 00000001 00000001 00000000 00000000 00000001 00000100*
+L0063136 00000000 00000001 00010000 00000000 00000010 00000000 00000011 00000001*
+L0063200 00000000 00000000 00100001 00000001 00000010 00000001 00000010 00000000*
+L0063264 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0063328 00000000 00000001 00100000 00000001 00000000 00000001 00000001 00000001*
+L0063392 00000000 00000000 10001000 00000000 00000000 00000000 00000000 00000000*
+L0063456 00000000 00000000 10000000 00000000 00010000 00000000 00000000 00000100*
+L0063520 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0063584 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10000000*
+L0063648 000000 000000 000000 000000 000000 000000 000000 000000*
+L0063696 000000 000000 000000 000000 000000 000000 000000 000000*
+L0063744 000000 000000 000001 000000 000000 000000 000000 000000*
+L0063792 000000 000000 000011 000000 000000 000000 000000 000000*
+L0063840 000000 000000 000011 000000 000000 000000 000000 000000*
+L0063888 000000 000000 000011 000000 000000 000000 000000 000000*
+L0063936 00000001 00000001 00000001 00000000 00000100 00000001 00000011 00000001*
+L0064000 00000000 00000001 00000001 00000011 00001110 00000000 00000011 00000001*
+L0064064 00000000 00000001 00000001 00000011 10101110 00000000 00000000 00000001*
+L0064128 00000000 00000000 00000000 00000000 10101100 00000000 00000000 00010000*
+L0064192 00000000 00000001 00000001 00000001 10011100 00000001 00000011 00100001*
+L0064256 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00000100*
+L0064320 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00000000*
+L0064384 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00000000*
+L0064448 00000000 00000000 00000000 00000000 10000100 00000000 00000000 00000000*
+L0064512 000000 000000 000000 000000 100001 000000 000000 100010*
+L0064560 000000 000100 000000 000000 000101 000000 000000 000100*
+L0064608 000000 000000 000000 000000 000111 000000 000000 000000*
+L0064656 000000 000000 000000 000000 000111 000000 000000 000000*
+L0064704 000000 000000 000000 000000 000111 000000 000000 000000*
+L0064752 000000 000000 000000 000000 000111 000000 000000 000000*
+L0064800 00000000 00000000 00000001 00000001 00000000 00000000 00000000 00000000*
+L0064864 00000001 00000000 00000001 00000100 10110001 00000000 00000000 00000000*
+L0064928 00000001 00000001 00000001 00000101 00000000 00000000 00000001 00000001*
+L0064992 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0065056 00000000 00000001 00000001 00000001 00000001 00000000 00000000 00000001*
+L0065120 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0065184 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0065248 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0065312 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0065376 000000 000000 000000 000000 000000 000000 000000 000000*
+L0065424 000000 000000 000000 000000 000000 000000 000000 000000*
+L0065472 000000 000000 000000 000000 000000 000000 000000 000000*
+L0065520 000000 000000 000000 000000 000000 000000 000000 000000*
+L0065568 000000 000000 000000 000000 000000 000000 000000 000100*
+L0065616 000000 000000 000000 000000 000000 000000 000000 000000*
+L0065664 00000000 00000000 00000001 00000000 00000001 00000000 00000000 00000000*
+L0065728 00000000 00000000 00000000 00000000 00000000 00000011 00000000 00000000*
+L0065792 00000000 00000000 00000001 00000000 00000001 00000011 00000001 00000000*
+L0065856 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0065920 00000001 00000000 00000000 00000000 00000000 00000011 00000000 00000000*
+L0065984 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0066048 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0066112 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0066176 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0066240 000000 000000 000000 000000 000000 000000 000000 000000*
+L0066288 000000 000000 000000 001000 000000 000000 000000 000000*
+L0066336 000000 000000 000000 000001 000000 000000 000000 000000*
+L0066384 000000 000000 000000 000000 000000 000000 000000 000000*
+L0066432 000000 000000 000000 000000 000000 000000 000000 000000*
+L0066480 000000 000000 000000 000000 000000 000000 000000 000000*
+L0066528 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0066592 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0066656 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0066720 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0066784 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0066848 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0066912 00000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000*
+L0066976 00000000 00000000 00000000 00000000 00000000 10000000 00000000 00000000*
+L0067040 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0067104 000000 000000 000000 000000 000000 000000 000000 000000*
+L0067152 000000 000000 000000 000001 000000 000000 000000 000000*
+L0067200 000000 000000 000000 000000 000000 000000 000000 000000*
+L0067248 000000 000000 000000 000000 000000 000000 000000 000000*
+L0067296 000000 000000 000000 000000 000000 000000 000000 000000*
+L0067344 000000 000000 000000 000000 000000 000000 000000 000000*
+L0067392 00000010 00010010 10000010 00000010 00000010 00000010 00000010 00000010*
+L0067456 00000000 00000000 00000010 00000000 00000010 00000010 00000010 00000010*
+L0067520 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0067584 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0067648 00000000 00000000 00000100 00000000 00000000 00000000 00100000 00000000*
+L0067712 00000000 00100000 00100000 01000000 00000000 00000000 00000000 00000000*
+L0067776 00000010 00000010 00000110 00000010 00000010 00000010 00000010 00000010*
+L0067840 00000000 00000000 10000100 00000000 00000000 00000000 00000000 00000000*
+L0067904 00000000 00000000 00010100 00000000 00000000 00000000 00000000 00000000*
+L0067968 000000 000000 000100 000000 000000 000000 001000 000000*
+L0068016 000000 000000 011001 000000 000000 000000 000000 000000*
+L0068064 000000 000000 001000 000000 000000 000000 000000 000000*
+L0068112 000000 000000 100000 000000 000000 000000 000000 000000*
+L0068160 000000 000000 101000 000000 000000 000000 000000 000000*
+L0068208 000000 000000 101000 000000 000000 000000 000000 000000*
+L0068256 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0068320 00000000 00000000 10000100 00000000 00000000 00000000 00000000 00000000*
+L0068384 00000000 00000000 10010100 00000000 00000000 00000000 00000000 00000000*
+L0068448 00000000 00000000 10110100 00000000 00000000 00000000 00000000 00000000*
+L0068512 00000000 00000000 10101000 00000000 00000000 00000000 00000000 00000000*
+L0068576 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0068640 00000000 00000000 00101000 00000000 00000000 10010000 00000000 00000000*
+L0068704 00000000 00000000 00101000 00000000 00000000 00000000 00100000 00000000*
+L0068768 00000000 00000000 10101000 00000000 00100000 00000000 00100000 00000000*
+L0068832 000000 000000 101010 000000 000000 000000 000000 000000*
+L0068880 000000 000000 100000 000000 000000 000000 000000 000000*
+L0068928 000000 000000 110001 000000 000000 001100 001000 000000*
+L0068976 000000 000000 001001 000000 000000 000000 000000 000000*
+L0069024 000000 000000 000001 000000 000000 000000 000000 000000*
+L0069072 000000 000000 000001 000000 000000 000000 000000 000000*
+L0069120 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069184 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069248 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069312 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069376 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069440 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069504 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069568 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069632 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0069696 000000 000000 000000 000000 000000 000000 000000 000000*
+L0069744 000000 000000 000000 000000 000000 000000 000000 000000*
+L0069792 000000 000000 000000 000000 000000 000000 000000 000000*
+L0069840 000000 000000 000000 000000 000000 000000 000000 000000*
+L0069888 000000 000000 000000 000000 000000 000000 000000 000000*
+L0069936 000000 000000 000000 000000 000000 000000 000000 000000*
+L0069984 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0070048 00000000 00000000 00000000 00000000 00000000 00000000 10000100 00000000*
+L0070112 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0070176 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0070240 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0070304 00000000 00000000 00000000 00000000 00000000 00001000 00000000 00000000*
+L0070368 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0070432 00000000 00000000 00000000 00000000 00001000 00000000 00000100 00000000*
+L0070496 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0070560 000000 000000 000000 000000 000000 000000 000000 000000*
+L0070608 000000 000000 000000 000000 000000 000000 000001 000000*
+L0070656 000000 000000 000000 000000 000000 000000 000000 000000*
+L0070704 000000 000000 000000 000000 000000 000000 000000 000000*
+L0070752 000000 000000 000000 000000 000000 000000 000000 000000*
+L0070800 000000 000000 000000 000000 000000 000000 000000 000000*
+L0070848 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0070912 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0070976 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071040 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071104 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071232 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071296 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071360 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071424 000000 000000 000000 000000 000000 000000 000000 000000*
+L0071472 000000 000000 000000 000000 000000 000000 000000 000000*
+L0071520 000000 000000 000000 000000 000000 000000 000000 000000*
+L0071568 000000 000000 000000 000000 000000 000000 000000 000000*
+L0071616 000000 000000 000000 000000 000000 000000 000000 000000*
+L0071664 000000 000000 000000 000000 000000 000000 000000 000000*
+L0071712 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071776 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071840 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071904 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0071968 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072032 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072096 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072160 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072224 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072288 000000 000000 000000 000000 000000 000000 000000 000000*
+L0072336 000000 000000 000000 000000 000000 000000 000000 000000*
+L0072384 000000 000000 000000 000000 000000 000000 000000 000000*
+L0072432 000000 000000 000000 000000 000000 000000 000000 000000*
+L0072480 000000 000000 000000 000000 000000 000000 000000 000000*
+L0072528 000000 000000 000000 000000 000000 000000 000000 000000*
+L0072576 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072640 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000*
+L0072704 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000*
+L0072768 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072832 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0072896 00000000 00000000 00001000 10000000 00000000 10000000 00000000 00000000*
+L0072960 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0073024 00000000 00000000 00000000 00000000 00000000 10000000 00000000 00000000*
+L0073088 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0073152 000000 000000 000010 000000 000000 000000 000000 000000*
+L0073200 000000 000000 000000 000000 000000 000000 000000 000000*
+L0073248 000000 000000 000010 000000 000000 000000 000000 000000*
+L0073296 000000 000000 000000 000000 000000 000000 000000 000000*
+L0073344 000000 000000 000000 000000 000000 000000 000000 000000*
+L0073392 000000 000000 000010 000000 000000 000000 000000 000000*
+L0073440 00000000 00000000 00000100 00000000 00000000 10000000 00000000 00000000*
+L0073504 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0073568 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0073632 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0073696 00000000 00000000 00000100 00000000 00000000 00001000 00000000 00000000*
+L0073760 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000*
+L0073824 00000000 00000000 00001100 00000000 00001000 00000000 00000000 00000000*
+L0073888 00000000 00000000 00001100 00000000 00000000 00000000 00000000 00000000*
+L0073952 00000000 00000000 00000100 00000000 00000000 00100000 00000000 00000000*
+L0074016 000000 000000 000000 000000 000000 000000 000000 000000*
+L0074064 000000 000000 000010 000000 000000 000000 000000 000000*
+L0074112 000000 000000 000000 000000 000000 000000 000000 000000*
+L0074160 000000 000000 000010 000000 000000 000000 000000 000000*
+L0074208 000000 000000 000010 000000 000000 000000 000000 000000*
+L0074256 000000 000000 000000 000000 000000 000000 000000 000000*
+L0074304 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074368 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074432 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074496 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074560 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074624 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074688 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074752 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074816 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0074880 000000 000000 000000 000000 000000 000000 000000 000000*
+L0074928 000010 000000 000000 000000 000000 000000 000000 000000*
+L0074976 000000 000000 000000 000000 000000 000000 000000 000000*
+L0075024 000000 000000 000000 000000 000000 000000 000000 000000*
+L0075072 000000 000000 000000 000000 000000 000000 000000 000000*
+L0075120 000000 000000 000000 000000 000000 000000 000000 000000*
+L0075168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0075232 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0075296 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0075360 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0075424 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0075488 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0075552 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0075616 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0075680 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0075744 000000 000000 000000 000000 000000 000000 000000 000000*
+L0075792 000000 000000 000000 000000 000000 000000 010000 000000*
+L0075840 000000 000000 000001 000000 000000 000000 000000 000000*
+L0075888 000000 000000 000001 000000 000000 000000 000000 000000*
+L0075936 000000 000000 000001 000000 000000 000000 000000 000000*
+L0075984 000000 000000 000001 000000 000000 000000 000000 000000*
+L0076032 00000000 00000000 00000000 00000000 00000000 10000000 00000000 00000000*
+L0076096 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10000000*
+L0076160 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0076224 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0076288 00000000 00000000 00010000 00000000 00000000 00000000 00000000 00000000*
+L0076352 00000000 00000000 00000000 00000000 00000000 10000000 00000000 00000000*
+L0076416 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0076480 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0076544 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00110000*
+L0076608 000000 000000 000000 000000 000000 000000 000000 000000*
+L0076656 000000 000000 000000 000000 000000 000000 000000 000000*
+L0076704 000000 000000 000000 000000 000000 000000 000000 000000*
+L0076752 000000 000000 000000 000000 000000 000000 000000 000000*
+L0076800 000000 000000 000000 000000 000000 000000 000000 000000*
+L0076848 000000 000000 000000 000000 000000 000000 000000 000100*
+L0076896 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0076960 00000000 00000000 00000000 00000000 00000000 00000000 10000100 00000000*
+L0077024 00000000 00000000 00000100 00000000 00000000 00000000 00000100 00000000*
+L0077088 00000000 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
+L0077152 00000000 00000000 10100000 00000000 00000000 00000000 00000000 00000000*
+L0077216 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0077280 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0077344 00000000 00000000 00000100 00000000 00000000 10000000 00000100 00000000*
+L0077408 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0077472 000000 000000 001000 000000 000000 000000 000000 000000*
+L0077520 000000 000000 000000 000000 000000 000000 100000 000000*
+L0077568 000000 000000 101001 000000 000000 000000 000001 000000*
+L0077616 000001 000000 001001 000000 000000 000000 000001 000000*
+L0077664 000000 000000 100001 000000 000000 000000 000000 000000*
+L0077712 000000 000000 101001 000000 000000 000000 000000 000000*
+L0077760 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0077824 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0077888 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0077952 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078016 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078080 10000000 00000000 00000000 00000000 00000000 00000000 00000000 00010000*
+L0078144 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00100000*
+L0078208 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078272 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078336 000000 000000 000000 000000 000000 000000 000000 000000*
+L0078384 100000 000000 000000 000000 000000 000000 000000 000000*
+L0078432 000000 000000 000000 010000 000000 000000 000000 000001*
+L0078480 000000 000000 000000 000000 000000 000000 000000 000010*
+L0078528 000000 000000 000000 000000 000000 000000 000000 000000*
+L0078576 000000 000000 000000 000000 000000 000000 000000 000000*
+L0078624 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078688 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078752 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078816 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078880 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0078944 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079008 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079072 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079136 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079200 000000 000000 000000 000000 000000 000000 000000 000000*
+L0079248 000000 000000 000000 000000 000000 000000 000000 000000*
+L0079296 000000 000000 000000 000000 000000 000000 010000 000000*
+L0079344 000000 000000 000000 000000 000000 000000 000000 000000*
+L0079392 000000 000000 000000 000000 000000 000000 000000 000000*
+L0079440 000000 000000 000000 000000 000000 000000 000000 000000*
+L0079488 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079552 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079616 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079680 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079744 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079808 00010000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079872 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0079936 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0080000 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0080064 000000 000000 000000 000000 000000 000001 000000 000000*
+L0080112 000100 000000 000000 000000 000000 000000 000000 000000*
+L0080160 000000 000000 000000 000000 000000 000000 000000 000000*
+L0080208 000000 000000 000000 000000 000000 000001 000000 000000*
+L0080256 000000 000000 000000 000000 000000 000000 000000 000000*
+L0080304 000000 000000 000000 000000 000000 000000 000000 000000*
+L0080352 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0080416 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0080480 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0080544 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0080608 00000000 00000000 00100000 00000000 00000000 00000000 00000000 00000000*
+L0080672 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0080736 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0080800 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0080864 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0080928 000000 000000 000000 000000 000000 000000 000000 000000*
+L0080976 000000 000000 000000 000000 000000 000000 000000 000000*
+L0081024 000000 000000 000001 000000 000000 000001 000000 000000*
+L0081072 000000 000000 000001 000000 000000 000000 000000 000000*
+L0081120 000000 000000 000001 000000 000000 000001 000000 000000*
+L0081168 000000 000000 000001 000000 000000 000001 000000 000000*
+L0081216 00000000 00000000 00000000 00000000 00000000 01010100 00000000 00000000*
+L0081280 00000000 00000000 00000000 00000000 00000100 01000100 00000000 00100000*
+L0081344 00000000 00000000 00010000 00000000 00000100 00000000 00000000 00000000*
+L0081408 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0081472 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0081536 00000000 00000000 00000000 00000000 10100000 00000000 10000000 00000000*
+L0081600 00000000 00000000 00101000 00000000 00100000 00000000 01110000 00000000*
+L0081664 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0081728 00000000 00000000 10011000 00000000 00000000 00000000 00000000 00000000*
+L0081792 000000 000000 100010 000000 000000 000000 000000 000000*
+L0081840 000000 000000 000000 000000 000000 000101 010000 000000*
+L0081888 000000 000000 000000 000001 000000 000000 000000 000100*
+L0081936 000000 000000 000000 000000 100001 000100 000000 000100*
+L0081984 000000 000000 000000 000000 100000 000000 000000 000100*
+L0082032 000000 000000 000000 000000 000000 000000 000000 000000*
+L0082080 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00100000*
+L0082144 00000000 00000000 10001000 00000100 00000000 00010000 00000000 00000000*
+L0082208 00000000 00000000 10001000 00000100 00000000 00010000 00000000 00000000*
+L0082272 00000000 00000000 00101000 00000000 00000000 00010000 00000000 00000000*
+L0082336 00000000 00000000 00111100 00000000 00000000 00010000 00100000 00000000*
+L0082400 00000000 00000000 00000000 00000100 00000000 00010100 01010000 00000000*
+L0082464 00000000 00000000 00000100 00000100 00000000 00000100 10000000 00001000*
+L0082528 00000000 00000000 00100100 00000000 00000000 00010100 00000000 00000000*
+L0082592 00000000 00000000 00000100 00000000 00000100 00000100 00000000 00000000*
+L0082656 000000 000000 000000 000000 000001 000001 000000 000000*
+L0082704 000000 000000 001001 000001 000000 101000 000000 000000*
+L0082752 000000 000000 011001 000000 000000 000001 011000 000000*
+L0082800 000000 000000 100001 000000 010000 001001 000000 000000*
+L0082848 000000 000000 101001 000000 011100 000001 000000 000000*
+L0082896 000000 000000 101101 000000 001110 000001 000000 000000*
+L0082944 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083008 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083072 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083136 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083200 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083264 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083328 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083392 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083456 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083520 000000 000000 000000 000000 000000 000000 000000 000000*
+L0083568 000000 000000 000000 000000 000000 000000 000000 000000*
+L0083616 000001 000000 000000 000000 000000 000000 000000 000000*
+L0083664 000001 000000 000000 000000 000000 000000 000000 000000*
+L0083712 000000 000000 000000 000000 000000 000000 000000 000000*
+L0083760 000000 000000 000000 000000 000000 000000 000000 000000*
+L0083808 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0083872 00000000 00000000 00000000 00000000 00000000 00010000 00000000 00000000*
+L0083936 00000000 00000000 00000000 00000000 00000000 00010100 00000000 00000000*
+L0084000 00000000 00000000 00000000 00000000 00000000 00010100 00000000 00000000*
+L0084064 00000000 00000000 00000000 00000000 00000000 00010100 00000000 00000000*
+L0084128 00001000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0084192 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0084256 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0084320 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0084384 000000 000000 000000 000000 000000 000001 000000 000000*
+L0084432 000001 000000 000000 000000 000000 000000 000000 000000*
+L0084480 000000 000000 000000 000000 000000 000011 000000 000000*
+L0084528 000000 000000 000000 000000 000000 000001 000000 000000*
+L0084576 000000 000000 000000 000000 000000 000001 000000 000000*
+L0084624 000000 000000 000000 000000 000000 000001 000000 000000*
+L0084672 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0084736 00000100 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0084800 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0084864 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0084928 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0084992 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085056 00000100 00000000 00000000 00000000 00000000 00001000 00000000 00010000*
+L0085120 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00100000*
+L0085184 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085248 000000 000000 000000 000000 000000 000000 000000 000000*
+L0085296 000000 000000 000000 000000 000000 000000 000000 000000*
+L0085344 000000 000000 000000 000000 000000 000000 000000 000000*
+L0085392 000000 000000 000000 000000 000000 000000 000000 000001*
+L0085440 000000 000000 000000 000000 000000 000000 000000 000010*
+L0085488 000000 000000 000000 000000 000000 000000 000000 000000*
+L0085536 00000100 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085600 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085664 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085728 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085792 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085856 00000100 00000000 00000000 00000000 00000000 00000000 01000000 00000000*
+L0085920 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0085984 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086048 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086112 000000 000000 000000 000000 000000 000000 000000 000000*
+L0086160 000000 000000 000000 000000 000000 000000 000000 000000*
+L0086208 000000 000000 000000 000000 000000 000000 000000 000000*
+L0086256 000000 000000 000000 000000 000000 000000 000000 000000*
+L0086304 000000 000000 000000 000000 000000 000000 000000 000000*
+L0086352 000000 000000 000000 000000 000000 000000 000000 000000*
+L0086400 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086464 00000000 00000000 00001000 00000000 00000000 00000000 01111100 00000000*
+L0086528 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086592 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086656 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086720 00000000 00010000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086784 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0086848 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0086912 00000000 00000000 00000000 00000000 00000000 00000000 00000000 10000000*
+L0086976 000000 000000 000000 000000 000000 000000 000000 000000*
+L0087024 000000 000000 000000 000000 000000 000010 000000 100000*
+L0087072 000000 000000 000000 000000 000000 000000 100011 000000*
+L0087120 000000 000000 000000 000000 000000 000000 000000 100000*
+L0087168 000000 000000 000000 000000 000000 000000 000000 100000*
+L0087216 000000 000000 000000 000000 000000 000000 000000 100000*
+L0087264 00000000 00000000 00000100 00000100 00000000 00000000 11111100 00000000*
+L0087328 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0087392 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0087456 00000000 00000000 10110100 00000000 00000000 00000000 00000000 00000000*
+L0087520 00000000 00000000 10100100 00000000 00000000 00000000 00000000 00000000*
+L0087584 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0087648 00000000 00000000 00000100 00000000 00000000 00000000 00000000 10000000*
+L0087712 00000000 00000000 00000100 00000000 00000000 00000000 00000000 10000000*
+L0087776 00000000 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
+L0087840 000000 000000 001000 000000 000000 000000 000000 000000*
+L0087888 000000 000000 101001 000000 000000 000000 100011 000000*
+L0087936 000000 000000 101001 000000 000000 000000 000000 000000*
+L0087984 000000 000000 101001 000000 000000 000000 000000 000000*
+L0088032 000000 000000 101001 000000 000000 000000 000000 000000*
+L0088080 000000 000000 101001 000000 000000 000000 000000 000000*
+L0088128 01000000 00000000 00000100 00000000 00000000 00000000 00000000 00001000*
+L0088192 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00101000*
+L0088256 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00101000*
+L0088320 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00101000*
+L0088384 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00111000*
+L0088448 01000000 00000000 00001000 00000000 00000000 00000000 00000000 00001000*
+L0088512 00000000 00000000 00001100 00000000 00000000 00001000 00000000 00100000*
+L0088576 00000000 00000000 00011100 00000000 00000000 00000000 00000000 00101000*
+L0088640 00000000 00000000 00001100 00000000 00000000 00000000 00000000 00101000*
+L0088704 000000 000000 000010 000000 000000 000000 000000 001010*
+L0088752 000000 000000 000010 000000 000000 000000 000000 010000*
+L0088800 000000 000000 000010 000000 000000 000000 000000 010100*
+L0088848 000000 000000 010010 000000 000000 000000 000000 010110*
+L0088896 000000 000000 010010 000000 000000 000000 000000 010110*
+L0088944 000000 000000 010010 000000 000000 000000 000000 010110*
+L0088992 00000000 00000100 00000000 00000000 00000000 00000000 01000000 00100000*
+L0089056 00000000 00000000 00000000 00000000 00000000 00000000 10000100 00000100*
+L0089120 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0089184 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089248 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0089312 00000000 00001000 01000000 01000000 00000000 00000000 00000000 00000000*
+L0089376 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000100*
+L0089440 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0089504 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0089568 000000 000000 000000 000000 000000 000000 000000 000000*
+L0089616 000000 000000 000000 000000 000000 000000 000000 000000*
+L0089664 000000 000000 000000 000000 000000 000000 100001 000000*
+L0089712 000000 000000 000000 000000 000000 000000 100001 000000*
+L0089760 000000 000000 000000 000000 000000 000000 000000 000000*
+L0089808 000000 000000 000000 000000 000000 000000 000000 000000*
+L0089856 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0089920 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0089984 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00100000*
+L0090048 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00100000*
+L0090112 00000000 00000000 00000100 00000000 00000100 00000000 00000000 00110000*
+L0090176 00000000 00001000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0090240 00000000 00000000 00001100 00100000 00000000 00000000 00000000 00100000*
+L0090304 00000000 00000000 00001100 00000000 10000000 00000000 00000000 00100000*
+L0090368 00000000 00000000 00001100 00000000 00000100 00000000 00000000 00100000*
+L0090432 000000 000000 000010 000000 000001 000000 000000 001000*
+L0090480 000000 000000 000000 000000 000000 000000 000000 010000*
+L0090528 000000 000000 000000 000000 000000 000000 000000 010000*
+L0090576 000000 000000 000010 000000 010010 000000 000000 010000*
+L0090624 000000 000000 000010 000000 111100 000000 000000 010000*
+L0090672 000000 000000 000010 000000 001111 000000 000000 010000*
+L0090720 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00100100*
+L0090784 00000000 00000100 00000000 10000000 00000000 00000000 00000000 00100000*
+L0090848 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100*
+L0090912 00000000 00000000 00000000 00000000 00000100 00000000 00000000 00000000*
+L0090976 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000*
+L0091040 00100000 00000000 00000000 00000000 00000000 00000000 10000000 00001000*
+L0091104 00000000 00000000 00000000 00000000 10000000 00000000 00000000 00001000*
+L0091168 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0091232 00000000 00000000 00000000 00000000 10000000 00000000 00000000 00000000*
+L0091296 000000 000000 000000 000000 100000 000000 000000 000001*
+L0091344 000000 000000 000100 000000 000000 000000 000000 000000*
+L0091392 000000 000000 000000 000000 011110 000000 000000 000000*
+L0091440 000000 000000 010000 000000 001100 000000 000000 000000*
+L0091488 000000 000000 010000 000000 000011 000000 000000 000000*
+L0091536 000000 000000 010000 000000 000000 000000 000000 000000*
+L0091584 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0091648 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0091712 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0091776 00000000 00000000 00001000 00000000 00000000 00000000 00000000 00000000*
+L0091840 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0091904 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0091968 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0092032 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0092096 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000*
+L0092160 000000 000000 000000 000000 000000 000001 000000 000000*
+L0092208 000000 000000 000000 000000 000000 000000 000000 000000*
+L0092256 000000 000000 000000 000000 000000 000000 000000 000000*
+L0092304 000000 000000 000000 000000 000000 000001 000000 000000*
+L0092352 000000 000000 000000 000000 000000 000000 000000 000000*
+L0092400 000000 000000 000000 000000 000000 000000 000000 000000*
+L0092448 00100000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0092512 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0092576 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0092640 00000000 00000000 10110100 00000000 00000000 00000000 00000000 00000000*
+L0092704 00000000 00000000 10100100 00000000 00000000 00000000 00100000 00000000*
+L0092768 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0092832 00000000 00000000 00000100 00000000 00000000 00000100 00000000 00000000*
+L0092896 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000*
+L0092960 00000000 00000000 00100100 00000000 00000000 00000000 00000000 00000000*
+L0093024 000000 000000 001000 000000 000000 000000 000000 000000*
+L0093072 000000 000000 101001 000000 000010 000001 000000 000000*
+L0093120 000000 000000 101001 000000 000000 000001 001000 000000*
+L0093168 000000 000000 101001 000000 000000 000000 000000 000000*
+L0093216 000000 000000 101001 000000 000000 000001 000000 000000*
+L0093264 000000 000000 101001 000000 000000 000001 000000 000000*
+C64A1*
+2BD4
diff --git a/cpld/XC95144XL/WarpSE.mfd b/cpld/XC95144XL/WarpSE.mfd
index 655b48a..b68c198 100644
--- a/cpld/XC95144XL/WarpSE.mfd
+++ b/cpld/XC95144XL/WarpSE.mfd
@@ -4,33 +4,33 @@ MACROCELL | 5 | 1 | iobm/nVMA
ATTRIBUTES | 4622082 | 0
OUTPUTMC | 2 | 5 | 1 | 5 | 0
INPUTS | 10 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | iobm/IOACT | iobm/VPArf | iobm/VPArr | nAoutOE
-INPUTMC | 10 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 1 | 8 | 1 | 7 | 3 | 1
+INPUTMC | 10 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 15 | 0 | 2 | 0 | 1 | 3 | 1
EQ | 7 |
nVMA_IOB.T = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> &
!iobm/ES<3> & !iobm/ES<4>
# nVMA_IOB & iobm/ES<0> & iobm/ES<1> & iobm/ES<2> &
!iobm/ES<3> & !iobm/ES<4> & iobm/IOACT & iobm/VPArf &
iobm/VPArr;
- nVMA_IOB.CLK = CLK2X_IOB; // GCK
- nVMA_IOB.OE = !nAoutOE;
-GLOBALS | 1 | 2 | CLK2X_IOB
+ nVMA_IOB.CLK = C16M; // GCK
+ nVMA_IOB.OE = nAoutOE;
+GLOBALS | 1 | 2 | C16M
MACROCELL | 5 | 11 | iobm/nASout
ATTRIBUTES | 8816386 | 0
-OUTPUTMC | 1 | 3 | 1
+OUTPUTMC | 1 | 0 | 0
INPUTS | 4 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | nAoutOE
-INPUTMC | 4 | 0 | 15 | 5 | 9 | 5 | 2 | 3 | 1
+INPUTMC | 4 | 0 | 13 | 5 | 9 | 0 | 17 | 3 | 1
EQ | 4 |
nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2
# iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2;
- !nAS_IOB.CLK = CLK2X_IOB; // GCK
- nAS_IOB.OE = !nAoutOE;
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !nAS_IOB.CLK = C16M; // GCK
+ nAS_IOB.OE = nAoutOE;
+GLOBALS | 1 | 2 | C16M
MACROCELL | 5 | 8 | iobm/nLDS
ATTRIBUTES | 8685314 | 0
INPUTS | 6 | iobs/IOL0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | iobs/IORW0 | nAoutOE
-INPUTMC | 6 | 4 | 3 | 5 | 2 | 5 | 9 | 0 | 15 | 7 | 17 | 3 | 1
+INPUTMC | 6 | 0 | 16 | 0 | 17 | 5 | 9 | 0 | 13 | 2 | 14 | 3 | 1
EQ | 8 |
!nLDS_IOB.D = iobs/IOL0 & !iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd2
@@ -38,14 +38,14 @@ EQ | 8 |
iobm/IOS_FSM_FFd2
# !iobs/IORW0 & iobs/IOL0 & iobm/IOS_FSM_FFd3 &
!iobm/IOS_FSM_FFd1;
- !nLDS_IOB.CLK = CLK2X_IOB; // GCK
- nLDS_IOB.OE = !nAoutOE;
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !nLDS_IOB.CLK = C16M; // GCK
+ nLDS_IOB.OE = nAoutOE;
+GLOBALS | 1 | 2 | C16M
MACROCELL | 5 | 10 | iobm/nUDS
ATTRIBUTES | 8685314 | 0
INPUTS | 6 | iobs/IOU0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | iobs/IORW0 | nAoutOE
-INPUTMC | 6 | 3 | 14 | 5 | 2 | 5 | 9 | 0 | 15 | 7 | 17 | 3 | 1
+INPUTMC | 6 | 0 | 15 | 0 | 17 | 5 | 9 | 0 | 13 | 2 | 14 | 3 | 1
EQ | 8 |
!nUDS_IOB.D = iobs/IOU0 & !iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd2
@@ -53,845 +53,888 @@ EQ | 8 |
iobm/IOS_FSM_FFd2
# !iobs/IORW0 & iobs/IOU0 & iobm/IOS_FSM_FFd3 &
!iobm/IOS_FSM_FFd1;
- !nUDS_IOB.CLK = CLK2X_IOB; // GCK
- nUDS_IOB.OE = !nAoutOE;
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !nUDS_IOB.CLK = C16M; // GCK
+ nUDS_IOB.OE = nAoutOE;
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 3 | 13 | cnt/RefDone
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 20 | 3 | 13 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 2 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 13 | 6 | 15 | 6 | 16
-INPUTS | 10 | cnt/RefDone | ram/RefRAS | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<7> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4>
-INPUTMC | 10 | 3 | 13 | 0 | 0 | 3 | 7 | 3 | 6 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8
+MACROCELL | 3 | 8 | cnt/LTimer<0>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 14 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 3 | cnt/LTimer<0> | cnt/LTimer<13> | cnt/TimerTC
+INPUTMC | 3 | 3 | 8 | 6 | 0 | 3 | 2
+EQ | 3 |
+ !cnt/LTimer<0>.T = !cnt/LTimer<0> & cnt/LTimer<13> & cnt/TimerTC;
+ !cnt/LTimer<0>.CLK = C8M; // GCK
+ cnt/LTimer<0>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 0 | cnt/LTimer<13>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 17 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 7 | 0 | 3 | 6 | 3 | 0
+INPUTS | 15 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<10> | cnt/LTimer<11> | cnt/LTimer<8> | cnt/LTimer<12> | cnt/LTimer<13> | cnt/TimerTC
+INPUTMC | 15 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 6 | 0 | 3 | 2
+EQ | 7 |
+ cnt/LTimer<13>.T = cnt/LTimer<13> & cnt/TimerTC
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> &
+ cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & cnt/LTimer<11> &
+ cnt/LTimer<8> & cnt/LTimer<12>;
+ !cnt/LTimer<13>.CLK = C8M; // GCK
+ cnt/LTimer<13>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 3 | 17 | cnt/LTimer<1>
+ATTRIBUTES | 8553280 | 0
+OUTPUTMC | 13 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 4 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<13> | cnt/TimerTC
+INPUTMC | 4 | 3 | 8 | 3 | 17 | 6 | 0 | 3 | 2
EQ | 5 |
- !cnt/RefDone.D = !cnt/RefDone & !ram/RefRAS
- # !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<0> &
- !cnt/RefCnt<7> & !cnt/RefCnt<1> & !cnt/RefCnt<3> & !cnt/RefCnt<2> &
- !cnt/RefCnt<4>;
- cnt/RefDone.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ !cnt/LTimer<1>.D = cnt/LTimer<0> & cnt/LTimer<1>
+ # !cnt/LTimer<0> & !cnt/LTimer<1>
+ # cnt/LTimer<13> & cnt/TimerTC;
+ !cnt/LTimer<1>.CLK = C8M; // GCK
+ cnt/LTimer<1>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
-MACROCELL | 4 | 9 | ram/Once
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 12 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 16 | 6 | 3 | 6 | 15 | 6 | 13 | 3 | 0 | 3 | 16 | 4 | 1 | 4 | 15 | 6 | 0
-INPUTS | 10 | ram/Once | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | A_FSB<21>
-INPUTMC | 6 | 4 | 9 | 0 | 5 | 0 | 17 | 3 | 17 | 6 | 9 | 6 | 3
-INPUTP | 4 | 54 | 36 | 30 | 29
-EQ | 13 |
- ram/Once.T = ram/Once & nAS_FSB & !fsb/ASrf
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3 & fsb/ASrf;
- ram/Once.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+MACROCELL | 3 | 16 | cnt/LTimer<2>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 12 | 6 | 0 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 5 | cnt/LTimer<0> | cnt/LTimer<13> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/TimerTC
+INPUTMC | 5 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 2
+EQ | 5 |
+ cnt/LTimer<2>.T = cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1>
+ # cnt/LTimer<0> & cnt/LTimer<1> & !cnt/TimerTC
+ # cnt/LTimer<13> & cnt/LTimer<2> & cnt/TimerTC;
+ !cnt/LTimer<2>.CLK = C8M; // GCK
+ cnt/LTimer<2>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
-MACROCELL | 4 | 6 | iobs/Once
+MACROCELL | 3 | 15 | cnt/LTimer<3>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 11 | 6 | 0 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 6 | cnt/LTimer<13> | cnt/LTimer<3> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2>
+INPUTMC | 6 | 6 | 0 | 3 | 15 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16
+EQ | 7 |
+ cnt/LTimer<3>.T = cnt/LTimer<13> & cnt/LTimer<3> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ !cnt/TimerTC;
+ !cnt/LTimer<3>.CLK = C8M; // GCK
+ cnt/LTimer<3>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 12 | cnt/LTimer<5>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 9 | 6 | 0 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 8 | cnt/LTimer<13> | cnt/LTimer<5> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4>
+INPUTMC | 8 | 6 | 0 | 6 | 12 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 14
+EQ | 7 |
+ cnt/LTimer<5>.T = cnt/LTimer<13> & cnt/LTimer<5> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<4>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<4> & !cnt/TimerTC;
+ !cnt/LTimer<5>.CLK = C8M; // GCK
+ cnt/LTimer<5>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 4 | 3 | cs/nOverlay1
+ATTRIBUTES | 8553280 | 0
+OUTPUTMC | 35 | 7 | 15 | 2 | 12 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 8 | 2 | 17 | 4 | 6 | 4 | 11 | 7 | 5 | 7 | 2 | 4 | 8 | 7 | 8 | 7 | 12 | 4 | 15 | 6 | 7 | 7 | 4 | 2 | 16 | 2 | 0 | 2 | 2 | 2 | 7 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 5 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 0 | 7 | 7 | 7 | 10 | 7 | 14
+INPUTS | 3 | cs/nOverlay0 | nAS_FSB | fsb/ASrf
+INPUTMC | 2 | 4 | 7 | 1 | 14
+INPUTP | 1 | 54
+EQ | 3 |
+ cs/nOverlay1.D = cs/nOverlay0;
+ cs/nOverlay1.CLK = FCLK; // GCK
+ cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf;
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 7 | 16 | iobs/Once
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 4 | 6 | 7 | 15 | 7 | 1 | 7 | 13 | 3 | 16 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 5 | 4 | 7 | 4 | 8
-INPUTS | 10 | A_FSB<22> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | nADoutLE1 | nOE_OBUF.EXP | EXP25_.EXP
-INPUTMC | 7 | 4 | 6 | 7 | 3 | 3 | 12 | 0 | 5 | 5 | 13 | 4 | 5 | 4 | 7
-INPUTP | 3 | 30 | 54 | 36
-IMPORTS | 2 | 4 | 5 | 4 | 7
-EQ | 25 |
+OUTPUTMC | 14 | 7 | 16 | 2 | 14 | 2 | 11 | 2 | 5 | 7 | 11 | 7 | 6 | 7 | 9 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 0 | 7 | 15 | 7 | 17
+INPUTS | 10 | A_FSB<22> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<20> | EXP27_.EXP | EXP28_.EXP
+INPUTMC | 6 | 7 | 16 | 7 | 6 | 1 | 15 | 1 | 14 | 7 | 15 | 7 | 17
+INPUTP | 4 | 30 | 54 | 36 | 28
+IMPORTS | 2 | 7 | 15 | 7 | 17
+EQ | 24 |
!iobs/Once.D = nAS_FSB & !fsb/ASrf
# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd2
+ # !A_FSB<23> & !A_FSB<20> & !iobs/Once
# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd2
# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd1
- # !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
-;Imported pterms FB5_6
+;Imported pterms FB8_16
# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
+ # !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
- # !A_FSB<23> & !A_FSB<22> & !iobs/Once &
- !cs/nOverlay1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once
-;Imported pterms FB5_8
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
+ !iobs/Once
+;Imported pterms FB8_18
# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
# !A_FSB<23> & A_FSB<21> & nWE_FSB & !iobs/Once
-;Imported pterms FB5_9
- # !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1>
+;Imported pterms FB8_1
# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
!iobs/Once
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once &
- cs/nOverlay1;
- iobs/Once.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 0 | 17 | cs/nOverlay1
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 44 | 4 | 9 | 4 | 5 | 7 | 17 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 12 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 16 | 6 | 6 | 6 | 3 | 7 | 3 | 4 | 12 | 7 | 8 | 6 | 16 | 6 | 13 | 6 | 7 | 6 | 15 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 12 | 2 | 14 | 2 | 16 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 8 | 4 | 13 | 4 | 15 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 10 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11
-INPUTS | 3 | cs/nOverlay0 | nAS_FSB | fsb/ASrf
-INPUTMC | 2 | 2 | 12 | 0 | 5
-INPUTP | 1 | 54
-EQ | 3 |
- cs/nOverlay1.D = cs/nOverlay0;
- cs/nOverlay1.CLK = CLK_FSB; // GCK
- cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf;
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 15 | iobs/BERR
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 7 | 15 | 0 | 16 | 2 | 0 | 2 | 5 | 7 | 11 | 2 | 3 | 2 | 10 | 2 | 11 | 7 | 10
-INPUTS | 8 | iobs/BERR | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1
-INPUTMC | 7 | 7 | 15 | 0 | 5 | 4 | 6 | 7 | 3 | 1 | 6 | 5 | 17 | 5 | 13
-INPUTP | 1 | 54
-EQ | 8 |
- iobs/BERR.T = iobs/BERR & nAS_FSB & !fsb/ASrf
- # iobs/Once & iobs/BERR & !iobs/PS_FSM_FFd2 &
- !iobs/IOACTr & !iobm/IOBERR & nADoutLE1
- # iobs/Once & !iobs/BERR & !nAS_FSB &
- !iobs/PS_FSM_FFd2 & !iobs/IOACTr & iobm/IOBERR & nADoutLE1
- # iobs/Once & !iobs/BERR & !iobs/PS_FSM_FFd2 &
- !iobs/IOACTr & iobm/IOBERR & fsb/ASrf & nADoutLE1;
- iobs/BERR.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 17 | iobs/IORW0
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 6 | 5 | 8 | 5 | 10 | 7 | 17 | 3 | 4 | 7 | 0 | 7 | 1
-INPUTS | 12 | A_FSB<14> | A_FSB<13> | A_FSB<23> | A_FSB<21> | nADoutLE1 | A_FSB<22> | cs/nOverlay1 | A_FSB<20> | nWE_FSB | iobs/IORW0 | EXP32_.EXP | EXP37_.EXP
-INPUTMC | 5 | 5 | 13 | 0 | 17 | 7 | 17 | 7 | 0 | 7 | 16
-INPUTP | 7 | 19 | 18 | 36 | 29 | 30 | 28 | 47
-IMPORTS | 2 | 7 | 0 | 7 | 16
-EQ | 26 |
- !iobs/IORW0.T = !nWE_FSB & !iobs/IORW0 & nADoutLE1
- # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
- nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & nADoutLE1
- # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
- nADoutLE1
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- cs/nOverlay1 & nADoutLE1
-;Imported pterms FB8_1
- # iobs/IORW0 & iobs/IORW1 & !nADoutLE1
- # !iobs/IORW0 & !iobs/IORW1 & !nADoutLE1
- # nAS_FSB & !fsb/ASrf & nADoutLE1
- # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !iobs/IORW0 & nADoutLE1
-;Imported pterms FB8_2
- # iobs/PS_FSM_FFd2
- # iobs/PS_FSM_FFd1
- # iobs/Once & nADoutLE1
- # nWE_FSB & iobs/IORW0 & nADoutLE1
-;Imported pterms FB8_17
- # !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1
- # !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1;
- iobs/IORW0.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ cs/nOverlay1 & !iobs/Once;
+ iobs/Once.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 2 | 12 | cs/nOverlay0
+MACROCELL | 6 | 14 | cnt/LTimer<4>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 10 | 6 | 0 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 7 | cnt/LTimer<13> | cnt/LTimer<4> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3>
+INPUTMC | 7 | 6 | 0 | 6 | 14 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15
+EQ | 7 |
+ cnt/LTimer<4>.T = cnt/LTimer<13> & cnt/LTimer<4> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & !cnt/TimerTC;
+ !cnt/LTimer<4>.CLK = C8M; // GCK
+ cnt/LTimer<4>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 9 | cnt/LTimer<6>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 8 | 6 | 0 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 9 | cnt/LTimer<13> | cnt/LTimer<6> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4>
+INPUTMC | 9 | 6 | 0 | 6 | 9 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14
+EQ | 7 |
+ cnt/LTimer<6>.T = cnt/LTimer<13> & cnt/LTimer<6> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & !cnt/TimerTC;
+ !cnt/LTimer<6>.CLK = C8M; // GCK
+ cnt/LTimer<6>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 6 | cnt/LTimer<7>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 8 | 6 | 0 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 6 | 7
+INPUTS | 15 | cnt/LTimer<13> | cnt/LTimer<7> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | A_FSB<9> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RASEL
+INPUTMC | 12 | 6 | 0 | 6 | 6 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 4 | 3 | 4 | 0
+INPUTP | 3 | 12 | 36 | 30
+EXPORTS | 1 | 6 | 7
+EQ | 11 |
+ cnt/LTimer<7>.T = cnt/LTimer<13> & cnt/LTimer<7> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> &
+ cnt/LTimer<6>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> &
+ !cnt/TimerTC;
+ !cnt/LTimer<7>.CLK = C8M; // GCK
+ cnt/LTimer<7>.CE = cnt/TimerTC;
+ cnt/LTimer<7>.EXP = A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ ram/RASEL
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 2 | cnt/LTimer<9>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 5 | 6 | 0 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 15
+INPUTS | 12 | cnt/LTimer<13> | cnt/LTimer<9> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<8>
+INPUTMC | 12 | 6 | 0 | 6 | 2 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 3
+EQ | 9 |
+ cnt/LTimer<9>.T = cnt/LTimer<13> & cnt/LTimer<9> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> &
+ cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<8>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> &
+ cnt/LTimer<7> & cnt/LTimer<8> & !cnt/TimerTC;
+ !cnt/LTimer<9>.CLK = C8M; // GCK
+ cnt/LTimer<9>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 17 | cnt/LTimer<10>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 4 | 6 | 0 | 6 | 17 | 6 | 16 | 6 | 15
+INPUTS | 13 | cnt/LTimer<13> | cnt/LTimer<10> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<8>
+INPUTMC | 13 | 6 | 0 | 6 | 17 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 3
+EQ | 9 |
+ cnt/LTimer<10>.T = cnt/LTimer<13> & cnt/LTimer<10> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> &
+ cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<8>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> &
+ cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<8> & !cnt/TimerTC;
+ !cnt/LTimer<10>.CLK = C8M; // GCK
+ cnt/LTimer<10>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 16 | cnt/LTimer<11>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 3 | 6 | 0 | 6 | 16 | 6 | 15
+INPUTS | 14 | cnt/LTimer<13> | cnt/LTimer<11> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<10> | cnt/LTimer<8>
+INPUTMC | 14 | 6 | 0 | 6 | 16 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 3
+EQ | 11 |
+ cnt/LTimer<11>.T = cnt/LTimer<13> & cnt/LTimer<11> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> &
+ cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> &
+ cnt/LTimer<8>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> &
+ cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & cnt/LTimer<8> &
+ !cnt/TimerTC;
+ !cnt/LTimer<11>.CLK = C8M; // GCK
+ cnt/LTimer<11>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 3 | cnt/LTimer<8>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 6 | 6 | 0 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15
+INPUTS | 11 | cnt/LTimer<13> | cnt/LTimer<8> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7>
+INPUTMC | 11 | 6 | 0 | 6 | 3 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6
+EQ | 9 |
+ cnt/LTimer<8>.T = cnt/LTimer<13> & cnt/LTimer<8> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> &
+ cnt/LTimer<6> & cnt/LTimer<7>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> &
+ cnt/LTimer<7> & !cnt/TimerTC;
+ !cnt/LTimer<8>.CLK = C8M; // GCK
+ cnt/LTimer<8>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 6 | 15 | cnt/LTimer<12>
+ATTRIBUTES | 4358976 | 0
+OUTPUTMC | 2 | 6 | 0 | 6 | 15
+INPUTS | 15 | cnt/LTimer<13> | cnt/LTimer<12> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<10> | cnt/LTimer<11> | cnt/LTimer<8>
+INPUTMC | 15 | 6 | 0 | 6 | 15 | 3 | 2 | 3 | 8 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3
+EQ | 11 |
+ cnt/LTimer<12>.T = cnt/LTimer<13> & cnt/LTimer<12> & cnt/TimerTC
+ # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> &
+ cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> &
+ cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> &
+ cnt/LTimer<11> & cnt/LTimer<8>
+ # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> &
+ cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> &
+ cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & cnt/LTimer<11> &
+ cnt/LTimer<8> & !cnt/TimerTC;
+ !cnt/LTimer<12>.CLK = C8M; // GCK
+ cnt/LTimer<12>.CE = cnt/TimerTC;
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 2 | 14 | iobs/IORW0
+ATTRIBUTES | 4358912 | 0
+OUTPUTMC | 7 | 5 | 8 | 5 | 10 | 2 | 14 | 5 | 2 | 2 | 13 | 2 | 15 | 2 | 16
+INPUTS | 12 | iobs/IORW0 | iobs/IORW1 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<23> | nWE_FSB | iobs/Once | nAS_FSB | fsb/ASrf | EXP19_.EXP | EXP20_.EXP
+INPUTMC | 9 | 2 | 14 | 2 | 11 | 7 | 6 | 1 | 15 | 5 | 13 | 7 | 16 | 1 | 14 | 2 | 13 | 2 | 15
+INPUTP | 3 | 36 | 47 | 54
+IMPORTS | 2 | 2 | 13 | 2 | 15
+EQ | 60 |
+ iobs/IORW0.T = iobs/IORW0 & !iobs/IORW1 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & !nADoutLE1
+ # !iobs/IORW0 & iobs/IORW1 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & !nADoutLE1
+ # A_FSB<23> & nWE_FSB & !iobs/Once & !iobs/IORW0 &
+ !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<23> & !nWE_FSB & !iobs/Once & iobs/IORW0 &
+ !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<23> & !nWE_FSB & !iobs/Once & iobs/IORW0 &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+;Imported pterms FB3_14
+ # A_FSB<23> & nWE_FSB & !iobs/Once & !iobs/IORW0 &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB &
+ !iobs/Once & !iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB &
+ !iobs/Once & !iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB &
+ !iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB &
+ !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+;Imported pterms FB3_16
+ # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+ # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+;Imported pterms FB3_17
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1;
+ iobs/IORW0.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 4 | 2 | ram/RefDone
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 4 | 4 | 2 | 1 | 7 | 1 | 9 | 4 | 1
+INPUTS | 9 | ram/RefDone | ram/RefReqSync | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay1
+INPUTMC | 5 | 4 | 2 | 1 | 8 | 4 | 6 | 4 | 12 | 4 | 3
+INPUTP | 4 | 36 | 30 | 29 | 28
+EXPORTS | 1 | 4 | 1
+EQ | 7 |
+ ram/RefDone.D = ram/RefDone & ram/RefReqSync
+ # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 &
+ ram/RefReqSync;
+ ram/RefDone.CLK = FCLK; // GCK
+ ram/RefDone.EXP = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20>
+ # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> &
+ !cs/nOverlay1
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 4 | 7 | cs/nOverlay0
ATTRIBUTES | 4358928 | 0
-OUTPUTMC | 3 | 0 | 17 | 2 | 12 | 2 | 13
-INPUTS | 19 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay0 | nAS_FSB | fsb/ASrf | nRES | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | iobs/IOReady | nADoutLE1 | A_FSB<13>
-INPUTMC | 6 | 2 | 12 | 0 | 5 | 0 | 17 | 2 | 14 | 3 | 16 | 5 | 13
-INPUTP | 13 | 36 | 30 | 29 | 28 | 54 | 145 | 19 | 26 | 24 | 23 | 22 | 47 | 18
-EXPORTS | 1 | 2 | 13
-EQ | 12 |
+OUTPUTMC | 3 | 4 | 3 | 4 | 7 | 4 | 8
+INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay0 | nAS_FSB | fsb/ASrf | nRES.PIN | ram/RASEL | A_FSB<5>
+INPUTMC | 3 | 4 | 7 | 1 | 14 | 4 | 0
+INPUTP | 7 | 36 | 30 | 29 | 28 | 54 | 145 | 4
+EXPORTS | 1 | 4 | 8
+EQ | 7 |
cs/nOverlay0.T = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> &
!cs/nOverlay0 & !nAS_FSB
# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> &
!cs/nOverlay0 & fsb/ASrf;
- cs/nOverlay0.CLK = CLK_FSB; // GCK
- cs/nOverlay0.AR = !nRES;
- cs/nOverlay0.EXP = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
- # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
-GLOBALS | 1 | 2 | CLK_FSB
+ cs/nOverlay0.CLK = FCLK; // GCK
+ cs/nOverlay0.AR = !nRES.PIN;
+ cs/nOverlay0.EXP = ram/RASEL & A_FSB<5>
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 15 | cnt/TimeoutA
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 8 | 3 | 15 | 2 | 15 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 7 | 2 | 14 | 2 | 16
-INPUTS | 10 | cnt/TimeoutA | nAS_FSB | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4>
-INPUTMC | 9 | 3 | 15 | 0 | 5 | 3 | 7 | 3 | 6 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8
-INPUTP | 1 | 54
-EQ | 8 |
- cnt/TimeoutA.T = cnt/TimeoutA & nAS_FSB & !fsb/ASrf
- # !cnt/TimeoutA & !nAS_FSB & !cnt/RefCnt<5> &
- !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<1> & !cnt/RefCnt<3> &
- !cnt/RefCnt<2> & !cnt/RefCnt<4>
- # !cnt/TimeoutA & !cnt/RefCnt<5> & !cnt/RefCnt<6> &
- !cnt/RefCnt<0> & !cnt/RefCnt<1> & !cnt/RefCnt<3> & !cnt/RefCnt<2> &
- !cnt/RefCnt<4> & fsb/ASrf;
- cnt/TimeoutA.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 12 | cnt/TimeoutB
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 10 | 6 | 12 | 2 | 11 | 2 | 0 | 2 | 6 | 7 | 11 | 2 | 3 | 2 | 5 | 2 | 10 | 2 | 17 | 6 | 13
-INPUTS | 13 | cnt/TimeoutB | nAS_FSB | fsb/ASrf | cnt/TimeoutBPre | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<7> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> | SW<0>
-INPUTMC | 11 | 6 | 12 | 0 | 5 | 6 | 6 | 3 | 7 | 3 | 6 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8
-INPUTP | 2 | 54 | 98
-EXPORTS | 1 | 6 | 13
-EQ | 9 |
- cnt/TimeoutB.T = cnt/TimeoutB & nAS_FSB & !fsb/ASrf
- # !cnt/TimeoutB & cnt/TimeoutBPre & !nAS_FSB &
- !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<7> &
- !cnt/RefCnt<1> & !cnt/RefCnt<3> & !cnt/RefCnt<2> & !cnt/RefCnt<4>
- # !cnt/TimeoutB & cnt/TimeoutBPre & !cnt/RefCnt<5> &
- !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<7> & !cnt/RefCnt<1> &
- !cnt/RefCnt<3> & !cnt/RefCnt<2> & !cnt/RefCnt<4> & fsb/ASrf;
- cnt/TimeoutB.CLK = CLK_FSB; // GCK
- cnt/TimeoutB.EXP = SW<0>
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 6 | cnt/TimeoutBPre
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 3 | 6 | 12 | 6 | 6 | 6 | 7
-INPUTS | 17 | cnt/TimeoutBPre | nAS_FSB | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<7> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4> | A_FSB<9> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RASEL | A_FSB<21>
-INPUTMC | 12 | 6 | 6 | 0 | 5 | 3 | 7 | 3 | 6 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8 | 0 | 17 | 4 | 17
-INPUTP | 5 | 54 | 12 | 36 | 30 | 29
-EXPORTS | 1 | 6 | 7
-EQ | 12 |
- cnt/TimeoutBPre.T = cnt/TimeoutBPre & nAS_FSB & !fsb/ASrf
- # !cnt/TimeoutBPre & !nAS_FSB & !cnt/RefCnt<5> &
- !cnt/RefCnt<6> & !cnt/RefCnt<0> & !cnt/RefCnt<7> & !cnt/RefCnt<1> &
- !cnt/RefCnt<3> & !cnt/RefCnt<2> & !cnt/RefCnt<4>
- # !cnt/TimeoutBPre & !cnt/RefCnt<5> & !cnt/RefCnt<6> &
- !cnt/RefCnt<0> & !cnt/RefCnt<7> & !cnt/RefCnt<1> & !cnt/RefCnt<3> &
- !cnt/RefCnt<2> & !cnt/RefCnt<4> & fsb/ASrf;
- cnt/TimeoutBPre.CLK = CLK_FSB; // GCK
- cnt/TimeoutBPre.EXP = A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- ram/RASEL
- # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- !cs/nOverlay1 & ram/RASEL
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 11 | fsb/BERR0r
+MACROCELL | 2 | 5 | fsb/Ready0r
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 2 | 11 | 2 | 0 | 2 | 5 | 7 | 11 | 2 | 3 | 2 | 10 | 7 | 10
-INPUTS | 24 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | fsb/BERR0r | cnt/TimeoutB | nAS_FSB | fsb/ASrf | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/BERR | fsb/BERR1r | fsb/Ready1r | nBR_IOB
-INPUTMC | 7 | 2 | 11 | 6 | 12 | 0 | 5 | 7 | 15 | 0 | 16 | 2 | 14 | 7 | 14
-INPUTP | 17 | 36 | 30 | 29 | 28 | 54 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 26 | 24 | 23 | 22
-EXPORTS | 1 | 2 | 10
-EQ | 10 |
- !fsb/BERR0r.D = !cnt/TimeoutB & !fsb/BERR0r
- # nAS_FSB & !fsb/ASrf
- # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> &
- !fsb/BERR0r;
- fsb/BERR0r.CLK = CLK_FSB; // GCK
- fsb/BERR0r.EXP = A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 0 | 16 | fsb/BERR1r
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 8 | 0 | 16 | 2 | 0 | 2 | 5 | 7 | 11 | 2 | 3 | 2 | 10 | 2 | 11 | 7 | 10
-INPUTS | 4 | iobs/BERR | fsb/BERR1r | nAS_FSB | fsb/ASrf
-INPUTMC | 3 | 7 | 15 | 0 | 16 | 0 | 5
-INPUTP | 1 | 54
-EQ | 3 |
- !fsb/BERR1r.D = !iobs/BERR & !fsb/BERR1r
- # nAS_FSB & !fsb/ASrf;
- fsb/BERR1r.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 3 | fsb/Ready0r
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 2 | 3 | 2 | 6 | 2 | 1 | 2 | 9 | 2 | 2
-INPUTS | 32 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cnt/TimeoutA | fsb/Ready2r | fsb/VPA | $OpTx$FX_DC$591 | A_FSB<9> | iobs/BERR | cnt/TimeoutB | fsb/BERR0r | fsb/BERR1r | fsb/Ready1r | nBR_IOB | iobs/IOReady | EXP16_.EXP
-INPUTMC | 15 | 0 | 17 | 2 | 3 | 6 | 14 | 3 | 15 | 2 | 15 | 2 | 0 | 0 | 12 | 7 | 15 | 6 | 12 | 2 | 11 | 0 | 16 | 2 | 14 | 7 | 14 | 3 | 16 | 2 | 4
-INPUTP | 17 | 36 | 30 | 29 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 28 | 26 | 24 | 23 | 22 | 47 | 12
-EXPORTS | 1 | 2 | 2
+OUTPUTMC | 5 | 2 | 5 | 2 | 1 | 2 | 7 | 2 | 0 | 2 | 6
+INPUTS | 15 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | iobs/Once | iobs/IOReady | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1 | nAS_FSB | fsb/ASrf | iobs/Clear1.EXP
+INPUTMC | 11 | 4 | 3 | 2 | 5 | 4 | 16 | 7 | 16 | 2 | 6 | 7 | 6 | 1 | 12 | 5 | 17 | 5 | 13 | 1 | 14 | 2 | 4
+INPUTP | 4 | 36 | 30 | 29 | 54
+EXPORTS | 1 | 2 | 6
IMPORTS | 1 | 2 | 4
-EQ | 24 |
+EQ | 13 |
!fsb/Ready0r.D = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
!fsb/Ready0r & !ram/RAMReady
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
!cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady
;Imported pterms FB3_5
# nAS_FSB & !fsb/ASrf;
- fsb/Ready0r.CLK = CLK_FSB; // GCK
- fsb/Ready0r.EXP = A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB &
- !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB &
- !$OpTx$FX_DC$591
-GLOBALS | 1 | 2 | CLK_FSB
+ fsb/Ready0r.CLK = FCLK; // GCK
+ fsb/Ready0r.EXP = iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 &
+ !iobs/IOACTr & iobm/IOBERR & nADoutLE1
+ # iobs/Once & !iobs/IOReady & !nAS_FSB &
+ !iobs/PS_FSM_FFd2 & !iobs/IOACTr & !iobm/IOBERR & nADoutLE1
+ # iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 &
+ !iobs/IOACTr & !iobm/IOBERR & fsb/ASrf & nADoutLE1
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 2 | 14 | fsb/Ready1r
+MACROCELL | 2 | 9 | fsb/Ready1r
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 2 | 13 | 2 | 7 | 2 | 1 | 2 | 3 | 2 | 6 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 16 | 2 | 17 | 2 | 15
-INPUTS | 22 | nAS_FSB | fsb/ASrf | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | EXP22_.EXP
-INPUTMC | 5 | 0 | 5 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 13
-INPUTP | 17 | 54 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47
-EXPORTS | 1 | 2 | 15
-IMPORTS | 1 | 2 | 13
-EQ | 37 |
+OUTPUTMC | 9 | 2 | 9 | 2 | 1 | 2 | 8 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 17 | 2 | 10
+INPUTS | 17 | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | iobs/IOReady | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | A_FSB<13> | fsb/nDTACK.EXP
+INPUTMC | 5 | 1 | 14 | 2 | 9 | 2 | 6 | 4 | 3 | 2 | 8
+INPUTP | 12 | 54 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 18
+EXPORTS | 1 | 2 | 10
+IMPORTS | 1 | 2 | 8
+EQ | 19 |
!fsb/Ready1r.D = nAS_FSB & !fsb/ASrf
-;Imported pterms FB3_14
# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady
# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
!iobs/IOReady
- # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r &
- !iobs/IOReady & !SW<1>
# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
!fsb/Ready1r & !iobs/IOReady
+;Imported pterms FB3_9
# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
!fsb/Ready1r & !iobs/IOReady
-;Imported pterms FB3_13
# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1;
- fsb/Ready1r.CLK = CLK_FSB; // GCK
- fsb/Ready1r.EXP = nAS_FSB & !fsb/ASrf
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
-GLOBALS | 1 | 2 | CLK_FSB
+ fsb/Ready1r.CLK = FCLK; // GCK
+ fsb/Ready1r.EXP = !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 2 | 15 | fsb/Ready2r
+MACROCELL | 2 | 1 | fsb/VPA
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 2 | 15 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 7 | 2 | 14 | 2 | 16
-INPUTS | 21 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | A_FSB<8> | fsb/Ready1r.EXP
-INPUTMC | 4 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 14
-INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
-IMPORTS | 1 | 2 | 14
-EQ | 43 |
- !fsb/Ready2r.D = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
-;Imported pterms FB3_15
- # nAS_FSB & !fsb/ASrf
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r;
- fsb/Ready2r.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 0 | fsb/VPA
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 2 | 0 | 3 | 10 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 16 | 2 | 17
-INPUTS | 10 | fsb/VPA | nBR_IOB | $OpTx$FX_DC$591 | fsb/BERR0r | fsb/BERR1r | iobs/BERR | A_FSB<20> | cnt/TimeoutB | EXP14_.EXP | EXP23_.EXP
-INPUTMC | 9 | 2 | 0 | 7 | 14 | 0 | 12 | 2 | 11 | 0 | 16 | 7 | 15 | 6 | 12 | 2 | 1 | 2 | 17
-INPUTP | 1 | 28
-IMPORTS | 2 | 2 | 1 | 2 | 17
-EQ | 95 |
- fsb/VPA.D = iobs/BERR & fsb/VPA & !$OpTx$FX_DC$591
- # fsb/BERR0r & fsb/VPA & !$OpTx$FX_DC$591
- # fsb/BERR1r & fsb/VPA & !$OpTx$FX_DC$591
- # fsb/VPA & !nBR_IOB & !$OpTx$FX_DC$591
- # !A_FSB<20> & cnt/TimeoutB & fsb/VPA &
- !$OpTx$FX_DC$591
-;Imported pterms FB3_2
+OUTPUTMC | 5 | 2 | 1 | 3 | 10 | 2 | 0 | 2 | 2 | 2 | 17
+INPUTS | 14 | A_FSB<23> | fsb/Ready1r | fsb/VPA | iobs/IOReady | nAS_FSB | fsb/ASrf | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | EXP14_.EXP | EXP15_.EXP
+INPUTMC | 9 | 2 | 9 | 2 | 1 | 2 | 6 | 1 | 14 | 4 | 3 | 2 | 5 | 4 | 16 | 2 | 0 | 2 | 2
+INPUTP | 5 | 36 | 54 | 30 | 29 | 28
+IMPORTS | 2 | 2 | 0 | 2 | 2
+EQ | 64 |
+ fsb/VPA.D = A_FSB<23> & !fsb/Ready1r & fsb/VPA &
+ !iobs/IOReady & !nAS_FSB
+ # A_FSB<23> & !fsb/Ready1r & fsb/VPA &
+ !iobs/IOReady & fsb/ASrf
# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- !fsb/Ready0r & fsb/VPA & !ram/RAMReady & !$OpTx$FX_DC$591
- # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA &
- !iobs/IOReady & !SW<1> & !$OpTx$FX_DC$591
+ !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
+ fsb/VPA & !iobs/IOReady & !nAS_FSB
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
+ fsb/VPA & !iobs/IOReady & fsb/ASrf
+;Imported pterms FB3_1
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !ram/RAMReady &
- !$OpTx$FX_DC$591
+ !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591
-;Imported pterms FB3_3
- # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
-;Imported pterms FB3_4
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB &
- !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB &
- !$OpTx$FX_DC$591
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
;Imported pterms FB3_18
- # A_FSB<23> & cnt/TimeoutB & fsb/VPA &
- !$OpTx$FX_DC$591
- # !A_FSB<22> & cnt/TimeoutB & fsb/VPA &
- !$OpTx$FX_DC$591
- # A_FSB<21> & cnt/TimeoutB & fsb/VPA &
- !$OpTx$FX_DC$591
- # A_FSB<23> & !fsb/Ready1r & fsb/VPA &
- !iobs/IOReady & !$OpTx$FX_DC$591
- # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
- fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591
-;Imported pterms FB3_17
# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady &
- !nADoutLE1 & !$OpTx$FX_DC$591
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf &
+ !nADoutLE1
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf
+;Imported pterms FB3_3
+ # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
+ # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB &
+ !nADoutLE1
# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady &
- !nADoutLE1 & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591;
- fsb/VPA.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB &
+ !nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf &
+ !nADoutLE1;
+ fsb/VPA.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 4 | 3 | iobs/IOL0
+MACROCELL | 0 | 14 | iobm/BG
+ATTRIBUTES | 8553280 | 0
+OUTPUTMC | 1 | 0 | 17
+INPUTS | 2 | nBG_IOB | iobm/nASr
+INPUTMC | 1 | 0 | 0
+INPUTP | 1 | 117
+EQ | 3 |
+ iobm/BG.D = !nBG_IOB;
+ iobm/BG.CLK = C16M; // GCK
+ iobm/BG.CE = iobm/nASr;
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 0 | 16 | iobs/IOL0
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 5 | 8
INPUTS | 5 | iobs/IOL1 | nADoutLE1 | nLDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 0 | 14 | 5 | 13 | 7 | 3 | 3 | 12
+INPUTMC | 4 | 1 | 17 | 5 | 13 | 7 | 6 | 1 | 15
INPUTP | 1 | 49
EQ | 4 |
iobs/IOL0.D = !nLDS_FSB & nADoutLE1
# iobs/IOL1 & !nADoutLE1;
- iobs/IOL0.CLK = CLK_FSB; // GCK
+ iobs/IOL0.CLK = FCLK; // GCK
iobs/IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
-GLOBALS | 1 | 2 | CLK_FSB
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 0 | 14 | iobs/IOL1
+MACROCELL | 1 | 17 | iobs/IOL1
ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 4 | 3
+OUTPUTMC | 1 | 0 | 16
INPUTS | 2 | nLDS_FSB | iobs/Load1
-INPUTMC | 1 | 4 | 12
+INPUTMC | 1 | 7 | 9
INPUTP | 1 | 49
EQ | 3 |
iobs/IOL1.D = !nLDS_FSB;
- iobs/IOL1.CLK = CLK_FSB; // GCK
+ iobs/IOL1.CLK = FCLK; // GCK
iobs/IOL1.CE = iobs/Load1;
-GLOBALS | 1 | 2 | CLK_FSB
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 7 | 13 | iobs/IORW1
+MACROCELL | 2 | 11 | iobs/IORW1
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 2 | 7 | 0 | 7 | 13
-INPUTS | 8 | A_FSB<23> | A_FSB<21> | iobs/IORW1 | nADoutLE1 | iobs/Once | nWE_FSB | EXP36_.EXP | Park.EXP
-INPUTMC | 5 | 7 | 13 | 5 | 13 | 4 | 6 | 7 | 12 | 7 | 14
-INPUTP | 3 | 36 | 29 | 47
-IMPORTS | 2 | 7 | 12 | 7 | 14
-EQ | 22 |
+OUTPUTMC | 3 | 2 | 14 | 2 | 11 | 2 | 10
+INPUTS | 9 | A_FSB<23> | A_FSB<21> | iobs/IORW1 | nADoutLE1 | iobs/Once | A_FSB<20> | nWE_FSB | EXP17_.EXP | EXP18_.EXP
+INPUTMC | 5 | 2 | 11 | 5 | 13 | 7 | 16 | 2 | 10 | 2 | 12
+INPUTP | 4 | 36 | 29 | 28 | 47
+IMPORTS | 2 | 2 | 10 | 2 | 12
+EQ | 21 |
!iobs/IORW1.T = iobs/Once
# !nADoutLE1
+ # !A_FSB<23> & !A_FSB<20>
# nWE_FSB & iobs/IORW1
- # !nWE_FSB & !iobs/IORW1
# !A_FSB<23> & A_FSB<21> & !iobs/IORW1
-;Imported pterms FB8_13
+;Imported pterms FB3_11
+ # !nWE_FSB & !iobs/IORW1
# nAS_FSB & !fsb/ASrf
# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20>
-;Imported pterms FB8_12
- # !A_FSB<23> & !A_FSB<20> & SW<1>
+;Imported pterms FB3_10
# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- cs/nOverlay1
-;Imported pterms FB8_15
+;Imported pterms FB3_13
# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16>;
- iobs/IORW1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<16>
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ cs/nOverlay1;
+ iobs/IORW1.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 16 | iobs/IOReady
+MACROCELL | 2 | 6 | iobs/IOReady
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 12 | 2 | 13 | 2 | 7 | 3 | 16 | 2 | 1 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 12 | 2 | 16 | 2 | 17 | 3 | 17
-INPUTS | 18 | iobs/IOReady | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1 | A_FSB<23> | A_FSB<22> | cnt/RefDone | ram/Once | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7>
-INPUTMC | 15 | 3 | 16 | 0 | 5 | 4 | 6 | 7 | 3 | 1 | 6 | 5 | 17 | 5 | 13 | 3 | 13 | 4 | 9 | 0 | 17 | 3 | 17 | 6 | 9 | 3 | 7 | 3 | 6 | 3 | 3
-INPUTP | 3 | 54 | 36 | 30
-EXPORTS | 1 | 3 | 17
-EQ | 11 |
+OUTPUTMC | 9 | 2 | 9 | 2 | 1 | 2 | 6 | 2 | 8 | 2 | 0 | 2 | 2 | 2 | 5 | 2 | 7 | 2 | 17
+INPUTS | 22 | iobs/IOReady | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | nDTACK_FSB | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | fsb/Ready0r.EXP
+INPUTMC | 5 | 2 | 6 | 1 | 14 | 2 | 9 | 2 | 8 | 2 | 5
+INPUTP | 17 | 54 | 36 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 30 | 29 | 28 | 26 | 24 | 23 | 22
+EXPORTS | 1 | 2 | 7
+IMPORTS | 1 | 2 | 5
+EQ | 20 |
iobs/IOReady.T = iobs/IOReady & nAS_FSB & !fsb/ASrf
+;Imported pterms FB3_6
# iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 &
!iobs/IOACTr & iobm/IOBERR & nADoutLE1
# iobs/Once & !iobs/IOReady & !nAS_FSB &
!iobs/PS_FSM_FFd2 & !iobs/IOACTr & !iobm/IOBERR & nADoutLE1
# iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 &
!iobs/IOACTr & !iobm/IOBERR & fsb/ASrf & nADoutLE1;
- iobs/IOReady.CLK = CLK_FSB; // GCK
- iobs/IOReady.EXP = !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once &
- cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/IOReady.CLK = FCLK; // GCK
+ iobs/IOReady.EXP = nAS_FSB & !fsb/ASrf
+ # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady &
+ nDTACK_FSB
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 14 | iobs/IOU0
+MACROCELL | 0 | 15 | iobs/IOU0
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 5 | 10
INPUTS | 5 | iobs/IOU1 | nADoutLE1 | nUDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 0 | 13 | 5 | 13 | 7 | 3 | 3 | 12
+INPUTMC | 4 | 1 | 16 | 5 | 13 | 7 | 6 | 1 | 15
INPUTP | 1 | 56
EQ | 4 |
iobs/IOU0.D = !nUDS_FSB & nADoutLE1
# iobs/IOU1 & !nADoutLE1;
- iobs/IOU0.CLK = CLK_FSB; // GCK
+ iobs/IOU0.CLK = FCLK; // GCK
iobs/IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
-GLOBALS | 1 | 2 | CLK_FSB
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 0 | 13 | iobs/IOU1
+MACROCELL | 1 | 16 | iobs/IOU1
ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 3 | 14
+OUTPUTMC | 1 | 0 | 15
INPUTS | 2 | nUDS_FSB | iobs/Load1
-INPUTMC | 1 | 4 | 12
+INPUTMC | 1 | 7 | 9
INPUTP | 1 | 56
EQ | 3 |
iobs/IOU1.D = !nUDS_FSB;
- iobs/IOU1.CLK = CLK_FSB; // GCK
+ iobs/IOU1.CLK = FCLK; // GCK
iobs/IOU1.CE = iobs/Load1;
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 4 | 2 | ram/RAMDIS2
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 4 | 4 | 2 | 4 | 1 | 7 | 5 | 7 | 6
-INPUTS | 15 | ram/RAMDIS2 | nAS_FSB | fsb/ASrf | cnt/RefDone | ram/Once | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nROMCS_OBUF.EXP
-INPUTMC | 12 | 4 | 2 | 0 | 5 | 3 | 13 | 4 | 9 | 3 | 17 | 6 | 9 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 17 | 4 | 1
-INPUTP | 3 | 54 | 36 | 30
-IMPORTS | 1 | 4 | 1
-EQ | 23 |
- ram/RAMDIS2.T = ram/RAMDIS2 & nAS_FSB & !fsb/ASrf
- # !cnt/RefDone & ram/Once & !ram/RAMDIS2 & !nAS_FSB &
- ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !cnt/RefDone & ram/Once & !ram/RAMDIS2 &
- ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once &
- cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once &
- cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-;Imported pterms FB5_2
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB &
- !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> &
- fsb/ASrf;
- ram/RAMDIS2.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+GLOBALS | 1 | 2 | FCLK
MACROCELL | 2 | 8 | fsb/nDTACK
ATTRIBUTES | 8815362 | 0
-OUTPUTMC | 5 | 2 | 8 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 10
-INPUTS | 23 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | nDTACK_FSB | A_FSB<8> | EXP19_.EXP | EXP20_.EXP
-INPUTMC | 6 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 8 | 2 | 7 | 2 | 9
-INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
-IMPORTS | 2 | 2 | 7 | 2 | 9
-EQ | 90 |
- nDTACK_FSB.D = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
-;Imported pterms FB3_8
- # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
- A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
- # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+OUTPUTMC | 4 | 2 | 8 | 2 | 6 | 2 | 7 | 2 | 9
+INPUTS | 16 | A_FSB<13> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | nADoutLE1 | A_FSB<14> | EXP16_.EXP
+INPUTMC | 6 | 4 | 3 | 2 | 9 | 2 | 6 | 2 | 8 | 5 | 13 | 2 | 7
+INPUTP | 10 | 18 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 19
+EXPORTS | 1 | 2 | 9
+IMPORTS | 1 | 2 | 7
+EQ | 43 |
+ nDTACK_FSB.D = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB &
!nADoutLE1
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
-;Imported pterms FB3_7
- # A_FSB<23> & cnt/TimeoutB & nDTACK_FSB
- # !A_FSB<22> & cnt/TimeoutB & nDTACK_FSB
- # !A_FSB<20> & cnt/TimeoutB & nDTACK_FSB
- # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady &
- nDTACK_FSB
- # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-;Imported pterms FB3_6
- # nAS_FSB & !fsb/ASrf
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB
-;Imported pterms FB3_10
- # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
- !iobs/IOReady & nDTACK_FSB
- # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r &
- !iobs/IOReady & nDTACK_FSB & !SW<1>
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- !cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
- # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
- A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB &
!nADoutLE1
-;Imported pterms FB3_11
- # iobs/BERR & nDTACK_FSB
- # fsb/BERR0r & nDTACK_FSB
- # fsb/BERR1r & nDTACK_FSB
- # nDTACK_FSB & !nBR_IOB
- # A_FSB<21> & cnt/TimeoutB & nDTACK_FSB
-;Imported pterms FB3_12
+;Imported pterms FB3_8
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
+ !iobs/IOReady & nDTACK_FSB
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
+ # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
+ # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
+;Imported pterms FB3_7
+ # nAS_FSB & !fsb/ASrf
+ # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady &
+ nDTACK_FSB
# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB;
- nDTACK_FSB.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady;
+ nDTACK_FSB.CLK = FCLK; // GCK
+ fsb/nDTACK.EXP = A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & !iobs/IOReady
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 17 | ram/RS_FSM_FFd1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 21 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 0 | 0 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 13 | 6 | 15 | 6 | 16
-INPUTS | 15 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefDone | nAS_FSB | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | iobs/Clear1.EXP | iobs/IOReady.EXP
-INPUTMC | 12 | 3 | 17 | 6 | 9 | 6 | 3 | 3 | 13 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5 | 4 | 9 | 0 | 17 | 3 | 0 | 3 | 16
-INPUTP | 3 | 54 | 36 | 30
-IMPORTS | 2 | 3 | 0 | 3 | 16
-EQ | 21 |
- ram/RS_FSM_FFd1.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
- # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
- # !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once &
- cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB4_1
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-;Imported pterms FB4_17
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone & ram/Once &
- cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf;
- ram/RS_FSM_FFd1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+MACROCELL | 7 | 11 | iobs/nBERR_FSB
+ATTRIBUTES | 4621058 | 0
+OUTPUTMC | 2 | 7 | 11 | 7 | 12
+INPUTS | 12 | nAS_FSB | nBERR_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1 | A_FSB<14> | A_FSB<13> | A_FSB<23> | A_FSB<21>
+INPUTMC | 7 | 7 | 11 | 1 | 14 | 7 | 16 | 7 | 6 | 1 | 12 | 5 | 17 | 5 | 13
+INPUTP | 5 | 54 | 19 | 18 | 36 | 29
+EXPORTS | 1 | 7 | 12
+EQ | 10 |
+ nBERR_FSB.T = nAS_FSB & !nBERR_FSB & !fsb/ASrf
+ # iobs/Once & !nBERR_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/IOACTr & !iobm/IOBERR & nADoutLE1
+ # iobs/Once & !nAS_FSB & nBERR_FSB &
+ !iobs/PS_FSM_FFd2 & !iobs/IOACTr & iobm/IOBERR & nADoutLE1
+ # iobs/Once & nBERR_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/IOACTr & iobm/IOBERR & fsb/ASrf & nADoutLE1;
+ nBERR_FSB.CLK = FCLK; // GCK
+ iobs/nBERR_FSB.EXP = !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 4 | 17 | ram/RASEL
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 10 | 6 | 5 | 6 | 1 | 6 | 6 | 4 | 10 | 4 | 8 | 4 | 4 | 4 | 14 | 6 | 4 | 6 | 7 | 6 | 11
-INPUTS | 13 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd1 | A_FSB<23> | cnt/RefDone | nAS_FSB | ram/BACTr | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | EXP24_.EXP | EXP27_.EXP
-INPUTMC | 11 | 6 | 9 | 6 | 3 | 3 | 17 | 3 | 13 | 0 | 1 | 0 | 5 | 3 | 7 | 3 | 6 | 3 | 3 | 4 | 0 | 4 | 16
-INPUTP | 2 | 36 | 54
-IMPORTS | 2 | 4 | 0 | 4 | 16
-EQ | 44 |
- ram/RASEL.D = !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3
- # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3
- # A_FSB<23> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr
- # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf
- # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf
-;Imported pterms FB5_1
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
-;Imported pterms FB5_17
- # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf
-;Imported pterms FB5_16
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>;
- ram/RASEL.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+MACROCELL | 3 | 1 | cnt/AoutOE
+ATTRIBUTES | 8815362 | 0
+OUTPUTMC | 6 | 5 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 0 | 3 | 4
+INPUTS | 3 | nBR_IOB | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2
+INPUTMC | 3 | 7 | 14 | 7 | 0 | 3 | 6
+EQ | 2 |
+ nAoutOE.D = !nBR_IOB & cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2;
+ !nAoutOE.CLK = C8M; // GCK
+GLOBALS | 1 | 2 | C8M
-MACROCELL | 6 | 9 | ram/RS_FSM_FFd2
+MACROCELL | 7 | 14 | cnt/nBR_IOB
+ATTRIBUTES | 4621058 | 0
+OUTPUTMC | 3 | 3 | 1 | 7 | 14 | 7 | 13
+INPUTS | 12 | nBR_IOB | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2 | cnt/IPL2r | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | nADoutLE1 | A_FSB<17> | A_FSB<22> | cs/nOverlay1
+INPUTMC | 7 | 7 | 14 | 7 | 0 | 3 | 6 | 0 | 12 | 7 | 6 | 5 | 13 | 4 | 3
+INPUTP | 5 | 36 | 29 | 24 | 23 | 30
+EXPORTS | 1 | 7 | 13
+EQ | 10 |
+ nBR_IOB.T = nBR_IOB & !cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2
+ # !nBR_IOB & !cnt/PORS_FSM_FFd1 & cnt/PORS_FSM_FFd2 &
+ cnt/IPL2r;
+ !nBR_IOB.CLK = C8M; // GCK
+ cnt/nBR_IOB.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 4 | 0 | ram/RASEL
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 18 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 0 | 0 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 2 | 6 | 8 | 6 | 10
-INPUTS | 10 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | nAS_FSB | ram/RS_FSM_FFd3 | fsb/ASrf | cnt/RefDone | cnt/RefCnt<7> | ram/BACTr | A_FSB_21_IBUF$BUF0.EXP | RA_9_OBUF.EXP
-INPUTMC | 9 | 3 | 17 | 6 | 9 | 6 | 3 | 0 | 5 | 3 | 13 | 3 | 3 | 0 | 1 | 6 | 8 | 6 | 10
+OUTPUTMC | 13 | 6 | 5 | 6 | 1 | 4 | 13 | 4 | 10 | 4 | 8 | 4 | 7 | 4 | 14 | 6 | 4 | 6 | 7 | 6 | 10 | 4 | 4 | 6 | 6 | 6 | 8
+INPUTS | 8 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | nAS_FSB | fsb/ASrf | ram/RefUrgent | nROMCS_OBUF.EXP | EXP23_.EXP
+INPUTMC | 7 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 14 | 1 | 7 | 4 | 1 | 4 | 17
INPUTP | 1 | 54
-IMPORTS | 2 | 6 | 8 | 6 | 10
-EQ | 27 |
- !ram/RS_FSM_FFd2.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
- # cnt/RefDone & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+IMPORTS | 2 | 4 | 1 | 4 | 17
+EQ | 36 |
+ !ram/RASEL.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
+ # ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3
# !nAS_FSB & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
# ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
- # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<7> & ram/BACTr
-;Imported pterms FB7_9
- # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<5> & ram/BACTr
- # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<6> & ram/BACTr
- # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<5> & !fsb/ASrf
- # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<7> & !fsb/ASrf
-;Imported pterms FB7_11
- # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<6> & !fsb/ASrf
+ # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !fsb/ASrf
+;Imported pterms FB5_2
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
+ !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & fsb/ASrf
+;Imported pterms FB5_18
+ # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & ram/BACTr
+ # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+;Imported pterms FB5_17
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
+ !ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN &
+ fsb/ASrf;
+ ram/RASEL.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 3 | 2 | cnt/TimerTC
+ATTRIBUTES | 8520480 | 0
+OUTPUTMC | 18 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9
+INPUTS | 5 | cnt/Timer<1> | cnt/Timer<2> | cnt/Timer<0> | cnt/Timer<3> | E
+INPUTMC | 4 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9
+INPUTP | 1 | 37
+EQ | 3 |
+ cnt/TimerTC.D = !cnt/Timer<1> & !cnt/Timer<2> & !cnt/Timer<0> &
+ cnt/Timer<3>;
+ cnt/TimerTC.CLK = E;
+
+MACROCELL | 0 | 17 | iobm/IOS_FSM_FFd3
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 3 | 5 | 2 | 5 | 14 | 5 | 16
+INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | C8M | iobm/BG | iobm/IOREQr
+INPUTMC | 5 | 0 | 13 | 5 | 9 | 0 | 17 | 0 | 14 | 0 | 5
+INPUTP | 1 | 35
+EQ | 6 |
+ iobm/IOS_FSM_FFd3.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2
+ # iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 &
+ !iobm/IOS_FSM_FFd2
+ # !C8M & iobm/BG & !iobm/IOS_FSM_FFd1 &
+ !iobm/IOS_FSM_FFd2 & iobm/IOREQr;
+ iobm/IOS_FSM_FFd3.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 4 | 6 | ram/RS_FSM_FFd1
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 11 | 4 | 2 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 1 | 10 | 4 | 5 | 4 | 8 | 7 | 1
+INPUTS | 11 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | nAS_FSB | ram/RefUrgent | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RAMEN | nOE_OBUF.EXP
+INPUTMC | 8 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 7 | 1 | 14 | 4 | 3 | 4 | 9 | 4 | 5
+INPUTP | 3 | 54 | 36 | 30
+IMPORTS | 1 | 4 | 5
+EQ | 19 |
+ ram/RS_FSM_FFd1.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
+ # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
+ # !nAS_FSB & ram/RS_FSM_FFd1 & ram/RefUrgent &
+ !ram/RS_FSM_FFd3
+ # ram/RS_FSM_FFd1 & ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & fsb/ASrf
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
+ !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN
+;Imported pterms FB5_6
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN &
+ fsb/ASrf
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
+ ram/RefUrgent & !ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
+ ram/RefUrgent & !ram/RAMEN & fsb/ASrf;
+ ram/RS_FSM_FFd1.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 0 | 13 | iobm/IOS_FSM_FFd1
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 11 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 3 | 5 | 16 | 5 | 14
+INPUTS | 3 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1
+INPUTMC | 3 | 0 | 17 | 5 | 9 | 0 | 13
+EQ | 3 |
+ iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1
+ # !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2;
+ iobm/IOS_FSM_FFd1.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd2
+ATTRIBUTES | 4358912 | 0
+OUTPUTMC | 11 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 3 | 5 | 2 | 5 | 16
+INPUTS | 11 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | C8M | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/RESrf | iobm/RESrr
+INPUTMC | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 0 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 4 | 0 | 3
+INPUTP | 1 | 35
+EQ | 11 |
+ iobm/IOS_FSM_FFd2.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 &
+ !iobm/IOS_FSM_FFd2
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ iobm/IOS_FSM_FFd2 & iobm/ETACK
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ iobm/IOS_FSM_FFd2 & iobm/BERRrf & iobm/BERRrr
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ iobm/IOS_FSM_FFd2 & iobm/DTACKrf & iobm/DTACKrr
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ iobm/IOS_FSM_FFd2 & iobm/RESrf & iobm/RESrr;
+ iobm/IOS_FSM_FFd2.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 4 | 12 | ram/RS_FSM_FFd2
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 15 | 4 | 2 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 1 | 10 | 4 | 1 | 4 | 5 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 1
+INPUTS | 9 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | nAS_FSB | ram/RS_FSM_FFd3 | fsb/ASrf | ram/RefUrgent | ram/RefReq | ram/BACTr | RA_5_OBUF.EXP
+INPUTMC | 8 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 14 | 1 | 7 | 1 | 9 | 1 | 11 | 4 | 11
+INPUTP | 1 | 54
+IMPORTS | 1 | 4 | 11
+EQ | 19 |
+ !ram/RS_FSM_FFd2.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
+ # !nAS_FSB & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
+ # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
+ # !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & ram/BACTr
+ # !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RefReq
+;Imported pterms FB5_12
+ # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !fsb/ASrf
# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
@@ -900,248 +943,230 @@ EQ | 27 |
!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf;
- ram/RS_FSM_FFd2.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ ram/RS_FSM_FFd2.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 5 | 2 | iobm/IOS_FSM_FFd3
+MACROCELL | 7 | 6 | iobs/PS_FSM_FFd2
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 13 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 6 | 3 | 4 | 5 | 0 | 5 | 14 | 5 | 16
-INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | CLK_IOB | iobm/IOREQr | nAoutOE
-INPUTMC | 5 | 0 | 15 | 5 | 9 | 5 | 2 | 1 | 9 | 3 | 1
-INPUTP | 1 | 35
-EQ | 6 |
- iobm/IOS_FSM_FFd3.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2
- # iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 &
- !iobm/IOS_FSM_FFd2
- # !CLK_IOB & !iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 &
- iobm/IOREQr & !nAoutOE;
- iobm/IOS_FSM_FFd3.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 0 | 15 | iobm/IOS_FSM_FFd1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 6 | 5 | 16 | 5 | 0 | 5 | 14
-INPUTS | 3 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1
-INPUTMC | 3 | 5 | 2 | 5 | 9 | 0 | 15
-EQ | 3 |
- iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1
- # !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2;
- iobm/IOS_FSM_FFd1.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd2
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 6 | 5 | 16 | 3 | 4 | 5 | 0
-INPUTS | 11 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | CLK_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/RESrf | iobm/RESrr
-INPUTMC | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 0 | 0 | 4 | 1 | 16 | 1 | 13 | 1 | 12 | 0 | 3 | 0 | 2
-INPUTP | 1 | 35
-EQ | 11 |
- iobm/IOS_FSM_FFd2.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 &
- !iobm/IOS_FSM_FFd2
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
- iobm/IOS_FSM_FFd2 & iobm/ETACK
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
- iobm/IOS_FSM_FFd2 & iobm/BERRrf & iobm/BERRrr
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
- iobm/IOS_FSM_FFd2 & iobm/DTACKrf & iobm/DTACKrr
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
- iobm/IOS_FSM_FFd2 & iobm/RESrf & iobm/RESrr;
- iobm/IOS_FSM_FFd2.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 6 | 3 | ram/RS_FSM_FFd3
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 16 | 4 | 9 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 6 | 17 | 6 | 14 | 4 | 1 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 8 | 6 | 10 | 6 | 16
-INPUTS | 12 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd3 | fsb/ASrf | A_FSB<21> | EXP29_.EXP | RA_7_OBUF.EXP
-INPUTMC | 8 | 3 | 17 | 6 | 9 | 4 | 9 | 0 | 17 | 6 | 3 | 0 | 5 | 6 | 2 | 6 | 4
-INPUTP | 4 | 36 | 30 | 54 | 29
-IMPORTS | 2 | 6 | 2 | 6 | 4
-EQ | 30 |
- ram/RS_FSM_FFd3.D = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-;Imported pterms FB7_3
- # !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> &
- fsb/ASrf
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone &
- cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone &
- cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB7_5
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf;
- ram/RS_FSM_FFd3.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 3 | iobs/PS_FSM_FFd2
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 17 | 4 | 6 | 7 | 15 | 7 | 9 | 4 | 3 | 7 | 12 | 3 | 16 | 3 | 14 | 7 | 3 | 3 | 12 | 4 | 12 | 3 | 2 | 3 | 0 | 7 | 8 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7
-INPUTS | 12 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | EXP33_.EXP | nRAS_OBUF.EXP
-INPUTMC | 9 | 7 | 3 | 3 | 12 | 1 | 6 | 4 | 6 | 5 | 13 | 0 | 5 | 0 | 17 | 7 | 2 | 7 | 4
-INPUTP | 3 | 54 | 36 | 30
-IMPORTS | 2 | 7 | 2 | 7 | 4
-EQ | 33 |
+OUTPUTMC | 21 | 7 | 16 | 2 | 14 | 0 | 16 | 2 | 10 | 2 | 5 | 0 | 15 | 7 | 11 | 7 | 6 | 1 | 15 | 7 | 9 | 1 | 13 | 2 | 4 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 5 | 7 | 7 | 7 | 12 | 7 | 14 | 7 | 15
+INPUTS | 11 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | A_FSB<23> | A_FSB<20> | nAS_FSB | fsb/ASrf | nRAMLWE_OBUF.EXP | nRAMUWE_OBUF.EXP
+INPUTMC | 8 | 7 | 6 | 1 | 15 | 1 | 12 | 7 | 16 | 5 | 13 | 1 | 14 | 7 | 5 | 7 | 7
+INPUTP | 3 | 36 | 28 | 54
+IMPORTS | 2 | 7 | 5 | 7 | 7
+EQ | 31 |
!iobs/PS_FSM_FFd2.D = iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 &
iobs/IOACTr
# !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 &
!iobs/IOACTr
# iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
nADoutLE1
+ # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
# nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
!fsb/ASrf & nADoutLE1
- # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB8_3
+;Imported pterms FB8_6
# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20> &
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<23> & A_FSB<21> & !A_FSB<19> &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<23> & A_FSB<21> & !A_FSB<16> &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB8_5
- # !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<23> & A_FSB<21> & nWE_FSB &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 &
- !iobs/PS_FSM_FFd1 & SW<1> & nADoutLE1
+;Imported pterms FB8_8
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1;
- iobs/PS_FSM_FFd2.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/PS_FSM_FFd2.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 7 | cnt/RefCnt<5>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 22 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 8 | 6 | 2 | 3 | 6 | 3 | 3 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4
-INPUTS | 5 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4>
-INPUTMC | 5 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8
-EQ | 3 |
- cnt/RefCnt<5>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<3> &
- cnt/RefCnt<2> & cnt/RefCnt<4>;
- cnt/RefCnt<5>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+MACROCELL | 1 | 7 | ram/RefUrgent
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 13 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 5 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 1
+INPUTS | 2 | ram/RefDone | ram/RegUrgentSync
+INPUTMC | 2 | 4 | 2 | 1 | 6
+EQ | 2 |
+ ram/RefUrgent.D = !ram/RefDone & ram/RegUrgentSync;
+ ram/RefUrgent.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 6 | cnt/RefCnt<6>
+MACROCELL | 7 | 2 | ram/RS_FSM_FFd3
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 22 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 8 | 6 | 2 | 3 | 3 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 10
-INPUTS | 6 | cnt/RefCnt<5> | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4>
-INPUTMC | 6 | 3 | 7 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8
-EQ | 3 |
- cnt/RefCnt<6>.T = cnt/RefCnt<5> & cnt/RefCnt<0> & cnt/RefCnt<1> &
- cnt/RefCnt<3> & cnt/RefCnt<2> & cnt/RefCnt<4>;
- cnt/RefCnt<6>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+OUTPUTMC | 12 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 2 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 1
+INPUTS | 9 | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | A_FSB<21> | ram/RefUrgent | ram/RAMEN | A_FSB_19_IBUF$BUF0.EXP
+INPUTMC | 7 | 4 | 3 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 7 | 4 | 9 | 7 | 1
+INPUTP | 2 | 30 | 29
+IMPORTS | 1 | 7 | 1
+EQ | 20 |
+ !ram/RS_FSM_FFd3.T = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 &
+ ram/RS_FSM_FFd3
+ # !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RAMEN
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd1 &
+ !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd1 &
+ !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd1 &
+ !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+;Imported pterms FB8_2
+ # ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 &
+ !ram/RS_FSM_FFd3
+ # ram/RS_FSM_FFd1 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3
+ # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
+ !ram/RS_FSM_FFd3
+ # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
+ !fsb/ASrf;
+ ram/RS_FSM_FFd3.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 5 | 5 | iobm/ES<0>
+MACROCELL | 5 | 6 | iobm/ES<0>
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
+OUTPUTMC | 7 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
INPUTS | 7 | iobm/ES<0> | iobm/Er | iobm/Er2 | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4>
-INPUTMC | 7 | 5 | 5 | 1 | 11 | 1 | 10 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7
+INPUTMC | 7 | 5 | 6 | 0 | 7 | 0 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7
EQ | 6 |
!iobm/ES<0>.T = iobm/ES<0> & !iobm/Er & iobm/Er2
# !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> &
!iobm/ES<3> & !iobm/ES<4> & iobm/Er
# !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> &
!iobm/ES<3> & !iobm/ES<4> & !iobm/Er2;
- iobm/ES<0>.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/ES<0>.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 3 | 12 | iobs/PS_FSM_FFd1
+MACROCELL | 1 | 15 | iobs/PS_FSM_FFd1
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 14 | 4 | 6 | 7 | 4 | 4 | 3 | 7 | 12 | 3 | 14 | 7 | 3 | 3 | 12 | 4 | 12 | 3 | 2 | 3 | 0 | 7 | 8 | 4 | 5 | 7 | 1 | 7 | 2
+OUTPUTMC | 17 | 7 | 16 | 2 | 14 | 0 | 16 | 2 | 10 | 0 | 15 | 7 | 6 | 1 | 15 | 7 | 9 | 1 | 13 | 2 | 4 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 5 | 7 | 7 | 7 | 15
INPUTS | 3 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr
-INPUTMC | 3 | 7 | 3 | 3 | 12 | 1 | 6
+INPUTMC | 3 | 7 | 6 | 1 | 15 | 1 | 12
EQ | 3 |
iobs/PS_FSM_FFd1.D = iobs/PS_FSM_FFd2
# iobs/PS_FSM_FFd1 & iobs/IOACTr;
- iobs/PS_FSM_FFd1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/PS_FSM_FFd1.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 5 | 4 | iobm/ES<1>
+MACROCELL | 4 | 9 | ram/RAMEN
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
+OUTPUTMC | 10 | 7 | 7 | 4 | 6 | 7 | 2 | 4 | 9 | 4 | 14 | 7 | 4 | 4 | 16 | 4 | 1 | 4 | 5 | 4 | 8
+INPUTS | 10 | ram/RS_FSM_FFd2 | ram/RAMEN | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd1 | ram/RefUrgent | ram/BACTr | ram/RefReq | nAS_FSB | fsb/ASrf | RA_4_OBUF.EXP
+INPUTMC | 9 | 4 | 12 | 4 | 9 | 7 | 2 | 4 | 6 | 1 | 7 | 1 | 11 | 1 | 9 | 1 | 14 | 4 | 8
+INPUTP | 1 | 54
+IMPORTS | 1 | 4 | 8
+EQ | 18 |
+ ram/RAMEN.D = ram/RS_FSM_FFd2 & ram/RAMEN
+ # ram/RS_FSM_FFd3 & ram/RAMEN
+ # !ram/RS_FSM_FFd1 & !ram/RefUrgent & ram/RAMEN &
+ ram/BACTr
+ # !ram/RS_FSM_FFd1 & !ram/RefUrgent & ram/RAMEN &
+ !ram/RefReq
+ # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !fsb/ASrf
+;Imported pterms FB5_9
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
+ !ram/RS_FSM_FFd1 & ram/RAMEN
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf;
+ ram/RAMEN.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 3 | 12 | cnt/Timer<1>
+ATTRIBUTES | 8520480 | 0
+OUTPUTMC | 6 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 9 | 3 | 14 | 3 | 13
+INPUTS | 4 | cnt/TimerTC | cnt/Timer<1> | cnt/Timer<0> | E
+INPUTMC | 3 | 3 | 2 | 3 | 12 | 3 | 3
+INPUTP | 1 | 37
+EQ | 3 |
+ cnt/Timer<1>.D = !cnt/TimerTC & cnt/Timer<1> & !cnt/Timer<0>
+ # !cnt/TimerTC & !cnt/Timer<1> & cnt/Timer<0>;
+ cnt/Timer<1>.CLK = E;
+
+MACROCELL | 3 | 11 | cnt/Timer<2>
+ATTRIBUTES | 4326176 | 0
+OUTPUTMC | 5 | 3 | 2 | 3 | 11 | 3 | 9 | 3 | 14 | 3 | 13
+INPUTS | 5 | cnt/TimerTC | cnt/Timer<1> | cnt/Timer<0> | cnt/Timer<2> | E
+INPUTMC | 4 | 3 | 2 | 3 | 12 | 3 | 3 | 3 | 11
+INPUTP | 1 | 37
+EQ | 3 |
+ cnt/Timer<2>.T = cnt/TimerTC & cnt/Timer<2>
+ # !cnt/TimerTC & cnt/Timer<1> & cnt/Timer<0>;
+ cnt/Timer<2>.CLK = E;
+
+MACROCELL | 5 | 5 | iobm/ES<1>
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 7 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
INPUTS | 4 | iobm/ES<0> | iobm/ES<1> | iobm/Er | iobm/Er2
-INPUTMC | 4 | 5 | 5 | 5 | 4 | 1 | 11 | 1 | 10
+INPUTMC | 4 | 5 | 6 | 5 | 5 | 0 | 7 | 0 | 6
EQ | 4 |
!iobm/ES<1>.D = iobm/ES<0> & iobm/ES<1>
# !iobm/ES<0> & !iobm/ES<1>
# !iobm/Er & iobm/Er2;
- iobm/ES<1>.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/ES<1>.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 17 | cnt/RefCnt<0>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 11 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8
-INPUTS | 0
+MACROCELL | 3 | 3 | cnt/Timer<0>
+ATTRIBUTES | 8520480 | 0
+OUTPUTMC | 7 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9 | 3 | 14 | 3 | 13
+INPUTS | 3 | cnt/TimerTC | cnt/Timer<0> | E
+INPUTMC | 2 | 3 | 2 | 3 | 3
+INPUTP | 1 | 37
EQ | 2 |
- cnt/RefCnt<0>.T = Vcc;
- cnt/RefCnt<0>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ cnt/Timer<0>.D = !cnt/TimerTC & !cnt/Timer<0>;
+ cnt/Timer<0>.CLK = E;
-MACROCELL | 3 | 3 | cnt/RefCnt<7>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 20 | 3 | 13 | 6 | 12 | 6 | 6 | 4 | 2 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 2 | 6 | 17 | 6 | 14 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 1 | 6 | 4 | 6 | 8
-INPUTS | 7 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2> | cnt/RefCnt<4>
-INPUTMC | 7 | 3 | 7 | 3 | 6 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11 | 3 | 8
-EQ | 3 |
- cnt/RefCnt<7>.T = cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<0> &
- cnt/RefCnt<1> & cnt/RefCnt<3> & cnt/RefCnt<2> & cnt/RefCnt<4>;
- cnt/RefCnt<7>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+MACROCELL | 3 | 9 | cnt/Timer<3>
+ATTRIBUTES | 4326176 | 0
+OUTPUTMC | 4 | 3 | 2 | 3 | 9 | 3 | 14 | 3 | 13
+INPUTS | 6 | cnt/TimerTC | cnt/Timer<1> | cnt/Timer<2> | cnt/Timer<0> | cnt/Timer<3> | E
+INPUTMC | 5 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9
+INPUTP | 1 | 37
+EQ | 4 |
+ cnt/Timer<3>.T = cnt/TimerTC & cnt/Timer<3>
+ # !cnt/TimerTC & cnt/Timer<1> & cnt/Timer<2> &
+ cnt/Timer<0>;
+ cnt/Timer<3>.CLK = E;
MACROCELL | 5 | 12 | iobm/ES<2>
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
+OUTPUTMC | 6 | 5 | 1 | 5 | 6 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
INPUTS | 7 | iobm/ES<0> | iobm/ES<2> | iobm/ES<1> | iobm/Er | iobm/Er2 | iobm/ES<3> | iobm/ES<4>
-INPUTMC | 7 | 5 | 5 | 5 | 12 | 5 | 4 | 1 | 11 | 1 | 10 | 5 | 3 | 5 | 7
+INPUTMC | 7 | 5 | 6 | 5 | 12 | 5 | 5 | 0 | 7 | 0 | 6 | 5 | 4 | 5 | 7
EQ | 6 |
!iobm/ES<2>.D = !iobm/ES<0> & !iobm/ES<2>
# !iobm/ES<1> & !iobm/ES<2>
# !iobm/Er & iobm/Er2
# iobm/ES<0> & iobm/ES<1> & iobm/ES<2>
# !iobm/ES<2> & !iobm/ES<3> & iobm/ES<4>;
- iobm/ES<2>.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/ES<2>.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 5 | 3 | iobm/ES<3>
+MACROCELL | 5 | 4 | iobm/ES<3>
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
+OUTPUTMC | 6 | 5 | 1 | 5 | 6 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 0
INPUTS | 6 | iobm/ES<3> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2>
-INPUTMC | 6 | 5 | 3 | 1 | 11 | 1 | 10 | 5 | 5 | 5 | 4 | 5 | 12
+INPUTMC | 6 | 5 | 4 | 0 | 7 | 0 | 6 | 5 | 6 | 5 | 5 | 5 | 12
EQ | 4 |
iobm/ES<3>.T = iobm/ES<3> & !iobm/Er & iobm/Er2
# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & iobm/Er
# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & !iobm/Er2;
- iobm/ES<3>.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/ES<3>.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
MACROCELL | 5 | 7 | iobm/ES<4>
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 5 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 7 | 5 | 0
+OUTPUTMC | 5 | 5 | 1 | 5 | 6 | 5 | 12 | 5 | 7 | 5 | 0
INPUTS | 7 | iobm/ES<4> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3>
-INPUTMC | 7 | 5 | 7 | 1 | 11 | 1 | 10 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3
+INPUTMC | 7 | 5 | 7 | 0 | 7 | 0 | 6 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4
EQ | 8 |
iobm/ES<4>.T = iobm/ES<4> & !iobm/Er & iobm/Er2
# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> &
@@ -1150,576 +1175,508 @@ EQ | 8 |
iobm/ES<3> & !iobm/Er2
# iobm/ES<0> & iobm/ES<1> & !iobm/ES<2> &
!iobm/ES<3> & iobm/ES<4>;
- iobm/ES<4>.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/ES<4>.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 0 | 6 | cnt/RefCnt<1>
+MACROCELL | 7 | 0 | cnt/PORS_FSM_FFd1
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 10 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 9 | 3 | 11 | 3 | 8
-INPUTS | 1 | cnt/RefCnt<0>
-INPUTMC | 1 | 1 | 17
-EQ | 2 |
- cnt/RefCnt<1>.T = cnt/RefCnt<0>;
- cnt/RefCnt<1>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+OUTPUTMC | 6 | 3 | 1 | 7 | 14 | 7 | 0 | 3 | 6 | 3 | 0 | 7 | 17
+INPUTS | 11 | cnt/LTimer<13> | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2 | cnt/IPL2r | A_FSB<14> | A_FSB<13> | A_FSB<23> | A_FSB<21> | iobs/Once | A_FSB<22> | cs/nOverlay1
+INPUTMC | 6 | 6 | 0 | 7 | 0 | 3 | 6 | 0 | 12 | 7 | 16 | 4 | 3
+INPUTP | 5 | 19 | 18 | 36 | 29 | 30
+EXPORTS | 1 | 7 | 17
+EQ | 7 |
+ cnt/PORS_FSM_FFd1.T = cnt/LTimer<13> & !cnt/PORS_FSM_FFd1 &
+ cnt/PORS_FSM_FFd2 & !cnt/IPL2r;
+ !cnt/PORS_FSM_FFd1.CLK = C8M; // GCK
+ cnt/PORS_FSM_FFd1.EXP = !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
+ !iobs/Once
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ cs/nOverlay1 & !iobs/Once
+GLOBALS | 1 | 2 | C8M
-MACROCELL | 3 | 9 | cnt/RefCnt<3>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 8 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 8
-INPUTS | 3 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<2>
-INPUTMC | 3 | 1 | 17 | 0 | 6 | 3 | 11
-EQ | 2 |
- cnt/RefCnt<3>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2>;
- cnt/RefCnt<3>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 6 | iobs/IOACTr
+MACROCELL | 1 | 12 | iobs/IOACTr
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 7 | 15 | 3 | 16 | 7 | 3 | 3 | 12 | 7 | 8
+OUTPUTMC | 5 | 2 | 5 | 7 | 11 | 7 | 6 | 1 | 15 | 7 | 13
INPUTS | 1 | iobm/IOACT
INPUTMC | 1 | 5 | 15
EQ | 2 |
iobs/IOACTr.D = iobm/IOACT;
- iobs/IOACTr.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/IOACTr.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 11 | cnt/RefCnt<2>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 9 | 3 | 8
-INPUTS | 2 | cnt/RefCnt<0> | cnt/RefCnt<1>
-INPUTMC | 2 | 1 | 17 | 0 | 6
-EQ | 2 |
- cnt/RefCnt<2>.T = cnt/RefCnt<0> & cnt/RefCnt<1>;
- cnt/RefCnt<2>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 3 | 8 | cnt/RefCnt<4>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 3 | 13 | 3 | 15 | 6 | 12 | 6 | 6 | 3 | 7 | 3 | 6 | 3 | 3
-INPUTS | 4 | cnt/RefCnt<0> | cnt/RefCnt<1> | cnt/RefCnt<3> | cnt/RefCnt<2>
-INPUTMC | 4 | 1 | 17 | 0 | 6 | 3 | 9 | 3 | 11
-EQ | 3 |
- cnt/RefCnt<4>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<3> &
- cnt/RefCnt<2>;
- cnt/RefCnt<4>.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 4 | 12 | iobs/Load1
+MACROCELL | 3 | 6 | cnt/PORS_FSM_FFd2
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 0 | 14 | 0 | 13 | 5 | 13
-INPUTS | 11 | nADoutLE1 | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | RA_5_OBUF.EXP | RA_2_OBUF.EXP
-INPUTMC | 8 | 5 | 13 | 4 | 6 | 7 | 3 | 3 | 12 | 0 | 5 | 0 | 17 | 4 | 11 | 4 | 13
-INPUTP | 3 | 54 | 36 | 30
-IMPORTS | 2 | 4 | 11 | 4 | 13
-EQ | 19 |
+OUTPUTMC | 5 | 3 | 1 | 7 | 14 | 7 | 0 | 3 | 6 | 3 | 0
+INPUTS | 3 | cnt/LTimer<13> | cnt/PORS_FSM_FFd2 | cnt/PORS_FSM_FFd1
+INPUTMC | 3 | 6 | 0 | 3 | 6 | 7 | 0
+EQ | 3 |
+ cnt/PORS_FSM_FFd2.D = cnt/LTimer<13> & !cnt/PORS_FSM_FFd1
+ # !cnt/LTimer<13> & cnt/PORS_FSM_FFd2;
+ !cnt/PORS_FSM_FFd2.CLK = C8M; // GCK
+GLOBALS | 1 | 2 | C8M
+
+MACROCELL | 7 | 9 | iobs/Load1
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 3 | 1 | 17 | 1 | 16 | 5 | 13
+INPUTS | 10 | nADoutLE1 | iobs/Once | A_FSB<23> | A_FSB<20> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | EXP24_.EXP | EXP25_.EXP
+INPUTMC | 7 | 5 | 13 | 7 | 16 | 7 | 6 | 1 | 15 | 1 | 14 | 7 | 8 | 7 | 10
+INPUTP | 3 | 36 | 28 | 54
+IMPORTS | 2 | 7 | 8 | 7 | 10
+EQ | 18 |
!iobs/Load1.D = iobs/Once
# !nADoutLE1
+ # !A_FSB<23> & !A_FSB<20>
# nAS_FSB & !fsb/ASrf
# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
- # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-;Imported pterms FB5_12
+;Imported pterms FB8_9
# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20>
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
+ # !A_FSB<23> & A_FSB<21> & nWE_FSB
+;Imported pterms FB8_11
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<18>
# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-;Imported pterms FB5_14
- # !A_FSB<23> & A_FSB<21> & !A_FSB<18>
- # !A_FSB<23> & A_FSB<21> & nWE_FSB
- # !A_FSB<23> & !A_FSB<20> & SW<1>
# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
cs/nOverlay1;
- iobs/Load1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/Load1.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 0 | 1 | ram/BACTr
+MACROCELL | 1 | 11 | ram/BACTr
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 4 | 17 | 6 | 9 | 6 | 17 | 6 | 14 | 4 | 0 | 4 | 16 | 6 | 0 | 6 | 8 | 6 | 13 | 6 | 15 | 6 | 16
+OUTPUTMC | 5 | 4 | 16 | 4 | 12 | 4 | 9 | 4 | 15 | 4 | 17
INPUTS | 2 | nAS_FSB | fsb/ASrf
-INPUTMC | 1 | 0 | 5
+INPUTMC | 1 | 1 | 14
INPUTP | 1 | 54
EQ | 2 |
!ram/BACTr.D = nAS_FSB & !fsb/ASrf;
- ram/BACTr.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ ram/BACTr.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 0 | 9 | RESr0
+MACROCELL | 1 | 9 | ram/RefReq
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 0 | 8 | 7 | 6 | 7 | 14
-INPUTS | 1 | nRES
-INPUTP | 1 | 145
+OUTPUTMC | 6 | 4 | 15 | 4 | 12 | 4 | 9 | 4 | 1 | 4 | 14 | 4 | 17
+INPUTS | 2 | ram/RefDone | ram/RefReqSync
+INPUTMC | 2 | 4 | 2 | 1 | 8
EQ | 2 |
- RESr0.D = !nRES;
- RESr0.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 0 | 8 | RESr1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 0 | 7 | 7 | 6 | 7 | 14
-INPUTS | 1 | RESr0
-INPUTMC | 1 | 0 | 9
-EQ | 2 |
- RESr1.D = RESr0;
- RESr1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ ram/RefReq.D = !ram/RefDone & ram/RefReqSync;
+ ram/RefReq.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
MACROCELL | 5 | 17 | iobm/IOBERR
ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 4 | 7 | 15 | 3 | 16 | 5 | 17 | 5 | 0
-INPUTS | 12 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | CLK_IOB | nBERR_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/ETACK.EXP
-INPUTMC | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 0 | 0 | 4 | 1 | 16 | 1 | 13 | 1 | 12 | 5 | 0
+OUTPUTMC | 4 | 2 | 5 | 7 | 11 | 5 | 17 | 5 | 16
+INPUTS | 12 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | C8M | nBERR_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/nDinLE.EXP
+INPUTMC | 10 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 17 | 5 | 0 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 5 | 16
INPUTP | 2 | 35 | 123
-IMPORTS | 1 | 5 | 0
+IMPORTS | 1 | 5 | 16
EQ | 26 |
iobm/IOBERR.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 &
!iobm/IOS_FSM_FFd2 & iobm/IOBERR
- # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/ETACK
- # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/ETACK
- # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/BERRrf &
iobm/BERRrr
- # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/DTACKrf &
iobm/DTACKrr
-;Imported pterms FB6_1
- # CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 &
+;Imported pterms FB6_17
+ # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf &
iobm/RESrr
- # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf &
iobm/BERRrr
- # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf &
iobm/DTACKrr
- # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf &
iobm/RESrr;
- iobm/IOBERR.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/IOBERR.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 0 | 11 | IPL2r0
+MACROCELL | 0 | 5 | iobm/IOREQr
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 0 | 10 | 7 | 14
+OUTPUTMC | 3 | 0 | 17 | 5 | 15 | 5 | 3
+INPUTS | 1 | iobs/IOREQ
+INPUTMC | 1 | 7 | 13
+EQ | 2 |
+ iobm/IOREQr.D = iobs/IOREQ;
+ !iobm/IOREQr.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 1 | 8 | ram/RefReqSync
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 2 | 4 | 2 | 1 | 9
+INPUTS | 1 | cnt/RefReq
+INPUTMC | 1 | 3 | 14
+EQ | 2 |
+ ram/RefReqSync.D = cnt/RefReq;
+ ram/RefReqSync.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 0 | 12 | cnt/IPL2r
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 2 | 7 | 14 | 7 | 0
INPUTS | 1 | nIPL2
INPUTP | 1 | 146
EQ | 2 |
- IPL2r0.D = !nIPL2;
- IPL2r0.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ cnt/IPL2r.D = !nIPL2;
+ !cnt/IPL2r.CLK = C8M; // GCK
+GLOBALS | 1 | 2 | C8M
-MACROCELL | 0 | 7 | RESr2
+MACROCELL | 3 | 0 | cnt/nRESout
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 7 | 6 | 7 | 14
-INPUTS | 1 | RESr1
-INPUTMC | 1 | 0 | 8
-EQ | 2 |
- RESr2.D = RESr1;
- RESr2.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 15 | iobm/BGr0
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 1 | 14 | 3 | 1
-INPUTS | 1 | nBG_IOB
-INPUTP | 1 | 117
-EQ | 2 |
- iobm/BGr0.D = !nBG_IOB;
- iobm/BGr0.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+OUTPUTMC | 2 | 3 | 0 | 3 | 7
+INPUTS | 4 | cnt/LTimer<13> | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2 | cnt/nRESout
+INPUTMC | 4 | 6 | 0 | 7 | 0 | 3 | 6 | 3 | 0
+EQ | 5 |
+ cnt/nRESout.D = cnt/LTimer<13> & cnt/PORS_FSM_FFd1 &
+ !cnt/PORS_FSM_FFd2
+ # cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2 &
+ cnt/nRESout;
+ !cnt/nRESout.CLK = C8M; // GCK
+GLOBALS | 1 | 2 | C8M
MACROCELL | 5 | 0 | iobm/ETACK
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 3 | 5 | 9 | 5 | 17 | 5 | 15
-INPUTS | 18 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | CLK_IOB | nBERR_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | iobm/RESrf | iobm/RESrr | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr
-INPUTMC | 16 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 0 | 3 | 0 | 2 | 0 | 4 | 1 | 16 | 1 | 13 | 1 | 12
-INPUTP | 2 | 35 | 123
-EXPORTS | 1 | 5 | 17
-EQ | 15 |
+INPUTS | 6 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4>
+INPUTMC | 6 | 5 | 1 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7
+EQ | 3 |
iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> &
!iobm/ES<3> & iobm/ES<4>;
- iobm/ETACK.CLK = CLK2X_IOB; // GCK
- iobm/ETACK.EXP = CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 &
- iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf &
- iobm/RESrr
- # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
- iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf &
- iobm/BERRrr
- # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
- iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf &
- iobm/DTACKrr
- # CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
- iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf &
- iobm/RESrr
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/ETACK.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 11 | iobm/Er
+MACROCELL | 0 | 7 | iobm/Er
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 1 | 10
-INPUTS | 1 | E_IOB
+OUTPUTMC | 6 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 0 | 6
+INPUTS | 1 | E
INPUTP | 1 | 37
EQ | 2 |
- iobm/Er.D = E_IOB;
- !iobm/Er.CLK = CLK_IOB; // GCK
-GLOBALS | 1 | 2 | CLK_IOB
+ iobm/Er.D = E;
+ !iobm/Er.CLK = C8M; // GCK
+GLOBALS | 1 | 2 | C8M
MACROCELL | 5 | 15 | iobm/IOACT
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 5 | 1 | 1 | 6
-INPUTS | 11 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr | nAoutOE | CLK_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | nADoutLE0_OBUF.EXP | iobm/nDinLE.EXP
-INPUTMC | 10 | 0 | 15 | 5 | 9 | 5 | 2 | 1 | 9 | 3 | 1 | 5 | 0 | 0 | 4 | 1 | 16 | 5 | 14 | 5 | 16
+OUTPUTMC | 2 | 5 | 1 | 1 | 12
+INPUTS | 11 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr | C8M | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | nADoutLE0_OBUF.EXP
+INPUTMC | 10 | 0 | 13 | 5 | 9 | 0 | 17 | 0 | 5 | 5 | 0 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8 | 5 | 14
INPUTP | 1 | 35
-IMPORTS | 2 | 5 | 14 | 5 | 16
-EQ | 15 |
+IMPORTS | 1 | 5 | 14
+EQ | 13 |
!iobm/IOACT.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2
# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 &
!iobm/IOREQr
- # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & nAoutOE
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
iobm/ETACK
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
iobm/BERRrf & iobm/BERRrr
-;Imported pterms FB6_15
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
iobm/DTACKrf & iobm/DTACKrr
-;Imported pterms FB6_17
- # CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+;Imported pterms FB6_15
+ # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
iobm/RESrf & iobm/RESrr;
- iobm/IOACT.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/IOACT.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 9 | iobm/IOREQr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 2 | 5 | 15 | 5 | 6
-INPUTS | 1 | iobs/IOREQ
-INPUTMC | 1 | 7 | 8
-EQ | 2 |
- iobm/IOREQr.D = iobs/IOREQ;
- !iobm/IOREQr.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 0 | 0 | ram/RefRAS
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 3 | 13 | 7 | 5
-INPUTS | 2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2
-INPUTMC | 2 | 3 | 17 | 6 | 9
-EQ | 2 |
- ram/RefRAS.D = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2;
- ram/RefRAS.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 6 | RESDone
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 2 | 7 | 14 | 7 | 7
-INPUTS | 8 | RESr0 | RESr1 | RESr2 | nWE_FSB | nUDS_FSB | ram/RAMDIS2 | nAS_FSB | ram/RAMDIS1
-INPUTMC | 5 | 0 | 9 | 0 | 8 | 0 | 7 | 4 | 2 | 6 | 17
-INPUTP | 3 | 47 | 56 | 54
-EXPORTS | 1 | 7 | 7
+MACROCELL | 3 | 14 | cnt/RefReq
+ATTRIBUTES | 8520480 | 0
+OUTPUTMC | 1 | 1 | 8
+INPUTS | 5 | cnt/Timer<1> | cnt/Timer<3> | cnt/Timer<2> | cnt/Timer<0> | E
+INPUTMC | 4 | 3 | 12 | 3 | 9 | 3 | 11 | 3 | 3
+INPUTP | 1 | 37
EQ | 5 |
- RESDone.D = Vcc;
- RESDone.CLK = CLK_FSB; // GCK
- RESDone.CE = !RESr0 & !RESr1 & RESr2;
- RESDone.EXP = !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB &
- !ram/RAMDIS1
-GLOBALS | 1 | 2 | CLK_FSB
+ cnt/RefReq.D = cnt/Timer<1> & !cnt/Timer<3>
+ # cnt/Timer<2> & !cnt/Timer<3>
+ # !cnt/Timer<1> & !cnt/Timer<2> & !cnt/Timer<0> &
+ cnt/Timer<3>;
+ cnt/RefReq.CLK = E;
-MACROCELL | 0 | 10 | IPL2r1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 7 | 14
-INPUTS | 1 | IPL2r0
-INPUTMC | 1 | 0 | 11
-EQ | 2 |
- IPL2r1.D = IPL2r0;
- IPL2r1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+MACROCELL | 3 | 13 | cnt/RefUrgent
+ATTRIBUTES | 8520480 | 0
+OUTPUTMC | 1 | 1 | 6
+INPUTS | 5 | cnt/Timer<1> | cnt/Timer<2> | cnt/Timer<3> | cnt/Timer<0> | E
+INPUTMC | 4 | 3 | 12 | 3 | 11 | 3 | 9 | 3 | 3
+INPUTP | 1 | 37
+EQ | 4 |
+ cnt/RefUrgent.D = cnt/Timer<1> & cnt/Timer<2> & !cnt/Timer<3>
+ # !cnt/Timer<1> & !cnt/Timer<2> & !cnt/Timer<0> &
+ cnt/Timer<3>;
+ cnt/RefUrgent.CLK = E;
-MACROCELL | 0 | 5 | fsb/ASrf
+MACROCELL | 1 | 14 | fsb/ASrf
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 41 | 4 | 9 | 4 | 6 | 0 | 17 | 7 | 15 | 7 | 0 | 2 | 12 | 3 | 15 | 6 | 12 | 6 | 6 | 2 | 11 | 0 | 16 | 0 | 12 | 2 | 14 | 2 | 4 | 7 | 12 | 3 | 16 | 4 | 2 | 2 | 5 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 7 | 3 | 4 | 12 | 0 | 1 | 7 | 8 | 6 | 17 | 6 | 14 | 3 | 0 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 2 | 6 | 4 | 6 | 8 | 6 | 10 | 6 | 13 | 6 | 15 | 6 | 16
+OUTPUTMC | 31 | 4 | 3 | 7 | 16 | 2 | 14 | 4 | 7 | 2 | 4 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 6 | 2 | 5 | 7 | 11 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 6 | 7 | 1 | 4 | 9 | 7 | 9 | 1 | 11 | 7 | 13 | 4 | 16 | 2 | 0 | 2 | 2 | 2 | 13 | 2 | 15 | 2 | 16 | 2 | 17 | 4 | 1 | 4 | 5 | 4 | 8 | 4 | 11
INPUTS | 1 | nAS_FSB
INPUTP | 1 | 54
EQ | 2 |
fsb/ASrf.D = !nAS_FSB;
- !fsb/ASrf.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ !fsb/ASrf.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 5 | 6 | iobm/ALE0
+MACROCELL | 5 | 3 | iobm/ALE0
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 1 | 5 | 14
-INPUTS | 5 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOREQr | nAoutOE
-INPUTMC | 5 | 5 | 9 | 5 | 2 | 0 | 15 | 1 | 9 | 3 | 1
+INPUTS | 4 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr
+INPUTMC | 4 | 0 | 13 | 5 | 9 | 0 | 17 | 0 | 5
EQ | 4 |
- iobm/ALE0.D = iobm/IOS_FSM_FFd2
- # iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1
- # !iobm/IOS_FSM_FFd1 & iobm/IOREQr & !nAoutOE;
- iobm/ALE0.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !iobm/ALE0.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2
+ # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 &
+ !iobm/IOREQr;
+ iobm/ALE0.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 0 | 4 | iobm/BERRrf
+MACROCELL | 0 | 11 | iobm/BERRrf
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 0
+OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
INPUTS | 1 | nBERR_IOB
INPUTP | 1 | 123
EQ | 2 |
iobm/BERRrf.D = !nBERR_IOB;
- !iobm/BERRrf.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !iobm/BERRrf.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 16 | iobm/BERRrr
+MACROCELL | 0 | 10 | iobm/BERRrr
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 0
+OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
INPUTS | 1 | nBERR_IOB
INPUTP | 1 | 123
EQ | 2 |
iobm/BERRrr.D = !nBERR_IOB;
- iobm/BERRrr.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/BERRrr.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 14 | iobm/BGr1
+MACROCELL | 0 | 9 | iobm/DTACKrf
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 3 | 1
-INPUTS | 1 | iobm/BGr0
-INPUTMC | 1 | 1 | 15
-EQ | 2 |
- iobm/BGr1.D = iobm/BGr0;
- iobm/BGr1.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 13 | iobm/DTACKrf
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 14 | 5 | 0
+OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
INPUTS | 1 | nDTACK_IOB
INPUTP | 1 | 127
EQ | 2 |
iobm/DTACKrf.D = !nDTACK_IOB;
- !iobm/DTACKrf.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !iobm/DTACKrf.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 12 | iobm/DTACKrr
+MACROCELL | 0 | 8 | iobm/DTACKrr
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 14 | 5 | 0
+OUTPUTMC | 4 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 16
INPUTS | 1 | nDTACK_IOB
INPUTP | 1 | 127
EQ | 2 |
iobm/DTACKrr.D = !nDTACK_IOB;
- iobm/DTACKrr.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/DTACKrr.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 10 | iobm/Er2
+MACROCELL | 5 | 2 | iobm/DoutOE
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7
+OUTPUTMC | 1 | 3 | 4
+INPUTS | 3 | iobs/IORW0 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3
+INPUTMC | 3 | 2 | 14 | 5 | 9 | 0 | 17
+EQ | 3 |
+ iobm/DoutOE.D = iobs/IORW0 & iobm/IOS_FSM_FFd3
+ # iobs/IORW0 & iobm/IOS_FSM_FFd2;
+ iobm/DoutOE.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 0 | 6 | iobm/Er2
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 5 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7
INPUTS | 1 | iobm/Er
-INPUTMC | 1 | 1 | 11
+INPUTMC | 1 | 0 | 7
EQ | 2 |
iobm/Er2.D = iobm/Er;
- iobm/Er2.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/Er2.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 0 | 3 | iobm/RESrf
+MACROCELL | 0 | 4 | iobm/RESrf
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 0
-INPUTS | 1 | nRES
+OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 14
+INPUTS | 1 | nRES.PIN
INPUTP | 1 | 145
EQ | 2 |
- iobm/RESrf.D = !nRES;
- !iobm/RESrf.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/RESrf.D = !nRES.PIN;
+ !iobm/RESrf.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 0 | 2 | iobm/RESrr
+MACROCELL | 0 | 3 | iobm/RESrr
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 0
-INPUTS | 1 | nRES
+OUTPUTMC | 3 | 5 | 9 | 5 | 16 | 5 | 14
+INPUTS | 1 | nRES.PIN
INPUTP | 1 | 145
EQ | 2 |
- iobm/RESrr.D = !nRES;
- iobm/RESrr.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/RESrr.D = !nRES.PIN;
+ iobm/RESrr.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 8 | iobm/VPArf
+MACROCELL | 0 | 2 | iobm/VPArf
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 1 | 5 | 1
INPUTS | 1 | nVPA_IOB
INPUTP | 1 | 125
EQ | 2 |
iobm/VPArf.D = !nVPA_IOB;
- !iobm/VPArf.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !iobm/VPArf.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 1 | 7 | iobm/VPArr
+MACROCELL | 0 | 1 | iobm/VPArr
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 1 | 5 | 1
INPUTS | 1 | nVPA_IOB
INPUTP | 1 | 125
EQ | 2 |
iobm/VPArr.D = !nVPA_IOB;
- iobm/VPArr.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ iobm/VPArr.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
-MACROCELL | 3 | 2 | iobs/ALE0
+MACROCELL | 0 | 0 | iobm/nASr
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 1 | 0 | 14
+INPUTS | 2 | nAS_IOB | nAoutOE
+INPUTMC | 2 | 5 | 11 | 3 | 1
+EQ | 2 |
+ !iobm/nASr.D = !nAS_IOB & nAoutOE;
+ iobm/nASr.CLK = C16M; // GCK
+GLOBALS | 1 | 2 | C16M
+
+MACROCELL | 1 | 13 | iobs/ALE0
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 1 | 5 | 14
INPUTS | 2 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1
-INPUTMC | 2 | 7 | 3 | 3 | 12
+INPUTMC | 2 | 7 | 6 | 1 | 15
EQ | 2 |
iobs/ALE0.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
- iobs/ALE0.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/ALE0.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 3 | 0 | iobs/Clear1
+MACROCELL | 2 | 4 | iobs/Clear1
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 5 | 13 | 3 | 17
-INPUTS | 16 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cnt/RefDone | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf
-INPUTMC | 12 | 7 | 3 | 3 | 12 | 5 | 13 | 3 | 13 | 4 | 9 | 0 | 17 | 3 | 17 | 6 | 9 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5
-INPUTP | 4 | 36 | 30 | 29 | 54
-EXPORTS | 1 | 3 | 17
-EQ | 8 |
+OUTPUTMC | 2 | 5 | 13 | 2 | 5
+INPUTS | 5 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | nAS_FSB | fsb/ASrf
+INPUTMC | 4 | 7 | 6 | 1 | 15 | 5 | 13 | 1 | 14
+INPUTP | 1 | 54
+EXPORTS | 1 | 2 | 5
+EQ | 3 |
iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1;
- iobs/Clear1.CLK = CLK_FSB; // GCK
- iobs/Clear1.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/Clear1.CLK = FCLK; // GCK
+ iobs/Clear1.EXP = nAS_FSB & !fsb/ASrf
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 7 | 8 | iobs/IOREQ
+MACROCELL | 7 | 13 | iobs/IOREQ
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 1 | 9
-INPUTS | 12 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nRAMUWE_OBUF.EXP | EXP34_.EXP
-INPUTMC | 9 | 7 | 3 | 3 | 12 | 1 | 6 | 4 | 6 | 5 | 13 | 0 | 5 | 0 | 17 | 7 | 7 | 7 | 9
-INPUTP | 3 | 54 | 36 | 30
-IMPORTS | 2 | 7 | 7 | 7 | 9
-EQ | 30 |
+OUTPUTMC | 1 | 0 | 5
+INPUTS | 11 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/Once | nADoutLE1 | A_FSB<23> | A_FSB<20> | nAS_FSB | fsb/ASrf | EXP26_.EXP | cnt/nBR_IOB.EXP
+INPUTMC | 8 | 7 | 6 | 1 | 15 | 1 | 12 | 7 | 16 | 5 | 13 | 1 | 14 | 7 | 12 | 7 | 14
+INPUTP | 3 | 36 | 28 | 54
+IMPORTS | 2 | 7 | 12 | 7 | 14
+EQ | 29 |
!iobs/IOREQ.D = !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1
# iobs/PS_FSM_FFd1 & iobs/IOACTr
# iobs/Once & !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 &
+ nADoutLE1
# nAS_FSB & !iobs/PS_FSM_FFd2 & !fsb/ASrf &
nADoutLE1
- # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
- !iobs/PS_FSM_FFd2 & nADoutLE1
-;Imported pterms FB8_8
+;Imported pterms FB8_13
# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> &
!iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20> &
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
!iobs/PS_FSM_FFd2 & nADoutLE1
# !A_FSB<23> & A_FSB<21> & !A_FSB<19> &
!iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
# !A_FSB<23> & A_FSB<21> & !A_FSB<16> &
!iobs/PS_FSM_FFd2 & nADoutLE1
-;Imported pterms FB8_10
- # !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
# !A_FSB<23> & A_FSB<21> & nWE_FSB &
!iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 &
- SW<1> & nADoutLE1
+;Imported pterms FB8_12
# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
!iobs/PS_FSM_FFd2 & nADoutLE1
+;Imported pterms FB8_15
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1;
- iobs/IOREQ.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+ iobs/IOREQ.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 6 | 17 | ram/RAMDIS1
+MACROCELL | 4 | 16 | ram/RAMReady
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 7 | 6 | 7 | 5
-INPUTS | 13 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd2 | A_FSB<23> | cnt/RefDone | nAS_FSB | ram/BACTr | fsb/ASrf | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | EXP28_.EXP | EXP31_.EXP
-INPUTMC | 11 | 3 | 17 | 6 | 3 | 6 | 9 | 3 | 13 | 0 | 1 | 0 | 5 | 3 | 7 | 3 | 6 | 3 | 3 | 6 | 0 | 6 | 16
-INPUTP | 2 | 36 | 54
-IMPORTS | 2 | 6 | 0 | 6 | 16
-EQ | 40 |
- ram/RAMDIS1.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
- # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2
- # A_FSB<23> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr
- # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf
- # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB7_1
- # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf
- # !cnt/RefDone & ram/Once & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> &
- !fsb/ASrf
-;Imported pterms FB7_2
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
-;Imported pterms FB7_17
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr;
- ram/RAMDIS1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+OUTPUTMC | 5 | 2 | 5 | 2 | 1 | 2 | 7 | 2 | 0 | 4 | 17
+INPUTS | 13 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | nAS_FSB | fsb/ASrf | A_FSB<23> | ram/BACTr | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | ram/RAMEN | EXP22_.EXP
+INPUTMC | 9 | 4 | 6 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 14 | 1 | 11 | 4 | 3 | 4 | 9 | 4 | 15
+INPUTP | 4 | 54 | 36 | 30 | 29
+EXPORTS | 1 | 4 | 17
+IMPORTS | 1 | 4 | 15
+EQ | 34 |
+ ram/RAMReady.D = ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3
+ # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & ram/BACTr
+ # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !fsb/ASrf
+;Imported pterms FB5_16
+ # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+;Imported pterms FB5_15
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd2 & !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RAMEN;
+ ram/RAMReady.CLK = FCLK; // GCK
+ ram/RAMReady.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
+ !ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN &
+ fsb/ASrf
+GLOBALS | 1 | 2 | FCLK
-MACROCELL | 6 | 14 | ram/RAMReady
+MACROCELL | 1 | 10 | ram/RefRAS
ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 2 | 3 | 2 | 6 | 2 | 1 | 2 | 9
-INPUTS | 13 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd2 | cnt/RefDone | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<23> | nAS_FSB | ram/RS_FSM_FFd1 | ram/BACTr | fsb/ASrf | CLK20EN_OBUF$BUF0.EXP | EXP30_.EXP
-INPUTMC | 11 | 6 | 3 | 6 | 9 | 3 | 13 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 17 | 0 | 1 | 0 | 5 | 6 | 13 | 6 | 15
-INPUTP | 2 | 36 | 54
-IMPORTS | 2 | 6 | 13 | 6 | 15
-EQ | 31 |
- !ram/RAMReady.D = ram/RS_FSM_FFd2
- # ram/RS_FSM_FFd3
- # !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # A_FSB<23> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/BACTr
- # A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 &
- !ram/BACTr & fsb/ASrf
-;Imported pterms FB7_14
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & fsb/ASrf
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/BACTr
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB7_16
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf;
- ram/RAMReady.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
+OUTPUTMC | 1 | 7 | 4
+INPUTS | 2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2
+INPUTMC | 2 | 4 | 6 | 4 | 12
+EQ | 2 |
+ ram/RefRAS.D = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2;
+ ram/RefRAS.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 1 | 6 | ram/RegUrgentSync
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 1 | 1 | 7
+INPUTS | 1 | cnt/RefUrgent
+INPUTMC | 1 | 3 | 13
+EQ | 2 |
+ ram/RegUrgentSync.D = cnt/RefUrgent;
+ ram/RegUrgentSync.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
MACROCELL | 6 | 5 | RA_0_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 3 | A_FSB<10> | ram/RASEL | A_FSB<1>
-INPUTMC | 1 | 4 | 17
+INPUTMC | 1 | 4 | 0
INPUTP | 2 | 13 | 149
EQ | 2 |
RA<0> = A_FSB<10> & !ram/RASEL
@@ -1727,45 +1684,30 @@ EQ | 2 |
MACROCELL | 6 | 1 | RA_1_OBUF
ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 0
-INPUTS | 11 | A_FSB<11> | ram/RASEL | A_FSB<2> | A_FSB<22> | cnt/RefDone | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7>
-INPUTMC | 8 | 4 | 17 | 3 | 13 | 0 | 17 | 3 | 17 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3
-INPUTP | 3 | 15 | 153 | 30
-EXPORTS | 1 | 6 | 0
-EQ | 8 |
+INPUTS | 3 | A_FSB<11> | ram/RASEL | A_FSB<2>
+INPUTMC | 1 | 4 | 0
+INPUTP | 2 | 15 | 153
+EQ | 2 |
RA<1> = A_FSB<11> & !ram/RASEL
# ram/RASEL & A_FSB<2>;
- RA_1_OBUF.EXP = A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
MACROCELL | 4 | 13 | RA_2_OBUF
ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 4 | 12
-INPUTS | 11 | A_FSB<23> | A_FSB<21> | A_FSB<18> | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 | RA_6_OBUF.EXP
-INPUTMC | 2 | 0 | 17 | 4 | 14
-INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30
-EXPORTS | 1 | 4 | 12
-IMPORTS | 1 | 4 | 14
-EQ | 9 |
- RA<2> = ;Imported pterms FB5_15
- A_FSB<12> & !ram/RASEL
+OUTPUTMC | 1 | 4 | 14
+INPUTS | 4 | A_FSB<12> | ram/RASEL | A_FSB<3> | A_FSB<7>
+INPUTMC | 1 | 4 | 0
+INPUTP | 3 | 17 | 155 | 8
+EXPORTS | 1 | 4 | 14
+EQ | 3 |
+ RA<2> = A_FSB<12> & !ram/RASEL
# ram/RASEL & A_FSB<3>;
- RA_2_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18>
- # !A_FSB<23> & A_FSB<21> & nWE_FSB
- # !A_FSB<23> & !A_FSB<20> & SW<1>
- # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- cs/nOverlay1
+ RA_2_OBUF.EXP = ram/RASEL & A_FSB<7>
MACROCELL | 4 | 10 | RA_3_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 4 | 11
INPUTS | 5 | A_FSB<13> | ram/RASEL | A_FSB<4> | A_FSB<15> | A_FSB<6>
-INPUTMC | 1 | 4 | 17
+INPUTMC | 1 | 4 | 0
INPUTP | 4 | 18 | 157 | 21 | 6
EXPORTS | 1 | 4 | 11
EQ | 4 |
@@ -1776,97 +1718,39 @@ EQ | 4 |
MACROCELL | 4 | 8 | RA_4_OBUF
ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 4 | 7
-INPUTS | 11 | A_FSB<14> | ram/RASEL | A_FSB<5> | A_FSB<23> | A_FSB<20> | iobs/Once | SW<1> | A_FSB<13> | A_FSB<21> | A_FSB<22> | cs/nOverlay1
-INPUTMC | 3 | 4 | 17 | 4 | 6 | 0 | 17
-INPUTP | 8 | 19 | 4 | 36 | 28 | 97 | 18 | 29 | 30
-EXPORTS | 1 | 4 | 7
-EQ | 7 |
+OUTPUTMC | 1 | 4 | 9
+INPUTS | 11 | A_FSB<14> | ram/RASEL | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RAMEN | fsb/ASrf | A_FSB<21> | cs/nOverlay0.EXP
+INPUTMC | 6 | 4 | 0 | 4 | 3 | 4 | 6 | 4 | 9 | 1 | 14 | 4 | 7
+INPUTP | 5 | 19 | 36 | 30 | 54 | 29
+EXPORTS | 1 | 4 | 9
+IMPORTS | 1 | 4 | 7
+EQ | 11 |
RA<4> = A_FSB<14> & !ram/RASEL
+;Imported pterms FB5_8
# ram/RASEL & A_FSB<5>;
- RA_4_OBUF.EXP = !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1>
- # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
- !iobs/Once
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once &
- cs/nOverlay1
+ RA_4_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
+ !ram/RS_FSM_FFd1 & ram/RAMEN
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf
MACROCELL | 4 | 11 | RA_5_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 4 | 12
-INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> | RA_3_OBUF.EXP
-INPUTMC | 1 | 4 | 10
-INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22
+INPUTS | 10 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21> | RA_3_OBUF.EXP
+INPUTMC | 6 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 14 | 4 | 3 | 4 | 10
+INPUTP | 4 | 54 | 36 | 30 | 29
EXPORTS | 1 | 4 | 12
IMPORTS | 1 | 4 | 10
-EQ | 8 |
+EQ | 13 |
RA<5> = ;Imported pterms FB5_11
A_FSB<15> & !ram/RASEL
# ram/RASEL & A_FSB<6>;
- RA_5_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<19>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-
-MACROCELL | 4 | 14 | RA_6_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 4 | 13
-INPUTS | 5 | A_FSB<16> | ram/RASEL | A_FSB<7> | A_FSB<12> | A_FSB<3>
-INPUTMC | 1 | 4 | 17
-INPUTP | 4 | 22 | 8 | 17 | 155
-EXPORTS | 1 | 4 | 13
-EQ | 4 |
- RA<6> = A_FSB<16> & !ram/RASEL
- # ram/RASEL & A_FSB<7>;
- RA_6_OBUF.EXP = A_FSB<12> & !ram/RASEL
- # ram/RASEL & A_FSB<3>
-
-MACROCELL | 6 | 4 | RA_7_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 3
-INPUTS | 14 | A_FSB<17> | ram/RASEL | A_FSB<8> | A_FSB<23> | A_FSB<22> | A_FSB<21> | cnt/RefDone | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf
-INPUTMC | 9 | 4 | 17 | 3 | 13 | 0 | 17 | 3 | 17 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5
-INPUTP | 5 | 23 | 11 | 36 | 30 | 29
-EXPORTS | 1 | 6 | 3
-EQ | 5 |
- RA<7> = A_FSB<8> & ram/RASEL
- # A_FSB<17> & !ram/RASEL;
- RA_7_OBUF.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-
-MACROCELL | 6 | 7 | RA_8_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 7 | A_FSB<23> | A_FSB<18> | ram/RASEL | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | cnt/TimeoutBPre.EXP
-INPUTMC | 3 | 4 | 17 | 0 | 17 | 6 | 6
-INPUTP | 4 | 36 | 24 | 30 | 29
-IMPORTS | 1 | 6 | 6
-EQ | 10 |
- RA<8> = A_FSB<23> & A_FSB<18>
- # A_FSB<18> & !ram/RASEL
- # A_FSB<22> & !A_FSB<21> & A_FSB<18>
- # A_FSB<22> & A_FSB<18> & cs/nOverlay1
- # !A_FSB<22> & A_FSB<18> & !cs/nOverlay1
-;Imported pterms FB7_7
- # A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- ram/RASEL
- # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- !cs/nOverlay1 & ram/RASEL;
-
-MACROCELL | 6 | 10 | RA_9_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 9
-INPUTS | 10 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<6> | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21> | CLK25EN_OBUF.EXP
-INPUTMC | 6 | 6 | 9 | 6 | 3 | 3 | 6 | 0 | 5 | 0 | 17 | 6 | 11
-INPUTP | 4 | 54 | 36 | 30 | 29
-EXPORTS | 1 | 6 | 9
-IMPORTS | 1 | 6 | 11
-EQ | 13 |
- RA<9> = ;Imported pterms FB7_12
- A_FSB<20> & ram/RASEL
- # A_FSB<19> & !ram/RASEL;
- RA_9_OBUF.EXP = nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<6> & !fsb/ASrf
+ RA_5_OBUF.EXP = nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !fsb/ASrf
# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
@@ -1876,1012 +1760,733 @@ EQ | 13 |
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf
-MACROCELL | 7 | 11 | nBERR_FSB_OBUF
+MACROCELL | 4 | 14 | RA_6_OBUF
ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 12
-INPUTS | 14 | nAS_FSB | iobs/BERR | cnt/TimeoutB | fsb/BERR0r | fsb/BERR1r | A_FSB<23> | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<21> | A_FSB<22> | cs/nOverlay1 | EXP35_.EXP
-INPUTMC | 6 | 7 | 15 | 6 | 12 | 2 | 11 | 0 | 16 | 0 | 17 | 7 | 10
-INPUTP | 8 | 54 | 36 | 28 | 97 | 19 | 18 | 29 | 30
-EXPORTS | 1 | 7 | 12
-IMPORTS | 1 | 7 | 10
-EQ | 10 |
- nBERR_FSB = nAS_FSB
- # !iobs/BERR & !cnt/TimeoutB & !fsb/BERR0r &
- !fsb/BERR1r
-;Imported pterms FB8_11
- # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> &
- !iobs/BERR & !fsb/BERR0r & !fsb/BERR1r;
- nBERR_FSB_OBUF.EXP = !A_FSB<23> & !A_FSB<20> & SW<1>
- # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+OUTPUTMC | 1 | 4 | 15
+INPUTS | 12 | A_FSB<16> | ram/RASEL | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/RefReq | A_FSB<23> | ram/RAMEN | A_FSB<21> | RA_2_OBUF.EXP
+INPUTMC | 8 | 4 | 0 | 4 | 3 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 9 | 4 | 9 | 4 | 13
+INPUTP | 4 | 22 | 30 | 36 | 29
+EXPORTS | 1 | 4 | 15
+IMPORTS | 1 | 4 | 13
+EQ | 12 |
+ RA<6> = A_FSB<16> & !ram/RASEL
+;Imported pterms FB5_14
+ # ram/RASEL & A_FSB<7>;
+ RA_6_OBUF.EXP = A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd2 & !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RAMEN
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- cs/nOverlay1
+ !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RAMEN
+
+MACROCELL | 6 | 4 | RA_7_OBUF
+ATTRIBUTES | 264962 | 0
+INPUTS | 3 | A_FSB<17> | ram/RASEL | A_FSB<8>
+INPUTMC | 1 | 4 | 0
+INPUTP | 2 | 23 | 11
+EQ | 2 |
+ RA<7> = A_FSB<8> & ram/RASEL
+ # A_FSB<17> & !ram/RASEL;
+
+MACROCELL | 6 | 7 | RA_8_OBUF
+ATTRIBUTES | 264962 | 0
+INPUTS | 8 | A_FSB<23> | A_FSB<18> | ram/RASEL | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | cnt/LTimer<7>.EXP | A_FSB_21_IBUF$BUF0.EXP
+INPUTMC | 4 | 4 | 0 | 4 | 3 | 6 | 6 | 6 | 8
+INPUTP | 4 | 36 | 24 | 30 | 29
+IMPORTS | 2 | 6 | 6 | 6 | 8
+EQ | 11 |
+ RA<8> = A_FSB<23> & A_FSB<18>
+ # A_FSB<18> & !ram/RASEL
+ # A_FSB<22> & !A_FSB<21> & A_FSB<18>
+ # A_FSB<22> & A_FSB<18> & cs/nOverlay1
+ # !A_FSB<22> & A_FSB<18> & !cs/nOverlay1
+;Imported pterms FB7_7
+ # A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ ram/RASEL
+;Imported pterms FB7_9
+ # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & ram/RASEL;
+
+MACROCELL | 6 | 10 | RA_9_OBUF
+ATTRIBUTES | 264962 | 0
+INPUTS | 3 | A_FSB<19> | ram/RASEL | A_FSB<20>
+INPUTMC | 1 | 4 | 0
+INPUTP | 2 | 26 | 28
+EQ | 2 |
+ RA<9> = A_FSB<20> & ram/RASEL
+ # A_FSB<19> & !ram/RASEL;
+
+MACROCELL | 3 | 4 | nDoutOE_OBUF
+ATTRIBUTES | 264962 | 0
+INPUTS | 2 | nAoutOE | iobm/DoutOE
+INPUTMC | 2 | 3 | 1 | 5 | 2
+EQ | 1 |
+ !nDoutOE = !nAoutOE & iobm/DoutOE;
MACROCELL | 4 | 5 | nOE_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 4 | 6
-INPUTS | 9 | A_FSB<23> | iobs/Once | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB<20> | ram/nCAS.EXP
-INPUTMC | 5 | 4 | 6 | 3 | 12 | 5 | 13 | 0 | 17 | 4 | 4
-INPUTP | 4 | 36 | 30 | 29 | 28
+INPUTS | 11 | nWE_FSB | nAS_FSB | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RAMEN | fsb/ASrf | A_FSB<21>
+INPUTMC | 6 | 4 | 3 | 4 | 6 | 4 | 12 | 1 | 7 | 4 | 9 | 1 | 14
+INPUTP | 5 | 47 | 54 | 36 | 30 | 29
EXPORTS | 1 | 4 | 6
-IMPORTS | 1 | 4 | 4
-EQ | 8 |
- !nOE = ;Imported pterms FB5_5
- nWE_FSB & !nAS_FSB;
- nOE_OBUF.EXP = A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
- # !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
- # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
- # !A_FSB<23> & !A_FSB<22> & !iobs/Once &
- !cs/nOverlay1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once
+EQ | 10 |
+ !nOE = nWE_FSB & !nAS_FSB;
+ nOE_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN &
+ fsb/ASrf
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
+ ram/RefUrgent & !ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
+ ram/RefUrgent & !ram/RAMEN & fsb/ASrf
MACROCELL | 2 | 16 | nROMWE_OBUF
ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 2 | 17
-INPUTS | 26 | nWE_FSB | nAS_FSB | A_FSB<14> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | fsb/Ready1r | fsb/VPA | iobs/IOReady | nADoutLE1 | $OpTx$FX_DC$591 | A_FSB<13> | A_FSB<9> | A_FSB<15> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | cnt/TimeoutA | fsb/Ready2r | A_FSB<8>
-INPUTMC | 8 | 0 | 17 | 2 | 14 | 2 | 0 | 3 | 16 | 5 | 13 | 0 | 12 | 3 | 15 | 2 | 15
-INPUTP | 18 | 47 | 54 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 18 | 12 | 21 | 17 | 15 | 13 | 36 | 11
-EXPORTS | 1 | 2 | 17
-EQ | 19 |
+OUTPUTMC | 1 | 2 | 15
+INPUTS | 18 | nWE_FSB | nAS_FSB | A_FSB<14> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | iobs/Once | iobs/IORW0 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | nADoutLE1 | A_FSB<13>
+INPUTMC | 7 | 4 | 3 | 7 | 16 | 2 | 14 | 7 | 6 | 1 | 15 | 1 | 14 | 5 | 13
+INPUTP | 11 | 47 | 54 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 18
+EXPORTS | 1 | 2 | 15
+EQ | 13 |
!nROMWE = !nWE_FSB & !nAS_FSB;
nROMWE_OBUF.EXP = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady &
- !nADoutLE1 & !$OpTx$FX_DC$591
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady &
- !nADoutLE1 & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
MACROCELL | 3 | 10 | nVPA_FSB_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | fsb/VPA | nAS_FSB
-INPUTMC | 1 | 2 | 0
+INPUTMC | 1 | 2 | 1
INPUTP | 1 | 54
EQ | 1 |
!nVPA_FSB = fsb/VPA & !nAS_FSB;
MACROCELL | 5 | 16 | iobm/nDinLE
ATTRIBUTES | 8684290 | 0
-OUTPUTMC | 1 | 5 | 15
-INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | CLK_IOB | iobm/IOS_FSM_FFd3 | iobm/RESrf | iobm/RESrr
-INPUTMC | 5 | 0 | 15 | 5 | 9 | 5 | 2 | 0 | 3 | 0 | 2
-INPUTP | 1 | 35
-EXPORTS | 1 | 5 | 15
-EQ | 4 |
+OUTPUTMC | 1 | 5 | 17
+INPUTS | 12 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | C8M | nBERR_IOB | iobm/IOS_FSM_FFd3 | iobm/IOBERR | iobm/RESrf | iobm/RESrr | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr
+INPUTMC | 10 | 0 | 13 | 5 | 9 | 0 | 17 | 5 | 17 | 0 | 4 | 0 | 3 | 0 | 11 | 0 | 10 | 0 | 9 | 0 | 8
+INPUTP | 2 | 35 | 123
+EXPORTS | 1 | 5 | 17
+EQ | 14 |
nDinLE.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2;
- !nDinLE.CLK = CLK2X_IOB; // GCK
- iobm/nDinLE.EXP = CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
- iobm/RESrf & iobm/RESrr
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 3 | 4 | iobm/nDoutOE
-ATTRIBUTES | 8684290 | 0
-INPUTS | 3 | iobs/IORW0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2
-INPUTMC | 3 | 7 | 17 | 5 | 2 | 5 | 9
-EQ | 3 |
- nDoutOE.D = !iobs/IORW0
- # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2;
- nDoutOE.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+ !nDinLE.CLK = C16M; // GCK
+ iobm/nDinLE.EXP = C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf &
+ iobm/RESrr
+ # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf &
+ iobm/BERRrr
+ # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf &
+ iobm/DTACKrr
+ # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 &
+ iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf &
+ iobm/RESrr
+GLOBALS | 1 | 2 | C16M
MACROCELL | 5 | 14 | nADoutLE0_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 5 | 15
-INPUTS | 7 | iobm/ALE0 | iobs/ALE0 | CLK_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/DTACKrf | iobm/DTACKrr
-INPUTMC | 6 | 5 | 6 | 3 | 2 | 5 | 2 | 0 | 15 | 1 | 13 | 1 | 12
+INPUTS | 7 | iobm/ALE0 | iobs/ALE0 | C8M | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/RESrf | iobm/RESrr
+INPUTMC | 6 | 5 | 3 | 1 | 13 | 0 | 17 | 0 | 13 | 0 | 4 | 0 | 3
INPUTP | 1 | 35
EXPORTS | 1 | 5 | 15
EQ | 3 |
nADoutLE0 = !iobm/ALE0 & !iobs/ALE0;
- nADoutLE0_OBUF.EXP = CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
- iobm/DTACKrf & iobm/DTACKrr
+ nADoutLE0_OBUF.EXP = C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 &
+ iobm/RESrf & iobm/RESrr
MACROCELL | 3 | 5 | nDinOE_OBUF
ATTRIBUTES | 264962 | 0
-INPUTS | 7 | A_FSB<23> | nWE_FSB | nAS_FSB | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1>
-INPUTP | 7 | 36 | 47 | 54 | 30 | 29 | 28 | 97
-EQ | 5 |
+INPUTS | 6 | A_FSB<23> | nWE_FSB | nAS_FSB | A_FSB<22> | A_FSB<21> | A_FSB<20>
+INPUTP | 6 | 36 | 47 | 54 | 30 | 29 | 28
+EQ | 3 |
nDinOE = A_FSB<23> & nWE_FSB & !nAS_FSB
# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB &
- !nAS_FSB
- # A_FSB<22> & !A_FSB<21> & nWE_FSB & !nAS_FSB &
- !SW<1>;
+ !nAS_FSB;
MACROCELL | 7 | 4 | nRAS_OBUF
ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 3
-INPUTS | 14 | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1 | nRAMLWE_OBUF.EXP
-INPUTMC | 5 | 7 | 3 | 3 | 12 | 5 | 13 | 0 | 17 | 7 | 5
-INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30
-EXPORTS | 1 | 7 | 3
-IMPORTS | 1 | 7 | 5
-EQ | 16 |
- !nRAS = ;Imported pterms FB8_6
- ram/RefRAS
- # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
+OUTPUTMC | 1 | 7 | 5
+INPUTS | 9 | ram/RefRAS | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nAS_FSB | ram/RAMEN | A_FSB<21> | nWE_FSB | nLDS_FSB
+INPUTMC | 3 | 1 | 10 | 4 | 3 | 4 | 9
+INPUTP | 6 | 36 | 30 | 54 | 29 | 47 | 49
+EXPORTS | 1 | 7 | 5
+EQ | 6 |
+ !nRAS = ram/RefRAS
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
+ ram/RAMEN
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1;
- nRAS_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
+ !cs/nOverlay1 & !nAS_FSB & ram/RAMEN;
+ nRAS_OBUF.EXP = !nWE_FSB & !nLDS_FSB & !nAS_FSB & ram/RAMEN
+
+MACROCELL | 4 | 4 | ram/nCAS
+ATTRIBUTES | 8684290 | 0
+INPUTS | 1 | ram/RASEL
+INPUTMC | 1 | 4 | 0
+EQ | 2 |
+ nCAS.D = !ram/RASEL;
+ !nCAS.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 3 | 7 | N0
+ATTRIBUTES | 265986 | 0
+INPUTS | 1 | cnt/nRESout
+INPUTMC | 1 | 3 | 0
+EQ | 2 |
+ nRES = Gnd;
+ nRES.OE = !cnt/nRESout;
+
+MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 7 | 2
+INPUTS | 8 | A_FSB<19> | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrgent | A_FSB<23> | nAS_FSB | fsb/ASrf
+INPUTMC | 5 | 4 | 6 | 4 | 12 | 7 | 2 | 1 | 7 | 1 | 14
+INPUTP | 3 | 26 | 36 | 54
+EXPORTS | 1 | 7 | 2
+EQ | 9 |
+ RA<11> = A_FSB<19>;
+ A_FSB_19_IBUF$BUF0.EXP = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 &
+ !ram/RS_FSM_FFd3
+ # ram/RS_FSM_FFd1 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3
+ # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
+ !ram/RS_FSM_FFd3
+ # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
+ !fsb/ASrf
+
+MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 6 | 7
+INPUTS | 6 | A_FSB<21> | A_FSB<9> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RASEL
+INPUTMC | 2 | 4 | 3 | 4 | 0
+INPUTP | 4 | 29 | 12 | 36 | 30
+EXPORTS | 1 | 6 | 7
+EQ | 3 |
+ RA<10> = A_FSB<21>;
+ A_FSB_21_IBUF$BUF0.EXP = A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & ram/RASEL
+
+MACROCELL | 5 | 13 | nADoutLE1_OBUF
+ATTRIBUTES | 8815366 | 0
+OUTPUTMC | 22 | 7 | 15 | 2 | 14 | 2 | 2 | 5 | 13 | 0 | 16 | 2 | 11 | 2 | 5 | 0 | 15 | 2 | 8 | 7 | 11 | 7 | 6 | 7 | 9 | 2 | 4 | 7 | 13 | 2 | 13 | 2 | 15 | 2 | 16 | 2 | 17 | 7 | 5 | 7 | 7 | 7 | 12 | 7 | 14
+INPUTS | 3 | iobs/Clear1 | nADoutLE1 | iobs/Load1
+INPUTMC | 3 | 2 | 4 | 5 | 13 | 7 | 9
+EQ | 3 |
+ !nADoutLE1.D = iobs/Load1
+ # !iobs/Clear1 & !nADoutLE1;
+ nADoutLE1.CLK = FCLK; // GCK
+GLOBALS | 1 | 2 | FCLK
+
+MACROCELL | 7 | 5 | nRAMLWE_OBUF
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 7 | 6
+INPUTS | 11 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | cs/nOverlay1 | A_FSB<19> | A_FSB<16> | nWE_FSB | nRAS_OBUF.EXP
+INPUTMC | 5 | 7 | 6 | 1 | 15 | 5 | 13 | 4 | 3 | 7 | 4
+INPUTP | 6 | 36 | 30 | 29 | 26 | 22 | 47
+EXPORTS | 1 | 7 | 6
+IMPORTS | 1 | 7 | 4
+EQ | 12 |
+ !nRAMLWE = ;Imported pterms FB8_5
+ !nWE_FSB & !nLDS_FSB & !nAS_FSB & ram/RAMEN;
+ nRAMLWE_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<19> &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<16> &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<23> & A_FSB<21> & nWE_FSB &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 &
- !iobs/PS_FSM_FFd1 & SW<1> & nADoutLE1
+
+MACROCELL | 7 | 7 | nRAMUWE_OBUF
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 7 | 6
+INPUTS | 15 | nWE_FSB | nUDS_FSB | nAS_FSB | ram/RAMEN | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<17> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1
+INPUTMC | 5 | 4 | 9 | 7 | 6 | 1 | 15 | 5 | 13 | 4 | 3
+INPUTP | 10 | 47 | 56 | 54 | 36 | 29 | 24 | 23 | 19 | 18 | 30
+EXPORTS | 1 | 7 | 6
+EQ | 9 |
+ !nRAMUWE = !nWE_FSB & !nUDS_FSB & !nAS_FSB & ram/RAMEN;
+ nRAMUWE_OBUF.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-MACROCELL | 4 | 4 | ram/nCAS
-ATTRIBUTES | 8684290 | 0
-OUTPUTMC | 1 | 4 | 5
-INPUTS | 3 | ram/RASEL | nWE_FSB | nAS_FSB
-INPUTMC | 1 | 4 | 17
-INPUTP | 2 | 47 | 54
-EXPORTS | 1 | 4 | 5
-EQ | 3 |
- nCAS.D = !ram/RASEL;
- !nCAS.CLK = CLK_FSB; // GCK
- ram/nCAS.EXP = nWE_FSB & !nAS_FSB
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 0
-INPUTS | 7 | A_FSB<19> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/Once | nADoutLE1 | nWE_FSB | iobs/IORW0
-INPUTMC | 5 | 7 | 3 | 3 | 12 | 4 | 6 | 5 | 13 | 7 | 17
-INPUTP | 2 | 26 | 47
-EXPORTS | 1 | 7 | 0
-EQ | 5 |
- RA<11> = A_FSB<19>;
- A_FSB_19_IBUF$BUF0.EXP = iobs/PS_FSM_FFd2
- # iobs/PS_FSM_FFd1
- # iobs/Once & nADoutLE1
- # nWE_FSB & iobs/IORW0 & nADoutLE1
-
-MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 9
-INPUTS | 9 | A_FSB<21> | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | ram/BACTr | cnt/RefCnt<6> | nAS_FSB | fsb/ASrf | cnt/RefCnt<7>
-INPUTMC | 7 | 6 | 9 | 6 | 3 | 3 | 7 | 0 | 1 | 3 | 6 | 0 | 5 | 3 | 3
-INPUTP | 2 | 29 | 54
-EXPORTS | 1 | 6 | 9
-EQ | 9 |
- RA<10> = A_FSB<21>;
- A_FSB_21_IBUF$BUF0.EXP = !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<5> & ram/BACTr
- # !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<6> & ram/BACTr
- # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<5> & !fsb/ASrf
- # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
- !cnt/RefCnt<7> & !fsb/ASrf
-
-MACROCELL | 6 | 13 | CLK20EN_OBUF$BUF0
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 14
-INPUTS | 11 | A_FSB<23> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | fsb/ASrf | A_FSB<21> | cnt/RefDone | ram/BACTr | cnt/TimeoutB.EXP
-INPUTMC | 7 | 4 | 9 | 0 | 17 | 3 | 17 | 0 | 5 | 3 | 13 | 0 | 1 | 6 | 12
-INPUTP | 4 | 36 | 30 | 54 | 29
-EXPORTS | 1 | 6 | 14
-IMPORTS | 1 | 6 | 12
-EQ | 12 |
- CLK20EN = ;Imported pterms FB7_13
- SW<0>;
- CLK20EN_OBUF$BUF0.EXP = !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & fsb/ASrf
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/BACTr
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-
-MACROCELL | 6 | 11 | CLK25EN_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 10
-INPUTS | 4 | SW<0> | A_FSB<20> | ram/RASEL | A_FSB<19>
-INPUTMC | 1 | 4 | 17
-INPUTP | 3 | 98 | 28 | 26
-EXPORTS | 1 | 6 | 10
-EQ | 3 |
- CLK25EN = !SW<0>;
- CLK25EN_OBUF.EXP = A_FSB<20> & ram/RASEL
- # A_FSB<19> & !ram/RASEL
-
-MACROCELL | 7 | 14 | Park
-ATTRIBUTES | 8815430 | 0
-OUTPUTMC | 6 | 2 | 0 | 2 | 5 | 2 | 3 | 2 | 10 | 2 | 11 | 7 | 13
-INPUTS | 12 | RESr0 | RESr1 | IPL2r0 | RESr2 | RESDone | IPL2r1 | A_FSB<23> | A_FSB<21> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16>
-INPUTMC | 6 | 0 | 9 | 0 | 8 | 0 | 11 | 0 | 7 | 7 | 6 | 0 | 10
-INPUTP | 6 | 36 | 29 | 26 | 24 | 23 | 22
-EXPORTS | 1 | 7 | 13
-EQ | 8 |
- nBR_IOB.D = Gnd;
- nBR_IOB.CLK = CLK_FSB; // GCK
- nBR_IOB.CE = RESr0 & RESr1 & IPL2r0 & RESr2 & !RESDone &
- IPL2r1;
- Park.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<18>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17>
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 13 | nADoutLE1_OBUF
-ATTRIBUTES | 8815366 | 0
-OUTPUTMC | 24 | 4 | 6 | 7 | 15 | 7 | 17 | 2 | 12 | 5 | 13 | 4 | 3 | 7 | 13 | 3 | 16 | 3 | 14 | 2 | 7 | 7 | 3 | 4 | 12 | 3 | 0 | 7 | 8 | 2 | 9 | 2 | 16 | 4 | 5 | 7 | 0 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16
-INPUTS | 3 | iobs/Clear1 | nADoutLE1 | iobs/Load1
-INPUTMC | 3 | 3 | 0 | 5 | 13 | 4 | 12
-EQ | 3 |
- !nADoutLE1.D = iobs/Load1
- # !iobs/Clear1 & !nADoutLE1;
- nADoutLE1.CLK = CLK_FSB; // GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 3 | 1 | nAoutOE_OBUF
-ATTRIBUTES | 8815366 | 0
-OUTPUTMC | 8 | 5 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 5 | 15 | 5 | 6 | 3 | 1
-INPUTS | 4 | iobm/BGr1 | nAoutOE | iobm/BGr0 | nAS_IOB
-INPUTMC | 4 | 1 | 14 | 3 | 1 | 1 | 15 | 5 | 11
-EQ | 4 |
- nAoutOE.D = !iobm/BGr0 & !iobm/BGr1
- # !iobm/BGr1 & nAoutOE
- # !nAS_IOB & !iobm/BGr0 & !nAoutOE;
- nAoutOE.CLK = CLK2X_IOB; // GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 7 | 5 | nRAMLWE_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 4
-INPUTS | 10 | nWE_FSB | nLDS_FSB | ram/RAMDIS2 | nAS_FSB | ram/RAMDIS1 | ram/RefRAS | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21>
-INPUTMC | 4 | 4 | 2 | 6 | 17 | 0 | 0 | 0 | 17
-INPUTP | 6 | 47 | 49 | 54 | 36 | 30 | 29
-EXPORTS | 1 | 7 | 4
-EQ | 7 |
- !nRAMLWE = !nWE_FSB & !nLDS_FSB & !ram/RAMDIS2 & !nAS_FSB &
- !ram/RAMDIS1;
- nRAMLWE_OBUF.EXP = ram/RefRAS
- # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
-
-MACROCELL | 7 | 7 | nRAMUWE_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 8
-INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | nADoutLE1 | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16> | RESDone.EXP
-INPUTMC | 3 | 7 | 3 | 5 | 13 | 7 | 6
-INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22
-EXPORTS | 1 | 7 | 8
-IMPORTS | 1 | 7 | 6
-EQ | 13 |
- !nRAMUWE = ;Imported pterms FB8_7
- !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB &
- !ram/RAMDIS1;
- nRAMUWE_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<19> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
-
MACROCELL | 4 | 1 | nROMCS_OBUF
ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 4 | 2
-INPUTS | 16 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | cs/nOverlay1 | cnt/RefDone | ram/Once | ram/RAMDIS2 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf
-INPUTMC | 10 | 0 | 17 | 3 | 13 | 4 | 9 | 4 | 2 | 6 | 9 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5
-INPUTP | 6 | 36 | 30 | 29 | 28 | 97 | 54
-EXPORTS | 1 | 4 | 2
+OUTPUTMC | 1 | 4 | 0
+INPUTS | 12 | A_FSB<22> | A_FSB<21> | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/RefReq | cs/nOverlay1 | A_FSB<23> | nAS_FSB | ram/RAMEN | fsb/ASrf | ram/RefDone.EXP
+INPUTMC | 8 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 9 | 4 | 3 | 4 | 9 | 1 | 14 | 4 | 2
+INPUTP | 4 | 30 | 29 | 36 | 54
+EXPORTS | 1 | 4 | 0
+IMPORTS | 1 | 4 | 2
EQ | 14 |
- !nROMCS = A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> &
- !SW<1>
- # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> &
- SW<1>
- # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> &
+ !nROMCS = ;Imported pterms FB5_3
+ !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20>
+ # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> &
!cs/nOverlay1;
- nROMCS_OBUF.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB &
- !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- ram/Once & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> &
- fsb/ASrf
+ nROMCS_OBUF.EXP = A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB &
+ !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & fsb/ASrf
-MACROCELL | 0 | 12 | $OpTx$FX_DC$591
-ATTRIBUTES | 133888 | 0
-OUTPUTMC | 6 | 2 | 0 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 16 | 2 | 17
-INPUTS | 2 | nAS_FSB | fsb/ASrf
-INPUTMC | 1 | 0 | 5
-INPUTP | 1 | 54
+MACROCELL | 6 | 11 | N1
+ATTRIBUTES | 264962 | 0
+INPUTS | 0
EQ | 1 |
- $OpTx$FX_DC$591 = nAS_FSB & !fsb/ASrf;
+ C25MEN = Vcc;
-MACROCELL | 2 | 1 | EXP14_
+MACROCELL | 6 | 13 | N1$BUF0
+ATTRIBUTES | 264962 | 0
+INPUTS | 0
+EQ | 1 |
+ C20MEN = Vcc;
+
+MACROCELL | 2 | 0 | EXP14_
ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 0
-INPUTS | 20 | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | fsb/Ready0r | fsb/VPA | ram/RAMReady | $OpTx$FX_DC$591 | A_FSB<21> | fsb/Ready1r | iobs/IOReady | SW<1> | A_FSB<14> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | A_FSB<13> | EXP15_.EXP
-INPUTMC | 8 | 0 | 17 | 2 | 3 | 2 | 0 | 6 | 14 | 0 | 12 | 2 | 14 | 3 | 16 | 2 | 2
-INPUTP | 12 | 36 | 30 | 29 | 97 | 19 | 28 | 26 | 24 | 23 | 22 | 47 | 18
-EXPORTS | 1 | 2 | 0
-IMPORTS | 1 | 2 | 2
-EQ | 57 |
+OUTPUTMC | 1 | 2 | 1
+INPUTS | 20 | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | fsb/Ready0r | fsb/VPA | fsb/ASrf | ram/RAMReady | A_FSB<21> | nAS_FSB | A_FSB<14> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | fsb/Ready1r | iobs/IOReady | A_FSB<13> | EXP21_.EXP
+INPUTMC | 8 | 4 | 3 | 2 | 5 | 2 | 1 | 1 | 14 | 4 | 16 | 2 | 9 | 2 | 6 | 2 | 17
+INPUTP | 12 | 36 | 30 | 29 | 54 | 19 | 28 | 26 | 24 | 23 | 22 | 47 | 18
+EXPORTS | 1 | 2 | 1
+IMPORTS | 1 | 2 | 17
+EQ | 33 |
EXP14_.EXP = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- !fsb/Ready0r & fsb/VPA & !ram/RAMReady & !$OpTx$FX_DC$591
- # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA &
- !iobs/IOReady & !SW<1> & !$OpTx$FX_DC$591
+ !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !ram/RAMReady &
- !$OpTx$FX_DC$591
+ !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591
-;Imported pterms FB3_3
- # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
-;Imported pterms FB3_4
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB
+;Imported pterms FB3_18
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf &
+ !nADoutLE1
# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB &
- !$OpTx$FX_DC$591
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB
# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB &
- !$OpTx$FX_DC$591
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf
MACROCELL | 2 | 2 | EXP15_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 2 | 1
-INPUTS | 23 | A_FSB<9> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | cnt/TimeoutA | fsb/Ready2r | fsb/VPA | $OpTx$FX_DC$591 | A_FSB<8> | fsb/Ready0r.EXP
-INPUTMC | 6 | 0 | 17 | 3 | 15 | 2 | 15 | 2 | 0 | 0 | 12 | 2 | 3
-INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
+INPUTS | 17 | A_FSB<14> | A_FSB<22> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | fsb/VPA | iobs/IOReady | fsb/ASrf | A_FSB<13> | A_FSB<21> | nAS_FSB | nADoutLE1
+INPUTMC | 6 | 4 | 3 | 2 | 9 | 2 | 1 | 2 | 6 | 1 | 14 | 5 | 13
+INPUTP | 11 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 29 | 54
EXPORTS | 1 | 2 | 1
-IMPORTS | 1 | 2 | 3
-EQ | 43 |
- EXP15_.EXP = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
-;Imported pterms FB3_4
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB &
- !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB &
- !$OpTx$FX_DC$591
+EQ | 18 |
+ EXP15_.EXP = A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
+ # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB &
+ !nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB &
+ !nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf &
+ !nADoutLE1
-MACROCELL | 2 | 4 | EXP16_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 3
-INPUTS | 2 | nAS_FSB | fsb/ASrf
-INPUTMC | 1 | 0 | 5
-INPUTP | 1 | 54
-EXPORTS | 1 | 2 | 3
-EQ | 1 |
- EXP16_.EXP = nAS_FSB & !fsb/ASrf
-
-MACROCELL | 2 | 5 | EXP17_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 6
-INPUTS | 24 | nAS_FSB | fsb/ASrf | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/BERR | cnt/TimeoutB | fsb/BERR0r | fsb/BERR1r | iobs/IOReady | nBR_IOB
-INPUTMC | 7 | 0 | 5 | 7 | 15 | 6 | 12 | 2 | 11 | 0 | 16 | 3 | 16 | 7 | 14
-INPUTP | 17 | 54 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22
-EXPORTS | 1 | 2 | 6
-EQ | 6 |
- EXP17_.EXP = nAS_FSB & !fsb/ASrf
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB
-
-MACROCELL | 2 | 6 | EXP18_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 7
-INPUTS | 11 | A_FSB<23> | cnt/TimeoutB | nDTACK_FSB | A_FSB<22> | A_FSB<20> | fsb/Ready1r | iobs/IOReady | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | EXP17_.EXP
-INPUTMC | 8 | 6 | 12 | 2 | 8 | 2 | 14 | 3 | 16 | 0 | 17 | 2 | 3 | 6 | 14 | 2 | 5
-INPUTP | 3 | 36 | 30 | 28
-EXPORTS | 1 | 2 | 7
-IMPORTS | 1 | 2 | 5
-EQ | 14 |
- EXP18_.EXP = A_FSB<23> & cnt/TimeoutB & nDTACK_FSB
- # !A_FSB<22> & cnt/TimeoutB & nDTACK_FSB
- # !A_FSB<20> & cnt/TimeoutB & nDTACK_FSB
- # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady &
- nDTACK_FSB
- # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
- !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-;Imported pterms FB3_6
- # nAS_FSB & !fsb/ASrf
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB
-
-MACROCELL | 2 | 7 | EXP19_
+MACROCELL | 2 | 7 | EXP16_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 2 | 8
-INPUTS | 24 | A_FSB<14> | A_FSB<22> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | A_FSB<21> | nADoutLE1 | A_FSB<8> | A_FSB<15> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | cnt/TimeoutA | fsb/Ready2r | EXP18_.EXP
-INPUTMC | 8 | 0 | 17 | 2 | 14 | 3 | 16 | 2 | 8 | 5 | 13 | 3 | 15 | 2 | 15 | 2 | 6
-INPUTP | 16 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 29 | 11 | 21 | 18 | 17 | 15 | 13 | 36
+INPUTS | 18 | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | fsb/Ready0r | nDTACK_FSB | ram/RAMReady | A_FSB<21> | A_FSB<20> | fsb/Ready1r | iobs/IOReady | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | A_FSB<13> | iobs/IOReady.EXP
+INPUTMC | 7 | 4 | 3 | 2 | 5 | 2 | 8 | 4 | 16 | 2 | 9 | 2 | 6 | 2 | 6
+INPUTP | 11 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 18
EXPORTS | 1 | 2 | 8
IMPORTS | 1 | 2 | 6
-EQ | 37 |
- EXP19_.EXP = A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
- A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
- # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB &
- !nADoutLE1
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
- # A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> &
- !A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & !cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & nDTACK_FSB
-;Imported pterms FB3_7
- # A_FSB<23> & cnt/TimeoutB & nDTACK_FSB
- # !A_FSB<22> & cnt/TimeoutB & nDTACK_FSB
- # !A_FSB<20> & cnt/TimeoutB & nDTACK_FSB
- # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady &
- nDTACK_FSB
- # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+EQ | 24 |
+ EXP16_.EXP = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-;Imported pterms FB3_6
- # nAS_FSB & !fsb/ASrf
- # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
- A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
- A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & iobs/IOReady & nBR_IOB
-
-MACROCELL | 2 | 9 | EXP20_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 8
-INPUTS | 19 | A_FSB<22> | A_FSB<21> | A_FSB<20> | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | SW<1> | A_FSB<23> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | A_FSB<13> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | nADoutLE1 | EXP21_.EXP
-INPUTMC | 8 | 2 | 14 | 3 | 16 | 2 | 8 | 0 | 17 | 2 | 3 | 6 | 14 | 5 | 13 | 2 | 10
-INPUTP | 11 | 30 | 29 | 28 | 97 | 36 | 18 | 26 | 24 | 23 | 22 | 47
-EXPORTS | 1 | 2 | 8
-IMPORTS | 1 | 2 | 10
-EQ | 25 |
- EXP20_.EXP = A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
!iobs/IOReady & nDTACK_FSB
- # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r &
- !iobs/IOReady & nDTACK_FSB & !SW<1>
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
!cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
+ # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
- # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB &
- !nADoutLE1
-;Imported pterms FB3_11
- # iobs/BERR & nDTACK_FSB
- # fsb/BERR0r & nDTACK_FSB
- # fsb/BERR1r & nDTACK_FSB
- # nDTACK_FSB & !nBR_IOB
- # A_FSB<21> & cnt/TimeoutB & nDTACK_FSB
-;Imported pterms FB3_12
+;Imported pterms FB3_7
+ # nAS_FSB & !fsb/ASrf
+ # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady &
+ nDTACK_FSB
# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB
-
-MACROCELL | 2 | 10 | EXP21_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 9
-INPUTS | 8 | iobs/BERR | nDTACK_FSB | fsb/BERR0r | fsb/BERR1r | nBR_IOB | A_FSB<21> | cnt/TimeoutB | fsb/BERR0r.EXP
-INPUTMC | 7 | 7 | 15 | 2 | 8 | 2 | 11 | 0 | 16 | 7 | 14 | 6 | 12 | 2 | 11
-INPUTP | 1 | 29
-EXPORTS | 1 | 2 | 9
-IMPORTS | 1 | 2 | 11
-EQ | 11 |
- EXP21_.EXP = iobs/BERR & nDTACK_FSB
- # fsb/BERR0r & nDTACK_FSB
- # fsb/BERR1r & nDTACK_FSB
- # nDTACK_FSB & !nBR_IOB
- # A_FSB<21> & cnt/TimeoutB & nDTACK_FSB
-;Imported pterms FB3_12
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r
# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
- A_FSB<17> & A_FSB<16> & !iobs/BERR & !cnt/TimeoutB &
- !fsb/BERR0r & !fsb/BERR1r & fsb/Ready1r & nBR_IOB
+ A_FSB<17> & A_FSB<16> & iobs/IOReady
-MACROCELL | 2 | 13 | EXP22_
+MACROCELL | 2 | 10 | EXP17_
ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 14
-INPUTS | 16 | A_FSB<23> | fsb/Ready1r | iobs/IOReady | A_FSB<22> | A_FSB<21> | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | A_FSB<13> | cs/nOverlay0.EXP
-INPUTMC | 4 | 2 | 14 | 3 | 16 | 0 | 17 | 2 | 12
-INPUTP | 12 | 36 | 30 | 29 | 28 | 97 | 19 | 26 | 24 | 23 | 22 | 47 | 18
-EXPORTS | 1 | 2 | 14
-IMPORTS | 1 | 2 | 12
-EQ | 18 |
- EXP22_.EXP = A_FSB<23> & !fsb/Ready1r & !iobs/IOReady
- # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
- !iobs/IOReady
- # A_FSB<22> & !A_FSB<21> & !fsb/Ready1r &
- !iobs/IOReady & !SW<1>
- # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
- A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & !iobs/IOReady
- # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
- A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
- !fsb/Ready1r & !iobs/IOReady
-;Imported pterms FB3_13
- # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
- # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & !iobs/IOReady & !nADoutLE1
-
-MACROCELL | 2 | 17 | EXP23_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 0
-INPUTS | 10 | A_FSB<23> | cnt/TimeoutB | fsb/VPA | $OpTx$FX_DC$591 | A_FSB<22> | A_FSB<21> | fsb/Ready1r | iobs/IOReady | A_FSB<20> | nROMWE_OBUF.EXP
-INPUTMC | 6 | 6 | 12 | 2 | 0 | 0 | 12 | 2 | 14 | 3 | 16 | 2 | 16
-INPUTP | 4 | 36 | 30 | 29 | 28
-EXPORTS | 1 | 2 | 0
-IMPORTS | 1 | 2 | 16
-EQ | 29 |
- EXP23_.EXP = A_FSB<23> & cnt/TimeoutB & fsb/VPA &
- !$OpTx$FX_DC$591
- # !A_FSB<22> & cnt/TimeoutB & fsb/VPA &
- !$OpTx$FX_DC$591
- # A_FSB<21> & cnt/TimeoutB & fsb/VPA &
- !$OpTx$FX_DC$591
- # A_FSB<23> & !fsb/Ready1r & fsb/VPA &
- !iobs/IOReady & !$OpTx$FX_DC$591
- # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r &
- fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$591
-;Imported pterms FB3_17
- # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady &
- !nADoutLE1 & !$OpTx$FX_DC$591
- # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
- A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
- cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady &
- !nADoutLE1 & !$OpTx$FX_DC$591
- # A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
- # A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> &
- A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> &
- A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> &
- A_FSB<16> & !nWE_FSB & cs/nOverlay1 & !cnt/TimeoutA &
- !fsb/Ready2r & fsb/VPA & !$OpTx$FX_DC$591
-
-MACROCELL | 4 | 0 | EXP24_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 4 | 17
-INPUTS | 12 | A_FSB<22> | cnt/RefDone | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/BACTr | fsb/ASrf | A_FSB<21> | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7>
-INPUTMC | 9 | 3 | 13 | 0 | 17 | 3 | 17 | 6 | 9 | 0 | 1 | 0 | 5 | 3 | 7 | 3 | 6 | 3 | 3
-INPUTP | 3 | 30 | 54 | 29
-EXPORTS | 1 | 4 | 17
-EQ | 11 |
- EXP24_.EXP = A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
-
-MACROCELL | 4 | 7 | EXP25_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 4 | 6
-INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<19> | iobs/Once | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | RA_4_OBUF.EXP
-INPUTMC | 2 | 4 | 6 | 4 | 8
-INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 47
-EXPORTS | 1 | 4 | 6
-IMPORTS | 1 | 4 | 8
-EQ | 11 |
- EXP25_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
- # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
- # !A_FSB<23> & A_FSB<21> & nWE_FSB & !iobs/Once
-;Imported pterms FB5_9
- # !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1>
- # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
- !iobs/Once
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once &
- cs/nOverlay1
-
-MACROCELL | 4 | 15 | EXP26_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 4 | 16
-INPUTS | 13 | A_FSB<23> | A_FSB<22> | A_FSB<21> | ram/Once | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | fsb/ASrf | cnt/RefDone | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7>
-INPUTMC | 9 | 4 | 9 | 0 | 17 | 3 | 17 | 6 | 9 | 0 | 5 | 3 | 13 | 3 | 7 | 3 | 6 | 3 | 3
-INPUTP | 4 | 36 | 30 | 29 | 54
-EXPORTS | 1 | 4 | 16
-EQ | 10 |
- EXP26_.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
-
-MACROCELL | 4 | 16 | EXP27_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 4 | 17
-INPUTS | 15 | A_FSB<23> | cnt/RefDone | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<22> | ram/Once | cs/nOverlay1 | nAS_FSB | fsb/ASrf | A_FSB<21> | ram/BACTr | EXP26_.EXP
-INPUTMC | 11 | 3 | 13 | 3 | 17 | 6 | 9 | 3 | 7 | 3 | 6 | 3 | 3 | 4 | 9 | 0 | 17 | 0 | 5 | 0 | 1 | 4 | 15
-INPUTP | 4 | 36 | 30 | 54 | 29
-EXPORTS | 1 | 4 | 17
-IMPORTS | 1 | 4 | 15
-EQ | 21 |
- EXP27_.EXP = A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2
- # !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/BACTr & fsb/ASrf
-;Imported pterms FB5_16
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & fsb/ASrf
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
-
-MACROCELL | 6 | 0 | EXP28_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 6 | 17
-INPUTS | 15 | A_FSB<23> | cnt/RefDone | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | A_FSB<22> | cs/nOverlay1 | ram/BACTr | fsb/ASrf | ram/Once | A_FSB<21> | nAS_FSB | RA_1_OBUF.EXP
-INPUTMC | 11 | 3 | 13 | 3 | 17 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 17 | 0 | 1 | 0 | 5 | 4 | 9 | 6 | 1
-INPUTP | 4 | 36 | 30 | 29 | 54
-EXPORTS | 1 | 6 | 17
-IMPORTS | 1 | 6 | 1
-EQ | 19 |
- EXP28_.EXP = A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf
- # !cnt/RefDone & ram/Once & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> &
- !fsb/ASrf
-;Imported pterms FB7_2
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
-
-MACROCELL | 6 | 2 | EXP29_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 6 | 3
-INPUTS | 13 | cnt/RefDone | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | cnt/RefCnt<5> | cnt/RefCnt<6> | cnt/RefCnt<7> | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21>
-INPUTMC | 9 | 3 | 13 | 3 | 17 | 6 | 9 | 6 | 3 | 3 | 7 | 3 | 6 | 3 | 3 | 0 | 5 | 0 | 17
-INPUTP | 4 | 54 | 36 | 30 | 29
-EXPORTS | 1 | 6 | 3
-EQ | 15 |
- EXP29_.EXP = !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd1 &
- !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> &
- cnt/RefCnt<7>
- # !cnt/RefDone & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 &
- !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> &
- fsb/ASrf
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone &
- cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
- # !A_FSB<23> & !A_FSB<22> & !cnt/RefDone &
- cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !cnt/RefDone &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 &
- cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-
-MACROCELL | 6 | 15 | EXP30_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 6 | 14
-INPUTS | 10 | A_FSB<22> | A_FSB<21> | cnt/RefDone | ram/RS_FSM_FFd1 | ram/BACTr | fsb/ASrf | cs/nOverlay1 | A_FSB<23> | ram/Once | nAS_FSB
-INPUTMC | 6 | 3 | 13 | 3 | 17 | 0 | 1 | 0 | 5 | 0 | 17 | 4 | 9
-INPUTP | 4 | 30 | 29 | 36 | 54
-EXPORTS | 1 | 6 | 14
-EQ | 10 |
- EXP30_.EXP = A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once &
- !cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf
-
-MACROCELL | 6 | 16 | EXP31_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 6 | 17
-INPUTS | 9 | A_FSB<22> | A_FSB<21> | cnt/RefDone | nAS_FSB | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | ram/BACTr | fsb/ASrf | cs/nOverlay1
-INPUTMC | 6 | 3 | 13 | 3 | 17 | 6 | 3 | 0 | 1 | 0 | 5 | 0 | 17
-INPUTP | 3 | 30 | 29 | 54
-EXPORTS | 1 | 6 | 17
-EQ | 10 |
- EXP31_.EXP = A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr
- # A_FSB<22> & !A_FSB<21> & !cnt/RefDone &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr
- # A_FSB<22> & !cnt/RefDone & cs/nOverlay1 &
- !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr & fsb/ASrf
- # !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 &
- !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & !ram/BACTr
-
-MACROCELL | 7 | 0 | EXP32_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 17
-INPUTS | 9 | iobs/IORW0 | iobs/IORW1 | nADoutLE1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB_19_IBUF$BUF0.EXP
-INPUTMC | 5 | 7 | 17 | 7 | 13 | 5 | 13 | 0 | 5 | 7 | 1
-INPUTP | 4 | 54 | 36 | 30 | 29
-EXPORTS | 1 | 7 | 17
-IMPORTS | 1 | 7 | 1
-EQ | 10 |
- EXP32_.EXP = iobs/IORW0 & iobs/IORW1 & !nADoutLE1
- # !iobs/IORW0 & !iobs/IORW1 & !nADoutLE1
- # nAS_FSB & !fsb/ASrf & nADoutLE1
- # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !iobs/IORW0 & nADoutLE1
-;Imported pterms FB8_2
- # iobs/PS_FSM_FFd2
- # iobs/PS_FSM_FFd1
- # iobs/Once & nADoutLE1
- # nWE_FSB & iobs/IORW0 & nADoutLE1
-
-MACROCELL | 7 | 2 | EXP33_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 3
-INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<20> | A_FSB<19> | A_FSB<17> | A_FSB<16>
-INPUTMC | 3 | 7 | 3 | 3 | 12 | 5 | 13
-INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22
-EXPORTS | 1 | 7 | 3
-EQ | 10 |
- EXP33_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20> &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<19> &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17> &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16> &
- !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-
-MACROCELL | 7 | 9 | EXP34_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 8
-INPUTS | 12 | A_FSB<23> | A_FSB<21> | A_FSB<18> | iobs/PS_FSM_FFd2 | nADoutLE1 | nWE_FSB | A_FSB<20> | SW<1> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1
-INPUTMC | 3 | 7 | 3 | 5 | 13 | 0 | 17
-INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30
-EXPORTS | 1 | 7 | 8
-EQ | 10 |
- EXP34_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & nWE_FSB &
- !iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 &
- SW<1> & nADoutLE1
- # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
- !iobs/PS_FSM_FFd2 & nADoutLE1
- # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
- cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1
-
-MACROCELL | 7 | 10 | EXP35_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 11
-INPUTS | 7 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | iobs/BERR | fsb/BERR0r | fsb/BERR1r
-INPUTMC | 3 | 7 | 15 | 2 | 11 | 0 | 16
-INPUTP | 4 | 36 | 30 | 29 | 28
-EXPORTS | 1 | 7 | 11
-EQ | 2 |
- EXP35_.EXP = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> &
- !iobs/BERR & !fsb/BERR0r & !fsb/BERR1r
-
-MACROCELL | 7 | 12 | EXP36_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 13
-INPUTS | 10 | nAS_FSB | fsb/ASrf | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB<20> | nBERR_FSB_OBUF.EXP
-INPUTMC | 5 | 0 | 5 | 7 | 3 | 3 | 12 | 0 | 17 | 7 | 11
-INPUTP | 5 | 54 | 36 | 30 | 29 | 28
-EXPORTS | 1 | 7 | 13
-IMPORTS | 1 | 7 | 11
-EQ | 10 |
- EXP36_.EXP = nAS_FSB & !fsb/ASrf
+OUTPUTMC | 1 | 2 | 11
+INPUTS | 11 | nWE_FSB | iobs/IORW1 | nAS_FSB | fsb/ASrf | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready1r.EXP
+INPUTMC | 6 | 2 | 11 | 1 | 14 | 7 | 6 | 1 | 15 | 4 | 3 | 2 | 9
+INPUTP | 5 | 47 | 54 | 36 | 30 | 29
+EXPORTS | 1 | 2 | 11
+IMPORTS | 1 | 2 | 9
+EQ | 7 |
+ EXP17_.EXP = !nWE_FSB & !iobs/IORW1
+ # nAS_FSB & !fsb/ASrf
# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<20>
-;Imported pterms FB8_12
- # !A_FSB<23> & !A_FSB<20> & SW<1>
+;Imported pterms FB3_10
+ # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+
+MACROCELL | 2 | 12 | EXP18_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 11
+INPUTS | 8 | A_FSB<23> | A_FSB<21> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | A_FSB<22> | cs/nOverlay1
+INPUTMC | 1 | 4 | 3
+INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 30
+EXPORTS | 1 | 2 | 11
+EQ | 6 |
+ EXP18_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19>
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<18>
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<17>
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<16>
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ cs/nOverlay1
+
+MACROCELL | 2 | 13 | EXP19_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 14
+INPUTS | 12 | A_FSB<23> | nWE_FSB | iobs/Once | iobs/IORW0 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | nADoutLE1 | A_FSB<22> | A_FSB<21> | A_FSB<20> | nAS_FSB
+INPUTMC | 6 | 7 | 16 | 2 | 14 | 7 | 6 | 1 | 15 | 1 | 14 | 5 | 13
+INPUTP | 6 | 36 | 47 | 30 | 29 | 28 | 54
+EXPORTS | 1 | 2 | 14
+EQ | 14 |
+ EXP19_.EXP = A_FSB<23> & nWE_FSB & !iobs/Once & !iobs/IORW0 &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB &
+ !iobs/Once & !iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB &
+ !iobs/Once & !iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB &
+ !iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<22> & !A_FSB<21> & A_FSB<20> & !nWE_FSB &
+ !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+
+MACROCELL | 2 | 15 | EXP20_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 14
+INPUTS | 19 | A_FSB<14> | A_FSB<22> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | iobs/Once | iobs/IORW0 | nAS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | fsb/ASrf | A_FSB<13> | A_FSB<21> | nROMWE_OBUF.EXP
+INPUTMC | 8 | 4 | 3 | 7 | 16 | 2 | 14 | 7 | 6 | 1 | 15 | 5 | 13 | 1 | 14 | 2 | 16
+INPUTP | 11 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 54 | 18 | 29
+EXPORTS | 1 | 2 | 14
+IMPORTS | 1 | 2 | 16
+EQ | 33 |
+ EXP20_.EXP = A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+ # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !nAS_FSB & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> &
+ A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !cs/nOverlay1 &
+ !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 &
+ fsb/ASrf & nADoutLE1
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+;Imported pterms FB3_17
+ # A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !nAS_FSB &
+ !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+ # A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !iobs/Once & iobs/IORW0 & !iobs/PS_FSM_FFd2 &
+ !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
+
+MACROCELL | 2 | 17 | EXP21_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 0
+INPUTS | 24 | A_FSB<14> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | fsb/VPA | iobs/IOReady | fsb/ASrf | nADoutLE1 | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | nAS_FSB
+INPUTMC | 6 | 4 | 3 | 2 | 9 | 2 | 1 | 2 | 6 | 1 | 14 | 5 | 13
+INPUTP | 18 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 12 | 11 | 21 | 18 | 17 | 15 | 13 | 36 | 54
+EXPORTS | 1 | 2 | 0
+EQ | 20 |
+ EXP21_.EXP = A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> &
+ A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB &
+ cs/nOverlay1 & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf &
+ !nADoutLE1
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB
+ # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> &
+ A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> &
+ A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> &
+ A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf
+
+MACROCELL | 4 | 15 | EXP22_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 4 | 16
+INPUTS | 10 | A_FSB<23> | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/RefReq | A_FSB<22> | A_FSB<21> | ram/BACTr | cs/nOverlay1 | RA_6_OBUF.EXP
+INPUTMC | 7 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 9 | 1 | 11 | 4 | 3 | 4 | 14
+INPUTP | 3 | 36 | 30 | 29
+EXPORTS | 1 | 4 | 16
+IMPORTS | 1 | 4 | 14
+EQ | 20 |
+ EXP22_.EXP = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+;Imported pterms FB5_15
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq
+ # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 &
+ !ram/RS_FSM_FFd2 & !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RAMEN
+
+MACROCELL | 4 | 17 | EXP23_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 4 | 0
+INPUTS | 10 | A_FSB<23> | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/BACTr | ram/RefReq | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | ram/RAMReady.EXP
+INPUTMC | 7 | 4 | 12 | 1 | 7 | 7 | 2 | 1 | 11 | 1 | 9 | 4 | 3 | 4 | 16
+INPUTP | 3 | 36 | 30 | 29
+EXPORTS | 1 | 4 | 0
+IMPORTS | 1 | 4 | 16
+EQ | 17 |
+ EXP23_.EXP = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & ram/BACTr
+ # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent &
+ !ram/RS_FSM_FFd3 & !ram/RefReq
+ # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+ # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 &
+ !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr
+;Imported pterms FB5_17
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 &
+ !ram/RAMEN
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN &
+ fsb/ASrf
+
+MACROCELL | 7 | 8 | EXP24_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 7 | 9
+INPUTS | 6 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | A_FSB<19> | nWE_FSB
+INPUTMC | 1 | 4 | 3
+INPUTP | 5 | 36 | 30 | 29 | 26 | 47
+EXPORTS | 1 | 7 | 9
+EQ | 4 |
+ EXP24_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<19>
+ # !A_FSB<23> & A_FSB<21> & nWE_FSB
+
+MACROCELL | 7 | 10 | EXP25_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 7 | 9
+INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<18> | A_FSB<17> | A_FSB<16> | A_FSB<14> | A_FSB<13> | A_FSB<22> | cs/nOverlay1
+INPUTMC | 1 | 4 | 3
+INPUTP | 8 | 36 | 29 | 24 | 23 | 22 | 19 | 18 | 30
+EXPORTS | 1 | 7 | 9
+EQ | 6 |
+ EXP25_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<18>
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<17>
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<16>
# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
# !A_FSB<23> & A_FSB<22> & A_FSB<21> &
cs/nOverlay1
-MACROCELL | 7 | 16 | EXP37_
+MACROCELL | 7 | 12 | EXP26_
ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 17
-INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<19> | nADoutLE1 | A_FSB<18> | A_FSB<17> | A_FSB<16> | A_FSB<20> | SW<1>
-INPUTMC | 1 | 5 | 13
-INPUTP | 8 | 36 | 29 | 26 | 24 | 23 | 22 | 28 | 97
-EXPORTS | 1 | 7 | 17
-EQ | 5 |
- EXP37_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1
- # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1
- # !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1
+OUTPUTMC | 1 | 7 | 13
+INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | iobs/PS_FSM_FFd2 | nADoutLE1 | cs/nOverlay1 | A_FSB<19> | A_FSB<16> | nWE_FSB | iobs/nBERR_FSB.EXP
+INPUTMC | 4 | 7 | 6 | 5 | 13 | 4 | 3 | 7 | 11
+INPUTP | 6 | 36 | 30 | 29 | 26 | 22 | 47
+EXPORTS | 1 | 7 | 13
+IMPORTS | 1 | 7 | 11
+EQ | 13 |
+ EXP26_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<19> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<16> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+ # !A_FSB<23> & A_FSB<21> & nWE_FSB &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
+;Imported pterms FB8_12
+ # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
+ !iobs/PS_FSM_FFd2 & nADoutLE1
-PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 8 | 2 | 15 | 6 | 6 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 11 | 2 | 16
-PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 10 | 2 | 15 | 6 | 4 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16
-PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 10 | 2 | 15 | 4 | 10 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16
-PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 18 | 2 | 16 | 7 | 17 | 2 | 13 | 2 | 15 | 4 | 8 | 7 | 11 | 2 | 8 | 4 | 13 | 2 | 14 | 7 | 4 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 12 | 7 | 9
-PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 20 | 2 | 16 | 7 | 17 | 2 | 13 | 2 | 15 | 4 | 10 | 7 | 11 | 2 | 8 | 4 | 13 | 4 | 8 | 7 | 4 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 9
-PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 10 | 2 | 15 | 2 | 16 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 4 | 14
-PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 10 | 2 | 15 | 6 | 1 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16
-PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 10 | 2 | 15 | 6 | 5 | 2 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 11 | 2 | 14 | 2 | 16
-PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 58 | 4 | 9 | 4 | 6 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 13 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 17 | 6 | 6 | 6 | 3 | 7 | 3 | 4 | 12 | 7 | 8 | 6 | 17 | 6 | 14 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 1 | 2 | 2 | 2 | 5 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 14 | 2 | 16 | 2 | 17 | 3 | 0 | 3 | 16 | 4 | 5 | 4 | 7 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 2 | 6 | 4 | 6 | 10 | 6 | 13 | 6 | 15 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16
-PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 54 | 4 | 9 | 4 | 6 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 12 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 16 | 6 | 6 | 6 | 3 | 7 | 3 | 4 | 12 | 7 | 8 | 6 | 16 | 6 | 13 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 1 | 2 | 2 | 2 | 5 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 14 | 2 | 16 | 2 | 17 | 3 | 0 | 3 | 16 | 4 | 0 | 4 | 5 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 15 | 6 | 0 | 6 | 1 | 6 | 2 | 6 | 4 | 6 | 10 | 6 | 15 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11
-PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 51 | 4 | 9 | 4 | 5 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 3 | 2 | 13 | 2 | 15 | 4 | 1 | 7 | 13 | 4 | 0 | 2 | 8 | 3 | 0 | 4 | 16 | 6 | 6 | 6 | 3 | 7 | 2 | 4 | 11 | 7 | 7 | 6 | 16 | 6 | 13 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 0 | 6 | 8 | 2 | 1 | 2 | 2 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 10 | 2 | 14 | 2 | 16 | 2 | 17 | 4 | 7 | 4 | 8 | 4 | 13 | 4 | 15 | 6 | 0 | 6 | 2 | 6 | 4 | 6 | 10 | 6 | 15 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16
-PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 32 | 4 | 5 | 7 | 17 | 2 | 12 | 2 | 11 | 2 | 13 | 2 | 15 | 2 | 0 | 7 | 12 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 4 | 13 | 7 | 10 | 3 | 5 | 4 | 1 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 14 | 2 | 16 | 2 | 17 | 4 | 8 | 6 | 11 | 7 | 4 | 7 | 9 | 7 | 11 | 7 | 16
-PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 21 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 7 | 1 | 6 | 11 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 4 | 7 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14
-PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 20 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 6 | 7 | 7 | 9 | 2 | 8 | 4 | 13 | 4 | 7 | 7 | 4 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14
-PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 20 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 6 | 4 | 4 | 7 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14
-PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 20 | 2 | 16 | 7 | 16 | 2 | 13 | 2 | 15 | 4 | 14 | 4 | 7 | 2 | 8 | 7 | 2 | 4 | 11 | 7 | 7 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 12 | 2 | 14 | 7 | 14
-PIN | CLK2X_IOB | 4096 | 0 | N/A | 33 | 31 | 5 | 1 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 17 | 1 | 15 | 5 | 0 | 5 | 15 | 5 | 6 | 1 | 16 | 1 | 14 | 1 | 12 | 1 | 10 | 0 | 2 | 1 | 7 | 3 | 4 | 3 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 1 | 9 | 0 | 4 | 1 | 13 | 0 | 3 | 1 | 8 | 5 | 16
-PIN | nWE_FSB | 64 | 0 | N/A | 47 | 22 | 2 | 14 | 7 | 17 | 2 | 13 | 2 | 15 | 7 | 6 | 7 | 13 | 2 | 8 | 7 | 1 | 4 | 7 | 7 | 4 | 4 | 4 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 7 | 2 | 9 | 2 | 12 | 4 | 13 | 7 | 9
-PIN | CLK_FSB | 16384 | 0 | N/A | 42 | 57 | 3 | 13 | 4 | 9 | 4 | 6 | 0 | 17 | 7 | 15 | 7 | 17 | 2 | 12 | 3 | 15 | 6 | 12 | 6 | 6 | 2 | 11 | 0 | 16 | 2 | 3 | 2 | 14 | 2 | 15 | 2 | 0 | 4 | 3 | 0 | 14 | 7 | 13 | 3 | 16 | 3 | 14 | 0 | 13 | 4 | 2 | 2 | 8 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 7 | 3 | 3 | 7 | 3 | 6 | 3 | 12 | 1 | 17 | 3 | 3 | 0 | 6 | 3 | 9 | 1 | 6 | 3 | 11 | 3 | 8 | 4 | 12 | 0 | 1 | 0 | 9 | 0 | 8 | 0 | 11 | 0 | 7 | 0 | 0 | 7 | 6 | 0 | 10 | 3 | 2 | 3 | 0 | 7 | 8 | 6 | 17 | 6 | 14 | 7 | 14 | 5 | 13 | 0 | 5 | 4 | 4
-PIN | nAS_FSB | 64 | 0 | N/A | 54 | 48 | 4 | 9 | 4 | 6 | 0 | 17 | 7 | 15 | 6 | 16 | 2 | 12 | 3 | 15 | 6 | 12 | 6 | 6 | 2 | 11 | 0 | 16 | 0 | 12 | 2 | 14 | 2 | 4 | 7 | 12 | 3 | 16 | 4 | 2 | 2 | 5 | 3 | 17 | 4 | 17 | 6 | 9 | 6 | 3 | 7 | 3 | 4 | 12 | 0 | 1 | 0 | 5 | 7 | 8 | 6 | 17 | 6 | 14 | 7 | 11 | 4 | 4 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 0 | 7 | 5 | 7 | 6 | 3 | 0 | 4 | 0 | 4 | 1 | 4 | 15 | 4 | 16 | 6 | 0 | 6 | 2 | 6 | 8 | 6 | 10 | 6 | 13 | 6 | 15
-PIN | SW<1> | 64 | 0 | N/A | 97 | 11 | 2 | 9 | 7 | 16 | 2 | 13 | 4 | 1 | 7 | 11 | 2 | 1 | 4 | 13 | 4 | 8 | 7 | 4 | 3 | 5 | 7 | 9
-PIN | nRES | 64 | 0 | N/A | 145 | 4 | 2 | 12 | 0 | 9 | 0 | 3 | 0 | 2
-PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 4 | 3 | 0 | 14 | 7 | 5
-PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 3 | 14 | 0 | 13 | 7 | 6
-PIN | CLK_IOB | 8256 | 0 | N/A | 35 | 8 | 5 | 2 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 0 | 5 | 14 | 5 | 16 | 1 | 11
-PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 4 | 5 | 17 | 0 | 4 | 1 | 16 | 5 | 0
-PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 0 | 11
-PIN | nBG_IOB | 64 | 0 | N/A | 117 | 1 | 1 | 15
-PIN | E_IOB | 64 | 0 | N/A | 37 | 1 | 1 | 11
-PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 1 | 13 | 1 | 12
-PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 8 | 1 | 7
+MACROCELL | 7 | 15 | EXP27_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 7 | 16
+INPUTS | 8 | A_FSB<23> | iobs/Once | iobs/PS_FSM_FFd1 | iobs/PS_FSM_FFd2 | nADoutLE1 | A_FSB<22> | A_FSB<21> | cs/nOverlay1
+INPUTMC | 5 | 7 | 16 | 1 | 15 | 7 | 6 | 5 | 13 | 4 | 3
+INPUTP | 3 | 36 | 30 | 29
+EXPORTS | 1 | 7 | 16
+EQ | 6 |
+ EXP27_.EXP = A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
+ # !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
+ # !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
+ # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
+ # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 &
+ !iobs/Once
+
+MACROCELL | 7 | 17 | EXP28_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 7 | 16
+INPUTS | 9 | A_FSB<23> | A_FSB<21> | A_FSB<19> | iobs/Once | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cnt/PORS_FSM_FFd1.EXP
+INPUTMC | 2 | 7 | 16 | 7 | 0
+INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 47
+EXPORTS | 1 | 7 | 16
+IMPORTS | 1 | 7 | 0
+EQ | 10 |
+ EXP28_.EXP = !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
+ # !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
+ # !A_FSB<23> & A_FSB<21> & nWE_FSB & !iobs/Once
+;Imported pterms FB8_1
+ # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> &
+ !iobs/Once
+ # !A_FSB<23> & A_FSB<22> & A_FSB<21> &
+ cs/nOverlay1 & !iobs/Once
+
+PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 4 | 6 | 6 | 2 | 6 | 2 | 17 | 6 | 8
+PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 3 | 6 | 4 | 2 | 6 | 2 | 17
+PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 3 | 4 | 10 | 2 | 6 | 2 | 17
+PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 14 | 7 | 10 | 2 | 6 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 0 | 7 | 7 | 7 | 11 | 4 | 8 | 2 | 2 | 2 | 15 | 2 | 16 | 2 | 17
+PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 14 | 7 | 10 | 2 | 6 | 2 | 7 | 2 | 0 | 2 | 9 | 2 | 8 | 7 | 0 | 7 | 7 | 7 | 11 | 4 | 10 | 2 | 2 | 2 | 15 | 2 | 16 | 2 | 17
+PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 3 | 4 | 13 | 2 | 6 | 2 | 17
+PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 3 | 6 | 1 | 2 | 6 | 2 | 17
+PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 3 | 6 | 5 | 2 | 6 | 2 | 17
+PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 43 | 7 | 16 | 2 | 14 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 11 | 2 | 7 | 2 | 17 | 4 | 6 | 4 | 11 | 7 | 6 | 7 | 1 | 4 | 8 | 7 | 9 | 7 | 13 | 4 | 16 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 13 | 2 | 0 | 2 | 6 | 2 | 10 | 2 | 12 | 4 | 1 | 4 | 2 | 4 | 5 | 4 | 14 | 4 | 15 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 0 | 7 | 5 | 7 | 7 | 7 | 8 | 7 | 10 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 17
+PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 40 | 7 | 16 | 2 | 13 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 8 | 2 | 17 | 4 | 6 | 4 | 11 | 7 | 5 | 7 | 2 | 4 | 8 | 7 | 8 | 7 | 12 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 16 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 5 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 0 | 7 | 7 | 7 | 10 | 7 | 14 | 7 | 15
+PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 40 | 7 | 15 | 2 | 13 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 2 | 11 | 2 | 8 | 2 | 17 | 4 | 5 | 4 | 11 | 7 | 5 | 7 | 2 | 4 | 8 | 7 | 8 | 7 | 12 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 6 | 8 | 2 | 16 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 7 | 0 | 7 | 7 | 7 | 10 | 7 | 11 | 7 | 14 | 7 | 17
+PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 20 | 7 | 16 | 2 | 13 | 4 | 7 | 2 | 9 | 2 | 1 | 2 | 11 | 2 | 8 | 7 | 6 | 7 | 9 | 7 | 13 | 6 | 10 | 3 | 5 | 2 | 17 | 2 | 0 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 15 | 2 | 16 | 4 | 2
+PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 16 | 2 | 17 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 5 | 7 | 8 | 7 | 12 | 6 | 10 | 7 | 1 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
+PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 15 | 7 | 14 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 2 | 17 | 7 | 7 | 7 | 10 | 6 | 7 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
+PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 15 | 7 | 14 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 2 | 17 | 7 | 7 | 7 | 10 | 6 | 4 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
+PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 15 | 7 | 10 | 2 | 12 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 5 | 2 | 17 | 7 | 12 | 4 | 14 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 16 | 7 | 17
+PIN | C16M | 4096 | 0 | N/A | 33 | 30 | 5 | 1 | 0 | 14 | 0 | 17 | 0 | 13 | 5 | 9 | 5 | 6 | 5 | 5 | 5 | 12 | 5 | 4 | 5 | 7 | 5 | 17 | 5 | 0 | 5 | 15 | 5 | 3 | 0 | 10 | 0 | 8 | 5 | 2 | 0 | 6 | 0 | 3 | 0 | 1 | 0 | 0 | 5 | 11 | 5 | 8 | 5 | 10 | 0 | 5 | 0 | 11 | 0 | 9 | 0 | 4 | 0 | 2 | 5 | 16
+PIN | nWE_FSB | 64 | 0 | N/A | 47 | 20 | 2 | 17 | 2 | 14 | 2 | 9 | 2 | 0 | 2 | 11 | 2 | 8 | 7 | 5 | 7 | 8 | 7 | 12 | 4 | 5 | 2 | 16 | 3 | 5 | 7 | 4 | 7 | 7 | 2 | 2 | 2 | 7 | 2 | 10 | 2 | 13 | 2 | 15 | 7 | 17
+PIN | C8M | 8256 | 0 | N/A | 35 | 27 | 0 | 17 | 5 | 9 | 5 | 17 | 5 | 15 | 5 | 14 | 5 | 16 | 3 | 8 | 6 | 0 | 3 | 17 | 3 | 16 | 3 | 15 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 1 | 7 | 14 | 7 | 0 | 3 | 6 | 0 | 12 | 3 | 0 | 0 | 7
+PIN | FCLK | 16384 | 0 | N/A | 42 | 38 | 4 | 3 | 7 | 16 | 2 | 14 | 4 | 2 | 4 | 7 | 2 | 5 | 2 | 9 | 2 | 1 | 0 | 16 | 1 | 17 | 2 | 11 | 2 | 6 | 0 | 15 | 1 | 16 | 2 | 8 | 7 | 11 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 6 | 1 | 7 | 7 | 2 | 1 | 15 | 4 | 9 | 1 | 12 | 7 | 9 | 1 | 11 | 1 | 9 | 1 | 8 | 1 | 13 | 2 | 4 | 7 | 13 | 4 | 16 | 1 | 10 | 1 | 6 | 5 | 13 | 1 | 14 | 4 | 4
+PIN | nAS_FSB | 64 | 0 | N/A | 54 | 36 | 4 | 3 | 7 | 16 | 2 | 14 | 4 | 7 | 2 | 4 | 2 | 9 | 2 | 1 | 2 | 10 | 2 | 6 | 2 | 5 | 7 | 11 | 4 | 0 | 4 | 6 | 4 | 12 | 7 | 6 | 7 | 1 | 4 | 9 | 7 | 9 | 1 | 11 | 1 | 14 | 7 | 13 | 4 | 16 | 4 | 5 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 4 | 4 | 11 | 7 | 7 | 2 | 0 | 2 | 2 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 1 | 4 | 8
+PIN | nBG_IOB | 64 | 0 | N/A | 117 | 1 | 0 | 14
+PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 0 | 16 | 1 | 17 | 7 | 4
+PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 0 | 15 | 1 | 16 | 7 | 7
+PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 4 | 5 | 17 | 0 | 11 | 0 | 10 | 5 | 16
+PIN | E | 64 | 0 | N/A | 37 | 8 | 3 | 2 | 3 | 12 | 3 | 11 | 3 | 3 | 3 | 9 | 0 | 7 | 3 | 14 | 3 | 13
+PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 0 | 12
+PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 0 | 9 | 0 | 8
+PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 0 | 2 | 0 | 1
PIN | A_FSB<1> | 64 | 0 | N/A | 149 | 1 | 6 | 5
PIN | A_FSB<2> | 64 | 0 | N/A | 153 | 1 | 6 | 1
-PIN | A_FSB<3> | 64 | 0 | N/A | 155 | 1 | 4 | 14
+PIN | A_FSB<3> | 64 | 0 | N/A | 155 | 1 | 4 | 13
PIN | A_FSB<4> | 64 | 0 | N/A | 157 | 1 | 4 | 10
-PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 8
+PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 7
PIN | A_FSB<6> | 64 | 0 | N/A | 6 | 1 | 4 | 10
-PIN | A_FSB<7> | 64 | 0 | N/A | 8 | 1 | 4 | 14
-PIN | SW<0> | 64 | 0 | N/A | 98 | 2 | 6 | 12 | 6 | 11
+PIN | A_FSB<7> | 64 | 0 | N/A | 8 | 1 | 4 | 13
PIN | nVMA_IOB | 536871040 | 0 | N/A | 118
PIN | nAS_IOB | 536871040 | 0 | N/A | 135
PIN | nLDS_IOB | 536871040 | 0 | N/A | 130
PIN | nUDS_IOB | 536871040 | 0 | N/A | 134
PIN | nDTACK_FSB | 536871040 | 0 | N/A | 44
+PIN | nBERR_FSB | 536871040 | 0 | N/A | 112
+PIN | nAoutOE | 536871040 | 0 | N/A | 141
+PIN | nBR_IOB | 536871040 | 0 | N/A | 116
PIN | RA<0> | 536871040 | 0 | N/A | 86
PIN | RA<1> | 536871040 | 0 | N/A | 79
PIN | RA<2> | 536871040 | 0 | N/A | 69
@@ -2892,23 +2497,21 @@ PIN | RA<6> | 536871040 | 0 | N/A | 72
PIN | RA<7> | 536871040 | 0 | N/A | 82
PIN | RA<8> | 536871040 | 0 | N/A | 88
PIN | RA<9> | 536871040 | 0 | N/A | 92
-PIN | nBERR_FSB | 536871040 | 0 | N/A | 112
+PIN | nDoutOE | 536871040 | 0 | N/A | 143
PIN | nOE | 536871040 | 0 | N/A | 60
PIN | nROMWE | 536871040 | 0 | N/A | 57
PIN | nVPA_FSB | 536871040 | 0 | N/A | 147
PIN | nDinLE | 536871040 | 0 | N/A | 140
-PIN | nDoutOE | 536871040 | 0 | N/A | 143
PIN | nADoutLE0 | 536871040 | 0 | N/A | 139
PIN | nDinOE | 536871040 | 0 | N/A | 144
PIN | nRAS | 536871040 | 0 | N/A | 103
PIN | nCAS | 536871040 | 0 | N/A | 59
PIN | RA<11> | 536871040 | 0 | N/A | 102
PIN | RA<10> | 536871040 | 0 | N/A | 90
-PIN | CLK20EN | 536871040 | 0 | N/A | 96
-PIN | CLK25EN | 536871040 | 0 | N/A | 95
-PIN | nBR_IOB | 536871040 | 0 | N/A | 116
PIN | nADoutLE1 | 536871040 | 0 | N/A | 136
-PIN | nAoutOE | 536871040 | 0 | N/A | 141
PIN | nRAMLWE | 536871040 | 0 | N/A | 104
PIN | nRAMUWE | 536871040 | 0 | N/A | 105
PIN | nROMCS | 536871040 | 0 | N/A | 58
+PIN | C25MEN | 536871040 | 0 | N/A | 95
+PIN | C20MEN | 536871040 | 0 | N/A | 96
+PIN | nRES | 536870976 | 0 | N/A | 145 | 3 | 4 | 7 | 0 | 4 | 0 | 3
diff --git a/cpld/XC95144XL/WarpSE.nga b/cpld/XC95144XL/WarpSE.nga
index 2e656dd..f7c4c6c 100644
--- a/cpld/XC95144XL/WarpSE.nga
+++ b/cpld/XC95144XL/WarpSE.nga
@@ -1,3 +1,3 @@
XILINX-XDB 0.1 STUB 0.1 ASCII
XILINX-XDM V1.6e
-$75747<,Fz_t)HW_EA'1<7)L880(B~[x%D[[AE#=0;%H.E025>"Hx]r/JUQKC%7:5+W6;2.D|Yv+FY]GG!3>9'_BA85+Rdt'3>.7290;%k5'0;294,&/83:1<$??;)3345<689:1==>?)018,470890:=:>?:03445/682":;=>51623>4178 ;;7%?70182<56=91:;%<>4(3:34?4?89094=>&119+75672::;<7=?01+15>.489:1?=>?:2234,&/;<:;6>;?0;1645/682"89=>53423>6378 n0$9>?:523>167!8:0$;>?0;4345<189:"==5'7123>26783=;<='>0:*:456=19:;64>?0(3844=6:2;;>6?>2:3157=6:3E^X][[:SC?54<76;1:??5>439217=6>;1:;?5>8392=4=5:28;>6<=2:0051=5;3CE\XZ5A^DPF94428497?:=;371?7153;297?7i;38JJUSS2Z]7>7>11:11?6653:897>==;261?6353:<97>9>;508054<<8808?<44208034<=9809?<45208114<=<809;<459081<7<>;1=17:2=9>69<2:576>11:2=<>6972:5:5>>531:975?=;901?=3531<9759=;9;2?<4<19805<<49308=64<1=8058<49708=25e9B[CUE48:5"]OK9:C\BVD;984o7LQISC>25;(WIM30MRH\B=31:a=FWOYI0<<1.QCG=>GXNZH7=>0k;@]EWG:6;7$[MI74A^DPF9736m1JSK]M<06=*UGC12KTJ^L3147?,SEA?e9B[CUE4825"]OK9:C\BVD;904o7LQISC>2=;(WIM20MRH\B=3=g>GXNZH7=3 _AE;8EZ@TJ58;2i5N_GQA8769&YKO56OPFR@?648c3HUM_O2=1?,SEA?e9B[CUE4;85"]OKb:C\BVD;::0:245N_GQA8759l2KTJ^L322<-TDB?3HUM_O2=>b9B[CUE4;4%\LJ7;@]EWG:46j1JSK]M<2<-TDB?3HUM_O2;>b9B[CUE4=4%\LJ7;@]EWG:26j1JSK]M<4<-TDB?3HUM_O29>b9B[CUE4?4%\LJ7;@]EWG:06j1JSK]M<6<-TDB?3HUM_O27>b9B[CUE414%\LJ7;@]EWG:>6j1JSK]M<8<-TDBc3HUM_OQ>0^KAQCb_H@VBa=FWOYIS<GXNZHT=>QFBTDg?DYA[KU:8RGMUGf8EZ@TJV;>SDLZFe9B[CUEW8UBNXHk;@]EWGY60VCIYKj4A^DPFZ7>W@H^J<<4A^DPFZ7>W@H^J)LZF137?DYA[KU:5RGMUG&AQC6)L8?0MRH\B^3:[LDRN-H^J= K1078EZ@TJV;2SDLZF%@VB5(C:8<0MRH\B^3:[LDRN-H^J= JXQ3a?DYA[KU:5RGMUG&AQC6)MQZT\YQ?1c9B[CUEW83TEO[I$CWE4+C_XVZ_S!EYR\pvojzldjahjPndv\51=FWOYIS<7PICWE GSA8'[h7LQISC]2[LDRNm1JSK]M_32\MGSAl2KTJ^LP20]JFP@6:2KTJ^LP20]JFP@#J\L;=95N_GQA[77XAK_M(O[I0/F21>GXNZHT>GXNZHT>!EYR\TQY69k1JSK]M_33\MGSA,K_M<#KWP^RW[77e3HUM_OQ=1^KAQC"E]O:%IU^PPU]062=FWOYIS??PICWE GSA8'OS\Rz|ilpfjdkblVdnxR?;;@]EWGY59VCIYK*MUG2-Ua=FWOYIS?GXNZHT>>QFBTD`?DYA[KU9SDLZFb9B[CUEW:UBNXHl;@]EWGY3W@H^Jn5N_GQA[0YNJ\Lh7LQISC]5[LDRNj1JSK]M_6]JFP@d3HUM_OQ7_H@VBf=FWOYIS4QFBTD0?GSA02H^_RGAFN08G@5EKC;:NB#^NDb9@HN47MGUDNXH>1:AOO76BFVEIYK*MUG227>EKC;:NBRAMUG&AQC6)L8>0OAE=0DL\KGSA,K_M<#J>159@HN47MGUDNXH+BTD3*A46=2IGG?>JN^MAQC"E]O:%IU^>a:AOO76BFVEIYK*MUG2-A]VXX]U;=l5LLJ03AKYHJ\L/NXH?.DZS[URX98k0OAE=0DL\KGSA,K_M<#KWP^RW[77f3JF@>=KA_N@VB!DRN9$NT]Q_T^12e>EKC;:NBRAMUG&AQC6)MQZT\YQ;279@HN47MGUDNXH+BTD3*@^WW}ybakaalgg[kcsW890OAE=0DL\KGSA,K_M<#_8;BNH60CIj2IGG?;JN/RB@f=DDB8>ICQ@BTDf?FJL:EKC;?NBRAMUG,G646UQFOC,SEA743JF@>UQFOC]JFP@(NJF@=95LLJ0[[LIEW@H^J"HLLJ/4?FJLWOYIn6MCK^DPF+VFL8;0OAEPFR@\MGSA'OIGG<<4CMI\BVDXAK_M#KMCK,58GIMXAFHi7NBD_HMA*UGCk2IGGRG@B^KAQC753JF@SDAM_H@VB*@DDB'27NABMHVWAA1EkgjaX|hm7;EcweVvbk<1Oiaov7:Fjwddkmh1NT]?;_/G[Tc=BPY;?S#KWP^RW[5`4^,F\UYW\V?:n6KWP06\*@^WW}ybakaalgg[kcsWh1NT]?:_/G[Tc=BPY;>S#KWP^RW[5`5^,F\UYW\V?:n6KWP07\*@^WW}ybakaalgg[kcsWh1NT]?9_/G[T4dU%IU^i;DZS52Y)MQZT\YQ?f:G[T41X&LR[S]ZP10`8A]V6?V$NT]Q{shoqakgjmmUeiyQn;DZS5=Y)MQZm7HV_19]-A]VXX]U;j6KWP0:\*@^WWY^T=k5JXQ3;[+C_XVZ_S?h4EYR2X&LR[S]ZP50`8A]V60V$NT]Q{shoqakgjmmUeiyQn;DZS5k5JXQ06[+C_XVZ_S>h4EYR11Z(BPYU[XR:i;DZS60Y)MQZT\YQ:1c9F\U42W'OS\Rz|ilpfjdkblVdnxRo4EYR12Z(BPYl0IU^=6^,F\UYW\V:m7HV_27]-A]VXX]U:j6KWP34\*@^WWY^T>k5JXQ05[+C_XVZ_S>?m;DZS63Y)MQZTx~gbrdlbi`bXfl~Tm6KWP35\*@^Wn2OS\?9P.DZS[URX8o1NT]<8_/G[TZVSW8l0IU^=7^,F\UYW\V8m7HV_26]-A]VXX]U8j6KWP35\*@^WWY^T8k5JXQ04[+C_XVZ_S8?m;DZS62Y)MQZTx~gbrdlbi`bXfl~Tm6KWP3:\*@^Wn2OS\?6P.DZS[URX8o1NT]<7_/G[TZVSW8l0IU^=8^,F\UYW\V8m7HV_29]-A]VXX]U8j6KWP3:\*@^WWY^T8k5JXQ0;[+C_XVZ_S8?m;DZS6=Y)MQZTx~gbrdlbi`bXfl~Tm6KWP3;\*@^Wn2OS\?7P.DZS[URX8o1NT]<6_/G[TZVSW8l0IU^=9^,F\UYW\V8m7HV_28]-A]VXX]U8j6KWP3;\*@^WWY^T8>P.DZS[URX9o1NT]=?_/G[TZVSW;l0IU^<0^,F\UYW\V9m7HV_31]-A]VXX]U?=o5JXQ13[+C_XV~xe`|jn`of`Zhb|Vk0IU^<1^,F\U`?P.DZS[URX:o1NT]=>_/G[TZVSW:l0IU^<1^,F\UYW\V>:n6KWP23\*@^WW}ybakaalgg[kcsWh1NT]==_/G[Tc=BPY99S#KWP^RW[5`R JXQ]SPZ7a3LR[??Q!EYR\TQY5n2OS\>Q!EYR\TQY5n2OS\>=P.DZS[URX;o1NT]=<_/G[TZVSW=;i7HV_32]-A]VX|zcf~h`nmdf\j`rXi2OS\>:P.DZSb>C_X:>T"HV__QV\4c=BPY9?S#KWP^RW[4`:P.DZS[URX<8h0IU^<4^,F\UYs{`gyicobee]maqYf3LR[?8Q!EYR2f>C_X:?T"HV__uqjiwciidooSck{_`9F\U51W'OS\k5JXQ15[+C_XVZ_S=h4EYR02Z(BPYU[XR?i;DZS73Y)MQZT\YQ=f:G[T60X&LR[S]ZP3g9F\U51W'OS\R^[_5d8A]V4>V$NT]Q_T^72f>C_X:U%IU^Ptrknv`hfelnTbhzP5:G\MJD>3LUBCO _AEc8AZOHJVCIYK94EeefRdj53OL87J`k2:KM7>OI8:1BB<:4IO330>OI98>0EC?=4:KM562OI9090EC<;;HL141=NF;;?7D@=259JJ7533@D9895FN377?LH5>=1BB?9;;HL1<1=NF;387D@<4:KM7523@ZG>>!D0;8MUJ5z9$O>55FPM0q4+Wf3@ZG>>!RDE5?LVK:{;37D^C2s3-@<=NXE8y=#J>9:KSH7t6&M837D^C2s3-Ud=NXE8y=#\JG99JjqBbdhs87AAL7:NLCLEFDj1Fmga}Vdppmjhd3DcecXjrrklj2=IM]]D^F=4OOG1?JT43F__?6^ND59SEWR03YCEBLCJa:RJJZDR[@NSn6^FN^@VWKGJM=1[me8;Qcqo+EB>2Zj~f K7:Rbvn(C9>1[me!D3:8Tdtl&LR[h6^nrj,F\UYW\V:o7]o}k/G[TZVSW8n0\l|d.DZS[URX:m1[me!EYR\TQY4901[me!EYR\pvojzldjahjPndv\2>Vfzb$Z46^nrj,QAB00?c8VD:687$[MI64R@>25?69>2XJ01:<=UI585"]OK5:PB868>3[K7?3 _AE78VD:3601YM1:1.QCG1>TF4<427_O35?,SEA389QE9>9&YKO96\N<8<:?WG;17$[MI74R@]3[JDRNk1YMR>POCWE*AeTFW9UDNXH!D332?WGX8VEIYK K2^RW[5763[KT3[KT=RAMUG`8VDY6WFH^J#Jl;SC\5ZIE]O$O=n5]A^3\KGSA&M8:=6\N_0]LFP@)L;U[XR>>1:PB[4YHJ\L%H?Q_T^3g?WGX9VEIYK JXQ31?WGX9VEIYK JXQ]SPZ66:2XJSc:PB[7YHJ\L%H?j4R@]1[JDRN'OS\<<4R@]1[JDRN'OS\R^[_131?WGX:VEIYK JXQ]SPZ76:2XJS?Q@BTD-A]VXX]U9=?5]A^0\KGSA&LR[S]ZP3008VDY5WFH^J#KWP^RW[17b3[KT>RAMUG,F\UYs{`gyicobee]maqYe3[KT>RAMUG,R=>TFW:UDNXHm;SC\7ZIE]O$Oo6\N_2]LFP@)L8i0^LQ<_N@VB+B5981YMR=POCWE*A4XX]U;=<5]A^1\KGSA&M8T\YQ>d:PB[6YHJ\L%IU^>2:PB[6YHJ\L%IU^PPU]357=UIV9TCO[I.DZS[URX98o0^LQ<_N@VB+C_XV~xe`|jn`of`Zhb|Vh0^LQ<_N@VB+W>3[KT8RAMUG`8VDY3WFH^J#Jl;SC\0ZIE]O$O=n5]A^6\KGSA&M8:=6\N_5]LFP@)L;U[XR>>1:PB[1YHJ\L%H?Q_T^3g?WGX:i6\N_4]LFP@)MQZTx~gbrdlbi`bXfl~Tn6\N_4]LFP@)Y01YMR8POCWEf>TFW?UDNXH!Db9QEZ0XGK_M"I?l;SC\2ZIE]O$O>TFW>UDNXH!D0a8VDY0WFH^J#J=109QEZ1XGK_M"IXGK_M"\74R@]:[JDRNk1YMR7POCWE*AeTFW0UDNXH!D3f8VDY>WFH^J#KWP008VDY>WFH^J#KWP^RW[5753[KT5RAMUG,F\UYW\V;:>6\N_8]LFP@)MQZT\YQ=139QEZ?XGK_M"HV__QV\744TB[Meei#J=b:PFWAiim'OS\TB[{:<7_K\r1,G<>TB[{:%H<64RDQq4+B5?2XN_>!Q89QAVt7&[OL96\JSs34?WCTz8$O46\JSs3-@4>.SGD1>TB[{8<7_K\r3,G<>TB[{8%H<64RDQq6+B5?2XN_STM[U]E^GMLD;8RLCPW]S[I>5Ycb48Sdtw[Lk0[l|SD,mcd3<_`nd?m4XB;6512_D$;;!Y_>01"+Wucbl)Lb`h4/Vdppmjh';':"86VKMM3g?]OKAGR&TIL/0/3#WQSE(9$:,L]LIH18\JT13QniSDjm;Yfk[Utne@d}o6Vkh^RqmhR~xll0TifPPsknR`ttafd37Ujg_Uknaa=_laU_e`kLhdah`>^c`V^bahJjl`{24>^ceVGjfb|Yesqjkk773QnfS@gaosTfvvohf=1QI_Ak;blw+WcaKg~7<3h4cov,V``Df}6;2#J>0:amp*TbnJd0=0!D033?fhs'[omOcz30?,G6c=df}%YikMat=2=*T763jd#_kiCov?4;(UMN;n7n`{/SgeGkr;87UdclrdcwaaYg{Uo7n`{/SgeGkr;97l0ocz Rdd@jq:66'N:<6mat.PfbFhs484%H1:+B682iex"\jfBlw878)L8;;7n`{/SgeGkr;:7$O>k5lnu-QacEi|585"\?>;blw+WcaKg~7>3 ]EF3f?fhs'[omOcz32?]wwlkdzlkiiQwos]g?fhs'[omOcz33?d8gkr(ZllHby2<>/F24>ei|&XnjN`{<2<-@4773jd#_kiCov?7;(C:o1hby!]egAmp959&X;:7n`{/SgeGkr;;7$YIJ?j;blw+WcaKg~7?3Q{sho`v`gsmmUscQk;blw+WcaKg~783h4cov,V``Df}6?2#J>0:amp*TbnJd090!D033?fhs'[omOcz34?,G6c=df}%YikMat=6=*T763jd#_kiCov?0;(UMN;n7n`{/SgeGkr;<7UdclrdcwaaYg{Uo7n`{/SgeGkr;=7l0ocz Rdd@jq:26'N:<6mat.PfbFhs4<4%H5:+B682iex"\jfBlw838)L8;;7n`{/SgeGkr;>7$O>k5lnu-QacEi|5<5"\?>;blw+WcaKg~7:3 ]EF3f?fhs'[omOcz36?]wwlkdzlkiiQwos]g?fhs'[omOcz37?d8gkr(ZllHby28>/F24>ei|&XnjN`{<6<-@4773jd#_kiCov?3;(C:o1hby!]egAmp919&X;:7n`{/SgeGkr;?7$YIJ?j;blw+WcaKg~7;3Q{sho`v`gsmmUscQm;blw+WcaLfdnh6mat.PfbAiim'Nn7n`{/Sge@jhb&M;n7n`{/Sge@jhb&M8:?6mat.PfbAiim'N9S]ZP0018gkr(ZllOcck!D3]SPZ7c3jd#_kiDnlf*T`d:amp*Rnele~xLQ{sho`v`gsmmUscQl;blw+QojmfNh5lnu-Wmhch}}H%Hk5lnu-Wmhch}}H%H4:amp*Rnele~xO K2^RW[5733jd#YgbenwwF+B5WY^T=<:4cov,Plkbg|~I"I1:amp*Rnele~xO^}e/F26>ei|&^bahaztCRqa+B69;1hby![ilglqqDWzl$O><94cov,Plkbg|~I\k!D3]SPZ66?2iex"ZfmdmvpGVum'N9S]ZP1058gkr(\`gncxzMPsg-@7YW\V8:?6mat.Vji`ir|KZyi#KWP0:8gkr(\`gncxzMPsg-A]VXX]U;=55lnu-Wmhch}}H[~h JXQ]SPZ75<2iex"ZfmdmvpGVum'OS\Rz|ilpfjdkblVdnxR?>;blw+QojmfN]|j.P30?fhs']cfib{{BQpf*WC@:91hby![ilglqqDWzlUdclrdcwaaYg{U:h6mat.Vji`ir|KUdclrdcwaaYg{Uh7n} nNtfvig~8l1h"`@vdpoe|6)Lo1h"`@vdpoe|6)L8l0o~!aOwgqhd7&M8:86m|/oMuawjfq9$O>R^[_137?fu(fF|n~aov0/F1[URX98:0o~!aOwgqhd7&LR[=85ls.lLr`tkip:%IU^PPU]350=d{&dDzh|cax2-A]VXX]U:><5ls.lLr`tkip:%IU^Ptrknv`hfelnTbhzPe:ap+kIqm{fju= ^119`w*hH~lxgmt>!RDE25>et'gE}ibny1,QWQ@6m2ix#cAyesnb}5Ys{`gh~ho{ee]svibX9m1h"`@vdpoe|6X|zcfokntdf\|jtXk2ix#cAyesnb}4``tj&HN^_>}.DZS[qune{oem`kk_ogw[f=a{k%II_\?r/Sf?cue'KOY^=|!RDEb?cue'KOY^<|l;gqa+GCUZ8x%Hi5isc-AAWT6z'N:h6h|b.@FVW7u&M8:>6h|b.@FVW7u&M8T\YQ?139ewg)EM[X:~#J=_QV\5f=a{k%II_\>r/Sf?cue'KOY^<|!RDEa?cue'[ojht>}d:dpf*Tbims;~#Jj;gqa+Wcflp:y"I?j;gqa+Wcflp:y"I<>3:dpf*Tbims;~#J=_QV\445}.DZS[URX88>0j~l Rdcg}5t)MQZT\YQ>159ewg)Umhnr< JXQ]SPZ4582lxn"\jae{3v+C_XV~xe`|jn`of`Zhb|Vn0j~l Rdcg}5t)Yo1mo!]e`fz4w(UMNh0j~l Rdcg}4tc3oyi#_kndx3q*Ac5isc-Qadb~9{$O>R^[_0d8bvd(Zlkou<|!EYR20>`tj&Xnmiw>r/G[TZVSW9;?7k}m/Sgb`|7u&LR[S]ZP1068bvd(Zlkou<|!EYR\TQY59=1mo!]e`fz5w(BPYU[XR==0:dpf*Tbims:~#KWP^vpmhtbfhgnhR`jt^f8bvd(Zlkou<|!Qg9ewg)Umhnr= ]EF`8bvd(Zlkou?|k;gqa+Wcflp8y"Ik4fr`,V`gcq;x%H K2^RW[6743oyi#_kndx0q*A4XX]U?=>5isc-Qadb~:{$O>R^[_4f8bvd(Zlkou?|!Qg9ewg)Umhnr> ]EF58bvd(^YK27k}m/WRB*Agi;gqa+SVF&M8T\YQ>f:dpf*PWI'N9S]ZP2g9ewg)QXH$O>R^[_2d8bvd(^YK%H?Q_T^6e?cue'_ZJ"I`tj&\[M#J=_QV\2<=a{k%]\L ^b:dpf*PWI'XNKl5isc-m@QGDCj1mo!aDUC@O+Bc3oyi#cJ[ABI-@4b2:dpf*hC\HI@"I`tj&dOXLMD.E0\TQY1k2lxn"`KT@AH*Tc;hmai*GKM9$O>R^[_032?liee&KGI= K2^RW[7dohjd%IK>!RDE:?liee&HL~ohjd%IK?!RDE`?liee&N_MNE}fd9jkgk(L]KHGh!Dg9jkgk(L]KHGh!D0d8mjdj'M^JOF|i.E0f?liee&N_MNE}f/S24>ohjd%OXLMDrg,QABeohjd%OXLMDrs,Gb>ohjd%OXLMDrs,G5c=ngkg$HYOLKsp-@7c3:f=ngkg$I^2?>/Fg?liee&OX0=0!D0f8mjdj'LY7<3 K2008mjdj'LY7<3 K2^RW[5753`eia"K\<1<-@7YW\V;:>6g`bl-FW969&M8T\YQ=c:klfh)B[5:5"\k4in`n+@U;87$YIJ?m;hmai*CT494Tx~gbcsgbp`bXpfxTm6g`bl-FW979k2cdn`!JS=3=*Ab>/F157=ngkg$I^2>>/F1[URX8880eblb/DQ?5;(C:VZ_Sohjd%N_1<1.E0\TQY59;1bcoc ER>1:+B5WY^T?<<4in`n+@U;:7$O>R^[_5a8mjdj'LY7>3 ^e:klfh)B[585"_KHa:klfh)B[595o6g`bl-FW959&Mn0eblb/DQ?7;(C9m1bcoc ER>0:+B59;1bcoc ER>0:+B5WY^T<<<4in`n+@U;;7$O>R^[_031?liee&OX0>0!D3]SPZ4d3`eia"K\<2<-U`=ngkg$I^2<>/PFC4d6g`bl-FW929&M8T\YQ?139jkgk(MZ6?2#J=_QV\544ohjd%NXLMD.E0f?liee&O_MNE!EYR27>ohjd%NXLMD.DZS[URX8890eblb/DVBGN(BPYU[XR?>3:klfh)B\HI@"HV__QV\645ohjd%N~#Jn;hmai*Cu&M;j7damm.Gq*A4>3`eia"K}.P`8mjdj'Lx%^HI7;hmai*Cu:h1bcoc Es0-@g=ngkg$I6g`bl-JKDES&M8T\YQ=139jkgk(AFKHX#J=_QV\7442:klfh)NGHI_"Iohjd%BCLM[.Pg8mjdj'@EJOY ]EF`8mjdj'@EII_\k;hmai*OHJLXY"Ik4in`n+LIEM[X%H5foco,MJDBZ[$O>R^[_4f8mjdj'@EII_\!Qg9jkgk(AFHN^_ ]EF3`?liee&CDNH\]_uqjiftbi}ooSua}_c9jkgk(AFXN]j4in`n+LIUMXx%Hh5foco,MJTBY{$O=h5foco,MJTBY{$O>i5foco,MJTBY{$Zj6g`bl-JKWCVz'XNKohjd%BC^QISL]EBa7)ZLM:=6g`bl-JKVYA[DUMJi<>3:klfh)NGZUM_@QIFe0-@42ohjd%BC^QISL]EBa4)L;U[XR>>9:klfh)NGZUM_@QIFe0-@7YW\V;:56g`bl-JKVYA[DUMJiohjd%BC^QISL]EBa4)L;U[XR:>3:klfh)NGZUM_@QIFe0-U43ohjd%BC^QISL]EBa5)L;;27damm.KLWZ@TEVLMh> K2^RW[57>3`eia"G@S^DPIZ@Al:$O>R^[_03:?liee&CD_RH\M^DE`6(C:VZ_S??<;hmai*OH[VLXARHId2,R50=ngkg$EB]PFRO\BCb4&[OLm6g`bl-QAVtak2cdn`!]ERpe*Abohjd%YI^|i.Pg8mjdj'[OX~k ]EFc8mjdj'[OX~m4in`n+WCTz{$Oh6g`bl-QAVtu&M;o7damm.PFWwt)L;i0eblb/SGPvw(Vm2cdn`!]ERpq*WC@i2cdn`!YP@peg>ohjd%]\L|i.Ef8mjdj'_ZJ~k K1e9jkgk(^YKyj#J=c:klfh)QXHxm"\k4in`n+SVFzo$YIJo4in`n+SVFz{i0eblb/WRBvw(Cl2cdn`!YP@pq*A7c3`eia"X_Asp-@7eohjd%]\L|}.SGDf>ohjd%eM^aztd9jkgk(fHYdyy*@Ee9jkgk(fHYdyy*^149jkgk(fHYdyy MUGMF*JSSl2cdn`!aARmvp+Bb3`eia"`NSnww*A7b3`eia"`NSnww*A46;2cdn`!aARmvp+B5WY^T<<=4in`n+kGTg|~%H?Q_T^3g?liee&dJ_b{{.Pd8mjdj'gKXcxz!RDE24>ohjd%eM^azt/VQWQdohjd%eHd`CE/G[TZrtadxnblcjd^lfpZbohjd%eHb{{OD,Gb>ohjd%eHb{{OD,G5c=ngkg$bIaztNG-@7733`eia"`KotvLA+B5WY^T<<:4in`n+kBh}}EN"Iohjd%eHb{{OD,R55=ngkg$bIaztNG-V@A>3`eia"`CDRa8mjdj'gFO_)AJ129jkgk(fENX"O[IOD,LQQd1:klfh)iDMY%H?Q_T^225>ohjd%e@I]!D3]SPZ7692cdn`!aLEQ-@7YW\V8i7damm.lO@V(Vl2cdn`!aLEQ-V@Ab3`eia"`CDR,WVVR>3`eia"`ZDRa8mjdj'g_O_)AJ129jkgk(f\NX"O[IOD,LQQd1:klfh)i]MY%H?Q_T^225>ohjd%eYI]!D3]SPZ7692cdn`!aUEQ-@7YW\V8i7damm.lV@V(Vl2cdn`!aUEQ-V@Ab3`eia"`ZDR,WVVR>3`eia"`YM@a8mjdj'g\FM)AJb:klfh)i^DK/]<=4in`n+kPJI'H^JBK!OTVa?liee&d]AL Kc:klfh)i^DK%Hohjd%eZ@O!Qe9jkgk(f_GJ"_KHe:klfh)i^DK%X_][1`9jkgk(f_GJSy}fmbpfeqccWqeyS45focq,EIC7j2cdn~!NLD2-@f=ngky$MAK?.E3`?lie{&KGI= K2c9jkgu(IEO;"\j4in`p+DJB8'XNK45focq,EIC612cdn~!MESPa?lie{&HN^_ Kc:klfv)EM[X%H.DZS[URX88>0ebl|/Bnfew7)MQZT\YQ>219jkgu(Keoj~< JXQ]wwlkumgkfiiQaeu]g?lie{&Igil|>.Pd8mjdt'Jfnm?!RDEa?lie{&CDMNZ}d:klfv)NGHI_~#Jj;hmaw*OHIJ^y"I?j;hmaw*OHIJ^y"Ic:klfv)NGE;%OHl4in`p+LIK9'Nh7dams.KLH4(C9j1bco} INN2*A4e3`ei"G@L0,R`>ohjz%BCA?!RDEb?lie{&CD^H_l;hmaw*OHZL[%Hi5focq,MJTBY'N:h6g`br-JKWCV&M8:>6g`br-JKWCV&M8T\YQ?139jkgu(AFXN]#J=_QV\5442:klfv)NG[OZ"Iohjz%BC_Y?.E0\TQY49;1bco} INPT4+B5WY^T8<<4in`p+LIU_9$O>R^[_431?lie{&CD^Z>!D3]SPZ0d3`ei"G@RV2-U`=ngky$EB\X0/PFC4d6g`br-JKWQ6&M8T\YQ?139jkgu(AFX\=#J=_QV\5442:klfv)NG[]:"I4:klfv)NG[ojht K2^RW[6773`ei"G@Rdcg}+C_X;;0ebl|/HMQadb~&LR[Sy}fmsgmehccWgoSh5focq,MJTbims%]<>4in`p+LIUmhnr"_KH1e9jkgu(AFXnmiwPtrkngwcf|lnTtb|P9:klfv)NG\:h7dams.KLQ5(DMk1bco} INW3*Aeohjz%BCX>!D332?lie{&CDY= K2^RW[5763`ei"G@U1,G6ZVSW8h0ebl|/HMV4+Wc3`ei"G@U1,QAB?.SGDe>ohjz%Gclj>c:klfv)Kghn:"Ij4in`p+Iifl8$O=i5focq,Hjgc9'N9=?5focq,Hjgc9'N9S]ZP0008mjdt'Eejh< K2^RW[4753`ei"B`ae3-@7YW\V8:>6g`br-Okdb6&M8T\YQ<139jkgu(Dfko=#J=_QV\044<64in`p+UUXNZGTJKj>.E0\TQY7911bco} PR]EWHYANm;%H?Q_T^326>ohjz%[_RH\M^DE`4(V9=1bco} PR]EWHYANm;%^HI>0:klfv)W[VLXARHId331?lie{&ZXSK]B_GDg6+B6;2cdn~!_S^DPIZ@Al;$O=<=4in`p+UUXNZGTJKj=.E02<>ohjz%[_RH\M^DE`7(C:VZ_S=?7;hmaw*VTWOYFSKHk2/F1[URX9820ebl|/QQ\BVKXNOn9"I8:klfv)W[VLXARHId3,G6ZVSW=;37dams.RP[CUJWOLo>#J=_QV\14>109mEAir|EO:SBLZF/F153=iIMe~xAK>_N@VB+B5WY^T<<84n@FlqqJB9VEIYK K2^RW[4773gKOcxzCE0]LFP@)Y880bLJ`uuNF5ZIE]O$YIJ94n@Q\BVDe3gKXSK]M.QCGg>hF[VLXNRGMUG58jDUXAFHi7cO\_HMA*UGC?2dJcxz@Ec9mEjssGL$[MIm4n@mvpJCXGK_Mi6`NotvLAZIE]O$Oj6`NotvLAZIE]O$O=k5aAnwwK@YHJ\L%H??;;oClqqIBWFH^J#J=_QV\442hFg|~DIRAMUG,QAB?hEM[XTJ^LPOCWE*A7692dII_\PFR@\KGSA&M8::6`MESP\BVDXGK_M"I7:lAAWTXNZHTCO[I.DZS[URX:;90bOK]R^DPFZIE]O$NT]Q{shoqakgjmmUeiyQ>0:lAAWTXNZHTCO[I.P;8jGCUZVCDNi5aBDPQ[LIE&YKOi6`MESP\MJDXAK_M;6`MG^KLFg=iJNUBCO _AEa8jGAXAFHTEO[I7:lAVZOHJk1eN_QFOC,SEA2hCagENSBLZF/Ff?kBnfFOTCO[I.E3f?kBnfFOTCO[I.E027>hCagENSBLZF/F1[URX8890bIgaOD]LFP@)L;U[XR?>3:lGmkIBWFH^J#J=_QV\6a=iL`dDIRAMUG,R3>hCg|~DIo5aDnwwK@(WIM?0bD^C289mMUJ5&YKOm6`FPM0\MGSA02dGH^QISCa8jIBTWOYI"]OKd:lO@VYA[KUBNXH7;oNGWZOHJj1e@I]PIN@-TDB43gEN;6`@E/RB@==iGLUDNXHn;oMF[JDRN'Ni7cAJ_N@VB+B6j2dDIRAMUG,G6f=iGLUDNXH!EYR25>hHMVEIYK JXQ]SPZ6692dDIRAMUG,F\UYW\V;:=6`@E^MAQC(BPYU[XR<>1:lLAZIE]O$NT]Q_T^125>hHMVEIYK JXQ]SPZ26l2dDIRAMUG,F\UYs{`gyicobee]maqYf3gENSBLZF/S4?kTFEE]Nn6`]ALNTA+VFLj1e^LCCWD]LFP@b3gXJAAYJ_N@VB+Ba3gXJAAYJ_N@VB+B6n2dYM@BXE^MAQC(C:8:0b_OBLVG\KGSA&LR[=85aR@OOS@YHJ\L%IU^PPU]350=iZHGG[HQ@BTD-A]VXX]U:=85aR@OOS@YHJ\L%IU^PPU]164=iZHGG[HQ@BTD-A]VX|zcf~h`nmdf\j`rXm2dYM@BXE^MAQC(V?2dYM@[XEc9mVDKR_L$[MIm4nSCNQRCXGK_Mi6`]ALWTAZIE]O$Oj6`]ALWTAZIE]O$O=k5aR@OVS@YHJ\L%H???;oPBIPQBWFH^J#KWP078jWGJ]^OTCO[I.DZS[URX88?0b_OBUVG\KGSA&LR[S]ZP1078jWGJ]^OTCO[I.DZS[URX:8?0b_OBUVG\KGSA&LR[S]ZP3078jWGJ]^OTCO[I.DZS[URX<;;0b_OBUVG\KGSA&LR[Sy}fmsgmehccWgoSh5aR@OVS@YHJ\L%]95aR@Q;?kTF['ZJH45aR@Q\KGSAj2dYM^Q@BTD-@f=iZHYTCO[I.E3`?kTF[VEIYK K2e9mVDUXGK_M"HV_139mVDUXGK_M"HV__QV\4442:lQEVYHJ\L%IU^PPU]057=iZHYTCO[I.DZS[URX<8o0b_O\_N@VB+C_XV~xe`|jn`of`Zhb|Vh0b_O\_N@VB+W33gXN_55aRDQ-TDB>3gXN_RGMUG48jWIJKZk0b_ABCR,SEAdhUGDIXSBLZF/G[T42hUGDIXSBLZF/G[TZrtadxnblcjd^lfpZbhRLZUM_Om4nTFP[CUE&YKOh6`ZDR]EWGYNJ\L37c[KS^KLFf=i]MYTEBL!P@F;?kPJIVCDNn5aVLC\MJD)XHN37cX_A^DPFf=i^YKTJ^L!P@Fg?kPWIVLXNRAMUGd8jSVFWOYISBLZF/F24>hQXHUM_OQ@BTD-@4773g\[MRH\B^MAQC(C:o1eZ]OPFR@\KGSA&X20b[^N_HMAg>hQXHUBCO _AEf8jSVFW@EISDLZF69mS@YA[Kh0bZKPFR@-TDBd3g]NSK]M_H@VB1=iido<7ckheeef3>vh{lnli45}al-AEFRuj2xja"LNCUp-@f=uid%IMNZ}.E3`?wgj'KKHX K2c9qeh)EIJ^y"\j4r`o,FDESz'XNK55}al-Ljfcf3{kf#B`le/Fa?wgj'Fdhi#J>b:pbi*Iikl$O><>4r`o,Kkeb&M8T\YQ?119qeh)Hfjo%H?Q_T^324>tfe&Eeoh K2^RW[7773{kf#B`le/F1[URX;8:0~lc Ooaf*A4XX]U?m6|nm.Mmg`(Vk2xja"Aacd,QAB7>3{kf#B`le^vpmheumh~nhRv`r^`8vdk(ZHGOE^?k;scn+WGJL@Y:"Ik4r`o,VDKCAZ;%H5}al-QEHBN[8$O>R^[_430?wgj'[KFHD]>.E0\TQY1l2xja"\NMEKP5+Wa3{kf#_OBDHQ2*WC@j2xja"\NMEKP6a=uid%YM@JFS3,Ga>tfe&XJAIG\2/F2a>tfe&XJAIG\2/F156=uid%YM@JFS3,G6ZVSW9;87ob/SCN@LU5&M8T\YQ>129qeh)UIDNB_? K2^RW[7743{kf#_OBDHQ1*A4XX]U8=>5}al-QEHBN[;$O>R^[_530?wgj'[KFHD]=.E0\TQY2l2xja"\NMEKP6+Wa3{kf#_OBDHQ1*WC@9j1ym`!]ALFJW7Ys{`gh~ho{ee]{kwYd3{kf#_OBRdcg}`=uid%YM@\jae{-@c=uid%YM@\jae{-@4`tfe&XJA_kndx,G6ZVSW=;?7ob/SCNV`gcq'N9S]ZP5068vdk(ZHGYiljv.E0\TQY1m2xja"\NMSgb`|(V991ym`!]ALPfea)ZLM27ob/SCPAId1:pbi*TF[LF%H?Q_T^225>tfe&XJ_HB!D3]SPZ7692xja"\NSDN-@7YW\V8:=6|nm.PBW@J)L;U[XR=>1:pbi*TF[LF%H?Q_T^625>tfe&XJ_HB!D3]SPZ3692xja"\NSDN-@7YW\V?8;scn+WUXNZGTJKj>.E0\TQY39>1ym`!]S^DPIZ@Al8$O>R^[_434?wgj'[YTJ^CPFGf2*A4XX]U==<5}al-QWZ@TEVLMh< ^129qeh)U[VLXARHId0,QAB`6|nm.PP[CUJWOLo>#J>139qeh)U[VLXARHId3,G641>7:pbi*TTWOYFSKHk2/F1[URX98=0~lc RR]EWHYANm8%H?Q_T^023>tfe&XXSK]B_GDg6+B5WY^T?<94r`o,VVYA[DUMJi#_>3:pbi*TTWOYFSKHk2/PFCc=uid%Y_RH\M^DE`6763{kf#_]PFRO\BCb4&M;97ob/SQ\BVKXNOn8"I?>2:pbi*TTWOYFSKHk3/F152=uid%Y_RH\M^DE`6(C:VZ_S=?8;scn+WUXNZGTJKj<.E0\TQY69>1ym`!]S^DPIZ@Al:$O>R^[_334?wgj'[YTJ^CPFGf0*A4XX]U8=:5}al-QWZ@TEVLMh> K2^RW[1703{kf#_]PFRO\BCb4&M8T\YQ:169qeh)U[VLXARHId2,G6ZVSW?;:7ob/SQ\BVKXNOn8"\?<;scn+WUXNZGTJKj<.SGDe>tfe&Xnj_O\c:pbi*Tbn[KX"Ij4r`o,V``UIZ$O=i5}al-QacTF['N9o6|nm.PfbWGT&Xo0~lc RddQEV(UMN20~lc nBCPe>tfe&dHM^ Kb:pbi*hDIZ$O=o5}al-mGDU)L;i0~lc nBCP*@^W9m1ym`!aC@Q-A]VX|zcf~h`nmdf\j`rXi2xja"`LAR,Rg>tfe&dHM^ ]EF78rdjrmtJK|5?n3:BC|7?>2O096n382h6s\ec81=f<2289?44o7:32gbg=c:031<7?51zQfg?4>k3?1=>:79`:965bai2|_:94?:082>074sZoh6?7l:48271>>i109{#:0<1=nh4$0f4>7?e3k8247>54`8673<29:qC>4;4$3;7>7??3Si96>u=5;3:>7d=u`396=4+1ec9<4=i9m31i65f9183>!7ci32:7c?k9;d8?l0a290/=io5809m5a?=021b:i4?:%3ge?>63g;o5774;h4a>5<#9mk14<5a1e;9e>=n>00;6)?ka;:2?k7c13h07d88:18'5ag=081e=i75c:9j20<72-;om76>;o3g=?b<3`296=4+1ec9<4=i9m31<65f7g83>!7ci32:7c?k9;38?l1c290/=io5809m5a?=:21b;o4?:%3ge?>63g;o57=4;h54>5<#9mk14<5a1e;90>=n?<0;6)?ka;:2?k7c13?07d9<:18'5ag=081e=i756:9j34<72-;om76>;o3g=?1<3`nm6=44i4d1>5<d`81=5=i9m31=65f5b194?=n=121<75f5d394?=nm>0;66g:6983>>o20<0;66g:6c83>>o6100;66g:7583>>o2mo0;66g89;29 4bf21;0b3290/=io5809m5a?=9<10e5850;&2`d4:9j<=<72-;om76>;o3g=?7432c3m7>5$0fb>=75<#9mk14<5a1e;954=d`8;5>h6l00:<65f29a94?"6lh095=5a1e;96>=h=l<1<75`55a94?=h=1h1<75`5d694?=h=>81<75`1dc94?"6lh0:ih5a1e;9f>=h9o;1<7*>d`82a`=i9m31m65`1g194?"6lh0:ih5a1e;9=>=h9o?1<7*>d`82a`=i9m31465`1g594?"6lh0:ih5a1e;93>=h9o31<7*>d`82a`=i9m31:65`1g`94?"6lh0:ih5a1e;91>=h9on1<7*>d`82a`=i9m31865`1gd94?"6lh0:ih5a1e;97>=h:9;1<7*>d`82a`=i9m31>65`54;94?=h=1n1<75`5e694?=h=l21<75`56594?=h=191<75`52494?=h=>31<75`5c794?=h=>:1<75`1dd94?"6lh0:ih5a1e;94>=h9li1<7*>d`82a`=i9m31=65`c483>>ic<3:17b;9e;29?j34n3:17b;;e;29?j3>j3:17b;n7;29?j3d>3:17o7<:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo1845+1e:90<=d49U6d5=9rF9m84>{Wd3>7}#9l31=i;4V0;`>7}#=o=1j6*:f78e?x{zu2wi5<4?:083>5}#:h;1=i84H3;6?l7c>3:1(?o>:0f5?!7dm3>97)?k8;61?>{ejo0;6?4?:1y'6d7=k81C>4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3l0(8h9:g9~yx{:183!4f93;o:6F=949j5a0=83.9m<4>d79'5fc=9h1/=i651`98yg?>29096=4?{%0b5?e63A8296g>9g83>!4f93;2j65`1e794?"5i80:h85Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=n2.>j;4i;|~y>{e>l0;6<4?:1y'6d7=9m<0D?7:;h3g2?6=,;k:67[2B9585f1e494?"5i80:h;5+1bg952=#9m21=:54}c;4>5<5290;w)=2c:5k4?:%0b5?7>n21d=i;50;&1e4<6l<1]>l=51zN1e0<6s_l;6?u+1d;95a3<^83h6?u+5g59b>"2n?0m7psr}:a2d<7280;6=u+2`395a0<@;3>7d?k6;29 7g628n=7)?le;35?!7c03;=76sm9783>7<729q/>l?5c09K6<35$3c2>4b23_8j?7?tL3c6>4}Qn909w)?j9;3g1>P61j09w);i7;d8 0`12o1vqps4}c4;>5<6290;w)N51<1b=i850;&1e4<6l?1/=nk55`9'5a>==h10qo7::181>5<7s-8j=7m>;I0:1>o61o0;6)=h9m?1<7*=a082`0=Q:h91=vB=a482S`72;q/=h751e78R4?d2;q/9k95f:&6b34<729q/>l?51e48L7?23`;o:7>5$3c2>4b13-;hi7;=;%3g5}#:h;1o<5G2878m4?a290/>l?518d8?j7c=3:1(?o>:0f6?S4f;3;p@?o::0yUb5<5s-;n57?k5:T2=f<5s-?m;7h4$4d5>c=zutw0qo6<:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo1>;5+1e:963=d49U6d5=9rF9m84>{Wd3>7}#9l31=i;4V0;`>7}#=o=1j6*:f78e?x{zu2wi4=4?:083>5}#:h;1=i84H3;6?l7c>3:1(?o>:0f5?!7dm3897)?k8;01?>{ej>0;6?4?:1y'6d7=k81C>4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3l0(8h9:g9~yx{:183!4f93;o:6F=949j5a0=83.9m<4>d79'5fc=:91/=i652198ygge29096=4?{%0b5?e63A8296g>9g83>!4f93;2j65`1e794?"5i80:h85Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=n2.>j;4i;|~y>{e?j0;6<4?:1y'6d7=9m<0D?7:;h3g2?6=,;k:67[2B9585f1e494?"5i80:h;5+1bg95`=#9m21=h54}c;g>5<5290;w)=2c:5k4?:%0b5?7>n21d=i;50;&1e4<6l<1]>l=51zN1e0<6s_l;6?u+1d;95a3<^83h6?u+5g59b>"2n?0m7psr}:a33<7280;6=u+2`395a0<@;3>7d?k6;29 7g628n=7)?le;3g?!7c03;o76sm9b83>7<729q/>l?5c09K6<35$3c2>4b23_8j?7?tL3c6>4}Qn909w)?j9;3g1>P61j09w);i7;d8 0`12o1vqps4}c57>5<6290;w)N51<1b=i850;&1e4<6l?1/=nk51b9'5a>=9j10qo7m:181>5<7s-8j=7m>;I0:1>o61o0;6)=h9m?1<7*=a082`0=Q:h91=vB=a482S`72;q/=h751e78R4?d2;q/9k95f:&6b34<729q/>l?51e48L7?23`;o:7>5$3c2>4b13-;hi7?m;%3g5}#:h;1o<5G2878m4?a290/>l?518d8?j7c=3:1(?o>:0f6?S4f;3;p@?o::0yUb5<5s-;n57?k5:T2=f<5s-?m;7h4$4d5>c=zutw0qok?:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo1>>5+1e:966=d49U6d5=9rF9m84>{Wd3>7}#9l31=i;4V0;`>7}#=o=1n6*:f78a?x{zu2wii?4?:383>5}#:h;1o<5G2878m4?a290/>l?518d8?j7c=3:1(?o>:0f6?M4f82\9m>4>{M0b1?7|^o:1>v*>e882`0=Q90i1>v*:f68a?!3a>3h0qpsr;|`6b6<7280;6=u+2`395a0<@;3>7d?k6;29 7g628n=7)?le;0b?!7c038j76sm5g694?4=83:p(?o>:b38L7?23`;2j7>5$3c2>4?a32e:h84?:%0b5?7c=2\9m>4>{M0b1?7|^o:1>v*>e882`0=Q90i1>v*:f68e?!3a>3l0qpsr;|`f0?6=93:16=4+2`395a3<^;k86k38p(8h8:c9'1c0=j2wvqp5rbd494?4=83:p(?o>:b38L7?23`;2j7>5$3c2>4?a32e:h84?:%0b5?7c=2B9m=5Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=j2.>j;4m;|~y>{e==k1<7?50;2x 7g628n=7E<65:k2`3<72-8j=7?k6:&2g`<5m2.:h54=e:9~f02e29096=4?{%0b5?e63A8296g>9g83>!4f93;2j65`1e794?"5i80:h85Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=n2.>j;4i;|~y>{e:1l1<7?50;2x 7g628n=7E<65:k2`3<72-8j=7?k6:&2g`<3;2.:h54;3:9~f7?629096=4?{%0b5?e63A8296g>9g83>!4f93;2j65`1e794?"5i80:h85Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=n2.>j;4i;|~y>{e=j>1<7?50;2x 7g628n=7E<65:k2`3<72-8j=7?k6:&2g`<2k2.:h54:c:9~f0e229096=4?{%0b5?e63A8296g>9g83>!4f93;2j65`1e794?"5i80:h85Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=n2.>j;4i;|~y>{e=131<7?50;2x 7g628n=7E<65:k2`3<72-8j=7?k6:&2g`<5l2.:h54=d:9~f0>f29096=4?{%0b5?e63A8296g>9g83>!4f93;2j65`1e794?"5i80:h85Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=n2.>j;4i;|~y>{e=l81<7?50;2x 7g628n=7E<65:k2`3<72-8j=7?k6:&2g`<5n2.:h54=f:9~f0c429096=4?{%0b5?e63A8296g>9g83>!4f93;2j65`1e794?"5i80:h85Y2`195~J5i<0:w[h?:3y'5`?=9m?0Z<7l:3y'1c1=n2.>j;4i;|~y>{em10;6<4?:1y'6d7=9m<0D?7:;h3g2?6=,;k:67[9g83>!4f93;2j65`1e794?"5i80:h85G2`28R7g428qG>l;51zTe4?4|,8o26{zut1vn886:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo18h5+1e:90`=52;294~"5i80h=6F=949j5<`=83.9m<4>9g98k4b2290/>l?51e78R7g428qG>l;51zTe4?4|,8o26{zut1vn869:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo19i5+1e:91a=52;294~"5i80h=6F=949j5<`=83.9m<4>9g98k4b2290/>l?51e78R7g428qG>l;51zTe4?4|,8o26{zut1vn88l:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo18n5+1e:90f=52;294~"5i80h=6F=949j5<`=83.9m<4>9g98k4b2290/>l?51e78R7g428qG>l;51zTe4?4|,8o26{zut1vn<7n:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo1>:5+1e:962=52;294~"5i80h=6F=949j5<`=83.9m<4>9g98k4b2290/>l?51e78R7g428qG>l;51zTe4?4|,8o26{zut1vn89::182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo19=5+1e:915=52;294~"5i80h=6F=949j5<`=83.9m<4>9g98k4b2290/>l?51e78R7g428qG>l;51zTe4?4|,8o26{zut1vn8h?:182>5<7s-8j=7?k6:J1=0=n9m<1<7*=a082`3=#9jo18k5+1e:90c=52;294~"5i80h=6F=949j5<`=83.9m<4>9g98k4b2290/>l?51e78R7g428qG>l;51zTe4?4|,8o26{zut1vn:o50;394?6|,;k:6o6l?0;6)"6kl0>j6*>d986b>=zjh31<7<50;2x 7g62j;0D?7:;h3:b?6=,;k:6<7i;:m2`0<72-8j=7?k5:T1e6<6sE8j97?tVg296~"6m00:h85Y18a96~"2n>0m7);i6;d8yx{z3th397>51;294~"5i80:h;5G2878m4b1290/>l?51e48 4eb2?:0(7>50z&1e45<#:h;1=i;4V3c0>4}K:h?1=vXi0;0x 4c>28n>7[?6c;0x 0`02o1/9k85f:~yx=zj1=1<7?50;2x 7g628n=7E<65:k2`3<72-8j=7?k6:&2g`<192.:h5491:9~fgg=8381<7>t$3c2>f7<@;3>7d?6f;29 7g6283m76a>d483>!4f93;o96X=a282I4f=3;pZk>52z&2a<<6l<1]=4m52z&6b250z&1e4<6l?1C>4;4i0f5>5<#:h;1=i84$0af>34<,8n36;<4;|`af?6=:3:1N51<1b=4h50;&1e4<61o10c4b23_;2o7c=#=o<1j6sr}|9~f=d=83;1<7>t$3c2>4b13A8296g>d783>!4f93;o:6*>cd815>"6l109=65rbca94?4=83:p(?o>:b38L7?23`;2j7>5$3c2>4?a32e:h84?:%0b5?7c=2\9m>4>{M0b1?7|^o:1>v*>e882`0=Q90i1>v*:f68e?!3a>3l0qpsr;|`;`?6=93:16=4+2`395a3<^;k86k38p(8h8:g9'1c0=n2wvqp5rb9d94?7=83:p(?o>:0f5?M4>=2c:h;4?:%0b5?7c>2.:oh4<4:&2`=<4<21vnok50;094?6|,;k:6n?4H3;6?l7>n3:1(?o>:0;e?>i6l<0;6)P5i:0:wAd49U5j:4i;%7e2?`4<729q/>l?51e48L7?23`;o:7>5$3c2>4b13-;hi7:;;%3g5}#:h;1o<5G2878m4?a290/>l?518d8?j7c=3:1(?o>:0f6?S4f;3;p@?o::0yUb5<5s-;n57?k5:T2=f<5s-?m;7h4$4d5>c=zutw0qo;j7;295?6=8r.9m<4>d79K6<31b<3th>i;4?:283>5}#:h;1>4=4H3;6?l7>n3:1(?o>:0;e?S4f;3;p@?o::0yUb5<5s-;n57?6f:T2=f<5s-?m;7j4$4d5>a=zutw0ehj50;&1e44>{M0b1?7|^o:1>v*>e88f`>P61j09w);i7;48 0`12?1vqps4o0f6>5<#:h;1=i;4V3c0>4}K:h?1=vXi0;0x 4c>28n>7[?6c;0x 0`02?1/9k856:~yx=zj<>o6=4>:183!4f93;o:6F=949l5a0=83.9m<4>d79'5fc===1/=i655598yg33k3:1?7>50z&1e4<51:1C>4;4i0;e>5<#:h;1=4h4V3c0>4}K:h?1=vXi0;0x 4c>283m7[?6c;0x 0`02m1/9k85d:~yx=nmm0;6){zut1d=i;50;&1e4<6l<1]>l=51zN1e0<6s_l;6?u+1d;95a3<^83h6?u+5g592>"2n?0=7psr}:a1=e=83;1<7>t$3c2>4b13A8296a>d783>!4f93;o:6*>cd865>"6l10>=65rb4:a>5<4290;w)N51<1b=4h50;&1e4<61o1]>l=51zN1e0<6s_l;6?u+1d;95<`<^83h6?u+5g59`>"2n?0o7psr}:kf`?6=,;k:6hj4V3c0>4}K:h?1=vXi0;0x 4c>2ln0Z<7l:3y'1c1=>2.>j;49;|~y>i6l<0;6)P5i:0:wAd49U5j:49;%7e2?04<729q/>l?51e48L7?23f;o:7>5$3c2>4b13-;hi7;<;%3go61o0;6)P5i:0:wA9g9U5j:4k;%7e2?bl=51zN1e0<6s_l;6?u+1d;9aa=Q90i1>v*:f685?!3a>3<0qpsr;n3g1?6=,;k:669b81!3a?3<0(8h9:79~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2;30(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:i0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{7>51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:k0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:20(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:<0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:?0(0;6?4?:1y'6d7=k81C>4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:=0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:30(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:h0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:n0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{7>51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:l0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{m7>51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2=k0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2:90(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2::0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb24;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2<=0(0;6?4?:1y'6d7=k81C>4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2<30(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2<<0(4;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb24;4i0;e>5<#:h;1=4h4;n3g1?6=,;k:669b81!3a?3n0(8h9:e9~yx{51;294~"5i80:h;5G2878k4b1290/>l?51e48 4eb2=<0(