Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 4- 1-2023, 4:45AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
114/144 (80%) | 288/720 (40%) | 88/144 (62%) | 71/81 (88%) | 194/432 (45%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 114 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 114 |