Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 3-20-2023, 11:54PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
121/144 (85%) | 440/720 (62%) | 96/144 (67%) | 72/81 (89%) | 227/432 (53%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 121 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 121 |