Equations

********** Mapped Logic **********

FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,C16M,'0','0');
     ALE0M_D <= ((iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOREQr AND NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND
      NOT iobm/IOS_FSM_FFd6)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
      iobm/IOS_FSM_FFd2)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
      iobm/IOS_FSM_FFd1)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT ALE0M));

FDCPE_ALE0S: FDCPE port map (ALE0S,iobs/TS_FSM_FFd2,FCLK,'0','0');

FDCPE_BACTr: FDCPE port map (BACTr,BACTr_D,FCLK,'0','0');
BACTr_D <= ((NOT nAS_FSB AND MCKE)
OR (fsb/ASrf AND MCKE));

GA(22) <= A_FSB(22);

GA(23) <= A_FSB(23);

FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,C16M,'0','0');
     IOACT_D <= ((iobm/IOS_FSM_FFd4)
      OR (iobm/IOS_FSM_FFd5)
      OR (iobm/IOS_FSM_FFd6)
      OR (NOT IOBERR AND NOT IODONE AND iobm/IOS_FSM_FFd3)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd2 AND IOACT AND NOT iobm/IOS_FSM_FFd1)
      OR (iobm/IOS_FSM_FFd7 AND iobm/IOREQr)
      OR (iobm/IOS_FSM_FFd3 AND iobm/C8Mr));

FDCPE_IOBERR: FDCPE port map (IOBERR,NOT nBERR_IOB,NOT C8M,nAS_IOB,'0');

FDCPE_IODONE: FDCPE port map (IODONE,IODONE_D,NOT C8M,nAS_IOB,'0');
     IODONE_D <= ((NOT nRES.PIN)
      OR (NOT nDTACK_IOB)
      OR (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(2) AND NOT iobm/ES(1) AND
      iobm/ES(3)));

FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,FCLK,'0','0');
     IOL0_D <= ((iobs/TS_FSM_FFd1 AND IOL0)
      OR (NOT nLDS_FSB AND NOT iobs/TS_FSM_FFd1 AND nADoutLE1)
      OR (iobs/IOL1 AND NOT iobs/TS_FSM_FFd1 AND NOT nADoutLE1));

FDCPE_IONPReady: FDCPE port map (IONPReady,IONPReady_D,FCLK,'0','0');
     IONPReady_D <= ((NOT MCKE)
      OR (nAS_FSB AND NOT fsb/ASrf)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT IOQoSEN AND
      NOT IONPReady AND NOT nWE_FSB)
      OR (NOT iobs/Sent AND NOT IONPReady)
      OR (NOT IONPReady AND NOT iobs/IODONEr));

FDCPE_IOQoSEN: FDCPE port map (IOQoSEN,IOQoSEN_D,FCLK,'0','0');
     IOQoSEN_D <= ((NOT IOQoSEN AND NOT nAS_FSB AND MCKE)
      OR (NOT IOQoSEN AND fsb/ASrf AND MCKE)
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND NOT cnt/IOQS(2) AND
      NOT cnt/IOQS(3) AND NOT MCKE)
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND NOT cnt/IOQS(2) AND
      NOT cnt/IOQS(3) AND nAS_FSB AND NOT fsb/ASrf));

FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,FCLK,'0','0');
     IOREQ_D <= ((A_FSB(23) AND NOT iobs/Sent AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND MCKE)
      OR (A_FSB(23) AND NOT iobs/Sent AND NOT iobs/TS_FSM_FFd1 AND
      fsb/ASrf AND MCKE)
      OR (NOT iobs/Sent AND IOQoSEN AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND MCKE)
      OR (NOT iobs/Sent AND IOQoSEN AND NOT iobs/TS_FSM_FFd1 AND
      fsb/ASrf AND MCKE)
      OR (A_FSB(21) AND A_FSB(22) AND NOT iobs/Sent AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND MCKE)
      OR (A_FSB(21) AND A_FSB(22) AND NOT iobs/Sent AND
      NOT iobs/TS_FSM_FFd1 AND fsb/ASrf AND MCKE)
      OR (A_FSB(20) AND A_FSB(22) AND NOT iobs/Sent AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND MCKE)
      OR (A_FSB(20) AND A_FSB(22) AND NOT iobs/Sent AND
      NOT iobs/TS_FSM_FFd1 AND fsb/ASrf AND MCKE)
      OR (NOT iobs/TS_FSM_FFd1 AND iobs/TS_FSM_FFd2)
      OR (NOT iobs/TS_FSM_FFd1 AND NOT nADoutLE1)
      OR (iobs/TS_FSM_FFd2 AND NOT iobs/IOACTr)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT iobs/Sent AND NOT nWE_FSB AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT iobs/Sent AND NOT nWE_FSB AND
      NOT iobs/TS_FSM_FFd1 AND fsb/ASrf AND MCKE));

FDCPE_IORW: FDCPE port map (IORW,IORW_D,FCLK,'0','0',IORW_CE);
     IORW_D <= ((nWE_FSB AND nADoutLE1)
      OR (iobs/IORW1 AND NOT nADoutLE1));
     IORW_CE <= (NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2);

FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,FCLK,'0','0');
     IOU0_D <= ((iobs/TS_FSM_FFd1 AND IOU0)
      OR (NOT nUDS_FSB AND NOT iobs/TS_FSM_FFd1 AND nADoutLE1)
      OR (iobs/IOU1 AND NOT iobs/TS_FSM_FFd1 AND NOT nADoutLE1));

FDCPE_MCKE: FDCPE port map (MCKE,'1',NOT FCLK,'0','0');

RA(0) <= ((ram/RASEL AND A_FSB(1))
OR (NOT ram/RASEL AND A_FSB(9)));

RA(1) <= ((A_FSB(10) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(2)));

RA(2) <= ((A_FSB(16) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(7)));

RA(3) <= ((A_FSB(20) AND ram/RASEL)
OR (A_FSB(19) AND NOT ram/RASEL));

RA(4) <= ((A_FSB(11) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(3)));

RA(5) <= ((A_FSB(12) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(4)));

RA(6) <= ((A_FSB(13) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(5)));

RA(7) <= ((A_FSB(14) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(6)));

RA(8) <= ((A_FSB(21) AND ram/RASEL)
OR (A_FSB(18) AND NOT ram/RASEL));

RA(9) <= ((A_FSB(15) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(8)));

RA(10) <= ((A_FSB(17) AND NOT ram/RASEL)
OR (ram/RASEL AND A_FSB(7)));

RA(11) <= ((A_FSB(20) AND ram/RASEL)
OR (A_FSB(19) AND NOT ram/RASEL));

FDCPE_RAMReady: FDCPE port map (RAMReady,RAMReady_D,FCLK,'0','0');
     RAMReady_D <= ((RefUrg AND NOT ram/RefDone AND NOT ram/RS_FSM_FFd8 AND
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND NOT ram/RS_FSM_FFd6)
      OR (RefUrg AND NOT ram/RefDone AND nAS_FSB AND
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND NOT ram/RS_FSM_FFd6 AND NOT fsb/ASrf)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      NOT ram/RS_FSM_FFd4 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND
      NOT ram/RS_FSM_FFd6 AND NOT BACTr AND MCKE)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd4 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND
      NOT ram/RS_FSM_FFd6 AND NOT BACTr AND fsb/ASrf AND MCKE)
      OR (A_FSB(23) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      NOT ram/RS_FSM_FFd4 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND
      NOT ram/RS_FSM_FFd6 AND NOT BACTr AND MCKE)
      OR (A_FSB(23) AND RefReq AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd4 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND
      NOT ram/RS_FSM_FFd6 AND NOT BACTr AND fsb/ASrf AND MCKE)
      OR (NOT ram/RS_FSM_FFd8 AND NOT ram/RS_FSM_FFd4 AND
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND NOT ram/RS_FSM_FFd6)
      OR (A_FSB(22) AND RefUrg AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND NOT ram/RS_FSM_FFd6)
      OR (A_FSB(23) AND RefUrg AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND NOT ram/RS_FSM_FFd6)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RASEN AND
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd5 AND NOT ram/RS_FSM_FFd6)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RS_FSM_FFd1 AND
      NOT ram/RS_FSM_FFd5 AND NOT ram/RS_FSM_FFd6 AND NOT MCKE));

FDCPE_RefReq: FDCPE port map (RefReq,RefReq_D,FCLK,'0','0',RefReq_CE);
     RefReq_D <= (NOT cnt/Timer(0) AND cnt/Timer(1) AND NOT cnt/Timer(2) AND
      cnt/Timer(3));
     RefReq_CE <= (NOT cnt/Er(0) AND cnt/Er(1));

FDCPE_RefUrg: FDCPE port map (RefUrg,RefUrg_D,FCLK,'0','0',RefUrg_CE);
RefUrg_D <= (NOT cnt/Timer(1) AND NOT cnt/Timer(2) AND cnt/Timer(3));
RefUrg_CE <= (NOT cnt/Er(0) AND cnt/Er(1));

FDCPE_RnW_IOB: FDCPE port map (RnW_IOB_I,RnW_IOB,NOT C16M,'0','0');
     RnW_IOB <= ((IORW)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
      NOT iobm/IOS_FSM_FFd2)
      OR (NOT iobm/IOS_FSM_FFd3 AND iobm/C8Mr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
      NOT iobm/IOS_FSM_FFd2)
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOREQr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
      NOT iobm/IOS_FSM_FFd2));
     RnW_IOB <= RnW_IOB_I when RnW_IOB_OE = '1' else 'Z';
     RnW_IOB_OE <= NOT nAoutOE;

FDCPE_cnt/Er0: FDCPE port map (cnt/Er(0),E,FCLK,'0','0');

FDCPE_cnt/Er1: FDCPE port map (cnt/Er(1),cnt/Er(0),FCLK,'0','0');

FDCPE_cnt/IOQS0: FDCPE port map (cnt/IOQS(0),cnt/IOQS_D(0),FCLK,'0','0');
     cnt/IOQS_D(0) <= ((NOT cnt/IOQS(0) AND NOT cnt/TimerTC AND NOT cnt/IOQoSCSr)
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQoSCSr AND cnt/Er(0))
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQoSCSr AND NOT cnt/Er(1))
      OR (cnt/IOQS(0) AND cnt/TimerTC AND NOT cnt/IOQoSCSr AND
      NOT cnt/Er(0) AND cnt/Er(1))
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND NOT cnt/IOQS(2) AND
      NOT cnt/IOQS(3) AND NOT cnt/IOQoSCSr));

FTCPE_cnt/IOQS1: FTCPE port map (cnt/IOQS(1),cnt/IOQS_T(1),FCLK,'0','0');
     cnt/IOQS_T(1) <= ((NOT cnt/IOQS(1) AND cnt/IOQoSCSr)
      OR (NOT cnt/IOQS(0) AND cnt/IOQS(1) AND cnt/TimerTC AND
      NOT cnt/IOQoSCSr AND NOT cnt/Er(0) AND cnt/Er(1))
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND cnt/IOQS(2) AND
      cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1))
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND cnt/IOQS(3) AND
      cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)));

FTCPE_cnt/IOQS2: FTCPE port map (cnt/IOQS(2),cnt/IOQS_T(2),FCLK,'0','0');
     cnt/IOQS_T(2) <= ((NOT cnt/IOQS(2) AND cnt/IOQoSCSr)
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND cnt/IOQS(2) AND
      cnt/TimerTC AND NOT cnt/IOQoSCSr AND NOT cnt/Er(0) AND cnt/Er(1))
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND NOT cnt/IOQS(2) AND
      cnt/IOQS(3) AND cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)));

FDCPE_cnt/IOQS3: FDCPE port map (cnt/IOQS(3),cnt/IOQS_D(3),FCLK,'0','0');
     cnt/IOQS_D(3) <= ((NOT cnt/IOQS(3) AND NOT cnt/IOQoSCSr)
      OR (NOT cnt/IOQS(0) AND NOT cnt/IOQS(1) AND NOT cnt/IOQS(2) AND
      cnt/TimerTC AND NOT cnt/IOQoSCSr AND NOT cnt/Er(0) AND cnt/Er(1)));

FDCPE_cnt/IOQoSCSr: FDCPE port map (cnt/IOQoSCSr,cnt/IOQoSCSr_D,FCLK,'0','0');
     cnt/IOQoSCSr_D <= ((NOT cnt/nRESr)
      OR (A_FSB(20) AND A_FSB(23) AND NOT nAS_FSB AND MCKE)
      OR (A_FSB(20) AND A_FSB(23) AND fsb/ASrf AND MCKE)
      OR (NOT A_FSB(21) AND A_FSB(20) AND A_FSB(22) AND NOT nAS_FSB AND
      MCKE)
      OR (NOT A_FSB(21) AND A_FSB(20) AND A_FSB(22) AND fsb/ASrf AND
      MCKE)
      OR (A_FSB(21) AND A_FSB(22) AND A_FSB(23) AND NOT nAS_FSB AND
      MCKE)
      OR (A_FSB(21) AND A_FSB(22) AND A_FSB(23) AND fsb/ASrf AND
      MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      A_FSB(14) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT nWE_FSB AND
      NOT nAS_FSB AND A_FSB(8) AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      A_FSB(14) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT nWE_FSB AND
      A_FSB(8) AND fsb/ASrf AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      NOT A_FSB(14) AND NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT nWE_FSB AND
      A_FSB(8) AND fsb/ASrf AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      A_FSB(14) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT nWE_FSB AND
      NOT nAS_FSB AND A_FSB(9) AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      A_FSB(14) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT nWE_FSB AND
      A_FSB(9) AND fsb/ASrf AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      NOT A_FSB(14) AND NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT nWE_FSB AND
      NOT nAS_FSB AND A_FSB(9) AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      NOT A_FSB(14) AND NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT nWE_FSB AND
      NOT nAS_FSB AND A_FSB(8) AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND A_FSB(15) AND A_FSB(13) AND NOT A_FSB(22) AND
      NOT A_FSB(14) AND NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT nWE_FSB AND
      A_FSB(9) AND fsb/ASrf AND MCKE));

FTCPE_cnt/IS_FSM_FFd1: FTCPE port map (cnt/IS_FSM_FFd1,cnt/IS_FSM_FFd1_T,FCLK,'0','0');
     cnt/IS_FSM_FFd1_T <= ((cnt/LookReset AND NOT cnt/IS_FSM_FFd2 AND
      cnt/IS_FSM_FFd1 AND NOT cnt/nRESr)
      OR (cnt/LTimer(10) AND cnt/LTimer(11) AND cnt/TimerTC AND
      cnt/IS_FSM_FFd2 AND NOT cnt/IS_FSM_FFd1 AND NOT cnt/Er(0) AND cnt/nIPL2r AND
      cnt/Er(1)));

FTCPE_cnt/IS_FSM_FFd2: FTCPE port map (cnt/IS_FSM_FFd2,cnt/IS_FSM_FFd2_T,FCLK,'0','0');
     cnt/IS_FSM_FFd2_T <= ((cnt/LTimer(10) AND cnt/LTimer(11) AND cnt/TimerTC AND
      cnt/IS_FSM_FFd2 AND cnt/IS_FSM_FFd1 AND NOT cnt/Er(0) AND cnt/Er(1))
      OR (cnt/LTimer(10) AND cnt/LTimer(11) AND cnt/TimerTC AND
      NOT cnt/IS_FSM_FFd2 AND NOT cnt/IS_FSM_FFd1 AND NOT cnt/Er(0) AND cnt/Er(1)));

FTCPE_cnt/LTimer0: FTCPE port map (cnt/LTimer(0),'1',FCLK,'0','0',cnt/LTimer_CE(0));
cnt/LTimer_CE(0) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer1: FTCPE port map (cnt/LTimer(1),cnt/LTimer(0),FCLK,'0','0',cnt/LTimer_CE(1));
cnt/LTimer_CE(1) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer2: FTCPE port map (cnt/LTimer(2),cnt/LTimer_T(2),FCLK,'0','0',cnt/LTimer_CE(2));
cnt/LTimer_T(2) <= (cnt/LTimer(0) AND cnt/LTimer(1));
cnt/LTimer_CE(2) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer3: FTCPE port map (cnt/LTimer(3),cnt/LTimer_T(3),FCLK,'0','0',cnt/LTimer_CE(3));
cnt/LTimer_T(3) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2));
cnt/LTimer_CE(3) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer4: FTCPE port map (cnt/LTimer(4),cnt/LTimer_T(4),FCLK,'0','0',cnt/LTimer_CE(4));
     cnt/LTimer_T(4) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND
      cnt/LTimer(3));
     cnt/LTimer_CE(4) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer5: FTCPE port map (cnt/LTimer(5),cnt/LTimer_T(5),FCLK,'0','0',cnt/LTimer_CE(5));
     cnt/LTimer_T(5) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND
      cnt/LTimer(3) AND cnt/LTimer(4));
     cnt/LTimer_CE(5) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer6: FTCPE port map (cnt/LTimer(6),cnt/LTimer_T(6),FCLK,'0','0',cnt/LTimer_CE(6));
     cnt/LTimer_T(6) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5));
     cnt/LTimer_CE(6) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer7: FTCPE port map (cnt/LTimer(7),cnt/LTimer_T(7),FCLK,'0','0',cnt/LTimer_CE(7));
     cnt/LTimer_T(7) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6));
     cnt/LTimer_CE(7) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer8: FTCPE port map (cnt/LTimer(8),cnt/LTimer_T(8),FCLK,'0','0',cnt/LTimer_CE(8));
     cnt/LTimer_T(8) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND
      cnt/LTimer(7));
     cnt/LTimer_CE(8) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer9: FTCPE port map (cnt/LTimer(9),cnt/LTimer_T(9),FCLK,'0','0',cnt/LTimer_CE(9));
     cnt/LTimer_T(9) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND
      cnt/LTimer(7) AND cnt/LTimer(8));
     cnt/LTimer_CE(9) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer10: FTCPE port map (cnt/LTimer(10),cnt/LTimer_T(10),FCLK,'0','0',cnt/LTimer_CE(10));
     cnt/LTimer_T(10) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND
      cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9));
     cnt/LTimer_CE(10) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/LTimer11: FTCPE port map (cnt/LTimer(11),cnt/LTimer_T(11),FCLK,'0','0',cnt/LTimer_CE(11));
     cnt/LTimer_T(11) <= (cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(1) AND
      cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND
      cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9));
     cnt/LTimer_CE(11) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));

FDCPE_cnt/LookReset: FDCPE port map (cnt/LookReset,cnt/LookReset_D,FCLK,'0','0');
cnt/LookReset_D <= ((cnt/LookReset AND nRESout)
OR (nRESout AND NOT cnt/Er(0) AND cnt/Er(1)));

FTCPE_cnt/Timer0: FTCPE port map (cnt/Timer(0),cnt/Timer_T(0),FCLK,'0','0',cnt/Timer_CE(0));
     cnt/Timer_T(0) <= (NOT cnt/Timer(0) AND cnt/TimerTC AND NOT cnt/Er(0) AND
      cnt/Er(1));
     cnt/Timer_CE(0) <= (NOT cnt/Er(0) AND cnt/Er(1));

FDCPE_cnt/Timer1: FDCPE port map (cnt/Timer(1),cnt/Timer_D(1),FCLK,'0','0',cnt/Timer_CE(1));
     cnt/Timer_D(1) <= ((cnt/Timer(0) AND cnt/Timer(1))
      OR (NOT cnt/Timer(0) AND NOT cnt/Timer(1))
      OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)));
     cnt/Timer_CE(1) <= (NOT cnt/Er(0) AND cnt/Er(1));

FDCPE_cnt/Timer2: FDCPE port map (cnt/Timer(2),cnt/Timer_D(2),FCLK,'0','0',cnt/Timer_CE(2));
     cnt/Timer_D(2) <= ((NOT cnt/Timer(0) AND NOT cnt/Timer(2))
      OR (NOT cnt/Timer(1) AND NOT cnt/Timer(2))
      OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2))
      OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)));
     cnt/Timer_CE(2) <= (NOT cnt/Er(0) AND cnt/Er(1));

FTCPE_cnt/Timer3: FTCPE port map (cnt/Timer(3),cnt/Timer_T(3),FCLK,'0','0',cnt/Timer_CE(3));
     cnt/Timer_T(3) <= ((cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND
      NOT cnt/TimerTC)
      OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND
      cnt/Er(0))
      OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND
      NOT cnt/Er(1))
      OR (cnt/Timer(3) AND cnt/TimerTC AND NOT cnt/Er(0) AND
      cnt/Er(1)));
     cnt/Timer_CE(3) <= (NOT cnt/Er(0) AND cnt/Er(1));

FDCPE_cnt/TimerTC: FDCPE port map (cnt/TimerTC,cnt/TimerTC_D,FCLK,'0','0',cnt/TimerTC_CE);
     cnt/TimerTC_D <= (cnt/Timer(0) AND NOT cnt/Timer(1) AND NOT cnt/Timer(2) AND
      cnt/Timer(3));
     cnt/TimerTC_CE <= (NOT cnt/Er(0) AND cnt/Er(1));

FDCPE_cnt/nIPL2r: FDCPE port map (cnt/nIPL2r,nIPL2,FCLK,'0','0');

FDCPE_cnt/nRESr: FDCPE port map (cnt/nRESr,nRES.PIN,FCLK,'0','0');

FTCPE_cs/Overlay: FTCPE port map (cs/Overlay,cs/Overlay_T,FCLK,'0','0');
     cs/Overlay_T <= ((NOT nRES.PIN AND NOT cs/Overlay AND NOT MCKE)
      OR (NOT nRES.PIN AND NOT cs/Overlay AND nAS_FSB AND NOT fsb/ASrf)
      OR (NOT A_FSB(21) AND NOT A_FSB(20) AND A_FSB(22) AND NOT A_FSB(23) AND
      cs/Overlay AND NOT nAS_FSB AND MCKE)
      OR (NOT A_FSB(21) AND NOT A_FSB(20) AND A_FSB(22) AND NOT A_FSB(23) AND
      cs/Overlay AND fsb/ASrf AND MCKE));

FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT FCLK,'0','0');

FDCPE_iobm/C8Mr: FDCPE port map (iobm/C8Mr,C8M,C16M,'0','0');

FDCPE_iobm/DoutOE: FDCPE port map (iobm/DoutOE,iobm/DoutOE_D,C16M,'0','0');
     iobm/DoutOE_D <= ((iobm/IOS_FSM_FFd3 AND iobm/DoutOE)
      OR (iobm/IOS_FSM_FFd4 AND iobm/DoutOE)
      OR (iobm/IOS_FSM_FFd5 AND iobm/DoutOE)
      OR (iobm/IOS_FSM_FFd6 AND iobm/DoutOE)
      OR (NOT IORW AND iobm/IOS_FSM_FFd7 AND NOT iobm/C8Mr AND
      iobm/IOREQr));

FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),NOT C8M,'0','0');
     iobm/ES_T(0) <= ((iobm/ES(0) AND NOT E AND iobm/Er)
      OR (NOT iobm/ES(0) AND NOT iobm/ES(2) AND NOT iobm/ES(1) AND
      NOT iobm/ES(3) AND E)
      OR (NOT iobm/ES(0) AND NOT iobm/ES(2) AND NOT iobm/ES(1) AND
      NOT iobm/ES(3) AND NOT iobm/Er));

FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),NOT C8M,'0','0');
     iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1))
      OR (NOT iobm/ES(0) AND NOT iobm/ES(1))
      OR (NOT E AND iobm/Er)
      OR (iobm/ES(0) AND NOT iobm/ES(2) AND iobm/ES(3)));

FTCPE_iobm/ES2: FTCPE port map (iobm/ES(2),iobm/ES_T(2),NOT C8M,'0','0');
     iobm/ES_T(2) <= ((iobm/ES(0) AND iobm/ES(1) AND E)
      OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/Er)
      OR (iobm/ES(2) AND NOT E AND iobm/Er));

FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),NOT C8M,'0','0');
     iobm/ES_T(3) <= ((iobm/ES(3) AND NOT E AND iobm/Er)
      OR (iobm/ES(0) AND iobm/ES(2) AND iobm/ES(1) AND E)
      OR (iobm/ES(0) AND iobm/ES(2) AND iobm/ES(1) AND NOT iobm/Er)
      OR (iobm/ES(0) AND NOT iobm/ES(2) AND NOT iobm/ES(1) AND
      iobm/ES(3)));

FDCPE_iobm/Er: FDCPE port map (iobm/Er,E,NOT C8M,'0','0');

FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,C16M,'0','0');

FDCPE_iobm/IOS0: FDCPE port map (iobm/IOS0,iobm/IOS0_D,C16M,'0','0');
     iobm/IOS0_D <= ((iobm/IOS_FSM_FFd1)
      OR (iobm/IOS_FSM_FFd7 AND iobm/C8Mr)
      OR (iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr)
      OR (iobm/IOS_FSM_FFd7 AND nAoutOE)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
      NOT iobm/IOS_FSM_FFd2 AND iobm/IOS0));

FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd2,C16M,'0','0');

FDCPE_iobm/IOS_FSM_FFd2: FDCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_D,C16M,'0','0');
iobm/IOS_FSM_FFd2_D <= ((IOBERR AND iobm/IOS_FSM_FFd3 AND NOT iobm/C8Mr)
OR (IODONE AND iobm/IOS_FSM_FFd3 AND NOT iobm/C8Mr));

FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,'0','0');
     iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd4)
      OR (iobm/IOS_FSM_FFd3 AND iobm/C8Mr)
      OR (NOT IOBERR AND NOT IODONE AND iobm/IOS_FSM_FFd3));

FDCPE_iobm/IOS_FSM_FFd4: FDCPE port map (iobm/IOS_FSM_FFd4,iobm/IOS_FSM_FFd5,C16M,'0','0');

FDCPE_iobm/IOS_FSM_FFd5: FDCPE port map (iobm/IOS_FSM_FFd5,iobm/IOS_FSM_FFd6,C16M,'0','0');

FDCPE_iobm/IOS_FSM_FFd6: FDCPE port map (iobm/IOS_FSM_FFd6,iobm/IOS_FSM_FFd6_D,C16M,'0','0');
iobm/IOS_FSM_FFd6_D <= (iobm/IOS_FSM_FFd7 AND NOT iobm/C8Mr AND iobm/IOREQr AND
NOT nAoutOE);

FDCPE_iobm/IOS_FSM_FFd7: FDCPE port map (iobm/IOS_FSM_FFd7,iobm/IOS_FSM_FFd7_D,C16M,'0','0');
     iobm/IOS_FSM_FFd7_D <= ((NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd1)
      OR (NOT iobm/C8Mr AND iobm/IOREQr AND NOT iobm/IOS_FSM_FFd1 AND
      NOT nAoutOE));

FDCPE_iobm/VPAr: FDCPE port map (iobm/VPAr,NOT nVPA_IOB,NOT C8M,'0','0');

FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,FCLK,'0','0');
iobs/Clear1_D <= (NOT iobs/TS_FSM_FFd1 AND iobs/TS_FSM_FFd2);

FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,FCLK,'0','0');

FDCPE_iobs/IODONEr: FDCPE port map (iobs/IODONEr,IODONE,FCLK,'0','0');

FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,FCLK,'0','0',iobs/Load1);

FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,FCLK,'0','0');
     iobs/IORW1_T <= ((A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND iobs/IORW1 AND NOT nAS_FSB AND
      iobs/TS_FSM_FFd1 AND MCKE AND nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND iobs/IORW1 AND NOT nAS_FSB AND
      iobs/TS_FSM_FFd2 AND MCKE AND nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND iobs/IORW1 AND iobs/TS_FSM_FFd1 AND
      fsb/ASrf AND MCKE AND nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND iobs/IORW1 AND iobs/TS_FSM_FFd2 AND
      fsb/ASrf AND MCKE AND nADoutLE1));

FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,FCLK,'0','0',iobs/Load1);

FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,FCLK,'0','0');
     iobs/Load1_D <= ((A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND NOT nAS_FSB AND iobs/TS_FSM_FFd1 AND MCKE AND
      nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND NOT nAS_FSB AND iobs/TS_FSM_FFd2 AND MCKE AND
      nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND iobs/TS_FSM_FFd1 AND fsb/ASrf AND MCKE AND
      nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT iobs/Sent AND
      NOT IOQoSEN AND NOT nWE_FSB AND iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE AND
      nADoutLE1));

FDCPE_iobs/Sent: FDCPE port map (iobs/Sent,iobs/Sent_D,FCLK,'0','0');
     iobs/Sent_D <= ((IOQoSEN AND NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND
      fsb/ASrf AND MCKE AND nADoutLE1)
      OR (A_FSB(21) AND A_FSB(22) AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND MCKE AND nADoutLE1)
      OR (A_FSB(21) AND A_FSB(22) AND NOT iobs/TS_FSM_FFd1 AND
      NOT iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE AND nADoutLE1)
      OR (A_FSB(20) AND A_FSB(22) AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND MCKE AND nADoutLE1)
      OR (A_FSB(20) AND A_FSB(22) AND NOT iobs/TS_FSM_FFd1 AND
      NOT iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE AND nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT IOQoSEN AND
      NOT nWE_FSB AND NOT nAS_FSB AND MCKE AND nADoutLE1)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT A_FSB(22) AND NOT A_FSB(23) AND NOT IOQoSEN AND
      NOT nWE_FSB AND fsb/ASrf AND MCKE AND nADoutLE1)
      OR (iobs/Sent AND NOT nAS_FSB AND MCKE)
      OR (iobs/Sent AND fsb/ASrf AND MCKE)
      OR (A_FSB(23) AND NOT nAS_FSB AND NOT iobs/TS_FSM_FFd1 AND
      NOT iobs/TS_FSM_FFd2 AND MCKE AND nADoutLE1)
      OR (A_FSB(23) AND NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND
      fsb/ASrf AND MCKE AND nADoutLE1)
      OR (IOQoSEN AND NOT nAS_FSB AND NOT iobs/TS_FSM_FFd1 AND
      NOT iobs/TS_FSM_FFd2 AND MCKE AND nADoutLE1));

FDCPE_iobs/TS_FSM_FFd1: FDCPE port map (iobs/TS_FSM_FFd1,iobs/TS_FSM_FFd1_D,FCLK,'0','0');
iobs/TS_FSM_FFd1_D <= ((iobs/TS_FSM_FFd2)
OR (iobs/TS_FSM_FFd1 AND iobs/IOACTr));

FTCPE_iobs/TS_FSM_FFd2: FTCPE port map (iobs/TS_FSM_FFd2,iobs/TS_FSM_FFd2_T,FCLK,'0','0');
     iobs/TS_FSM_FFd2_T <= ((NOT iobs/Sent AND IOQoSEN AND NOT iobs/TS_FSM_FFd1 AND
      NOT iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE)
      OR (A_FSB(21) AND A_FSB(22) AND NOT iobs/Sent AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND MCKE)
      OR (A_FSB(20) AND A_FSB(22) AND NOT iobs/Sent AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND MCKE)
      OR (A_FSB(20) AND A_FSB(22) AND NOT iobs/Sent AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE)
      OR (A_FSB(21) AND A_FSB(22) AND NOT iobs/Sent AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT iobs/Sent AND NOT nWE_FSB AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT iobs/Sent AND NOT nWE_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE)
      OR (iobs/TS_FSM_FFd1 AND iobs/TS_FSM_FFd2 AND
      iobs/IOACTr)
      OR (NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND NOT nADoutLE1)
      OR (A_FSB(23) AND NOT iobs/Sent AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND MCKE)
      OR (A_FSB(23) AND NOT iobs/Sent AND NOT iobs/TS_FSM_FFd1 AND
      NOT iobs/TS_FSM_FFd2 AND fsb/ASrf AND MCKE)
      OR (NOT iobs/Sent AND IOQoSEN AND NOT nAS_FSB AND
      NOT iobs/TS_FSM_FFd1 AND NOT iobs/TS_FSM_FFd2 AND MCKE));

nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);

FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,FCLK,'0','0');
nADoutLE1_D <= ((iobs/Load1)
OR (NOT iobs/Clear1 AND NOT nADoutLE1));

FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT C16M,'0','0');
     nAS_IOB <= ((NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT iobm/IOS_FSM_FFd3 AND iobm/C8Mr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOREQr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6));
     nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z';
     nAS_IOB_OE <= NOT nAoutOE;

FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,FCLK,'0','0');
nAoutOE_D <= ((NOT nBR_IOB AND cnt/IS_FSM_FFd2 AND cnt/IS_FSM_FFd1)
OR (NOT cnt/IS_FSM_FFd2 AND cnt/IS_FSM_FFd1 AND NOT nAoutOE));

FDCPE_nBERR_FSB: FDCPE port map (nBERR_FSB,nBERR_FSB_D,FCLK,'0','0');
     nBERR_FSB_D <= ((NOT nAS_FSB AND NOT nBERR_FSB AND MCKE)
      OR (NOT nBERR_FSB AND fsb/ASrf AND MCKE)
      OR (iobs/Sent AND IOBERR AND NOT nAS_FSB AND MCKE)
      OR (iobs/Sent AND IOBERR AND fsb/ASrf AND MCKE));

FTCPE_nBR_IOB: FTCPE port map (nBR_IOB,nBR_IOB_T,FCLK,'0','0');
     nBR_IOB_T <= ((nBR_IOB AND NOT cnt/IS_FSM_FFd2 AND NOT cnt/IS_FSM_FFd1)
      OR (NOT nBR_IOB AND cnt/IS_FSM_FFd2 AND NOT cnt/IS_FSM_FFd1 AND
      NOT cnt/nIPL2r));

FDCPE_nCAS: FDCPE port map (nCAS,nCAS_D,NOT FCLK,'0','0');
     nCAS_D <= ((ram/RS_FSM_FFd1)
      OR (ram/RS_FSM_FFd2)
      OR (ram/RS_FSM_FFd3)
      OR (EXP15_.EXP)
      OR (NOT RefUrg AND ram/RS_FSM_FFd4)
      OR (NOT RefUrg AND ram/RS_FSM_FFd7)
      OR (ram/RefDone AND ram/RS_FSM_FFd8)
      OR (ram/RefDone AND ram/RS_FSM_FFd4)
      OR (NOT RefUrg AND ram/RS_FSM_FFd8 AND BACTr)
      OR (NOT RefUrg AND NOT RefReq AND ram/RS_FSM_FFd8)
      OR (ram/RefDone AND ram/RS_FSM_FFd7)
      OR (ram/DTACKr AND ram/RS_FSM_FFd5));

FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,FCLK,'0','0');
     nDTACK_FSB_D <= ((NOT MCKE)
      OR (A_FSB(21) AND A_FSB(22) AND NOT IONPReady)
      OR (NOT A_FSB(22) AND NOT IONPReady AND NOT RAMReady)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(22) AND A_FSB(23))
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND
      A_FSB(17) AND A_FSB(16) AND NOT iobs/Sent AND NOT IONPReady AND NOT nWE_FSB AND
      NOT nADoutLE1)
      OR (A_FSB(23) AND NOT IONPReady)
      OR (IOQoSEN AND NOT IONPReady)
      OR (nAS_FSB AND NOT fsb/ASrf)
      OR (A_FSB(20) AND A_FSB(22) AND NOT IONPReady));

FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT C16M,'0','0');
nDinLE_D <= (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4);

nDinOE <= NOT (((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
OR (A_FSB(21) AND A_FSB(22) AND nWE_FSB AND NOT nAS_FSB)
OR (A_FSB(20) AND A_FSB(22) AND nWE_FSB AND NOT nAS_FSB)));

nDoutOE <= NOT (((iobm/DoutOE AND NOT nAoutOE)
OR (NOT iobm/IOREQr AND iobm/IOS0 AND NOT nAoutOE)));

FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT C16M,'0','0');
     nLDS_IOB <= ((NOT IOL0)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT IORW AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND
      NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT iobm/IOS_FSM_FFd3 AND iobm/C8Mr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOREQr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6));
     nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z';
     nLDS_IOB_OE <= NOT nAoutOE;

FDCPE_nOE: FDCPE port map (nOE,nOE_D,FCLK,'0','0');
     nOE_D <= ((nWE_FSB AND NOT nAS_FSB AND NOT ram/DTACKr AND MCKE)
      OR (nWE_FSB AND NOT nAS_FSB AND NOT BACTr AND MCKE)
      OR (nWE_FSB AND NOT ram/DTACKr AND fsb/ASrf AND MCKE)
      OR (nWE_FSB AND NOT BACTr AND fsb/ASrf AND MCKE));

nRAMLWE <= NOT ((NOT nLDS_FSB AND NOT nWE_FSB AND ram/RASEL));

nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND ram/RASEL));

nRAS <= NOT (((ram/RASrf)
      OR (ram/RASrr)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND NOT nAS_FSB AND
      ram/RASEN)));

nRES_I <= '0';
nRES <= nRES_I when nRES_OE = '1' else 'Z';
nRES_OE <= NOT nRESout;

FDCPE_nRESout: FDCPE port map (nRESout,nRESout_D,FCLK,'0','0');
nRESout_D <= (NOT cnt/IS_FSM_FFd2 AND cnt/IS_FSM_FFd1);

nROMOE <= NOT (((cs/Overlay AND nWE_FSB AND NOT nAS_FSB)
OR (NOT A_FSB(21) AND NOT A_FSB(20) AND A_FSB(22) AND NOT A_FSB(23) AND
nWE_FSB AND NOT nAS_FSB)));

nROMWE <= NOT ((NOT A_FSB(21) AND NOT A_FSB(20) AND A_FSB(22) AND NOT A_FSB(23) AND
NOT nWE_FSB AND NOT nAS_FSB));

FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT C16M,'0','0');
     nUDS_IOB <= ((NOT IOU0)
      OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT IORW AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND
      NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT iobm/IOS_FSM_FFd3 AND iobm/C8Mr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6)
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOREQr AND
      NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6));
     nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z';
     nUDS_IOB_OE <= NOT nAoutOE;

FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,C8M,'0','0');
     nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(2) AND NOT iobm/ES(1) AND
      NOT iobm/ES(3))
      OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(2) AND NOT iobm/ES(1) AND
      NOT iobm/ES(3) AND IOACT AND iobm/VPAr));
     nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z';
     nVMA_IOB_OE <= NOT nAoutOE;

FDCPE_nVPA_FSB: FDCPE port map (nVPA_FSB,nVPA_FSB_D,FCLK,'0',nAS_FSB);
     nVPA_FSB_D <= ((A_FSB(21) AND A_FSB(20) AND A_FSB(22) AND A_FSB(23) AND
      IONPReady AND NOT nAS_FSB AND MCKE)
      OR (A_FSB(21) AND A_FSB(20) AND A_FSB(22) AND A_FSB(23) AND
      IONPReady AND fsb/ASrf AND MCKE));

FDCPE_ram/DTACKr: FDCPE port map (ram/DTACKr,NOT nDTACK_FSB,FCLK,'0','0');

FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,FCLK,'0','0');
     ram/RASEL_D <= ((ram/RS_FSM_FFd6)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND NOT nAS_FSB AND
      ram/RS_FSM_FFd8 AND ram/RASEN AND MCKE)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND
      ram/RS_FSM_FFd8 AND ram/RASEN AND fsb/ASrf AND MCKE));

FDCPE_ram/RASEN: FDCPE port map (ram/RASEN,ram/RASEN_D,FCLK,'0','0');
     ram/RASEN_D <= ((nROMOE_OBUF.EXP)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RS_FSM_FFd8 AND
      NOT ram/RS_FSM_FFd1)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RASEN AND
      NOT ram/RS_FSM_FFd1)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT MCKE)
      OR (RefUrg AND NOT ram/RefDone AND nAS_FSB AND
      NOT ram/RS_FSM_FFd1 AND NOT fsb/ASrf)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      NOT ram/RS_FSM_FFd4 AND NOT ram/RS_FSM_FFd1 AND NOT BACTr AND MCKE)
      OR (NOT ram/RS_FSM_FFd8 AND NOT ram/RS_FSM_FFd4 AND
      NOT ram/RS_FSM_FFd1)
      OR (A_FSB(22) AND RefUrg AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd1)
      OR (A_FSB(23) AND RefUrg AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd1));

FDCPE_ram/RASrf: FDCPE port map (ram/RASrf,ram/RS_FSM_FFd6,NOT FCLK,'0','0');

FDCPE_ram/RASrr: FDCPE port map (ram/RASrr,ram/RASrr_D,FCLK,'0','0');
     ram/RASrr_D <= ((ram/RS_FSM_FFd7)
      OR (RefUrg AND NOT ram/RefDone AND ram/RS_FSM_FFd8 AND NOT MCKE)
      OR (RefUrg AND NOT ram/RefDone AND nAS_FSB AND
      ram/RS_FSM_FFd8 AND NOT fsb/ASrf)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND MCKE)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND NOT nAS_FSB AND
      ram/RS_FSM_FFd8 AND ram/RASEN AND MCKE)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND
      ram/RS_FSM_FFd8 AND ram/RASEN AND fsb/ASrf AND MCKE)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND fsb/ASrf AND MCKE)
      OR (A_FSB(23) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND MCKE)
      OR (A_FSB(23) AND RefReq AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND fsb/ASrf AND MCKE)
      OR (RefUrg AND NOT ram/RefDone AND ram/RS_FSM_FFd4)
      OR (A_FSB(22) AND RefUrg AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8)
      OR (A_FSB(23) AND RefUrg AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8)
      OR (RefUrg AND NOT ram/RefDone AND ram/RS_FSM_FFd8 AND
      NOT ram/RASEN));

FDCPE_ram/RS_FSM_FFd1: FDCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd2,FCLK,'0','0');

FDCPE_ram/RS_FSM_FFd2: FDCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd3,FCLK,'0','0');

FDCPE_ram/RS_FSM_FFd3: FDCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd7,FCLK,'0','0');

FDCPE_ram/RS_FSM_FFd4: FDCPE port map (ram/RS_FSM_FFd4,ram/RS_FSM_FFd4_D,FCLK,'0','0');
ram/RS_FSM_FFd4_D <= (ram/DTACKr AND ram/RS_FSM_FFd5);

FDCPE_ram/RS_FSM_FFd5: FDCPE port map (ram/RS_FSM_FFd5,ram/RS_FSM_FFd5_D,FCLK,'0','0');
ram/RS_FSM_FFd5_D <= ((ram/RS_FSM_FFd6)
OR (NOT ram/DTACKr AND ram/RS_FSM_FFd5));

FDCPE_ram/RS_FSM_FFd6: FDCPE port map (ram/RS_FSM_FFd6,ram/RS_FSM_FFd6_D,FCLK,'0','0');
     ram/RS_FSM_FFd6_D <= ((NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND NOT nAS_FSB AND
      ram/RS_FSM_FFd8 AND ram/RASEN AND MCKE)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND
      ram/RS_FSM_FFd8 AND ram/RASEN AND fsb/ASrf AND MCKE));

FDCPE_ram/RS_FSM_FFd7: FDCPE port map (ram/RS_FSM_FFd7,ram/RS_FSM_FFd7_D,FCLK,'0','0');
     ram/RS_FSM_FFd7_D <= ((RefUrg AND NOT ram/RefDone AND nAS_FSB AND
      ram/RS_FSM_FFd8 AND NOT fsb/ASrf)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND MCKE)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND fsb/ASrf AND MCKE)
      OR (A_FSB(23) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND MCKE)
      OR (A_FSB(23) AND RefReq AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8 AND NOT BACTr AND fsb/ASrf AND MCKE)
      OR (RefUrg AND NOT ram/RefDone AND ram/RS_FSM_FFd4)
      OR (A_FSB(22) AND RefUrg AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8)
      OR (A_FSB(23) AND RefUrg AND NOT ram/RefDone AND
      ram/RS_FSM_FFd8)
      OR (RefUrg AND NOT ram/RefDone AND ram/RS_FSM_FFd8 AND
      NOT ram/RASEN)
      OR (RefUrg AND NOT ram/RefDone AND ram/RS_FSM_FFd8 AND NOT MCKE));

FDCPE_ram/RS_FSM_FFd8: FDCPE port map (ram/RS_FSM_FFd8,ram/RS_FSM_FFd8_D,FCLK,'0','0');
     ram/RS_FSM_FFd8_D <= ((RA_6_OBUF.EXP)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RS_FSM_FFd8 AND
      NOT ram/RS_FSM_FFd1)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT MCKE)
      OR (RefUrg AND NOT ram/RefDone AND nAS_FSB AND
      NOT ram/RS_FSM_FFd1 AND NOT fsb/ASrf)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND NOT nAS_FSB AND
      NOT ram/RS_FSM_FFd4 AND ram/RASEN AND NOT ram/RS_FSM_FFd1 AND MCKE)
      OR (NOT A_FSB(22) AND NOT A_FSB(23) AND NOT cs/Overlay AND
      NOT ram/RS_FSM_FFd4 AND ram/RASEN AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf AND MCKE)
      OR (A_FSB(22) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      NOT ram/RS_FSM_FFd4 AND NOT ram/RS_FSM_FFd1 AND NOT BACTr AND MCKE)
      OR (A_FSB(23) AND RefReq AND NOT ram/RefDone AND NOT nAS_FSB AND
      NOT ram/RS_FSM_FFd4 AND NOT ram/RS_FSM_FFd1 AND NOT BACTr AND MCKE)
      OR (NOT ram/RS_FSM_FFd8 AND NOT ram/RS_FSM_FFd4 AND
      NOT ram/RS_FSM_FFd1)
      OR (A_FSB(22) AND RefUrg AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd1)
      OR (A_FSB(23) AND RefUrg AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd1)
      OR (RefUrg AND NOT cs/Overlay AND NOT ram/RefDone AND
      NOT ram/RS_FSM_FFd1)
      OR (RefUrg AND NOT ram/RefDone AND NOT ram/RASEN AND
      NOT ram/RS_FSM_FFd1));

FDCPE_ram/RefDone: FDCPE port map (ram/RefDone,ram/RefDone_D,FCLK,'0','0');
     ram/RefDone_D <= ((NOT RefUrg AND NOT RefReq)
      OR (NOT ram/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd7 AND
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3));