Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 10-11-2024, 11:58PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
137/144 (96%) | 381/720 (53%) | 113/144 (79%) | 73/81 (91%) | 265/432 (62%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 137 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 137 |