Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 9- 9-2023, 8:19AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
125/144 (87%) | 441/720 (62%) | 103/144 (72%) | 70/81 (87%) | 271/432 (63%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 125 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 125 |