Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 10- 9-2024, 4:26AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
126/144 (88%) | 355/720 (50%) | 101/144 (71%) | 73/81 (91%) | 230/432 (54%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 126 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 126 |