Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 3-28-2022, 9:46AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
114/144 (80%) | 463/720 (65%) | 89/144 (62%) | 74/81 (92%) | 253/432 (59%) |
|
|
Signal mapped onto global clock net (GCK1) | CLK2X_IOB |
Signal mapped onto global clock net (GCK2) | CLK_IOB |
Signal mapped onto global clock net (GCK3) | CLK_FSB |
Macrocells in high performance mode (MCHP) | 114 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 114 |