Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 4- 9-2023, 5:01AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
125/144 (87%) | 438/720 (61%) | 100/144 (70%) | 70/81 (87%) | 285/432 (66%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 125 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 125 |