Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 9-27-2024, 10:54AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
128/144 (89%) | 435/720 (61%) | 105/144 (73%) | 72/81 (89%) | 272/432 (63%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 128 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 128 |