Design Name | MXSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 2- 7-2022, 4:04AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
105/144 (73%) | 429/720 (60%) | 80/144 (56%) | 67/81 (83%) | 227/432 (53%) |
|
|
Signal mapped onto global clock net (GCK1) | CLK2X_IOB |
Signal mapped onto global clock net (GCK2) | CLK_IOB |
Signal mapped onto global clock net (GCK3) | CLK_FSB |
Macrocells in high performance mode (MCHP) | 105 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 105 |