Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 9-29-2024, 11:09PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
130/144 (91%) | 445/720 (62%) | 107/144 (75%) | 72/81 (89%) | 275/432 (64%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 130 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 130 |