Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/CNT.v" into library work Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/CS.v" into library work Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/FSB.v" into library work Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/IOBM.v" into library work Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/IOBS.v" into library work Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/RAM.v" into library work Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/SET.v" into library work Analyzing Verilog file "C:/Users/GWolf/Documents/GitHub/WarpSE/cpld/WarpSE.v" into library work