4 lines
174 KiB
XML
4 lines
174 KiB
XML
<?xml version='1.0' encoding='utf-8' ?>
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<!DOCTYPE document SYSTEM "file:///C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xmlReport9kxl.dtd">
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<document><ascFile>MXSE.rpt</ascFile><devFile>C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chp</devFile><mfdFile>MXSE.mfd</mfdFile><htmlFile logic_legend="logiclegend.htm" logo="xc9500xl_logo.jpg" pin_legend="pinlegend.htm"/><header date=" 3-27-2022" design="MXSE" device="XC95144XL" eqnType="1" pkg="TQ100" speed="-10" status="1" statusStr="Successful" swVersion="P.20131013" time=" 10:08AM" version="1.0"/><inputs id="A_FSB9_SPECSIG" userloc="P7"/><inputs id="A_FSB8_SPECSIG" userloc="P6"/><inputs id="A_FSB15_SPECSIG" userloc="P13"/><inputs id="A_FSB14_SPECSIG" userloc="P12"/><inputs id="A_FSB13_SPECSIG" userloc="P11"/><inputs id="A_FSB12_SPECSIG" userloc="P10"/><inputs id="A_FSB11_SPECSIG" userloc="P9"/><inputs id="A_FSB10_SPECSIG" userloc="P8"/><inputs id="A_FSB23_SPECSIG" userloc="P24"/><inputs id="A_FSB22_SPECSIG" userloc="P20"/><inputs id="A_FSB21_SPECSIG" userloc="P19"/><inputs id="A_FSB20_SPECSIG" userloc="P18"/><inputs id="A_FSB19_SPECSIG" userloc="P17"/><inputs id="A_FSB18_SPECSIG" userloc="P16"/><inputs id="A_FSB17_SPECSIG" userloc="P15"/><inputs id="A_FSB16_SPECSIG" userloc="P14"/><inputs id="nAS_FSB" userloc="P32"/><inputs id="nWE_FSB" userloc="P29"/><inputs id="SW1_SPECSIG" userloc="P60"/><inputs id="nRES" userloc="P91"/><inputs id="nLDS_FSB" userloc="P30"/><inputs id="nUDS_FSB" userloc="P33"/><inputs id="nBERR_IOB" userloc="P76"/><inputs id="E_IOB" userloc="P25"/><inputs id="nIPL2" userloc="P92"/><inputs id="nBG_IOB" userloc="P73"/><inputs id="nDTACK_IOB" userloc="P78"/><inputs id="nVPA_IOB" userloc="P77"/><inputs id="A_FSB1_SPECSIG" userloc="P94"/><inputs id="A_FSB2_SPECSIG" userloc="P95"/><inputs id="A_FSB3_SPECSIG" userloc="P96"/><inputs id="A_FSB4_SPECSIG" userloc="P97"/><inputs id="A_FSB5_SPECSIG" userloc="P2"/><inputs id="A_FSB6_SPECSIG" userloc="P3"/><inputs id="A_FSB7_SPECSIG" userloc="P4"/><inputs id="SW0_SPECSIG" userloc="P61"/><global_inputs id="CLK2X_IOB" pinnum="GCK1" use="GCK1" userloc="P22"/><global_inputs id="CLK_IOB" pinnum="GCK2" use="GCK2" userloc="P23"/><global_inputs id="CLK_FSB" pinnum="GCK3" use="GCK3" userloc="P27"/><pin id="FB1_MC2_PIN11" pinnum="11" signal="A_FSB13_SPECSIG" use="I"/><pin id="FB1_MC3_PIN12" pinnum="12" signal="A_FSB14_SPECSIG" use="I"/><pin id="FB1_MC5_PIN13" pinnum="13" signal="A_FSB15_SPECSIG" use="I"/><pin id="FB1_MC6_PIN14" pinnum="14" signal="A_FSB16_SPECSIG" use="I"/><pin id="FB1_MC8_PIN15" pinnum="15" signal="A_FSB17_SPECSIG" use="I"/><pin id="FB1_MC9_PIN16" pinnum="16" signal="A_FSB18_SPECSIG" use="I"/><pin id="FB1_MC11_PIN17" pinnum="17" signal="A_FSB19_SPECSIG" use="I"/><pin id="FB1_MC12_PIN18" pinnum="18" signal="A_FSB20_SPECSIG" use="I"/><pin id="FB1_MC14_PIN19" pinnum="19" signal="A_FSB21_SPECSIG" use="I"/><pin id="FB1_MC15_PIN20" pinnum="20" signal="A_FSB22_SPECSIG" use="I"/><pin id="FB1_MC17_PIN22" pinnum="22" signal="CLK2X_IOB" use="GCK"/><pin id="FB2_MC2_PIN99" pinnum="99"/><pin id="FB2_MC5_PIN1" pinnum="1"/><pin id="FB2_MC6_PIN2" pinnum="2" signal="A_FSB5_SPECSIG" use="I"/><pin id="FB2_MC8_PIN3" pinnum="3" signal="A_FSB6_SPECSIG" use="I"/><pin id="FB2_MC9_PIN4" pinnum="4" signal="A_FSB7_SPECSIG" use="I"/><pin id="FB2_MC11_PIN6" pinnum="6" signal="A_FSB8_SPECSIG" use="I"/><pin id="FB2_MC12_PIN7" pinnum="7" signal="A_FSB9_SPECSIG" use="I"/><pin id="FB2_MC14_PIN8" pinnum="8" signal="A_FSB10_SPECSIG" use="I"/><pin id="FB2_MC15_PIN9" pinnum="9" signal="A_FSB11_SPECSIG" use="I"/><pin id="FB2_MC17_PIN10" pinnum="10" signal="A_FSB12_SPECSIG" use="I"/><pin id="FB3_MC2_PIN23" pinnum="23" signal="CLK_IOB" use="GCKI_SPECSIG"/><pin id="FB3_MC5_PIN24" pinnum="24" signal="A_FSB23_SPECSIG" use="I"/><pin id="FB3_MC6_PIN25" pinnum="25" signal="E_IOB" use="I"/><pin id="FB3_MC8_PIN27" pinnum="27" signal="CLK_FSB" use="GCK"/><pin id="FB3_MC9_PIN28" pinnum="28" signal="nDTACK_FSB" use="O"/><pin id="FB3_MC11_PIN29" pinnum="29" signal="nWE_FSB" use="I"/><pin id="FB3_MC12_PIN30" pinnum="30" signal="nLDS_FSB" use="I"/><pin id="FB3_MC14_PIN32" pinnum="32" signal="nAS_FSB" use="I"/><pin id="FB3_MC15_PIN33" pinnum="33" signal="nUDS_FSB" use="I"/><pin id="FB3_MC17_PIN34" pinnum="34" signal="nROMWE" use="O"/><pin id="FB4_MC2_PIN87" pinnum="87" signal="nAoutOE" use="O"/><pin id="FB4_MC5_PIN89" pinnum="89" signal="nDoutOE" use="O"/><pin id="FB4_MC6_PIN90" pinnum="90" signal="nDinOE" use="O"/><pin id="FB4_MC8_PIN91" pinnum="91" signal="nRES" use="I"/><pin id="FB4_MC9_PIN92" pinnum="92" signal="nIPL2" use="I"/><pin id="FB4_MC11_PIN93" pinnum="93" signal="nVPA_FSB" use="O"/><pin id="FB4_MC12_PIN94" pinnum="94" signal="A_FSB1_SPECSIG" use="I"/><pin id="FB4_MC14_PIN95" pinnum="95" signal="A_FSB2_SPECSIG" use="I"/><pin id="FB4_MC15_PIN96" pinnum="96" signal="A_FSB3_SPECSIG" use="I"/><pin id="FB4_MC17_PIN97" pinnum="97" signal="A_FSB4_SPECSIG" use="I"/><pin id="FB5_MC2_PIN35" pinnum="35" signal="nROMCS" use="O"/><pin id="FB5_MC5_PIN36" pinnum="36" signal="nCAS" use="O"/><pin id="FB5_MC6_PIN37" pinnum="37" signal="nOE" use="O"/><pin id="FB5_MC8_PIN39" pinnum="39" signal="ramRAMDIS1_SPECSIG" use="b_SPECSIG"/><pin id="FB5_MC9_PIN40" pinnum="40" signal="RA4_SPECSIG" use="O"/><pin id="FB5_MC11_PIN41" pinnum="41" signal="RA3_SPECSIG" use="O"/><pin id="FB5_MC12_PIN42" pinnum="42" signal="RA5_SPECSIG" use="O"/><pin id="FB5_MC14_PIN43" pinnum="43" signal="RA2_SPECSIG" use="O"/><pin id="FB5_MC15_PIN46" pinnum="46" signal="RA6_SPECSIG" use="O"/><pin id="FB5_MC17_PIN49" pinnum="49" use="b_SPECSIG"/><pin id="FB6_MC2_PIN74" pinnum="74" signal="nVMA_IOB" use="O"/><pin id="FB6_MC5_PIN76" pinnum="76" signal="nBERR_IOB" use="I"/><pin id="FB6_MC6_PIN77" pinnum="77" signal="nVPA_IOB" use="I"/><pin id="FB6_MC8_PIN78" pinnum="78" signal="nDTACK_IOB" use="I"/><pin id="FB6_MC9_PIN79" pinnum="79" signal="nLDS_IOB" use="O"/><pin id="FB6_MC11_PIN80" pinnum="80" signal="nUDS_IOB" use="O"/><pin id="FB6_MC12_PIN81" pinnum="81" signal="nAS_IOB" use="O"/><pin id="FB6_MC14_PIN82" pinnum="82" signal="nADoutLE1" use="O"/><pin id="FB6_MC15_PIN85" pinnum="85" signal="nADoutLE0" use="O"/><pin id="FB6_MC17_PIN86" pinnum="86" signal="nDinLE" use="O"/><pin id="FB7_MC2_PIN50" pinnum="50" signal="RA1_SPECSIG" use="O"/><pin id="FB7_MC5_PIN52" pinnum="52" signal="RA7_SPECSIG" use="O"/><pin id="FB7_MC6_PIN53" pinnum="53" signal="RA0_SPECSIG" use="O"/><pin id="FB7_MC8_PIN54" pinnum="54" signal="RA8_SPECSIG" use="O"/><pin id="FB7_MC9_PIN55" pinnum="55" signal="RA10_SPECSIG" use="O"/><pin id="FB7_MC11_PIN56" pinnum="56" signal="RA9_SPECSIG" use="O"/><pin id="FB7_MC12_PIN58" pinnum="58" signal="CLK25EN" use="O"/><pin id="FB7_MC14_PIN59" pinnum="59" signal="CLK20EN" use="O"/><pin id="FB7_MC15_PIN60" pinnum="60" signal="SW1_SPECSIG" use="I"/><pin id="FB7_MC17_PIN61" pinnum="61" signal="SW0_SPECSIG" use="I"/><pin id="FB8_MC2_PIN63" pinnum="63" signal="RA11_SPECSIG" use="O"/><pin id="FB8_MC5_PIN64" pinnum="64" signal="nRAS" use="O"/><pin id="FB8_MC6_PIN65" pinnum="65" signal="nRAMLWE" use="O"/><pin id="FB8_MC8_PIN66" pinnum="66" signal="nRAMUWE" use="O"/><pin id="FB8_MC9_PIN67" pinnum="67" signal="IOREQ" use="b_SPECSIG"/><pin id="FB8_MC11_PIN68" pinnum="68" use="b_SPECSIG"/><pin id="FB8_MC12_PIN70" pinnum="70" signal="nBERR_FSB" use="O"/><pin id="FB8_MC14_PIN71" pinnum="71" signal="iobsOnce_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC15_PIN72" pinnum="72" signal="nBR_IOB" use="O"/><pin id="FB8_MC17_PIN73" pinnum="73" signal="nBG_IOB" use="I"/><fblock id="FB1" inputUse="21" pinUse="10"><macrocell id="FB1_MC1" sigUse="2" signal="ramBACTr_SPECSIG"><pterms pt1="FB1_1_1"/></macrocell><macrocell id="FB1_MC2" pin="FB1_MC2_PIN11" sigUse="1" signal="iobmRESrr_SPECSIG"><pterms pt1="FB1_2_1"/></macrocell><macrocell id="FB1_MC3" pin="FB1_MC3_PIN12" sigUse="1" signal="iobmRESrf_SPECSIG"><pterms pt1="FB1_3_1"/></macrocell><macrocell id="FB1_MC4" sigUse="1" signal="fsbASrf_SPECSIG"><pterms pt1="FB1_4_1"/></macrocell><macrocell id="FB1_MC5" pin="FB1_MC5_PIN13" sigUse="2" signal="cntRefCnt2_SPECSIG"><pterms pt1="FB1_5_1"/></macrocell><macrocell id="FB1_MC6" pin="FB1_MC6_PIN14" sigUse="1" signal="cntRefCnt1_SPECSIG"><pterms pt1="FB1_6_1"/></macrocell><macrocell id="FB1_MC7" sigUse="2" signal="RefAck"><pterms pt1="FB1_7_1"/></macrocell><macrocell id="FB1_MC8" pin="FB1_MC8_PIN15" sigUse="1" signal="RESr2"><pterms pt1="FB1_8_1"/></macrocell><macrocell id="FB1_MC9" pin="FB1_MC9_PIN16" sigUse="1" signal="RESr1"><pterms pt1="FB1_9_1"/></macrocell><macrocell id="FB1_MC10" sigUse="1" signal="RESr0"><pterms pt1="FB1_10_1"/></macrocell><macrocell id="FB1_MC11" pin="FB1_MC11_PIN17" sigUse="1" signal="IPL2r1"><pterms pt1="FB1_11_1"/></macrocell><macrocell id="FB1_MC12" pin="FB1_MC12_PIN18" sigUse="1" signal="IPL2r0"><pterms pt1="FB1_12_1"/></macrocell><macrocell id="FB1_MC13" sigUse="2" signal="ALE0S"><pterms pt1="FB1_13_1"/></macrocell><macrocell id="FB1_MC14" pin="FB1_MC14_PIN19" sigUse="2" signal="OpTxFX_DC708_SPECSIG"><pterms pt1="FB1_14_1"/></macrocell><macrocell id="FB1_MC15" pin="FB1_MC15_PIN20" sigUse="2" signal="iobsIOU1_SPECSIG"><pterms pt1="FB1_15_1" pt2="FB1_15_2"/></macrocell><macrocell id="FB1_MC16" sigUse="2" signal="iobsIOL1_SPECSIG"><pterms pt1="FB1_16_1" pt2="FB1_16_2"/></macrocell><macrocell id="FB1_MC17" pin="FB1_MC17_PIN22" sigUse="3" signal="iobmIOS_FSM_FFd1_SPECSIG"><pterms pt1="FB1_17_1" pt2="FB1_17_2"/></macrocell><macrocell id="FB1_MC18" sigUse="5" signal="IOU0"><pterms pt1="FB1_18_1" pt2="FB1_18_2" pt3="FB1_18_3"/></macrocell><fbinput id="FB1_I1" signal="IPL2r0"/><fbinput id="FB1_I2" signal="RESr0"/><fbinput id="FB1_I3" signal="RESr1"/><fbinput id="FB1_I4" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB1_I5" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB1_I6" signal="fsbASrf_SPECSIG"/><fbinput id="FB1_I7" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I8" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I9" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB1_I10" signal="iobsIOU1_SPECSIG"/><fbinput id="FB1_I11" signal="iobsLoad1_SPECSIG"/><fbinput id="FB1_I12" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I13" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I14" signal="nADoutLE1"/><fbinput id="FB1_I15" signal="nAS_FSB"/><fbinput id="FB1_I16" signal="nIPL2"/><fbinput id="FB1_I17" signal="nLDS_FSB"/><fbinput id="FB1_I18" signal="nRES"/><fbinput id="FB1_I19" signal="nUDS_FSB"/><fbinput id="FB1_I20" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I21" signal="ramRS_FSM_FFd2_SPECSIG"/><pterm id="FB1_1_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB1_2_1"><signal id="nRES" negated="ON"/></pterm><pterm id="FB1_3_1"><signal id="nRES" negated="ON"/></pterm><pterm id="FB1_4_1"><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB1_5_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/></pterm><pterm id="FB1_6_1"><signal id="cntRefCnt0_SPECSIG"/></pterm><pterm id="FB1_7_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_8_1"><signal id="RESr1"/></pterm><pterm id="FB1_9_1"><signal id="RESr0"/></pterm><pterm id="FB1_10_1"><signal id="nRES" negated="ON"/></pterm><pterm id="FB1_11_1"><signal id="IPL2r0"/></pterm><pterm id="FB1_12_1"><signal id="nIPL2" negated="ON"/></pterm><pterm id="FB1_13_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_14_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB1_15_1"><signal id="nUDS_FSB" negated="ON"/></pterm><pterm id="FB1_15_2"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB1_16_1"><signal id="nLDS_FSB" negated="ON"/></pterm><pterm id="FB1_16_2"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB1_17_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB1_17_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB1_18_1"><signal id="nUDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_18_2"><signal id="iobsIOU1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB1_18_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><equation id="ramBACTr_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB1_1_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_2_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_3_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="fsbASrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_4_1"/></d2><clk negated="ON"><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_5_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_6_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RefAck" regUse="D"><d2><eq_pterm ptindx="FB1_7_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RESr2" regUse="D"><d2><eq_pterm ptindx="FB1_8_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RESr1" regUse="D"><d2><eq_pterm ptindx="FB1_9_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RESr0" regUse="D"><d2><eq_pterm ptindx="FB1_10_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IPL2r1" regUse="D"><d2><eq_pterm ptindx="FB1_11_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IPL2r0" regUse="D"><d2><eq_pterm ptindx="FB1_12_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="ALE0S" regUse="D"><d2><eq_pterm ptindx="FB1_13_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="OpTxFX_DC708_SPECSIG"><d2><eq_pterm ptindx="FB1_14_1"/></d2></equation><equation id="iobsIOU1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_15_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB1_15_2"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOL1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_16_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB1_16_2"/></ce><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_17_1"/><eq_pterm ptindx="FB1_17_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="IOU0" regUse="D"><d2><eq_pterm ptindx="FB1_18_1"/><eq_pterm ptindx="FB1_18_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB1_18_3"/></ce><prld ptindx="GND"/></equation></fblock><fblock id="FB2" inputUse="9" pinUse="8"><macrocell id="FB2_MC1"/><macrocell id="FB2_MC2" pin="FB2_MC2_PIN99"/><macrocell id="FB2_MC3"/><macrocell id="FB2_MC4"/><macrocell id="FB2_MC5" pin="FB2_MC5_PIN1"/><macrocell id="FB2_MC6" pin="FB2_MC6_PIN2" sigUse="1" signal="iobsIOACTr_SPECSIG"><pterms pt1="FB2_6_1"/></macrocell><macrocell id="FB2_MC7" sigUse="1" signal="iobmVPArr_SPECSIG"><pterms pt1="FB2_7_1"/></macrocell><macrocell id="FB2_MC8" pin="FB2_MC8_PIN3" sigUse="1" signal="iobmVPArf_SPECSIG"><pterms pt1="FB2_8_1"/></macrocell><macrocell id="FB2_MC9" pin="FB2_MC9_PIN4" sigUse="1" signal="iobmIOREQr_SPECSIG"><pterms pt1="FB2_9_1"/></macrocell><macrocell id="FB2_MC10" sigUse="1" signal="iobmEr2_SPECSIG"><pterms pt1="FB2_10_1"/></macrocell><macrocell id="FB2_MC11" pin="FB2_MC11_PIN6" sigUse="1" signal="iobmEr_SPECSIG"><pterms pt1="FB2_11_1"/></macrocell><macrocell id="FB2_MC12" pin="FB2_MC12_PIN7" sigUse="1" signal="iobmDTACKrr_SPECSIG"><pterms pt1="FB2_12_1"/></macrocell><macrocell id="FB2_MC13" sigUse="1" signal="iobmDTACKrf_SPECSIG"><pterms pt1="FB2_13_1"/></macrocell><macrocell id="FB2_MC14" pin="FB2_MC14_PIN8" sigUse="1" signal="iobmBGr1_SPECSIG"><pterms pt1="FB2_14_1"/></macrocell><macrocell id="FB2_MC15" pin="FB2_MC15_PIN9" sigUse="1" signal="iobmBGr0_SPECSIG"><pterms pt1="FB2_15_1"/></macrocell><macrocell id="FB2_MC16" sigUse="1" signal="iobmBERRrr_SPECSIG"><pterms pt1="FB2_16_1"/></macrocell><macrocell id="FB2_MC17" pin="FB2_MC17_PIN10" sigUse="1" signal="iobmBERRrf_SPECSIG"><pterms pt1="FB2_17_1"/></macrocell><macrocell id="FB2_MC18" sigUse="0" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB2_I1" signal="E_IOB"/><fbinput id="FB2_I2" signal="IOACT"/><fbinput id="FB2_I3" signal="IOREQ"/><fbinput id="FB2_I4" signal="iobmBGr0_SPECSIG"/><fbinput id="FB2_I5" signal="iobmEr_SPECSIG"/><fbinput id="FB2_I6" signal="nBERR_IOB"/><fbinput id="FB2_I7" signal="nBG_IOB"/><fbinput id="FB2_I8" signal="nDTACK_IOB"/><fbinput id="FB2_I9" signal="nVPA_IOB"/><pterm id="FB2_6_1"><signal id="IOACT"/></pterm><pterm id="FB2_7_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB2_8_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB2_9_1"><signal id="IOREQ"/></pterm><pterm id="FB2_10_1"><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB2_11_1"><signal id="E_IOB"/></pterm><pterm id="FB2_12_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB2_13_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB2_14_1"><signal id="iobmBGr0_SPECSIG"/></pterm><pterm id="FB2_15_1"><signal id="nBG_IOB" negated="ON"/></pterm><pterm id="FB2_16_1"><signal id="nBERR_IOB" negated="ON"/></pterm><pterm id="FB2_17_1"><signal id="nBERR_IOB" negated="ON"/></pterm><equation id="iobsIOACTr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_6_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobmVPArr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_7_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmVPArf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_8_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOREQr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_9_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr2_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_10_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_11_1"/></d2><clk negated="ON"><fastsig signal="CLK_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_12_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_13_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBGr1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_14_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBGr0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_15_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBERRrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_16_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBERRrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_17_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="VCC"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB3" inputUse="38" pinUse="9"><macrocell id="FB3_MC1" sigUse="18" signal="fsbReady1r_SPECSIG"><pterms pt1="FB3_1_1" pt2="FB3_1_2" pt3="FB3_1_3" pt4="FB3_1_4" pt5="FB3_1_5"/></macrocell><macrocell id="FB3_MC2" pin="FB3_MC2_PIN23"><pterms pt1="FB3_2_1" pt2="FB3_2_2" pt3="FB3_2_3" pt4="FB3_2_4" pt5="FB3_2_5"/></macrocell><macrocell id="FB3_MC3" sigUse="20" signal="iobsIORW1_SPECSIG"><pterms pt1="FB3_3_1" pt2="FB3_3_2" pt3="FB3_3_3" pt4="FB3_3_4" pt5="FB3_3_5"/></macrocell><macrocell id="FB3_MC4"><pterms pt1="FB3_4_1" pt2="FB3_4_2" pt3="FB3_4_3" pt4="FB3_4_4" pt5="FB3_4_5"/></macrocell><macrocell id="FB3_MC5" pin="FB3_MC5_PIN24" sigUse="22" signal="fsbReady2r_SPECSIG"><pterms pt1="FB3_5_1" pt2="FB3_5_2" pt3="FB3_5_3" pt4="FB3_5_4" pt5="FB3_5_5"/></macrocell><macrocell id="FB3_MC6" pin="FB3_MC6_PIN25"><pterms pt1="FB3_6_1" pt2="FB3_6_2" pt3="FB3_6_3" pt4="FB3_6_4" pt5="FB3_6_5"/></macrocell><macrocell id="FB3_MC7"><pterms pt1="FB3_7_1" pt2="FB3_7_2" pt3="FB3_7_3"/></macrocell><macrocell id="FB3_MC8" pin="FB3_MC8_PIN27"><pterms pt1="FB3_8_1" pt2="FB3_8_2" pt3="FB3_8_3" pt4="FB3_8_4" pt5="FB3_8_5"/></macrocell><macrocell id="FB3_MC9" pin="FB3_MC9_PIN28" sigUse="32" signal="nDTACK_FSB"><pterms pt1="FB3_9_1" pt2="FB3_9_2" pt3="FB3_9_3" pt4="FB3_9_4" pt5="FB3_9_5"/></macrocell><macrocell id="FB3_MC10"><pterms pt1="FB3_10_1" pt2="FB3_10_2" pt3="FB3_10_3" pt4="FB3_10_4" pt5="FB3_10_5"/></macrocell><macrocell id="FB3_MC11" pin="FB3_MC11_PIN29"><pterms pt1="FB3_11_1" pt2="FB3_11_2" pt3="FB3_11_3" pt4="FB3_11_4" pt5="FB3_11_5"/></macrocell><macrocell id="FB3_MC12" pin="FB3_MC12_PIN30"/><macrocell id="FB3_MC13"><pterms pt1="FB3_13_1" pt2="FB3_13_2" pt3="FB3_13_3" pt4="FB3_13_4" pt5="FB3_13_5"/></macrocell><macrocell id="FB3_MC14" pin="FB3_MC14_PIN32"><pterms pt1="FB3_14_1" pt2="FB3_14_2" pt3="FB3_14_3" pt4="FB3_14_4" pt5="FB3_14_5"/></macrocell><macrocell id="FB3_MC15" pin="FB3_MC15_PIN33" sigUse="31" signal="fsbVPA_SPECSIG"><pterms pt1="FB3_15_1" pt2="FB3_15_2" pt3="FB3_15_3" pt4="FB3_15_4" pt5="FB3_15_5"/></macrocell><macrocell id="FB3_MC16"><pterms pt1="FB3_16_1" pt2="FB3_16_2" pt3="FB3_16_3" pt4="FB3_16_4" pt5="FB3_16_5"/></macrocell><macrocell id="FB3_MC17" pin="FB3_MC17_PIN34" sigUse="2" signal="nROMWE"><pterms pt1="FB3_17_1" pt2="FB3_17_2" pt3="FB3_17_3"/></macrocell><macrocell id="FB3_MC18" sigUse="3" signal="iobsClear1_SPECSIG"><pterms pt1="FB3_18_1" pt2="FB3_18_2" pt3="FB3_18_3" pt4="FB3_18_4" pt5="FB3_18_5"/></macrocell><fbinput id="FB3_I1" signal="OpTxOpTxFX_DC182_INV783_SPECSIG"/><fbinput id="FB3_I2" signal="OpTxFX_DC708_SPECSIG"/><fbinput id="FB3_I3" signal="A_FSB10_SPECSIG"/><fbinput id="FB3_I4" signal="A_FSB11_SPECSIG"/><fbinput id="FB3_I5" signal="A_FSB12_SPECSIG"/><fbinput id="FB3_I6" signal="A_FSB13_SPECSIG"/><fbinput id="FB3_I7" signal="A_FSB14_SPECSIG"/><fbinput id="FB3_I8" signal="A_FSB15_SPECSIG"/><fbinput id="FB3_I9" signal="A_FSB16_SPECSIG"/><fbinput id="FB3_I10" signal="A_FSB17_SPECSIG"/><fbinput id="FB3_I11" signal="A_FSB18_SPECSIG"/><fbinput id="FB3_I12" signal="A_FSB19_SPECSIG"/><fbinput id="FB3_I13" signal="A_FSB20_SPECSIG"/><fbinput id="FB3_I14" signal="A_FSB21_SPECSIG"/><fbinput id="FB3_I15" signal="A_FSB22_SPECSIG"/><fbinput id="FB3_I16" signal="A_FSB23_SPECSIG"/><fbinput id="FB3_I17" signal="A_FSB8_SPECSIG"/><fbinput id="FB3_I18" signal="A_FSB9_SPECSIG"/><fbinput id="FB3_I19" signal="BERR_IOBS"/><fbinput id="FB3_I20" signal="SW1_SPECSIG"/><fbinput id="FB3_I21" signal="TimeoutA"/><fbinput id="FB3_I22" signal="csnOverlay1_SPECSIG"/><fbinput id="FB3_I23" signal="fsbASrf_SPECSIG"/><fbinput id="FB3_I24" signal="fsbBERR0r_SPECSIG"/><fbinput id="FB3_I25" signal="fsbBERR1r_SPECSIG"/><fbinput id="FB3_I26" signal="fsbReady1r_SPECSIG"/><fbinput id="FB3_I27" signal="fsbReady2r_SPECSIG"/><fbinput id="FB3_I28" signal="fsbVPA_SPECSIG"/><fbinput id="FB3_I29" signal="iobsIORW1_SPECSIG"/><fbinput id="FB3_I30" signal="iobsIOReady_SPECSIG"/><fbinput id="FB3_I31" signal="iobsOnce_SPECSIG"/><fbinput id="FB3_I32" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB3_I33" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB3_I34" signal="nADoutLE1"/><fbinput id="FB3_I35" signal="nAS_FSB"/><fbinput id="FB3_I36" signal="nBR_IOB"/><fbinput id="FB3_I37" signal="nDTACK_FSB"/><fbinput id="FB3_I38" signal="nWE_FSB"/><pterm id="FB3_1_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_2"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB3_2_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_2"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB3_3_1"><signal id="iobsOnce_SPECSIG"/></pterm><pterm id="FB3_3_2"><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_3_3"><signal id="nWE_FSB"/><signal id="iobsIORW1_SPECSIG"/></pterm><pterm id="FB3_3_4"><signal id="nWE_FSB" negated="ON"/><signal id="iobsIORW1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_3_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsIORW1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB3_5_1"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_4"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_5"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB3_6_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_2"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_3"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_4"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal 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negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_5"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_1"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_4"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_1"><signal id="BERR_IOBS"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_2"><signal id="fsbBERR0r_SPECSIG"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_3"><signal id="fsbBERR1r_SPECSIG"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_4"><signal id="fsbVPA_SPECSIG"/><signal id="nBR_IOB" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_5"><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG"/></pterm><pterm id="FB3_16_1"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_2"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_4"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_5"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_17_1"><signal id="nWE_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_17_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG"/><signal id="nBR_IOB"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG" negated="ON"/></pterm><pterm id="FB3_17_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG"/><signal id="nBR_IOB"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_18_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_3"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_4"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_18_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><equation id="fsbReady1r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_1_1"/><eq_pterm ptindx="FB3_1_2"/><eq_pterm ptindx="FB3_1_3"/><eq_pterm ptindx="FB3_1_4"/><eq_pterm import="1" ptindx="FB3_18_2"/><eq_pterm import="1" ptindx="FB3_18_3"/><eq_pterm import="1" ptindx="FB3_18_4"/><eq_pterm import="1" ptindx="FB3_18_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobsIORW1_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB3_3_1"/><eq_pterm ptindx="FB3_3_2"/><eq_pterm ptindx="FB3_3_3"/><eq_pterm ptindx="FB3_3_4"/><eq_pterm ptindx="FB3_3_5"/><eq_pterm import="1" ptindx="FB3_2_1"/><eq_pterm import="1" ptindx="FB3_2_2"/><eq_pterm import="1" ptindx="FB3_2_3"/><eq_pterm import="1" ptindx="FB3_2_4"/><eq_pterm import="1" ptindx="FB3_2_5"/><eq_pterm import="1" ptindx="FB3_1_5"/><eq_pterm import="1" ptindx="FB3_4_1"/><eq_pterm import="1" ptindx="FB3_4_2"/><eq_pterm import="1" ptindx="FB3_4_3"/><eq_pterm import="1" ptindx="FB3_4_4"/><eq_pterm import="1" ptindx="FB3_4_5"/><eq_pterm import="1" ptindx="FB3_5_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbReady2r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_5_1"/><eq_pterm ptindx="FB3_5_2"/><eq_pterm ptindx="FB3_5_3"/><eq_pterm ptindx="FB3_5_4"/><eq_pterm import="1" ptindx="FB3_6_1"/><eq_pterm import="1" ptindx="FB3_6_2"/><eq_pterm import="1" ptindx="FB3_6_3"/><eq_pterm import="1" ptindx="FB3_6_4"/><eq_pterm import="1" ptindx="FB3_6_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nDTACK_FSB" regUse="D" userloc="P28"><d2><eq_pterm ptindx="FB3_9_1"/><eq_pterm ptindx="FB3_9_2"/><eq_pterm ptindx="FB3_9_3"/><eq_pterm ptindx="FB3_9_4"/><eq_pterm ptindx="FB3_9_5"/><eq_pterm import="1" ptindx="FB3_8_1"/><eq_pterm import="1" ptindx="FB3_8_2"/><eq_pterm import="1" ptindx="FB3_8_3"/><eq_pterm import="1" ptindx="FB3_8_4"/><eq_pterm import="1" ptindx="FB3_8_5"/><eq_pterm import="1" ptindx="FB3_7_1"/><eq_pterm import="1" ptindx="FB3_7_2"/><eq_pterm import="1" ptindx="FB3_7_3"/><eq_pterm import="1" ptindx="FB3_10_1"/><eq_pterm import="1" ptindx="FB3_10_2"/><eq_pterm import="1" ptindx="FB3_10_3"/><eq_pterm import="1" ptindx="FB3_10_4"/><eq_pterm import="1" ptindx="FB3_10_5"/><eq_pterm import="1" ptindx="FB3_11_1"/><eq_pterm import="1" ptindx="FB3_11_2"/><eq_pterm import="1" ptindx="FB3_11_3"/><eq_pterm import="1" ptindx="FB3_11_4"/><eq_pterm import="1" ptindx="FB3_11_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbVPA_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_15_1"/><eq_pterm ptindx="FB3_15_2"/><eq_pterm ptindx="FB3_15_3"/><eq_pterm ptindx="FB3_15_4"/><eq_pterm ptindx="FB3_15_5"/><eq_pterm import="1" ptindx="FB3_14_1"/><eq_pterm import="1" ptindx="FB3_14_2"/><eq_pterm import="1" ptindx="FB3_14_3"/><eq_pterm import="1" ptindx="FB3_14_4"/><eq_pterm import="1" ptindx="FB3_14_5"/><eq_pterm import="1" ptindx="FB3_13_1"/><eq_pterm import="1" ptindx="FB3_13_2"/><eq_pterm import="1" ptindx="FB3_13_3"/><eq_pterm import="1" ptindx="FB3_13_4"/><eq_pterm import="1" ptindx="FB3_13_5"/><eq_pterm import="1" ptindx="FB3_16_1"/><eq_pterm import="1" ptindx="FB3_16_2"/><eq_pterm import="1" ptindx="FB3_16_3"/><eq_pterm import="1" ptindx="FB3_16_4"/><eq_pterm import="1" ptindx="FB3_16_5"/><eq_pterm import="1" ptindx="FB3_17_2"/><eq_pterm import="1" ptindx="FB3_17_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nROMWE" negated="ON" userloc="P34"><d2><eq_pterm ptindx="FB3_17_1"/></d2></equation><equation id="iobsClear1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_18_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB4" inputUse="41" pinUse="10"><macrocell id="FB4_MC1" sigUse="6" signal="cntRefCnt6_SPECSIG"><pterms pt1="FB4_1_1"/></macrocell><macrocell id="FB4_MC2" pin="FB4_MC2_PIN87" sigUse="4" signal="nAoutOE"><pterms pt1="FB4_2_1" pt2="FB4_2_2" pt3="FB4_2_3"/></macrocell><macrocell id="FB4_MC3" sigUse="5" signal="cntRefCnt5_SPECSIG"><pterms pt1="FB4_3_1"/></macrocell><macrocell id="FB4_MC4" sigUse="4" signal="cntRefCnt4_SPECSIG"><pterms pt1="FB4_4_1"/></macrocell><macrocell id="FB4_MC5" pin="FB4_MC5_PIN89" sigUse="3" signal="nDoutOE"><pterms pt1="FB4_5_1" pt2="FB4_5_2"/></macrocell><macrocell id="FB4_MC6" pin="FB4_MC6_PIN90" sigUse="7" signal="nDinOE"><pterms pt1="FB4_6_1" pt2="FB4_6_2" pt3="FB4_6_3"/></macrocell><macrocell id="FB4_MC7" sigUse="3" signal="cntRefCnt3_SPECSIG"><pterms pt1="FB4_7_1"/></macrocell><macrocell id="FB4_MC8" pin="FB4_MC8_PIN91" sigUse="3" signal="iobsPS_FSM_FFd1_SPECSIG"><pterms pt1="FB4_8_1" pt2="FB4_8_2"/></macrocell><macrocell id="FB4_MC9" pin="FB4_MC9_PIN92" sigUse="4" signal="fsbBERR1r_SPECSIG"><pterms pt1="FB4_9_1" pt2="FB4_9_2"/></macrocell><macrocell id="FB4_MC10" sigUse="3" signal="csnOverlay1_SPECSIG"><pterms pt1="FB4_10_1" pt2="FB4_10_2"/></macrocell><macrocell id="FB4_MC11" pin="FB4_MC11_PIN93" sigUse="2" signal="nVPA_FSB"><pterms pt1="FB4_11_1"/></macrocell><macrocell id="FB4_MC12" pin="FB4_MC12_PIN94" sigUse="10" signal="cntRefDone_SPECSIG"><pterms pt1="FB4_12_1" pt2="FB4_12_2"/></macrocell><macrocell id="FB4_MC13" sigUse="8" signal="csnOverlay0_SPECSIG"><pterms pt1="FB4_13_1" pt2="FB4_13_2" pt3="FB4_13_3"/></macrocell><macrocell id="FB4_MC14" pin="FB4_MC14_PIN95" sigUse="11" signal="cntTimeoutBPre_SPECSIG"><pterms pt1="FB4_14_1" pt2="FB4_14_2" pt3="FB4_14_3"/></macrocell><macrocell id="FB4_MC15" pin="FB4_MC15_PIN96" sigUse="10" signal="TimeoutA"><pterms pt1="FB4_15_1" pt2="FB4_15_2" pt3="FB4_15_3"/></macrocell><macrocell id="FB4_MC16" sigUse="5" signal="IOL0"><pterms pt1="FB4_16_1" pt2="FB4_16_2" pt3="FB4_16_3"/></macrocell><macrocell id="FB4_MC17" pin="FB4_MC17_PIN97" sigUse="8" signal="iobsIOReady_SPECSIG"><pterms pt1="FB4_17_1" pt2="FB4_17_2" pt3="FB4_17_3" pt4="FB4_17_4"/></macrocell><macrocell id="FB4_MC18" sigUse="8" signal="BERR_IOBS"><pterms pt1="FB4_18_1" pt2="FB4_18_2" pt3="FB4_18_3" pt4="FB4_18_4"/></macrocell><fbinput id="FB4_I1" signal="A_FSB20_SPECSIG"/><fbinput id="FB4_I2" signal="A_FSB21_SPECSIG"/><fbinput id="FB4_I3" signal="A_FSB22_SPECSIG"/><fbinput id="FB4_I4" signal="A_FSB23_SPECSIG"/><fbinput id="FB4_I5" signal="BERR_IOBS"/><fbinput id="FB4_I6" signal="IOBERR"/><fbinput id="FB4_I7" signal="IORW0"/><fbinput id="FB4_I8" signal="RefAck"/><fbinput id="FB4_I9" signal="SW1_SPECSIG"/><fbinput id="FB4_I10" signal="TimeoutA"/><fbinput id="FB4_I11" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB4_I12" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB4_I13" signal="cntRefCnt2_SPECSIG"/><fbinput id="FB4_I14" signal="cntRefCnt3_SPECSIG"/><fbinput id="FB4_I15" signal="cntRefCnt4_SPECSIG"/><fbinput id="FB4_I16" signal="cntRefCnt5_SPECSIG"/><fbinput id="FB4_I17" signal="cntRefCnt6_SPECSIG"/><fbinput id="FB4_I18" signal="cntRefCnt7_SPECSIG"/><fbinput id="FB4_I19" signal="cntRefDone_SPECSIG"/><fbinput id="FB4_I20" signal="cntTimeoutBPre_SPECSIG"/><fbinput id="FB4_I21" signal="csnOverlay0_SPECSIG"/><fbinput id="FB4_I22" signal="fsbASrf_SPECSIG"/><fbinput id="FB4_I23" signal="fsbBERR1r_SPECSIG"/><fbinput id="FB4_I24" signal="fsbVPA_SPECSIG"/><fbinput id="FB4_I25" signal="iobmBGr0_SPECSIG"/><fbinput id="FB4_I26" signal="iobmBGr1_SPECSIG"/><fbinput id="FB4_I27" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB4_I28" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB4_I29" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB4_I30" signal="iobsIOL1_SPECSIG"/><fbinput id="FB4_I31" signal="iobsIOReady_SPECSIG"/><fbinput id="FB4_I32" signal="iobsOnce_SPECSIG"/><fbinput id="FB4_I33" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB4_I34" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB4_I35" signal="nADoutLE1"/><fbinput id="FB4_I36" signal="nAS_FSB"/><fbinput id="FB4_I37" signal="nAS_IOB"/><fbinput id="FB4_I38" signal="nAoutOE"/><fbinput id="FB4_I39" signal="nLDS_FSB"/><fbinput id="FB4_I40" signal="nRES"/><fbinput id="FB4_I41" signal="nWE_FSB"/><pterm id="FB4_1_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/><signal id="cntRefCnt4_SPECSIG"/></pterm><pterm id="FB4_2_1"><signal id="iobmBGr0_SPECSIG" negated="ON"/><signal id="iobmBGr1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_2_2"><signal id="iobmBGr1_SPECSIG" negated="ON"/><signal id="nAoutOE"/></pterm><pterm id="FB4_2_3"><signal id="nAS_IOB" negated="ON"/><signal id="iobmBGr0_SPECSIG" negated="ON"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB4_3_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/><signal id="cntRefCnt4_SPECSIG"/></pterm><pterm id="FB4_4_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/></pterm><pterm id="FB4_5_1"><signal id="IORW0" negated="ON"/></pterm><pterm id="FB4_5_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB4_6_1"><signal id="A_FSB23_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_6_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_6_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_7_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/></pterm><pterm id="FB4_8_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB4_8_2"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB4_9_1"><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/></pterm><pterm id="FB4_9_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_10_1"><signal id="csnOverlay0_SPECSIG"/></pterm><pterm id="FB4_10_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_11_1"><signal id="fsbVPA_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_12_1"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="RefAck" negated="ON"/></pterm><pterm id="FB4_12_2"><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB4_13_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_13_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB4_13_3"><signal id="nRES" negated="ON"/></pterm><pterm id="FB4_14_1"><signal id="cntTimeoutBPre_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_14_2"><signal id="cntTimeoutBPre_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB4_14_3"><signal id="cntTimeoutBPre_SPECSIG" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB4_15_1"><signal id="TimeoutA"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_15_2"><signal id="TimeoutA" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/></pterm><pterm id="FB4_15_3"><signal id="TimeoutA" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB4_16_1"><signal id="nLDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_16_2"><signal id="iobsIOL1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB4_16_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_17_1"><signal id="iobsIOReady_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_17_2"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_17_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_17_4"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_18_1"><signal id="BERR_IOBS"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_18_2"><signal id="iobsOnce_SPECSIG"/><signal id="BERR_IOBS"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_18_3"><signal id="iobsOnce_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_18_4"><signal id="iobsOnce_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><equation id="cntRefCnt6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_1_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nAoutOE" regUse="D" userloc="P87"><d2><eq_pterm ptindx="FB4_2_1"/><eq_pterm ptindx="FB4_2_2"/><eq_pterm ptindx="FB4_2_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="VCC"/></equation><equation id="cntRefCnt5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_3_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_4_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nDoutOE" regUse="D" userloc="P89"><d2><eq_pterm ptindx="FB4_5_1"/><eq_pterm ptindx="FB4_5_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nDinOE" userloc="P90"><d2><eq_pterm ptindx="FB4_6_1"/><eq_pterm ptindx="FB4_6_2"/><eq_pterm ptindx="FB4_6_3"/></d2></equation><equation id="cntRefCnt3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_7_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobsPS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_8_1"/><eq_pterm ptindx="FB4_8_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbBERR1r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB4_9_1"/><eq_pterm ptindx="FB4_9_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_10_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB4_10_2"/></ce><prld ptindx="GND"/></equation><equation id="nVPA_FSB" negated="ON" userloc="P93"><d2><eq_pterm ptindx="FB4_11_1"/></d2></equation><equation id="cntRefDone_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB4_12_1"/><eq_pterm ptindx="FB4_12_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_13_1"/><eq_pterm ptindx="FB4_13_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><reset><eq_pterm ptindx="FB4_13_3"/></reset><prld ptindx="GND"/></equation><equation id="cntTimeoutBPre_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_14_1"/><eq_pterm ptindx="FB4_14_2"/><eq_pterm ptindx="FB4_14_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="TimeoutA" regUse="T"><d2><eq_pterm ptindx="FB4_15_1"/><eq_pterm ptindx="FB4_15_2"/><eq_pterm ptindx="FB4_15_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IOL0" regUse="D"><d2><eq_pterm ptindx="FB4_16_1"/><eq_pterm ptindx="FB4_16_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB4_16_3"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOReady_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_17_1"/><eq_pterm ptindx="FB4_17_2"/><eq_pterm ptindx="FB4_17_3"/><eq_pterm ptindx="FB4_17_4"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="BERR_IOBS" regUse="T"><d2><eq_pterm ptindx="FB4_18_1"/><eq_pterm ptindx="FB4_18_2"/><eq_pterm ptindx="FB4_18_3"/><eq_pterm ptindx="FB4_18_4"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB5" inputUse="42" pinUse="8"><macrocell id="FB5_MC1" sigUse="15" signal="ramRASEL_SPECSIG"><pterms pt1="FB5_1_1" pt2="FB5_1_2" pt3="FB5_1_3" pt4="FB5_1_4" pt5="FB5_1_5"/></macrocell><macrocell id="FB5_MC2" pin="FB5_MC2_PIN35" sigUse="6" signal="nROMCS"><pterms pt1="FB5_2_1" pt2="FB5_2_2" pt3="FB5_2_3" pt4="FB5_2_4" pt5="FB5_2_5"/></macrocell><macrocell id="FB5_MC3" sigUse="7" signal="cntRefCnt7_SPECSIG"><pterms pt1="FB5_3_1" pt2="FB5_3_2" pt3="FB5_3_3" pt4="FB5_3_4"/></macrocell><macrocell id="FB5_MC4" sigUse="15" signal="ramRAMDIS2_SPECSIG"><pterms pt1="FB5_4_1" pt2="FB5_4_2" pt3="FB5_4_3" pt4="FB5_4_4" pt5="FB5_4_5"/></macrocell><macrocell id="FB5_MC5" pin="FB5_MC5_PIN36" sigUse="1" signal="nCAS"><pterms pt1="FB5_5_1" pt2="FB5_5_2" pt3="FB5_5_3"/></macrocell><macrocell id="FB5_MC6" pin="FB5_MC6_PIN37" sigUse="2" signal="nOE"><pterms pt1="FB5_6_1" pt2="FB5_6_2" pt3="FB5_6_3" pt4="FB5_6_4"/></macrocell><macrocell id="FB5_MC7"><pterms pt1="FB5_7_1" pt2="FB5_7_2" pt3="FB5_7_3" pt4="FB5_7_4" pt5="FB5_7_5"/></macrocell><macrocell id="FB5_MC8" pin="FB5_MC8_PIN39" sigUse="15" signal="ramRAMDIS1_SPECSIG"><pterms pt1="FB5_8_1" pt2="FB5_8_2" pt3="FB5_8_3" pt4="FB5_8_4" pt5="FB5_8_5"/></macrocell><macrocell id="FB5_MC9" pin="FB5_MC9_PIN40" sigUse="3" signal="RA4_SPECSIG"><pterms pt1="FB5_9_1" pt2="FB5_9_2" pt3="FB5_9_3" pt4="FB5_9_4" pt5="FB5_9_5"/></macrocell><macrocell id="FB5_MC10"><pterms pt1="FB5_10_1" pt2="FB5_10_2"/></macrocell><macrocell id="FB5_MC11" pin="FB5_MC11_PIN41" sigUse="3" signal="RA3_SPECSIG"><pterms pt1="FB5_11_1" pt2="FB5_11_2" pt3="FB5_11_3" pt4="FB5_11_4"/></macrocell><macrocell id="FB5_MC12" pin="FB5_MC12_PIN42" sigUse="3" signal="RA5_SPECSIG"><pterms pt1="FB5_12_1" pt2="FB5_12_2" pt3="FB5_12_3" pt4="FB5_12_4" pt5="FB5_12_5"/></macrocell><macrocell id="FB5_MC13" sigUse="19" signal="iobsLoad1_SPECSIG"><pterms pt1="FB5_13_1" pt2="FB5_13_2" pt3="FB5_13_3" pt4="FB5_13_4" pt5="FB5_13_5"/></macrocell><macrocell id="FB5_MC14" pin="FB5_MC14_PIN43" sigUse="3" signal="RA2_SPECSIG"><pterms pt1="FB5_14_1" pt2="FB5_14_2" pt3="FB5_14_3" pt4="FB5_14_4" pt5="FB5_14_5"/></macrocell><macrocell id="FB5_MC15" pin="FB5_MC15_PIN46" sigUse="3" signal="RA6_SPECSIG"><pterms pt1="FB5_15_1" pt2="FB5_15_2" pt3="FB5_15_3" pt4="FB5_15_4"/></macrocell><macrocell id="FB5_MC16" sigUse="10" signal="ramOnce_SPECSIG"><pterms pt1="FB5_16_1" pt2="FB5_16_2" pt3="FB5_16_3" pt4="FB5_16_4" pt5="FB5_16_5"/></macrocell><macrocell id="FB5_MC17" pin="FB5_MC17_PIN49"><pterms pt1="FB5_17_1" pt2="FB5_17_2" pt3="FB5_17_3" pt4="FB5_17_4" pt5="FB5_17_5"/></macrocell><macrocell id="FB5_MC18"><pterms pt1="FB5_18_1" pt2="FB5_18_2" pt3="FB5_18_3" pt4="FB5_18_4" pt5="FB5_18_5"/></macrocell><fbinput id="FB5_I1" signal="A_FSB12_SPECSIG"/><fbinput id="FB5_I2" signal="A_FSB13_SPECSIG"/><fbinput id="FB5_I3" signal="A_FSB14_SPECSIG"/><fbinput id="FB5_I4" signal="A_FSB15_SPECSIG"/><fbinput id="FB5_I5" signal="A_FSB16_SPECSIG"/><fbinput id="FB5_I6" signal="A_FSB17_SPECSIG"/><fbinput id="FB5_I7" signal="A_FSB18_SPECSIG"/><fbinput id="FB5_I8" signal="A_FSB19_SPECSIG"/><fbinput id="FB5_I9" signal="A_FSB20_SPECSIG"/><fbinput id="FB5_I10" signal="A_FSB21_SPECSIG"/><fbinput id="FB5_I11" signal="A_FSB22_SPECSIG"/><fbinput id="FB5_I12" signal="A_FSB23_SPECSIG"/><fbinput id="FB5_I13" signal="A_FSB3_SPECSIG"/><fbinput id="FB5_I14" signal="A_FSB4_SPECSIG"/><fbinput id="FB5_I15" signal="A_FSB5_SPECSIG"/><fbinput id="FB5_I16" signal="A_FSB6_SPECSIG"/><fbinput id="FB5_I17" signal="A_FSB7_SPECSIG"/><fbinput id="FB5_I18" signal="SW1_SPECSIG"/><fbinput id="FB5_I19" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB5_I20" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB5_I21" signal="cntRefCnt2_SPECSIG"/><fbinput id="FB5_I22" signal="cntRefCnt3_SPECSIG"/><fbinput id="FB5_I23" signal="cntRefCnt4_SPECSIG"/><fbinput id="FB5_I24" signal="cntRefCnt5_SPECSIG"/><fbinput id="FB5_I25" signal="cntRefCnt6_SPECSIG"/><fbinput id="FB5_I26" signal="cntRefCnt7_SPECSIG"/><fbinput id="FB5_I27" signal="cntRefDone_SPECSIG"/><fbinput id="FB5_I28" signal="csnOverlay1_SPECSIG"/><fbinput id="FB5_I29" signal="fsbASrf_SPECSIG"/><fbinput id="FB5_I30" signal="iobsOnce_SPECSIG"/><fbinput id="FB5_I31" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB5_I32" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB5_I33" signal="nADoutLE1"/><fbinput id="FB5_I34" signal="nAS_FSB"/><fbinput id="FB5_I35" signal="nWE_FSB"/><fbinput id="FB5_I36" signal="ramBACTr_SPECSIG"/><fbinput id="FB5_I37" signal="ramOnce_SPECSIG"/><fbinput id="FB5_I38" signal="ramRAMDIS2_SPECSIG"/><fbinput id="FB5_I39" signal="ramRASEL_SPECSIG"/><fbinput id="FB5_I40" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB5_I41" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB5_I42" signal="ramRS_FSM_FFd3_SPECSIG"/><pterm id="FB5_1_1"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB5_1_2"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_1_3"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_1_4"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_1_5"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_2_1"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_2_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_3"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_2_4"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_5"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_3_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/><signal id="cntRefCnt4_SPECSIG"/></pterm><pterm id="FB5_3_2"><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_3_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB5_3_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_4_1"><signal id="ramRAMDIS2_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_4_2"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_4_3"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_4_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_4_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_5_1"><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_5_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_5_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_6_1"><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB5_6_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_6_3"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_6_4"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_7_1"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_7_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_7_3"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_7_4"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_7_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_2"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB5_8_3"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_4"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_5"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_9_1"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_9_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_9_3"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_9_4"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_9_5"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_10_1"><signal id="A_FSB14_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_10_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB5_SPECSIG"/></pterm><pterm id="FB5_11_1"><signal id="A_FSB13_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB4_SPECSIG"/></pterm><pterm id="FB5_11_3"><signal id="A_FSB15_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB6_SPECSIG"/></pterm><pterm id="FB5_12_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_1"><signal id="iobsOnce_SPECSIG"/></pterm><pterm id="FB5_13_2"><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB5_13_3"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_4"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/></pterm><pterm id="FB5_14_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB5_14_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB5_14_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB5_15_1"><signal id="A_FSB16_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB7_SPECSIG"/></pterm><pterm id="FB5_15_3"><signal id="A_FSB12_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB3_SPECSIG"/></pterm><pterm id="FB5_16_1"><signal id="ramOnce_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_16_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_17_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_17_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_17_4"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_17_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_18_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_18_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_18_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_18_5"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><equation id="ramRASEL_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_1_1"/><eq_pterm ptindx="FB5_1_2"/><eq_pterm ptindx="FB5_1_3"/><eq_pterm ptindx="FB5_1_4"/><eq_pterm ptindx="FB5_1_5"/><eq_pterm import="1" ptindx="FB5_2_1"/><eq_pterm import="1" ptindx="FB5_2_2"/><eq_pterm import="1" ptindx="FB5_2_3"/><eq_pterm import="1" ptindx="FB5_2_4"/><eq_pterm import="1" ptindx="FB5_2_5"/><eq_pterm import="1" ptindx="FB5_18_1"/><eq_pterm import="1" ptindx="FB5_18_2"/><eq_pterm import="1" ptindx="FB5_18_3"/><eq_pterm import="1" ptindx="FB5_18_4"/><eq_pterm import="1" ptindx="FB5_18_5"/><eq_pterm import="1" ptindx="FB5_17_1"/><eq_pterm import="1" ptindx="FB5_17_2"/><eq_pterm import="1" ptindx="FB5_17_3"/><eq_pterm import="1" ptindx="FB5_17_4"/><eq_pterm import="1" ptindx="FB5_17_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nROMCS" negated="ON" userloc="P35"><d2><eq_pterm import="1" ptindx="FB5_3_2"/><eq_pterm import="1" ptindx="FB5_3_3"/><eq_pterm import="1" ptindx="FB5_3_4"/></d2></equation><equation id="cntRefCnt7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_3_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="ramRAMDIS2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_4_1"/><eq_pterm ptindx="FB5_4_2"/><eq_pterm ptindx="FB5_4_3"/><eq_pterm ptindx="FB5_4_4"/><eq_pterm ptindx="FB5_4_5"/><eq_pterm import="1" ptindx="FB5_5_2"/><eq_pterm import="1" ptindx="FB5_5_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nCAS" regUse="D" userloc="P36"><d2><eq_pterm ptindx="FB5_5_1"/></d2><clk negated="ON"><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nOE" negated="ON" userloc="P37"><d2><eq_pterm ptindx="FB5_6_1"/></d2></equation><equation id="ramRAMDIS1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_8_1"/><eq_pterm ptindx="FB5_8_2"/><eq_pterm ptindx="FB5_8_3"/><eq_pterm ptindx="FB5_8_4"/><eq_pterm ptindx="FB5_8_5"/><eq_pterm import="1" ptindx="FB5_7_1"/><eq_pterm import="1" ptindx="FB5_7_2"/><eq_pterm import="1" ptindx="FB5_7_3"/><eq_pterm import="1" ptindx="FB5_7_4"/><eq_pterm import="1" ptindx="FB5_7_5"/><eq_pterm import="1" ptindx="FB5_6_2"/><eq_pterm import="1" ptindx="FB5_6_3"/><eq_pterm import="1" ptindx="FB5_6_4"/><eq_pterm import="1" ptindx="FB5_9_1"/><eq_pterm import="1" ptindx="FB5_9_2"/><eq_pterm import="1" ptindx="FB5_9_3"/><eq_pterm import="1" ptindx="FB5_9_4"/><eq_pterm import="1" ptindx="FB5_9_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA4_SPECSIG" userloc="P40"><d2><eq_pterm import="1" ptindx="FB5_10_1"/><eq_pterm import="1" ptindx="FB5_10_2"/></d2></equation><equation id="RA3_SPECSIG" userloc="P41"><d2><eq_pterm ptindx="FB5_11_1"/><eq_pterm ptindx="FB5_11_2"/></d2></equation><equation id="RA5_SPECSIG" userloc="P42"><d2><eq_pterm import="1" ptindx="FB5_11_3"/><eq_pterm import="1" ptindx="FB5_11_4"/></d2></equation><equation id="iobsLoad1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB5_13_1"/><eq_pterm ptindx="FB5_13_2"/><eq_pterm ptindx="FB5_13_3"/><eq_pterm ptindx="FB5_13_4"/><eq_pterm ptindx="FB5_13_5"/><eq_pterm import="1" ptindx="FB5_12_1"/><eq_pterm import="1" ptindx="FB5_12_2"/><eq_pterm import="1" ptindx="FB5_12_3"/><eq_pterm import="1" ptindx="FB5_12_4"/><eq_pterm import="1" ptindx="FB5_12_5"/><eq_pterm import="1" ptindx="FB5_14_1"/><eq_pterm import="1" ptindx="FB5_14_2"/><eq_pterm import="1" ptindx="FB5_14_3"/><eq_pterm import="1" ptindx="FB5_14_4"/><eq_pterm import="1" ptindx="FB5_14_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA2_SPECSIG" userloc="P43"><d2><eq_pterm import="1" ptindx="FB5_15_3"/><eq_pterm import="1" ptindx="FB5_15_4"/></d2></equation><equation id="RA6_SPECSIG" userloc="P46"><d2><eq_pterm ptindx="FB5_15_1"/><eq_pterm ptindx="FB5_15_2"/></d2></equation><equation id="ramOnce_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_16_1"/><eq_pterm ptindx="FB5_16_2"/><eq_pterm ptindx="FB5_16_3"/><eq_pterm ptindx="FB5_16_4"/><eq_pterm ptindx="FB5_16_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB6" inputUse="34" pinUse="10"><macrocell id="FB6_MC1" sigUse="6" signal="iobmETACK_SPECSIG"><pterms pt1="FB6_1_1" pt2="FB6_1_2" pt3="FB6_1_3" pt4="FB6_1_4" pt5="FB6_1_5"/></macrocell><macrocell id="FB6_MC2" pin="FB6_MC2_PIN74" sigUse="10" signal="nVMA_IOB"><pterms pt1="FB6_2_1" pt2="FB6_2_2" pt3="FB6_2_3"/></macrocell><macrocell id="FB6_MC3" sigUse="6" signal="iobmIOS_FSM_FFd3_SPECSIG"><pterms pt1="FB6_3_1" pt2="FB6_3_2" pt3="FB6_3_3"/></macrocell><macrocell id="FB6_MC4" sigUse="6" signal="iobmES3_SPECSIG"><pterms pt1="FB6_4_1" pt2="FB6_4_2" pt3="FB6_4_3"/></macrocell><macrocell id="FB6_MC5" pin="FB6_MC5_PIN76" sigUse="4" signal="iobmES1_SPECSIG"><pterms pt1="FB6_5_1" pt2="FB6_5_2" pt3="FB6_5_3"/></macrocell><macrocell id="FB6_MC6" pin="FB6_MC6_PIN77" sigUse="7" signal="iobmES0_SPECSIG"><pterms pt1="FB6_6_1" pt2="FB6_6_2" pt3="FB6_6_3"/></macrocell><macrocell id="FB6_MC7" sigUse="5" signal="ALE0M"><pterms pt1="FB6_7_1" pt2="FB6_7_2" pt3="FB6_7_3"/></macrocell><macrocell id="FB6_MC8" pin="FB6_MC8_PIN78" sigUse="7" signal="iobmES4_SPECSIG"><pterms pt1="FB6_8_1" pt2="FB6_8_2" pt3="FB6_8_3" pt4="FB6_8_4"/></macrocell><macrocell id="FB6_MC9" pin="FB6_MC9_PIN79" sigUse="6" signal="nLDS_IOB"><pterms pt1="FB6_9_1" pt2="FB6_9_2" pt3="FB6_9_3" pt4="FB6_9_4"/></macrocell><macrocell id="FB6_MC10" sigUse="11" signal="iobmIOS_FSM_FFd2_SPECSIG"><pterms pt1="FB6_10_1" pt2="FB6_10_2" pt3="FB6_10_3" pt4="FB6_10_4" pt5="FB6_10_5"/></macrocell><macrocell id="FB6_MC11" pin="FB6_MC11_PIN80" sigUse="6" signal="nUDS_IOB"><pterms pt1="FB6_11_1" pt2="FB6_11_2" pt3="FB6_11_3" pt4="FB6_11_4"/></macrocell><macrocell id="FB6_MC12" pin="FB6_MC12_PIN81" sigUse="4" signal="nAS_IOB"><pterms pt1="FB6_12_1" pt2="FB6_12_2" pt3="FB6_12_3"/></macrocell><macrocell id="FB6_MC13" sigUse="7" signal="iobmES2_SPECSIG"><pterms pt1="FB6_13_1" pt2="FB6_13_2" pt3="FB6_13_3" pt4="FB6_13_4" pt5="FB6_13_5"/></macrocell><macrocell id="FB6_MC14" pin="FB6_MC14_PIN82" sigUse="3" signal="nADoutLE1"><pterms pt1="FB6_14_1" pt2="FB6_14_2"/></macrocell><macrocell id="FB6_MC15" pin="FB6_MC15_PIN85" sigUse="2" signal="nADoutLE0"><pterms pt1="FB6_15_1" pt2="FB6_15_2"/></macrocell><macrocell id="FB6_MC16" sigUse="13" signal="IOACT"><pterms pt1="FB6_16_1" pt2="FB6_16_2" pt3="FB6_16_3" pt4="FB6_16_4" pt5="FB6_16_5"/></macrocell><macrocell id="FB6_MC17" pin="FB6_MC17_PIN86" sigUse="2" signal="nDinLE"><pterms pt1="FB6_17_1" pt2="FB6_17_2"/></macrocell><macrocell id="FB6_MC18" sigUse="13" signal="IOBERR"><pterms pt1="FB6_18_1" pt2="FB6_18_2" pt3="FB6_18_3" pt4="FB6_18_4" pt5="FB6_18_5"/></macrocell><fbinput id="FB6_I1" signal="ALE0M"/><fbinput id="FB6_I2" signal="ALE0S"/><fbinput id="FB6_I3" signal="CLK_IOB"/><fbinput id="FB6_I4" signal="IOACT"/><fbinput id="FB6_I5" signal="IOBERR"/><fbinput id="FB6_I6" signal="IOL0"/><fbinput id="FB6_I7" signal="IORW0"/><fbinput id="FB6_I8" signal="IOU0"/><fbinput id="FB6_I9" signal="iobmBERRrf_SPECSIG"/><fbinput id="FB6_I10" signal="iobmBERRrr_SPECSIG"/><fbinput id="FB6_I11" signal="iobmDTACKrf_SPECSIG"/><fbinput id="FB6_I12" signal="iobmDTACKrr_SPECSIG"/><fbinput id="FB6_I13" signal="iobmES0_SPECSIG"/><fbinput id="FB6_I14" signal="iobmES1_SPECSIG"/><fbinput id="FB6_I15" signal="iobmES2_SPECSIG"/><fbinput id="FB6_I16" signal="iobmES3_SPECSIG"/><fbinput id="FB6_I17" signal="iobmES4_SPECSIG"/><fbinput id="FB6_I18" signal="iobmETACK_SPECSIG"/><fbinput id="FB6_I19" signal="iobmEr_SPECSIG"/><fbinput id="FB6_I20" signal="iobmEr2_SPECSIG"/><fbinput id="FB6_I21" signal="iobmIOREQr_SPECSIG"/><fbinput id="FB6_I22" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB6_I23" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB6_I24" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB6_I25" signal="iobmRESrf_SPECSIG"/><fbinput id="FB6_I26" signal="iobmRESrr_SPECSIG"/><fbinput id="FB6_I27" signal="iobmVPArf_SPECSIG"/><fbinput id="FB6_I28" signal="iobmVPArr_SPECSIG"/><fbinput id="FB6_I29" signal="iobsClear1_SPECSIG"/><fbinput id="FB6_I30" signal="iobsLoad1_SPECSIG"/><fbinput id="FB6_I31" signal="nADoutLE1"/><fbinput id="FB6_I32" signal="nAoutOE"/><fbinput id="FB6_I33" signal="nBERR_IOB"/><fbinput id="FB6_I34" signal="nVMA_IOB"/><pterm id="FB6_1_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_1_2"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_1_3"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_1_4"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_1_5"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_2_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/></pterm><pterm id="FB6_2_2"><signal id="nVMA_IOB"/><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="IOACT"/><signal id="iobmVPArf_SPECSIG"/><signal id="iobmVPArr_SPECSIG"/></pterm><pterm id="FB6_2_3"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_3_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_3_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_3_3"><signal id="CLK_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_4_1"><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_4_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_4_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_5_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/></pterm><pterm id="FB6_5_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_5_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_6_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_6_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_6_3"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_7_1"><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_7_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_7_3"><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_8_1"><signal id="iobmES4_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_8_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_8_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_8_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_9_1"><signal id="IOL0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_2"><signal id="IOL0"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_3"><signal id="IORW0" negated="ON"/><signal id="IOL0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_9_4"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_10_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_10_2"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_10_3"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_10_4"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_10_5"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_11_1"><signal id="IOU0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_2"><signal id="IOU0"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_3"><signal id="IORW0" negated="ON"/><signal id="IOU0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_11_4"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_12_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_2"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_3"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_13_1"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_13_2"><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_13_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_13_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/></pterm><pterm id="FB6_13_5"><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_14_1"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB6_14_2"><signal id="iobsClear1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB6_15_1"><signal id="ALE0M" negated="ON"/><signal id="ALE0S" negated="ON"/></pterm><pterm id="FB6_15_2"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_16_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_3"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nAoutOE"/></pterm><pterm id="FB6_16_4"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_16_5"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_17_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_17_2"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_18_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="IOBERR"/></pterm><pterm id="FB6_18_2"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_18_3"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_18_4"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_18_5"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><equation id="iobmETACK_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_1_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nVMA_IOB" regUse="T" userloc="P74"><d2><eq_pterm ptindx="FB6_2_1"/><eq_pterm ptindx="FB6_2_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_2_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd3_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_3_1"/><eq_pterm ptindx="FB6_3_2"/><eq_pterm ptindx="FB6_3_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_4_1"/><eq_pterm ptindx="FB6_4_2"/><eq_pterm ptindx="FB6_4_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_5_1"/><eq_pterm ptindx="FB6_5_2"/><eq_pterm ptindx="FB6_5_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES0_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB6_6_1"/><eq_pterm ptindx="FB6_6_2"/><eq_pterm ptindx="FB6_6_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="ALE0M" regUse="D"><d2><eq_pterm ptindx="FB6_7_1"/><eq_pterm ptindx="FB6_7_2"/><eq_pterm ptindx="FB6_7_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_8_1"/><eq_pterm ptindx="FB6_8_2"/><eq_pterm ptindx="FB6_8_3"/><eq_pterm ptindx="FB6_8_4"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nLDS_IOB" negated="ON" regUse="D" userloc="P79"><d2><eq_pterm ptindx="FB6_9_1"/><eq_pterm ptindx="FB6_9_2"/><eq_pterm ptindx="FB6_9_3"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_9_4"/></oe><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_10_1"/><eq_pterm ptindx="FB6_10_2"/><eq_pterm ptindx="FB6_10_3"/><eq_pterm ptindx="FB6_10_4"/><eq_pterm ptindx="FB6_10_5"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nUDS_IOB" negated="ON" regUse="D" userloc="P80"><d2><eq_pterm ptindx="FB6_11_1"/><eq_pterm ptindx="FB6_11_2"/><eq_pterm ptindx="FB6_11_3"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_11_4"/></oe><prld ptindx="GND"/></equation><equation id="nAS_IOB" regUse="D" userloc="P81"><d2><eq_pterm ptindx="FB6_12_1"/><eq_pterm ptindx="FB6_12_2"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_12_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmES2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_13_1"/><eq_pterm ptindx="FB6_13_2"/><eq_pterm ptindx="FB6_13_3"/><eq_pterm ptindx="FB6_13_4"/><eq_pterm ptindx="FB6_13_5"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nADoutLE1" negated="ON" regUse="D" userloc="P82"><d2><eq_pterm ptindx="FB6_14_1"/><eq_pterm ptindx="FB6_14_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="VCC"/></equation><equation id="nADoutLE0" userloc="P85"><d2><eq_pterm ptindx="FB6_15_1"/></d2></equation><equation id="IOACT" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_16_1"/><eq_pterm ptindx="FB6_16_2"/><eq_pterm ptindx="FB6_16_3"/><eq_pterm ptindx="FB6_16_4"/><eq_pterm ptindx="FB6_16_5"/><eq_pterm import="1" ptindx="FB6_15_2"/><eq_pterm import="1" ptindx="FB6_17_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nDinLE" regUse="D" userloc="P86"><d2><eq_pterm ptindx="FB6_17_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="IOBERR" regUse="T"><d2><eq_pterm ptindx="FB6_18_1"/><eq_pterm ptindx="FB6_18_2"/><eq_pterm ptindx="FB6_18_3"/><eq_pterm ptindx="FB6_18_4"/><eq_pterm ptindx="FB6_18_5"/><eq_pterm import="1" ptindx="FB6_1_2"/><eq_pterm import="1" ptindx="FB6_1_3"/><eq_pterm import="1" ptindx="FB6_1_4"/><eq_pterm import="1" ptindx="FB6_1_5"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB7" inputUse="36" pinUse="10"><macrocell id="FB7_MC1" sigUse="15" signal="ramRAMReady_SPECSIG"><pterms pt1="FB7_1_1" pt2="FB7_1_2" pt3="FB7_1_3" pt4="FB7_1_4" pt5="FB7_1_5"/></macrocell><macrocell id="FB7_MC2" pin="FB7_MC2_PIN50" sigUse="3" signal="RA1_SPECSIG"><pterms pt1="FB7_2_1" pt2="FB7_2_2" pt3="FB7_2_3" pt4="FB7_2_4" pt5="FB7_2_5"/></macrocell><macrocell id="FB7_MC3" sigUse="12" signal="TimeoutB"><pterms pt1="FB7_3_1" pt2="FB7_3_2" pt3="FB7_3_3" pt4="FB7_3_4" pt5="FB7_3_5"/></macrocell><macrocell id="FB7_MC4" sigUse="8" signal="fsbReady0r_SPECSIG"><pterms pt1="FB7_4_1" pt2="FB7_4_2" pt3="FB7_4_3"/></macrocell><macrocell id="FB7_MC5" pin="FB7_MC5_PIN52" sigUse="3" signal="RA7_SPECSIG"><pterms pt1="FB7_5_1" pt2="FB7_5_2"/></macrocell><macrocell id="FB7_MC6" pin="FB7_MC6_PIN53" sigUse="3" signal="RA0_SPECSIG"><pterms pt1="FB7_6_1" pt2="FB7_6_2"/></macrocell><macrocell id="FB7_MC7" sigUse="10" signal="ramRS_FSM_FFd1_SPECSIG"><pterms pt1="FB7_7_1" pt2="FB7_7_2" pt3="FB7_7_3" pt4="FB7_7_4" pt5="FB7_7_5"/></macrocell><macrocell id="FB7_MC8" pin="FB7_MC8_PIN54" sigUse="7" signal="RA8_SPECSIG"><pterms pt1="FB7_8_1" pt2="FB7_8_2" pt3="FB7_8_3" pt4="FB7_8_4" pt5="FB7_8_5"/></macrocell><macrocell id="FB7_MC9" pin="FB7_MC9_PIN55" sigUse="1" signal="RA10_SPECSIG"><pterms pt1="FB7_9_1" pt2="FB7_9_2" pt3="FB7_9_3"/></macrocell><macrocell id="FB7_MC10" sigUse="8" signal="OpTxOpTxFX_DC182_INV783_SPECSIG"><pterms pt1="FB7_10_1" pt2="FB7_10_2" pt3="FB7_10_3" pt4="FB7_10_4" pt5="FB7_10_5"/></macrocell><macrocell id="FB7_MC11" pin="FB7_MC11_PIN56" sigUse="3" signal="RA9_SPECSIG"><pterms pt1="FB7_11_1" pt2="FB7_11_2" pt3="FB7_11_3"/></macrocell><macrocell id="FB7_MC12" pin="FB7_MC12_PIN58" sigUse="1" signal="CLK25EN"><pterms pt1="FB7_12_1" pt2="FB7_12_2" pt3="FB7_12_3" pt4="FB7_12_4" pt5="FB7_12_5"/></macrocell><macrocell id="FB7_MC13" sigUse="14" signal="ramRS_FSM_FFd3_SPECSIG"><pterms pt1="FB7_13_1" pt2="FB7_13_2" pt3="FB7_13_3" pt4="FB7_13_4" pt5="FB7_13_5"/></macrocell><macrocell id="FB7_MC14" pin="FB7_MC14_PIN59" sigUse="1" signal="CLK20EN"><pterms pt1="FB7_14_1" pt2="FB7_14_2" pt3="FB7_14_3"/></macrocell><macrocell id="FB7_MC15" pin="FB7_MC15_PIN60"><pterms pt1="FB7_15_1" pt2="FB7_15_2" pt3="FB7_15_3" pt4="FB7_15_4"/></macrocell><macrocell id="FB7_MC16"><pterms pt1="FB7_16_1" pt2="FB7_16_2" pt3="FB7_16_3" pt4="FB7_16_4" pt5="FB7_16_5"/></macrocell><macrocell id="FB7_MC17" pin="FB7_MC17_PIN61" sigUse="14" signal="ramRS_FSM_FFd2_SPECSIG"><pterms pt1="FB7_17_1" pt2="FB7_17_2" pt3="FB7_17_3" pt4="FB7_17_4" pt5="FB7_17_5"/></macrocell><macrocell id="FB7_MC18"><pterms pt1="FB7_18_1" pt2="FB7_18_2" pt3="FB7_18_3" pt4="FB7_18_4" pt5="FB7_18_5"/></macrocell><fbinput id="FB7_I1" signal="A_FSB10_SPECSIG"/><fbinput id="FB7_I2" signal="A_FSB11_SPECSIG"/><fbinput id="FB7_I3" signal="A_FSB17_SPECSIG"/><fbinput id="FB7_I4" signal="A_FSB18_SPECSIG"/><fbinput id="FB7_I5" signal="A_FSB19_SPECSIG"/><fbinput id="FB7_I6" signal="A_FSB1_SPECSIG"/><fbinput id="FB7_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB7_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB7_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB7_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB7_I11" signal="A_FSB2_SPECSIG"/><fbinput id="FB7_I12" signal="A_FSB8_SPECSIG"/><fbinput id="FB7_I13" signal="A_FSB9_SPECSIG"/><fbinput id="FB7_I14" signal="SW0_SPECSIG"/><fbinput id="FB7_I15" signal="TimeoutB"/><fbinput id="FB7_I16" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB7_I17" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB7_I18" signal="cntRefCnt2_SPECSIG"/><fbinput id="FB7_I19" signal="cntRefCnt3_SPECSIG"/><fbinput id="FB7_I20" signal="cntRefCnt4_SPECSIG"/><fbinput id="FB7_I21" signal="cntRefCnt5_SPECSIG"/><fbinput id="FB7_I22" signal="cntRefCnt6_SPECSIG"/><fbinput id="FB7_I23" signal="cntRefCnt7_SPECSIG"/><fbinput id="FB7_I24" signal="cntRefDone_SPECSIG"/><fbinput id="FB7_I25" signal="cntTimeoutBPre_SPECSIG"/><fbinput id="FB7_I26" signal="csnOverlay1_SPECSIG"/><fbinput id="FB7_I27" signal="fsbASrf_SPECSIG"/><fbinput id="FB7_I28" signal="fsbReady0r_SPECSIG"/><fbinput id="FB7_I29" signal="nAS_FSB"/><fbinput id="FB7_I30" signal="ramBACTr_SPECSIG"/><fbinput id="FB7_I31" signal="ramOnce_SPECSIG"/><fbinput id="FB7_I32" signal="ramRAMReady_SPECSIG"/><fbinput id="FB7_I33" signal="ramRASEL_SPECSIG"/><fbinput id="FB7_I34" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB7_I35" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB7_I36" signal="ramRS_FSM_FFd3_SPECSIG"/><pterm id="FB7_1_1"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_1_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_1_3"><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_1_4"><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_1_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_2"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB7_2_3"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB7_2_4"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_5"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_3_1"><signal id="TimeoutB"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_2"><signal id="TimeoutB" negated="ON"/><signal id="cntTimeoutBPre_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_3"><signal id="TimeoutB" negated="ON"/><signal id="cntTimeoutBPre_SPECSIG"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_3_4"><signal id="A_FSB11_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_5"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB2_SPECSIG"/></pterm><pterm id="FB7_4_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_4_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_4_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_5_1"><signal id="A_FSB8_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_5_2"><signal id="A_FSB17_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_1"><signal id="A_FSB10_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB1_SPECSIG"/></pterm><pterm id="FB7_7_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB7_7_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_7_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_7_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_7_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_8_1"><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_2"><signal id="A_FSB18_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_8_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB7_8_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_9_1"><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB7_9_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_9_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_10_1"><signal id="A_FSB23_SPECSIG"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_3"><signal id="A_FSB21_SPECSIG"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_4"><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_11_1"><signal id="A_FSB20_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_11_2"><signal id="A_FSB19_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_11_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_1"><signal id="SW0_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_3"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_4"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_5"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_1"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_2"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_3"><signal id="ramOnce_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_4"><signal id="ramOnce_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_5"><signal id="ramOnce_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB7_14_1"><signal id="SW0_SPECSIG"/></pterm><pterm id="FB7_14_2"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB7_14_3"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_15_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_15_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_15_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_15_4"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_1"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB7_16_2"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_3"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_4"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_2"><signal id="cntRefDone_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_3"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB7_17_4"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_5"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB7_18_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_18_3"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_18_4"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_18_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><equation id="ramRAMReady_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB7_1_1"/><eq_pterm ptindx="FB7_1_2"/><eq_pterm ptindx="FB7_1_3"/><eq_pterm ptindx="FB7_1_4"/><eq_pterm ptindx="FB7_1_5"/><eq_pterm import="1" ptindx="FB7_2_1"/><eq_pterm import="1" ptindx="FB7_2_2"/><eq_pterm import="1" ptindx="FB7_2_3"/><eq_pterm import="1" ptindx="FB7_2_4"/><eq_pterm import="1" ptindx="FB7_2_5"/><eq_pterm import="1" ptindx="FB7_18_1"/><eq_pterm import="1" ptindx="FB7_18_2"/><eq_pterm import="1" ptindx="FB7_18_3"/><eq_pterm import="1" ptindx="FB7_18_4"/><eq_pterm import="1" ptindx="FB7_18_5"/><eq_pterm import="1" ptindx="FB7_17_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA1_SPECSIG" userloc="P50"><d2><eq_pterm import="1" ptindx="FB7_3_4"/><eq_pterm import="1" ptindx="FB7_3_5"/></d2></equation><equation id="TimeoutB" regUse="T"><d2><eq_pterm ptindx="FB7_3_1"/><eq_pterm ptindx="FB7_3_2"/><eq_pterm ptindx="FB7_3_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbReady0r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB7_4_1"/><eq_pterm ptindx="FB7_4_2"/><eq_pterm ptindx="FB7_4_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA7_SPECSIG" userloc="P52"><d2><eq_pterm ptindx="FB7_5_1"/><eq_pterm ptindx="FB7_5_2"/></d2></equation><equation id="RA0_SPECSIG" userloc="P53"><d2><eq_pterm ptindx="FB7_6_1"/><eq_pterm ptindx="FB7_6_2"/></d2></equation><equation id="ramRS_FSM_FFd1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_7_1"/><eq_pterm ptindx="FB7_7_2"/><eq_pterm ptindx="FB7_7_3"/><eq_pterm ptindx="FB7_7_4"/><eq_pterm ptindx="FB7_7_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA8_SPECSIG" userloc="P54"><d2><eq_pterm ptindx="FB7_8_1"/><eq_pterm ptindx="FB7_8_2"/><eq_pterm ptindx="FB7_8_3"/><eq_pterm ptindx="FB7_8_4"/><eq_pterm ptindx="FB7_8_5"/><eq_pterm import="1" ptindx="FB7_9_2"/><eq_pterm import="1" ptindx="FB7_9_3"/></d2></equation><equation id="RA10_SPECSIG" userloc="P55"><d2><eq_pterm ptindx="FB7_9_1"/></d2></equation><equation id="OpTxOpTxFX_DC182_INV783_SPECSIG"><d2><eq_pterm ptindx="FB7_10_1"/><eq_pterm ptindx="FB7_10_2"/><eq_pterm ptindx="FB7_10_3"/><eq_pterm ptindx="FB7_10_4"/><eq_pterm ptindx="FB7_10_5"/><eq_pterm import="1" ptindx="FB7_11_3"/></d2></equation><equation id="RA9_SPECSIG" userloc="P56"><d2><eq_pterm ptindx="FB7_11_1"/><eq_pterm ptindx="FB7_11_2"/></d2></equation><equation id="CLK25EN" userloc="P58"><d2><eq_pterm ptindx="FB7_12_1"/></d2></equation><equation id="ramRS_FSM_FFd3_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB7_13_1"/><eq_pterm ptindx="FB7_13_2"/><eq_pterm ptindx="FB7_13_3"/><eq_pterm ptindx="FB7_13_4"/><eq_pterm ptindx="FB7_13_5"/><eq_pterm import="1" ptindx="FB7_12_2"/><eq_pterm import="1" ptindx="FB7_12_3"/><eq_pterm import="1" ptindx="FB7_12_4"/><eq_pterm import="1" ptindx="FB7_12_5"/><eq_pterm import="1" ptindx="FB7_14_2"/><eq_pterm import="1" ptindx="FB7_14_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="CLK20EN" userloc="P59"><d2><eq_pterm ptindx="FB7_14_1"/></d2></equation><equation id="ramRS_FSM_FFd2_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB7_17_1"/><eq_pterm ptindx="FB7_17_2"/><eq_pterm ptindx="FB7_17_3"/><eq_pterm ptindx="FB7_17_4"/><eq_pterm import="1" ptindx="FB7_16_1"/><eq_pterm import="1" ptindx="FB7_16_2"/><eq_pterm import="1" ptindx="FB7_16_3"/><eq_pterm import="1" ptindx="FB7_16_4"/><eq_pterm import="1" ptindx="FB7_16_5"/><eq_pterm import="1" ptindx="FB7_15_1"/><eq_pterm import="1" ptindx="FB7_15_2"/><eq_pterm import="1" ptindx="FB7_15_3"/><eq_pterm import="1" ptindx="FB7_15_4"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB8" inputUse="37" pinUse="7"><macrocell id="FB8_MC1"><pterms pt1="FB8_1_1" pt2="FB8_1_2" pt3="FB8_1_3" pt4="FB8_1_4" pt5="FB8_1_5"/></macrocell><macrocell id="FB8_MC2" pin="FB8_MC2_PIN63" sigUse="1" signal="RA11_SPECSIG"><pterms pt1="FB8_2_1" pt2="FB8_2_2" pt3="FB8_2_3" pt4="FB8_2_4" pt5="FB8_2_5"/></macrocell><macrocell id="FB8_MC3"><pterms pt1="FB8_3_1" pt2="FB8_3_2" pt3="FB8_3_3" pt4="FB8_3_4" pt5="FB8_3_5"/></macrocell><macrocell id="FB8_MC4" sigUse="20" signal="iobsPS_FSM_FFd2_SPECSIG"><pterms pt1="FB8_4_1" pt2="FB8_4_2" pt3="FB8_4_3" pt4="FB8_4_4" pt5="FB8_4_5"/></macrocell><macrocell id="FB8_MC5" pin="FB8_MC5_PIN64" sigUse="8" signal="nRAS"><pterms pt1="FB8_5_1" pt2="FB8_5_2" pt3="FB8_5_3" pt4="FB8_5_4" pt5="FB8_5_5"/></macrocell><macrocell id="FB8_MC6" pin="FB8_MC6_PIN65" sigUse="5" signal="nRAMLWE"><pterms pt1="FB8_6_1" pt2="FB8_6_2" pt3="FB8_6_3" pt4="FB8_6_4"/></macrocell><macrocell id="FB8_MC7" sigUse="3" signal="RESDone"><pterms pt1="FB8_7_1" pt2="FB8_7_2"/></macrocell><macrocell id="FB8_MC8" pin="FB8_MC8_PIN66" sigUse="5" signal="nRAMUWE"><pterms pt1="FB8_8_1" pt2="FB8_8_2" pt3="FB8_8_3" pt4="FB8_8_4" pt5="FB8_8_5"/></macrocell><macrocell id="FB8_MC9" pin="FB8_MC9_PIN67" sigUse="20" signal="IOREQ"><pterms pt1="FB8_9_1" pt2="FB8_9_2" pt3="FB8_9_3" pt4="FB8_9_4" pt5="FB8_9_5"/></macrocell><macrocell id="FB8_MC10"><pterms pt1="FB8_10_1" pt2="FB8_10_2" pt3="FB8_10_3" pt4="FB8_10_4" pt5="FB8_10_5"/></macrocell><macrocell id="FB8_MC11" pin="FB8_MC11_PIN68"><pterms pt1="FB8_11_1" pt2="FB8_11_2"/></macrocell><macrocell id="FB8_MC12" pin="FB8_MC12_PIN70" sigUse="9" signal="nBERR_FSB"><pterms pt1="FB8_12_1" pt2="FB8_12_2" pt3="FB8_12_3" pt4="FB8_12_4" pt5="FB8_12_5"/></macrocell><macrocell id="FB8_MC13"><pterms pt1="FB8_13_1" pt2="FB8_13_2" pt3="FB8_13_3" pt4="FB8_13_4" pt5="FB8_13_5"/></macrocell><macrocell id="FB8_MC14" pin="FB8_MC14_PIN71" sigUse="19" signal="iobsOnce_SPECSIG"><pterms pt1="FB8_14_1" pt2="FB8_14_2" pt3="FB8_14_3" pt4="FB8_14_4" pt5="FB8_14_5"/></macrocell><macrocell id="FB8_MC15" pin="FB8_MC15_PIN72" sigUse="6" signal="nBR_IOB"><pterms pt1="FB8_15_1" pt2="FB8_15_2" pt3="FB8_15_3" pt4="FB8_15_4" pt5="FB8_15_5"/></macrocell><macrocell id="FB8_MC16" sigUse="8" signal="fsbBERR0r_SPECSIG"><pterms pt1="FB8_16_1" pt2="FB8_16_2" pt3="FB8_16_3"/></macrocell><macrocell id="FB8_MC17" pin="FB8_MC17_PIN73"><pterms pt1="FB8_17_1" pt2="FB8_17_2" pt3="FB8_17_3" pt4="FB8_17_4" pt5="FB8_17_5"/></macrocell><macrocell id="FB8_MC18" sigUse="21" signal="IORW0"><pterms pt1="FB8_18_1" pt2="FB8_18_2" pt3="FB8_18_3" pt4="FB8_18_4" pt5="FB8_18_5"/></macrocell><fbinput id="FB8_I1" signal="A_FSB13_SPECSIG"/><fbinput id="FB8_I2" signal="A_FSB14_SPECSIG"/><fbinput id="FB8_I3" signal="A_FSB16_SPECSIG"/><fbinput id="FB8_I4" signal="A_FSB17_SPECSIG"/><fbinput id="FB8_I5" signal="A_FSB18_SPECSIG"/><fbinput id="FB8_I6" signal="A_FSB19_SPECSIG"/><fbinput id="FB8_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB8_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB8_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB8_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB8_I11" signal="BERR_IOBS"/><fbinput id="FB8_I12" signal="IORW0"/><fbinput id="FB8_I13" signal="IPL2r0"/><fbinput id="FB8_I14" signal="IPL2r1"/><fbinput id="FB8_I15" signal="RESDone"/><fbinput id="FB8_I16" signal="RESr0"/><fbinput id="FB8_I17" signal="RESr1"/><fbinput id="FB8_I18" signal="RESr2"/><fbinput id="FB8_I19" signal="RefAck"/><fbinput id="FB8_I20" signal="SW1_SPECSIG"/><fbinput id="FB8_I21" signal="TimeoutB"/><fbinput id="FB8_I22" signal="csnOverlay1_SPECSIG"/><fbinput id="FB8_I23" signal="fsbASrf_SPECSIG"/><fbinput id="FB8_I24" signal="fsbBERR0r_SPECSIG"/><fbinput id="FB8_I25" signal="fsbBERR1r_SPECSIG"/><fbinput id="FB8_I26" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB8_I27" signal="iobsIORW1_SPECSIG"/><fbinput id="FB8_I28" signal="iobsOnce_SPECSIG"/><fbinput id="FB8_I29" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I30" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I31" signal="nADoutLE1"/><fbinput id="FB8_I32" signal="nAS_FSB"/><fbinput id="FB8_I33" signal="nLDS_FSB"/><fbinput id="FB8_I34" signal="nUDS_FSB"/><fbinput id="FB8_I35" signal="nWE_FSB"/><fbinput id="FB8_I36" signal="ramRAMDIS1_SPECSIG"/><fbinput id="FB8_I37" signal="ramRAMDIS2_SPECSIG"/><pterm id="FB8_1_1"><signal id="IORW0"/><signal id="iobsIORW1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_1_2"><signal id="IORW0" negated="ON"/><signal id="iobsIORW1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_1_3"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_1_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_1_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="IORW0" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_2_1"><signal id="A_FSB19_SPECSIG"/></pterm><pterm id="FB8_2_2"><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_2_3"><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_2_4"><signal id="iobsOnce_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_2_5"><signal id="IORW0"/><signal id="nWE_FSB"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_4_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_4_2"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB8_4_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_4_4"><signal id="nAS_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_4_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_6_1"><signal id="nWE_FSB" negated="ON"/><signal id="nLDS_FSB" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_6_2"><signal id="RefAck"/></pterm><pterm id="FB8_6_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_6_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_7_1"><signal id="RESr0" negated="ON"/><signal id="RESr1" negated="ON"/><signal id="RESr2"/></pterm><pterm id="FB8_7_2"><signal id="nWE_FSB" negated="ON"/><signal id="nUDS_FSB" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_8_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_9_1"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_9_2"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_9_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_9_4"><signal id="nAS_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_9_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_11_1"><signal id="BERR_IOBS" negated="ON"/><signal id="TimeoutB" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_1"><signal id="nAS_FSB"/></pterm><pterm id="FB8_12_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nWE_FSB"/></pterm><pterm id="FB8_12_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB8_12_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB8_13_1"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_13_2"><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_13_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_13_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_13_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_14_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_14_2"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_14_3"><signal id="A_FSB22_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_14_4"><signal id="A_FSB22_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_14_5"><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_15_1"><signal id="RESr0"/><signal id="RESr1"/><signal id="IPL2r0"/><signal id="RESr2"/><signal id="RESDone" negated="ON"/><signal id="IPL2r1"/></pterm><pterm id="FB8_15_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_1"><signal id="TimeoutB" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_1"><signal id="IORW0" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nADoutLE1"/></pterm><equation id="RA11_SPECSIG" userloc="P63"><d2><eq_pterm ptindx="FB8_2_1"/></d2></equation><equation id="iobsPS_FSM_FFd2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_4_1"/><eq_pterm ptindx="FB8_4_2"/><eq_pterm ptindx="FB8_4_3"/><eq_pterm ptindx="FB8_4_4"/><eq_pterm ptindx="FB8_4_5"/><eq_pterm import="1" ptindx="FB8_3_1"/><eq_pterm import="1" ptindx="FB8_3_2"/><eq_pterm import="1" ptindx="FB8_3_3"/><eq_pterm import="1" ptindx="FB8_3_4"/><eq_pterm import="1" ptindx="FB8_3_5"/><eq_pterm import="1" ptindx="FB8_5_1"/><eq_pterm import="1" ptindx="FB8_5_2"/><eq_pterm import="1" ptindx="FB8_5_3"/><eq_pterm import="1" ptindx="FB8_5_4"/><eq_pterm import="1" ptindx="FB8_5_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nRAS" negated="ON" userloc="P64"><d2><eq_pterm import="1" ptindx="FB8_6_2"/><eq_pterm import="1" ptindx="FB8_6_3"/><eq_pterm import="1" ptindx="FB8_6_4"/></d2></equation><equation id="nRAMLWE" negated="ON" userloc="P65"><d2><eq_pterm ptindx="FB8_6_1"/></d2></equation><equation id="RESDone" regUse="D"><d2><eq_pterm ptindx="VCC"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB8_7_1"/></ce><prld ptindx="GND"/></equation><equation id="nRAMUWE" negated="ON" userloc="P66"><d2><eq_pterm import="1" ptindx="FB8_7_2"/></d2></equation><equation id="IOREQ" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_9_1"/><eq_pterm ptindx="FB8_9_2"/><eq_pterm ptindx="FB8_9_3"/><eq_pterm ptindx="FB8_9_4"/><eq_pterm ptindx="FB8_9_5"/><eq_pterm import="1" ptindx="FB8_8_1"/><eq_pterm import="1" ptindx="FB8_8_2"/><eq_pterm import="1" ptindx="FB8_8_3"/><eq_pterm import="1" ptindx="FB8_8_4"/><eq_pterm import="1" ptindx="FB8_8_5"/><eq_pterm import="1" ptindx="FB8_10_1"/><eq_pterm import="1" ptindx="FB8_10_2"/><eq_pterm import="1" ptindx="FB8_10_3"/><eq_pterm import="1" ptindx="FB8_10_4"/><eq_pterm import="1" ptindx="FB8_10_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nBERR_FSB" userloc="P70"><d2><eq_pterm ptindx="FB8_12_1"/><eq_pterm import="1" ptindx="FB8_11_1"/><eq_pterm import="1" ptindx="FB8_11_2"/></d2></equation><equation id="iobsOnce_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_14_1"/><eq_pterm ptindx="FB8_14_2"/><eq_pterm ptindx="FB8_14_3"/><eq_pterm ptindx="FB8_14_4"/><eq_pterm ptindx="FB8_14_5"/><eq_pterm import="1" ptindx="FB8_13_1"/><eq_pterm import="1" ptindx="FB8_13_2"/><eq_pterm import="1" ptindx="FB8_13_3"/><eq_pterm import="1" ptindx="FB8_13_4"/><eq_pterm import="1" ptindx="FB8_13_5"/><eq_pterm import="1" ptindx="FB8_12_2"/><eq_pterm import="1" ptindx="FB8_12_3"/><eq_pterm import="1" ptindx="FB8_12_4"/><eq_pterm import="1" ptindx="FB8_12_5"/><eq_pterm import="1" ptindx="FB8_15_2"/><eq_pterm import="1" ptindx="FB8_15_3"/><eq_pterm import="1" ptindx="FB8_15_4"/><eq_pterm import="1" ptindx="FB8_15_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nBR_IOB" regUse="D" userloc="P72"><d2><eq_pterm ptindx="GND"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB8_15_1"/></ce><prld ptindx="VCC"/></equation><equation id="fsbBERR0r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_16_1"/><eq_pterm ptindx="FB8_16_2"/><eq_pterm ptindx="FB8_16_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IORW0" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB8_18_1"/><eq_pterm ptindx="FB8_18_2"/><eq_pterm ptindx="FB8_18_3"/><eq_pterm ptindx="FB8_18_4"/><eq_pterm ptindx="FB8_18_5"/><eq_pterm import="1" ptindx="FB8_1_1"/><eq_pterm import="1" ptindx="FB8_1_2"/><eq_pterm import="1" ptindx="FB8_1_3"/><eq_pterm import="1" ptindx="FB8_1_4"/><eq_pterm import="1" ptindx="FB8_1_5"/><eq_pterm import="1" ptindx="FB8_2_2"/><eq_pterm import="1" ptindx="FB8_2_3"/><eq_pterm import="1" ptindx="FB8_2_4"/><eq_pterm import="1" ptindx="FB8_2_5"/><eq_pterm import="1" ptindx="FB8_17_1"/><eq_pterm import="1" ptindx="FB8_17_2"/><eq_pterm import="1" ptindx="FB8_17_3"/><eq_pterm import="1" ptindx="FB8_17_4"/><eq_pterm import="1" ptindx="FB8_17_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><vcc/><gnd/><messages><warning>Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'MXSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC constraint 'P22'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC constraint 'P27'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC constraint 'P23'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW<2>'. The input(s) are unused after optimization. Please verify functionality via simulation.</warning></messages><compOpts exhaust="OFF" gclkopt="ON" gsropt="ON" gtsopt="ON" ignorets="OFF" inputs="54" keepio="OFF" loc="ON" mlopt="ON" optimize="SPEED" part="xc95144xl-10-TQ100" power="STD" prld="LOW" pterms="25" slew="FAST" terminate="KEEPER" unused="OFF" wysiwyg="OFF"/><specSig signal="A_FSB9_SPECSIG" value="A_FSB<9>"/><specSig signal="A_FSB8_SPECSIG" value="A_FSB<8>"/><specSig signal="A_FSB15_SPECSIG" value="A_FSB<15>"/><specSig signal="A_FSB14_SPECSIG" value="A_FSB<14>"/><specSig signal="A_FSB13_SPECSIG" value="A_FSB<13>"/><specSig signal="A_FSB12_SPECSIG" value="A_FSB<12>"/><specSig signal="A_FSB11_SPECSIG" value="A_FSB<11>"/><specSig signal="A_FSB10_SPECSIG" value="A_FSB<10>"/><specSig signal="A_FSB23_SPECSIG" value="A_FSB<23>"/><specSig signal="A_FSB22_SPECSIG" value="A_FSB<22>"/><specSig signal="A_FSB21_SPECSIG" value="A_FSB<21>"/><specSig signal="A_FSB20_SPECSIG" value="A_FSB<20>"/><specSig signal="A_FSB19_SPECSIG" value="A_FSB<19>"/><specSig signal="A_FSB18_SPECSIG" value="A_FSB<18>"/><specSig signal="A_FSB17_SPECSIG" value="A_FSB<17>"/><specSig signal="A_FSB16_SPECSIG" value="A_FSB<16>"/><specSig signal="SW1_SPECSIG" value="SW<1>"/><specSig signal="A_FSB1_SPECSIG" value="A_FSB<1>"/><specSig signal="A_FSB2_SPECSIG" value="A_FSB<2>"/><specSig signal="A_FSB3_SPECSIG" value="A_FSB<3>"/><specSig signal="A_FSB4_SPECSIG" value="A_FSB<4>"/><specSig signal="A_FSB5_SPECSIG" value="A_FSB<5>"/><specSig signal="A_FSB6_SPECSIG" value="A_FSB<6>"/><specSig signal="A_FSB7_SPECSIG" value="A_FSB<7>"/><specSig signal="SW0_SPECSIG" value="SW<0>"/><specSig signal="GCKI_SPECSIG" value="GCK/I"/><specSig signal="b_SPECSIG" value="(b)"/><specSig signal="ramRAMDIS1_SPECSIG" value="ram/RAMDIS1"/><specSig signal="RA4_SPECSIG" value="RA<4>"/><specSig signal="RA3_SPECSIG" value="RA<3>"/><specSig signal="RA5_SPECSIG" value="RA<5>"/><specSig signal="RA2_SPECSIG" value="RA<2>"/><specSig signal="RA6_SPECSIG" value="RA<6>"/><specSig signal="RA1_SPECSIG" value="RA<1>"/><specSig signal="RA7_SPECSIG" value="RA<7>"/><specSig signal="RA0_SPECSIG" value="RA<0>"/><specSig signal="RA8_SPECSIG" value="RA<8>"/><specSig signal="RA10_SPECSIG" value="RA<10>"/><specSig signal="RA9_SPECSIG" value="RA<9>"/><specSig signal="RA11_SPECSIG" value="RA<11>"/><specSig signal="iobsOnce_SPECSIG" value="iobs/Once"/><specSig signal="ramBACTr_SPECSIG" value="ram/BACTr"/><specSig signal="iobmRESrr_SPECSIG" value="iobm/RESrr"/><specSig signal="iobmRESrf_SPECSIG" value="iobm/RESrf"/><specSig signal="fsbASrf_SPECSIG" value="fsb/ASrf"/><specSig signal="cntRefCnt2_SPECSIG" value="cnt/RefCnt<2>"/><specSig signal="cntRefCnt1_SPECSIG" value="cnt/RefCnt<1>"/><specSig signal="OpTxFX_DC708_SPECSIG" value="$OpTx$FX_DC$708"/><specSig signal="iobsIOU1_SPECSIG" value="iobs/IOU1"/><specSig signal="iobsIOL1_SPECSIG" value="iobs/IOL1"/><specSig signal="iobmIOS_FSM_FFd1_SPECSIG" value="iobm/IOS_FSM_FFd1"/><specSig signal="cntRefCnt0_SPECSIG" value="cnt/RefCnt<0>"/><specSig signal="iobmIOS_FSM_FFd2_SPECSIG" value="iobm/IOS_FSM_FFd2"/><specSig signal="iobmIOS_FSM_FFd3_SPECSIG" value="iobm/IOS_FSM_FFd3"/><specSig signal="iobsLoad1_SPECSIG" value="iobs/Load1"/><specSig signal="iobsPS_FSM_FFd1_SPECSIG" value="iobs/PS_FSM_FFd1"/><specSig signal="iobsPS_FSM_FFd2_SPECSIG" value="iobs/PS_FSM_FFd2"/><specSig signal="ramRS_FSM_FFd1_SPECSIG" value="ram/RS_FSM_FFd1"/><specSig signal="ramRS_FSM_FFd2_SPECSIG" value="ram/RS_FSM_FFd2"/><specSig signal="iobsIOACTr_SPECSIG" value="iobs/IOACTr"/><specSig signal="iobmVPArr_SPECSIG" value="iobm/VPArr"/><specSig signal="iobmVPArf_SPECSIG" value="iobm/VPArf"/><specSig signal="iobmIOREQr_SPECSIG" value="iobm/IOREQr"/><specSig signal="iobmEr2_SPECSIG" value="iobm/Er2"/><specSig signal="iobmEr_SPECSIG" value="iobm/Er"/><specSig signal="iobmDTACKrr_SPECSIG" value="iobm/DTACKrr"/><specSig signal="iobmDTACKrf_SPECSIG" value="iobm/DTACKrf"/><specSig signal="iobmBGr1_SPECSIG" value="iobm/BGr1"/><specSig signal="iobmBGr0_SPECSIG" value="iobm/BGr0"/><specSig signal="iobmBERRrr_SPECSIG" value="iobm/BERRrr"/><specSig signal="iobmBERRrf_SPECSIG" value="iobm/BERRrf"/><specSig signal="fsbReady1r_SPECSIG" value="fsb/Ready1r"/><specSig signal="iobsIORW1_SPECSIG" value="iobs/IORW1"/><specSig signal="fsbReady2r_SPECSIG" value="fsb/Ready2r"/><specSig signal="fsbVPA_SPECSIG" value="fsb/VPA"/><specSig signal="iobsClear1_SPECSIG" value="iobs/Clear1"/><specSig signal="OpTxOpTxFX_DC182_INV783_SPECSIG" value="$OpTx$$OpTx$FX_DC$182_INV$783"/><specSig signal="csnOverlay1_SPECSIG" value="cs/nOverlay1"/><specSig signal="fsbBERR0r_SPECSIG" value="fsb/BERR0r"/><specSig signal="fsbBERR1r_SPECSIG" value="fsb/BERR1r"/><specSig signal="iobsIOReady_SPECSIG" value="iobs/IOReady"/><specSig signal="cntRefCnt6_SPECSIG" value="cnt/RefCnt<6>"/><specSig signal="cntRefCnt5_SPECSIG" value="cnt/RefCnt<5>"/><specSig signal="cntRefCnt4_SPECSIG" value="cnt/RefCnt<4>"/><specSig signal="cntRefCnt3_SPECSIG" value="cnt/RefCnt<3>"/><specSig signal="cntRefDone_SPECSIG" value="cnt/RefDone"/><specSig signal="csnOverlay0_SPECSIG" value="cs/nOverlay0"/><specSig signal="cntTimeoutBPre_SPECSIG" value="cnt/TimeoutBPre"/><specSig signal="cntRefCnt7_SPECSIG" value="cnt/RefCnt<7>"/><specSig signal="ramRASEL_SPECSIG" value="ram/RASEL"/><specSig signal="ramRAMDIS2_SPECSIG" value="ram/RAMDIS2"/><specSig signal="ramOnce_SPECSIG" value="ram/Once"/><specSig signal="ramRS_FSM_FFd3_SPECSIG" value="ram/RS_FSM_FFd3"/><specSig signal="iobmETACK_SPECSIG" value="iobm/ETACK"/><specSig signal="iobmES3_SPECSIG" value="iobm/ES<3>"/><specSig signal="iobmES1_SPECSIG" value="iobm/ES<1>"/><specSig signal="iobmES0_SPECSIG" value="iobm/ES<0>"/><specSig signal="iobmES4_SPECSIG" value="iobm/ES<4>"/><specSig signal="iobmES2_SPECSIG" value="iobm/ES<2>"/><specSig signal="ramRAMReady_SPECSIG" value="ram/RAMReady"/><specSig signal="fsbReady0r_SPECSIG" value="fsb/Ready0r"/></document>
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