807 lines
46 KiB
Plaintext
807 lines
46 KiB
Plaintext
|
||
cpldfit: version P.20131013 Xilinx Inc.
|
||
No Fit Report
|
||
Design Name: WarpSE Date: 7-13-2023, 4:03PM
|
||
Device Used: XC95144XL-10-TQ100
|
||
Fitting Status: Placement Failed
|
||
|
||
************************** Errors and Warnings ***************************
|
||
|
||
WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
|
||
use the default filename of 'WarpSE.ise'.
|
||
INFO:Cpld - Inferring BUFG constraint for signal 'C16M' based upon the LOC
|
||
constraint 'P22'. It is recommended that you declare this BUFG explicitedly
|
||
in your design. Note that for certain device families the output of a BUFG
|
||
constraint can not drive a gated clock, and the BUFG constraint will be
|
||
ignored.
|
||
INFO:Cpld - Inferring BUFG constraint for signal 'C8M' based upon the LOC
|
||
constraint 'P23'. It is recommended that you declare this BUFG explicitedly
|
||
in your design. Note that for certain device families the output of a BUFG
|
||
constraint can not drive a gated clock, and the BUFG constraint will be
|
||
ignored.
|
||
INFO:Cpld - Inferring BUFG constraint for signal 'FCLK' based upon the LOC
|
||
constraint 'P27'. It is recommended that you declare this BUFG explicitedly
|
||
in your design. Note that for certain device families the output of a BUFG
|
||
constraint can not drive a gated clock, and the BUFG constraint will be
|
||
ignored.
|
||
WARNING:Cpld:1007 - Removing unused input(s) 'C20MEN'. The input(s) are unused
|
||
after optimization. Please verify functionality via simulation.
|
||
WARNING:Cpld:1007 - Removing unused input(s) 'SW<1>'. The input(s) are unused
|
||
after optimization. Please verify functionality via simulation.
|
||
WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'. The input(s) are unused
|
||
after optimization. Please verify functionality via simulation.
|
||
WARNING:Cpld:1007 - Removing unused input(s) 'SW<3>'. The input(s) are unused
|
||
after optimization. Please verify functionality via simulation.
|
||
WARNING:Cpld:1007 - Removing unused input(s) 'nBG_IOB'. The input(s) are unused
|
||
after optimization. Please verify functionality via simulation.
|
||
ERROR:Cpld:892 - Cannot place signal iobm/IOS_FSM_FFd4. Consider reducing the
|
||
collapsing input limit or the product term limit to prevent the fitter from
|
||
creating high input and/or high product term functions.
|
||
ERROR:Cpld:868 - Cannot fit the design into any of the specified devices with
|
||
the selected implementation options.
|
||
************************* Mapped Resource Summary **************************
|
||
|
||
Macrocells Product Terms Function Block Registers Pins
|
||
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
|
||
121/144 ( 84%) 594 /720 ( 82%) 344/432 ( 80%) 99 /144 ( 69%) 70 /81 ( 86%)
|
||
|
||
** Function Block Resources **
|
||
|
||
Function Mcells FB Inps Pterms IO
|
||
Block Used/Tot Used/Tot Used/Tot Used/Tot
|
||
FB1 18/18* 44/54 68/90 11/11*
|
||
FB2 18/18* 33/54 42/90 8/10
|
||
FB3 12/18 44/54 87/90 10/10*
|
||
FB4 12/18 40/54 82/90 10/10*
|
||
FB5 14/18 54/54* 85/90 8/10
|
||
FB6 18/18* 36/54 68/90 10/10*
|
||
FB7 17/18 40/54 81/90 7/10
|
||
FB8 12/18 53/54 81/90 6/10
|
||
----- ----- ----- -----
|
||
121/144 344/432 594/720 70/81
|
||
|
||
* - Resource is exhausted
|
||
|
||
** Global Control Resources **
|
||
|
||
Global clock net(s) unused.
|
||
Global output enable net(s) unused.
|
||
Global set/reset net(s) unused.
|
||
|
||
** Pin Resources **
|
||
|
||
Signal Type Required Mapped | Pin Type Used Total
|
||
------------------------------------|------------------------------------
|
||
Input : 32 32 | I/O : 64 73
|
||
Output : 34 34 | GCK/IO : 3 3
|
||
Bidirectional : 1 1 | GTS/IO : 3 4
|
||
GCK : 3 3 | GSR/IO : 0 1
|
||
GTS : 0 0 |
|
||
GSR : 0 0 |
|
||
---- ----
|
||
Total 70 70
|
||
|
||
** Power Data **
|
||
|
||
There are 132 macrocells in high performance mode (MCHP).
|
||
There are 0 macrocells in low power mode (MCLP).
|
||
End of Mapped Resource Summary
|
||
************************* Summary of Mapped Logic ************************
|
||
|
||
** 35 Outputs **
|
||
|
||
Signal Total Total Loc Pin Pin Pin
|
||
Name Pts Inps No. Type Use
|
||
nDTACK_FSB 14 15 FB3_9 28 I/O O
|
||
nROMWE 1 2 FB3_17 34 I/O O
|
||
nAoutOE 2 4 FB4_2 87 I/O O
|
||
nDoutOE 2 5 FB4_5 89 I/O O
|
||
nDinOE 3 7 FB4_6 90 I/O O
|
||
nRES 1 1 FB4_8 91 I/O I/O
|
||
nVPA_FSB 3 11 FB4_11 93 I/O O
|
||
nROMCS 2 5 FB5_2 35 I/O O
|
||
nCAS 12 16 FB5_5 36 I/O O
|
||
nOE 3 5 FB5_6 37 I/O O
|
||
RA<4> 2 3 FB5_9 40 I/O O
|
||
RA<3> 2 3 FB5_11 41 I/O O
|
||
RA<5> 2 3 FB5_12 42 I/O O
|
||
RA<2> 2 3 FB5_14 43 I/O O
|
||
RA<6> 2 3 FB5_15 46 I/O O
|
||
nVMA_IOB 3 8 FB6_2 74 I/O O
|
||
nLDS_IOB 6 10 FB6_9 79 I/O O
|
||
nUDS_IOB 6 10 FB6_11 80 I/O O
|
||
nAS_IOB 4 9 FB6_12 81 I/O O
|
||
nADoutLE1 2 3 FB6_14 82 I/O O
|
||
nADoutLE0 1 2 FB6_15 85 I/O O
|
||
nDinLE 1 2 FB6_17 86 I/O O
|
||
RA<1> 2 3 FB7_2 50 I/O O
|
||
RA<7> 2 3 FB7_5 52 I/O O
|
||
RA<0> 2 3 FB7_6 53 I/O O
|
||
RA<8> 2 3 FB7_8 54 I/O O
|
||
RA<10> 2 3 FB7_9 55 I/O O
|
||
RA<9> 2 3 FB7_11 56 I/O O
|
||
C25MEN 1 0 FB7_12 58 I/O O
|
||
RA<11> 2 3 FB8_2 63 I/O O
|
||
nRAS 3 7 FB8_5 64 I/O O
|
||
nRAMLWE 1 3 FB8_6 65 I/O O
|
||
nRAMUWE 1 3 FB8_8 66 I/O O
|
||
nBERR_FSB 3 5 FB8_12 70 I/O O
|
||
nBR_IOB 2 4 FB8_15 72 I/O O
|
||
|
||
** 86 Buried Nodes **
|
||
|
||
Signal Total Total Loc
|
||
Name Pts Inps
|
||
RAMReady 10 13 FB1_1
|
||
iobm/IORDREQr 1 1 FB1_2
|
||
iobm/Er 1 1 FB1_3
|
||
ram/RS_FSM_FFd5 2 3 FB1_4
|
||
iobm/IOS_FSM_FFd2 2 4 FB1_5
|
||
WS 2 5 FB1_6
|
||
ram/RefReq 3 7 FB1_7
|
||
iobm/ES<2> 3 5 FB1_8
|
||
QoSReady 3 7 FB1_9
|
||
ram/RefUrg 4 8 FB1_10
|
||
cnt/Credits<6> 4 11 FB1_11
|
||
cnt/Credits<5> 4 10 FB1_12
|
||
cnt/Credits<4> 4 9 FB1_13
|
||
cnt/Credits<3> 4 8 FB1_14
|
||
cnt/Credits<2> 4 7 FB1_15
|
||
ram/RS_FSM_FFd7 8 10 FB1_16
|
||
ram/RASEN 8 11 FB1_17
|
||
iobm/IOS_FSM_FFd1 1 1 FB1_18
|
||
ram/nRefClkR 1 1 FB2_1
|
||
iobs/Clear1 1 2 FB2_2
|
||
fsb/ASrf 1 1 FB2_3
|
||
cnt/LTimerTC 1 12 FB2_4
|
||
cnt/Er<1> 1 1 FB2_5
|
||
cnt/C8Mr<1> 1 1 FB2_6
|
||
BACTr<1> 1 2 FB2_7
|
||
ALE0S 1 1 FB2_8
|
||
iobs/TS_FSM_FFd1 2 3 FB2_9
|
||
iobs/IOU1 2 2 FB2_10
|
||
iobs/IOL1 2 2 FB2_11
|
||
cnt/TimerTC 2 6 FB2_12
|
||
cnt/Timer<0> 2 4 FB2_13
|
||
cnt/Timer<1> 4 5 FB2_14
|
||
cnt/Credits<0> 4 5 FB2_15
|
||
cnt/Timer<2> 5 6 FB2_16
|
||
RefClk 5 7 FB2_17
|
||
cnt/Credits<1> 6 6 FB2_18
|
||
cnt/LTimer<6> 18 29 FB3_2
|
||
cnt/nIPL2r 1 1 FB3_3
|
||
cnt/Er<0> 1 1 FB3_4
|
||
cnt/LTimer<3> 15 26 FB3_5
|
||
|
||
Signal Total Total Loc
|
||
Name Pts Inps
|
||
nRESout 1 2 FB3_7
|
||
cnt/C8Mr<0> 1 1 FB3_10
|
||
BACTr<3> 1 1 FB3_11
|
||
cnt/LTimer<4> 16 27 FB3_14
|
||
cnt/LTimer<9> 17 32 FB3_16
|
||
ram/RS_FSM_FFd4 1 2 FB3_18
|
||
cnt/IS_FSM_FFd1 1 7 FB4_1
|
||
iobs/TS_FSM_FFd2 12 17 FB4_4
|
||
iobs/Sent 11 16 FB4_7
|
||
IOWRREQ 13 19 FB4_10
|
||
iobs/IORW1 4 16 FB4_12
|
||
IOU0 15 19 FB4_14
|
||
IOL0 15 19 FB4_17
|
||
BACTr<2> 1 1 FB5_3
|
||
cnt/LTimer<11> 17 34 FB5_8
|
||
IOBERR 2 2 FB5_10
|
||
ram/RS_FSM_FFd8 10 12 FB5_13
|
||
ram/RASrr 11 12 FB5_17
|
||
cnt/LTimer<10> 17 33 FB5_18
|
||
iobm/IOS_FSM_FFd6 2 5 FB6_1
|
||
iobm/IOS_FSM_FFd7 3 6 FB6_3
|
||
iobm/IOS_FSM_FFd3 3 5 FB6_4
|
||
iobm/ES<0> 3 6 FB6_5
|
||
iobm/ES<3> 4 6 FB6_6
|
||
iobm/ES<1> 4 6 FB6_7
|
||
iobm/DoutOE 4 8 FB6_8
|
||
IODONE 4 8 FB6_10
|
||
iobm/IOS0 5 12 FB6_13
|
||
ALE0M 5 11 FB6_16
|
||
IOACT 8 14 FB6_18
|
||
cnt/LTimer<2> 14 25 FB7_1
|
||
cnt/IS_FSM_FFd2 2 6 FB7_3
|
||
ram/RASEL 3 8 FB7_4
|
||
cnt/STimer<0> 8 20 FB7_7
|
||
cnt/SndSlowEN 10 24 FB7_10
|
||
cnt/LTimer<0> 12 23 FB7_13
|
||
cs/nOverlay 3 8 FB7_14
|
||
cnt/LTimer<1> 13 24 FB7_16
|
||
ram/RS_FSM_FFd6 2 7 FB7_17
|
||
iobm/C8Mr 1 1 FB7_18
|
||
|
||
Signal Total Total Loc
|
||
Name Pts Inps
|
||
cnt/LTimer<7> 17 30 FB8_3
|
||
IORDREQ 9 15 FB8_7
|
||
cnt/LTimer<8> 17 31 FB8_9
|
||
IOReady 5 15 FB8_11
|
||
iobs/Load1 4 15 FB8_13
|
||
cnt/LTimer<5> 17 28 FB8_16
|
||
|
||
** 35 Inputs **
|
||
|
||
Signal Loc Pin Pin Pin
|
||
Name No. Type Use
|
||
A_FSB<13> FB1_2 11 I/O I
|
||
A_FSB<14> FB1_3 12 I/O I
|
||
A_FSB<15> FB1_5 13 I/O I
|
||
A_FSB<16> FB1_6 14 I/O I
|
||
A_FSB<17> FB1_8 15 I/O I
|
||
A_FSB<18> FB1_9 16 I/O I
|
||
A_FSB<19> FB1_11 17 I/O I
|
||
A_FSB<20> FB1_12 18 I/O I
|
||
A_FSB<21> FB1_14 19 I/O I
|
||
A_FSB<22> FB1_15 20 I/O I
|
||
C16M FB1_17 22 GCK/I/O GCK
|
||
A_FSB<5> FB2_6 2 GTS/I/O I
|
||
A_FSB<6> FB2_8 3 GTS/I/O I
|
||
A_FSB<7> FB2_9 4 GTS/I/O I
|
||
A_FSB<8> FB2_11 6 I/O I
|
||
A_FSB<9> FB2_12 7 I/O I
|
||
A_FSB<10> FB2_14 8 I/O I
|
||
A_FSB<11> FB2_15 9 I/O I
|
||
A_FSB<12> FB2_17 10 I/O I
|
||
C8M FB3_2 23 GCK/I/O GCK/I
|
||
A_FSB<23> FB3_5 24 I/O I
|
||
E FB3_6 25 I/O I
|
||
FCLK FB3_8 27 GCK/I/O GCK
|
||
nWE_FSB FB3_11 29 I/O I
|
||
nLDS_FSB FB3_12 30 I/O I
|
||
nAS_FSB FB3_14 32 I/O I
|
||
nUDS_FSB FB3_15 33 I/O I
|
||
nIPL2 FB4_9 92 I/O I
|
||
A_FSB<1> FB4_12 94 I/O I
|
||
A_FSB<2> FB4_14 95 I/O I
|
||
A_FSB<3> FB4_15 96 I/O I
|
||
A_FSB<4> FB4_17 97 I/O I
|
||
nBERR_IOB FB6_5 76 I/O I
|
||
nVPA_IOB FB6_6 77 I/O I
|
||
nDTACK_IOB FB6_8 78 I/O I
|
||
|
||
Legend:
|
||
Pin No. - ~ - User Assigned
|
||
************************* Summary of UnMapped Logic ************************
|
||
|
||
** 11 Buried Nodes **
|
||
|
||
Signal Total Total User
|
||
Name Pts Inps Assignment
|
||
iobm/IOS_FSM_FFd4 1 1
|
||
iobm/IOS_FSM_FFd5 1 1
|
||
iobm/IOWRREQr 1 1
|
||
iobm/VPAr 1 1
|
||
iobs/IOACTr 1 1
|
||
iobs/IODONEr 1 1
|
||
ram/DTACKr 1 1
|
||
ram/RASrf 1 1
|
||
ram/RS_FSM_FFd1 1 1
|
||
ram/RS_FSM_FFd2 1 1
|
||
ram/RS_FSM_FFd3 1 1
|
||
|
||
************************** Function Block Details ************************
|
||
Legend:
|
||
Total Pt - Total product terms used by the macrocell signal
|
||
Imp Pt - Product terms imported from other macrocells
|
||
Exp Pt - Product terms exported to other macrocells
|
||
in direction shown
|
||
Unused Pt - Unused local product terms remaining in macrocell
|
||
Loc - Location where logic was mapped in device
|
||
Pin Type/Use - I - Input GCK - Global Clock
|
||
O - Output GTS - Global Output Enable
|
||
(b) - Buried macrocell GSR - Global Set/Reset
|
||
X - Signal used as input to the macrocell logic.
|
||
Pin No. - ~ - User Assigned
|
||
*********************************** FB1 ***********************************
|
||
Number of function block inputs used/remaining: 44/10
|
||
Number of signals used by logic mapping into function block: 44
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
RAMReady 10 5<- 0 0 FB1_1 (b) (b)
|
||
iobm/IORDREQr 1 1<- /\5 0 FB1_2 11 I/O I
|
||
iobm/Er 1 0 /\1 3 FB1_3 12 I/O I
|
||
ram/RS_FSM_FFd5 2 0 0 3 FB1_4 (b) (b)
|
||
iobm/IOS_FSM_FFd2 2 0 0 3 FB1_5 13 I/O I
|
||
WS 2 0 0 3 FB1_6 14 I/O I
|
||
ram/RefReq 3 0 0 2 FB1_7 (b) (b)
|
||
iobm/ES<2> 3 0 0 2 FB1_8 15 I/O I
|
||
QoSReady 3 0 0 2 FB1_9 16 I/O I
|
||
ram/RefUrg 4 0 0 1 FB1_10 (b) (b)
|
||
cnt/Credits<6> 4 0 0 1 FB1_11 17 I/O I
|
||
cnt/Credits<5> 4 0 0 1 FB1_12 18 I/O I
|
||
cnt/Credits<4> 4 0 0 1 FB1_13 (b) (b)
|
||
cnt/Credits<3> 4 0 \/1 0 FB1_14 19 I/O I
|
||
cnt/Credits<2> 4 1<- \/2 0 FB1_15 20 I/O I
|
||
ram/RS_FSM_FFd7 8 3<- 0 0 FB1_16 (b) (b)
|
||
ram/RASEN 8 4<- /\1 0 FB1_17 22 GCK/I/O GCK
|
||
iobm/IOS_FSM_FFd1 1 0 /\4 0 FB1_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: A_FSB<22> 16: cnt/Credits<1> 31: nAS_FSB
|
||
2: A_FSB<23> 17: cnt/Credits<2> 32: ram/DTACKr
|
||
3: BACTr<1> 18: cnt/Credits<3> 33: ram/RASEN
|
||
4: BACTr<2> 19: cnt/Credits<4> 34: ram/RS_FSM_FFd1
|
||
5: BACTr<3> 20: cnt/Credits<5> 35: ram/RS_FSM_FFd2
|
||
6: E 21: cnt/Credits<6> 36: ram/RS_FSM_FFd3
|
||
7: IOBERR 22: cnt/SndSlowEN 37: ram/RS_FSM_FFd4
|
||
8: IODONE 23: fsb/ASrf 38: ram/RS_FSM_FFd5
|
||
9: IORDREQ 24: iobm/C8Mr 39: ram/RS_FSM_FFd6
|
||
10: QoSReady 25: iobm/ES<0> 40: ram/RS_FSM_FFd7
|
||
11: RefClk 26: iobm/ES<1> 41: ram/RS_FSM_FFd8
|
||
12: WS 27: iobm/ES<2> 42: ram/RefReq
|
||
13: cnt/C8Mr<0> 28: iobm/Er 43: ram/RefUrg
|
||
14: cnt/C8Mr<1> 29: iobm/IOS_FSM_FFd2 44: ram/nRefClkR
|
||
15: cnt/Credits<0> 30: iobm/IOS_FSM_FFd3
|
||
|
||
Signal 1 2 3 4 5 FB
|
||
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
|
||
RAMReady XXX...................X.......X.XX..XXX.XXX....... 13
|
||
iobm/IORDREQr ........X......................................... 1
|
||
iobm/Er .....X............................................ 1
|
||
ram/RS_FSM_FFd5 ...............................X.....XX........... 3
|
||
iobm/IOS_FSM_FFd2 ......XX...............X.....X.................... 4
|
||
WS ..XXX.................X.......X................... 5
|
||
ram/RefReq ..........X......................XXX...X.X.X...... 7
|
||
iobm/ES<2> .....X..................XXXX...................... 5
|
||
QoSReady .........X.......XXXX.X.......X................... 7
|
||
ram/RefUrg ..........X......................XXX...X.XXX...... 8
|
||
cnt/Credits<6> ...........XXXXXXXXXXX............................ 11
|
||
cnt/Credits<5> ...........XXXXXXXXX.X............................ 10
|
||
cnt/Credits<4> ...........XXXXXXXX..X............................ 9
|
||
cnt/Credits<3> ...........XXXXXXX...X............................ 8
|
||
cnt/Credits<2> ...........XXXXXX....X............................ 7
|
||
ram/RS_FSM_FFd7 XXX...................X.......X.X...X...XXX....... 10
|
||
ram/RASEN XXX...................X.......X.XX..X...XXX....... 11
|
||
iobm/IOS_FSM_FFd1 ............................X..................... 1
|
||
0----+----1----+----2----+----3----+----4----+----5
|
||
0 0 0 0 0
|
||
*********************************** FB2 ***********************************
|
||
Number of function block inputs used/remaining: 33/21
|
||
Number of signals used by logic mapping into function block: 33
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
ram/nRefClkR 1 0 /\1 3 FB2_1 (b) (b)
|
||
iobs/Clear1 1 0 0 4 FB2_2 99 GSR/I/O (b)
|
||
fsb/ASrf 1 0 0 4 FB2_3 (b) (b)
|
||
cnt/LTimerTC 1 0 0 4 FB2_4 (b) (b)
|
||
cnt/Er<1> 1 0 0 4 FB2_5 1 GTS/I/O (b)
|
||
cnt/C8Mr<1> 1 0 0 4 FB2_6 2 GTS/I/O I
|
||
BACTr<1> 1 0 0 4 FB2_7 (b) (b)
|
||
ALE0S 1 0 0 4 FB2_8 3 GTS/I/O I
|
||
iobs/TS_FSM_FFd1 2 0 0 3 FB2_9 4 GTS/I/O I
|
||
iobs/IOU1 2 0 0 3 FB2_10 (b) (b)
|
||
iobs/IOL1 2 0 0 3 FB2_11 6 I/O I
|
||
cnt/TimerTC 2 0 0 3 FB2_12 7 I/O I
|
||
cnt/Timer<0> 2 0 0 3 FB2_13 (b) (b)
|
||
cnt/Timer<1> 4 0 0 1 FB2_14 8 I/O I
|
||
cnt/Credits<0> 4 0 0 1 FB2_15 9 I/O I
|
||
cnt/Timer<2> 5 0 0 0 FB2_16 (b) (b)
|
||
RefClk 5 0 0 0 FB2_17 10 I/O I
|
||
cnt/Credits<1> 6 1<- 0 0 FB2_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: RefClk 12: cnt/LTimer<1> 23: cnt/Timer<1>
|
||
2: WS 13: cnt/LTimer<2> 24: cnt/Timer<2>
|
||
3: cnt/C8Mr<0> 14: cnt/LTimer<3> 25: cnt/TimerTC
|
||
4: cnt/C8Mr<1> 15: cnt/LTimer<4> 26: fsb/ASrf
|
||
5: cnt/Credits<0> 16: cnt/LTimer<5> 27: iobs/IOACTr
|
||
6: cnt/Credits<1> 17: cnt/LTimer<6> 28: iobs/Load1
|
||
7: cnt/Er<0> 18: cnt/LTimer<7> 29: iobs/TS_FSM_FFd1
|
||
8: cnt/Er<1> 19: cnt/LTimer<8> 30: iobs/TS_FSM_FFd2
|
||
9: cnt/LTimer<0> 20: cnt/LTimer<9> 31: nAS_FSB
|
||
10: cnt/LTimer<10> 21: cnt/SndSlowEN 32: nLDS_FSB
|
||
11: cnt/LTimer<11> 22: cnt/Timer<0> 33: nUDS_FSB
|
||
|
||
Signal 1 2 3 4 FB
|
||
Name 0----+----0----+----0----+----0----+----0 Inputs
|
||
ram/nRefClkR X....................................... 1
|
||
iobs/Clear1 ............................XX.......... 2
|
||
fsb/ASrf ..............................X......... 1
|
||
cnt/LTimerTC ........XXXXXXXXXXXX.................... 12
|
||
cnt/Er<1> ......X................................. 1
|
||
cnt/C8Mr<1> ..X..................................... 1
|
||
BACTr<1> .........................X....X......... 2
|
||
ALE0S .............................X.......... 1
|
||
iobs/TS_FSM_FFd1 ..........................X.XX.......... 3
|
||
iobs/IOU1 ...........................X....X....... 2
|
||
iobs/IOL1 ...........................X...X........ 2
|
||
cnt/TimerTC X.....XX.............XXX................ 6
|
||
cnt/Timer<0> ......XX.............X..X............... 4
|
||
cnt/Timer<1> ......XX.............XX.X............... 5
|
||
cnt/Credits<0> .XXXX...............X................... 5
|
||
cnt/Timer<2> ......XX.............XXXX............... 6
|
||
RefClk X.....XX.............XXXX............... 7
|
||
cnt/Credits<1> .XXXXX..............X................... 6
|
||
0----+----1----+----2----+----3----+----4
|
||
0 0 0 0
|
||
*********************************** FB3 ***********************************
|
||
Number of function block inputs used/remaining: 44/10
|
||
Number of signals used by logic mapping into function block: 44
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
(unused) 0 0 \/5 0 FB3_1 (b) (b)
|
||
cnt/LTimer<6> 18 13<- 0 0 FB3_2 23 GCK/I/O GCK/I
|
||
cnt/nIPL2r 1 0 /\4 0 FB3_3 (b) (b)
|
||
cnt/Er<0> 1 0 \/4 0 FB3_4 (b) (b)
|
||
cnt/LTimer<3> 15 10<- 0 0 FB3_5 24 I/O I
|
||
(unused) 0 0 /\5 0 FB3_6 25 I/O I
|
||
nRESout 1 0 /\1 3 FB3_7 (b) (b)
|
||
(unused) 0 0 \/5 0 FB3_8 27 GCK/I/O GCK
|
||
nDTACK_FSB 14 9<- 0 0 FB3_9 28 I/O O
|
||
cnt/C8Mr<0> 1 0 /\4 0 FB3_10 (b) (b)
|
||
BACTr<3> 1 0 \/4 0 FB3_11 29 I/O I
|
||
(unused) 0 0 \/5 0 FB3_12 30 I/O I
|
||
(unused) 0 0 \/5 0 FB3_13 (b) (b)
|
||
cnt/LTimer<4> 16 14<- \/3 0 FB3_14 32 I/O I
|
||
(unused) 0 0 \/5 0 FB3_15 33 I/O I
|
||
cnt/LTimer<9> 17 12<- 0 0 FB3_16 (b) (b)
|
||
nROMWE 1 0 /\4 0 FB3_17 34 I/O O
|
||
ram/RS_FSM_FFd4 1 0 \/4 0 FB3_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: A_FSB<10> 16: A_FSB<9> 31: cnt/LTimer<4>
|
||
2: A_FSB<11> 17: BACTr<2> 32: cnt/LTimer<5>
|
||
3: A_FSB<12> 18: C8M 33: cnt/LTimer<6>
|
||
4: A_FSB<13> 19: E 34: cnt/LTimer<7>
|
||
5: A_FSB<14> 20: IOReady 35: cnt/LTimer<8>
|
||
6: A_FSB<15> 21: QoSReady 36: cnt/STimer<0>
|
||
7: A_FSB<16> 22: RAMReady 37: cnt/TimerTC
|
||
8: A_FSB<17> 23: cnt/Er<0> 38: fsb/ASrf
|
||
9: A_FSB<18> 24: cnt/Er<1> 39: nADoutLE1
|
||
10: A_FSB<19> 25: cnt/IS_FSM_FFd1 40: nAS_FSB
|
||
11: A_FSB<20> 26: cnt/IS_FSM_FFd2 41: nIPL2
|
||
12: A_FSB<21> 27: cnt/LTimer<0> 42: nWE_FSB
|
||
13: A_FSB<22> 28: cnt/LTimer<1> 43: ram/DTACKr
|
||
14: A_FSB<23> 29: cnt/LTimer<2> 44: ram/RS_FSM_FFd5
|
||
15: A_FSB<8> 30: cnt/LTimer<3>
|
||
|
||
Signal 1 2 3 4 5 FB
|
||
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
|
||
cnt/LTimer<6> XXXXXXXXXXXXXXXX......XX..XXXXXX...XXX.X.X........ 29
|
||
cnt/nIPL2r ........................................X......... 1
|
||
cnt/Er<0> ..................X............................... 1
|
||
cnt/LTimer<3> XXXXXXXXXXXXXXXX......XX..XXX......XXX.X.X........ 26
|
||
nRESout ........................XX........................ 2
|
||
nDTACK_FSB ......XXXXXXXX.....XXX...............XXX.X........ 15
|
||
cnt/C8Mr<0> .................X................................ 1
|
||
BACTr<3> ................X................................. 1
|
||
cnt/LTimer<4> XXXXXXXXXXXXXXXX......XX..XXXX.....XXX.X.X........ 27
|
||
cnt/LTimer<9> XXXXXXXXXXXXXXXX......XX..XXXXXXXXXXXX.X.X........ 32
|
||
nROMWE .......................................X.X........ 2
|
||
ram/RS_FSM_FFd4 ..........................................XX...... 2
|
||
0----+----1----+----2----+----3----+----4----+----5
|
||
0 0 0 0 0
|
||
*********************************** FB4 ***********************************
|
||
Number of function block inputs used/remaining: 40/14
|
||
Number of signals used by logic mapping into function block: 40
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
cnt/IS_FSM_FFd1 1 0 0 4 FB4_1 (b) (b)
|
||
nAoutOE 2 0 0 3 FB4_2 87 I/O O
|
||
(unused) 0 0 \/5 0 FB4_3 (b) (b)
|
||
iobs/TS_FSM_FFd2 12 7<- 0 0 FB4_4 (b) (b)
|
||
nDoutOE 2 0 /\2 1 FB4_5 89 I/O O
|
||
nDinOE 3 0 \/2 0 FB4_6 90 I/O O
|
||
iobs/Sent 11 6<- 0 0 FB4_7 (b) (b)
|
||
nRES 1 0 /\4 0 FB4_8 91 I/O I/O
|
||
(unused) 0 0 \/5 0 FB4_9 92 I/O I
|
||
IOWRREQ 13 8<- 0 0 FB4_10 (b) (b)
|
||
nVPA_FSB 3 1<- /\3 0 FB4_11 93 I/O O
|
||
iobs/IORW1 4 0 /\1 0 FB4_12 94 I/O I
|
||
(unused) 0 0 \/5 0 FB4_13 (b) (b)
|
||
IOU0 15 10<- 0 0 FB4_14 95 I/O I
|
||
(unused) 0 0 /\5 0 FB4_15 96 I/O I
|
||
(unused) 0 0 \/5 0 FB4_16 (b) (b)
|
||
IOL0 15 10<- 0 0 FB4_17 97 I/O I
|
||
(unused) 0 0 /\5 0 FB4_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: A_FSB<16> 15: cnt/IS_FSM_FFd1 28: iobs/IORW1
|
||
2: A_FSB<17> 16: cnt/IS_FSM_FFd2 29: iobs/IOU1
|
||
3: A_FSB<18> 17: cnt/LTimerTC 30: iobs/Sent
|
||
4: A_FSB<19> 18: cnt/TimerTC 31: iobs/TS_FSM_FFd1
|
||
5: A_FSB<20> 19: cnt/nIPL2r 32: iobs/TS_FSM_FFd2
|
||
6: A_FSB<21> 20: cs/nOverlay 33: nADoutLE1
|
||
7: A_FSB<22> 21: fsb/ASrf 34: nAS_FSB
|
||
8: A_FSB<23> 22: iobm/DoutOE 35: nAoutOE
|
||
9: IOL0 23: iobm/IORDREQr 36: nBR_IOB
|
||
10: IOReady 24: iobm/IOS0 37: nLDS_FSB
|
||
11: IOU0 25: iobm/IOWRREQr 38: nRESout
|
||
12: IOWRREQ 26: iobs/IOACTr 39: nUDS_FSB
|
||
13: cnt/Er<0> 27: iobs/IOL1 40: nWE_FSB
|
||
14: cnt/Er<1>
|
||
|
||
Signal 1 2 3 4 5 FB
|
||
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
|
||
cnt/IS_FSM_FFd1 ............XXXXXXX............................... 7
|
||
nAoutOE ..............XX..................XX.............. 4
|
||
iobs/TS_FSM_FFd2 XXXXXXXX...........XX....X...XXXXX.....X.......... 17
|
||
nDoutOE .....................XXXX.........X............... 5
|
||
nDinOE ....XXXX...........X.............X.....X.......... 7
|
||
iobs/Sent XXXXXXXX...........XX........XXXXX.....X.......... 16
|
||
nRES .....................................X............ 1
|
||
IOWRREQ XXXXXXXX...X.......XX....X.X.XXXXX.....X.......... 19
|
||
nVPA_FSB XXXXXXXX.X..........X............X................ 11
|
||
iobs/IORW1 XXXXXXXX............X......X.XXXXX.....X.......... 16
|
||
IOU0 XXXXXXXX..X........XX.......XXXXXX....XX.......... 19
|
||
IOL0 XXXXXXXXX..........XX.....X..XXXXX..X..X.......... 19
|
||
0----+----1----+----2----+----3----+----4----+----5
|
||
0 0 0 0 0
|
||
*********************************** FB5 ***********************************
|
||
Number of function block inputs used/remaining: 54/0
|
||
Number of signals used by logic mapping into function block: 54
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
(unused) 0 0 /\5 0 FB5_1 (b) (b)
|
||
nROMCS 2 0 /\3 0 FB5_2 35 I/O O
|
||
BACTr<2> 1 0 \/2 2 FB5_3 (b) (b)
|
||
(unused) 0 0 \/5 0 FB5_4 (b) (b)
|
||
nCAS 12 7<- 0 0 FB5_5 36 I/O O
|
||
nOE 3 0 \/2 0 FB5_6 37 I/O O
|
||
(unused) 0 0 \/5 0 FB5_7 (b) (b)
|
||
cnt/LTimer<11> 17 12<- 0 0 FB5_8 39 I/O (b)
|
||
RA<4> 2 2<- /\5 0 FB5_9 40 I/O O
|
||
IOBERR 2 0 /\2 1 FB5_10 (b) (b)
|
||
RA<3> 2 0 \/2 1 FB5_11 41 I/O O
|
||
RA<5> 2 2<- \/5 0 FB5_12 42 I/O O
|
||
ram/RS_FSM_FFd8 10 5<- 0 0 FB5_13 (b) (b)
|
||
RA<2> 2 0 \/2 1 FB5_14 43 I/O O
|
||
RA<6> 2 2<- \/5 0 FB5_15 46 I/O O
|
||
(unused) 0 0 \/5 0 FB5_16 (b) (b)
|
||
ram/RASrr 11 10<- \/4 0 FB5_17 49 I/O (b)
|
||
cnt/LTimer<10> 17 12<- 0 0 FB5_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: A_FSB<10> 19: A_FSB<8> 37: cs/nOverlay
|
||
2: A_FSB<11> 20: A_FSB<9> 38: fsb/ASrf
|
||
3: A_FSB<12> 21: BACTr<1> 39: nAS_FSB
|
||
4: A_FSB<13> 22: cnt/Er<0> 40: nAS_IOB
|
||
5: A_FSB<14> 23: cnt/Er<1> 41: nBERR_IOB
|
||
6: A_FSB<15> 24: cnt/LTimer<0> 42: nWE_FSB
|
||
7: A_FSB<16> 25: cnt/LTimer<10> 43: ram/DTACKr
|
||
8: A_FSB<17> 26: cnt/LTimer<1> 44: ram/RASEL
|
||
9: A_FSB<18> 27: cnt/LTimer<2> 45: ram/RASEN
|
||
10: A_FSB<19> 28: cnt/LTimer<3> 46: ram/RS_FSM_FFd1
|
||
11: A_FSB<20> 29: cnt/LTimer<4> 47: ram/RS_FSM_FFd2
|
||
12: A_FSB<21> 30: cnt/LTimer<5> 48: ram/RS_FSM_FFd3
|
||
13: A_FSB<22> 31: cnt/LTimer<6> 49: ram/RS_FSM_FFd4
|
||
14: A_FSB<23> 32: cnt/LTimer<7> 50: ram/RS_FSM_FFd5
|
||
15: A_FSB<3> 33: cnt/LTimer<8> 51: ram/RS_FSM_FFd7
|
||
16: A_FSB<4> 34: cnt/LTimer<9> 52: ram/RS_FSM_FFd8
|
||
17: A_FSB<5> 35: cnt/STimer<0> 53: ram/RefReq
|
||
18: A_FSB<7> 36: cnt/TimerTC 54: ram/RefUrg
|
||
|
||
Signal 1 2 3 4 5 6 FB
|
||
Name 0----+----0----+----0----+----0----+----0----+----0----+----0 Inputs
|
||
nROMCS ..........XXXX......................X....................... 5
|
||
BACTr<2> ....................X....................................... 1
|
||
nCAS ............XX......X................XX...X.XXXXXXXXXX...... 16
|
||
nOE ....................X................XX..XX................. 5
|
||
cnt/LTimer<11> XXXXXXXXXXXXXX....XX.XXXXXXXXXXXXXXX.XX..X.................. 34
|
||
RA<4> .X............X............................X................ 3
|
||
IOBERR .......................................XX................... 2
|
||
RA<3> .........XX................................X................ 3
|
||
RA<5> ..X............X...........................X................ 3
|
||
ram/RS_FSM_FFd8 ............XX......X...............XXX.....XX..X..XXX...... 12
|
||
RA<2> ......X..........X.........................X................ 3
|
||
RA<6> ...X............X..........................X................ 3
|
||
ram/RASrr ............XX......X...............XXX.....X...X.XXXX...... 12
|
||
cnt/LTimer<10> XXXXXXXXXXXXXX....XX.XXX.XXXXXXXXXXX.XX..X.................. 33
|
||
0----+----1----+----2----+----3----+----4----+----5----+----6
|
||
0 0 0 0 0 0
|
||
*********************************** FB6 ***********************************
|
||
Number of function block inputs used/remaining: 36/18
|
||
Number of signals used by logic mapping into function block: 36
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
iobm/IOS_FSM_FFd6 2 0 0 3 FB6_1 (b) (b)
|
||
nVMA_IOB 3 0 0 2 FB6_2 74 I/O O
|
||
iobm/IOS_FSM_FFd7 3 0 0 2 FB6_3 (b) (b)
|
||
iobm/IOS_FSM_FFd3 3 0 0 2 FB6_4 (b) (b)
|
||
iobm/ES<0> 3 0 0 2 FB6_5 76 I/O I
|
||
iobm/ES<3> 4 0 0 1 FB6_6 77 I/O I
|
||
iobm/ES<1> 4 0 0 1 FB6_7 (b) (b)
|
||
iobm/DoutOE 4 0 \/1 0 FB6_8 78 I/O I
|
||
nLDS_IOB 6 1<- 0 0 FB6_9 79 I/O O
|
||
IODONE 4 0 \/1 0 FB6_10 (b) (b)
|
||
nUDS_IOB 6 1<- 0 0 FB6_11 80 I/O O
|
||
nAS_IOB 4 0 0 1 FB6_12 81 I/O O
|
||
iobm/IOS0 5 0 0 0 FB6_13 (b) (b)
|
||
nADoutLE1 2 0 0 3 FB6_14 82 I/O O
|
||
nADoutLE0 1 0 0 4 FB6_15 85 I/O O
|
||
ALE0M 5 0 0 0 FB6_16 (b) (b)
|
||
nDinLE 1 0 \/3 1 FB6_17 86 I/O O
|
||
IOACT 8 3<- 0 0 FB6_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: ALE0M 13: iobm/ES<1> 25: iobm/IOS_FSM_FFd7
|
||
2: ALE0S 14: iobm/ES<2> 26: iobm/IOWRREQr
|
||
3: E 15: iobm/ES<3> 27: iobm/VPAr
|
||
4: IOACT 16: iobm/Er 28: iobs/Clear1
|
||
5: IOBERR 17: iobm/IORDREQr 29: iobs/Load1
|
||
6: IODONE 18: iobm/IOS0 30: nADoutLE1
|
||
7: IOL0 19: iobm/IOS_FSM_FFd1 31: nAS_IOB
|
||
8: IOU0 20: iobm/IOS_FSM_FFd2 32: nAoutOE
|
||
9: nRES.PIN 21: iobm/IOS_FSM_FFd3 33: nDTACK_IOB
|
||
10: iobm/C8Mr 22: iobm/IOS_FSM_FFd4 34: nLDS_IOB
|
||
11: iobm/DoutOE 23: iobm/IOS_FSM_FFd5 35: nUDS_IOB
|
||
12: iobm/ES<0> 24: iobm/IOS_FSM_FFd6 36: nVMA_IOB
|
||
|
||
Signal 1 2 3 4 FB
|
||
Name 0----+----0----+----0----+----0----+----0 Inputs
|
||
iobm/IOS_FSM_FFd6 .........X......X.......XX.....X........ 5
|
||
nVMA_IOB ...X.......XXXX...........X....X...X.... 8
|
||
iobm/IOS_FSM_FFd7 .........X......X.X.....XX.....X........ 6
|
||
iobm/IOS_FSM_FFd3 ....XX...X..........XX.................. 5
|
||
iobm/ES<0> ..X........XXXXX........................ 6
|
||
iobm/ES<3> ..X........XXXXX........................ 6
|
||
iobm/ES<1> ..X........XXXXX........................ 6
|
||
iobm/DoutOE .........XX.........XXXXXX.............. 8
|
||
nLDS_IOB ......X..X......X...XXXXX......X.X...... 10
|
||
IODONE ........X..XXXX...............X.X..X.... 8
|
||
nUDS_IOB .......X.X......X...XXXXX......X..X..... 10
|
||
nAS_IOB .........X......X...XXXXXX.....X........ 9
|
||
iobm/IOS0 .........X......XXXXXXXXXX.....X........ 12
|
||
nADoutLE1 ...........................XXX.......... 3
|
||
nADoutLE0 XX...................................... 2
|
||
ALE0M X...............X.XXXXXXXX.....X........ 11
|
||
nDinLE ....................XX.................. 2
|
||
IOACT ...XXX...X......X.XXXXXXXX.....X........ 14
|
||
0----+----1----+----2----+----3----+----4
|
||
0 0 0 0
|
||
*********************************** FB7 ***********************************
|
||
Number of function block inputs used/remaining: 40/14
|
||
Number of signals used by logic mapping into function block: 40
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
cnt/LTimer<2> 14 9<- 0 0 FB7_1 (b) (b)
|
||
RA<1> 2 2<- /\5 0 FB7_2 50 I/O O
|
||
cnt/IS_FSM_FFd2 2 0 /\2 1 FB7_3 (b) (b)
|
||
ram/RASEL 3 0 0 2 FB7_4 (b) (b)
|
||
RA<7> 2 0 0 3 FB7_5 52 I/O O
|
||
RA<0> 2 0 \/3 0 FB7_6 53 I/O O
|
||
cnt/STimer<0> 8 3<- 0 0 FB7_7 (b) (b)
|
||
RA<8> 2 0 \/2 1 FB7_8 54 I/O O
|
||
RA<10> 2 2<- \/5 0 FB7_9 55 I/O O
|
||
cnt/SndSlowEN 10 5<- 0 0 FB7_10 (b) (b)
|
||
RA<9> 2 0 \/1 2 FB7_11 56 I/O O
|
||
C25MEN 1 1<- \/5 0 FB7_12 58 I/O O
|
||
cnt/LTimer<0> 12 7<- 0 0 FB7_13 (b) (b)
|
||
cs/nOverlay 3 0 /\2 0 FB7_14 59 I/O (b)
|
||
(unused) 0 0 \/5 0 FB7_15 60 I/O (b)
|
||
cnt/LTimer<1> 13 8<- 0 0 FB7_16 (b) (b)
|
||
ram/RS_FSM_FFd6 2 0 /\3 0 FB7_17 61 I/O (b)
|
||
iobm/C8Mr 1 0 \/4 0 FB7_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: A_FSB<10> 15: A_FSB<23> 28: cnt/LTimer<1>
|
||
2: A_FSB<11> 16: A_FSB<2> 29: cnt/LTimerTC
|
||
3: A_FSB<12> 17: A_FSB<6> 30: cnt/STimer<0>
|
||
4: A_FSB<13> 18: A_FSB<7> 31: cnt/SndSlowEN
|
||
5: A_FSB<14> 19: A_FSB<8> 32: cnt/TimerTC
|
||
6: A_FSB<15> 20: A_FSB<9> 33: cs/nOverlay
|
||
7: A_FSB<16> 21: C8M 34: fsb/ASrf
|
||
8: A_FSB<17> 22: nRES.PIN 35: nAS_FSB
|
||
9: A_FSB<18> 23: cnt/Er<0> 36: nWE_FSB
|
||
10: A_FSB<19> 24: cnt/Er<1> 37: ram/RASEL
|
||
11: A_FSB<1> 25: cnt/IS_FSM_FFd1 38: ram/RASEN
|
||
12: A_FSB<20> 26: cnt/IS_FSM_FFd2 39: ram/RS_FSM_FFd6
|
||
13: A_FSB<21> 27: cnt/LTimer<0> 40: ram/RS_FSM_FFd8
|
||
14: A_FSB<22>
|
||
|
||
Signal 1 2 3 4 5 FB
|
||
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
|
||
cnt/LTimer<2> XXXXXXXXXX.XXXX...XX..XX..XX.X.X.XXX.............. 25
|
||
RA<1> X..............X....................X............. 3
|
||
cnt/IS_FSM_FFd2 ......................XXXX..X..X.................. 6
|
||
ram/RASEL .............XX.................XXX..XXX.......... 8
|
||
RA<7> ....X...........X...................X............. 3
|
||
RA<0> ..........X........X................X............. 3
|
||
cnt/STimer<0> XXXXXXXXXX.XXXX...XX.........X...XXX.............. 20
|
||
RA<8> ........X...X.......................X............. 3
|
||
RA<10> .......X.........X..................X............. 3
|
||
cnt/SndSlowEN XXXXXXXXXX.XXXX...XX..XX.....XXX.XXX.............. 24
|
||
RA<9> .....X............X.................X............. 3
|
||
C25MEN .................................................. 0
|
||
cnt/LTimer<0> XXXXXXXXXX.XXXX...XX..XX.....X.X.XXX.............. 23
|
||
cs/nOverlay ...........XXXX......X..........XXX............... 8
|
||
cnt/LTimer<1> XXXXXXXXXX.XXXX...XX..XX..X..X.X.XXX.............. 24
|
||
ram/RS_FSM_FFd6 .............XX.................XXX..X.X.......... 7
|
||
iobm/C8Mr ....................X............................. 1
|
||
0----+----1----+----2----+----3----+----4----+----5
|
||
0 0 0 0 0
|
||
*********************************** FB8 ***********************************
|
||
Number of function block inputs used/remaining: 53/1
|
||
Number of signals used by logic mapping into function block: 53
|
||
Signal Total Imp Exp Unused Loc Pin Pin Pin
|
||
Name Pt Pt Pt Pt # Type Use
|
||
(unused) 0 0 \/2 3 FB8_1 (b) (b)
|
||
RA<11> 2 2<- \/5 0 FB8_2 63 I/O O
|
||
cnt/LTimer<7> 17 12<- 0 0 FB8_3 (b) (b)
|
||
(unused) 0 0 /\5 0 FB8_4 (b) (b)
|
||
nRAS 3 0 /\2 0 FB8_5 64 I/O O
|
||
nRAMLWE 1 0 \/4 0 FB8_6 65 I/O O
|
||
IORDREQ 9 4<- 0 0 FB8_7 (b) (b)
|
||
nRAMUWE 1 0 \/4 0 FB8_8 66 I/O O
|
||
cnt/LTimer<8> 17 12<- 0 0 FB8_9 67 I/O (b)
|
||
(unused) 0 0 /\5 0 FB8_10 (b) (b)
|
||
IOReady 5 3<- /\3 0 FB8_11 68 I/O (b)
|
||
nBERR_FSB 3 1<- /\3 0 FB8_12 70 I/O O
|
||
iobs/Load1 4 0 /\1 0 FB8_13 (b) (b)
|
||
(unused) 0 0 \/2 3 FB8_14 71 I/O (b)
|
||
nBR_IOB 2 2<- \/5 0 FB8_15 72 I/O O
|
||
cnt/LTimer<5> 17 12<- 0 0 FB8_16 (b) (b)
|
||
(unused) 0 0 /\5 0 FB8_17 73 I/O (b)
|
||
(unused) 0 0 /\2 3 FB8_18 (b) (b)
|
||
|
||
Signals Used by Logic in Function Block
|
||
1: A_FSB<10> 19: IOReady 37: iobs/IOACTr
|
||
2: A_FSB<11> 20: cnt/Er<0> 38: iobs/IODONEr
|
||
3: A_FSB<12> 21: cnt/Er<1> 39: iobs/IORW1
|
||
4: A_FSB<13> 22: cnt/IS_FSM_FFd1 40: iobs/Sent
|
||
5: A_FSB<14> 23: cnt/IS_FSM_FFd2 41: iobs/TS_FSM_FFd1
|
||
6: A_FSB<15> 24: cnt/LTimer<0> 42: iobs/TS_FSM_FFd2
|
||
7: A_FSB<16> 25: cnt/LTimer<1> 43: nADoutLE1
|
||
8: A_FSB<17> 26: cnt/LTimer<2> 44: nAS_FSB
|
||
9: A_FSB<18> 27: cnt/LTimer<3> 45: nBERR_FSB
|
||
10: A_FSB<19> 28: cnt/LTimer<4> 46: nBR_IOB
|
||
11: A_FSB<20> 29: cnt/LTimer<5> 47: nLDS_FSB
|
||
12: A_FSB<21> 30: cnt/LTimer<6> 48: nUDS_FSB
|
||
13: A_FSB<22> 31: cnt/LTimer<7> 49: nWE_FSB
|
||
14: A_FSB<23> 32: cnt/STimer<0> 50: ram/RASEL
|
||
15: A_FSB<8> 33: cnt/TimerTC 51: ram/RASEN
|
||
16: A_FSB<9> 34: cnt/nIPL2r 52: ram/RASrf
|
||
17: IOBERR 35: cs/nOverlay 53: ram/RASrr
|
||
18: IORDREQ 36: fsb/ASrf
|
||
|
||
Signal 1 2 3 4 5 6 FB
|
||
Name 0----+----0----+----0----+----0----+----0----+----0----+----0 Inputs
|
||
RA<11> .........XX......................................X.......... 3
|
||
cnt/LTimer<7> XXXXXXXXXXXXXXXX...XX..XXXXXXX.XX..X.......X....X........... 30
|
||
nRAS ............XX....................X........X......XXX....... 7
|
||
nRAMLWE ..............................................X.XX.......... 3
|
||
IORDREQ ..........XXXX...X................XXX.XXXXXX....X........... 15
|
||
nRAMUWE ...............................................XXX.......... 3
|
||
cnt/LTimer<8> XXXXXXXXXXXXXXXX...XX..XXXXXXXXXX..X.......X....X........... 31
|
||
IOReady ......XXXXXXXX....X................X.X.X..XX....X........... 15
|
||
nBERR_FSB ................X..................X...X...XX............... 5
|
||
iobs/Load1 ......XXXXXXXX.....................X...XXXXX....X........... 15
|
||
nBR_IOB .....................XX..........X...........X.............. 4
|
||
cnt/LTimer<5> XXXXXXXXXXXXXXXX...XX..XXXXX...XX..X.......X....X........... 28
|
||
0----+----1----+----2----+----3----+----4----+----5----+----6
|
||
0 0 0 0 0 0
|
||
******************************* Equations ********************************
|
||
|
||
********** Mapped Logic **********
|
||
|
||
FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,C16M,'0','0');
|
||
ALE0M_D <= ((iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
|
||
NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND nAoutOE)
|
||
OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
|
||
NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
|
||
iobm/IOS_FSM_FFd1)
|
||
OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
|
||
NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
|
||
iobm/IOS_FSM_FFd2)
|
||
OR (NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
|
||
NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT ALE0M)
|
||
OR (iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd3 AND
|
||
NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND
|
||
NOT iobm/IORDREQr AND NOT iobm/IOWRREQr));
|
||
|
||
FDCPE_ALE0S: FDCPE port map (ALE0S,iobs/TS_FSM_FFd2,FCLK,'0','0');
|
||
|
||
FDCPE_BACTr1: FDCPE port map (BACTr(1),BACTr_D(1),FCLK,'0','0');
|
||
BACTr_D(1) <= (nAS_FSB AND NOT fsb/ASrf);
|
||
|
||
FDCPE_BACTr2: FDCPE port map (BACTr(2),BACTr(1),FCLK,'0','0');
|
||
|
||
FDCPE_BACTr3: FDCPE port map (BACTr(3),BACTr(2),FCLK,'0','0');
|
||
|