mirror of
https://github.com/garrettsworkshop/Warp-SE.git
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239 lines
6.0 KiB
Verilog
239 lines
6.0 KiB
Verilog
`timescale 1ns / 1ps
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////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Engineer:
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//
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// Create Date: 05:57:17 12/11/2021
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// Design Name: IOBM
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// Module Name: C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL/test/t_iobm.v
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// Project Name: MXSE
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// Target Device:
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// Tool versions:
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// Description:
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//
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// Verilog Test Fixture created by ISE for module: IOBM
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//
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// Dependencies:
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//
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// Revision:
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// Revision 0.01 - File Created
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// Additional Comments:
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//
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////////////////////////////////////////////////////////////////////////////////
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module t_iobm;
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// Inputs
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reg C16M;
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reg C8M;
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reg E;
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reg nDTACK;
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reg nVPA;
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reg nBERR;
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reg nRES;
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reg IOREQ;
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reg IOLDS;
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reg IOUDS;
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reg IOWE;
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// Outputs
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wire nAS;
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wire nLDS;
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wire nUDS;
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wire nVMA;
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wire nAoutOE;
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wire nDoutOE;
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wire ALE0;
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wire nDinLE;
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wire IOACT;
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wire IOBERR;
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// Instantiate the Unit Under Test (UUT)
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IOBM uut (
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.C16M(C16M),
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.C8M(C8M),
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.E(E),
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.nAS(nAS),
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.nLDS(nLDS),
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.nUDS(nUDS),
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.nVMA(nVMA),
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.nDTACK(nDTACK),
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.nVPA(nVPA),
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.nBERR(nBERR),
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.nRES(nRES),
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.nAoutOE(nAoutOE),
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.nDoutOE(nDoutOE),
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.ALE0(ALE0),
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.nDinLE(nDinLE),
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.IOACT(IOACT),
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.IOBERR(IOBERR),
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.IOREQ(IOREQ),
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.IOLDS(IOLDS),
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.IOUDS(IOUDS),
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.IOWE(IOWE)
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);
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initial begin
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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C16M = 0; #30; C16M = 1; #30; C16M = 0; #30; C16M = 1; #30;
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end
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initial begin
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C8M = 0; #50; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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C8M = 0; #60; C8M = 1; #60; C8M = 0; #60; C8M = 1; #60;
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end
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initial begin
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E = 0; #130; E = 1; #480; E = 0; #720; E = 1; #480;
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E = 0; #720; E = 1; #480; E = 0; #720; E = 1; #480;
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E = 0; #720; E = 1; #480; E = 0; #720; E = 1; #480;
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E = 0; #720; E = 1; #480; E = 0; #720; E = 1; #480;
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end
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initial begin
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nRES = 1;
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nBERR = 1;
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nDTACK = 1;
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nVPA = 1;
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#320;
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nDTACK = 0;
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#300;
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nDTACK = 1;
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#180;
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nDTACK = 0;
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#300;
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nDTACK = 1;
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#180;
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nBERR = 0;
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#300;
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nBERR = 1;
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#180;
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nVPA = 0;
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#1200;
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nBERR = 1;
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#220;
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nRES = 0;
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#300;
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nRES = 1;
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end
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initial begin
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IOREQ = 0;
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IOLDS = 0;
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IOUDS = 0;
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IOWE = 0;
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#195;
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IOREQ = 1;
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IOWE = 0;
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#40;
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IOLDS = 1;
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IOUDS = 1;
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#200;
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IOREQ = 0;
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#240;
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IOREQ = 1;
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IOWE = 1;
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#40;
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IOLDS = 1;
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IOUDS = 1;
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#200;
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IOREQ = 0;
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#240;
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IOREQ = 1;
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IOWE = 0;
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#40;
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IOLDS = 1;
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IOUDS = 1;
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#200;
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IOREQ = 0;
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#240;
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IOREQ = 1;
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IOWE = 0;
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#40;
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IOLDS = 1;
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IOUDS = 1;
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#200;
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IOREQ = 0;
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#240;
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IOREQ = 1;
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IOWE = 0;
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#40;
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IOLDS = 1;
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IOUDS = 1;
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#1300;
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IOREQ = 0;
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#240;
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end
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endmodule
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