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cr2032_to_12aa.kicad_pcb
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cr2032_to_12aa.kicad_pcb
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|
||||
(xy 0.908931 -2.664798) (xy 0.909094 -2.66495) (xy 0.912939 -2.664592) (xy 0.910159 -2.658806)
|
||||
(xy 0.912389 -2.642657) (xy 0.920822 -2.63698) (xy 0.935822 -2.63948) (xy 0.939881 -2.654562)
|
||||
(xy 0.930686 -2.670917) (xy 0.928129 -2.672714) (xy 0.925466 -2.68712) (xy 0.933105 -2.712153)
|
||||
(xy 0.946488 -2.737837) (xy 0.961061 -2.7542) (xy 0.96613 -2.7559) (xy 0.977204 -2.747656)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 0.5842 -2.01295) (xy 0.57785 -2.0066) (xy 0.5715 -2.01295) (xy 0.57785 -2.0193)
|
||||
(xy 0.5842 -2.01295)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 0.833966 -2.484967) (xy 0.832223 -2.477417) (xy 0.8255 -2.4765) (xy 0.815046 -2.481147)
|
||||
(xy 0.817033 -2.484967) (xy 0.832105 -2.486487) (xy 0.833966 -2.484967)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 0.9779 -2.53365) (xy 0.97155 -2.5273) (xy 0.9652 -2.53365) (xy 0.97155 -2.54)
|
||||
(xy 0.9779 -2.53365)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 0.9017 -2.54635) (xy 0.89535 -2.54) (xy 0.889 -2.54635) (xy 0.89535 -2.5527)
|
||||
(xy 0.9017 -2.54635)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 1.107945 -2.747832) (xy 1.111359 -2.731981) (xy 1.1049 -2.72415) (xy 1.097358 -2.708939)
|
||||
(xy 1.099092 -2.704223) (xy 1.095573 -2.694187) (xy 1.08585 -2.6924) (xy 1.071476 -2.687353)
|
||||
(xy 1.071841 -2.681817) (xy 1.068223 -2.672345) (xy 1.061325 -2.671234) (xy 1.048077 -2.681196)
|
||||
(xy 1.04722 -2.691342) (xy 1.059092 -2.70912) (xy 1.06801 -2.711736) (xy 1.081267 -2.722006)
|
||||
(xy 1.082118 -2.733961) (xy 1.084761 -2.752441) (xy 1.090893 -2.7559) (xy 1.107945 -2.747832)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 1.0033 -2.74955) (xy 0.99695 -2.7432) (xy 0.9906 -2.74955) (xy 0.99695 -2.7559)
|
||||
(xy 1.0033 -2.74955)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 1.0287 -2.76225) (xy 1.02235 -2.7559) (xy 1.016 -2.76225) (xy 1.02235 -2.7686)
|
||||
(xy 1.0287 -2.76225)) (layer Eco1.User) (width 0.01))
|
||||
(fp_poly (pts (xy 1.367615 -2.925497) (xy 1.36525 -2.921) (xy 1.353283 -2.908872) (xy 1.35105 -2.9083)
|
||||
(xy 1.350184 -2.916504) (xy 1.35255 -2.921) (xy 1.364516 -2.933129) (xy 1.366749 -2.9337)
|
||||
(xy 1.367615 -2.925497)) (layer Eco1.User) (width 0.01))
|
||||
)
|
||||
|
||||
(module Battery:Logo (layer F.Cu) (tedit 60C2B3DB) (tstamp 60C2B454)
|
||||
(at 0 0)
|
||||
(fp_text reference REF** (at 0 0.5) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value Logo (at 0 -0.5) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
)
|
||||
|
||||
(module Battery:BatteryHolder_LINX_CR2025-CR2032_BAT-HLD-001-THM (layer F.Cu) (tedit 60C2A0CC) (tstamp 60C2A31D)
|
||||
(at 108 101)
|
||||
(fp_text reference REF** (at -6.055 -10.389) (layer F.SilkS)
|
||||
(effects (font (size 1.4 1.4) (thickness 0.015)))
|
||||
)
|
||||
(fp_text value BatteryHolder_LINX_CR2025-CR2032_BAT-HLD-001-THM (at 6.391 10.389) (layer F.Fab)
|
||||
(effects (font (size 1.4 1.4) (thickness 0.015)))
|
||||
)
|
||||
(fp_arc (start -0.07051 14.756402) (end 0 6) (angle 39.0435) (layer F.Fab) (width 0.127))
|
||||
(fp_arc (start 0.07051 14.756402) (end -5.5 8) (angle 39.0435) (layer F.Fab) (width 0.127))
|
||||
(fp_line (start -10.55 -7.5) (end 10.55 -7.5) (layer F.Fab) (width 0.127))
|
||||
(fp_line (start 10.55 -7.5) (end 10.55 8) (layer F.Fab) (width 0.127))
|
||||
(fp_line (start 10.55 8) (end 5.5 8) (layer F.Fab) (width 0.127))
|
||||
(fp_line (start -5.5 8) (end -10.55 8) (layer F.Fab) (width 0.127))
|
||||
(fp_line (start -10.55 8) (end -10.55 -7.5) (layer F.Fab) (width 0.127))
|
||||
(fp_line (start -10.55 -2.97) (end -10.55 -7.5) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -10.55 -7.5) (end -6 -7.5) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start 6 -7.5) (end 10.55 -7.5) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start 10.55 -7.5) (end 10.55 -2.97) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -10.55 3.07) (end -10.55 8) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -10.55 8) (end -5.5 8) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start 5.5 8) (end 10.55 8) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start 10.55 8) (end 10.55 3.07) (layer F.SilkS) (width 0.127))
|
||||
(fp_line (start -11.8 -9.15) (end 11.8 -9.15) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 11.8 -9.15) (end 11.8 9.15) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 11.8 9.15) (end -11.8 9.15) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -11.8 9.15) (end -11.8 -9.15) (layer F.CrtYd) (width 0.05))
|
||||
(pad N smd circle (at 0 0) (size 17.8 17.8) (layers F.Cu F.Mask))
|
||||
(pad P1 thru_hole circle (at -10.4 -1.5) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad P2 thru_hole circle (at -10.4 1.6) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad P3 thru_hole circle (at 10.4 1.6) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
|
||||
(pad P4 thru_hole circle (at 10.4 -1.5) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
|
||||
(model "E:/projects/Kicad 3d/BAT-HLD-001-THM--3DModel-STEP-56544.STEP"
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz -90 0 180))
|
||||
)
|
||||
)
|
||||
|
||||
(module "Battery:0.5 AA to CR2032 pads" (layer F.Cu) (tedit 60C2A6F8) (tstamp 60C2A773)
|
||||
(at 108 112)
|
||||
(fp_text reference REF** (at 0 0.5) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "0.5 AA to CR2032 pads" (at 0 -0.5) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(pad 2 thru_hole oval (at 13 0) (size 2 19) (drill oval 1 18) (layers *.Cu *.Mask))
|
||||
(pad 1 thru_hole oval (at -13 0) (size 2 19) (drill oval 1 18) (layers *.Cu *.Mask))
|
||||
)
|
||||
|
||||
(gr_text + (at 117 108.5) (layer B.SilkS)
|
||||
(effects (font (size 3 3) (thickness 0.3)) (justify mirror))
|
||||
)
|
||||
(gr_text - (at 99.5 108.5) (layer B.SilkS)
|
||||
(effects (font (size 3 3) (thickness 0.3)) (justify mirror))
|
||||
)
|
||||
(gr_line (start 95 97.5) (end 97.5 97.5) (layer Edge.Cuts) (width 0.05) (tstamp 60C2B17C))
|
||||
(gr_line (start 118.5 97.5) (end 121 97.5) (layer Edge.Cuts) (width 0.05) (tstamp 60C2B17F))
|
||||
(gr_arc (start 101.5 97.5) (end 101.5 93.5) (angle -90) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_arc (start 114.5 97.5) (end 118.5 97.5) (angle -90) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_text + (at 117 108.5) (layer F.SilkS)
|
||||
(effects (font (size 3 3) (thickness 0.3)))
|
||||
)
|
||||
(gr_text - (at 99.5 108.5) (layer F.SilkS)
|
||||
(effects (font (size 3 3) (thickness 0.3)))
|
||||
)
|
||||
(gr_line (start 108 113) (end 121 113) (layer Edge.Cuts) (width 0.05) (tstamp 60C2A89B))
|
||||
(gr_line (start 121 97.5) (end 121 113) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 95 113) (end 95 97.5) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 108 113) (end 95 113) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 101.5 93.5) (end 114.5 93.5) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_arc (start 108 101) (end 108 91) (angle -38.65980825) (layer F.SilkS) (width 0.12))
|
||||
(gr_arc (start 108 101) (end 108 111) (angle -36.86989765) (layer F.SilkS) (width 0.12))
|
||||
|
||||
(segment (start 118.4 99.5) (end 116 99.5) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 116.6 102.6) (end 118.4 102.6) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 120.25 111.25) (end 120.64999 111.64999) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 97.6 102.6) (end 100.1 102.6) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 97.6 99.5) (end 100.25 99.5) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 108 101) (end 101 108) (width 2) (layer F.Cu) (net 0))
|
||||
(segment (start 101 108) (end 96.22501 108) (width 2) (layer F.Cu) (net 0))
|
||||
(segment (start 108 99.5) (end 110 99.5) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 114.8 108) (end 109.4 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 119.5 108) (end 114.8 108) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 108 102.5) (end 107.9 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 108 99.5) (end 108 102.5) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 107.9 102.6) (end 109.4 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 113.5 99.5) (end 113.5 102.2) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 113.5 102.2) (end 113.9 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 108 99.5) (end 113.5 99.5) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 113.9 102.6) (end 118.4 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 113.5 99.5) (end 118.4 99.5) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 109.4 102.6) (end 113.9 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 103 102.2) (end 103.4 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 97.6 99.5) (end 103 99.5) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 103 99.5) (end 108 99.5) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 103.4 102.6) (end 107.9 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 103 99.5) (end 103 102.2) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 97.6 102.6) (end 103.4 102.6) (width 2) (layer B.Cu) (net 0))
|
||||
(segment (start 118.4 99.5) (end 118.4 102.6) (width 1) (layer B.Cu) (net 0))
|
||||
(segment (start 97.6 99.5) (end 97.6 102.6) (width 1) (layer B.Cu) (net 0))
|
||||
|
||||
)
|
245
cr2032_to_12aa.pro
Normal file
245
cr2032_to_12aa.pro
Normal file
@ -0,0 +1,245 @@
|
||||
update=6/10/2021 8:21:26 PM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=1
|
||||
TrackWidth3=2
|
||||
TrackWidth4=3
|
||||
TrackWidth5=4
|
||||
TrackWidth6=5
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
ViaDiameter2=6.7
|
||||
ViaDrill2=6.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.05
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
4
cr2032_to_12aa.sch
Normal file
4
cr2032_to_12aa.sch
Normal file
@ -0,0 +1,4 @@
|
||||
EESchema Schematic File Version 2
|
||||
EELAYER 25 0
|
||||
EELAYER END
|
||||
$EndSCHEMATC
|
160
cr2032_to_12aa_v2.kicad_pcb
Normal file
160
cr2032_to_12aa_v2.kicad_pcb
Normal file
@ -0,0 +1,160 @@
|
||||
(kicad_pcb (version 20171130) (host pcbnew "(5.1.6)-1")
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
(drawings 12)
|
||||
(tracks 7)
|
||||
(zones 0)
|
||||
(modules 1)
|
||||
(nets 1)
|
||||
)
|
||||
|
||||
(page A4)
|
||||
(layers
|
||||
(0 F.Cu signal)
|
||||
(31 B.Cu signal)
|
||||
(32 B.Adhes user)
|
||||
(33 F.Adhes user)
|
||||
(34 B.Paste user)
|
||||
(35 F.Paste user)
|
||||
(36 B.SilkS user)
|
||||
(37 F.SilkS user)
|
||||
(38 B.Mask user)
|
||||
(39 F.Mask user)
|
||||
(40 Dwgs.User user)
|
||||
(41 Cmts.User user)
|
||||
(42 Eco1.User user)
|
||||
(43 Eco2.User user)
|
||||
(44 Edge.Cuts user)
|
||||
(45 Margin user)
|
||||
(46 B.CrtYd user)
|
||||
(47 F.CrtYd user)
|
||||
(48 B.Fab user)
|
||||
(49 F.Fab user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(last_trace_width 0.25)
|
||||
(trace_clearance 0.2)
|
||||
(zone_clearance 0.508)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.2)
|
||||
(via_size 0.8)
|
||||
(via_drill 0.4)
|
||||
(via_min_size 0.4)
|
||||
(via_min_drill 0.3)
|
||||
(user_via 6.7 6.3)
|
||||
(uvia_size 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
|
||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(edge_width 0.05)
|
||||
(segment_width 0.2)
|
||||
(pcb_text_width 0.3)
|
||||
(pcb_text_size 1.5 1.5)
|
||||
(mod_edge_width 0.12)
|
||||
(mod_text_size 1 1)
|
||||
(mod_text_width 0.15)
|
||||
(pad_size 1.524 1.524)
|
||||
(pad_drill 0.762)
|
||||
(pad_to_mask_clearance 0.05)
|
||||
(aux_axis_origin 0 0)
|
||||
(visible_elements FFFFFF7F)
|
||||
(pcbplotparams
|
||||
(layerselection 0x010fc_ffffffff)
|
||||
(usegerberextensions true)
|
||||
(usegerberattributes false)
|
||||
(usegerberadvancedattributes false)
|
||||
(creategerberjobfile false)
|
||||
(excludeedgelayer true)
|
||||
(linewidth 0.100000)
|
||||
(plotframeref false)
|
||||
(viasonmask false)
|
||||
(mode 1)
|
||||
(useauxorigin false)
|
||||
(hpglpennumber 1)
|
||||
(hpglpenspeed 20)
|
||||
(hpglpendiameter 15.000000)
|
||||
(psnegative false)
|
||||
(psa4output false)
|
||||
(plotreference true)
|
||||
(plotvalue false)
|
||||
(plotinvisibletext false)
|
||||
(padsonsilk false)
|
||||
(subtractmaskfromsilk true)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 0)
|
||||
(scaleselection 1)
|
||||
(outputdirectory ""))
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
|
||||
(net_class Default "This is the default net class."
|
||||
(clearance 0.2)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.8)
|
||||
(via_drill 0.4)
|
||||
(uvia_dia 0.3)
|
||||
(uvia_drill 0.1)
|
||||
)
|
||||
|
||||
(module Battery:BatteryHolder_AdamTech_CR2032_BH-68A-1 (layer F.Cu) (tedit 60C17648) (tstamp 60C1D1E0)
|
||||
(at 108 100 270)
|
||||
(fp_text reference REF** (at -3 -12.7 90) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value BatteryHolder_AdamTech_CR2032_BH-68A-1 (at -0.5 13.3 90) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user + (at 7.3 -0.1 90) (layer F.SilkS)
|
||||
(effects (font (size 2 2) (thickness 0.15)))
|
||||
)
|
||||
(fp_arc (start -2.9 0) (end 7.299999 -3.899999) (angle -318.1509965) (layer B.CrtYd) (width 0.12))
|
||||
(fp_arc (start -2.9 0) (end 7.299999 -3.899999) (angle -318.1509965) (layer F.CrtYd) (width 0.12))
|
||||
(fp_arc (start -2.9 0) (end -13.099999 3.799999) (angle -138.6426696) (layer F.SilkS) (width 0.12))
|
||||
(fp_arc (start -2.9 0) (end 7.299999 -3.899999) (angle -138.6426696) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 7.3 -3.9) (end 7.299999 -3.899999) (layer B.CrtYd) (width 0.12))
|
||||
(fp_line (start 7.299999 -3.899999) (end 7.3 -3.9) (layer B.CrtYd) (width 0.12))
|
||||
(fp_line (start 11.5 -3.9) (end 7.299999 -3.899999) (layer B.CrtYd) (width 0.12))
|
||||
(fp_line (start 11.5 3.9) (end 11.5 -3.9) (layer B.CrtYd) (width 0.12))
|
||||
(fp_line (start 7.299999 3.9) (end 11.5 3.9) (layer B.CrtYd) (width 0.12))
|
||||
(fp_line (start 11.5 -3.9) (end 7.3 -3.9) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 11.5 3.9) (end 11.5 -3.9) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 7.3 3.9) (end 11.5 3.9) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -13.1 -3.8) (end -13.1 3.8) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 11.5 -3.9) (end 7.3 -3.9) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 11.5 3.9) (end 11.5 -3.9) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 7.3 3.9) (end 11.5 3.9) (layer F.SilkS) (width 0.12))
|
||||
(pad 2 thru_hole circle (at -10 0 270) (size 2 2) (drill 1.1) (layers *.Cu *.Mask))
|
||||
(pad 1 thru_hole rect (at 10 0 270) (size 2 2) (drill 1.1) (layers *.Cu *.Mask))
|
||||
)
|
||||
|
||||
(gr_text - (at 99 108) (layer F.SilkS)
|
||||
(effects (font (size 3 3) (thickness 0.3)))
|
||||
)
|
||||
(gr_text + (at 117 108) (layer F.SilkS)
|
||||
(effects (font (size 3 3) (thickness 0.3)))
|
||||
)
|
||||
(gr_arc (start 108 97) (end 119 97) (angle -180) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 119 97) (end 121 97) (layer Edge.Cuts) (width 0.05) (tstamp 60C1D343))
|
||||
(gr_line (start 95 97) (end 97 97) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 95 102) (end 95 97) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 96 105) (end 95 102) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 120 105) (end 121 102) (layer Edge.Cuts) (width 0.05) (tstamp 60C1D330))
|
||||
(gr_line (start 120 112) (end 120 105) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 96 112) (end 96 105) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 120 112) (end 96 112) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 121 97) (end 121 102) (layer Edge.Cuts) (width 0.05))
|
||||
|
||||
(via (at 123 105) (size 6.7) (drill 6.3) (layers F.Cu B.Cu) (net 0))
|
||||
(via (at 93 105) (size 6.7) (drill 6.3) (layers F.Cu B.Cu) (net 0))
|
||||
(segment (start 108 90) (end 108 94) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 108 94) (end 97 105) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 97 105) (end 96.368942 105) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 108 110) (end 113 105) (width 0.25) (layer B.Cu) (net 0))
|
||||
(segment (start 113 105) (end 119.631058 105) (width 0.25) (layer B.Cu) (net 0))
|
||||
|
||||
)
|
BIN
cr2032_to_12aa_v2.zip
Normal file
BIN
cr2032_to_12aa_v2.zip
Normal file
Binary file not shown.
Loading…
Reference in New Issue
Block a user