mirror of
https://github.com/Spritetm/minimacplus.git
synced 2024-11-24 23:32:22 +00:00
IT BOOTS!!!! Well, os6 images, anyway.
This commit is contained in:
Jeroen Domburg
parent
cec9a2763d
commit
7732b2b049
46
emu.c
46
emu.c
@ -20,6 +20,24 @@ unsigned char *macRam;
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int rom_remap, video_remap=0, audio_remap=0;
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void m68k_instruction() {
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unsigned int pc=m68k_get_reg(NULL, M68K_REG_PC);
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int ok=0;
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if (pc < 0x400000) {
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if (rom_remap) {
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ok=1;
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}
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} else if (pc >= 0x400000 && pc<0x500000) {
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ok=1;
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}
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if (!ok) return;
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pc&=0x1FFFF;
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if (pc==0x7DCC) printf("Mon: SCSIReadSectors\n");
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if (pc==0x7E4C) printf("Mon: SCSIReadSectors exit OK\n");
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if (pc==0x7E56) printf("Mon: SCSIReadSectors exit FAIL\n");
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}
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unsigned int m68k_read_memory_8(unsigned int address) {
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unsigned int ret;
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unsigned int pc=m68k_get_reg(NULL, M68K_REG_PC);
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@ -35,6 +53,7 @@ unsigned int m68k_read_memory_8(unsigned int address) {
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int romAdr=address-0x400000;
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if (romAdr>=TME_ROMSIZE) {
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printf("PC %x:Huh? Read from ROM mirror (%x)\n", pc, address);
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ret=(address>>12); // ROM checks for same contents at 20000 and 40000 to determine if SCSI is present
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} else {
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ret=macRom[romAdr&(TME_ROMSIZE-1)];
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}
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@ -43,7 +62,7 @@ unsigned int m68k_read_memory_8(unsigned int address) {
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} else if (address >= 0xc00000 && address < 0xe00000) {
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ret=iwmRead((address>>9)&0xf);
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} else if (address >= 0x580000 && address < 0x600000) {
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ret=ncrRead((address>>4)&0x7, (address>>7)&1);
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ret=ncrRead((address>>4)&0x7, (address>>9)&1);
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} else {
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printf("PC %x: Read from %x\n", pc, address);
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ret=0xff;
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@ -54,8 +73,8 @@ unsigned int m68k_read_memory_8(unsigned int address) {
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void m68k_write_memory_8(unsigned int address, unsigned int value) {
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unsigned int pc=m68k_get_reg(NULL, M68K_REG_PC);
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if (address < 0x400000 && !rom_remap) {
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macRam[address & (TME_RAMSIZE-1)]=value;
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if (address < 0x400000) {
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if (!rom_remap) macRam[address & (TME_RAMSIZE-1)]=value;
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} else if (address >= 0x600000 && address < 0xA00000) {
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macRam[(address-0x600000) & (TME_RAMSIZE-1)]=value;
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} else if (address >= 0xE80000 && address < 0xf00000) {
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@ -63,7 +82,7 @@ void m68k_write_memory_8(unsigned int address, unsigned int value) {
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} else if (address >= 0xc00000 && address < 0xe00000) {
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iwmWrite((address>>9)&0xf, value);
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} else if (address >= 0x580000 && address < 0x600000) {
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ncrWrite((address>>4)&0x7, (address>>7)&1, value);
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ncrWrite((address>>4)&0x7, (address>>9)&1, value);
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} else {
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printf("PC %x: Write to %x: %x\n", pc, address, value);
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}
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@ -83,27 +102,28 @@ void printFps() {
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oldtv.tv_usec=tv.tv_usec;
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}
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#define GRAN 100
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void tmeStartEmu(void *rom) {
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int ca1=0, ca2=0;
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int x, frame=0;
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macRom=rom;
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macRam=malloc(TME_RAMSIZE);
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for (int x=0; x<TME_RAMSIZE; x++) macRam[x]=0xaa;
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for (int x=0; x<TME_RAMSIZE; x++) macRam[x]=0;
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rom_remap=1;
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SCSIDevice *hd=hdCreate("hd.img");
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ncrRegisterDevice(6, hd);
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viaClear(VIA_PORTA, 0x7F);
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viaSet(VIA_PORTA, 0x80);
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viaClear(VIA_PORTA, 0xFF);
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viaSet(VIA_PORTB, (1<<3));
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m68k_init();
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m68k_set_cpu_type(M68K_CPU_TYPE_68000);
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m68k_pulse_reset();
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dispInit();
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while(1) {
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for (x=0; x<8000000/60; x+=GRAN) {
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m68k_execute(GRAN);
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viaStep(GRAN);
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for (x=0; x<8000000/60; x+=10) {
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m68k_execute(10);
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viaStep(1); //should run at 783.36KHz
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}
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dispDraw(&macRam[video_remap?TME_SCREENBUF_ALT:TME_SCREENBUF]);
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frame++;
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@ -150,16 +170,12 @@ void m68k_write_memory_16(unsigned int address, unsigned int value) {
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m68k_write_memory_8(address+1, value&0xff);
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}
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void m68k_int_ack(int irq) {
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//Mac has level interrupts; no ack. Fake by raising the irq as soon as
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//it's serviced.
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m68k_set_irq(irq);
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}
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void viaCbPortAWrite(unsigned int val) {
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int oldRomRemap=rom_remap;
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video_remap=(val&(1<<6))?1:0;
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rom_remap=(val&(1<<4))?1:0;
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audio_remap=(val&(1<<3))?1:0;
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if (oldRomRemap!=rom_remap) printf("ROM REMAP %d\n", rom_remap);
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}
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void viaCbPortBWrite(unsigned int val) {
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6
hd.c
6
hd.c
@ -26,14 +26,15 @@ const uint8_t inq_resp[95]={
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static int hdScsiCmd(SCSITransferData *data, unsigned int cmd, unsigned int len, unsigned int lba, void *arg) {
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int ret=0;
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HdPriv *hd=(HdPriv*)arg;
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for (int x=0; x<32; x++) printf("%02X ", data->cmd[x]);
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printf("\n");
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// for (int x=0; x<32; x++) printf("%02X ", data->cmd[x]);
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// printf("\n");
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if (cmd==0x8 || cmd==0x28) { //read
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fseek(hd->f, lba*512, SEEK_SET);
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fread(data->data, 512, len, hd->f);
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printf("HD: Read %d bytes.\n", len*512);
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ret=len*512;
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} else if (cmd==0x12) { //inquiry
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printf("HD: Inquery\n");
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memcpy(data->data, inq_resp, sizeof(inq_resp));
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return 95;
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} else if (cmd==0x25) { //read capacity
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@ -47,6 +48,7 @@ static int hdScsiCmd(SCSITransferData *data, unsigned int cmd, unsigned int len,
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data->data[6]=2; //512
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data->data[7]=0;
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ret=8;
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printf("HD: Read capacity (%d)\n", lbacnt);
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} else {
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printf("********** hdScsiCmd: unrecognized command %x\n", cmd);
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}
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@ -87,7 +87,7 @@
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* If off, all interrupts will be autovectored and all interrupt requests will
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* auto-clear when the interrupt is serviced.
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*/
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#define M68K_EMULATE_INT_ACK OPT_ON
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#define M68K_EMULATE_INT_ACK OPT_OFF
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#define M68K_INT_ACK_CALLBACK(A) m68k_int_ack(A)
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@ -131,8 +131,8 @@
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/* If ON, CPU will call the instruction hook callback before every
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* instruction.
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*/
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#define M68K_INSTRUCTION_HOOK OPT_OFF
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#define M68K_INSTRUCTION_CALLBACK() your_instruction_hook_function()
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#define M68K_INSTRUCTION_HOOK OPT_SPECIFY_HANDLER
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#define M68K_INSTRUCTION_CALLBACK() m68k_instruction()
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/* If ON, the CPU will emulate the 4-byte prefetch queue of a real 68000 */
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60
ncr.c
60
ncr.c
@ -91,19 +91,25 @@ static void parseScsiCmd(int isRead) {
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uint8_t *buf=ncr.data.cmd;
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int cmd=buf[0];
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int lba, len, ctrl;
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if (cmd<0x20) {
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int group=(cmd>>5);
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if (group==0) { //6-byte command
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lba=buf[3]|(buf[2]<<8)|((buf[1]&0x1F)<<16);
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len=buf[4];
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if (len==0) len=256;
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ctrl=buf[5];
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} else if (cmd<0x60) {
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for (int x=0; x<6; x++) printf("%02X ", buf[x]);
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printf("\n");
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} else if (group==1 || group==2) { //10-byte command
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lba=buf[5]|(buf[4]<<8)|(buf[3]<<16)|(buf[2]<<24);
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len=buf[8]|(buf[7]<<8);
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ctrl=buf[9];
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for (int x=0; x<10; x++) printf("%02X ", buf[x]);
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printf("\n");
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} else {
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printf("SCSI: UNSUPPORTED CMD %x\n", cmd);
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return;
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}
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printf("SCSI: CMD %x LBA %x LEN %x CTRL %x\n", cmd, lba, len, ctrl);
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// printf("SCSI: CMD %x LBA %x LEN %x CTRL %x\n", cmd, lba, len, ctrl);
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if (ncr.dev[ncr.selected]) {
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ncr.datalen=ncr.dev[ncr.selected]->scsiCmd(&ncr.data, cmd, len, lba, ncr.dev[ncr.selected]->arg);
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}
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@ -112,21 +118,22 @@ static void parseScsiCmd(int isRead) {
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unsigned int ncrRead(unsigned int addr, unsigned int dack) {
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unsigned int pc=m68k_get_reg(NULL, M68K_REG_PC);
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unsigned int ret=0;
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if (addr==0) {
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if (ncr.mode&MODE_DMA) {
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if (ncr.tcr&TCR_IO) {
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if (ncr.bufpos!=ncr.bufmax) ncr.din=ncr.buf[ncr.bufpos++];
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// printf("Send next byte dma %d/%d\n", ncr.bufpos, ncr.datalen);
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}
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if (ncr.mode&MODE_DMA && dack) {
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if (ncr.tcr&TCR_IO) {
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if (ncr.bufpos!=ncr.bufmax) ncr.din=ncr.buf[ncr.bufpos++];
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// printf("Send next byte dma %d/%d\n", ncr.bufpos, ncr.datalen);
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}
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}
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if (addr==0) {
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ret=ncr.din;
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// printf("READ BYTE %02X dack=%d\n", ret, dack);
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} else if (addr==1) {
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// /rst s s /ack /bsy /sel /atn databus
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ret=ncr.inicmd;
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if (ncr.state==ST_ARB) {
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ret|=INIR_AIP;
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//We don't have a timer... just set arb to be done right now.
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ncr.state=ST_ARBDONE;
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if (ncr.dev[ncr.selected]) ncr.state=ST_ARBDONE;
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}
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} else if (addr==2) {
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ret=ncr.mode;
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@ -136,8 +143,11 @@ unsigned int ncrRead(unsigned int addr, unsigned int dack) {
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ret=0;
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if (ncr.inicmd&INI_RST) ret|=SSR_RST;
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if (ncr.inicmd&INI_BSY) ret|=SSR_BSY;
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if (ncr.inicmd&INI_SEL) ret|=SSR_SEL;
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if (ncr.dev[ncr.selected] && (ncr.state==ST_SELDONE || ncr.state==ST_DATA)) {
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// if (ncr.inicmd&INI_SEL) ret|=SSR_SEL;
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if (ncr.tcr&TCR_IO) ret|=SSR_IO;
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if (ncr.tcr&TCR_CD) ret|=SSR_CD;
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if (ncr.tcr&TCR_MSG) ret|=SSR_MSG;
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if (ncr.dev[ncr.selected] && (ncr.state==ST_SELDONE)) {
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// ret|=SSR_REQ;
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ret|=SSR_BSY;
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}
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@ -146,22 +156,24 @@ unsigned int ncrRead(unsigned int addr, unsigned int dack) {
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ret|=SSR_REQ;
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}
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}
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if (ncr.state==ST_ARB) return 0x40;
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} else if (addr==5) {
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ret=BSR_PHASEMATCH;
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if (ncr.mode&MODE_DMA) {
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ret|=BSR_DMARQ;
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if (ncr.bufpos<ncr.datalen) {
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} else {
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if (ncr.bufpos>=ncr.datalen) {
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printf("End of DMA reached: bufpos %d datalen %d\n", ncr.bufpos, ncr.datalen);
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ret|=BSR_EODMA;
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}
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}
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} else if (addr==6) {
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ret=ncr.din;
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// printf("READ BYTE (NCR addr6) %02X dack=%d\n", ret, dack);
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} else if (addr==7) {
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printf("!UNIMPLEMENTED!\n");
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}
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// printf("%08X SCSI: read %d (%s) val %x (dack %d), cur st %s\n", pc, addr, regNamesR[addr], ret, dack, stateNames[ncr.state]);
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// printf("%08X SCSI: (dack %d), cur st %s read %s (reg %d) = %x \n",
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// pc, dack, stateNames[ncr.state], regNamesR[addr], addr, ret);
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return ret;
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}
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@ -169,16 +181,20 @@ unsigned int ncrRead(unsigned int addr, unsigned int dack) {
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void ncrWrite(unsigned int addr, unsigned int dack, unsigned int val) {
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unsigned int pc=m68k_get_reg(NULL, M68K_REG_PC);
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if (addr==0) {
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if (ncr.mode&MODE_DMA && dack) {
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printf("UNSUPPORTED: dma write\n");
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}
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ncr.dout=val;
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ncr.din=val;
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} else if (addr==1) {
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if ((val&INI_SEL) && (val&INI_DBUS) && (val&INI_BSY) && ncr.state==ST_ARBDONE) {
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if ((val&INI_SEL) && (val&INI_DBUS) && (val&INI_BSY) && (ncr.state==ST_ARBDONE || ncr.state==ST_ARB)) {
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ncr.state=ST_SELECT;
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if (ncr.dout==0x81) ncr.selected=0;
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if (ncr.dout==0x82) ncr.selected=1;
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if (ncr.dout==0x84) ncr.selected=2;
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if (ncr.dout==0x88) ncr.selected=3;
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if (ncr.dout==0x80) ncr.selected=4;
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if (ncr.dout==0x90) ncr.selected=5;
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if (ncr.dout==0x90) ncr.selected=4;
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if (ncr.dout==0xA0) ncr.selected=5;
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if (ncr.dout==0xC0) ncr.selected=6;
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printf("Selected dev: %d (val %x)\n", ncr.selected, ncr.dout);
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}
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@ -212,6 +228,7 @@ void ncrWrite(unsigned int addr, unsigned int dack, unsigned int val) {
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ncr.inicmd|=val&0x9f;
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} else if (addr==2) {
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ncr.mode=val;
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if (((val&1)==0) && ncr.state==ST_ARB) ncr.state=ST_IDLE;
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if (val&1) ncr.state=ST_ARB;
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} else if (addr==3) {
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if (ncr.tcr!=(val&0xf)) {
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@ -224,6 +241,9 @@ void ncrWrite(unsigned int addr, unsigned int dack, unsigned int val) {
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//Start of data in phase
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parseScsiCmd(0);
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}
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if ((ncr.tcr&0x7)==TCR_IO) {
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printf("Data Out finished: Host read %d/%d bytes.\n", ncr.bufpos, ncr.datalen);
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}
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ncr.bufpos=0;
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int type=val&(TCR_MSG|TCR_CD);
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if (type==0) {
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@ -245,7 +265,7 @@ void ncrWrite(unsigned int addr, unsigned int dack, unsigned int val) {
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}
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ncr.tcr=val&0xf;
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} else if (addr==4) {
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printf("!UNIMPLEMENTED! selenable, todo\n");
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if (val!=0) printf("!UNIMPLEMENTED! selenable (val %x), todo\n", val);
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} else if (addr==5) {
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printf("!UNIMPLEMENTED!\n");
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} else if (addr==6) {
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@ -253,7 +273,7 @@ void ncrWrite(unsigned int addr, unsigned int dack, unsigned int val) {
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} else if (addr==7) {
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//Start DMA. We already do this using the mode bit.
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}
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// printf("%08X SCSI: write %d (%s) val %x (dack %d), cur state %s\n", pc, addr, regNamesW[addr], val, dack, stateNames[ncr.state]);
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printf("%08X SCSI: (dack %d), cur state %s %02x to %s (reg %d)\n", pc, dack, stateNames[ncr.state], val, regNamesW[addr], addr);
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}
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void ncrRegisterDevice(int id, SCSIDevice* dev){
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4
ncr.h
4
ncr.h
@ -3,9 +3,9 @@
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#include <stdint.h>
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typedef struct {
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uint8_t cmd[128];
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uint8_t cmd[256];
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uint8_t data[1024*1024];
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uint8_t msg[2];
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uint8_t msg[128];
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int cmdlen;
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int datalen;
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int msglen;
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7
via.c
7
via.c
@ -55,13 +55,14 @@ void viaClear(int no, int mask) {
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void viaStep(int clockcycles) {
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while(clockcycles--) {
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if ((via.timer2!=0) || (via.acr&(1<<6))) via.timer2--;
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if (via.timer1==0) {
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if (via.timer1==1) {
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via.ifr|=IFR_T1;
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via.timer1=via.latch1;
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}
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if ((via.timer2!=0) || (via.acr&(1<<5))) via.timer2--;
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if ((via.timer1!=0) || (via.acr&(1<<6))) via.timer1--;
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via.timer2--;
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if (via.timer2==0) {
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//Actually shouldn't be set when timer2 gets 0 a 2nd time... ahwell.
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via.ifr|=IFR_T2;
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}
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}
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