diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..e1c0d0a
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,53 @@
+# Object files
+*.o
+
+# Libraries
+*.lib
+*.a
+
+# Shared objects (inc. Windows DLLs)
+*.dll
+*.so
+*.so.*
+*.dylib
+
+# Executables
+*.exe
+*.out
+*.app
+
+# http://www.gnu.org/software/automake
+Makefile.in
+
+# http://www.gnu.org/software/autoconf
+/autom4te.cache
+/aclocal.m4
+/compile
+/configure
+/depcomp
+/install-sh
+/missing
+
+# OS X
+.DS_Store
+.AppleDouble
+.LSOverride
+Icon
+
+# Thumbnails
+._*
+
+# Files that might appear on external disk
+.Spotlight-V100
+.Trashes
+
+# Subversion
+.svn/
+
+# Linux
+.*
+!.gitignore
+*~
+
+# Project specific
+/build
diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 0000000..0d3f5d7
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,6 @@
+# The following lines of boilerplate have to be in your project's
+# CMakeLists in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.5)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(quack)
diff --git a/EDA/.gitignore b/EDA/.gitignore
new file mode 100644
index 0000000..a8abc10
--- /dev/null
+++ b/EDA/.gitignore
@@ -0,0 +1,14 @@
+# tmp zip files
+*.zip
+
+# KiCad backup files
+*bak
+
+# KiCad cache files
+*-cache
+
+# Gerber files
+*.drl
+*.gbr
+*.ps
+
diff --git a/EDA/2301843-1.dcm b/EDA/2301843-1.dcm
new file mode 100755
index 0000000..3b70db2
--- /dev/null
+++ b/EDA/2301843-1.dcm
@@ -0,0 +1,9 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP 2301843-1
+D TE CONNECTIVITY - 2301843-1 - D-SUB CONN, PLUG, 9POS, THROUGH HOLE
+K
+F https://componentsearchengine.com/Datasheets/2/2301843-1.pdf
+$ENDCMP
+#
+#End Doc Library
diff --git a/EDA/2301843-1.lib b/EDA/2301843-1.lib
new file mode 100755
index 0000000..220ccc0
--- /dev/null
+++ b/EDA/2301843-1.lib
@@ -0,0 +1,32 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#SamacSys ECAD Model 2301843-1
+#/1754128/231798/2.47/11/4/Connector
+DEF 2301843-1 J 0 30 Y Y 1 F N
+F0 "J" 850 500 50 H V L CNN
+F1 "2301843-1" 850 400 50 H V L CNN
+F2 "23018431" 850 300 50 H I L CNN
+F3 "https://componentsearchengine.com/Datasheets/2/2301843-1.pdf" 850 200 50 H I L CNN
+F4 "TE CONNECTIVITY - 2301843-1 - D-SUB CONN, PLUG, 9POS, THROUGH HOLE" 850 100 50 H I L CNN "Description"
+F5 "13.955" 850 0 50 H I L CNN "Height"
+F6 "571-2301843-1" 850 -100 50 H I L CNN "Mouser Part Number"
+F7 "https://www.mouser.co.uk/ProductDetail/TE-Connectivity-AMP/2301843-1?qs=rrS6PyfT74crws9wAQVNoA%3D%3D" 850 -200 50 H I L CNN "Mouser Price/Stock"
+F8 "TE Connectivity" 850 -300 50 H I L CNN "Manufacturer_Name"
+F9 "2301843-1" 850 -400 50 H I L CNN "Manufacturer_Part_Number"
+DRAW
+X 1 1 300 500 200 D 50 50 0 0 P
+X 2 2 400 500 200 D 50 50 0 0 P
+X 3 3 500 500 200 D 50 50 0 0 P
+X 4 4 600 500 200 D 50 50 0 0 P
+X 5 5 700 500 200 D 50 50 0 0 P
+X 6 6 300 -500 200 U 50 50 0 0 P
+X 7 7 400 -500 200 U 50 50 0 0 P
+X 8 8 500 -500 200 U 50 50 0 0 P
+X 9 9 600 -500 200 U 50 50 0 0 P
+X MH1 MH1 0 0 200 R 50 50 0 0 P
+X MH2 MH2 1000 0 200 L 50 50 0 0 P
+P 5 0 1 6 200 300 800 300 800 -300 200 -300 200 300 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/EDA/2301843-1.pretty/2301843-1.step b/EDA/2301843-1.pretty/2301843-1.step
new file mode 100755
index 0000000..cf0bcb4
--- /dev/null
+++ b/EDA/2301843-1.pretty/2301843-1.step
@@ -0,0 +1,6221 @@
+ISO-10303-21;
+HEADER;
+FILE_DESCRIPTION((''),'2;1');
+FILE_NAME('C-2301843-1','2018-06-14T',('workeradm'),('TE Connectivity Ltd.'),
+'CREO PARAMETRIC BY PTC INC, 2016050','CREO PARAMETRIC BY PTC INC, 2016050','');
+FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));
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diff --git a/EDA/2301843-1.pretty/2301843-1.wrl b/EDA/2301843-1.pretty/2301843-1.wrl
new file mode 100755
index 0000000..88848ba
--- /dev/null
+++ b/EDA/2301843-1.pretty/2301843-1.wrl
@@ -0,0 +1,13071 @@
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+        }
+      ]
+    }
+  ]
+}
diff --git a/EDA/2301843-1.pretty/23018431.kicad_mod b/EDA/2301843-1.pretty/23018431.kicad_mod
new file mode 100644
index 0000000..ac3dcb9
--- /dev/null
+++ b/EDA/2301843-1.pretty/23018431.kicad_mod
@@ -0,0 +1,46 @@
+(module 23018431 (layer F.Cu) (tedit 5F5F1DF5)
+  (descr 2301843-1-3)
+  (tags Connector)
+  (fp_text reference J** (at 5.56 8.645) (layer F.SilkS)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text value 23018431 (at 5.56 8.645) (layer F.SilkS) hide
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_line (start 14.01 18.97) (end 14.01 12.97) (layer Dwgs.User) (width 0.2))
+  (fp_line (start -2.89 18.97) (end 14.01 18.97) (layer Dwgs.User) (width 0.2))
+  (fp_line (start -2.89 12.97) (end -2.89 18.97) (layer Dwgs.User) (width 0.2))
+  (fp_line (start -10.845 19.97) (end -10.845 -2.68) (layer Dwgs.User) (width 0.1))
+  (fp_line (start 21.965 19.97) (end -10.845 19.97) (layer Dwgs.User) (width 0.1))
+  (fp_line (start 21.965 -2.68) (end 21.965 19.97) (layer Dwgs.User) (width 0.1))
+  (fp_line (start -10.845 -2.68) (end 21.965 -2.68) (layer Dwgs.User) (width 0.1))
+  (fp_line (start -9.845 12.97) (end -9.845 -1.68) (layer F.SilkS) (width 0.1))
+  (fp_line (start 20.965 12.97) (end -9.845 12.97) (layer F.SilkS) (width 0.1))
+  (fp_line (start 20.965 -1.68) (end 20.965 12.97) (layer F.SilkS) (width 0.1))
+  (fp_line (start -9.845 -1.68) (end 20.965 -1.68) (layer F.SilkS) (width 0.1))
+  (fp_line (start -9.845 12.97) (end -9.845 -1.68) (layer Dwgs.User) (width 0.2))
+  (fp_line (start 20.965 12.97) (end -9.845 12.97) (layer Dwgs.User) (width 0.2))
+  (fp_line (start 20.965 -1.68) (end 20.965 12.97) (layer Dwgs.User) (width 0.2))
+  (fp_line (start -9.845 -1.68) (end 20.965 -1.68) (layer Dwgs.User) (width 0.2))
+  (pad MH2 thru_hole circle (at 18.055 1.27 90) (size 4.95 4.95) (drill 3.3) (layers *.Cu *.Mask F.SilkS))
+  (pad MH1 thru_hole circle (at -6.935 1.27 90) (size 4.95 4.95) (drill 3.3) (layers *.Cu *.Mask F.SilkS))
+  (pad 9 thru_hole circle (at 9.73 2.54 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 8 thru_hole circle (at 6.95 2.54 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 7 thru_hole circle (at 4.17 2.54 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 6 thru_hole circle (at 1.39 2.54 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 5 thru_hole circle (at 11.12 0 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 4 thru_hole circle (at 8.34 0 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 3 thru_hole circle (at 5.56 0 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 2 thru_hole circle (at 2.78 0 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (pad 1 thru_hole circle (at 0 0 90) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask F.SilkS))
+  (model ${KIPRJMOD}/2301843-1.pretty/2301843-1.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+  (model ${KIPRJMOD}/2301843-1.pretty/2301843-1.step
+    (offset (xyz 5.5 -19 7))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 90 180 180))
+  )
+)
diff --git a/EDA/5749181-1.dcm b/EDA/5749181-1.dcm
new file mode 100755
index 0000000..648cd6f
--- /dev/null
+++ b/EDA/5749181-1.dcm
@@ -0,0 +1,9 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP 5749181-1
+D TE CONNECTIVITY / AMP - 5749181-1 - CONNECTOR, DIN, JACK, 4 POSITION
+K
+F http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F5749181%7FP%7Fpdf%7FEnglish%7FENG_CD_5749181_P.pdf%7F5749181-1
+$ENDCMP
+#
+#End Doc Library
diff --git a/EDA/5749181-1.lib b/EDA/5749181-1.lib
new file mode 100755
index 0000000..034f393
--- /dev/null
+++ b/EDA/5749181-1.lib
@@ -0,0 +1,28 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#SamacSys ECAD Model 5749181-1
+#/305393/231798/2.47/7/4/Connector
+DEF 5749181-1 J 0 30 Y Y 1 F N
+F0 "J" 750 300 50 H V L CNN
+F1 "5749181-1" 750 200 50 H V L CNN
+F2 "57491811" 750 100 50 H I L CNN
+F3 "http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F5749181%7FP%7Fpdf%7FEnglish%7FENG_CD_5749181_P.pdf%7F5749181-1" 750 0 50 H I L CNN
+F4 "TE CONNECTIVITY / AMP - 5749181-1 - CONNECTOR, DIN, JACK, 4 POSITION" 750 -100 50 H I L CNN "Description"
+F5 "13" 750 -200 50 H I L CNN "Height"
+F6 "571-5749181-1" 750 -300 50 H I L CNN "Mouser Part Number"
+F7 "https://www.mouser.co.uk/ProductDetail/TE-Connectivity/5749181-1?qs=XlZqES4cpWbRcAMR%2FcJqkQ%3D%3D" 750 -400 50 H I L CNN "Mouser Price/Stock"
+F8 "TE Connectivity" 750 -500 50 H I L CNN "Manufacturer_Name"
+F9 "5749181-1" 750 -600 50 H I L CNN "Manufacturer_Part_Number"
+DRAW
+X 1 1 0 0 200 R 50 50 0 0 P
+X 2 2 0 -100 200 R 50 50 0 0 P
+X 3 3 0 -200 200 R 50 50 0 0 P
+X 4 4 0 -300 200 R 50 50 0 0 P
+X MH1 MH1 900 0 200 L 50 50 0 0 P
+X MH2 MH2 900 -100 200 L 50 50 0 0 P
+X MH3 MH3 900 -200 200 L 50 50 0 0 P
+P 5 0 1 6 200 100 700 100 700 -400 200 -400 200 100 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/EDA/5749181-1.mod b/EDA/5749181-1.mod
new file mode 100755
index 0000000..b54092d
--- /dev/null
+++ b/EDA/5749181-1.mod
@@ -0,0 +1,86 @@
+PCBNEW-LibModule-V1  2020-09-13 19:21:50
+# encoding utf-8
+Units mm
+$INDEX
+57491811
+$EndINDEX
+$MODULE 57491811
+Po 0 0 0 15 5f5e633e 00000000 ~~
+Li 57491811
+Cd 5749181-1-2
+Kw Connector
+Sc 0
+At STD
+AR 
+Op 0 0 0
+T0 -3.350 2.895 1.27 1.27 0 0.254 N V 21 N "J**"
+T1 -3.350 2.895 1.27 1.27 0 0.254 N I 21 N "57491811"
+DS -10.35 9.31 3.65 9.31 0.2 24
+DS 3.65 9.31 3.65 -3.52 0.2 24
+DS 3.65 -3.52 -10.35 -3.52 0.2 24
+DS -10.35 -3.52 -10.35 9.31 0.2 24
+DS -12.788 10.31 6.088 10.31 0.1 24
+DS 6.088 10.31 6.088 -4.52 0.1 24
+DS 6.088 -4.52 -12.788 -4.52 0.1 24
+DS -12.788 -4.52 -12.788 10.31 0.1 24
+DS -10.35 5.3 -10.35 9.31 0.1 21
+DS -10.35 9.31 3.65 9.31 0.1 21
+DS 3.65 9.31 3.65 5.3 0.1 21
+DS -10.35 0.8 -10.35 -3.52 0.1 21
+DS -10.35 -3.52 3.65 -3.52 0.1 21
+DS 3.65 -3.52 3.65 0.3 0.1 21
+DS 4.5 -0 4.5 -0 0.1 21
+DS 4.6 -0 4.6 -0 0.1 21
+DA 4.45 -0 4.500 -0 -1800 0.1 21
+DA 4.45 -0 4.600 -0 -1800 0.1 21
+$PAD
+Po 0.000 -0
+Sh "1" C 1.509 1.509 0 0 900
+Dr 0.97 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+$EndPAD
+$PAD
+Po -6.700 -0
+Sh "2" C 1.509 1.509 0 0 900
+Dr 0.97 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+$EndPAD
+$PAD
+Po 0.000 -2.5
+Sh "3" C 1.509 1.509 0 0 900
+Dr 0.97 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+$EndPAD
+$PAD
+Po -6.700 -2.5
+Sh "4" C 1.509 1.509 0 0 900
+Dr 0.97 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.350 3.8
+Sh "MH1" C 3.356 3.356 0 0 900
+Dr 2.237 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+$EndPAD
+$PAD
+Po -10.110 2.99
+Sh "MH2" C 3.356 3.356 0 0 900
+Dr 2.237 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.410 2.99
+Sh "MH3" C 3.356 3.356 0 0 900
+Dr 2.237 0 0
+At STD N 00E0FFFF
+Ne 0 ""
+$EndPAD
+$EndMODULE 57491811
+$EndLIBRARY
diff --git a/EDA/57491811.kicad_mod b/EDA/57491811.kicad_mod
new file mode 100755
index 0000000..a46b749
--- /dev/null
+++ b/EDA/57491811.kicad_mod
@@ -0,0 +1,43 @@
+(module "57491811" (layer F.Cu)
+  (descr "5749181-1-2")
+  (tags "Connector")
+  (fp_text reference J** (at -3.350 2.895) (layer F.SilkS)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text user %R (at -3.350 2.895) (layer F.Fab)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text value "57491811" (at -3.350 2.895) (layer F.SilkS) hide
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_line (start -10.35 9.31) (end 3.65 9.31) (layer F.Fab) (width 0.2))
+  (fp_line (start 3.65 9.31) (end 3.65 -3.52) (layer F.Fab) (width 0.2))
+  (fp_line (start 3.65 -3.52) (end -10.35 -3.52) (layer F.Fab) (width 0.2))
+  (fp_line (start -10.35 -3.52) (end -10.35 9.31) (layer F.Fab) (width 0.2))
+  (fp_line (start -12.788 10.31) (end 6.088 10.31) (layer F.CrtYd) (width 0.1))
+  (fp_line (start 6.088 10.31) (end 6.088 -4.52) (layer F.CrtYd) (width 0.1))
+  (fp_line (start 6.088 -4.52) (end -12.788 -4.52) (layer F.CrtYd) (width 0.1))
+  (fp_line (start -12.788 -4.52) (end -12.788 10.31) (layer F.CrtYd) (width 0.1))
+  (fp_line (start -10.35 5.3) (end -10.35 9.31) (layer F.SilkS) (width 0.1))
+  (fp_line (start -10.35 9.31) (end 3.65 9.31) (layer F.SilkS) (width 0.1))
+  (fp_line (start 3.65 9.31) (end 3.65 5.3) (layer F.SilkS) (width 0.1))
+  (fp_line (start -10.35 0.8) (end -10.35 -3.52) (layer F.SilkS) (width 0.1))
+  (fp_line (start -10.35 -3.52) (end 3.65 -3.52) (layer F.SilkS) (width 0.1))
+  (fp_line (start 3.65 -3.52) (end 3.65 0.3) (layer F.SilkS) (width 0.1))
+  (fp_line (start 4.5 -0) (end 4.5 -0) (layer F.SilkS) (width 0.1))
+  (fp_line (start 4.6 -0) (end 4.6 -0) (layer F.SilkS) (width 0.1))
+  (fp_arc (start 4.55 -0) (end 4.500 -0) (angle -180) (layer F.SilkS) (width 0.1))
+  (fp_arc (start 4.55 -0) (end 4.600 -0) (angle -180) (layer F.SilkS) (width 0.1))
+  (pad 1 thru_hole circle (at 0.000 -0) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at -6.700 -0) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask))
+  (pad 3 thru_hole circle (at 0.000 -2.5) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask))
+  (pad 4 thru_hole circle (at -6.700 -2.5) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask))
+  (pad MH1 thru_hole circle (at -3.350 3.8) (size 3.356 3.356) (drill 2.237) (layers *.Cu *.Mask))
+  (pad MH2 thru_hole circle (at -10.110 2.99) (size 3.356 3.356) (drill 2.237) (layers *.Cu *.Mask))
+  (pad MH3 thru_hole circle (at 3.410 2.99) (size 3.356 3.356) (drill 2.237) (layers *.Cu *.Mask))
+  (model 5749181-1.stp
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/EDA/Datasheet/1593KTBU.pdf b/EDA/Datasheet/1593KTBU.pdf
new file mode 100644
index 0000000..f340ed3
Binary files /dev/null and b/EDA/Datasheet/1593KTBU.pdf differ
diff --git a/EDA/Datasheet/ENG_CD_5749181_P.pdf b/EDA/Datasheet/ENG_CD_5749181_P.pdf
new file mode 100644
index 0000000..3110248
Binary files /dev/null and b/EDA/Datasheet/ENG_CD_5749181_P.pdf differ
diff --git a/EDA/Datasheet/txb0108.pdf b/EDA/Datasheet/txb0108.pdf
new file mode 100644
index 0000000..b0965f4
Binary files /dev/null and b/EDA/Datasheet/txb0108.pdf differ
diff --git a/EDA/ESP32-PICO-D4.dcm b/EDA/ESP32-PICO-D4.dcm
new file mode 100755
index 0000000..c10c65b
--- /dev/null
+++ b/EDA/ESP32-PICO-D4.dcm
@@ -0,0 +1,9 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP ESP32-PICO-D4
+D ESP32-PICO-D4 module
+K
+F https://hr.mouser.com/datasheet/2/891/esp32-pico-d4_datasheet_en-1365829.pdf
+$ENDCMP
+#
+#End Doc Library
diff --git a/EDA/ESP32-PICO-D4.lib b/EDA/ESP32-PICO-D4.lib
new file mode 100755
index 0000000..28665e8
--- /dev/null
+++ b/EDA/ESP32-PICO-D4.lib
@@ -0,0 +1,70 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#SamacSys ECAD Model ESP32-PICO-D4
+#/992851/231798/2.47/49/4/Integrated Circuit
+DEF ESP32-PICO-D4 IC 0 30 Y Y 1 F N
+F0 "IC" 1650 900 50 H V L CNN
+F1 "ESP32-PICO-D4" 1650 800 50 H V L CNN
+F2 "ESP32-PICO-D4_1" 1650 700 50 H I L CNN
+F3 "https://hr.mouser.com/datasheet/2/891/esp32-pico-d4_datasheet_en-1365829.pdf" 1650 600 50 H I L CNN
+F4 "ESP32-PICO-D4 module" 1650 500 50 H I L CNN "Description"
+F5 "" 1650 400 50 H I L CNN "Height"
+F6 "356-ESP32-PICO-D4" 1650 300 50 H I L CNN "Mouser Part Number"
+F7 "" 1650 200 50 H I L CNN "Mouser Price/Stock"
+F8 "Espressif" 1650 100 50 H I L CNN "Manufacturer_Name"
+F9 "ESP32-PICO-D4" 1650 0 50 H I L CNN "Manufacturer_Part_Number"
+DRAW
+X VDDA_1 1 600 900 200 D 50 50 0 0 P
+X LNA_IN 2 0 0 200 R 50 50 0 0 P
+X VDDA3P3_1 3 700 900 200 D 50 50 0 0 P
+X VDDA3P3_2 4 800 900 200 D 50 50 0 0 P
+X SENSOR_VP 5 0 -1900 200 R 50 50 0 0 P
+X SENSOR_CAPP 6 0 -2000 200 R 50 50 0 0 P
+X SENSOR_CAPN 7 1800 -1200 200 L 50 50 0 0 P
+X SENSOR_VN 8 0 -2100 200 R 50 50 0 0 P
+X EN 9 0 -2200 200 R 50 50 0 0 P
+X IO34 10 0 -2300 200 R 50 50 0 0 P
+X IO35 11 0 -2400 200 R 50 50 0 0 P
+X IO32 12 0 -100 200 R 50 50 0 0 P
+X IO33 13 0 -200 200 R 50 50 0 0 P
+X IO25 14 0 -300 200 R 50 50 0 0 P
+X IO26 15 0 -400 200 R 50 50 0 0 P
+X IO27 16 0 -500 200 R 50 50 0 0 P
+X IO14 17 0 -600 200 R 50 50 0 0 P
+X IO12 18 0 -700 200 R 50 50 0 0 P
+X VDD3P3_RTC 19 900 900 200 D 50 50 0 0 P
+X IO13 20 0 -800 200 R 50 50 0 0 P
+X IO15 21 0 -900 200 R 50 50 0 0 P
+X IO2 22 0 -1000 200 R 50 50 0 0 P
+X IO0 23 0 -1100 200 R 50 50 0 0 P
+X IO4 24 0 -1200 200 R 50 50 0 0 P
+X IO16 25 0 -1300 200 R 50 50 0 0 P
+X VDD_SDIO_NC 26 0 -1400 200 R 50 50 0 0 P
+X IO17 27 0 -1500 200 R 50 50 0 0 P
+X SD2 28 0 -1600 200 R 50 50 0 0 P
+X SD3 29 0 -1700 200 R 50 50 0 0 P
+X CMD 30 0 -1800 200 R 50 50 0 0 P
+X CLK 31 1800 0 200 L 50 50 0 0 P
+X SD0 32 1800 -100 200 L 50 50 0 0 P
+X SD1 33 1800 -200 200 L 50 50 0 0 P
+X IO5 34 1800 -300 200 L 50 50 0 0 P
+X IO18 35 1800 -400 200 L 50 50 0 0 P
+X IO23 36 1800 -500 200 L 50 50 0 0 P
+X VDD3P3_CPU 37 1800 -600 200 L 50 50 0 0 P
+X IO19 38 1800 -700 200 L 50 50 0 0 P
+X IO22 39 1800 -800 200 L 50 50 0 0 P
+X U0RXD 40 1800 -900 200 L 50 50 0 0 P
+X U0TXD 41 1800 -1000 200 L 50 50 0 0 P
+X IO21 42 1800 -1100 200 L 50 50 0 0 P
+X VDDA_2 43 1000 900 200 D 50 50 0 0 P
+X XTAL_N_NC 44 1800 -1300 200 L 50 50 0 0 P
+X XTAL_P_NC 45 1800 -1400 200 L 50 50 0 0 P
+X VDDA_3 46 1100 900 200 D 50 50 0 0 P
+X CAP2_NC 47 1800 -1500 200 L 50 50 0 0 P
+X CAP1_NC 48 1800 -1600 200 L 50 50 0 0 P
+X GND 49 1800 -1700 200 L 50 50 0 0 P
+P 5 0 1 6 200 700 1600 700 1600 -2500 200 -2500 200 700 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/EDA/ESP32-PICO-D4.mod b/EDA/ESP32-PICO-D4.mod
new file mode 100755
index 0000000..f45d87d
--- /dev/null
+++ b/EDA/ESP32-PICO-D4.mod
@@ -0,0 +1,318 @@
+PCBNEW-LibModule-V1  2020-09-13 18:10:54
+# encoding utf-8
+Units mm
+$INDEX
+ESP32-PICO-D4_1
+$EndINDEX
+$MODULE ESP32-PICO-D4_1
+Po 0 0 0 15 5f5e529e 00000000 ~~
+Li ESP32-PICO-D4_1
+Cd ESP32-PICO-D4_1
+Kw Integrated Circuit
+Sc 0
+At SMD
+AR 
+Op 0 0 0
+T0 -0.341 -0.132 1.27 1.27 0 0.254 N V 21 N "IC**"
+T1 -0.341 -0.132 1.27 1.27 0 0.254 N I 21 N "ESP32-PICO-D4_1"
+DS -3.5 -3.5 3.5 -3.5 0.2 24
+DS 3.5 -3.5 3.5 3.5 0.2 24
+DS 3.5 3.5 -3.5 3.5 0.2 24
+DS -3.5 3.5 -3.5 -3.5 0.2 24
+DC -3.991 -2.825 -4.02812 -2.825 0.254 21
+$PAD
+Po -3.3 -2.75
+Sh "1" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 -2.25
+Sh "2" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 -1.75
+Sh "3" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 -1.25
+Sh "4" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 -0.75
+Sh "5" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 -0.25
+Sh "6" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 0.25
+Sh "7" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 0.75
+Sh "8" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 1.25
+Sh "9" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 1.75
+Sh "10" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 2.25
+Sh "11" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -3.3 2.75
+Sh "12" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.75 3.3
+Sh "13" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.25 3.3
+Sh "14" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -1.75 3.3
+Sh "15" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -1.25 3.3
+Sh "16" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -0.75 3.3
+Sh "17" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -0.25 3.3
+Sh "18" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 0.25 3.3
+Sh "19" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 0.75 3.3
+Sh "20" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 1.25 3.3
+Sh "21" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 1.75 3.3
+Sh "22" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.25 3.3
+Sh "23" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.75 3.3
+Sh "24" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 2.75
+Sh "25" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 2.25
+Sh "26" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 1.75
+Sh "27" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 1.25
+Sh "28" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 0.75
+Sh "29" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 0.25
+Sh "30" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 -0.25
+Sh "31" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 -0.75
+Sh "32" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 -1.25
+Sh "33" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 -1.75
+Sh "34" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 -2.25
+Sh "35" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 3.3 -2.75
+Sh "36" R 0.35 0.55 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.75 -3.3
+Sh "37" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.25 -3.3
+Sh "38" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 1.75 -3.3
+Sh "39" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 1.25 -3.3
+Sh "40" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 0.75 -3.3
+Sh "41" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 0.25 -3.3
+Sh "42" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -0.25 -3.3
+Sh "43" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -0.75 -3.3
+Sh "44" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -1.25 -3.3
+Sh "45" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -1.75 -3.3
+Sh "46" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.25 -3.3
+Sh "47" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.75 -3.3
+Sh "48" R 0.35 0.55 0 0 0
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -0.006 -0.013
+Sh "49" R 5.5 5.5 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$EndMODULE ESP32-PICO-D4_1
+$EndLIBRARY
diff --git a/EDA/ESP32-PICO-D4_1.kicad_mod b/EDA/ESP32-PICO-D4_1.kicad_mod
new file mode 100755
index 0000000..f269b45
--- /dev/null
+++ b/EDA/ESP32-PICO-D4_1.kicad_mod
@@ -0,0 +1,68 @@
+(module "ESP32-PICO-D4_1" (layer F.Cu)
+  (descr "ESP32-PICO-D4_1")
+  (tags "Integrated Circuit")
+  (attr smd)
+  (fp_text reference IC** (at -0.341 -0.132) (layer F.SilkS)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text user %R (at -0.341 -0.132) (layer F.Fab)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text value "ESP32-PICO-D4_1" (at -0.341 -0.132) (layer F.SilkS) hide
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_line (start -3.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.2))
+  (fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.2))
+  (fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.2))
+  (fp_line (start -3.5 3.5) (end -3.5 -3.5) (layer F.Fab) (width 0.2))
+  (fp_circle (center -3.991 -2.825) (end -3.991 -2.78788) (layer F.SilkS) (width 0.2))
+  (pad 1 smd rect (at -3.3 -2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at -3.3 -2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at -3.3 -1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at -3.3 -1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at -3.3 -0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at -3.3 -0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at -3.3 0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 8 smd rect (at -3.3 0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 9 smd rect (at -3.3 1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 10 smd rect (at -3.3 1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 11 smd rect (at -3.3 2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 12 smd rect (at -3.3 2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 13 smd rect (at -2.75 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 14 smd rect (at -2.25 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 15 smd rect (at -1.75 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 16 smd rect (at -1.25 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 17 smd rect (at -0.75 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 18 smd rect (at -0.25 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 19 smd rect (at 0.25 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 20 smd rect (at 0.75 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 21 smd rect (at 1.25 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 22 smd rect (at 1.75 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 23 smd rect (at 2.25 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 24 smd rect (at 2.75 3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 25 smd rect (at 3.3 2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 26 smd rect (at 3.3 2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 27 smd rect (at 3.3 1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 28 smd rect (at 3.3 1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 29 smd rect (at 3.3 0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 30 smd rect (at 3.3 0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 31 smd rect (at 3.3 -0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 32 smd rect (at 3.3 -0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 33 smd rect (at 3.3 -1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 34 smd rect (at 3.3 -1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 35 smd rect (at 3.3 -2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 36 smd rect (at 3.3 -2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 37 smd rect (at 2.75 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 38 smd rect (at 2.25 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 39 smd rect (at 1.75 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 40 smd rect (at 1.25 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 41 smd rect (at 0.75 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 42 smd rect (at 0.25 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 43 smd rect (at -0.25 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 44 smd rect (at -0.75 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 45 smd rect (at -1.25 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 46 smd rect (at -1.75 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 47 smd rect (at -2.25 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 48 smd rect (at -2.75 -3.3 0) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+  (pad 49 smd rect (at -0.006 -0.013 90) (size 5.5 5.5) (layers F.Cu F.Paste F.Mask))
+)
diff --git a/EDA/SMT/quack-all-pos.numbers b/EDA/SMT/quack-all-pos.numbers
new file mode 100755
index 0000000..70b9829
Binary files /dev/null and b/EDA/SMT/quack-all-pos.numbers differ
diff --git a/EDA/SMT/quack-all-pos.xlsx b/EDA/SMT/quack-all-pos.xlsx
new file mode 100644
index 0000000..57f2ddb
Binary files /dev/null and b/EDA/SMT/quack-all-pos.xlsx differ
diff --git a/EDA/SMT/quack-bom.numbers b/EDA/SMT/quack-bom.numbers
new file mode 100755
index 0000000..9308982
Binary files /dev/null and b/EDA/SMT/quack-bom.numbers differ
diff --git a/EDA/SMT/quack-bom.xlsx b/EDA/SMT/quack-bom.xlsx
new file mode 100644
index 0000000..f00df58
Binary files /dev/null and b/EDA/SMT/quack-bom.xlsx differ
diff --git a/EDA/SOP65P640X120-20N.kicad_mod b/EDA/SOP65P640X120-20N.kicad_mod
new file mode 100755
index 0000000..6989d1b
--- /dev/null
+++ b/EDA/SOP65P640X120-20N.kicad_mod
@@ -0,0 +1,53 @@
+(module "SOP65P640X120-20N" (layer F.Cu)
+  (descr "PW (R-PDSO-G20)")
+  (tags "Integrated Circuit")
+  (attr smd)
+  (fp_text reference IC** (at 0 0) (layer F.SilkS)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text user %R (at 0 0) (layer F.Fab)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text value "SOP65P640X120-20N" (at 0 0) (layer F.SilkS) hide
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_line (start -3.925 -3.55) (end 3.925 -3.55) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 3.925 -3.55) (end 3.925 3.55) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 3.925 3.55) (end -3.925 3.55) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -3.925 3.55) (end -3.925 -3.55) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -2.2 -3.25) (end 2.2 -3.25) (layer F.Fab) (width 0.1))
+  (fp_line (start 2.2 -3.25) (end 2.2 3.25) (layer F.Fab) (width 0.1))
+  (fp_line (start 2.2 3.25) (end -2.2 3.25) (layer F.Fab) (width 0.1))
+  (fp_line (start -2.2 3.25) (end -2.2 -3.25) (layer F.Fab) (width 0.1))
+  (fp_line (start -2.2 -2.6) (end -1.55 -3.25) (layer F.Fab) (width 0.1))
+  (fp_line (start -1.85 -3.25) (end 1.85 -3.25) (layer F.SilkS) (width 0.2))
+  (fp_line (start 1.85 -3.25) (end 1.85 3.25) (layer F.SilkS) (width 0.2))
+  (fp_line (start 1.85 3.25) (end -1.85 3.25) (layer F.SilkS) (width 0.2))
+  (fp_line (start -1.85 3.25) (end -1.85 -3.25) (layer F.SilkS) (width 0.2))
+  (fp_line (start -3.675 -3.5) (end -2.2 -3.5) (layer F.SilkS) (width 0.2))
+  (pad 1 smd rect (at -2.938 -2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at -2.938 -2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at -2.938 -1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at -2.938 -0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at -2.938 -0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at -2.938 0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at -2.938 0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 8 smd rect (at -2.938 1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 9 smd rect (at -2.938 2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 10 smd rect (at -2.938 2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 11 smd rect (at 2.938 2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 12 smd rect (at 2.938 2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 13 smd rect (at 2.938 1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 14 smd rect (at 2.938 0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 15 smd rect (at 2.938 0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 16 smd rect (at 2.938 -0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 17 smd rect (at 2.938 -0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 18 smd rect (at 2.938 -1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 19 smd rect (at 2.938 -2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (pad 20 smd rect (at 2.938 -2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
+  (model TXB0108PWR.stp
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/EDA/TXB0108PWR.dcm b/EDA/TXB0108PWR.dcm
new file mode 100755
index 0000000..d16e41b
--- /dev/null
+++ b/EDA/TXB0108PWR.dcm
@@ -0,0 +1,9 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP TXB0108PWR
+D 8-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect
+K
+F http://www.ti.com/lit/ds/symlink/txb0108.pdf
+$ENDCMP
+#
+#End Doc Library
diff --git a/EDA/TXB0108PWR.lib b/EDA/TXB0108PWR.lib
new file mode 100755
index 0000000..f899770
--- /dev/null
+++ b/EDA/TXB0108PWR.lib
@@ -0,0 +1,41 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#SamacSys ECAD Model TXB0108PWR
+#/5667/231798/2.47/20/3/Integrated Circuit
+DEF TXB0108PWR IC 0 30 Y Y 1 F N
+F0 "IC" 950 300 50 H V L CNN
+F1 "TXB0108PWR" 950 200 50 H V L CNN
+F2 "SOP65P640X120-20N" 950 100 50 H I L CNN
+F3 "http://www.ti.com/lit/ds/symlink/txb0108.pdf" 950 0 50 H I L CNN
+F4 "8-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect" 950 -100 50 H I L CNN "Description"
+F5 "1.2" 950 -200 50 H I L CNN "Height"
+F6 "595-TXB0108PWR" 950 -300 50 H I L CNN "Mouser Part Number"
+F7 "https://www.mouser.co.uk/ProductDetail/Texas-Instruments/TXB0108PWR?qs=oFXvjAmG9EgEUWGWzOVFCA%3D%3D" 950 -400 50 H I L CNN "Mouser Price/Stock"
+F8 "Texas Instruments" 950 -500 50 H I L CNN "Manufacturer_Name"
+F9 "TXB0108PWR" 950 -600 50 H I L CNN "Manufacturer_Part_Number"
+DRAW
+X A1 1 0 0 200 R 50 50 0 0 P
+X VCCA 2 0 -100 200 R 50 50 0 0 P
+X A2 3 0 -200 200 R 50 50 0 0 P
+X A3 4 0 -300 200 R 50 50 0 0 P
+X A4 5 0 -400 200 R 50 50 0 0 P
+X A5 6 0 -500 200 R 50 50 0 0 P
+X A6 7 0 -600 200 R 50 50 0 0 P
+X A7 8 0 -700 200 R 50 50 0 0 P
+X A8 9 0 -800 200 R 50 50 0 0 P
+X OE 10 0 -900 200 R 50 50 0 0 P
+X B1 20 1100 0 200 L 50 50 0 0 P
+X VCCB 19 1100 -100 200 L 50 50 0 0 P
+X B2 18 1100 -200 200 L 50 50 0 0 P
+X B3 17 1100 -300 200 L 50 50 0 0 P
+X B4 16 1100 -400 200 L 50 50 0 0 P
+X B5 15 1100 -500 200 L 50 50 0 0 P
+X B6 14 1100 -600 200 L 50 50 0 0 P
+X B7 13 1100 -700 200 L 50 50 0 0 P
+X B8 12 1100 -800 200 L 50 50 0 0 P
+X GND 11 1100 -900 200 L 50 50 0 0 P
+P 5 0 1 6 200 100 900 100 900 -1000 200 -1000 200 100 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/EDA/TXB0108PWR.mod b/EDA/TXB0108PWR.mod
new file mode 100755
index 0000000..fa7e3f2
--- /dev/null
+++ b/EDA/TXB0108PWR.mod
@@ -0,0 +1,153 @@
+PCBNEW-LibModule-V1  2020-09-13 18:33:11
+# encoding utf-8
+Units mm
+$INDEX
+SOP65P640X120-20N
+$EndINDEX
+$MODULE SOP65P640X120-20N
+Po 0 0 0 15 5f5e57d7 00000000 ~~
+Li SOP65P640X120-20N
+Cd PW (R-PDSO-G20)
+Kw Integrated Circuit
+Sc 0
+At SMD
+AR 
+Op 0 0 0
+T0 0 0 1.27 1.27 0 0.254 N V 21 N "IC**"
+T1 0 0 1.27 1.27 0 0.254 N I 21 N "SOP65P640X120-20N"
+DS -3.925 -3.55 3.925 -3.55 0.05 24
+DS 3.925 -3.55 3.925 3.55 0.05 24
+DS 3.925 3.55 -3.925 3.55 0.05 24
+DS -3.925 3.55 -3.925 -3.55 0.05 24
+DS -2.2 -3.25 2.2 -3.25 0.1 24
+DS 2.2 -3.25 2.2 3.25 0.1 24
+DS 2.2 3.25 -2.2 3.25 0.1 24
+DS -2.2 3.25 -2.2 -3.25 0.1 24
+DS -2.2 -2.6 -1.55 -3.25 0.1 24
+DS -1.85 -3.25 1.85 -3.25 0.2 21
+DS 1.85 -3.25 1.85 3.25 0.2 21
+DS 1.85 3.25 -1.85 3.25 0.2 21
+DS -1.85 3.25 -1.85 -3.25 0.2 21
+DS -3.675 -3.5 -2.2 -3.5 0.2 21
+$PAD
+Po -2.938 -2.925
+Sh "1" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 -2.275
+Sh "2" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 -1.625
+Sh "3" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 -0.975
+Sh "4" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 -0.325
+Sh "5" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 0.325
+Sh "6" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 0.975
+Sh "7" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 1.625
+Sh "8" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 2.275
+Sh "9" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po -2.938 2.925
+Sh "10" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 2.925
+Sh "11" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 2.275
+Sh "12" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 1.625
+Sh "13" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 0.975
+Sh "14" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 0.325
+Sh "15" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 -0.325
+Sh "16" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 -0.975
+Sh "17" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 -1.625
+Sh "18" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 -2.275
+Sh "19" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$PAD
+Po 2.938 -2.925
+Sh "20" R 0.45 1.475 0 0 900
+At SMD N 00888000
+Ne 0 ""
+$EndPAD
+$EndMODULE SOP65P640X120-20N
+$EndLIBRARY
diff --git a/EDA/quack.kicad_pcb b/EDA/quack.kicad_pcb
new file mode 100644
index 0000000..4223608
--- /dev/null
+++ b/EDA/quack.kicad_pcb
@@ -0,0 +1,1637 @@
+(kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)")
+
+  (general
+    (thickness 1.6)
+    (drawings 20)
+    (tracks 410)
+    (zones 0)
+    (modules 25)
+    (nets 30)
+  )
+
+  (page A4)
+  (title_block
+    (title "Quack Mouse Adapter")
+    (date 2020-09-14)
+    (rev 1.0)
+    (company Lostwave)
+    (comment 1 https://68kmla.org)
+    (comment 2 https://github.com/demik/quack/tree/master/EDA)
+  )
+
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (33 F.Adhes user)
+    (35 F.Paste user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (via_size 0.8)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 6.4 6.4)
+    (pad_drill 3.2)
+    (pad_to_mask_clearance 0.051)
+    (solder_mask_min_width 0.25)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 GND)
+  (net 2 +5V)
+  (net 3 "Net-(IC2-Pad20)")
+  (net 4 +3V3)
+  (net 5 "Net-(D1-Pad2)")
+  (net 6 "Net-(D2-Pad2)")
+  (net 7 "Net-(D3-Pad2)")
+  (net 8 "Net-(D4-Pad2)")
+  (net 9 "Net-(IC1-Pad14)")
+  (net 10 "Net-(IC1-Pad15)")
+  (net 11 "Net-(IC1-Pad16)")
+  (net 12 "Net-(IC1-Pad42)")
+  (net 13 U0RXD)
+  (net 14 U0TXD)
+  (net 15 /quack_connectors/QY2_5V)
+  (net 16 /quack_connectors/CLICK_5V)
+  (net 17 /quack_connectors/QY1_5V)
+  (net 18 /quack_connectors/QX1_5V)
+  (net 19 /quack_connectors/QX2_5V)
+  (net 20 FLASH)
+  (net 21 QY1_3V)
+  (net 22 QX1_3V)
+  (net 23 QX2_3V)
+  (net 24 QY2_3V)
+  (net 25 CLICK_3V)
+  (net 26 ADB)
+  (net 27 "Net-(C5-Pad1)")
+  (net 28 ADBSRC)
+  (net 29 BTOFF)
+
+  (net_class Default "Ceci est la Netclass par défaut."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.8)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net +3V3)
+    (add_net /quack_connectors/CLICK_5V)
+    (add_net /quack_connectors/QX1_5V)
+    (add_net /quack_connectors/QX2_5V)
+    (add_net /quack_connectors/QY1_5V)
+    (add_net /quack_connectors/QY2_5V)
+    (add_net ADB)
+    (add_net ADBSRC)
+    (add_net BTOFF)
+    (add_net CLICK_3V)
+    (add_net FLASH)
+    (add_net "Net-(C5-Pad1)")
+    (add_net "Net-(D1-Pad2)")
+    (add_net "Net-(D2-Pad2)")
+    (add_net "Net-(D3-Pad2)")
+    (add_net "Net-(D4-Pad2)")
+    (add_net "Net-(IC1-Pad14)")
+    (add_net "Net-(IC1-Pad15)")
+    (add_net "Net-(IC1-Pad16)")
+    (add_net "Net-(IC1-Pad42)")
+    (add_net "Net-(IC2-Pad20)")
+    (add_net QX1_3V)
+    (add_net QX2_3V)
+    (add_net QY1_3V)
+    (add_net QY2_3V)
+    (add_net U0RXD)
+    (add_net U0TXD)
+  )
+
+  (net_class +V ""
+    (clearance 0.2)
+    (trace_width 0.4)
+    (via_dia 1)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net +5V)
+  )
+
+  (net_class GND ""
+    (clearance 0.2)
+    (trace_width 1)
+    (via_dia 1.6)
+    (via_drill 0.8)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net GND)
+  )
+
+  (module MountingHole:MountingHole_3.2mm_M3_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5F5EB674)
+    (at 169.31 84.17)
+    (descr "Mounting Hole 3.2mm, M3")
+    (tags "mounting hole 3.2mm m3")
+    (attr virtual)
+    (fp_text reference REF** (at 0 -4.2) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_Pad (at 0 4.2) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))
+    (fp_text user %R (at 0.3 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module MountingHole:MountingHole_3.2mm_M3_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5F5EB620)
+    (at 141.31 84.17)
+    (descr "Mounting Hole 3.2mm, M3")
+    (tags "mounting hole 3.2mm m3")
+    (attr virtual)
+    (fp_text reference REF** (at 0 -4.2) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_Pad (at 0 4.2) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))
+    (fp_text user %R (at 0.3 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module MountingHole:MountingHole_3.2mm_M3_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5F5EB58C)
+    (at 169.31 112.17)
+    (descr "Mounting Hole 3.2mm, M3")
+    (tags "mounting hole 3.2mm m3")
+    (attr virtual)
+    (fp_text reference REF** (at 0 -4.2) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_Pad (at 0 4.2) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))
+    (fp_text user %R (at 0.3 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module MountingHole:MountingHole_3.2mm_M3_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 5F5EB4F6)
+    (at 141.31 112.17)
+    (descr "Mounting Hole 3.2mm, M3")
+    (tags "mounting hole 3.2mm m3")
+    (attr virtual)
+    (fp_text reference REF** (at 0 -4.2) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_3.2mm_M3_Pad (at 0 4.2) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 3.45 0) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0 0) (end 3.2 0) (layer Cmts.User) (width 0.15))
+    (fp_text user %R (at 0.3 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.2) (layers *.Cu *.Mask))
+  )
+
+  (module ESP32-PICO-D4:ESP32-PICO-D4_1 (layer F.Cu) (tedit 5F5E529E) (tstamp 5F5EBCE9)
+    (at 156.21 97.79)
+    (descr ESP32-PICO-D4_1)
+    (tags "Integrated Circuit")
+    (path /5F5E5479)
+    (attr smd)
+    (fp_text reference IC1 (at -0.341 -0.132) (layer F.SilkS)
+      (effects (font (size 1.27 1.27) (thickness 0.254)))
+    )
+    (fp_text value ESP32-PICO-D4 (at -0.341 -0.132) (layer F.SilkS) hide
+      (effects (font (size 1.27 1.27) (thickness 0.254)))
+    )
+    (fp_circle (center -3.991 -2.825) (end -4.02812 -2.825) (layer F.SilkS) (width 0.254))
+    (fp_line (start -3.5 3.5) (end -3.5 -3.5) (layer Dwgs.User) (width 0.2))
+    (fp_line (start 3.5 3.5) (end -3.5 3.5) (layer Dwgs.User) (width 0.2))
+    (fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer Dwgs.User) (width 0.2))
+    (fp_line (start -3.5 -3.5) (end 3.5 -3.5) (layer Dwgs.User) (width 0.2))
+    (pad 49 smd rect (at -0.006 -0.013 90) (size 5.5 5.5) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 48 smd rect (at -2.75 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 47 smd rect (at -2.25 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 46 smd rect (at -1.75 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 45 smd rect (at -1.25 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 44 smd rect (at -0.75 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 43 smd rect (at -0.25 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 42 smd rect (at 0.25 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 12 "Net-(IC1-Pad42)"))
+    (pad 41 smd rect (at 0.75 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 14 U0TXD))
+    (pad 40 smd rect (at 1.25 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 13 U0RXD))
+    (pad 39 smd rect (at 1.75 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 38 smd rect (at 2.25 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 37 smd rect (at 2.75 -3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 36 smd rect (at 3.3 -2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 35 smd rect (at 3.3 -2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 34 smd rect (at 3.3 -1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 33 smd rect (at 3.3 -1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 32 smd rect (at 3.3 -0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 31 smd rect (at 3.3 -0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 30 smd rect (at 3.3 0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 29 smd rect (at 3.3 0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 28 smd rect (at 3.3 1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 27 smd rect (at 3.3 1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 26 smd rect (at 3.3 2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 25 smd rect (at 3.3 2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 24 smd rect (at 2.75 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 26 ADB))
+    (pad 23 smd rect (at 2.25 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 20 FLASH))
+    (pad 22 smd rect (at 1.75 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 25 CLICK_3V))
+    (pad 21 smd rect (at 1.25 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 24 QY2_3V))
+    (pad 20 smd rect (at 0.75 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 23 QX2_3V))
+    (pad 19 smd rect (at 0.25 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 18 smd rect (at -0.25 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 22 QX1_3V))
+    (pad 17 smd rect (at -0.75 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 21 QY1_3V))
+    (pad 16 smd rect (at -1.25 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 11 "Net-(IC1-Pad16)"))
+    (pad 15 smd rect (at -1.75 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 10 "Net-(IC1-Pad15)"))
+    (pad 14 smd rect (at -2.25 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 9 "Net-(IC1-Pad14)"))
+    (pad 13 smd rect (at -2.75 3.3) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 29 BTOFF))
+    (pad 12 smd rect (at -3.3 2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 28 ADBSRC))
+    (pad 11 smd rect (at -3.3 2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 10 smd rect (at -3.3 1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 9 smd rect (at -3.3 1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 27 "Net-(C5-Pad1)"))
+    (pad 8 smd rect (at -3.3 0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 7 smd rect (at -3.3 0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 6 smd rect (at -3.3 -0.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 5 smd rect (at -3.3 -0.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 4 smd rect (at -3.3 -1.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 3 smd rect (at -3.3 -1.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 2 smd rect (at -3.3 -2.25 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask))
+    (pad 1 smd rect (at -3.3 -2.75 90) (size 0.35 0.55) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+  )
+
+  (module Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm (layer F.Cu) (tedit 5A02F25C) (tstamp 5F5EBD0D)
+    (at 170.18 97.79)
+    (descr "20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
+    (tags "SSOP 0.65")
+    (path /5F5EA845/5F5EC2ED)
+    (attr smd)
+    (fp_text reference IC2 (at 0 -4.3) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value TXB0108PWR (at 0 4.3) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.8 0.8) (thickness 0.15)))
+    )
+    (fp_line (start -3.75 -3.45) (end 2.225 -3.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start -2.225 3.45) (end 2.225 3.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start -3.95 3.55) (end 3.95 3.55) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.95 -3.55) (end 3.95 -3.55) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.95 -3.55) (end 3.95 3.55) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.95 -3.55) (end -3.95 3.55) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.2 -2.25) (end -1.2 -3.25) (layer F.Fab) (width 0.15))
+    (fp_line (start -2.2 3.25) (end -2.2 -2.25) (layer F.Fab) (width 0.15))
+    (fp_line (start 2.2 3.25) (end -2.2 3.25) (layer F.Fab) (width 0.15))
+    (fp_line (start 2.2 -3.25) (end 2.2 3.25) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.2 -3.25) (end 2.2 -3.25) (layer F.Fab) (width 0.15))
+    (pad 20 smd rect (at 2.95 -2.925) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 3 "Net-(IC2-Pad20)"))
+    (pad 19 smd rect (at 2.95 -2.275) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 2 +5V))
+    (pad 18 smd rect (at 2.95 -1.625) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 17 smd rect (at 2.95 -0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 16 smd rect (at 2.95 -0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 19 /quack_connectors/QX2_5V))
+    (pad 15 smd rect (at 2.95 0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 18 /quack_connectors/QX1_5V))
+    (pad 14 smd rect (at 2.95 0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 17 /quack_connectors/QY1_5V))
+    (pad 13 smd rect (at 2.95 1.625) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 16 /quack_connectors/CLICK_5V))
+    (pad 12 smd rect (at 2.95 2.275) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 15 /quack_connectors/QY2_5V))
+    (pad 11 smd rect (at 2.95 2.925) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 10 smd rect (at -2.95 2.925) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 9 smd rect (at -2.95 2.275) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 24 QY2_3V))
+    (pad 8 smd rect (at -2.95 1.625) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 25 CLICK_3V))
+    (pad 7 smd rect (at -2.95 0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 21 QY1_3V))
+    (pad 6 smd rect (at -2.95 0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 22 QX1_3V))
+    (pad 5 smd rect (at -2.95 -0.325) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 23 QX2_3V))
+    (pad 4 smd rect (at -2.95 -0.975) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 3 smd rect (at -2.95 -1.625) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 2 smd rect (at -2.95 -2.275) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 1 smd rect (at -2.95 -2.925) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 26 ADB))
+    (model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Quack_MDIN4:57491811 (layer F.Cu) (tedit 5F5E633E) (tstamp 5F5EBD2A)
+    (at 158.75 116.5)
+    (descr 5749181-1-2)
+    (tags Connector)
+    (path /5F5EA845/5F5EB6CA)
+    (fp_text reference J1 (at -3.35 2.895) (layer F.SilkS)
+      (effects (font (size 1.27 1.27) (thickness 0.254)))
+    )
+    (fp_text value DIN-4 (at -3.35 2.895) (layer F.SilkS) hide
+      (effects (font (size 1.27 1.27) (thickness 0.254)))
+    )
+    (fp_arc (start 4.45 0) (end 4.6 0) (angle -180) (layer F.SilkS) (width 0.1))
+    (fp_arc (start 4.45 0) (end 4.5 0) (angle -180) (layer F.SilkS) (width 0.1))
+    (fp_line (start 4.6 0) (end 4.6 0) (layer F.SilkS) (width 0.1))
+    (fp_line (start 4.5 0) (end 4.5 0) (layer F.SilkS) (width 0.1))
+    (fp_line (start 3.65 -3.52) (end 3.65 0.3) (layer F.SilkS) (width 0.1))
+    (fp_line (start -10.35 -3.52) (end 3.65 -3.52) (layer F.SilkS) (width 0.1))
+    (fp_line (start -10.35 0.8) (end -10.35 -3.52) (layer F.SilkS) (width 0.1))
+    (fp_line (start 3.65 9.31) (end 3.65 5.3) (layer F.SilkS) (width 0.1))
+    (fp_line (start -10.35 9.31) (end 3.65 9.31) (layer F.SilkS) (width 0.1))
+    (fp_line (start -10.35 5.3) (end -10.35 9.31) (layer F.SilkS) (width 0.1))
+    (fp_line (start -12.788 -4.52) (end -12.788 10.31) (layer Dwgs.User) (width 0.1))
+    (fp_line (start 6.088 -4.52) (end -12.788 -4.52) (layer Dwgs.User) (width 0.1))
+    (fp_line (start 6.088 10.31) (end 6.088 -4.52) (layer Dwgs.User) (width 0.1))
+    (fp_line (start -12.788 10.31) (end 6.088 10.31) (layer Dwgs.User) (width 0.1))
+    (fp_line (start -10.35 -3.52) (end -10.35 9.31) (layer Dwgs.User) (width 0.2))
+    (fp_line (start 3.65 -3.52) (end -10.35 -3.52) (layer Dwgs.User) (width 0.2))
+    (fp_line (start 3.65 9.31) (end 3.65 -3.52) (layer Dwgs.User) (width 0.2))
+    (fp_line (start -10.35 9.31) (end 3.65 9.31) (layer Dwgs.User) (width 0.2))
+    (pad MH3 thru_hole circle (at 3.41 2.99 90) (size 3.356 3.356) (drill 2.237) (layers *.Cu *.Mask F.SilkS))
+    (pad MH2 thru_hole circle (at -10.11 2.99 90) (size 3.356 3.356) (drill 2.237) (layers *.Cu *.Mask F.SilkS))
+    (pad MH1 thru_hole circle (at -3.35 3.8 90) (size 3.356 3.356) (drill 2.237) (layers *.Cu *.Mask F.SilkS))
+    (pad 4 thru_hole circle (at -6.7 -2.5 90) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (pad 3 thru_hole circle (at 0 -2.5 90) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask F.SilkS)
+      (net 2 +5V))
+    (pad 2 thru_hole circle (at -6.7 0 90) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask F.SilkS))
+    (pad 1 thru_hole circle (at 0 0 90) (size 1.509 1.509) (drill 0.97) (layers *.Cu *.Mask F.SilkS)
+      (net 3 "Net-(IC2-Pad20)"))
+  )
+
+  (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5EC470)
+    (at 136.2225 95.25 180)
+    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /5F60FDC9)
+    (attr smd)
+    (fp_text reference C1 (at 0 1.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 10uF (at 0 1.65) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 2 +5V))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_Tantalum_SMD:CP_EIA-3528-12_Kemet-T (layer F.Cu) (tedit 5B342532) (tstamp 5F5EC5E8)
+    (at 142.24 102.87 270)
+    (descr "Tantalum Capacitor SMD Kemet-T (3528-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator")
+    (tags "capacitor tantalum")
+    (path /5F6139D7)
+    (attr smd)
+    (fp_text reference C2 (at 0 -2.76 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 100uF (at 0 2.35 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.88 0.88) (thickness 0.13)))
+    )
+    (fp_line (start 2.45 1.65) (end -2.45 1.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.45 -1.65) (end 2.45 1.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.45 -1.65) (end 2.45 -1.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.45 1.65) (end -2.45 -1.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.46 1.51) (end 1.75 1.51) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.46 -1.51) (end -2.46 1.51) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.75 -1.51) (end -2.46 -1.51) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.75 1.4) (end 1.75 -1.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.75 1.4) (end 1.75 1.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.75 -0.7) (end -1.75 1.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.05 -1.4) (end -1.75 -0.7) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.75 -1.4) (end -1.05 -1.4) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 1.5375 0 270) (size 1.325 2.35) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -1.5375 0 270) (size 1.325 2.35) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679)
+      (net 4 +3V3))
+    (model ${KISYS3DMOD}/Capacitor_Tantalum_SMD.3dshapes/CP_EIA-3528-12_Kemet-T.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Package_TO_SOT_SMD:SOT-223-3_TabPin2 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F5EC4DB)
+    (at 134.62 101.6 180)
+    (descr "module CMS SOT223 4 pins")
+    (tags "CMS SOT")
+    (path /5F607118)
+    (attr smd)
+    (fp_text reference U1 (at 3.62 -4.5) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value AMS1117-3.3 (at 0 4.5) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.85 -3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.85 3.35) (end 1.85 3.35) (layer F.Fab) (width 0.1))
+    (fp_line (start -4.1 -3.41) (end 1.91 -3.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.85 -3.35) (end 1.85 -3.35) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.85 3.41) (end 1.91 3.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.85 -2.35) (end -1.85 3.35) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.85 -2.35) (end -0.85 -3.35) (layer F.Fab) (width 0.1))
+    (fp_line (start -4.4 -3.6) (end -4.4 3.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.4 3.6) (end 4.4 3.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.4 3.6) (end 4.4 -3.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.4 -3.6) (end -4.4 -3.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.91 3.41) (end 1.91 2.15) (layer F.SilkS) (width 0.12))
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.8 0.8) (thickness 0.12)))
+    )
+    (pad 1 smd rect (at -3.15 -2.3 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 3 smd rect (at -3.15 2.3 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+      (net 2 +5V))
+    (pad 2 smd rect (at -3.15 0 180) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (pad 2 smd rect (at 3.15 0 180) (size 2 3.8) (layers F.Cu F.Paste F.Mask)
+      (net 4 +3V3))
+    (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-223.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module LED_SMD:LED_0805_2012Metric_Castellated (layer F.Cu) (tedit 5B36C52C) (tstamp 5F5ECBCF)
+    (at 140.97 124.46 180)
+    (descr "LED SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "LED castellated")
+    (path /5F6256F8)
+    (attr smd)
+    (fp_text reference D1 (at 0 1.96) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "BLUE LED" (at 0 -3.04) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.88 0.9) (end -1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.88 -0.9) (end 1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 -0.9) (end 1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 0.9) (end -1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.885 0.91) (end 1 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.885 -0.91) (end -1.885 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 -0.91) (end -1.885 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.3) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.7 -0.6) (end -1 -0.3) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end -0.7 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9625 0 180) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 5 "Net-(D1-Pad2)"))
+    (pad 1 smd roundrect (at -0.9625 0 180) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 1 GND))
+    (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0805_2012Metric_Castellated.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module LED_SMD:LED_0805_2012Metric_Castellated (layer F.Cu) (tedit 5B36C52C) (tstamp 5F5ECBE2)
+    (at 170.18 124.46)
+    (descr "LED SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "LED castellated")
+    (path /5F626D09)
+    (attr smd)
+    (fp_text reference D2 (at -0.18 -1.96) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "YELLOW LED" (at 0 3.04) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.88 0.9) (end -1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.88 -0.9) (end 1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 -0.9) (end 1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 0.9) (end -1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.885 0.91) (end 1 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.885 -0.91) (end -1.885 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 -0.91) (end -1.885 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.3) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.7 -0.6) (end -1 -0.3) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end -0.7 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9625 0) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 6 "Net-(D2-Pad2)"))
+    (pad 1 smd roundrect (at -0.9625 0) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 1 GND))
+    (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0805_2012Metric_Castellated.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module LED_SMD:LED_0805_2012Metric_Castellated (layer F.Cu) (tedit 5B36C52C) (tstamp 5F5ECBF5)
+    (at 179.07 124.46 180)
+    (descr "LED SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "LED castellated")
+    (path /5F62988B)
+    (attr smd)
+    (fp_text reference D3 (at 0 1.96) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "RED LED" (at 0 -3.04) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.88 0.9) (end -1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.88 -0.9) (end 1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 -0.9) (end 1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 0.9) (end -1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.885 0.91) (end 1 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.885 -0.91) (end -1.885 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 -0.91) (end -1.885 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.3) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.7 -0.6) (end -1 -0.3) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end -0.7 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9625 0 180) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 7 "Net-(D3-Pad2)"))
+    (pad 1 smd roundrect (at -0.9625 0 180) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 1 GND))
+    (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0805_2012Metric_Castellated.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module LED_SMD:LED_0805_2012Metric_Castellated (layer F.Cu) (tedit 5B36C52C) (tstamp 5F5ECC08)
+    (at 132.08 124.46)
+    (descr "LED SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "LED castellated")
+    (path /5F621DE4)
+    (attr smd)
+    (fp_text reference D4 (at 0 -1.96) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "GREEN LED" (at 0 3.04) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.88 0.9) (end -1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.88 -0.9) (end 1.88 0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 -0.9) (end 1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.88 0.9) (end -1.88 -0.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.885 0.91) (end 1 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.885 -0.91) (end -1.885 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 -0.91) (end -1.885 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.3) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.7 -0.6) (end -1 -0.3) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end -0.7 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9625 0) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 8 "Net-(D4-Pad2)"))
+    (pad 1 smd roundrect (at -0.9625 0) (size 1.325 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192308)
+      (net 1 GND))
+    (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0805_2012Metric_Castellated.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5ECC19)
+    (at 137.5 119.3175 270)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /5F62B2A2)
+    (attr smd)
+    (fp_text reference R1 (at -2.8175 0 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 33 (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 5 "Net-(D1-Pad2)"))
+    (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 9 "Net-(IC1-Pad14)"))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5ECC2A)
+    (at 170 119.0625 270)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /5F62BD09)
+    (attr smd)
+    (fp_text reference R2 (at -2.5625 0 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 120 (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 6 "Net-(D2-Pad2)"))
+    (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 10 "Net-(IC1-Pad15)"))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5ECC3B)
+    (at 172.5 119.0625 270)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /5F62CA4D)
+    (attr smd)
+    (fp_text reference R3 (at -2.5625 0 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 120 (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 7 "Net-(D3-Pad2)"))
+    (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 11 "Net-(IC1-Pad16)"))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5ECC4C)
+    (at 135 119.3175 90)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /5F63A510)
+    (attr smd)
+    (fp_text reference R4 (at 2.8175 0 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 120 (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 12 "Net-(IC1-Pad42)"))
+    (pad 1 smd roundrect (at -0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 8 "Net-(D4-Pad2)"))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F5ED76A)
+    (at 159 87 270)
+    (descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row")
+    (tags "Through hole pin header THT 1x04 2.54mm single row")
+    (path /5F5EA845/5F65399F)
+    (fp_text reference J3 (at 0 -3 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value FTDI (at 0 9.95 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 3.81) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.8 9.4) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 9.4) (end 1.8 9.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 -1.8) (end -1.8 9.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.33 1.27) (end 1.33 8.95) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 1.27) (end -1.33 8.95) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 8.95) (end 1.33 8.95) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 8.89) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 8.89) (end -1.27 8.89) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 -1.27) (end 1.27 8.89) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+    (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 GND))
+    (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 14 U0TXD))
+    (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 13 U0RXD))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 2 +5V))
+    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x04_P2.54mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5EE12E)
+    (at 151.5 93 90)
+    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /5F66FB55)
+    (attr smd)
+    (fp_text reference C3 (at 2.5 0 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 10 (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 4 +3V3))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5EE13F)
+    (at 149 93 90)
+    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /5F66EA30)
+    (attr smd)
+    (fp_text reference C4 (at 2.5 0 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 0.1 (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 4 +3V3))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_PinHeader_2.54mm:PinHeader_2x03_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F5EE15B)
+    (at 177.5 110)
+    (descr "Through hole straight pin header, 2x03, 2.54mm pitch, double rows")
+    (tags "Through hole pin header THT 2x03 2.54mm double row")
+    (path /5F5EA845/5F665D50)
+    (fp_text reference J4 (at 1.27 -2.33) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MODE (at 1.27 7.41) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 1.27 2.54 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.35 6.85) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 6.85) (end 4.35 6.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 -1.8) (end -1.8 6.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.87 -1.33) (end 3.87 6.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 1.27) (end -1.33 6.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 6.41) (end 3.87 6.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 6.35) (end -1.27 0) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.81 6.35) (end -1.27 6.35) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.81 -1.27) (end 3.81 6.35) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
+    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 GND))
+    (pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 28 ADBSRC))
+    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 GND))
+    (pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 29 BTOFF))
+    (pad 2 thru_hole oval (at 2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 GND))
+    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 20 FLASH))
+    (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x03_P2.54mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5F0EF9)
+    (at 149 101.0625 270)
+    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /5F6294FB)
+    (attr smd)
+    (fp_text reference C5 (at -0.0625 2 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 0.1uF (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 27 "Net-(C5-Pad1)"))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F5F0F0A)
+    (at 149 97 270)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /5F628CC1)
+    (attr smd)
+    (fp_text reference R5 (at 0 2 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 10k (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 27 "Net-(C5-Pad1)"))
+    (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 4 +3V3))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Quack_DB9:23018431 (layer F.Cu) (tedit 5F5F1DF5) (tstamp 5F5F6784)
+    (at 161 79 180)
+    (descr 2301843-1-3)
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+  (segment (start 161.86359 107.13641) (end 162.437201 107.710021) (width 0.25) (layer F.Cu) (net 24))
+  (segment (start 165.470529 104.487347) (end 165.487347 104.487347) (width 0.25) (layer B.Cu) (net 24))
+  (via (at 165.487347 104.487347) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 24))
+  (segment (start 162.437201 107.520675) (end 165.470529 104.487347) (width 0.25) (layer B.Cu) (net 24))
+  (segment (start 162.437201 108.08636) (end 162.437201 107.520675) (width 0.25) (layer B.Cu) (net 24))
+  (segment (start 165.487347 103.921662) (end 165.487347 104.487347) (width 0.25) (layer F.Cu) (net 24))
+  (segment (start 165.487347 100.832653) (end 165.487347 103.921662) (width 0.25) (layer F.Cu) (net 24))
+  (segment (start 166.255 100.065) (end 165.487347 100.832653) (width 0.25) (layer F.Cu) (net 24))
+  (segment (start 167.23 100.065) (end 166.255 100.065) (width 0.25) (layer F.Cu) (net 24) (status 10))
+  (segment (start 162.86359 107.5) (end 163.5 107.5) (width 0.25) (layer F.Cu) (net 25))
+  (segment (start 157.96 102.59641) (end 162.86359 107.5) (width 0.25) (layer F.Cu) (net 25))
+  (via (at 163.5 107.5) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 25))
+  (segment (start 157.96 101.09) (end 157.96 102.59641) (width 0.25) (layer F.Cu) (net 25) (status 10))
+  (segment (start 163.5 107.5) (end 167 104) (width 0.25) (layer B.Cu) (net 25))
+  (segment (start 167 104) (end 174.5 104) (width 0.25) (layer B.Cu) (net 25))
+  (segment (start 174.5 104) (end 175 103.5) (width 0.25) (layer B.Cu) (net 25))
+  (segment (start 175 102.83326) (end 174.16674 102) (width 0.25) (layer B.Cu) (net 25))
+  (segment (start 175 103.5) (end 175 102.83326) (width 0.25) (layer B.Cu) (net 25))
+  (segment (start 169.6 102) (end 169.5 101.9) (width 0.25) (layer B.Cu) (net 25))
+  (via (at 169.5 101.9) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 25))
+  (segment (start 174.16674 102) (end 169.6 102) (width 0.25) (layer B.Cu) (net 25))
+  (segment (start 168.415 99.415) (end 167.23 99.415) (width 0.25) (layer F.Cu) (net 25) (status 20))
+  (segment (start 169.5 100.5) (end 168.415 99.415) (width 0.25) (layer F.Cu) (net 25))
+  (segment (start 169.5 101.9) (end 169.5 100.5) (width 0.25) (layer F.Cu) (net 25))
+  (segment (start 158.96 101.09) (end 158.96 101.46) (width 0.25) (layer F.Cu) (net 26) (status 10))
+  (segment (start 158.96 102.32359) (end 158.96 101.09) (width 0.25) (layer F.Cu) (net 26) (status 20))
+  (segment (start 161.23359 102.5) (end 159.13641 102.5) (width 0.25) (layer F.Cu) (net 26))
+  (segment (start 164.926998 94) (end 164.274999 94.651999) (width 0.25) (layer F.Cu) (net 26))
+  (segment (start 164.274999 99.458591) (end 161.23359 102.5) (width 0.25) (layer F.Cu) (net 26))
+  (segment (start 165.77 94) (end 164.926998 94) (width 0.25) (layer F.Cu) (net 26))
+  (segment (start 164.274999 94.651999) (end 164.274999 99.458591) (width 0.25) (layer F.Cu) (net 26))
+  (segment (start 159.13641 102.5) (end 158.96 102.32359) (width 0.25) (layer F.Cu) (net 26))
+  (segment (start 166.635 94.865) (end 165.77 94) (width 0.25) (layer F.Cu) (net 26) (status 10))
+  (segment (start 167.23 94.865) (end 166.635 94.865) (width 0.25) (layer F.Cu) (net 26) (status 30))
+  (segment (start 149.04 99.04) (end 149 99) (width 0.25) (layer F.Cu) (net 27))
+  (segment (start 152.91 99.04) (end 149.04 99.04) (width 0.25) (layer F.Cu) (net 27) (status 10))
+  (segment (start 149 99) (end 149 100.125) (width 0.25) (layer F.Cu) (net 27) (status 20))
+  (segment (start 149 97.9375) (end 149 99) (width 0.25) (layer F.Cu) (net 27) (status 10))
+  (segment (start 152.374999 100.540001) (end 151.5 101.415) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 152.91 100.54) (end 152.374999 100.540001) (width 0.25) (layer F.Cu) (net 28) (status 10))
+  (segment (start 151.5 101.415) (end 151.5 101.5) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 151.5 101.5) (end 151.5 102) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 151.5 102) (end 153 103.5) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 153 103.5) (end 153 106.5) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 153 106.5) (end 152.5 107) (width 0.25) (layer F.Cu) (net 28))
+  (via (at 152 107) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 28))
+  (segment (start 152.5 107) (end 152 107) (width 0.25) (layer F.Cu) (net 28))
+  (via (at 161 109.5) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 28))
+  (segment (start 158.5 107) (end 161 109.5) (width 0.25) (layer B.Cu) (net 28))
+  (segment (start 152 107) (end 158.5 107) (width 0.25) (layer B.Cu) (net 28))
+  (via (at 175 115.5) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 28))
+  (segment (start 177.08 115.5) (end 177.5 115.08) (width 0.25) (layer B.Cu) (net 28) (status 30))
+  (segment (start 175 115.5) (end 177.08 115.5) (width 0.25) (layer B.Cu) (net 28) (status 20))
+  (segment (start 165.073002 107) (end 162.573002 109.5) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 162.573002 109.5) (end 161 109.5) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 174.5 107) (end 165.073002 107) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 175 107.5) (end 174.5 107) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 175 115.5) (end 175 107.5) (width 0.25) (layer F.Cu) (net 28))
+  (segment (start 136.87565 117.5) (end 136.47499 117.90066) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 154.86359 108) (end 165.8011 118.93751) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 153.55641 108) (end 154.86359 108) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 153.46 106.82359) (end 142.78359 117.5) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 142.3639 119.19251) (end 153.55641 108) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 136.69251 119.19251) (end 142.3639 119.19251) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 153.46 101.09) (end 153.46 106.82359) (width 0.25) (layer F.Cu) (net 29) (status 10))
+  (segment (start 136.47499 118.97499) (end 136.69251 119.19251) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 136.47499 117.90066) (end 136.47499 118.97499) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 142.78359 117.5) (end 136.87565 117.5) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 175.96 112.54) (end 177.5 112.54) (width 0.25) (layer B.Cu) (net 29) (status 20))
+  (segment (start 166.93751 118.93751) (end 167.43751 118.93751) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 165.8011 118.93751) (end 166.93751 118.93751) (width 0.25) (layer F.Cu) (net 29))
+  (via (at 168 120) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 29))
+  (segment (start 168 119.5) (end 168 120) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 167.43751 118.93751) (end 168 119.5) (width 0.25) (layer F.Cu) (net 29))
+  (segment (start 175.46 112.54) (end 177.5 112.54) (width 0.25) (layer B.Cu) (net 29) (status 20))
+  (segment (start 168 120) (end 175.46 112.54) (width 0.25) (layer B.Cu) (net 29))
+
+)
diff --git a/EDA/quack.net b/EDA/quack.net
new file mode 100644
index 0000000..64e38ba
--- /dev/null
+++ b/EDA/quack.net
@@ -0,0 +1,624 @@
+(export (version D)
+  (design
+    (source /Users/demik/github/quack/EDA/quack.sch)
+    (date "2020 September 14, Monday 09:39:46")
+    (tool "Eeschema (5.1.5-0-10_14)")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source quack.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value ""))))
+    (sheet (number 2) (name /quack_connectors/) (tstamps /5F5EA845/)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source quack_connectors.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref U1)
+      (value AMS1117-3.3)
+      (footprint Package_TO_SOT_SMD:SOT-223-3_TabPin2)
+      (datasheet http://www.advanced-monolithic.com/pdf/ds1117.pdf)
+      (libsource (lib Regulator_Linear) (part AMS1117-3.3) (description "1A Low Dropout regulator, positive, 3.3V fixed output, SOT-223"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F607118))
+    (comp (ref C1)
+      (value 10uF)
+      (footprint Capacitor_SMD:C_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part C) (description "Unpolarized capacitor"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F60FDC9))
+    (comp (ref C2)
+      (value 100uF)
+      (footprint Capacitor_Tantalum_SMD:CP_EIA-3528-12_Kemet-T)
+      (datasheet ~)
+      (libsource (lib Device) (part CP) (description "Polarized capacitor"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F6139D7))
+    (comp (ref D4)
+      (value "GREEN LED")
+      (footprint LED_SMD:LED_0805_2012Metric_Castellated)
+      (datasheet ~)
+      (libsource (lib Device) (part LED) (description "Light emitting diode"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F621DE4))
+    (comp (ref D1)
+      (value "BLUE LED")
+      (footprint LED_SMD:LED_0805_2012Metric_Castellated)
+      (datasheet ~)
+      (libsource (lib Device) (part LED) (description "Light emitting diode"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F6256F8))
+    (comp (ref D2)
+      (value "YELLOW LED")
+      (footprint LED_SMD:LED_0805_2012Metric_Castellated)
+      (datasheet ~)
+      (libsource (lib Device) (part LED) (description "Light emitting diode"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F626D09))
+    (comp (ref D3)
+      (value "RED LED")
+      (footprint LED_SMD:LED_0805_2012Metric_Castellated)
+      (datasheet ~)
+      (libsource (lib Device) (part LED) (description "Light emitting diode"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F62988B))
+    (comp (ref R1)
+      (value 33)
+      (footprint Resistor_SMD:R_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part R) (description Resistor))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F62B2A2))
+    (comp (ref R2)
+      (value 120)
+      (footprint Resistor_SMD:R_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part R) (description Resistor))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F62BD09))
+    (comp (ref R3)
+      (value 120)
+      (footprint Resistor_SMD:R_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part R) (description Resistor))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F62CA4D))
+    (comp (ref R4)
+      (value 120)
+      (footprint Resistor_SMD:R_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part R) (description Resistor))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F63A510))
+    (comp (ref C4)
+      (value 0.1)
+      (footprint Capacitor_SMD:C_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part C) (description "Unpolarized capacitor"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F66EA30))
+    (comp (ref C3)
+      (value 10)
+      (footprint Capacitor_SMD:C_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part C) (description "Unpolarized capacitor"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F66FB55))
+    (comp (ref IC1)
+      (value ESP32-PICO-D4)
+      (footprint ESP32-PICO-D4:ESP32-PICO-D4_1)
+      (datasheet https://hr.mouser.com/datasheet/2/891/esp32-pico-d4_datasheet_en-1365829.pdf)
+      (fields
+        (field (name Description) "ESP32-PICO-D4 module")
+        (field (name Manufacturer_Name) Espressif)
+        (field (name Manufacturer_Part_Number) ESP32-PICO-D4)
+        (field (name "Mouser Part Number") 356-ESP32-PICO-D4))
+      (libsource (lib ESP32-PICO-D4) (part ESP32-PICO-D4) (description "ESP32-PICO-D4 module"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F5E5479))
+    (comp (ref R5)
+      (value 10k)
+      (footprint Resistor_SMD:R_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part R) (description Resistor))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F628CC1))
+    (comp (ref C5)
+      (value 0.1uF)
+      (footprint Capacitor_SMD:C_0805_2012Metric)
+      (datasheet ~)
+      (libsource (lib Device) (part C) (description "Unpolarized capacitor"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5F6294FB))
+    (comp (ref J1)
+      (value DIN-4)
+      (footprint Quack_MDIN4:57491811)
+      (datasheet http://www.mouser.com/ds/2/18/40_c091_abd_e-75918.pdf)
+      (libsource (lib Connector) (part DIN-4) (description "4-pin DIN connector"))
+      (sheetpath (names /quack_connectors/) (tstamps /5F5EA845/))
+      (tstamp 5F5EB6CA))
+    (comp (ref J2)
+      (value DB9_Male)
+      (footprint Quack_DB9:23018431)
+      (datasheet " ~")
+      (libsource (lib Connector) (part DB9_Male) (description "9-pin male D-SUB connector"))
+      (sheetpath (names /quack_connectors/) (tstamps /5F5EA845/))
+      (tstamp 5F5EB6D0))
+    (comp (ref IC2)
+      (value TXB0108PWR)
+      (footprint Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm)
+      (datasheet http://www.ti.com/lit/ds/symlink/txb0108.pdf)
+      (fields
+        (field (name Description) "8-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect")
+        (field (name Height) 1.2)
+        (field (name Manufacturer_Name) "Texas Instruments")
+        (field (name Manufacturer_Part_Number) TXB0108PWR)
+        (field (name "Mouser Part Number") 595-TXB0108PWR)
+        (field (name "Mouser Price/Stock") https://www.mouser.co.uk/ProductDetail/Texas-Instruments/TXB0108PWR?qs=oFXvjAmG9EgEUWGWzOVFCA%3D%3D))
+      (libsource (lib TXB0108PWR) (part TXB0108PWR) (description "8-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect"))
+      (sheetpath (names /quack_connectors/) (tstamps /5F5EA845/))
+      (tstamp 5F5EC2ED))
+    (comp (ref J3)
+      (value FTDI)
+      (footprint Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical)
+      (datasheet ~)
+      (libsource (lib Connector_Generic) (part Conn_01x04) (description "Generic connector, single row, 01x04, script generated (kicad-library-utils/schlib/autogen/connector/)"))
+      (sheetpath (names /quack_connectors/) (tstamps /5F5EA845/))
+      (tstamp 5F65399F))
+    (comp (ref J4)
+      (value MODE)
+      (footprint Connector_PinHeader_2.54mm:PinHeader_2x03_P2.54mm_Vertical)
+      (datasheet ~)
+      (libsource (lib Connector_Generic) (part Conn_02x03_Odd_Even) (description "Generic connector, double row, 02x03, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)"))
+      (sheetpath (names /quack_connectors/) (tstamps /5F5EA845/))
+      (tstamp 5F665D50)))
+  (libparts
+    (libpart (lib Connector) (part DB9_Male)
+      (description "9-pin male D-SUB connector")
+      (docs " ~")
+      (footprints
+        (fp DSUB*Male*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) DB9_Male))
+      (pins
+        (pin (num 1) (name 1) (type passive))
+        (pin (num 2) (name 2) (type passive))
+        (pin (num 3) (name 3) (type passive))
+        (pin (num 4) (name 4) (type passive))
+        (pin (num 5) (name 5) (type passive))
+        (pin (num 6) (name 6) (type passive))
+        (pin (num 7) (name 7) (type passive))
+        (pin (num 8) (name 8) (type passive))
+        (pin (num 9) (name 9) (type passive))))
+    (libpart (lib Connector) (part DIN-4)
+      (description "4-pin DIN connector")
+      (docs http://www.mouser.com/ds/2/18/40_c091_abd_e-75918.pdf)
+      (footprints
+        (fp DIN*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) DIN-4))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))
+        (pin (num 3) (name ~) (type passive))
+        (pin (num 4) (name ~) (type passive))))
+    (libpart (lib Connector_Generic) (part Conn_01x04)
+      (description "Generic connector, single row, 01x04, script generated (kicad-library-utils/schlib/autogen/connector/)")
+      (docs ~)
+      (footprints
+        (fp Connector*:*_1x??_*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Conn_01x04))
+      (pins
+        (pin (num 1) (name Pin_1) (type passive))
+        (pin (num 2) (name Pin_2) (type passive))
+        (pin (num 3) (name Pin_3) (type passive))
+        (pin (num 4) (name Pin_4) (type passive))))
+    (libpart (lib Connector_Generic) (part Conn_02x03_Odd_Even)
+      (description "Generic connector, double row, 02x03, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)")
+      (docs ~)
+      (footprints
+        (fp Connector*:*_2x??_*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Conn_02x03_Odd_Even))
+      (pins
+        (pin (num 1) (name Pin_1) (type passive))
+        (pin (num 2) (name Pin_2) (type passive))
+        (pin (num 3) (name Pin_3) (type passive))
+        (pin (num 4) (name Pin_4) (type passive))
+        (pin (num 5) (name Pin_5) (type passive))
+        (pin (num 6) (name Pin_6) (type passive))))
+    (libpart (lib Device) (part C)
+      (description "Unpolarized capacitor")
+      (docs ~)
+      (footprints
+        (fp C_*))
+      (fields
+        (field (name Reference) C)
+        (field (name Value) C))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib Device) (part CP)
+      (description "Polarized capacitor")
+      (docs ~)
+      (footprints
+        (fp CP_*))
+      (fields
+        (field (name Reference) C)
+        (field (name Value) CP))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib Device) (part LED)
+      (description "Light emitting diode")
+      (docs ~)
+      (footprints
+        (fp LED*)
+        (fp LED_SMD:*)
+        (fp LED_THT:*))
+      (fields
+        (field (name Reference) D)
+        (field (name Value) LED))
+      (pins
+        (pin (num 1) (name K) (type passive))
+        (pin (num 2) (name A) (type passive))))
+    (libpart (lib Device) (part R)
+      (description Resistor)
+      (docs ~)
+      (footprints
+        (fp R_*))
+      (fields
+        (field (name Reference) R)
+        (field (name Value) R))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib ESP32-PICO-D4) (part ESP32-PICO-D4)
+      (description "ESP32-PICO-D4 module")
+      (docs https://hr.mouser.com/datasheet/2/891/esp32-pico-d4_datasheet_en-1365829.pdf)
+      (fields
+        (field (name Reference) IC)
+        (field (name Value) ESP32-PICO-D4)
+        (field (name Footprint) ESP32-PICO-D4_1)
+        (field (name Datasheet) https://hr.mouser.com/datasheet/2/891/esp32-pico-d4_datasheet_en-1365829.pdf)
+        (field (name Description) "ESP32-PICO-D4 module")
+        (field (name "Mouser Part Number") 356-ESP32-PICO-D4)
+        (field (name Manufacturer_Name) Espressif)
+        (field (name Manufacturer_Part_Number) ESP32-PICO-D4))
+      (pins
+        (pin (num 1) (name VDDA_1) (type passive))
+        (pin (num 2) (name LNA_IN) (type passive))
+        (pin (num 3) (name VDDA3P3_1) (type passive))
+        (pin (num 4) (name VDDA3P3_2) (type passive))
+        (pin (num 5) (name SENSOR_VP) (type passive))
+        (pin (num 6) (name SENSOR_CAPP) (type passive))
+        (pin (num 7) (name SENSOR_CAPN) (type passive))
+        (pin (num 8) (name SENSOR_VN) (type passive))
+        (pin (num 9) (name EN) (type passive))
+        (pin (num 10) (name IO34) (type passive))
+        (pin (num 11) (name IO35) (type passive))
+        (pin (num 12) (name IO32) (type passive))
+        (pin (num 13) (name IO33) (type passive))
+        (pin (num 14) (name IO25) (type passive))
+        (pin (num 15) (name IO26) (type passive))
+        (pin (num 16) (name IO27) (type passive))
+        (pin (num 17) (name IO14) (type passive))
+        (pin (num 18) (name IO12) (type passive))
+        (pin (num 19) (name VDD3P3_RTC) (type passive))
+        (pin (num 20) (name IO13) (type passive))
+        (pin (num 21) (name IO15) (type passive))
+        (pin (num 22) (name IO2) (type passive))
+        (pin (num 23) (name IO0) (type passive))
+        (pin (num 24) (name IO4) (type passive))
+        (pin (num 25) (name IO16) (type passive))
+        (pin (num 26) (name VDD_SDIO_NC) (type passive))
+        (pin (num 27) (name IO17) (type passive))
+        (pin (num 28) (name SD2) (type passive))
+        (pin (num 29) (name SD3) (type passive))
+        (pin (num 30) (name CMD) (type passive))
+        (pin (num 31) (name CLK) (type passive))
+        (pin (num 32) (name SD0) (type passive))
+        (pin (num 33) (name SD1) (type passive))
+        (pin (num 34) (name IO5) (type passive))
+        (pin (num 35) (name IO18) (type passive))
+        (pin (num 36) (name IO23) (type passive))
+        (pin (num 37) (name VDD3P3_CPU) (type passive))
+        (pin (num 38) (name IO19) (type passive))
+        (pin (num 39) (name IO22) (type passive))
+        (pin (num 40) (name U0RXD) (type passive))
+        (pin (num 41) (name U0TXD) (type passive))
+        (pin (num 42) (name IO21) (type passive))
+        (pin (num 43) (name VDDA_2) (type passive))
+        (pin (num 44) (name XTAL_N_NC) (type passive))
+        (pin (num 45) (name XTAL_P_NC) (type passive))
+        (pin (num 46) (name VDDA_3) (type passive))
+        (pin (num 47) (name CAP2_NC) (type passive))
+        (pin (num 48) (name CAP1_NC) (type passive))
+        (pin (num 49) (name GND) (type passive))))
+    (libpart (lib Regulator_Linear) (part AP1117-15)
+      (aliases
+        (alias AP1117-18)
+        (alias AP1117-25)
+        (alias AP1117-33)
+        (alias AP1117-50)
+        (alias LD1117S33TR_SOT223)
+        (alias LD1117S12TR_SOT223)
+        (alias LD1117S18TR_SOT223)
+        (alias LD1117S25TR_SOT223)
+        (alias LD1117S50TR_SOT223)
+        (alias NCP1117-12_SOT223)
+        (alias NCP1117-1.5_SOT223)
+        (alias NCP1117-1.8_SOT223)
+        (alias NCP1117-2.0_SOT223)
+        (alias NCP1117-2.5_SOT223)
+        (alias NCP1117-2.85_SOT223)
+        (alias NCP1117-3.3_SOT223)
+        (alias NCP1117-5.0_SOT223)
+        (alias AMS1117-1.5)
+        (alias AMS1117-1.8)
+        (alias AMS1117-2.5)
+        (alias AMS1117-2.85)
+        (alias AMS1117-3.3)
+        (alias AMS1117-5.0))
+      (description "1A Low Dropout regulator, positive, 1.5V fixed output, SOT-223")
+      (docs http://www.diodes.com/datasheets/AP1117.pdf)
+      (footprints
+        (fp SOT?223*TabPin2*))
+      (fields
+        (field (name Reference) U)
+        (field (name Value) AP1117-15)
+        (field (name Footprint) Package_TO_SOT_SMD:SOT-223-3_TabPin2))
+      (pins
+        (pin (num 1) (name GND) (type power_in))
+        (pin (num 2) (name VO) (type power_out))
+        (pin (num 3) (name VI) (type power_in))))
+    (libpart (lib TXB0108PWR) (part TXB0108PWR)
+      (description "8-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect")
+      (docs http://www.ti.com/lit/ds/symlink/txb0108.pdf)
+      (fields
+        (field (name Reference) IC)
+        (field (name Value) TXB0108PWR)
+        (field (name Footprint) SOP65P640X120-20N)
+        (field (name Datasheet) http://www.ti.com/lit/ds/symlink/txb0108.pdf)
+        (field (name Description) "8-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect")
+        (field (name Height) 1.2)
+        (field (name "Mouser Part Number") 595-TXB0108PWR)
+        (field (name "Mouser Price/Stock") https://www.mouser.co.uk/ProductDetail/Texas-Instruments/TXB0108PWR?qs=oFXvjAmG9EgEUWGWzOVFCA%3D%3D)
+        (field (name Manufacturer_Name) "Texas Instruments")
+        (field (name Manufacturer_Part_Number) TXB0108PWR))
+      (pins
+        (pin (num 1) (name A1) (type passive))
+        (pin (num 2) (name VCCA) (type passive))
+        (pin (num 3) (name A2) (type passive))
+        (pin (num 4) (name A3) (type passive))
+        (pin (num 5) (name A4) (type passive))
+        (pin (num 6) (name A5) (type passive))
+        (pin (num 7) (name A6) (type passive))
+        (pin (num 8) (name A7) (type passive))
+        (pin (num 9) (name A8) (type passive))
+        (pin (num 10) (name OE) (type passive))
+        (pin (num 11) (name GND) (type passive))
+        (pin (num 12) (name B8) (type passive))
+        (pin (num 13) (name B7) (type passive))
+        (pin (num 14) (name B6) (type passive))
+        (pin (num 15) (name B5) (type passive))
+        (pin (num 16) (name B4) (type passive))
+        (pin (num 17) (name B3) (type passive))
+        (pin (num 18) (name B2) (type passive))
+        (pin (num 19) (name VCCB) (type passive))
+        (pin (num 20) (name B1) (type passive)))))
+  (libraries
+    (library (logical Connector)
+      (uri "/Library/Application Support/kicad/library/Connector.lib"))
+    (library (logical Connector_Generic)
+      (uri "/Library/Application Support/kicad/library/Connector_Generic.lib"))
+    (library (logical Device)
+      (uri "/Library/Application Support/kicad/library/Device.lib"))
+    (library (logical ESP32-PICO-D4)
+      (uri /Users/demik/github/quack/EDA/ESP32-PICO-D4.lib))
+    (library (logical Regulator_Linear)
+      (uri "/Library/Application Support/kicad/library/Regulator_Linear.lib"))
+    (library (logical TXB0108PWR)
+      (uri /Users/demik/github/quack/EDA/TXB0108PWR.lib)))
+  (nets
+    (net (code 1) (name +3V3)
+      (node (ref R5) (pin 1))
+      (node (ref U1) (pin 2))
+      (node (ref C3) (pin 1))
+      (node (ref IC2) (pin 2))
+      (node (ref IC1) (pin 46))
+      (node (ref IC1) (pin 1))
+      (node (ref IC1) (pin 3))
+      (node (ref IC1) (pin 4))
+      (node (ref C2) (pin 1))
+      (node (ref IC1) (pin 43))
+      (node (ref IC1) (pin 37))
+      (node (ref C4) (pin 1))
+      (node (ref IC1) (pin 19)))
+    (net (code 2) (name +5V)
+      (node (ref J3) (pin 1))
+      (node (ref IC2) (pin 19))
+      (node (ref J2) (pin 2))
+      (node (ref J1) (pin 3))
+      (node (ref C1) (pin 1))
+      (node (ref U1) (pin 3)))
+    (net (code 3) (name GND)
+      (node (ref D3) (pin 1))
+      (node (ref U1) (pin 1))
+      (node (ref C1) (pin 2))
+      (node (ref C4) (pin 2))
+      (node (ref C3) (pin 2))
+      (node (ref J1) (pin 4))
+      (node (ref J2) (pin 1))
+      (node (ref J2) (pin 3))
+      (node (ref IC2) (pin 10))
+      (node (ref J4) (pin 6))
+      (node (ref J4) (pin 4))
+      (node (ref J4) (pin 2))
+      (node (ref IC2) (pin 11))
+      (node (ref J3) (pin 4))
+      (node (ref IC1) (pin 49))
+      (node (ref C5) (pin 2))
+      (node (ref D2) (pin 1))
+      (node (ref C2) (pin 2))
+      (node (ref D1) (pin 1))
+      (node (ref D4) (pin 1)))
+    (net (code 4) (name "Net-(IC1-Pad31)")
+      (node (ref IC1) (pin 31)))
+    (net (code 5) (name "Net-(IC1-Pad32)")
+      (node (ref IC1) (pin 32)))
+    (net (code 6) (name "Net-(IC1-Pad33)")
+      (node (ref IC1) (pin 33)))
+    (net (code 7) (name "Net-(IC1-Pad30)")
+      (node (ref IC1) (pin 30)))
+    (net (code 8) (name "Net-(IC1-Pad25)")
+      (node (ref IC1) (pin 25)))
+    (net (code 9) (name "Net-(IC1-Pad27)")
+      (node (ref IC1) (pin 27)))
+    (net (code 10) (name "Net-(IC1-Pad42)")
+      (node (ref R4) (pin 2))
+      (node (ref IC1) (pin 42)))
+    (net (code 11) (name "Net-(D1-Pad2)")
+      (node (ref D1) (pin 2))
+      (node (ref R1) (pin 2)))
+    (net (code 12) (name "Net-(D2-Pad2)")
+      (node (ref D2) (pin 2))
+      (node (ref R2) (pin 2)))
+    (net (code 13) (name "Net-(D3-Pad2)")
+      (node (ref D3) (pin 2))
+      (node (ref R3) (pin 2)))
+    (net (code 14) (name "Net-(IC1-Pad14)")
+      (node (ref R1) (pin 1))
+      (node (ref IC1) (pin 14)))
+    (net (code 15) (name "Net-(IC1-Pad15)")
+      (node (ref R2) (pin 1))
+      (node (ref IC1) (pin 15)))
+    (net (code 16) (name "Net-(IC1-Pad16)")
+      (node (ref R3) (pin 1))
+      (node (ref IC1) (pin 16)))
+    (net (code 17) (name "Net-(D4-Pad2)")
+      (node (ref D4) (pin 2))
+      (node (ref R4) (pin 1)))
+    (net (code 18) (name U0RXD)
+      (node (ref IC1) (pin 40))
+      (node (ref J3) (pin 2)))
+    (net (code 19) (name U0TXD)
+      (node (ref J3) (pin 3))
+      (node (ref IC1) (pin 41)))
+    (net (code 20) (name FLASH)
+      (node (ref J4) (pin 1))
+      (node (ref IC1) (pin 23)))
+    (net (code 21) (name QX1_3V)
+      (node (ref IC1) (pin 18))
+      (node (ref IC2) (pin 6)))
+    (net (code 22) (name QX2_3V)
+      (node (ref IC1) (pin 20))
+      (node (ref IC2) (pin 5)))
+    (net (code 23) (name QY1_3V)
+      (node (ref IC2) (pin 7))
+      (node (ref IC1) (pin 17)))
+    (net (code 24) (name QY2_3V)
+      (node (ref IC2) (pin 9))
+      (node (ref IC1) (pin 21)))
+    (net (code 25) (name CLICK_3V)
+      (node (ref IC1) (pin 22))
+      (node (ref IC2) (pin 8)))
+    (net (code 26) (name ADB)
+      (node (ref IC2) (pin 1))
+      (node (ref IC1) (pin 24)))
+    (net (code 27) (name "Net-(IC1-Pad7)")
+      (node (ref IC1) (pin 7)))
+    (net (code 28) (name "Net-(IC1-Pad8)")
+      (node (ref IC1) (pin 8)))
+    (net (code 29) (name "Net-(IC1-Pad6)")
+      (node (ref IC1) (pin 6)))
+    (net (code 30) (name "Net-(IC1-Pad5)")
+      (node (ref IC1) (pin 5)))
+    (net (code 31) (name "Net-(IC1-Pad45)")
+      (node (ref IC1) (pin 45)))
+    (net (code 32) (name "Net-(IC1-Pad44)")
+      (node (ref IC1) (pin 44)))
+    (net (code 33) (name "Net-(IC1-Pad47)")
+      (node (ref IC1) (pin 47)))
+    (net (code 34) (name "Net-(IC1-Pad48)")
+      (node (ref IC1) (pin 48)))
+    (net (code 35) (name "Net-(IC1-Pad2)")
+      (node (ref IC1) (pin 2)))
+    (net (code 36) (name "Net-(IC1-Pad10)")
+      (node (ref IC1) (pin 10)))
+    (net (code 37) (name "Net-(IC1-Pad11)")
+      (node (ref IC1) (pin 11)))
+    (net (code 38) (name "Net-(IC1-Pad26)")
+      (node (ref IC1) (pin 26)))
+    (net (code 39) (name "Net-(IC1-Pad28)")
+      (node (ref IC1) (pin 28)))
+    (net (code 40) (name "Net-(IC1-Pad29)")
+      (node (ref IC1) (pin 29)))
+    (net (code 41) (name "Net-(IC1-Pad34)")
+      (node (ref IC1) (pin 34)))
+    (net (code 42) (name "Net-(IC1-Pad35)")
+      (node (ref IC1) (pin 35)))
+    (net (code 43) (name "Net-(IC1-Pad36)")
+      (node (ref IC1) (pin 36)))
+    (net (code 44) (name "Net-(IC1-Pad38)")
+      (node (ref IC1) (pin 38)))
+    (net (code 45) (name "Net-(IC1-Pad39)")
+      (node (ref IC1) (pin 39)))
+    (net (code 46) (name BTOFF)
+      (node (ref J4) (pin 3))
+      (node (ref IC1) (pin 13)))
+    (net (code 47) (name ADBSRC)
+      (node (ref J4) (pin 5))
+      (node (ref IC1) (pin 12)))
+    (net (code 49) (name "Net-(C5-Pad1)")
+      (node (ref IC1) (pin 9))
+      (node (ref R5) (pin 2))
+      (node (ref C5) (pin 1)))
+    (net (code 50) (name "Net-(IC2-Pad20)")
+      (node (ref J1) (pin 1))
+      (node (ref IC2) (pin 20)))
+    (net (code 51) (name "Net-(J1-Pad2)")
+      (node (ref J1) (pin 2)))
+    (net (code 52) (name "Net-(J2-Pad6)")
+      (node (ref J2) (pin 6)))
+    (net (code 53) (name "Net-(IC2-Pad3)")
+      (node (ref IC2) (pin 3)))
+    (net (code 54) (name "Net-(IC2-Pad4)")
+      (node (ref IC2) (pin 4)))
+    (net (code 55) (name "Net-(IC2-Pad18)")
+      (node (ref IC2) (pin 18)))
+    (net (code 56) (name "Net-(IC2-Pad17)")
+      (node (ref IC2) (pin 17)))
+    (net (code 57) (name /quack_connectors/CLICK_5V)
+      (node (ref J2) (pin 7))
+      (node (ref IC2) (pin 13)))
+    (net (code 58) (name /quack_connectors/QX2_5V)
+      (node (ref J2) (pin 4))
+      (node (ref IC2) (pin 16)))
+    (net (code 59) (name /quack_connectors/QX1_5V)
+      (node (ref IC2) (pin 15))
+      (node (ref J2) (pin 5)))
+    (net (code 60) (name /quack_connectors/QY1_5V)
+      (node (ref IC2) (pin 14))
+      (node (ref J2) (pin 9)))
+    (net (code 61) (name /quack_connectors/QY2_5V)
+      (node (ref J2) (pin 8))
+      (node (ref IC2) (pin 12)))))
\ No newline at end of file
diff --git a/EDA/quack.pro b/EDA/quack.pro
new file mode 100644
index 0000000..1376711
--- /dev/null
+++ b/EDA/quack.pro
@@ -0,0 +1,270 @@
+update=2020 September 13, Sunday 23:45:45
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=Pcbnew
+SpiceAjustPassiveValues=0
+LabSize=50
+ERC_TestSimilarLabels=1
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=quack.net
+CopperLayerCount=2
+BoardThickness=1.6
+AllowMicroVias=0
+AllowBlindVias=0
+RequireCourtyardDefinitions=0
+ProhibitOverlappingCourtyards=1
+MinTrackWidth=0.2
+MinViaDiameter=0.4
+MinViaDrill=0.3
+MinMicroViaDiameter=0.2
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.25
+ViaDiameter1=0.8
+ViaDrill1=0.4
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.12
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=1.5
+CopperTextSizeH=1.5
+CopperTextThickness=0.3
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.05
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0.051
+SolderMaskMinWidth=0.25
+SolderPasteClearance=0
+SolderPasteRatio=-0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=In1.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In2.Cu]
+Name=In2.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In4.Cu]
+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In8.Cu]
+Name=In8.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In9.Cu]
+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In15.Cu]
+Name=In15.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In16.Cu]
+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In18.Cu]
+Name=In18.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In19.Cu]
+Name=In19.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In20.Cu]
+Name=In20.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In21.Cu]
+Name=In21.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In22.Cu]
+Name=In22.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In23.Cu]
+Name=In23.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In24.Cu]
+Name=In24.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In25.Cu]
+Name=In25.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In26.Cu]
+Name=In26.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In27.Cu]
+Name=In27.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In28.Cu]
+Name=In28.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In29.Cu]
+Name=In29.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In30.Cu]
+Name=In30.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.B.Cu]
+Name=B.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.B.Adhes]
+Enabled=0
+[pcbnew/Layer.F.Adhes]
+Enabled=1
+[pcbnew/Layer.B.Paste]
+Enabled=0
+[pcbnew/Layer.F.Paste]
+Enabled=1
+[pcbnew/Layer.B.SilkS]
+Enabled=0
+[pcbnew/Layer.F.SilkS]
+Enabled=1
+[pcbnew/Layer.B.Mask]
+Enabled=1
+[pcbnew/Layer.F.Mask]
+Enabled=1
+[pcbnew/Layer.Dwgs.User]
+Enabled=1
+[pcbnew/Layer.Cmts.User]
+Enabled=1
+[pcbnew/Layer.Eco1.User]
+Enabled=1
+[pcbnew/Layer.Eco2.User]
+Enabled=1
+[pcbnew/Layer.Edge.Cuts]
+Enabled=1
+[pcbnew/Layer.Margin]
+Enabled=1
+[pcbnew/Layer.B.CrtYd]
+Enabled=1
+[pcbnew/Layer.F.CrtYd]
+Enabled=1
+[pcbnew/Layer.B.Fab]
+Enabled=0
+[pcbnew/Layer.F.Fab]
+Enabled=1
+[pcbnew/Layer.Rescue]
+Enabled=0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/Default]
+Name=Default
+Clearance=0.2
+TrackWidth=0.25
+ViaDiameter=0.8
+ViaDrill=0.4
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
+[pcbnew/Netclasses/1]
+Name=+V
+Clearance=0.2
+TrackWidth=0.4
+ViaDiameter=1
+ViaDrill=0.4
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
+[pcbnew/Netclasses/2]
+Name=GND
+Clearance=0.2
+TrackWidth=1
+ViaDiameter=1.6
+ViaDrill=0.8
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
diff --git a/EDA/quack.sch b/EDA/quack.sch
new file mode 100644
index 0000000..4b9cbaa
--- /dev/null
+++ b/EDA/quack.sch
@@ -0,0 +1,531 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 2
+Title "Quack Mouse Adapter"
+Date "2020-09-14"
+Rev "1.0"
+Comp "Lostwave"
+Comment1 "https://68kmla.org"
+Comment2 "https://github.com/demik/quack/tree/master/EDA"
+Comment3 ""
+Comment4 ""
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+F1 "quack_connectors.sch" 50
+$EndSheet
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+F 2 "Package_TO_SOT_SMD:SOT-223-3_TabPin2" H 9000 2200 50  0001 C CNN
+F 3 "http://www.advanced-monolithic.com/pdf/ds1117.pdf" H 9100 1750 50  0001 C CNN
+	1    9000 2000
+	1    0    0    -1  
+$EndComp
+$Comp
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+F 2 "" H 9000 2600 50  0001 C CNN
+F 3 "" H 9000 2600 50  0001 C CNN
+	1    9000 2600
+	1    0    0    -1  
+$EndComp
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+F 2 "" H 8500 1750 50  0001 C CNN
+F 3 "" H 8500 1750 50  0001 C CNN
+	1    8500 1750
+	1    0    0    -1  
+$EndComp
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+F 2 "" H 9500 1750 50  0001 C CNN
+F 3 "" H 9500 1750 50  0001 C CNN
+	1    9500 1750
+	1    0    0    -1  
+$EndComp
+$Comp
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+F 3 "~" H 8500 2250 50  0001 C CNN
+	1    8500 2250
+	1    0    0    -1  
+$EndComp
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+Wire Wire Line
+	9000 2500 8500 2500
+Wire Wire Line
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+Connection ~ 9000 2500
+Wire Wire Line
+	9000 2500 9000 2600
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 8500 2000
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+F 2 "Capacitor_Tantalum_SMD:CP_EIA-3528-12_Kemet-T" H 9538 2100 50  0001 C CNN
+F 3 "~" H 9500 2250 50  0001 C CNN
+	1    9500 2250
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 9500 2000
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+	1    4850 1400
+	1    0    0    -1  
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+F 1 "GND" H 6055 4527 50  0000 C CNN
+F 2 "" H 6050 4700 50  0001 C CNN
+F 3 "" H 6050 4700 50  0001 C CNN
+	1    6050 4700
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+Wire Wire Line
+	6050 4600 6050 4700
+Wire Wire Line
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+Wire Wire Line
+	4950 1500 5050 1500
+Connection ~ 5050 1500
+Wire Wire Line
+	5050 1500 5150 1500
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 5150 1500
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+F 2 "" H 6500 3500 50  0001 C CNN
+F 3 "" H 6500 3500 50  0001 C CNN
+	1    6500 3500
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	5950 3500 6500 3500
+NoConn ~ 5950 2900
+NoConn ~ 5950 3000
+NoConn ~ 5950 3100
+NoConn ~ 4150 4700
+NoConn ~ 4150 4200
+NoConn ~ 4150 4400
+$Comp
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+P 7250 4000
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+F 1 "GREEN LED" H 7243 4125 50  0000 C CNN
+F 2 "LED_SMD:LED_0805_2012Metric_Castellated" H 7250 4000 50  0001 C CNN
+F 3 "~" H 7250 4000 50  0001 C CNN
+	1    7250 4000
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	5950 4000 6600 4000
+$Comp
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+U 1 1 5F6256F8
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+F 1 "BLUE LED" H 2743 3125 50  0000 C CNN
+F 2 "LED_SMD:LED_0805_2012Metric_Castellated" H 2750 3000 50  0001 C CNN
+F 3 "~" H 2750 3000 50  0001 C CNN
+	1    2750 3000
+	1    0    0    -1  
+$EndComp
+$Comp
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+U 1 1 5F626D09
+P 2750 3500
+F 0 "D2" H 2743 3716 50  0000 C CNN
+F 1 "YELLOW LED" H 2743 3625 50  0000 C CNN
+F 2 "LED_SMD:LED_0805_2012Metric_Castellated" H 2750 3500 50  0001 C CNN
+F 3 "~" H 2750 3500 50  0001 C CNN
+	1    2750 3500
+	1    0    0    -1  
+$EndComp
+$Comp
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+U 1 1 5F62988B
+P 2750 4000
+F 0 "D3" H 2743 4216 50  0000 C CNN
+F 1 "RED LED" H 2743 4125 50  0000 C CNN
+F 2 "LED_SMD:LED_0805_2012Metric_Castellated" H 2750 4000 50  0001 C CNN
+F 3 "~" H 2750 4000 50  0001 C CNN
+	1    2750 4000
+	1    0    0    -1  
+$EndComp
+$Comp
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+U 1 1 5F62B2A2
+P 3250 3000
+F 0 "R1" V 3043 3000 50  0000 C CNN
+F 1 "33" V 3134 3000 50  0000 C CNN
+F 2 "Resistor_SMD:R_0805_2012Metric" V 3180 3000 50  0001 C CNN
+F 3 "~" H 3250 3000 50  0001 C CNN
+	1    3250 3000
+	0    1    1    0   
+$EndComp
+$Comp
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+U 1 1 5F62BD09
+P 3250 3500
+F 0 "R2" V 3043 3500 50  0000 C CNN
+F 1 "120" V 3134 3500 50  0000 C CNN
+F 2 "Resistor_SMD:R_0805_2012Metric" V 3180 3500 50  0001 C CNN
+F 3 "~" H 3250 3500 50  0001 C CNN
+	1    3250 3500
+	0    1    1    0   
+$EndComp
+$Comp
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+F 2 "Resistor_SMD:R_0805_2012Metric" V 3180 4000 50  0001 C CNN
+F 3 "~" H 3250 4000 50  0001 C CNN
+	1    3250 4000
+	0    1    1    0   
+$EndComp
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+Wire Wire Line
+	3100 3500 2900 3500
+Wire Wire Line
+	3100 4000 2900 4000
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	3600 3400 3600 4000
+Wire Wire Line
+	3600 4000 3400 4000
+Wire Wire Line
+	3600 3200 3600 3000
+Wire Wire Line
+	3400 3000 3600 3000
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+U 1 1 5F631BD7
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+F 2 "" H 2250 4100 50  0001 C CNN
+F 3 "" H 2250 4100 50  0001 C CNN
+	1    2250 4100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Connection ~ 2250 4000
+Wire Wire Line
+	2250 4000 2250 4100
+Connection ~ 2250 3500
+Wire Wire Line
+	2250 3500 2250 4000
+Wire Wire Line
+	2250 3000 2600 3000
+Wire Wire Line
+	2250 3500 2600 3500
+Wire Wire Line
+	2250 4000 2600 4000
+$Comp
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+U 1 1 5F63A510
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+F 1 "120" V 6634 4000 50  0000 C CNN
+F 2 "Resistor_SMD:R_0805_2012Metric" V 6680 4000 50  0001 C CNN
+F 3 "~" H 6750 4000 50  0001 C CNN
+	1    6750 4000
+	0    1    1    0   
+$EndComp
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+$Comp
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+U 1 1 5F64B0BE
+P 7750 4100
+F 0 "#PWR0115" H 7750 3850 50  0001 C CNN
+F 1 "GND" H 7755 3927 50  0000 C CNN
+F 2 "" H 7750 4100 50  0001 C CNN
+F 3 "" H 7750 4100 50  0001 C CNN
+	1    7750 4100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	7750 4000 7400 4000
+Text GLabel 6050 3800 2    50   Input ~ 0
+U0RXD
+Text GLabel 6050 3900 2    50   Output ~ 0
+U0TXD
+Wire Wire Line
+	6050 3800 5950 3800
+Wire Wire Line
+	6050 3900 5950 3900
+Text GLabel 4050 4000 0    50   UnSpc ~ 0
+FLASH
+Wire Wire Line
+	4150 4000 4050 4000
+$Comp
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+U 1 1 5F66EA30
+P 4500 1750
+F 0 "C4" H 4615 1796 50  0000 L CNN
+F 1 "0.1" H 4615 1705 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0805_2012Metric" H 4538 1600 50  0001 C CNN
+F 3 "~" H 4500 1750 50  0001 C CNN
+	1    4500 1750
+	1    0    0    -1  
+$EndComp
+$Comp
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+U 1 1 5F66FB55
+P 4000 1750
+F 0 "C3" H 4115 1796 50  0000 L CNN
+F 1 "10" H 4115 1705 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0805_2012Metric" H 4038 1600 50  0001 C CNN
+F 3 "~" H 4000 1750 50  0001 C CNN
+	1    4000 1750
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4750 1500 4500 1500
+Wire Wire Line
+	4000 1500 4000 1600
+Connection ~ 4750 1500
+$Comp
+L power:GND #PWR0118
+U 1 1 5F671A03
+P 4000 2100
+F 0 "#PWR0118" H 4000 1850 50  0001 C CNN
+F 1 "GND" H 4005 1927 50  0000 C CNN
+F 2 "" H 4000 2100 50  0001 C CNN
+F 3 "" H 4000 2100 50  0001 C CNN
+	1    4000 2100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4000 2100 4000 2000
+Wire Wire Line
+	4500 1900 4500 2000
+Wire Wire Line
+	4500 2000 4000 2000
+Connection ~ 4000 2000
+Wire Wire Line
+	4000 2000 4000 1900
+Wire Wire Line
+	4500 1600 4500 1500
+Connection ~ 4500 1500
+Wire Wire Line
+	4500 1500 4000 1500
+Text GLabel 4050 3600 0    50   Output ~ 0
+QX1_3V
+Text GLabel 4050 3700 0    50   Output ~ 0
+QX2_3V
+Text GLabel 4050 3500 0    50   Output ~ 0
+QY1_3V
+Text GLabel 4050 3800 0    50   Output ~ 0
+QY2_3V
+Text GLabel 4050 3900 0    50   Output ~ 0
+CLICK_3V
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	4050 3800 4150 3800
+Wire Wire Line
+	4050 3900 4150 3900
+Text GLabel 4050 4100 0    50   BiDi ~ 0
+ADB
+Wire Wire Line
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+NoConn ~ 5950 4100
+NoConn ~ 4150 5000
+NoConn ~ 4150 4900
+NoConn ~ 4150 4800
+NoConn ~ 5950 4300
+NoConn ~ 5950 4200
+NoConn ~ 5950 4400
+NoConn ~ 5950 4500
+$Comp
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+U 1 1 5F5E5479
+P 4150 2900
+F 0 "IC1" H 5050 327 50  0000 C CNN
+F 1 "ESP32-PICO-D4" H 5050 236 50  0000 C CNN
+F 2 "ESP32-PICO-D4:ESP32-PICO-D4_1" H 5800 3600 50  0001 L CNN
+F 3 "https://hr.mouser.com/datasheet/2/891/esp32-pico-d4_datasheet_en-1365829.pdf" H 5800 3500 50  0001 L CNN
+F 4 "ESP32-PICO-D4 module" H 5800 3400 50  0001 L CNN "Description"
+F 5 "" H 5800 3300 50  0001 L CNN "Height"
+F 6 "356-ESP32-PICO-D4" H 5800 3200 50  0001 L CNN "Mouser Part Number"
+F 7 "" H 5800 3100 50  0001 L CNN "Mouser Price/Stock"
+F 8 "Espressif" H 5800 3000 50  0001 L CNN "Manufacturer_Name"
+F 9 "ESP32-PICO-D4" H 5800 2900 50  0001 L CNN "Manufacturer_Part_Number"
+	1    4150 2900
+	1    0    0    -1  
+$EndComp
+Text GLabel 4050 3100 0    50   Output ~ 0
+BTOFF
+Text GLabel 4050 3000 0    50   Output ~ 0
+ADBSRC
+Wire Wire Line
+	4150 3100 4050 3100
+Wire Wire Line
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+NoConn ~ 4150 4600
+NoConn ~ 4150 4500
+NoConn ~ 4150 4300
+NoConn ~ 5950 3700
+NoConn ~ 5950 3600
+NoConn ~ 5950 3400
+NoConn ~ 5950 3300
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+NoConn ~ 4150 5300
+NoConn ~ 9400 4250
+$Comp
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+F 2 "Resistor_SMD:R_0805_2012Metric" V 3430 4850 50  0001 C CNN
+F 3 "~" H 3500 4850 50  0001 C CNN
+	1    3500 4850
+	1    0    0    -1  
+$EndComp
+$Comp
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+P 3500 5350
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+F 1 "0.1uF" H 3615 5305 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0805_2012Metric" H 3538 5200 50  0001 C CNN
+F 3 "~" H 3500 5350 50  0001 C CNN
+	1    3500 5350
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3500 5200 3500 5100
+Wire Wire Line
+	3500 5100 4150 5100
+Connection ~ 3500 5100
+Wire Wire Line
+	3500 5100 3500 5000
+$Comp
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+U 1 1 5F62D413
+P 3500 5600
+F 0 "#PWR0121" H 3500 5350 50  0001 C CNN
+F 1 "GND" H 3505 5427 50  0000 C CNN
+F 2 "" H 3500 5600 50  0001 C CNN
+F 3 "" H 3500 5600 50  0001 C CNN
+	1    3500 5600
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:+3.3V #PWR0122
+U 1 1 5F62DCC0
+P 3500 4600
+F 0 "#PWR0122" H 3500 4450 50  0001 C CNN
+F 1 "+3.3V" H 3515 4773 50  0000 C CNN
+F 2 "" H 3500 4600 50  0001 C CNN
+F 3 "" H 3500 4600 50  0001 C CNN
+	1    3500 4600
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3500 4600 3500 4700
+Wire Wire Line
+	3500 5500 3500 5600
+$EndSCHEMATC
diff --git a/EDA/quack_connectors.sch b/EDA/quack_connectors.sch
new file mode 100644
index 0000000..7eebeab
--- /dev/null
+++ b/EDA/quack_connectors.sch
@@ -0,0 +1,387 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 2 2
+Title "Quack Mouse Adapter"
+Date "2020-09-14"
+Rev "1.0"
+Comp "Lostwave"
+Comment1 "https://68kmla.org"
+Comment2 "https://github.com/demik/quack/tree/master/EDA"
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L Connector:DIN-4 J?
+U 1 1 5F5EB6CA
+P 9750 1750
+AR Path="/5F5EB6CA" Ref="J?"  Part="1" 
+AR Path="/5F5EA845/5F5EB6CA" Ref="J1"  Part="1" 
+F 0 "J1" H 9750 1475 50  0000 C CNN
+F 1 "DIN-4" H 9750 1384 50  0000 C CNN
+F 2 "Quack_MDIN4:57491811" H 9750 1750 50  0001 C CNN
+F 3 "http://www.mouser.com/ds/2/18/40_c091_abd_e-75918.pdf" H 9750 1750 50  0001 C CNN
+	1    9750 1750
+	1    0    0    -1  
+$EndComp
+$Comp
+L Connector:DB9_Male J?
+U 1 1 5F5EB6D0
+P 9800 3700
+AR Path="/5F5EB6D0" Ref="J?"  Part="1" 
+AR Path="/5F5EA845/5F5EB6D0" Ref="J2"  Part="1" 
+F 0 "J2" H 9980 3746 50  0000 L CNN
+F 1 "DB9_Male" H 9980 3655 50  0000 L CNN
+F 2 "Quack_DB9:23018431" H 9800 3700 50  0001 C CNN
+F 3 " ~" H 9800 3700 50  0001 C CNN
+	1    9800 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L TXB0108PWR:TXB0108PWR IC2
+U 1 1 5F5EC2ED
+P 5300 2500
+F 0 "IC2" H 5850 2765 50  0000 C CNN
+F 1 "TXB0108PWR" H 5850 2674 50  0000 C CNN
+F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 6250 2600 50  0001 L CNN
+F 3 "http://www.ti.com/lit/ds/symlink/txb0108.pdf" H 6250 2500 50  0001 L CNN
+F 4 "8-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect" H 6250 2400 50  0001 L CNN "Description"
+F 5 "1.2" H 6250 2300 50  0001 L CNN "Height"
+F 6 "595-TXB0108PWR" H 6250 2200 50  0001 L CNN "Mouser Part Number"
+F 7 "https://www.mouser.co.uk/ProductDetail/Texas-Instruments/TXB0108PWR?qs=oFXvjAmG9EgEUWGWzOVFCA%3D%3D" H 6250 2100 50  0001 L CNN "Mouser Price/Stock"
+F 8 "Texas Instruments" H 6250 2000 50  0001 L CNN "Manufacturer_Name"
+F 9 "TXB0108PWR" H 6250 1900 50  0001 L CNN "Manufacturer_Part_Number"
+	1    5300 2500
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR0101
+U 1 1 5F5F910C
+P 10200 1850
+F 0 "#PWR0101" H 10200 1600 50  0001 C CNN
+F 1 "GND" H 10205 1677 50  0000 C CNN
+F 2 "" H 10200 1850 50  0001 C CNN
+F 3 "" H 10200 1850 50  0001 C CNN
+	1    10200 1850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	10200 1850 10200 1750
+Wire Wire Line
+	10200 1750 10050 1750
+NoConn ~ 9650 1450
+$Comp
+L power:+5V #PWR0102
+U 1 1 5F5F9B56
+P 9850 1250
+F 0 "#PWR0102" H 9850 1100 50  0001 C CNN
+F 1 "+5V" H 9865 1423 50  0000 C CNN
+F 2 "" H 9850 1250 50  0001 C CNN
+F 3 "" H 9850 1250 50  0001 C CNN
+	1    9850 1250
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9850 1350 9850 1450
+NoConn ~ 9500 4000
+$Comp
+L power:GND #PWR0103
+U 1 1 5F5FA5F3
+P 9000 4200
+F 0 "#PWR0103" H 9000 3950 50  0001 C CNN
+F 1 "GND" H 9005 4027 50  0000 C CNN
+F 2 "" H 9000 4200 50  0001 C CNN
+F 3 "" H 9000 4200 50  0001 C CNN
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+	9500 4100 9000 4100
+Wire Wire Line
+	9000 4100 9000 4200
+Wire Wire Line
+	9450 1750 7000 1750
+Wire Wire Line
+	7000 1750 7000 2500
+Wire Wire Line
+	7000 2500 6400 2500
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+L power:+5V #PWR0104
+U 1 1 5F5FB441
+P 9400 3900
+F 0 "#PWR0104" H 9400 3750 50  0001 C CNN
+F 1 "+5V" V 9415 4028 50  0000 L CNN
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+F 3 "" H 9400 3900 50  0001 C CNN
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+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	9500 3900 9400 3900
+Text Label 9400 3800 2    50   ~ 0
+CLICK_5V
+$Comp
+L power:GND #PWR0105
+U 1 1 5F5FC5FB
+P 6500 3500
+F 0 "#PWR0105" H 6500 3250 50  0001 C CNN
+F 1 "GND" H 6505 3327 50  0000 C CNN
+F 2 "" H 6500 3500 50  0001 C CNN
+F 3 "" H 6500 3500 50  0001 C CNN
+	1    6500 3500
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+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	6500 3400 6400 3400
+Wire Wire Line
+	9400 3800 9500 3800
+Wire Wire Line
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+Connection ~ 9000 4100
+Text GLabel 5200 2500 0    50   BiDi ~ 0
+ADB
+Wire Wire Line
+	5300 2500 5200 2500
+$Comp
+L power:+3.3V #PWR0106
+U 1 1 5F5FE1F1
+P 4750 2000
+F 0 "#PWR0106" H 4750 1850 50  0001 C CNN
+F 1 "+3.3V" H 4765 2173 50  0000 C CNN
+F 2 "" H 4750 2000 50  0001 C CNN
+F 3 "" H 4750 2000 50  0001 C CNN
+	1    4750 2000
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4750 2000 4750 2600
+Wire Wire Line
+	4750 2600 5300 2600
+$Comp
+L power:+5V #PWR0107
+U 1 1 5F5FF2AB
+P 6500 2600
+F 0 "#PWR0107" H 6500 2450 50  0001 C CNN
+F 1 "+5V" V 6515 2728 50  0000 L CNN
+F 2 "" H 6500 2600 50  0001 C CNN
+F 3 "" H 6500 2600 50  0001 C CNN
+	1    6500 2600
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+$EndComp
+Wire Wire Line
+	6400 2600 6500 2600
+NoConn ~ 6400 2700
+NoConn ~ 6400 2800
+Text Label 6500 3200 0    50   ~ 0
+CLICK_5V
+Wire Wire Line
+	6500 3200 6400 3200
+NoConn ~ 5300 2800
+NoConn ~ 5300 2700
+$Comp
+L power:PWR_FLAG #FLG0101
+U 1 1 5F6091B0
+P 10300 1250
+F 0 "#FLG0101" H 10300 1325 50  0001 C CNN
+F 1 "PWR_FLAG" H 10300 1423 50  0000 C CNN
+F 2 "" H 10300 1250 50  0001 C CNN
+F 3 "~" H 10300 1250 50  0001 C CNN
+	1    10300 1250
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	10300 1250 10300 1350
+Wire Wire Line
+	10300 1350 9850 1350
+Wire Wire Line
+	9850 1250 9850 1350
+Connection ~ 9850 1350
+$Comp
+L Connector_Generic:Conn_01x04 J3
+U 1 1 5F65399F
+P 1450 1600
+F 0 "J3" H 1368 1175 50  0000 C CNN
+F 1 "FTDI" H 1368 1266 50  0000 C CNN
+F 2 "Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical" H 1450 1600 50  0001 C CNN
+F 3 "~" H 1450 1600 50  0001 C CNN
+	1    1450 1600
+	-1   0    0    1   
+$EndComp
+$Comp
+L power:GND #PWR0116
+U 1 1 5F65581C
+P 1900 1400
+F 0 "#PWR0116" H 1900 1150 50  0001 C CNN
+F 1 "GND" V 1905 1272 50  0000 R CNN
+F 2 "" H 1900 1400 50  0001 C CNN
+F 3 "" H 1900 1400 50  0001 C CNN
+	1    1900 1400
+	0    -1   -1   0   
+$EndComp
+$Comp
+L power:+5V #PWR0117
+U 1 1 5F656219
+P 1900 1700
+F 0 "#PWR0117" H 1900 1550 50  0001 C CNN
+F 1 "+5V" V 1915 1828 50  0000 L CNN
+F 2 "" H 1900 1700 50  0001 C CNN
+F 3 "" H 1900 1700 50  0001 C CNN
+	1    1900 1700
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	1900 1700 1650 1700
+Wire Wire Line
+	1900 1400 1650 1400
+Text GLabel 1950 1600 2    50   Output ~ 0
+U0RXD
+Text GLabel 1950 1500 2    50   Input ~ 0
+U0TXD
+Wire Wire Line
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+Wire Wire Line
+	1950 1500 1650 1500
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+Text Label 6500 3000 0    50   ~ 0
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+Text Label 6500 3100 0    50   ~ 0
+QY1_5V
+Text Label 6500 3300 0    50   ~ 0
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+	6400 3300 6500 3300
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+	6400 3100 6500 3100
+Wire Wire Line
+	6400 3000 6500 3000
+Wire Wire Line
+	6400 2900 6500 2900
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+QY2_5V
+Text Label 9400 3500 2    50   ~ 0
+QX2_5V
+Text Label 9400 3400 2    50   ~ 0
+QY1_5V
+Text Label 9400 3300 2    50   ~ 0
+QX1_5V
+Wire Wire Line
+	9400 3600 9500 3600
+Wire Wire Line
+	9400 3500 9500 3500
+Wire Wire Line
+	9400 3400 9500 3400
+Wire Wire Line
+	9400 3300 9500 3300
+$Comp
+L Connector_Generic:Conn_02x03_Odd_Even J4
+U 1 1 5F665D50
+P 1850 3100
+F 0 "J4" H 1900 3417 50  0000 C CNN
+F 1 "MODE" H 1900 3326 50  0000 C CNN
+F 2 "Connector_PinHeader_2.54mm:PinHeader_2x03_P2.54mm_Vertical" H 1850 3100 50  0001 C CNN
+F 3 "~" H 1850 3100 50  0001 C CNN
+	1    1850 3100
+	1    0    0    -1  
+$EndComp
+Text Notes 1650 3850 0    50   ~ 0
+1-2 : FLASH\n3-4 : BTOFF\n7-8 : ADBSRC
+$Comp
+L power:GND #PWR0119
+U 1 1 5F668D4A
+P 2250 3300
+F 0 "#PWR0119" H 2250 3050 50  0001 C CNN
+F 1 "GND" H 2255 3127 50  0000 C CNN
+F 2 "" H 2250 3300 50  0001 C CNN
+F 3 "" H 2250 3300 50  0001 C CNN
+	1    2250 3300
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2150 3000 2250 3000
+Wire Wire Line
+	2250 3000 2250 3100
+Wire Wire Line
+	2150 3100 2250 3100
+Connection ~ 2250 3100
+Wire Wire Line
+	2250 3100 2250 3200
+Wire Wire Line
+	2150 3200 2250 3200
+Connection ~ 2250 3200
+Wire Wire Line
+	2250 3200 2250 3300
+Text GLabel 1550 3000 0    50   UnSpc ~ 0
+FLASH
+Wire Wire Line
+	1550 3000 1650 3000
+Text GLabel 5200 2900 0    50   Input ~ 0
+QX2_3V
+Text GLabel 5200 3000 0    50   Input ~ 0
+QX1_3V
+Text GLabel 5200 3100 0    50   Input ~ 0
+QY1_3V
+Text GLabel 5200 3200 0    50   Input ~ 0
+CLICK_3V
+Text GLabel 5200 3300 0    50   Input ~ 0
+QY2_3V
+$Comp
+L power:GND #PWR0120
+U 1 1 5F68010C
+P 5200 3500
+F 0 "#PWR0120" H 5200 3250 50  0001 C CNN
+F 1 "GND" H 5205 3327 50  0000 C CNN
+F 2 "" H 5200 3500 50  0001 C CNN
+F 3 "" H 5200 3500 50  0001 C CNN
+	1    5200 3500
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5200 3500 5200 3400
+Wire Wire Line
+	5200 3400 5300 3400
+Wire Wire Line
+	5200 3300 5300 3300
+Wire Wire Line
+	5200 3200 5300 3200
+Wire Wire Line
+	5200 3100 5300 3100
+Wire Wire Line
+	5300 3000 5200 3000
+Wire Wire Line
+	5300 2900 5200 2900
+Text GLabel 1550 3100 0    50   Input ~ 0
+BTOFF
+Text GLabel 1550 3200 0    50   Input ~ 0
+ADBSRC
+Wire Wire Line
+	1550 3100 1650 3100
+Wire Wire Line
+	1550 3200 1650 3200
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+	1000 1000 1000 2000
+Wire Notes Line
+	1000 2000 2500 2000
+Wire Notes Line
+	2500 2000 2500 1000
+Wire Notes Line
+	2500 1000 1000 1000
+Wire Notes Line
+	1000 2500 2500 2500
+Wire Notes Line
+	2500 2500 2500 4000
+Wire Notes Line
+	2500 4000 1000 4000
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+	1000 4000 1000 2500
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+Text Notes 1450 2450 0    50   ~ 0
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diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..f3434a5
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,9 @@
+#
+# This is a project Makefile. It is assumed the directory this Makefile resides in is a
+# project subdirectory.
+#
+
+PROJECT_NAME := quack
+
+include $(IDF_PATH)/make/project.mk
+
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..4fb3c40
--- /dev/null
+++ b/README.md
@@ -0,0 +1,5 @@
+# Hello World Example
+
+Starts a FreeRTOS task to print "Hello World"
+
+See the README.md file in the upper level 'examples' directory for more information about examples.
diff --git a/main/CMakeLists.txt b/main/CMakeLists.txt
new file mode 100644
index 0000000..6efbde8
--- /dev/null
+++ b/main/CMakeLists.txt
@@ -0,0 +1,10 @@
+set(srcs "blue.c"
+         "esp_hid_gap.c"
+	 "gpio.c"
+	 "main.c")
+         
+set(include_dirs ".")
+
+idf_component_register(SRCS "${srcs}"
+                       INCLUDE_DIRS "${include_dirs}"
+                       REQUIRES esp_hid)
diff --git a/main/blue.c b/main/blue.c
new file mode 100644
index 0000000..459ccb1
--- /dev/null
+++ b/main/blue.c
@@ -0,0 +1,166 @@
+/* This example code is in the Public Domain (or CC0 licensed, at your option.)
+   Unless required by applicable law or agreed to in writing, this software is
+   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/event_groups.h"
+#include "esp_system.h"
+#include "esp_wifi.h"
+#include "esp_event.h"
+#include "esp_log.h"
+#include "nvs_flash.h"
+#include "esp_bt.h"
+#include "esp_bt_defs.h"
+#include "esp_gap_ble_api.h"
+#include "esp_gatts_api.h"
+#include "esp_gatt_defs.h"
+#include "esp_bt_main.h"
+#include "esp_bt_device.h"
+
+#include "esp_hidh.h"
+#include "esp_hid_gap.h"
+
+#include "blue.h"
+
+static const char *TAG = "blue";
+
+#define	BTMOUSE_BUTTON1	(1 << 0)
+#define	BTMOUSE_BUTTON2	(1 << 1)
+#define	BTMOUSE_BUTTON3	(1 << 2)
+
+void hidh_callback(void *handler_args, esp_event_base_t base, int32_t id, void *event_data)
+{
+	esp_hidh_event_t event = (esp_hidh_event_t)id;
+	esp_hidh_event_data_t *param = (esp_hidh_event_data_t *)event_data;
+
+	/*
+	 * esp_hidh_event_data_t: 
+	 * struct {
+	 * esp_hidh_dev_t *dev;		HID Remote bluetooth device
+	 * esp_hid_usage_t usage;	HID report usage
+	 * uint16_t report_id;		HID report index
+	 * uint16_t length;		HID data length
+	 * uint8_t  *data;		The pointer to the HID data
+	 * uint8_t map_index;		HID report map index
+	 * } input;
+	 */
+
+	char	click;
+	short	x, y;
+
+	switch (event) {
+		case ESP_HIDH_OPEN_EVENT: {
+			const uint8_t *bda = esp_hidh_dev_bda_get(param->open.dev);
+			if (strlen((char *)param->open.dev) > 0)
+				ESP_LOGI(TAG, "opened connection with device: " ESP_BD_ADDR_STR " named %s", ESP_BD_ADDR_HEX(bda), esp_hidh_dev_name_get(param->open.dev));
+			else
+				ESP_LOGI(TAG, "opened connection with device: " ESP_BD_ADDR_STR, ESP_BD_ADDR_HEX(bda));
+			//esp_hidh_dev_dump(param->open.dev, stdout);
+			break;
+		}
+		case ESP_HIDH_BATTERY_EVENT: {
+			const uint8_t *bda = esp_hidh_dev_bda_get(param->battery.dev);
+			ESP_LOGI(TAG, ESP_BD_ADDR_STR " BATTERY: %d%%", ESP_BD_ADDR_HEX(bda), param->battery.level);
+			break;
+		}
+		case ESP_HIDH_INPUT_EVENT: {
+						   const uint8_t *bda = esp_hidh_dev_bda_get(param->input.dev);
+						   ESP_LOGD(TAG, ESP_BD_ADDR_STR " INPUT: %8s, MAP: %2u, ID: %3u, Len: %d, Data:", ESP_BD_ADDR_HEX(bda), esp_hid_usage_str(param->input.usage), param->input.map_index, param->input.report_id, param->input.length);
+						   ESP_LOG_BUFFER_HEX(TAG, param->input.data, param->input.length);
+						   memcpy (&click, param->input.data, sizeof(uint8_t));
+						   click = click & (BTMOUSE_BUTTON1 | BTMOUSE_BUTTON2 | BTMOUSE_BUTTON3);
+						   if (click)
+							   ESP_LOGI(TAG, "CLICK: %d", click);
+							   break;
+					   }
+		case ESP_HIDH_FEATURE_EVENT: {
+						     const uint8_t *bda = esp_hidh_dev_bda_get(param->feature.dev);
+						     ESP_LOGI(TAG, ESP_BD_ADDR_STR " FEATURE: %8s, MAP: %2u, ID: %3u, Len: %d", ESP_BD_ADDR_HEX(bda), esp_hid_usage_str(param->feature.usage), param->feature.map_index, param->feature.report_id, param->feature.length);
+						     ESP_LOG_BUFFER_HEX(TAG, param->feature.data, param->feature.length);
+						     break;
+					     }
+		case ESP_HIDH_CLOSE_EVENT: {
+			const uint8_t *bda = esp_hidh_dev_bda_get(param->close.dev);
+			ESP_LOGI(TAG, ESP_BD_ADDR_STR " CLOSE: '%s' %s", ESP_BD_ADDR_HEX(bda), esp_hidh_dev_name_get(param->close.dev), esp_hid_disconnect_reason_str(esp_hidh_dev_transport_get(param->close.dev), param->close.reason));
+			esp_hidh_dev_free(param->close.dev);
+			break;
+		}
+		default:
+			ESP_LOGI(TAG, "EVENT: %d", event);
+	}
+}
+
+#define SCAN_DURATION_SECONDS 6
+
+void hid_demo_task(void *pvParameters)
+{
+	size_t len = 0;
+    esp_hid_scan_result_t *mouse = NULL;
+	esp_hid_scan_result_t *results = NULL;
+
+	ESP_LOGI(TAG, "starting scan on core %d…", xPortGetCoreID());
+	esp_hid_scan(SCAN_DURATION_SECONDS, &len, &results);
+	ESP_LOGI(TAG, "scan returned %u result(s)", len);
+
+	if (len) {
+		esp_hid_scan_result_t *r = results;
+		while (r) {
+            ESP_LOGI(TAG, "found %s device: " ESP_BD_ADDR_STR ", RSSI: %d, NAME: %s",
+                 (r->transport == ESP_HID_TRANSPORT_BLE) ? "BLE" : "BT",
+                 ESP_BD_ADDR_HEX(r->bda), r->rssi, r->name ? r->name : "");
+        
+			if (r->transport == ESP_HID_TRANSPORT_BLE) {
+				printf("APPEARANCE: 0x%04x, ", r->ble.appearance);
+				printf("ADDR_TYPE: '%s', ", ble_addr_type_str(r->ble.addr_type));
+			} else {
+                if (strcmp("PERIPHERAL", esp_hid_cod_major_str(r->bt.cod.major)) == 0
+                    && (r->bt.cod.minor & ESP_HID_COD_MIN_MOUSE)) {
+                    ESP_LOGI(TAG, "found generic mouse");
+                    mouse = r;
+                }
+			}
+			r = r->next;
+		}
+		if (mouse) {
+            // try to connect to the last mouse found
+            esp_hidh_dev_open(mouse->bda, mouse->transport, mouse->ble.addr_type);
+		}
+        else {
+            ESP_LOGI(TAG, "devices found but no mouse detected");
+        }
+
+		esp_hid_scan_results_free(results);
+	}
+
+	vTaskDelete(NULL);
+}
+
+void blue_init(void)
+{
+	esp_err_t	ret;
+
+	ret = nvs_flash_init();
+	if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
+		ESP_ERROR_CHECK(nvs_flash_erase());
+		ret = nvs_flash_init();
+	}
+	ESP_ERROR_CHECK(ret);
+	ESP_ERROR_CHECK(esp_hid_gap_init(ESP_BT_MODE_BTDM));
+	ESP_ERROR_CHECK(esp_ble_gattc_register_callback(esp_hidh_gattc_event_handler));
+
+	esp_hidh_config_t config = {
+		.callback = hidh_callback,
+	};
+
+	ESP_ERROR_CHECK( esp_hidh_init(&config) );
+
+	/* keep scanning until a device is found */
+	xTaskCreatePinnedToCore(&hid_demo_task, "hid_task", 6 * 1024, NULL, 2, NULL, 0);
+}
diff --git a/main/blue.h b/main/blue.h
new file mode 100644
index 0000000..914165b
--- /dev/null
+++ b/main/blue.h
@@ -0,0 +1,33 @@
+/*
+ *  blue.h
+ *  quack
+ *
+ *  Created by Michel DEPEIGE on 13/09/2020.
+ *  Copyright (c) 2020 Michel DEPEIGE.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program (see the file COPYING); if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA
+ *
+ */
+
+#ifndef BLUE_H
+#define BLUE_H
+
+/* prototypes */
+void	blue_init(void);
+
+
+#endif
+
diff --git a/main/component.mk b/main/component.mk
new file mode 100644
index 0000000..0b9d758
--- /dev/null
+++ b/main/component.mk
@@ -0,0 +1,5 @@
+#
+# "main" pseudo-component makefile.
+#
+# (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.)
+
diff --git a/main/esp_hid_gap.c b/main/esp_hid_gap.c
new file mode 100644
index 0000000..2c3ff90
--- /dev/null
+++ b/main/esp_hid_gap.c
@@ -0,0 +1,799 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <string.h>
+#include <stdbool.h>
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/semphr.h"
+
+#include "esp_hid_gap.h"
+
+static const char *TAG = "ESP_HID_GAP";
+
+// uncomment to print all devices that were seen during a scan
+#define GAP_DBG_PRINTF(...) //printf(__VA_ARGS__)
+//static const char * gap_bt_prop_type_names[5] = {"","BDNAME","COD","RSSI","EIR"};
+
+static esp_hid_scan_result_t *bt_scan_results = NULL;
+static size_t num_bt_scan_results = 0;
+
+static esp_hid_scan_result_t *ble_scan_results = NULL;
+static size_t num_ble_scan_results = 0;
+
+static xSemaphoreHandle bt_hidh_cb_semaphore = NULL;
+#define WAIT_BT_CB() xSemaphoreTake(bt_hidh_cb_semaphore, portMAX_DELAY)
+#define SEND_BT_CB() xSemaphoreGive(bt_hidh_cb_semaphore)
+
+static xSemaphoreHandle ble_hidh_cb_semaphore = NULL;
+#define WAIT_BLE_CB() xSemaphoreTake(ble_hidh_cb_semaphore, portMAX_DELAY)
+#define SEND_BLE_CB() xSemaphoreGive(ble_hidh_cb_semaphore)
+
+#define SIZEOF_ARRAY(a) (sizeof(a)/sizeof(*a))
+
+static const char *ble_gap_evt_names[] = { "ADV_DATA_SET_COMPLETE", "SCAN_RSP_DATA_SET_COMPLETE", "SCAN_PARAM_SET_COMPLETE", "SCAN_RESULT", "ADV_DATA_RAW_SET_COMPLETE", "SCAN_RSP_DATA_RAW_SET_COMPLETE", "ADV_START_COMPLETE", "SCAN_START_COMPLETE", "AUTH_CMPL", "KEY", "SEC_REQ", "PASSKEY_NOTIF", "PASSKEY_REQ", "OOB_REQ", "LOCAL_IR", "LOCAL_ER", "NC_REQ", "ADV_STOP_COMPLETE", "SCAN_STOP_COMPLETE", "SET_STATIC_RAND_ADDR", "UPDATE_CONN_PARAMS", "SET_PKT_LENGTH_COMPLETE", "SET_LOCAL_PRIVACY_COMPLETE", "REMOVE_BOND_DEV_COMPLETE", "CLEAR_BOND_DEV_COMPLETE", "GET_BOND_DEV_COMPLETE", "READ_RSSI_COMPLETE", "UPDATE_WHITELIST_COMPLETE"};
+static const char *bt_gap_evt_names[] = { "DISC_RES", "DISC_STATE_CHANGED", "RMT_SRVCS", "RMT_SRVC_REC", "AUTH_CMPL", "PIN_REQ", "CFM_REQ", "KEY_NOTIF", "KEY_REQ", "READ_RSSI_DELTA"};
+static const char *ble_addr_type_names[] = {"PUBLIC", "RANDOM", "RPA_PUBLIC", "RPA_RANDOM"};
+
+const char *ble_addr_type_str(esp_ble_addr_type_t ble_addr_type)
+{
+    if (ble_addr_type > BLE_ADDR_TYPE_RPA_RANDOM) {
+        return "UNKNOWN";
+    }
+    return ble_addr_type_names[ble_addr_type];
+}
+
+const char *ble_gap_evt_str(uint8_t event)
+{
+    if (event >= SIZEOF_ARRAY(ble_gap_evt_names)) {
+        return "UNKNOWN";
+    }
+    return ble_gap_evt_names[event];
+}
+
+const char *bt_gap_evt_str(uint8_t event)
+{
+    if (event >= SIZEOF_ARRAY(bt_gap_evt_names)) {
+        return "UNKNOWN";
+    }
+    return bt_gap_evt_names[event];
+}
+
+const char *esp_ble_key_type_str(esp_ble_key_type_t key_type)
+{
+    const char *key_str = NULL;
+    switch (key_type) {
+    case ESP_LE_KEY_NONE:
+        key_str = "ESP_LE_KEY_NONE";
+        break;
+    case ESP_LE_KEY_PENC:
+        key_str = "ESP_LE_KEY_PENC";
+        break;
+    case ESP_LE_KEY_PID:
+        key_str = "ESP_LE_KEY_PID";
+        break;
+    case ESP_LE_KEY_PCSRK:
+        key_str = "ESP_LE_KEY_PCSRK";
+        break;
+    case ESP_LE_KEY_PLK:
+        key_str = "ESP_LE_KEY_PLK";
+        break;
+    case ESP_LE_KEY_LLK:
+        key_str = "ESP_LE_KEY_LLK";
+        break;
+    case ESP_LE_KEY_LENC:
+        key_str = "ESP_LE_KEY_LENC";
+        break;
+    case ESP_LE_KEY_LID:
+        key_str = "ESP_LE_KEY_LID";
+        break;
+    case ESP_LE_KEY_LCSRK:
+        key_str = "ESP_LE_KEY_LCSRK";
+        break;
+    default:
+        key_str = "INVALID BLE KEY TYPE";
+        break;
+
+    }
+    return key_str;
+}
+
+void esp_hid_scan_results_free(esp_hid_scan_result_t *results)
+{
+    esp_hid_scan_result_t *r = NULL;
+    while (results) {
+        r = results;
+        results = results->next;
+        if (r->name != NULL) {
+            free((char *)r->name);
+        }
+        free(r);
+    }
+}
+
+static esp_hid_scan_result_t *find_scan_result(esp_bd_addr_t bda, esp_hid_scan_result_t *results)
+{
+    esp_hid_scan_result_t *r = results;
+    while (r) {
+        if (memcmp(bda, r->bda, sizeof(esp_bd_addr_t)) == 0) {
+            return r;
+        }
+        r = r->next;
+    }
+    return NULL;
+}
+
+static void add_bt_scan_result(esp_bd_addr_t bda, esp_bt_cod_t *cod, esp_bt_uuid_t *uuid, uint8_t *name, uint8_t name_len, int rssi)
+{
+    esp_hid_scan_result_t *r = find_scan_result(bda, bt_scan_results);
+    if (r) {
+        //Some info may come later
+        if (r->name == NULL && name && name_len) {
+            char *name_s = (char *)malloc(name_len + 1);
+            if (name_s == NULL) {
+                ESP_LOGE(TAG, "Malloc result name failed!");
+                return;
+            }
+            memcpy(name_s, name, name_len);
+            name_s[name_len] = 0;
+            r->name = (const char *)name_s;
+        }
+        if (r->bt.uuid.len == 0 && uuid->len) {
+            memcpy(&r->bt.uuid, uuid, sizeof(esp_bt_uuid_t));
+        }
+        if (rssi != 0) {
+            r->rssi = rssi;
+        }
+        return;
+    }
+
+    r = (esp_hid_scan_result_t *)malloc(sizeof(esp_hid_scan_result_t));
+    if (r == NULL) {
+        ESP_LOGE(TAG, "Malloc bt_hidh_scan_result_t failed!");
+        return;
+    }
+    r->transport = ESP_HID_TRANSPORT_BT;
+    memcpy(r->bda, bda, sizeof(esp_bd_addr_t));
+    memcpy(&r->bt.cod, cod, sizeof(esp_bt_cod_t));
+    memcpy(&r->bt.uuid, uuid, sizeof(esp_bt_uuid_t));
+    r->usage = esp_hid_usage_from_cod((uint32_t)cod);
+    r->rssi = rssi;
+    r->name = NULL;
+    if (name_len && name) {
+        char *name_s = (char *)malloc(name_len + 1);
+        if (name_s == NULL) {
+            free(r);
+            ESP_LOGE(TAG, "Malloc result name failed!");
+            return;
+        }
+        memcpy(name_s, name, name_len);
+        name_s[name_len] = 0;
+        r->name = (const char *)name_s;
+    }
+    r->next = bt_scan_results;
+    bt_scan_results = r;
+    num_bt_scan_results++;
+}
+
+static void add_ble_scan_result(esp_bd_addr_t bda, esp_ble_addr_type_t addr_type, uint16_t appearance, uint8_t *name, uint8_t name_len, int rssi)
+{
+    if (find_scan_result(bda, ble_scan_results)) {
+        ESP_LOGW(TAG, "Result already exists!");
+        return;
+    }
+    esp_hid_scan_result_t *r = (esp_hid_scan_result_t *)malloc(sizeof(esp_hid_scan_result_t));
+    if (r == NULL) {
+        ESP_LOGE(TAG, "Malloc ble_hidh_scan_result_t failed!");
+        return;
+    }
+    r->transport = ESP_HID_TRANSPORT_BLE;
+    memcpy(r->bda, bda, sizeof(esp_bd_addr_t));
+    r->ble.appearance = appearance;
+    r->ble.addr_type = addr_type;
+    r->usage = esp_hid_usage_from_appearance(appearance);
+    r->rssi = rssi;
+    r->name = NULL;
+    if (name_len && name) {
+        char *name_s = (char *)malloc(name_len + 1);
+        if (name_s == NULL) {
+            free(r);
+            ESP_LOGE(TAG, "Malloc result name failed!");
+            return;
+        }
+        memcpy(name_s, name, name_len);
+        name_s[name_len] = 0;
+        r->name = (const char *)name_s;
+    }
+    r->next = ble_scan_results;
+    ble_scan_results = r;
+    num_ble_scan_results++;
+}
+
+void print_uuid(esp_bt_uuid_t *uuid)
+{
+    if (uuid->len == ESP_UUID_LEN_16) {
+        GAP_DBG_PRINTF("UUID16: 0x%04x", uuid->uuid.uuid16);
+    } else if (uuid->len == ESP_UUID_LEN_32) {
+        GAP_DBG_PRINTF("UUID32: 0x%08x", uuid->uuid.uuid32);
+    } else if (uuid->len == ESP_UUID_LEN_128) {
+        GAP_DBG_PRINTF("UUID128: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x", uuid->uuid.uuid128[0],
+                       uuid->uuid.uuid128[1], uuid->uuid.uuid128[2], uuid->uuid.uuid128[3],
+                       uuid->uuid.uuid128[4], uuid->uuid.uuid128[5], uuid->uuid.uuid128[6],
+                       uuid->uuid.uuid128[7], uuid->uuid.uuid128[8], uuid->uuid.uuid128[9],
+                       uuid->uuid.uuid128[10], uuid->uuid.uuid128[11], uuid->uuid.uuid128[12],
+                       uuid->uuid.uuid128[13], uuid->uuid.uuid128[14], uuid->uuid.uuid128[15]);
+    }
+}
+
+static void handle_bt_device_result(struct disc_res_param *disc_res)
+{
+    GAP_DBG_PRINTF("BT : " ESP_BD_ADDR_STR, ESP_BD_ADDR_HEX(disc_res->bda));
+    uint32_t codv = 0;
+    esp_bt_cod_t *cod = (esp_bt_cod_t *)&codv;
+    int8_t rssi = 0;
+    uint8_t *name = NULL;
+    uint8_t name_len = 0;
+    esp_bt_uuid_t uuid;
+
+    uuid.len = ESP_UUID_LEN_16;
+    uuid.uuid.uuid16 = 0;
+
+    for (int i = 0; i < disc_res->num_prop; i++) {
+        esp_bt_gap_dev_prop_t *prop = &disc_res->prop[i];
+        if (prop->type != ESP_BT_GAP_DEV_PROP_EIR) {
+            GAP_DBG_PRINTF(", %s: ", gap_bt_prop_type_names[prop->type]);
+        }
+        if (prop->type == ESP_BT_GAP_DEV_PROP_BDNAME) {
+            name = (uint8_t *)prop->val;
+            name_len = strlen((const char *)name);
+            GAP_DBG_PRINTF("%s", (const char *)name);
+        } else if (prop->type == ESP_BT_GAP_DEV_PROP_RSSI) {
+            rssi = *((int8_t *)prop->val);
+            GAP_DBG_PRINTF("%d", rssi);
+        } else if (prop->type == ESP_BT_GAP_DEV_PROP_COD) {
+            memcpy(&codv, prop->val, sizeof(uint32_t));
+            GAP_DBG_PRINTF("major: %s, minor: %d, service: 0x%03x", esp_hid_cod_major_str(cod->major), cod->minor, cod->service);
+        } else if (prop->type == ESP_BT_GAP_DEV_PROP_EIR) {
+            uint8_t len = 0;
+            uint8_t *data = 0;
+
+            data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_CMPL_16BITS_UUID, &len);
+            if (data == NULL) {
+                data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_INCMPL_16BITS_UUID, &len);
+            }
+            if (data && len == ESP_UUID_LEN_16) {
+                uuid.len = ESP_UUID_LEN_16;
+                uuid.uuid.uuid16 = data[0] + (data[1] << 8);
+                GAP_DBG_PRINTF(", "); print_uuid(&uuid);
+                continue;
+            }
+
+            data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_CMPL_32BITS_UUID, &len);
+            if (data == NULL) {
+                data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_INCMPL_32BITS_UUID, &len);
+            }
+            if (data && len == ESP_UUID_LEN_32) {
+                uuid.len = len;
+                memcpy(&uuid.uuid.uuid32, data, sizeof(uint32_t));
+                GAP_DBG_PRINTF(", "); print_uuid(&uuid);
+                continue;
+            }
+
+            data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_CMPL_128BITS_UUID, &len);
+            if (data == NULL) {
+                data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_INCMPL_128BITS_UUID, &len);
+            }
+            if (data && len == ESP_UUID_LEN_128) {
+                uuid.len = len;
+                memcpy(uuid.uuid.uuid128, (uint8_t *)data, len);
+                GAP_DBG_PRINTF(", "); print_uuid(&uuid);
+                continue;
+            }
+
+            //try to find a name
+            if (name == NULL) {
+                data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_CMPL_LOCAL_NAME, &len);
+                if (data == NULL) {
+                    data = esp_bt_gap_resolve_eir_data((uint8_t *)prop->val, ESP_BT_EIR_TYPE_SHORT_LOCAL_NAME, &len);
+                }
+                if (data && len) {
+                    name = data;
+                    name_len = len;
+                    GAP_DBG_PRINTF(", NAME: ");
+                    for (int x = 0; x < len; x++) {
+                        GAP_DBG_PRINTF("%c", (char)data[x]);
+                    }
+                }
+            }
+        }
+    }
+    GAP_DBG_PRINTF("\n");
+
+    if (cod->major == ESP_BT_COD_MAJOR_DEV_PERIPHERAL || (find_scan_result(disc_res->bda, bt_scan_results) != NULL)) {
+        add_bt_scan_result(disc_res->bda, cod, &uuid, name, name_len, rssi);
+    }
+}
+
+static void handle_ble_device_result(struct ble_scan_result_evt_param *scan_rst)
+{
+
+    uint16_t uuid = 0;
+    uint16_t appearance = 0;
+    char name[64] = {0};
+
+    uint8_t uuid_len = 0;
+    uint8_t *uuid_d = esp_ble_resolve_adv_data(scan_rst->ble_adv, ESP_BLE_AD_TYPE_16SRV_CMPL, &uuid_len);
+    if (uuid_d != NULL && uuid_len) {
+        uuid = uuid_d[0] + (uuid_d[1] << 8);
+    }
+
+    uint8_t appearance_len = 0;
+    uint8_t *appearance_d = esp_ble_resolve_adv_data(scan_rst->ble_adv, ESP_BLE_AD_TYPE_APPEARANCE, &appearance_len);
+    if (appearance_d != NULL && appearance_len) {
+        appearance = appearance_d[0] + (appearance_d[1] << 8);
+    }
+
+    uint8_t adv_name_len = 0;
+    uint8_t *adv_name = esp_ble_resolve_adv_data(scan_rst->ble_adv, ESP_BLE_AD_TYPE_NAME_CMPL, &adv_name_len);
+
+    if (adv_name == NULL) {
+        adv_name = esp_ble_resolve_adv_data(scan_rst->ble_adv, ESP_BLE_AD_TYPE_NAME_SHORT, &adv_name_len);
+    }
+
+    if (adv_name != NULL && adv_name_len) {
+        memcpy(name, adv_name, adv_name_len);
+        name[adv_name_len] = 0;
+    }
+
+    GAP_DBG_PRINTF("BLE: " ESP_BD_ADDR_STR ", ", ESP_BD_ADDR_HEX(scan_rst->bda));
+    GAP_DBG_PRINTF("RSSI: %d, ", scan_rst->rssi);
+    GAP_DBG_PRINTF("UUID: 0x%04x, ", uuid);
+    GAP_DBG_PRINTF("APPEARANCE: 0x%04x, ", appearance);
+    GAP_DBG_PRINTF("ADDR_TYPE: '%s'", ble_addr_type_str(scan_rst->ble_addr_type));
+    if (adv_name_len) {
+        GAP_DBG_PRINTF(", NAME: '%s'", name);
+    }
+    GAP_DBG_PRINTF("\n");
+
+    if (uuid == ESP_GATT_UUID_HID_SVC) {
+        add_ble_scan_result(scan_rst->bda, scan_rst->ble_addr_type, appearance, adv_name, adv_name_len, scan_rst->rssi);
+    }
+}
+
+
+/*
+ * BT GAP
+ * */
+
+static void bt_gap_event_handler(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *param)
+{
+    switch (event) {
+    case ESP_BT_GAP_DISC_STATE_CHANGED_EVT: {
+        ESP_LOGV(TAG, "BT GAP DISC_STATE %s", (param->disc_st_chg.state == ESP_BT_GAP_DISCOVERY_STARTED) ? "START" : "STOP");
+        if (param->disc_st_chg.state == ESP_BT_GAP_DISCOVERY_STOPPED) {
+            SEND_BT_CB();
+        }
+        break;
+    }
+    case ESP_BT_GAP_DISC_RES_EVT: {
+        handle_bt_device_result(&param->disc_res);
+        break;
+    }
+    case ESP_BT_GAP_KEY_NOTIF_EVT:
+        ESP_LOGI(TAG, "BT GAP KEY_NOTIF passkey:%d", param->key_notif.passkey);
+        break;
+    default:
+        ESP_LOGV(TAG, "BT GAP EVENT %s", bt_gap_evt_str(event));
+        break;
+    }
+}
+
+static esp_err_t init_bt_gap(void)
+{
+    esp_err_t ret;
+    esp_bt_sp_param_t param_type = ESP_BT_SP_IOCAP_MODE;
+    esp_bt_io_cap_t iocap = ESP_BT_IO_CAP_IO;
+    esp_bt_gap_set_security_param(param_type, &iocap, sizeof(uint8_t));
+    /*
+     * Set default parameters for Legacy Pairing
+     * Use fixed pin code
+     */
+    esp_bt_pin_type_t pin_type = ESP_BT_PIN_TYPE_FIXED;
+    esp_bt_pin_code_t pin_code;
+    pin_code[0] = '1';
+    pin_code[1] = '2';
+    pin_code[2] = '3';
+    pin_code[3] = '4';
+    esp_bt_gap_set_pin(pin_type, 4, pin_code);
+
+    if ((ret = esp_bt_gap_register_callback(bt_gap_event_handler)) != ESP_OK) {
+        ESP_LOGE(TAG, "esp_bt_gap_register_callback failed: %d", ret);
+        return ret;
+    }
+
+    // Allow BT devices to connect back to us
+    if ((ret = esp_bt_gap_set_scan_mode(ESP_BT_CONNECTABLE, ESP_BT_NON_DISCOVERABLE)) != ESP_OK) {
+        ESP_LOGE(TAG, "esp_bt_gap_set_scan_mode failed: %d", ret);
+        return ret;
+    }
+    return ret;
+}
+
+static esp_err_t start_bt_scan(uint32_t seconds)
+{
+    esp_err_t ret = ESP_OK;
+    if ((ret = esp_bt_gap_start_discovery(ESP_BT_INQ_MODE_GENERAL_INQUIRY, (int)(seconds / 1.28), 0)) != ESP_OK) {
+        ESP_LOGE(TAG, "esp_bt_gap_start_discovery failed: %d", ret);
+        return ret;
+    }
+    return ret;
+}
+
+/*
+ * BLE GAP
+ * */
+
+static void ble_gap_event_handler(esp_gap_ble_cb_event_t event, esp_ble_gap_cb_param_t *param)
+{
+    switch (event) {
+    /*
+     * SCAN
+     * */
+    case ESP_GAP_BLE_SCAN_PARAM_SET_COMPLETE_EVT: {
+        ESP_LOGV(TAG, "BLE GAP EVENT SCAN_PARAM_SET_COMPLETE");
+        SEND_BLE_CB();
+        break;
+    }
+    case ESP_GAP_BLE_SCAN_RESULT_EVT: {
+        esp_ble_gap_cb_param_t *scan_result = (esp_ble_gap_cb_param_t *)param;
+        switch (scan_result->scan_rst.search_evt) {
+        case ESP_GAP_SEARCH_INQ_RES_EVT: {
+            handle_ble_device_result(&scan_result->scan_rst);
+            break;
+        }
+        case ESP_GAP_SEARCH_INQ_CMPL_EVT:
+            ESP_LOGV(TAG, "BLE GAP EVENT SCAN DONE: %d", scan_result->scan_rst.num_resps);
+            SEND_BLE_CB();
+            break;
+        default:
+            break;
+        }
+        break;
+    }
+    case ESP_GAP_BLE_SCAN_STOP_COMPLETE_EVT: {
+        ESP_LOGV(TAG, "BLE GAP EVENT SCAN CANCELED");
+        break;
+    }
+
+    /*
+     * ADVERTISEMENT
+     * */
+    case ESP_GAP_BLE_ADV_DATA_SET_COMPLETE_EVT:
+        ESP_LOGV(TAG, "BLE GAP ADV_DATA_SET_COMPLETE");
+        break;
+
+    case ESP_GAP_BLE_ADV_START_COMPLETE_EVT:
+        ESP_LOGV(TAG, "BLE GAP ADV_START_COMPLETE");
+        break;
+
+    /*
+     * AUTHENTICATION
+     * */
+    case ESP_GAP_BLE_AUTH_CMPL_EVT:
+        if (!param->ble_security.auth_cmpl.success) {
+            ESP_LOGE(TAG, "BLE GAP AUTH ERROR: 0x%x", param->ble_security.auth_cmpl.fail_reason);
+        } else {
+            ESP_LOGI(TAG, "BLE GAP AUTH SUCCESS");
+        }
+        break;
+
+    case ESP_GAP_BLE_KEY_EVT: //shows the ble key info share with peer device to the user.
+        ESP_LOGI(TAG, "BLE GAP KEY type = %s", esp_ble_key_type_str(param->ble_security.ble_key.key_type));
+        break;
+
+    case ESP_GAP_BLE_PASSKEY_NOTIF_EVT: // ESP_IO_CAP_OUT
+        // The app will receive this evt when the IO has Output capability and the peer device IO has Input capability.
+        // Show the passkey number to the user to input it in the peer device.
+        ESP_LOGI(TAG, "BLE GAP PASSKEY_NOTIF passkey:%d", param->ble_security.key_notif.passkey);
+        break;
+
+    case ESP_GAP_BLE_NC_REQ_EVT: // ESP_IO_CAP_IO
+        // The app will receive this event when the IO has DisplayYesNO capability and the peer device IO also has DisplayYesNo capability.
+        // show the passkey number to the user to confirm it with the number displayed by peer device.
+        ESP_LOGI(TAG, "BLE GAP NC_REQ passkey:%d", param->ble_security.key_notif.passkey);
+        esp_ble_confirm_reply(param->ble_security.key_notif.bd_addr, true);
+        break;
+
+    case ESP_GAP_BLE_PASSKEY_REQ_EVT: // ESP_IO_CAP_IN
+        // The app will receive this evt when the IO has Input capability and the peer device IO has Output capability.
+        // See the passkey number on the peer device and send it back.
+        ESP_LOGI(TAG, "BLE GAP PASSKEY_REQ");
+        //esp_ble_passkey_reply(param->ble_security.ble_req.bd_addr, true, 1234);
+        break;
+
+    case ESP_GAP_BLE_SEC_REQ_EVT:
+        ESP_LOGI(TAG, "BLE GAP SEC_REQ");
+        // Send the positive(true) security response to the peer device to accept the security request.
+        // If not accept the security request, should send the security response with negative(false) accept value.
+        esp_ble_gap_security_rsp(param->ble_security.ble_req.bd_addr, true);
+        break;
+
+    default:
+        ESP_LOGV(TAG, "BLE GAP EVENT %s", ble_gap_evt_str(event));
+        break;
+    }
+}
+
+static esp_err_t init_ble_gap(void)
+{
+    esp_err_t ret;
+
+    if ((ret = esp_ble_gap_register_callback(ble_gap_event_handler)) != ESP_OK) {
+        ESP_LOGE(TAG, "esp_ble_gap_register_callback failed: %d", ret);
+        return ret;
+    }
+    return ret;
+}
+
+static esp_ble_scan_params_t hid_scan_params = {
+    .scan_type              = BLE_SCAN_TYPE_ACTIVE,
+    .own_addr_type          = BLE_ADDR_TYPE_PUBLIC,
+    .scan_filter_policy     = BLE_SCAN_FILTER_ALLOW_ALL,
+    .scan_interval          = 0x50,
+    .scan_window            = 0x30,
+    .scan_duplicate         = BLE_SCAN_DUPLICATE_ENABLE,
+};
+
+static esp_err_t start_ble_scan(uint32_t seconds)
+{
+    esp_err_t ret = ESP_OK;
+    if ((ret = esp_ble_gap_set_scan_params(&hid_scan_params)) != ESP_OK) {
+        ESP_LOGE(TAG, "esp_ble_gap_set_scan_params failed: %d", ret);
+        return ret;
+    }
+    WAIT_BLE_CB();
+
+    if ((ret = esp_ble_gap_start_scanning(seconds)) != ESP_OK) {
+        ESP_LOGE(TAG, "esp_ble_gap_start_scanning failed: %d", ret);
+        return ret;
+    }
+    return ret;
+}
+
+esp_err_t esp_hid_ble_gap_adv_init(uint16_t appearance, const char *device_name)
+{
+
+    esp_err_t ret;
+
+    const uint8_t hidd_service_uuid128[] = {
+        0xfb, 0x34, 0x9b, 0x5f, 0x80, 0x00, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00, 0x12, 0x18, 0x00, 0x00,
+    };
+
+    esp_ble_adv_data_t ble_adv_data = {
+        .set_scan_rsp = false,
+        .include_name = true,
+        .include_txpower = true,
+        .min_interval = 0x0006, //slave connection min interval, Time = min_interval * 1.25 msec
+        .max_interval = 0x0010, //slave connection max interval, Time = max_interval * 1.25 msec
+        .appearance = appearance,
+        .manufacturer_len = 0,
+        .p_manufacturer_data =  NULL,
+        .service_data_len = 0,
+        .p_service_data = NULL,
+        .service_uuid_len = sizeof(hidd_service_uuid128),
+        .p_service_uuid = (uint8_t *)hidd_service_uuid128,
+        .flag = 0x6,
+    };
+
+    esp_ble_auth_req_t auth_req = ESP_LE_AUTH_REQ_SC_MITM_BOND;
+    //esp_ble_io_cap_t iocap = ESP_IO_CAP_OUT;//you have to enter the key on the host
+    //esp_ble_io_cap_t iocap = ESP_IO_CAP_IN;//you have to enter the key on the device
+    esp_ble_io_cap_t iocap = ESP_IO_CAP_IO;//you have to agree that key matches on both
+    //esp_ble_io_cap_t iocap = ESP_IO_CAP_NONE;//device is not capable of input or output, unsecure
+    uint8_t init_key = ESP_BLE_ENC_KEY_MASK | ESP_BLE_ID_KEY_MASK;
+    uint8_t rsp_key = ESP_BLE_ENC_KEY_MASK | ESP_BLE_ID_KEY_MASK;
+    uint8_t key_size = 16; //the key size should be 7~16 bytes
+    uint32_t passkey = 1234;//ESP_IO_CAP_OUT
+
+    if ((ret = esp_ble_gap_set_security_param(ESP_BLE_SM_AUTHEN_REQ_MODE, &auth_req, 1)) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP set_security_param AUTHEN_REQ_MODE failed: %d", ret);
+        return ret;
+    }
+
+    if ((ret = esp_ble_gap_set_security_param(ESP_BLE_SM_IOCAP_MODE, &iocap, 1)) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP set_security_param IOCAP_MODE failed: %d", ret);
+        return ret;
+    }
+
+    if ((ret = esp_ble_gap_set_security_param(ESP_BLE_SM_SET_INIT_KEY, &init_key, 1)) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP set_security_param SET_INIT_KEY failed: %d", ret);
+        return ret;
+    }
+
+    if ((ret = esp_ble_gap_set_security_param(ESP_BLE_SM_SET_RSP_KEY, &rsp_key, 1)) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP set_security_param SET_RSP_KEY failed: %d", ret);
+        return ret;
+    }
+
+    if ((ret = esp_ble_gap_set_security_param(ESP_BLE_SM_MAX_KEY_SIZE, &key_size, 1)) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP set_security_param MAX_KEY_SIZE failed: %d", ret);
+        return ret;
+    }
+
+    if ((ret = esp_ble_gap_set_security_param(ESP_BLE_SM_SET_STATIC_PASSKEY, &passkey, sizeof(uint32_t))) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP set_security_param SET_STATIC_PASSKEY failed: %d", ret);
+        return ret;
+    }
+
+    if ((ret = esp_ble_gap_set_device_name(device_name)) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP set_device_name failed: %d", ret);
+        return ret;
+    }
+
+    if ((ret = esp_ble_gap_config_adv_data(&ble_adv_data)) != ESP_OK) {
+        ESP_LOGE(TAG, "GAP config_adv_data failed: %d", ret);
+        return ret;
+    }
+
+    return ret;
+}
+
+esp_err_t esp_hid_ble_gap_adv_start(void)
+{
+    static esp_ble_adv_params_t hidd_adv_params = {
+        .adv_int_min        = 0x20,
+        .adv_int_max        = 0x30,
+        .adv_type           = ADV_TYPE_IND,
+        .own_addr_type      = BLE_ADDR_TYPE_PUBLIC,
+        .channel_map        = ADV_CHNL_ALL,
+        .adv_filter_policy  = ADV_FILTER_ALLOW_SCAN_ANY_CON_ANY,
+    };
+    return esp_ble_gap_start_advertising(&hidd_adv_params);
+}
+
+/*
+ * CONTROLLER INIT
+ * */
+
+static esp_err_t init_low_level(uint8_t mode)
+{
+    esp_err_t ret;
+    esp_bt_controller_config_t bt_cfg = BT_CONTROLLER_INIT_CONFIG_DEFAULT();
+    if (mode & ESP_BT_MODE_CLASSIC_BT) {
+        bt_cfg.mode = mode;
+        bt_cfg.bt_max_acl_conn = 3;
+        bt_cfg.bt_max_sync_conn = 3;
+    } else {
+        ret = esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT);
+        if (ret) {
+            ESP_LOGE(TAG, "esp_bt_controller_mem_release failed: %d", ret);
+            return ret;
+        }
+    }
+    ret = esp_bt_controller_init(&bt_cfg);
+    if (ret) {
+        ESP_LOGE(TAG, "esp_bt_controller_init failed: %d", ret);
+        return ret;
+    }
+
+    ret = esp_bt_controller_enable(mode);
+    if (ret) {
+        ESP_LOGE(TAG, "esp_bt_controller_enable failed: %d", ret);
+        return ret;
+    }
+
+    ret = esp_bluedroid_init();
+    if (ret) {
+        ESP_LOGE(TAG, "esp_bluedroid_init failed: %d", ret);
+        return ret;
+    }
+
+    ret = esp_bluedroid_enable();
+    if (ret) {
+        ESP_LOGE(TAG, "esp_bluedroid_enable failed: %d", ret);
+        return ret;
+    }
+
+    if (mode & ESP_BT_MODE_CLASSIC_BT) {
+        ret = init_bt_gap();
+        if (ret) {
+            return ret;
+        }
+    }
+
+    if (mode & ESP_BT_MODE_BLE) {
+        ret = init_ble_gap();
+        if (ret) {
+            return ret;
+        }
+    }
+    return ret;
+}
+
+
+
+
+esp_err_t esp_hid_gap_init(uint8_t mode)
+{
+    esp_err_t ret;
+    if (!mode || mode > ESP_BT_MODE_BTDM) {
+        ESP_LOGE(TAG, "Invalid mode given!");
+        return ESP_FAIL;
+    }
+
+    if (bt_hidh_cb_semaphore != NULL) {
+        ESP_LOGE(TAG, "Already initialised");
+        return ESP_FAIL;
+    }
+
+    bt_hidh_cb_semaphore = xSemaphoreCreateBinary();
+    if (bt_hidh_cb_semaphore == NULL) {
+        ESP_LOGE(TAG, "xSemaphoreCreateMutex failed!");
+        return ESP_FAIL;
+    }
+
+    ble_hidh_cb_semaphore = xSemaphoreCreateBinary();
+    if (ble_hidh_cb_semaphore == NULL) {
+        ESP_LOGE(TAG, "xSemaphoreCreateMutex failed!");
+        vSemaphoreDelete(bt_hidh_cb_semaphore);
+        bt_hidh_cb_semaphore = NULL;
+        return ESP_FAIL;
+    }
+
+    ret = init_low_level(mode);
+    if (ret != ESP_OK) {
+        vSemaphoreDelete(bt_hidh_cb_semaphore);
+        bt_hidh_cb_semaphore = NULL;
+        vSemaphoreDelete(ble_hidh_cb_semaphore);
+        ble_hidh_cb_semaphore = NULL;
+        return ret;
+    }
+
+    return ESP_OK;
+}
+
+esp_err_t esp_hid_scan(uint32_t seconds, size_t *num_results, esp_hid_scan_result_t **results)
+{
+    if (num_bt_scan_results || bt_scan_results || num_ble_scan_results || ble_scan_results) {
+        ESP_LOGE(TAG, "There are old scan results. Free them first!");
+        return ESP_FAIL;
+    }
+
+    if (start_ble_scan(seconds) == ESP_OK) {
+        if (start_bt_scan(seconds) == ESP_OK) {
+            WAIT_BT_CB();
+        }
+        WAIT_BLE_CB();
+    } else {
+        return ESP_FAIL;
+    }
+
+    *num_results = num_bt_scan_results + num_ble_scan_results;
+    *results = bt_scan_results;
+    if (num_bt_scan_results) {
+        while (bt_scan_results->next != NULL) {
+            bt_scan_results = bt_scan_results->next;
+        }
+        bt_scan_results->next = ble_scan_results;
+    } else {
+        *results = ble_scan_results;
+    }
+
+    num_bt_scan_results = 0;
+    bt_scan_results = NULL;
+    num_ble_scan_results = 0;
+    ble_scan_results = NULL;
+    return ESP_OK;
+}
diff --git a/main/esp_hid_gap.h b/main/esp_hid_gap.h
new file mode 100644
index 0000000..f2fb240
--- /dev/null
+++ b/main/esp_hid_gap.h
@@ -0,0 +1,68 @@
+// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HID_GAP_H_
+#define _ESP_HID_GAP_H_
+
+#include "esp_err.h"
+#include "esp_log.h"
+
+#include "esp_bt.h"
+#include "esp_bt_defs.h"
+#include "esp_bt_main.h"
+#include "esp_gattc_api.h"
+#include "esp_gatt_defs.h"
+#include "esp_gap_ble_api.h"
+#include "esp_gap_bt_api.h"
+#include "esp_hid_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_hidh_scan_result_s {
+    struct esp_hidh_scan_result_s *next;
+
+    esp_bd_addr_t bda;
+    const char *name;
+    int8_t rssi;
+    esp_hid_usage_t usage;
+    esp_hid_transport_t transport; //BT, BLE or USB
+    union {
+        struct {
+            esp_bt_cod_t cod;
+            esp_bt_uuid_t uuid;
+        } bt;
+        struct {
+            esp_ble_addr_type_t addr_type;
+            uint16_t appearance;
+        } ble;
+    };
+} esp_hid_scan_result_t;
+
+esp_err_t esp_hid_gap_init(uint8_t mode);
+esp_err_t esp_hid_scan(uint32_t seconds, size_t *num_results, esp_hid_scan_result_t **results);
+void esp_hid_scan_results_free(esp_hid_scan_result_t *results);
+
+esp_err_t esp_hid_ble_gap_adv_init(uint16_t appearance, const char *device_name);
+esp_err_t esp_hid_ble_gap_adv_start(void);
+
+void print_uuid(esp_bt_uuid_t *uuid);
+const char *ble_addr_type_str(esp_ble_addr_type_t ble_addr_type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_HIDH_GAP_H_ */
diff --git a/main/gpio.c b/main/gpio.c
new file mode 100644
index 0000000..75e977c
--- /dev/null
+++ b/main/gpio.c
@@ -0,0 +1,28 @@
+/* Hello World Example
+
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+ */
+#include <stdio.h>
+#include "driver/gpio.h"
+#include "sdkconfig.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "esp_system.h"
+#include "esp_spi_flash.h"
+
+#include "gpio.h"
+
+void	gpio_init(void) {
+	gpio_reset_pin(GREENLED_GPIO);
+	gpio_set_direction(GREENLED_GPIO, GPIO_MODE_OUTPUT);
+
+	/* do a half second blink for debug mode */
+	gpio_set_level(GREENLED_GPIO, 1);
+	vTaskDelay(500 / portTICK_PERIOD_MS);
+	gpio_set_level(GREENLED_GPIO, 0);
+	vTaskDelay(500 / portTICK_PERIOD_MS);
+}
diff --git a/main/gpio.h b/main/gpio.h
new file mode 100644
index 0000000..fc4d945
--- /dev/null
+++ b/main/gpio.h
@@ -0,0 +1,64 @@
+/*
+ *  gpio.h
+ *  quack
+ *
+ *  Created by Michel DEPEIGE on 13/09/2020.
+ *  Copyright (c) 2020 Michel DEPEIGE.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program (see the file COPYING); if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA
+ *
+ */
+
+#ifndef GPIO_H
+#define GPIO_H
+
+/* prototypes */
+void	gpio_init(void);
+
+/* GPIO pins definitions
+ *
+ * pin layout is compatible with ESP32-CAM module for prototyping
+ * LEDs aren't avaible on ESP32-CAM but DEBUG LED (Camera connector)
+ * 
+ * on ESP32-CAM the following pins are already used:
+ * - CSI_MCLK (GPIO0) 
+ * - U0TXD (GPIO1)
+ * - U0TXD (GPIO3)
+ * - FLASH (GPIO4)
+ *
+ * on ESP32-PICO-D4, the following pins are used for connecting the
+ * embedded flash:
+ * - CLK (GPIO6)
+ * - SD0 (GPIO7)
+ * - SD1 (GPIO8)
+ * - CMD (GPIO11)
+ * - GPIO16
+ * - GPIO17
+ */
+
+#define ADB_GPIO	4
+#define CLICK_HPIO	2
+#define QX1_GPIO	12
+#define QX2_GPIO	13
+#define QY1_GPIO	14
+#define QY2_GPIO	15
+
+#define GREENLED_GPIO	21
+#define BLUELED_GPIO	25
+#define YELLOWLED_GPIO	26
+#define REDLED_GPIO	27
+#endif
+
diff --git a/main/main.c b/main/main.c
new file mode 100644
index 0000000..9ff00f0
--- /dev/null
+++ b/main/main.c
@@ -0,0 +1,42 @@
+/* Hello World Example
+
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+ */
+#include <stdio.h>
+#include "driver/gpio.h"
+#include "sdkconfig.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "esp_log.h"
+#include "esp_system.h"
+#include "esp_spi_flash.h"
+
+#include "blue.h"
+#include "gpio.h"
+
+static const char* TAG = "quack";
+
+void app_main(void)
+{
+	/* Print chip information */
+	esp_chip_info_t chip_info;
+	esp_chip_info(&chip_info);
+	ESP_LOGI(TAG, "This is %s chip with %d CPU cores, WiFi%s%s, "
+		"revision %d, %dMB %s flash",
+		CONFIG_IDF_TARGET,
+		chip_info.cores,
+		(chip_info.features & CHIP_FEATURE_BT) ? "/BT" : "",
+		(chip_info.features & CHIP_FEATURE_BLE) ? "/BLE" : "",
+		chip_info.revision,
+		spi_flash_get_chip_size() / (1024 * 1024),
+		(chip_info.features & CHIP_FEATURE_EMB_FLASH) ? "embedded" : "external");
+
+	ESP_LOGI(TAG, "Minimum free heap size: %d bytes", esp_get_minimum_free_heap_size());
+
+	gpio_init();
+	blue_init();
+}
diff --git a/sdkconfig b/sdkconfig
new file mode 100644
index 0000000..561ef9c
--- /dev/null
+++ b/sdkconfig
@@ -0,0 +1,1622 @@
+#
+# Automatically generated file. DO NOT EDIT.
+# Espressif IoT Development Framework (ESP-IDF) Project Configuration
+#
+CONFIG_IDF_CMAKE=y
+CONFIG_IDF_TARGET="esp32"
+CONFIG_IDF_TARGET_ESP32=y
+CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
+
+#
+# SDK tool configuration
+#
+CONFIG_SDK_TOOLPREFIX="xtensa-esp32-elf-"
+# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set
+# end of SDK tool configuration
+
+#
+# Build type
+#
+CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y
+# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set
+CONFIG_APP_BUILD_GENERATE_BINARIES=y
+CONFIG_APP_BUILD_BOOTLOADER=y
+CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
+# end of Build type
+
+#
+# Application manager
+#
+CONFIG_APP_COMPILE_TIME_DATE=y
+# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set
+# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set
+# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set
+CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16
+# end of Application manager
+
+#
+# Bootloader config
+#
+CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000
+CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set
+CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y
+# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
+CONFIG_BOOTLOADER_LOG_LEVEL=3
+# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set
+CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
+# CONFIG_BOOTLOADER_FACTORY_RESET is not set
+# CONFIG_BOOTLOADER_APP_TEST is not set
+CONFIG_BOOTLOADER_WDT_ENABLE=y
+# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set
+CONFIG_BOOTLOADER_WDT_TIME_MS=9000
+# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set
+# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set
+CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0
+# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set
+# end of Bootloader config
+
+#
+# Security features
+#
+# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set
+# CONFIG_SECURE_BOOT is not set
+# CONFIG_SECURE_FLASH_ENC_ENABLED is not set
+# end of Security features
+
+#
+# Serial flasher config
+#
+CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
+CONFIG_ESPTOOLPY_WITH_STUB=y
+# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
+# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
+CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
+# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
+CONFIG_ESPTOOLPY_FLASHMODE="dio"
+# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set
+CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
+# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set
+# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
+CONFIG_ESPTOOLPY_FLASHFREQ="40m"
+# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
+# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE="4MB"
+CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y
+CONFIG_ESPTOOLPY_BEFORE_RESET=y
+# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
+CONFIG_ESPTOOLPY_BEFORE="default_reset"
+CONFIG_ESPTOOLPY_AFTER_RESET=y
+# CONFIG_ESPTOOLPY_AFTER_NORESET is not set
+CONFIG_ESPTOOLPY_AFTER="hard_reset"
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_CONSOLE is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set
+CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set
+CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200
+CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
+# end of Serial flasher config
+
+#
+# Partition Table
+#
+CONFIG_PARTITION_TABLE_SINGLE_APP=y
+# CONFIG_PARTITION_TABLE_TWO_OTA is not set
+# CONFIG_PARTITION_TABLE_CUSTOM is not set
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
+CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv"
+CONFIG_PARTITION_TABLE_OFFSET=0x8000
+CONFIG_PARTITION_TABLE_MD5=y
+# end of Partition Table
+
+#
+# Compiler options
+#
+CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y
+# CONFIG_COMPILER_OPTIMIZATION_SIZE is not set
+# CONFIG_COMPILER_OPTIMIZATION_PERF is not set
+# CONFIG_COMPILER_OPTIMIZATION_NONE is not set
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y
+# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set
+# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set
+# CONFIG_COMPILER_CXX_EXCEPTIONS is not set
+# CONFIG_COMPILER_CXX_RTTI is not set
+# CONFIG_COMPILER_STACK_CHECK_MODE_NONE is not set
+CONFIG_COMPILER_STACK_CHECK_MODE_NORM=y
+# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set
+# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
+CONFIG_COMPILER_STACK_CHECK=y
+# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
+# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set
+# end of Compiler options
+
+#
+# Component config
+#
+
+#
+# Application Level Tracing
+#
+# CONFIG_APPTRACE_DEST_TRAX is not set
+CONFIG_APPTRACE_DEST_NONE=y
+CONFIG_APPTRACE_LOCK_ENABLE=y
+# end of Application Level Tracing
+
+#
+# ESP-ASIO
+#
+# CONFIG_ASIO_SSL_SUPPORT is not set
+# end of ESP-ASIO
+
+#
+# Bluetooth
+#
+CONFIG_BT_ENABLED=y
+
+#
+# Bluetooth controller
+#
+# CONFIG_BTDM_CTRL_MODE_BLE_ONLY is not set
+# CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY is not set
+CONFIG_BTDM_CTRL_MODE_BTDM=y
+CONFIG_BTDM_CTRL_BLE_MAX_CONN=3
+CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN=2
+CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN=0
+# CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_HCI is not set
+CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_PCM=y
+CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF=1
+CONFIG_BTDM_CTRL_PCM_ROLE_EDGE_CONFIG=y
+CONFIG_BTDM_CTRL_PCM_ROLE_MASTER=y
+# CONFIG_BTDM_CTRL_PCM_ROLE_SLAVE is not set
+CONFIG_BTDM_CTRL_PCM_POLAR_FALLING_EDGE=y
+# CONFIG_BTDM_CTRL_PCM_POLAR_RISING_EDGE is not set
+CONFIG_BTDM_CTRL_PCM_ROLE_EFF=0
+CONFIG_BTDM_CTRL_PCM_POLAR_EFF=0
+# CONFIG_BTDM_CTRL_AUTO_LATENCY is not set
+CONFIG_BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT=y
+CONFIG_BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT_EFF=y
+CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF=3
+CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF=2
+CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF=0
+CONFIG_BTDM_CTRL_PINNED_TO_CORE_0=y
+# CONFIG_BTDM_CTRL_PINNED_TO_CORE_1 is not set
+CONFIG_BTDM_CTRL_PINNED_TO_CORE=0
+CONFIG_BTDM_CTRL_HCI_MODE_VHCI=y
+# CONFIG_BTDM_CTRL_HCI_MODE_UART_H4 is not set
+
+#
+# MODEM SLEEP Options
+#
+CONFIG_BTDM_MODEM_SLEEP=y
+CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG=y
+# CONFIG_BTDM_MODEM_SLEEP_MODE_EVED is not set
+CONFIG_BTDM_LPCLK_SEL_MAIN_XTAL=y
+# end of MODEM SLEEP Options
+
+CONFIG_BTDM_BLE_DEFAULT_SCA_250PPM=y
+CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF=1
+CONFIG_BTDM_BLE_SCAN_DUPL=y
+CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE=y
+# CONFIG_BTDM_SCAN_DUPL_TYPE_DATA is not set
+# CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE is not set
+CONFIG_BTDM_SCAN_DUPL_TYPE=0
+CONFIG_BTDM_SCAN_DUPL_CACHE_SIZE=200
+# CONFIG_BTDM_BLE_MESH_SCAN_DUPL_EN is not set
+CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED=y
+CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y
+CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM=100
+CONFIG_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD=20
+# end of Bluetooth controller
+
+CONFIG_BT_BLUEDROID_ENABLED=y
+# CONFIG_BT_NIMBLE_ENABLED is not set
+# CONFIG_BT_CONTROLLER_ONLY is not set
+
+#
+# Bluedroid Options
+#
+CONFIG_BT_BTC_TASK_STACK_SIZE=3072
+CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0=y
+# CONFIG_BT_BLUEDROID_PINNED_TO_CORE_1 is not set
+CONFIG_BT_BLUEDROID_PINNED_TO_CORE=0
+CONFIG_BT_BTU_TASK_STACK_SIZE=4096
+# CONFIG_BT_BLUEDROID_MEM_DEBUG is not set
+CONFIG_BT_CLASSIC_ENABLED=y
+# CONFIG_BT_A2DP_ENABLE is not set
+# CONFIG_BT_SPP_ENABLED is not set
+# CONFIG_BT_HFP_ENABLE is not set
+CONFIG_BT_HID_HOST_ENABLED=y
+CONFIG_BT_SSP_ENABLED=y
+CONFIG_BT_BLE_ENABLED=y
+CONFIG_BT_GATTS_ENABLE=y
+# CONFIG_BT_GATTS_PPCP_CHAR_GAP is not set
+# CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set
+CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO=y
+CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE=0
+CONFIG_BT_GATTC_ENABLE=y
+# CONFIG_BT_GATTC_CACHE_NVS_FLASH is not set
+CONFIG_BT_BLE_SMP_ENABLE=y
+# CONFIG_BT_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
+# CONFIG_BT_STACK_NO_LOG is not set
+
+#
+# BT DEBUG LOG LEVEL
+#
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_HCI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_HCI_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BTM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BTM_TRACE_LEVEL=2
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_L2CAP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL=2
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_SDP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_SDP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_GAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_GAP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BNEP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BNEP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_PAN_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_PAN_TRACE_LEVEL=2
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_A2D_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_A2D_TRACE_LEVEL=2
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_AVDT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_AVDT_TRACE_LEVEL=2
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_AVCT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_AVCT_TRACE_LEVEL=2
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_AVRC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_AVRC_TRACE_LEVEL=2
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_MCA_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_MCA_TRACE_LEVEL=2
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_HID_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_HID_TRACE_LEVEL=2
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_APPL_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_APPL_TRACE_LEVEL=2
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_GATT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_GATT_TRACE_LEVEL=2
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_SMP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_SMP_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BTIF_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BTIF_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BTC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BTC_TRACE_LEVEL=2
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_OSI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_OSI_TRACE_LEVEL=2
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_NONE is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_ERROR is not set
+CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING=y
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_API is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BT_LOG_BLUFI_TRACE_LEVEL=2
+# end of BT DEBUG LOG LEVEL
+
+CONFIG_BT_ACL_CONNECTIONS=4
+# CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST is not set
+# CONFIG_BT_BLE_DYNAMIC_ENV_MEMORY is not set
+# CONFIG_BT_BLE_HOST_QUEUE_CONG_CHECK is not set
+CONFIG_BT_SMP_ENABLE=y
+# CONFIG_BT_BLE_ACT_SCAN_REP_ADV_SCAN is not set
+CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT=30
+CONFIG_BT_RESERVE_DRAM=0xdb5c
+# end of Bluedroid Options
+# end of Bluetooth
+
+# CONFIG_BLE_MESH is not set
+
+#
+# CoAP Configuration
+#
+CONFIG_COAP_MBEDTLS_PSK=y
+# CONFIG_COAP_MBEDTLS_PKI is not set
+# CONFIG_COAP_MBEDTLS_DEBUG is not set
+CONFIG_COAP_LOG_DEFAULT_LEVEL=0
+# end of CoAP Configuration
+
+#
+# Driver configurations
+#
+
+#
+# ADC configuration
+#
+# CONFIG_ADC_FORCE_XPD_FSM is not set
+CONFIG_ADC_DISABLE_DAC=y
+# end of ADC configuration
+
+#
+# SPI configuration
+#
+# CONFIG_SPI_MASTER_IN_IRAM is not set
+CONFIG_SPI_MASTER_ISR_IN_IRAM=y
+# CONFIG_SPI_SLAVE_IN_IRAM is not set
+CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
+# end of SPI configuration
+
+#
+# UART configuration
+#
+# CONFIG_UART_ISR_IN_IRAM is not set
+# end of UART configuration
+
+#
+# RTCIO configuration
+#
+# CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC is not set
+# end of RTCIO configuration
+# end of Driver configurations
+
+#
+# eFuse Bit Manager
+#
+# CONFIG_EFUSE_CUSTOM_TABLE is not set
+# CONFIG_EFUSE_VIRTUAL is not set
+# CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set
+CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y
+# CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set
+CONFIG_EFUSE_MAX_BLK_LEN=192
+# end of eFuse Bit Manager
+
+#
+# ESP-TLS
+#
+CONFIG_ESP_TLS_USING_MBEDTLS=y
+# CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set
+# CONFIG_ESP_TLS_SERVER is not set
+# CONFIG_ESP_TLS_PSK_VERIFICATION is not set
+# end of ESP-TLS
+
+#
+# ESP32-specific
+#
+CONFIG_ESP32_REV_MIN_0=y
+# CONFIG_ESP32_REV_MIN_1 is not set
+# CONFIG_ESP32_REV_MIN_2 is not set
+# CONFIG_ESP32_REV_MIN_3 is not set
+CONFIG_ESP32_REV_MIN=0
+CONFIG_ESP32_DPORT_WORKAROUND=y
+# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set
+CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
+# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set
+CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
+# CONFIG_ESP32_SPIRAM_SUPPORT is not set
+# CONFIG_ESP32_TRAX is not set
+CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
+# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
+CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
+CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
+# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
+CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
+CONFIG_ESP32_DEBUG_OCDAWARE=y
+# CONFIG_ESP32_BROWNOUT_DET is not set
+CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set
+CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
+# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024
+CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000
+CONFIG_ESP32_XTAL_FREQ_40=y
+# CONFIG_ESP32_XTAL_FREQ_26 is not set
+# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
+CONFIG_ESP32_XTAL_FREQ=40
+# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
+# CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
+# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
+CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5
+# end of ESP32-specific
+
+#
+# Power Management
+#
+# CONFIG_PM_ENABLE is not set
+# end of Power Management
+
+#
+# ADC-Calibration
+#
+CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y
+CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y
+CONFIG_ADC_CAL_LUT_ENABLE=y
+# end of ADC-Calibration
+
+#
+# Common ESP-related
+#
+CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
+CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
+CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304
+CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584
+CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
+CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y
+CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
+CONFIG_ESP_CONSOLE_UART_DEFAULT=y
+# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
+# CONFIG_ESP_CONSOLE_NONE is not set
+CONFIG_ESP_CONSOLE_UART=y
+CONFIG_ESP_CONSOLE_UART_NUM=0
+CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
+CONFIG_ESP_INT_WDT=y
+CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
+CONFIG_ESP_INT_WDT_CHECK_CPU1=y
+CONFIG_ESP_TASK_WDT=y
+# CONFIG_ESP_TASK_WDT_PANIC is not set
+CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
+CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
+CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y
+# CONFIG_ESP_PANIC_HANDLER_IRAM is not set
+CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
+CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y
+CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y
+CONFIG_ESP_MAC_ADDR_UNIVERSE_BT_OFFSET=2
+CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y
+# end of Common ESP-related
+
+#
+# Ethernet
+#
+# CONFIG_ETH_USE_ESP32_EMAC is not set
+# CONFIG_ETH_USE_SPI_ETHERNET is not set
+# CONFIG_ETH_USE_OPENETH is not set
+# end of Ethernet
+
+#
+# Event Loop Library
+#
+# CONFIG_ESP_EVENT_LOOP_PROFILING is not set
+CONFIG_ESP_EVENT_POST_FROM_ISR=y
+CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y
+# end of Event Loop Library
+
+#
+# GDB Stub
+#
+# end of GDB Stub
+
+#
+# ESP HTTP client
+#
+# CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS is not set
+# CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set
+# end of ESP HTTP client
+
+#
+# HTTP Server
+#
+CONFIG_HTTPD_MAX_REQ_HDR_LEN=512
+CONFIG_HTTPD_MAX_URI_LEN=512
+# CONFIG_HTTPD_ERR_RESP_NO_DELAY is not set
+CONFIG_HTTPD_PURGE_BUF_LEN=32
+# CONFIG_HTTPD_LOG_PURGE_DATA is not set
+# CONFIG_HTTPD_WS_SUPPORT is not set
+# end of HTTP Server
+
+#
+# ESP HTTPS OTA
+#
+# CONFIG_OTA_ALLOW_HTTP is not set
+# end of ESP HTTPS OTA
+
+#
+# ESP HTTPS server
+#
+# CONFIG_ESP_HTTPS_SERVER_ENABLE is not set
+# end of ESP HTTPS server
+
+#
+# ESP NETIF Adapter
+#
+CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120
+CONFIG_ESP_NETIF_TCPIP_LWIP=y
+# CONFIG_ESP_NETIF_LOOPBACK is not set
+CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y
+# end of ESP NETIF Adapter
+
+#
+# ESP System Settings
+#
+# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
+CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y
+# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
+# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set
+# end of ESP System Settings
+
+#
+# High resolution timer (esp_timer)
+#
+# CONFIG_ESP_TIMER_PROFILING is not set
+CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584
+# CONFIG_ESP_TIMER_IMPL_FRC2 is not set
+CONFIG_ESP_TIMER_IMPL_TG0_LAC=y
+# end of High resolution timer (esp_timer)
+
+#
+# Wi-Fi
+#
+# CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE is not set
+CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10
+CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32
+# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
+CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y
+CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1
+CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32
+# CONFIG_ESP32_WIFI_CSI_ENABLED is not set
+# CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED is not set
+CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y
+CONFIG_ESP32_WIFI_RX_BA_WIN=6
+# CONFIG_ESP32_WIFI_NVS_ENABLED is not set
+CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y
+# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set
+CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752
+CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
+# CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE is not set
+# CONFIG_ESP32_WIFI_IRAM_OPT is not set
+# CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set
+# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
+# end of Wi-Fi
+
+#
+# PHY
+#
+# CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE is not set
+# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
+CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
+CONFIG_ESP32_PHY_MAX_TX_POWER=20
+# end of PHY
+
+#
+# Core dump
+#
+# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
+# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
+CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y
+# end of Core dump
+
+#
+# FAT Filesystem support
+#
+# CONFIG_FATFS_CODEPAGE_DYNAMIC is not set
+CONFIG_FATFS_CODEPAGE_437=y
+# CONFIG_FATFS_CODEPAGE_720 is not set
+# CONFIG_FATFS_CODEPAGE_737 is not set
+# CONFIG_FATFS_CODEPAGE_771 is not set
+# CONFIG_FATFS_CODEPAGE_775 is not set
+# CONFIG_FATFS_CODEPAGE_850 is not set
+# CONFIG_FATFS_CODEPAGE_852 is not set
+# CONFIG_FATFS_CODEPAGE_855 is not set
+# CONFIG_FATFS_CODEPAGE_857 is not set
+# CONFIG_FATFS_CODEPAGE_860 is not set
+# CONFIG_FATFS_CODEPAGE_861 is not set
+# CONFIG_FATFS_CODEPAGE_862 is not set
+# CONFIG_FATFS_CODEPAGE_863 is not set
+# CONFIG_FATFS_CODEPAGE_864 is not set
+# CONFIG_FATFS_CODEPAGE_865 is not set
+# CONFIG_FATFS_CODEPAGE_866 is not set
+# CONFIG_FATFS_CODEPAGE_869 is not set
+# CONFIG_FATFS_CODEPAGE_932 is not set
+# CONFIG_FATFS_CODEPAGE_936 is not set
+# CONFIG_FATFS_CODEPAGE_949 is not set
+# CONFIG_FATFS_CODEPAGE_950 is not set
+CONFIG_FATFS_CODEPAGE=437
+CONFIG_FATFS_LFN_NONE=y
+# CONFIG_FATFS_LFN_HEAP is not set
+# CONFIG_FATFS_LFN_STACK is not set
+CONFIG_FATFS_FS_LOCK=0
+CONFIG_FATFS_TIMEOUT_MS=10000
+CONFIG_FATFS_PER_FILE_CACHE=y
+# end of FAT Filesystem support
+
+#
+# Modbus configuration
+#
+CONFIG_FMB_COMM_MODE_TCP_EN=y
+CONFIG_FMB_TCP_PORT_DEFAULT=502
+CONFIG_FMB_TCP_PORT_MAX_CONN=5
+CONFIG_FMB_TCP_CONNECTION_TOUT_SEC=20
+CONFIG_FMB_COMM_MODE_RTU_EN=y
+CONFIG_FMB_COMM_MODE_ASCII_EN=y
+CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND=150
+CONFIG_FMB_MASTER_DELAY_MS_CONVERT=200
+CONFIG_FMB_QUEUE_LENGTH=20
+CONFIG_FMB_PORT_TASK_STACK_SIZE=4096
+CONFIG_FMB_SERIAL_BUF_SIZE=256
+CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8
+CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000
+CONFIG_FMB_PORT_TASK_PRIO=10
+# CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set
+CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20
+CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
+CONFIG_FMB_CONTROLLER_STACK_SIZE=4096
+CONFIG_FMB_EVENT_QUEUE_TIMEOUT=20
+CONFIG_FMB_TIMER_PORT_ENABLED=y
+CONFIG_FMB_TIMER_GROUP=0
+CONFIG_FMB_TIMER_INDEX=0
+# CONFIG_FMB_TIMER_ISR_IN_IRAM is not set
+# end of Modbus configuration
+
+#
+# FreeRTOS
+#
+# CONFIG_FREERTOS_UNICORE is not set
+CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF
+CONFIG_FREERTOS_CORETIMER_0=y
+# CONFIG_FREERTOS_CORETIMER_1 is not set
+CONFIG_FREERTOS_HZ=100
+CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y
+# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
+# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
+CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
+# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set
+CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
+CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1
+CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
+# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set
+# CONFIG_FREERTOS_ASSERT_DISABLE is not set
+CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536
+CONFIG_FREERTOS_ISR_STACKSIZE=1536
+# CONFIG_FREERTOS_LEGACY_HOOKS is not set
+CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16
+# CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION is not set
+CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1
+CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048
+CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10
+CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
+# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set
+# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set
+CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y
+CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
+# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
+CONFIG_FREERTOS_DEBUG_OCDAWARE=y
+# CONFIG_FREERTOS_FPU_IN_ISR is not set
+# end of FreeRTOS
+
+#
+# Heap memory debugging
+#
+CONFIG_HEAP_POISONING_DISABLED=y
+# CONFIG_HEAP_POISONING_LIGHT is not set
+# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set
+CONFIG_HEAP_TRACING_OFF=y
+# CONFIG_HEAP_TRACING_STANDALONE is not set
+# CONFIG_HEAP_TRACING_TOHOST is not set
+# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set
+# end of Heap memory debugging
+
+#
+# jsmn
+#
+# CONFIG_JSMN_PARENT_LINKS is not set
+# CONFIG_JSMN_STRICT is not set
+# end of jsmn
+
+#
+# libsodium
+#
+# end of libsodium
+
+#
+# Log output
+#
+# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set
+# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set
+# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set
+# CONFIG_LOG_DEFAULT_LEVEL_INFO is not set
+# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
+CONFIG_LOG_DEFAULT_LEVEL_VERBOSE=y
+CONFIG_LOG_DEFAULT_LEVEL=5
+CONFIG_LOG_COLORS=y
+CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
+# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
+# end of Log output
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="espressif"
+CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
+# CONFIG_LWIP_L2_TO_L3_COPY is not set
+# CONFIG_LWIP_IRAM_OPTIMIZATION is not set
+CONFIG_LWIP_TIMERS_ONDEMAND=y
+CONFIG_LWIP_MAX_SOCKETS=10
+# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set
+# CONFIG_LWIP_SO_LINGER is not set
+CONFIG_LWIP_SO_REUSE=y
+CONFIG_LWIP_SO_REUSE_RXTOALL=y
+# CONFIG_LWIP_SO_RCVBUF is not set
+# CONFIG_LWIP_NETBUF_RECVINFO is not set
+CONFIG_LWIP_IP4_FRAG=y
+CONFIG_LWIP_IP6_FRAG=y
+# CONFIG_LWIP_IP4_REASSEMBLY is not set
+# CONFIG_LWIP_IP6_REASSEMBLY is not set
+# CONFIG_LWIP_IP_FORWARD is not set
+# CONFIG_LWIP_STATS is not set
+# CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set
+CONFIG_LWIP_ESP_GRATUITOUS_ARP=y
+CONFIG_LWIP_GARP_TMR_INTERVAL=60
+CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
+CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
+# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
+
+#
+# DHCP server
+#
+CONFIG_LWIP_DHCPS_LEASE_UNIT=60
+CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
+# end of DHCP server
+
+# CONFIG_LWIP_AUTOIP is not set
+# CONFIG_LWIP_IPV6_AUTOCONFIG is not set
+CONFIG_LWIP_NETIF_LOOPBACK=y
+CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
+
+#
+# TCP
+#
+CONFIG_LWIP_MAX_ACTIVE_TCP=16
+CONFIG_LWIP_MAX_LISTENING_TCP=16
+CONFIG_LWIP_TCP_MAXRTX=12
+CONFIG_LWIP_TCP_SYNMAXRTX=6
+CONFIG_LWIP_TCP_MSS=1440
+CONFIG_LWIP_TCP_TMR_INTERVAL=250
+CONFIG_LWIP_TCP_MSL=60000
+CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744
+CONFIG_LWIP_TCP_WND_DEFAULT=5744
+CONFIG_LWIP_TCP_RECVMBOX_SIZE=6
+CONFIG_LWIP_TCP_QUEUE_OOSEQ=y
+# CONFIG_LWIP_TCP_SACK_OUT is not set
+# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
+CONFIG_LWIP_TCP_OVERSIZE_MSS=y
+# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set
+# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set
+CONFIG_LWIP_TCP_RTO_TIME=3000
+# end of TCP
+
+#
+# UDP
+#
+CONFIG_LWIP_MAX_UDP_PCBS=16
+CONFIG_LWIP_UDP_RECVMBOX_SIZE=6
+# end of UDP
+
+CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072
+CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
+# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set
+# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set
+CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
+# CONFIG_LWIP_PPP_SUPPORT is not set
+CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
+CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
+# CONFIG_LWIP_SLIP_SUPPORT is not set
+
+#
+# ICMP
+#
+# CONFIG_LWIP_MULTICAST_PING is not set
+# CONFIG_LWIP_BROADCAST_PING is not set
+# end of ICMP
+
+#
+# LWIP RAW API
+#
+CONFIG_LWIP_MAX_RAW_PCBS=16
+# end of LWIP RAW API
+
+#
+# SNTP
+#
+CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
+CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000
+# end of SNTP
+
+CONFIG_LWIP_ESP_LWIP_ASSERT=y
+
+#
+# Debug
+#
+# CONFIG_LWIP_NETIF_DEBUG is not set
+# CONFIG_LWIP_PBUF_DEBUG is not set
+# CONFIG_LWIP_ETHARP_DEBUG is not set
+# CONFIG_LWIP_API_LIB_DEBUG is not set
+# CONFIG_LWIP_SOCKETS_DEBUG is not set
+# CONFIG_LWIP_IP_DEBUG is not set
+# CONFIG_LWIP_ICMP_DEBUG is not set
+# CONFIG_LWIP_IP6_DEBUG is not set
+# CONFIG_LWIP_ICMP6_DEBUG is not set
+# end of Debug
+# end of LWIP
+
+#
+# mbedTLS
+#
+CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
+# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set
+# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
+CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
+CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384
+CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
+# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
+# CONFIG_MBEDTLS_DEBUG is not set
+
+#
+# Certificate Bundle
+#
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
+# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set
+# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set
+# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set
+# end of Certificate Bundle
+
+# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set
+# CONFIG_MBEDTLS_CMAC_C is not set
+CONFIG_MBEDTLS_HARDWARE_AES=y
+CONFIG_MBEDTLS_HARDWARE_MPI=y
+CONFIG_MBEDTLS_HARDWARE_SHA=y
+# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
+# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
+CONFIG_MBEDTLS_HAVE_TIME=y
+# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set
+CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y
+CONFIG_MBEDTLS_SHA512_C=y
+CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y
+# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set
+# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set
+# CONFIG_MBEDTLS_TLS_DISABLED is not set
+CONFIG_MBEDTLS_TLS_SERVER=y
+CONFIG_MBEDTLS_TLS_CLIENT=y
+CONFIG_MBEDTLS_TLS_ENABLED=y
+
+#
+# TLS Key Exchange Methods
+#
+# CONFIG_MBEDTLS_PSK_MODES is not set
+CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y
+# end of TLS Key Exchange Methods
+
+CONFIG_MBEDTLS_SSL_RENEGOTIATION=y
+# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set
+CONFIG_MBEDTLS_SSL_PROTO_TLS1=y
+CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y
+CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
+# CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set
+CONFIG_MBEDTLS_SSL_ALPN=y
+CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
+CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
+
+#
+# Symmetric Ciphers
+#
+CONFIG_MBEDTLS_AES_C=y
+# CONFIG_MBEDTLS_CAMELLIA_C is not set
+# CONFIG_MBEDTLS_DES_C is not set
+CONFIG_MBEDTLS_RC4_DISABLED=y
+# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set
+# CONFIG_MBEDTLS_RC4_ENABLED is not set
+# CONFIG_MBEDTLS_BLOWFISH_C is not set
+# CONFIG_MBEDTLS_XTEA_C is not set
+CONFIG_MBEDTLS_CCM_C=y
+CONFIG_MBEDTLS_GCM_C=y
+# end of Symmetric Ciphers
+
+# CONFIG_MBEDTLS_RIPEMD160_C is not set
+
+#
+# Certificates
+#
+CONFIG_MBEDTLS_PEM_PARSE_C=y
+CONFIG_MBEDTLS_PEM_WRITE_C=y
+CONFIG_MBEDTLS_X509_CRL_PARSE_C=y
+CONFIG_MBEDTLS_X509_CSR_PARSE_C=y
+# end of Certificates
+
+CONFIG_MBEDTLS_ECP_C=y
+CONFIG_MBEDTLS_ECDH_C=y
+CONFIG_MBEDTLS_ECDSA_C=y
+# CONFIG_MBEDTLS_ECJPAKE_C is not set
+CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y
+CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
+# CONFIG_MBEDTLS_POLY1305_C is not set
+# CONFIG_MBEDTLS_CHACHA20_C is not set
+# CONFIG_MBEDTLS_HKDF_C is not set
+# CONFIG_MBEDTLS_THREADING_C is not set
+# CONFIG_MBEDTLS_SECURITY_RISKS is not set
+# end of mbedTLS
+
+#
+# mDNS
+#
+CONFIG_MDNS_MAX_SERVICES=10
+CONFIG_MDNS_TASK_PRIORITY=1
+CONFIG_MDNS_TASK_STACK_SIZE=4096
+# CONFIG_MDNS_TASK_AFFINITY_NO_AFFINITY is not set
+CONFIG_MDNS_TASK_AFFINITY_CPU0=y
+# CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set
+CONFIG_MDNS_TASK_AFFINITY=0x0
+CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000
+CONFIG_MDNS_TIMER_PERIOD_MS=100
+# end of mDNS
+
+#
+# ESP-MQTT Configurations
+#
+# CONFIG_MQTT_PROTOCOL_311 is not set
+# CONFIG_MQTT_TRANSPORT_SSL is not set
+# CONFIG_MQTT_TRANSPORT_WEBSOCKET is not set
+# CONFIG_MQTT_USE_CUSTOM_CONFIG is not set
+# CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set
+# CONFIG_MQTT_CUSTOM_OUTBOX is not set
+# end of ESP-MQTT Configurations
+
+#
+# Newlib
+#
+CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y
+# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set
+# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set
+# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set
+# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set
+CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y
+# CONFIG_NEWLIB_NANO_FORMAT is not set
+# end of Newlib
+
+#
+# NVS
+#
+# end of NVS
+
+#
+# OpenSSL
+#
+# CONFIG_OPENSSL_DEBUG is not set
+CONFIG_OPENSSL_ERROR_STACK=y
+# CONFIG_OPENSSL_ASSERT_DO_NOTHING is not set
+CONFIG_OPENSSL_ASSERT_EXIT=y
+# end of OpenSSL
+
+#
+# PThreads
+#
+CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5
+CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
+CONFIG_PTHREAD_STACK_MIN=768
+CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y
+# CONFIG_PTHREAD_DEFAULT_CORE_0 is not set
+# CONFIG_PTHREAD_DEFAULT_CORE_1 is not set
+CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
+CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
+# end of PThreads
+
+#
+# SPI Flash driver
+#
+# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
+# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
+CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
+CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
+# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set
+# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set
+# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set
+# CONFIG_SPI_FLASH_SHARE_SPI1_BUS is not set
+# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set
+CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y
+CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20
+CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1
+CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192
+
+#
+# Auto-detect flash chips
+#
+CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
+# end of Auto-detect flash chips
+# end of SPI Flash driver
+
+#
+# SPIFFS Configuration
+#
+CONFIG_SPIFFS_MAX_PARTITIONS=3
+
+#
+# SPIFFS Cache Configuration
+#
+CONFIG_SPIFFS_CACHE=y
+CONFIG_SPIFFS_CACHE_WR=y
+# CONFIG_SPIFFS_CACHE_STATS is not set
+# end of SPIFFS Cache Configuration
+
+CONFIG_SPIFFS_PAGE_CHECK=y
+CONFIG_SPIFFS_GC_MAX_RUNS=10
+# CONFIG_SPIFFS_GC_STATS is not set
+CONFIG_SPIFFS_PAGE_SIZE=256
+CONFIG_SPIFFS_OBJ_NAME_LEN=32
+# CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set
+CONFIG_SPIFFS_USE_MAGIC=y
+CONFIG_SPIFFS_USE_MAGIC_LENGTH=y
+CONFIG_SPIFFS_META_LENGTH=4
+CONFIG_SPIFFS_USE_MTIME=y
+
+#
+# Debug Configuration
+#
+# CONFIG_SPIFFS_DBG is not set
+# CONFIG_SPIFFS_API_DBG is not set
+# CONFIG_SPIFFS_GC_DBG is not set
+# CONFIG_SPIFFS_CACHE_DBG is not set
+# CONFIG_SPIFFS_CHECK_DBG is not set
+# CONFIG_SPIFFS_TEST_VISUALISATION is not set
+# end of Debug Configuration
+# end of SPIFFS Configuration
+
+#
+# TCP Transport
+#
+CONFIG_WS_BUFFER_SIZE=1024
+# end of TCP Transport
+
+#
+# TinyUSB
+#
+# end of TinyUSB
+
+#
+# Unity unit testing library
+#
+CONFIG_UNITY_ENABLE_FLOAT=y
+CONFIG_UNITY_ENABLE_DOUBLE=y
+# CONFIG_UNITY_ENABLE_COLOR is not set
+CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y
+# CONFIG_UNITY_ENABLE_FIXTURE is not set
+# CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set
+# end of Unity unit testing library
+
+#
+# Virtual file system
+#
+CONFIG_VFS_SUPPORT_IO=y
+CONFIG_VFS_SUPPORT_DIR=y
+CONFIG_VFS_SUPPORT_SELECT=y
+CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y
+CONFIG_VFS_SUPPORT_TERMIOS=y
+
+#
+# Host File System I/O (Semihosting)
+#
+CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1
+CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
+# end of Host File System I/O (Semihosting)
+# end of Virtual file system
+
+#
+# Wear Levelling
+#
+# CONFIG_WL_SECTOR_SIZE_512 is not set
+CONFIG_WL_SECTOR_SIZE_4096=y
+CONFIG_WL_SECTOR_SIZE=4096
+# end of Wear Levelling
+
+#
+# Wi-Fi Provisioning Manager
+#
+CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16
+CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30
+# end of Wi-Fi Provisioning Manager
+
+#
+# Supplicant
+#
+CONFIG_WPA_MBEDTLS_CRYPTO=y
+# CONFIG_WPA_DEBUG_PRINT is not set
+# CONFIG_WPA_TESTING_OPTIONS is not set
+# CONFIG_WPA_WPS_WARS is not set
+# end of Supplicant
+# end of Component config
+
+#
+# Compatibility options
+#
+# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set
+# end of Compatibility options
+
+# Deprecated options for backward compatibility
+CONFIG_TOOLPREFIX="xtensa-esp32-elf-"
+# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set
+CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y
+# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
+CONFIG_LOG_BOOTLOADER_LEVEL=3
+# CONFIG_APP_ROLLBACK_ENABLE is not set
+# CONFIG_FLASH_ENCRYPTION_ENABLED is not set
+# CONFIG_FLASHMODE_QIO is not set
+# CONFIG_FLASHMODE_QOUT is not set
+CONFIG_FLASHMODE_DIO=y
+# CONFIG_FLASHMODE_DOUT is not set
+# CONFIG_MONITOR_BAUD_9600B is not set
+# CONFIG_MONITOR_BAUD_57600B is not set
+CONFIG_MONITOR_BAUD_115200B=y
+# CONFIG_MONITOR_BAUD_230400B is not set
+# CONFIG_MONITOR_BAUD_921600B is not set
+# CONFIG_MONITOR_BAUD_2MB is not set
+# CONFIG_MONITOR_BAUD_OTHER is not set
+CONFIG_MONITOR_BAUD_OTHER_VAL=115200
+CONFIG_MONITOR_BAUD=115200
+CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y
+# CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set
+CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
+# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set
+# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set
+# CONFIG_CXX_EXCEPTIONS is not set
+# CONFIG_STACK_CHECK_NONE is not set
+CONFIG_STACK_CHECK_NORM=y
+# CONFIG_STACK_CHECK_STRONG is not set
+# CONFIG_STACK_CHECK_ALL is not set
+CONFIG_STACK_CHECK=y
+# CONFIG_WARN_WRITE_STRINGS is not set
+# CONFIG_DISABLE_GCC8_WARNINGS is not set
+# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
+CONFIG_ESP32_APPTRACE_DEST_NONE=y
+CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
+# CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY is not set
+# CONFIG_BTDM_CONTROLLER_MODE_BR_EDR_ONLY is not set
+CONFIG_BTDM_CONTROLLER_MODE_BTDM=y
+CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN=3
+CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN=2
+CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN=0
+CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=3
+CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=2
+CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0
+CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0
+CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI=y
+# CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4 is not set
+CONFIG_BTDM_CONTROLLER_MODEM_SLEEP=y
+CONFIG_BLE_SCAN_DUPLICATE=y
+CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR=y
+# CONFIG_SCAN_DUPLICATE_BY_ADV_DATA is not set
+# CONFIG_SCAN_DUPLICATE_BY_ADV_DATA_AND_DEVICE_ADDR is not set
+CONFIG_SCAN_DUPLICATE_TYPE=0
+CONFIG_DUPLICATE_SCAN_CACHE_SIZE=200
+# CONFIG_BLE_MESH_SCAN_DUPLICATE_EN is not set
+CONFIG_BTDM_CONTROLLER_FULL_SCAN_SUPPORTED=y
+CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_SUPPORTED=y
+CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_NUM=100
+CONFIG_BLE_ADV_REPORT_DISCARD_THRSHOLD=20
+CONFIG_BLUEDROID_ENABLED=y
+# CONFIG_NIMBLE_ENABLED is not set
+CONFIG_BTC_TASK_STACK_SIZE=3072
+CONFIG_BLUEDROID_PINNED_TO_CORE_0=y
+# CONFIG_BLUEDROID_PINNED_TO_CORE_1 is not set
+CONFIG_BLUEDROID_PINNED_TO_CORE=0
+CONFIG_BTU_TASK_STACK_SIZE=4096
+# CONFIG_BLUEDROID_MEM_DEBUG is not set
+CONFIG_CLASSIC_BT_ENABLED=y
+# CONFIG_A2DP_ENABLE is not set
+# CONFIG_HFP_ENABLE is not set
+CONFIG_GATTS_ENABLE=y
+# CONFIG_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set
+CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO=y
+CONFIG_GATTS_SEND_SERVICE_CHANGE_MODE=0
+CONFIG_GATTC_ENABLE=y
+# CONFIG_GATTC_CACHE_NVS_FLASH is not set
+CONFIG_BLE_SMP_ENABLE=y
+# CONFIG_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
+# CONFIG_HCI_TRACE_LEVEL_NONE is not set
+# CONFIG_HCI_TRACE_LEVEL_ERROR is not set
+CONFIG_HCI_TRACE_LEVEL_WARNING=y
+# CONFIG_HCI_TRACE_LEVEL_API is not set
+# CONFIG_HCI_TRACE_LEVEL_EVENT is not set
+# CONFIG_HCI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_HCI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_HCI_INITIAL_TRACE_LEVEL=2
+# CONFIG_BTM_TRACE_LEVEL_NONE is not set
+# CONFIG_BTM_TRACE_LEVEL_ERROR is not set
+CONFIG_BTM_TRACE_LEVEL_WARNING=y
+# CONFIG_BTM_TRACE_LEVEL_API is not set
+# CONFIG_BTM_TRACE_LEVEL_EVENT is not set
+# CONFIG_BTM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BTM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTM_INITIAL_TRACE_LEVEL=2
+# CONFIG_L2CAP_TRACE_LEVEL_NONE is not set
+# CONFIG_L2CAP_TRACE_LEVEL_ERROR is not set
+CONFIG_L2CAP_TRACE_LEVEL_WARNING=y
+# CONFIG_L2CAP_TRACE_LEVEL_API is not set
+# CONFIG_L2CAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_L2CAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_L2CAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_L2CAP_INITIAL_TRACE_LEVEL=2
+# CONFIG_RFCOMM_TRACE_LEVEL_NONE is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_ERROR is not set
+CONFIG_RFCOMM_TRACE_LEVEL_WARNING=y
+# CONFIG_RFCOMM_TRACE_LEVEL_API is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_EVENT is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_DEBUG is not set
+# CONFIG_RFCOMM_TRACE_LEVEL_VERBOSE is not set
+CONFIG_RFCOMM_INITIAL_TRACE_LEVEL=2
+# CONFIG_SDP_TRACE_LEVEL_NONE is not set
+# CONFIG_SDP_TRACE_LEVEL_ERROR is not set
+CONFIG_SDP_TRACE_LEVEL_WARNING=y
+# CONFIG_SDP_TRACE_LEVEL_API is not set
+# CONFIG_SDP_TRACE_LEVEL_EVENT is not set
+# CONFIG_SDP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_SDP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTH_LOG_SDP_INITIAL_TRACE_LEVEL=2
+# CONFIG_GAP_TRACE_LEVEL_NONE is not set
+# CONFIG_GAP_TRACE_LEVEL_ERROR is not set
+CONFIG_GAP_TRACE_LEVEL_WARNING=y
+# CONFIG_GAP_TRACE_LEVEL_API is not set
+# CONFIG_GAP_TRACE_LEVEL_EVENT is not set
+# CONFIG_GAP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_GAP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_GAP_INITIAL_TRACE_LEVEL=2
+CONFIG_BNEP_INITIAL_TRACE_LEVEL=2
+# CONFIG_PAN_TRACE_LEVEL_NONE is not set
+# CONFIG_PAN_TRACE_LEVEL_ERROR is not set
+CONFIG_PAN_TRACE_LEVEL_WARNING=y
+# CONFIG_PAN_TRACE_LEVEL_API is not set
+# CONFIG_PAN_TRACE_LEVEL_EVENT is not set
+# CONFIG_PAN_TRACE_LEVEL_DEBUG is not set
+# CONFIG_PAN_TRACE_LEVEL_VERBOSE is not set
+CONFIG_PAN_INITIAL_TRACE_LEVEL=2
+# CONFIG_A2D_TRACE_LEVEL_NONE is not set
+# CONFIG_A2D_TRACE_LEVEL_ERROR is not set
+CONFIG_A2D_TRACE_LEVEL_WARNING=y
+# CONFIG_A2D_TRACE_LEVEL_API is not set
+# CONFIG_A2D_TRACE_LEVEL_EVENT is not set
+# CONFIG_A2D_TRACE_LEVEL_DEBUG is not set
+# CONFIG_A2D_TRACE_LEVEL_VERBOSE is not set
+CONFIG_A2D_INITIAL_TRACE_LEVEL=2
+# CONFIG_AVDT_TRACE_LEVEL_NONE is not set
+# CONFIG_AVDT_TRACE_LEVEL_ERROR is not set
+CONFIG_AVDT_TRACE_LEVEL_WARNING=y
+# CONFIG_AVDT_TRACE_LEVEL_API is not set
+# CONFIG_AVDT_TRACE_LEVEL_EVENT is not set
+# CONFIG_AVDT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_AVDT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_AVDT_INITIAL_TRACE_LEVEL=2
+# CONFIG_AVCT_TRACE_LEVEL_NONE is not set
+# CONFIG_AVCT_TRACE_LEVEL_ERROR is not set
+CONFIG_AVCT_TRACE_LEVEL_WARNING=y
+# CONFIG_AVCT_TRACE_LEVEL_API is not set
+# CONFIG_AVCT_TRACE_LEVEL_EVENT is not set
+# CONFIG_AVCT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_AVCT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_AVCT_INITIAL_TRACE_LEVEL=2
+# CONFIG_AVRC_TRACE_LEVEL_NONE is not set
+# CONFIG_AVRC_TRACE_LEVEL_ERROR is not set
+CONFIG_AVRC_TRACE_LEVEL_WARNING=y
+# CONFIG_AVRC_TRACE_LEVEL_API is not set
+# CONFIG_AVRC_TRACE_LEVEL_EVENT is not set
+# CONFIG_AVRC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_AVRC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_AVRC_INITIAL_TRACE_LEVEL=2
+# CONFIG_MCA_TRACE_LEVEL_NONE is not set
+# CONFIG_MCA_TRACE_LEVEL_ERROR is not set
+CONFIG_MCA_TRACE_LEVEL_WARNING=y
+# CONFIG_MCA_TRACE_LEVEL_API is not set
+# CONFIG_MCA_TRACE_LEVEL_EVENT is not set
+# CONFIG_MCA_TRACE_LEVEL_DEBUG is not set
+# CONFIG_MCA_TRACE_LEVEL_VERBOSE is not set
+CONFIG_MCA_INITIAL_TRACE_LEVEL=2
+# CONFIG_HID_TRACE_LEVEL_NONE is not set
+# CONFIG_HID_TRACE_LEVEL_ERROR is not set
+CONFIG_HID_TRACE_LEVEL_WARNING=y
+# CONFIG_HID_TRACE_LEVEL_API is not set
+# CONFIG_HID_TRACE_LEVEL_EVENT is not set
+# CONFIG_HID_TRACE_LEVEL_DEBUG is not set
+# CONFIG_HID_TRACE_LEVEL_VERBOSE is not set
+CONFIG_HID_INITIAL_TRACE_LEVEL=2
+# CONFIG_APPL_TRACE_LEVEL_NONE is not set
+# CONFIG_APPL_TRACE_LEVEL_ERROR is not set
+CONFIG_APPL_TRACE_LEVEL_WARNING=y
+# CONFIG_APPL_TRACE_LEVEL_API is not set
+# CONFIG_APPL_TRACE_LEVEL_EVENT is not set
+# CONFIG_APPL_TRACE_LEVEL_DEBUG is not set
+# CONFIG_APPL_TRACE_LEVEL_VERBOSE is not set
+CONFIG_APPL_INITIAL_TRACE_LEVEL=2
+# CONFIG_GATT_TRACE_LEVEL_NONE is not set
+# CONFIG_GATT_TRACE_LEVEL_ERROR is not set
+CONFIG_GATT_TRACE_LEVEL_WARNING=y
+# CONFIG_GATT_TRACE_LEVEL_API is not set
+# CONFIG_GATT_TRACE_LEVEL_EVENT is not set
+# CONFIG_GATT_TRACE_LEVEL_DEBUG is not set
+# CONFIG_GATT_TRACE_LEVEL_VERBOSE is not set
+CONFIG_GATT_INITIAL_TRACE_LEVEL=2
+# CONFIG_SMP_TRACE_LEVEL_NONE is not set
+# CONFIG_SMP_TRACE_LEVEL_ERROR is not set
+CONFIG_SMP_TRACE_LEVEL_WARNING=y
+# CONFIG_SMP_TRACE_LEVEL_API is not set
+# CONFIG_SMP_TRACE_LEVEL_EVENT is not set
+# CONFIG_SMP_TRACE_LEVEL_DEBUG is not set
+# CONFIG_SMP_TRACE_LEVEL_VERBOSE is not set
+CONFIG_SMP_INITIAL_TRACE_LEVEL=2
+# CONFIG_BTIF_TRACE_LEVEL_NONE is not set
+# CONFIG_BTIF_TRACE_LEVEL_ERROR is not set
+CONFIG_BTIF_TRACE_LEVEL_WARNING=y
+# CONFIG_BTIF_TRACE_LEVEL_API is not set
+# CONFIG_BTIF_TRACE_LEVEL_EVENT is not set
+# CONFIG_BTIF_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BTIF_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTIF_INITIAL_TRACE_LEVEL=2
+# CONFIG_BTC_TRACE_LEVEL_NONE is not set
+# CONFIG_BTC_TRACE_LEVEL_ERROR is not set
+CONFIG_BTC_TRACE_LEVEL_WARNING=y
+# CONFIG_BTC_TRACE_LEVEL_API is not set
+# CONFIG_BTC_TRACE_LEVEL_EVENT is not set
+# CONFIG_BTC_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BTC_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BTC_INITIAL_TRACE_LEVEL=2
+# CONFIG_OSI_TRACE_LEVEL_NONE is not set
+# CONFIG_OSI_TRACE_LEVEL_ERROR is not set
+CONFIG_OSI_TRACE_LEVEL_WARNING=y
+# CONFIG_OSI_TRACE_LEVEL_API is not set
+# CONFIG_OSI_TRACE_LEVEL_EVENT is not set
+# CONFIG_OSI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_OSI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_OSI_INITIAL_TRACE_LEVEL=2
+# CONFIG_BLUFI_TRACE_LEVEL_NONE is not set
+# CONFIG_BLUFI_TRACE_LEVEL_ERROR is not set
+CONFIG_BLUFI_TRACE_LEVEL_WARNING=y
+# CONFIG_BLUFI_TRACE_LEVEL_API is not set
+# CONFIG_BLUFI_TRACE_LEVEL_EVENT is not set
+# CONFIG_BLUFI_TRACE_LEVEL_DEBUG is not set
+# CONFIG_BLUFI_TRACE_LEVEL_VERBOSE is not set
+CONFIG_BLUFI_INITIAL_TRACE_LEVEL=2
+# CONFIG_BLE_HOST_QUEUE_CONGESTION_CHECK is not set
+CONFIG_SMP_ENABLE=y
+# CONFIG_BLE_ACTIVE_SCAN_REPORT_ADV_SCAN_RSP_INDIVIDUALLY is not set
+CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT=30
+CONFIG_ADC2_DISABLE_DAC=y
+# CONFIG_SPIRAM_SUPPORT is not set
+CONFIG_TRACEMEM_RESERVE_DRAM=0x0
+# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set
+CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y
+CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4
+# CONFIG_ULP_COPROC_ENABLED is not set
+CONFIG_ULP_COPROC_RESERVE_MEM=0
+# CONFIG_BROWNOUT_DET is not set
+CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
+# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
+# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
+# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
+# CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
+# CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
+CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32
+CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304
+CONFIG_MAIN_TASK_STACK_SIZE=3584
+CONFIG_IPC_TASK_STACK_SIZE=1024
+CONFIG_CONSOLE_UART_DEFAULT=y
+# CONFIG_CONSOLE_UART_CUSTOM is not set
+# CONFIG_ESP_CONSOLE_UART_NONE is not set
+CONFIG_CONSOLE_UART=y
+CONFIG_CONSOLE_UART_NUM=0
+CONFIG_CONSOLE_UART_BAUDRATE=115200
+CONFIG_INT_WDT=y
+CONFIG_INT_WDT_TIMEOUT_MS=300
+CONFIG_INT_WDT_CHECK_CPU1=y
+CONFIG_TASK_WDT=y
+# CONFIG_TASK_WDT_PANIC is not set
+CONFIG_TASK_WDT_TIMEOUT_S=5
+CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
+CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y
+# CONFIG_EVENT_LOOP_PROFILING is not set
+CONFIG_POST_EVENTS_FROM_ISR=y
+CONFIG_POST_EVENTS_FROM_IRAM_ISR=y
+# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set
+CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y
+# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set
+# CONFIG_ESP32S2_PANIC_GDBSTUB is not set
+CONFIG_TIMER_TASK_STACK_SIZE=3584
+# CONFIG_SW_COEXIST_ENABLE is not set
+CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND=150
+CONFIG_MB_MASTER_DELAY_MS_CONVERT=200
+CONFIG_MB_QUEUE_LENGTH=20
+CONFIG_MB_SERIAL_TASK_STACK_SIZE=4096
+CONFIG_MB_SERIAL_BUF_SIZE=256
+CONFIG_MB_SERIAL_TASK_PRIO=10
+# CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT is not set
+CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20
+CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
+CONFIG_MB_CONTROLLER_STACK_SIZE=4096
+CONFIG_MB_EVENT_QUEUE_TIMEOUT=20
+CONFIG_MB_TIMER_PORT_ENABLED=y
+CONFIG_MB_TIMER_GROUP=0
+CONFIG_MB_TIMER_INDEX=0
+# CONFIG_SUPPORT_STATIC_ALLOCATION is not set
+CONFIG_TIMER_TASK_PRIORITY=1
+CONFIG_TIMER_TASK_STACK_DEPTH=2048
+CONFIG_TIMER_QUEUE_LENGTH=10
+# CONFIG_L2_TO_L3_COPY is not set
+# CONFIG_USE_ONLY_LWIP_SELECT is not set
+CONFIG_ESP_GRATUITOUS_ARP=y
+CONFIG_GARP_TMR_INTERVAL=60
+CONFIG_TCPIP_RECVMBOX_SIZE=32
+CONFIG_TCP_MAXRTX=12
+CONFIG_TCP_SYNMAXRTX=6
+CONFIG_TCP_MSS=1440
+CONFIG_TCP_MSL=60000
+CONFIG_TCP_SND_BUF_DEFAULT=5744
+CONFIG_TCP_WND_DEFAULT=5744
+CONFIG_TCP_RECVMBOX_SIZE=6
+CONFIG_TCP_QUEUE_OOSEQ=y
+# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
+CONFIG_TCP_OVERSIZE_MSS=y
+# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set
+# CONFIG_TCP_OVERSIZE_DISABLE is not set
+CONFIG_UDP_RECVMBOX_SIZE=6
+CONFIG_TCPIP_TASK_STACK_SIZE=3072
+CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
+# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set
+# CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set
+CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF
+# CONFIG_PPP_SUPPORT is not set
+CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5
+CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
+CONFIG_ESP32_PTHREAD_STACK_MIN=768
+CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y
+# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set
+# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set
+CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1
+CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread"
+CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
+# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set
+# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set
+CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y
+CONFIG_SUPPORT_TERMIOS=y
+CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1
+CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
+# End of deprecated options