quack/EDA/lib/SOP65P640X120-24N.kicad_mod

58 lines
3.7 KiB
Plaintext

(module "SOP65P640X120-24N" (layer F.Cu)
(descr "24-Pin TSSOP _")
(tags "Integrated Circuit")
(attr smd)
(fp_text reference IC** (at 0 0) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value "SOP65P640X120-24N" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -3.925 -4.2) (end 3.925 -4.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.925 -4.2) (end 3.925 4.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.925 4.2) (end -3.925 4.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.925 4.2) (end -3.925 -4.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.2 -3.9) (end 2.2 -3.9) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 -3.9) (end 2.2 3.9) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 3.9) (end -2.2 3.9) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 3.9) (end -2.2 -3.9) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 -3.25) (end -1.55 -3.9) (layer F.Fab) (width 0.1))
(fp_line (start -1.85 -3.9) (end 1.85 -3.9) (layer F.SilkS) (width 0.2))
(fp_line (start 1.85 -3.9) (end 1.85 3.9) (layer F.SilkS) (width 0.2))
(fp_line (start 1.85 3.9) (end -1.85 3.9) (layer F.SilkS) (width 0.2))
(fp_line (start -1.85 3.9) (end -1.85 -3.9) (layer F.SilkS) (width 0.2))
(fp_line (start -3.675 -4.15) (end -2.2 -4.15) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -2.938 -3.575 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -2.938 -2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -2.938 -2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -2.938 -1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.938 -0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -2.938 -0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -2.938 0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -2.938 0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -2.938 1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -2.938 2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -2.938 2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -2.938 3.575 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 2.938 3.575 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 2.938 2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 2.938 2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 2.938 1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 2.938 0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 2.938 0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 2.938 -0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 2.938 -0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at 2.938 -1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at 2.938 -2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at 2.938 -2.925 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at 2.938 -3.575 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(model SN74LVC4245APWR.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)