diff --git a/pcb/TashTwenty Tiny/Panels/Back/TTT_BP.pro b/pcb/TashTwenty Tiny/Panels/Back/TTT_BP.pro new file mode 100644 index 0000000..079ee81 --- /dev/null +++ b/pcb/TashTwenty Tiny/Panels/Back/TTT_BP.pro @@ -0,0 +1,238 @@ +update=2022 March 31, Thursday 19:42:15 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead= +CopperLayerCount=2 +BoardThickness=1.6 +AllowMicroVias=0 +AllowBlindVias=0 +RequireCourtyardDefinitions=0 +ProhibitOverlappingCourtyards=1 +MinTrackWidth=0.2 +MinViaDiameter=0.4 +MinViaDrill=0.3 +MinMicroViaDiameter=0.2 +MinMicroViaDrill=0.09999999999999999 +MinHoleToHole=0.25 +TrackWidth1=0.25 +ViaDiameter1=0.8 +ViaDrill1=0.4 +dPairWidth1=0.2 +dPairGap1=0.25 +dPairViaGap1=0.25 +SilkLineWidth=0.12 +SilkTextSizeV=1 +SilkTextSizeH=1 +SilkTextSizeThickness=0.15 +SilkTextItalic=0 +SilkTextUpright=1 +CopperLineWidth=0.2 +CopperTextSizeV=1.5 +CopperTextSizeH=1.5 +CopperTextThickness=0.3 +CopperTextItalic=0 +CopperTextUpright=1 +EdgeCutLineWidth=0.05 +CourtyardLineWidth=0.05 +OthersLineWidth=0.15 +OthersTextSizeV=1 +OthersTextSizeH=1 +OthersTextSizeThickness=0.15 +OthersTextItalic=0 +OthersTextUpright=1 +SolderMaskClearance=0 +SolderMaskMinWidth=0 +SolderPasteClearance=0 +SolderPasteRatio=-0 +[pcbnew/Layer.F.Cu] +Name=F.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.In1.Cu] +Name=In1.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In2.Cu] +Name=In2.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In3.Cu] +Name=In3.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In4.Cu] +Name=In4.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In5.Cu] +Name=In5.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In6.Cu] +Name=In6.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In7.Cu] +Name=In7.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In8.Cu] +Name=In8.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In9.Cu] +Name=In9.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In10.Cu] +Name=In10.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In11.Cu] +Name=In11.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In12.Cu] +Name=In12.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In13.Cu] +Name=In13.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In14.Cu] +Name=In14.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In15.Cu] +Name=In15.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In16.Cu] +Name=In16.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In17.Cu] +Name=In17.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In18.Cu] +Name=In18.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In19.Cu] +Name=In19.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In20.Cu] +Name=In20.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In21.Cu] +Name=In21.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In22.Cu] +Name=In22.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In23.Cu] +Name=In23.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In24.Cu] +Name=In24.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In25.Cu] +Name=In25.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In26.Cu] +Name=In26.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In27.Cu] +Name=In27.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In28.Cu] +Name=In28.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In29.Cu] +Name=In29.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In30.Cu] +Name=In30.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.B.Cu] +Name=B.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.B.Adhes] +Enabled=0 +[pcbnew/Layer.F.Adhes] +Enabled=0 +[pcbnew/Layer.B.Paste] +Enabled=0 +[pcbnew/Layer.F.Paste] +Enabled=0 +[pcbnew/Layer.B.SilkS] +Enabled=1 +[pcbnew/Layer.F.SilkS] +Enabled=1 +[pcbnew/Layer.B.Mask] +Enabled=1 +[pcbnew/Layer.F.Mask] +Enabled=1 +[pcbnew/Layer.Dwgs.User] +Enabled=1 +[pcbnew/Layer.Cmts.User] +Enabled=1 +[pcbnew/Layer.Eco1.User] +Enabled=0 +[pcbnew/Layer.Eco2.User] +Enabled=0 +[pcbnew/Layer.Edge.Cuts] +Enabled=1 +[pcbnew/Layer.Margin] +Enabled=1 +[pcbnew/Layer.B.CrtYd] +Enabled=1 +[pcbnew/Layer.F.CrtYd] +Enabled=1 +[pcbnew/Layer.B.Fab] +Enabled=1 +[pcbnew/Layer.F.Fab] +Enabled=1 +[pcbnew/Layer.Rescue] +Enabled=0 +[pcbnew/Netclasses] +[pcbnew/Netclasses/Default] +Name=Default +Clearance=0.2 +TrackWidth=0.25 +ViaDiameter=0.8 +ViaDrill=0.4 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2 +dPairGap=0.25 +dPairViaGap=0.25 diff --git a/pcb/TashTwenty Tiny/Panels/Back/TTT_BP.sch b/pcb/TashTwenty Tiny/Panels/Back/TTT_BP.sch new file mode 100644 index 0000000..622f409 --- /dev/null +++ b/pcb/TashTwenty Tiny/Panels/Back/TTT_BP.sch @@ -0,0 +1,72 @@ +EESchema Schematic File Version 4 +EELAYER 30 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "2022-05-17" +Rev "1.0" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L Connector:TestPoint TP1 +U 1 1 6246096F +P 6000 5000 +F 0 "TP1" H 6058 5118 50 0000 L CNN +F 1 "TestPoint" H 6058 5027 50 0000 L CNN +F 2 "TestPoint:TestPoint_Pad_1.5x1.5mm" H 6200 5000 50 0001 C CNN +F 3 "~" H 6200 5000 50 0001 C CNN + 1 6000 5000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6000 5000 6000 5250 +$Comp +L power:PWR_FLAG #FLG0101 +U 1 1 6245F89A +P 5500 5000 +F 0 "#FLG0101" H 5500 5075 50 0001 C CNN +F 1 "PWR_FLAG" H 5500 5173 50 0000 C CNN +F 2 "" H 5500 5000 50 0001 C CNN +F 3 "~" H 5500 5000 50 0001 C CNN + 1 5500 5000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5500 5000 5500 5250 +Wire Wire Line + 5500 5250 6000 5250 +Connection ~ 6000 5250 +Wire Wire Line + 6000 5250 6000 5500 +$Comp +L Connector:TestPoint TP2 +U 1 1 6245FB73 +P 6000 4500 +F 0 "TP2" H 6058 4618 50 0000 L CNN +F 1 "TestPoint" H 6058 4527 50 0000 L CNN +F 2 "TestPoint:TestPoint_Pad_1.5x1.5mm" H 6200 4500 50 0001 C CNN +F 3 "~" H 6200 4500 50 0001 C CNN + 1 6000 4500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6000 4500 6000 5000 +Connection ~ 6000 5000 +$Comp +L power:Earth #PWR0101 +U 1 1 62460A5C +P 6000 5500 +F 0 "#PWR0101" H 6000 5250 50 0001 C CNN +F 1 "Earth" H 6000 5350 50 0001 C CNN +F 2 "" H 6000 5500 50 0001 C CNN +F 3 "~" H 6000 5500 50 0001 C CNN + 1 6000 5500 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/pcb/TashTwenty Tiny/Panels/Back/logo.kicad_mod b/pcb/TashTwenty Tiny/Panels/Back/logo.kicad_mod new file mode 100644 index 0000000..c392778 --- /dev/null +++ b/pcb/TashTwenty Tiny/Panels/Back/logo.kicad_mod @@ -0,0 +1,34 @@ +(module LOGO (layer F.Cu) + (at 0 0) + (fp_text reference "G***" (at 0 0) (layer F.SilkS) hide + (effects (font (thickness 0.3))) + ) + (fp_text value "LOGO" (at 0.75 0) (layer F.SilkS) hide + (effects (font (thickness 0.3))) + ) + (fp_poly (pts (xy 5.270500 1.079500) (xy 5.270500 3.619500) (xy 4.953000 3.619500) (xy 4.953000 3.937000) (xy -4.572000 3.937000) (xy -4.572000 3.619500) (xy -4.889500 3.619500) (xy -4.889500 1.079500) + (xy -4.572000 1.079500) (xy -4.572000 3.619500) (xy 4.953000 3.619500) (xy 4.953000 1.079500) (xy 4.000500 1.079500) (xy 4.000500 1.397000) (xy 3.683000 1.397000) (xy 3.683000 1.714500) + (xy 3.365500 1.714500) (xy 3.365500 2.032000) (xy 2.730500 2.032000) (xy 2.730500 2.349500) (xy 0.190500 2.349500) (xy 0.190500 2.032000) (xy -0.444500 2.032000) (xy -0.444500 1.714500) + (xy -0.762000 1.714500) (xy -0.762000 1.079500) (xy -4.572000 1.079500) (xy -4.572000 0.762000) (xy -1.079500 0.762000) (xy -1.079500 -0.825500) (xy -1.397000 -0.825500) (xy -1.397000 -1.143000) + (xy -1.714500 -1.143000) (xy -1.714500 -1.778000) (xy -1.397000 -1.778000) (xy -1.397000 -1.460500) (xy -1.079500 -1.460500) (xy -1.079500 -1.778000) (xy -1.397000 -1.778000) (xy -1.714500 -1.778000) + (xy -1.714500 -2.095500) (xy -1.397000 -2.095500) (xy -1.079500 -2.095500) (xy -1.079500 -1.778000) (xy -0.444500 -1.778000) (xy -0.444500 -2.095500) (xy 0.190500 -2.095500) (xy 0.190500 -1.778000) + (xy -0.127000 -1.778000) (xy -0.127000 -1.460500) (xy -0.444500 -1.460500) (xy -0.444500 -0.825500) (xy -0.762000 -0.825500) (xy -0.762000 0.444500) (xy -0.444500 0.444500) (xy -0.444500 1.079500) + (xy -0.127000 1.079500) (xy -0.127000 1.397000) (xy 0.508000 1.397000) (xy 0.508000 1.714500) (xy 2.095500 1.714500) (xy 2.095500 1.397000) (xy 2.730500 1.397000) (xy 2.730500 1.079500) + (xy 3.048000 1.079500) (xy 3.048000 0.762000) (xy 2.413000 0.762000) (xy 2.413000 1.079500) (xy 2.095500 1.079500) (xy 2.095500 0.444500) (xy 3.048000 0.444500) (xy 3.048000 0.762000) + (xy 3.365500 0.762000) (xy 3.365500 0.444500) (xy 3.048000 0.444500) (xy 2.095500 0.444500) (xy 2.095500 -1.778000) (xy 2.730500 -1.778000) (xy 2.730500 -2.095500) (xy 3.048000 -2.095500) + (xy 3.048000 -2.413000) (xy 1.778000 -2.413000) (xy 1.778000 -2.730500) (xy -0.127000 -2.730500) (xy -0.127000 -2.413000) (xy -0.762000 -2.413000) (xy -0.762000 -2.095500) (xy -1.079500 -2.095500) + (xy -1.397000 -2.095500) (xy -1.397000 -2.413000) (xy -1.079500 -2.413000) (xy -1.079500 -2.730500) (xy -0.444500 -2.730500) (xy -0.444500 -3.048000) (xy 2.413000 -3.048000) (xy 2.413000 -2.730500) + (xy 2.730500 -2.730500) (xy 3.048000 -2.730500) (xy 3.048000 -2.413000) (xy 3.365500 -2.413000) (xy 3.365500 -2.730500) (xy 3.048000 -2.730500) (xy 2.730500 -2.730500) (xy 2.730500 -3.048000) + (xy 3.683000 -3.048000) (xy 3.683000 -2.730500) (xy 4.000500 -2.730500) (xy 4.000500 -1.778000) (xy 3.683000 -1.778000) (xy 3.683000 -1.460500) (xy 3.365500 -1.460500) (xy 3.365500 -1.143000) + (xy 2.730500 -1.143000) (xy 2.730500 0.127000) (xy 3.683000 0.127000) (xy 3.683000 0.444500) (xy 4.000500 0.444500) (xy 4.000500 0.762000) (xy 4.953000 0.762000) (xy 4.953000 1.079500) + (xy 5.270500 1.079500) )(layer F.SilkS) (width 0.010000) + ) + (fp_poly (pts (xy -2.984500 2.984500) (xy -3.619500 2.984500) (xy -3.619500 2.667000) (xy -2.984500 2.667000) (xy -2.984500 2.984500) )(layer F.SilkS) (width 0.010000) + ) + (fp_poly (pts (xy 1.778000 1.079500) (xy 0.825500 1.079500) (xy 0.825500 0.762000) (xy 0.508000 0.762000) (xy 0.508000 0.444500) (xy 0.825500 0.444500) (xy 0.825500 0.127000) (xy 1.143000 0.127000) + (xy 1.143000 -1.778000) (xy 1.778000 -1.778000) (xy 1.778000 1.079500) )(layer F.SilkS) (width 0.010000) + ) + (fp_poly (pts (xy 0.825500 -1.460500) (xy 0.508000 -1.460500) (xy 0.508000 0.444500) (xy 0.190500 0.444500) (xy 0.190500 -0.190500) (xy -0.127000 -0.190500) (xy -0.127000 -1.143000) (xy 0.190500 -1.143000) + (xy 0.190500 -1.778000) (xy 0.508000 -1.778000) (xy 0.508000 -2.095500) (xy 0.825500 -2.095500) (xy 0.825500 -1.460500) )(layer F.SilkS) (width 0.010000) + ) +) diff --git a/pcb/TashTwenty Tiny/Panels/Back/logo.png b/pcb/TashTwenty Tiny/Panels/Back/logo.png new file mode 100644 index 0000000..d78cd8f Binary files /dev/null and b/pcb/TashTwenty Tiny/Panels/Back/logo.png differ