tashtwenty/pcb/TashTwenty Tiny/DB19_IDC20/DB19_IDC20.kicad_pcb

694 lines
48 KiB
Plaintext

(kicad_pcb (version 20171130) (host pcbnew "(5.1.12-1-10_14)")
(general
(thickness 1.6)
(drawings 15)
(tracks 44)
(zones 0)
(modules 2)
(nets 13)
)
(page A4)
(title_block
(title "TashTwenty Tiny Adapter")
(date 2021-11-28)
(rev 1.0)
(company Lostwave)
(comment 1 https://68kmla.org)
(comment 2 https://68kmla.org/bb/index.php?threads/tashtwenty-single-chip-dcd-hard-disk-20-interface.39357/)
(comment 3 https://github.com/lampmerchant/tashtwenty)
)
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(31 B.Cu signal)
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(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
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(zone_45_only no)
(trace_min 0.2)
(via_size 1.6)
(via_drill 0.8)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
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(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
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(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
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(usegerberextensions false)
(usegerberattributes true)
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(creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 +12V)
(net 2 GND)
(net 3 /WR)
(net 4 /RD)
(net 5 /~ENABLE)
(net 6 /SEL)
(net 7 /~WREQ)
(net 8 /PH3)
(net 9 /PH2)
(net 10 /PH1)
(net 11 /PH0)
(net 12 +5V)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 1.6)
(via_drill 0.8)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net /PH0)
(add_net /PH1)
(add_net /PH2)
(add_net /PH3)
(add_net /RD)
(add_net /SEL)
(add_net /WR)
(add_net /~ENABLE)
(add_net /~WREQ)
)
(net_class POWER ""
(clearance 0.2)
(trace_width 1)
(via_dia 1.6)
(via_drill 0.8)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +12V)
(add_net +5V)
(add_net GND)
)
(module Connector_Apple:DSUB-19_Male_EdgeMount_P2.77mm (layer F.Cu) (tedit 61A01D8A) (tstamp 61A0D243)
(at 120 120)
(descr "25-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf")
(tags "25-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 47.1mm")
(path /61A3D54F)
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(net 2 GND))
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(model ${KISYS3DMOD}/Connector_Dsub.3dshapes/DSUB-25_Male_EdgeMount_P2.77mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_IDC:IDC-Header_2x10_P2.54mm_Vertical (layer F.Cu) (tedit 5EAC9A07) (tstamp 61A0722C)
(at 108.92 107.54 90)
(descr "Through hole IDC box header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0")
(tags "Through hole vertical IDC box header THT 2x10 2.54mm double row")
(path /61A0248C)
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