EMILE/second/enter_kernelPPC.S

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ArmAsm
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/*
*
* (c) 2005 Laurent Vivier <LaurentVivier@wanadoo.fr>
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* from BootX, (c) Benjamin Herrenschmidt
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*
*/
.chip 68020
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.equ PC, 0x00FC
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.equ GPR, 0x0100
.equ FPR, 0x0200
#define pc %sp@(PC)
#define gpr(a) %sp@(GPR + 8 * a + 4)
#define fpr0(a) %sp@(FPR + 8 * a)
#define fpr1(a) %sp@(FPR + 8 * a + 4)
.macro copy_GPR from=0, to=31
move.l %a1@+, gpr(\from)
.if \to-\from
copy_GPR "(\from+1)",\to
.endif
.endm
.macro copy_FPR from=0, to=31
move.l %a1@+, fpr0(\from)
move.l %a1@+, fpr1(\from)
.if \to-\from
copy_FPR "(\from+1)",\to
.endif
.endm
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.align 4
.global enter_kernelPPC
enter_kernelPPC:
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link.w %fp,#0
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/* get physical start address of kernel */
move.l 8(%fp), %a0
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/* disable interrupts */
ori.w #0x0700, %sr
/* get PPC registers values */
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move.l 12(%fp), %a1
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/* prepare stack */
move.l %sp, %d0
andi.l #0xFFFFFC00, %d0
move.l %d0, %sp
move.l #0x00BF, %d0
loop:
clr.l -(%sp)
dbra %d0, loop
/* Initialize PPC registers */
/* set up program counter */
/* PC */
move.l %a1@+, pc
/* GPR */
copy_GPR
/* FPR */
copy_FPR
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/* Switch to PPC */
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move.l #0x47617279, %a0 /* 'Gary' */
move.l #0x05051956, %a1
move.l #0x0000C000, %d0
moveq #0, %d2
reset
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move.l %sp,-(%sp)
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wait:
dc.w 0xFE03
beq wait
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unlk %fp
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rts