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Add Transparent Translation management, read_physical()
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17077b6210
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@ -28,10 +28,13 @@
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#define GET_TD_4K_ADDR(TD) (TD & 0xFFFFFF00)
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#define GET_TD_8K_ADDR(TD) (TD & 0xFFFFFF80)
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#define TRACE_MMU
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#define GET_TT_ENABLE(TT) (TT & 0x8000)
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#define GET_TT_BASE(TT) ( (TT >> 24) & 0xFF )
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#define GET_TT_MASK(TT) ( (TT >> 16) & 0xFF )
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#ifdef TRACE_MMU
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#define TRACE(format, args...) if (MMU_trace) printf(format, ##args)
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static int MMU_trace = 1;
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static int MMU_trace = 0;
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void MMU040_set_trace(int enable)
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{
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MMU_trace = enable;
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@ -40,14 +43,59 @@ void MMU040_set_trace(int enable)
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#define TRACE(format, args...)
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#endif
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static int isTTSegment(unsigned long addr)
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{
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unsigned long DTT0;
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unsigned long DTT1;
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unsigned long base;
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unsigned long mask;
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unsigned long size;
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addr >>= 24;
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MMU040_get_DTT0(&DTT0);
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if (GET_TT_ENABLE(DTT0))
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{
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mask = GET_TT_MASK(DTT0);
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base = GET_TT_BASE(DTT0);
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base &= ~mask;
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addr &= ~mask;
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size = (mask << 24) || 0x00FFFFFF;
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if ( (base <= addr) && (addr <= base + size) )
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return 1;
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}
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MMU040_get_DTT1(&DTT1);
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if (GET_TT_ENABLE(DTT1))
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{
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mask = GET_TT_MASK(DTT1);
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base = GET_TT_BASE(DTT1);
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base &= ~mask;
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addr &= ~mask;
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size = (mask << 24) || 0x00FFFFFF;
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if ( (base <= addr) && (addr <= base + size) )
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return 1;
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}
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/* if come here : no Transparent Translation */
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return 0;
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}
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int MMU040_logical2physicalAttr(unsigned long logicalAddr, unsigned long *physicalAddr, unsigned long *attr)
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{
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int rootIndex;
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int ptrIndex;
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int pageIndex;
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unsigned long TC;
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unsigned long *rootTable, *ptrTable, *pageTable, *pageAddr;
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unsigned long pAttr;
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unsigned long rootTable, ptrTable, pageTable;
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unsigned long rootEntry, tableEntry, pageEntry;
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TRACE("logical: %08lx ", logicalAddr);
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@ -56,6 +104,12 @@ int MMU040_logical2physicalAttr(unsigned long logicalAddr, unsigned long *physic
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TRACE("TC: %08lx\n", TC);
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if ( !GET_TC_ENABLE(TC) || isTTSegment(logicalAddr) )
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{
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*physicalAddr = logicalAddr;
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return 0;
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}
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rootIndex = (logicalAddr & 0xFE000000) >> 25;
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ptrIndex = (logicalAddr & 0x01FC0000) >> 18;
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pageIndex = IS_8K_PAGE(TC) ? (logicalAddr & 0x0003E000) >> 13 :
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@ -64,38 +118,37 @@ int MMU040_logical2physicalAttr(unsigned long logicalAddr, unsigned long *physic
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TRACE("root idx: %d ptr idx: %d page idx: %d\n", rootIndex, ptrIndex,
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pageIndex);
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MMU040_get_SRP((unsigned long*)&rootTable);
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TRACE("SRP: %p\n", rootTable);
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MMU040_get_SRP(&rootTable);
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TRACE("SRP: %ld\n", rootTable);
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rootEntry = MMU040_read_phys(rootTable + 4 * rootIndex);
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TRACE("Root Entry: %08lx\n", rootEntry);
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rootEntry = rootTable[rootIndex];
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if (UDT_IS_INVALID(rootEntry))
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{
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return -1;
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}
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TRACE("Root Entry: %08lx\n", rootEntry);
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ptrTable = (unsigned long*)GET_RP_ADDR(rootEntry);
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tableEntry = ptrTable[ptrIndex];
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ptrTable = GET_RP_ADDR(rootEntry);
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tableEntry = MMU040_read_phys(ptrTable + 4 * ptrIndex);
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TRACE("table Entry: %08lx\n", tableEntry);
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if (UDT_IS_INVALID(tableEntry))
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{
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return -1;
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}
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TRACE("table Entry: %08lx\n", tableEntry);
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pageTable = (unsigned long*) ( IS_8K_PAGE(TC) ?
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GET_TD_8K_ADDR(tableEntry) :
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pageTable = ( IS_8K_PAGE(TC) ? GET_TD_8K_ADDR(tableEntry) :
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GET_TD_4K_ADDR(tableEntry) );
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pageEntry = pageTable[pageIndex];
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pageEntry = MMU040_read_phys(pageTable + 4 * pageIndex);
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if (IS_8K_PAGE(TC))
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pageAddr = (unsigned long *) (pageEntry & 0xFFFFE000);
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*physicalAddr = pageEntry & 0xFFFFE000;
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else
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pageAddr = (unsigned long *) (pageEntry & 0xFFFFF000);
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*physicalAddr = pageEntry & 0xFFFFF000;
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pAttr = pageEntry & 0x000004FF;
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*physicalAddr = (unsigned long)pageAddr;
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*attr = pAttr;
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*attr = pageEntry & 0x000004FF;
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TRACE("physical: %08lx\n", *physicalAddr);
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@ -115,5 +168,7 @@ unsigned long MMU040_get_page_size(void)
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MMU040_get_TC(&TC);
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TRACE("Page Size: %d\n", GET_TC_PAGE_SIZE(TC));
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return GET_TC_PAGE_SIZE(TC);
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}
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