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Add bootstrap and switch to PPC
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Laurent Vivier
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09991740ef
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243
second/bootstrapPPC.S
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243
second/bootstrapPPC.S
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/*
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* Fully copied from BootX, (c) Benjamin Herrenschmidt
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* modified for EMILE (c) 2007 Laurent Vivier <Laurent@lvivier.info>
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*
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* This is BootX boostrap. This code is called by BootX in supervisor mode
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* with whatever mappings have been set by MacOS.
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*
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* The unmangler will first move itself up in memory in case it's current location
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* overlaps the destination of the kernel. The boostrap copies itself
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* and jump to the new bootstrap code.
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*
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* Note that all "decisions" regarding this copy are taken by BootX, the stack
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* pointer (r1) is already set to the destination stack for the kernel
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* (the boostrap has no stack).
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*
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* Then, it will copy kernel pages to their destination from a map passed in
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* by BootX. This map is appended to the unmangler and a pointer to it is
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* passed in r9 (pointer to the destination location of the unmangler).
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* This map is actually a kind of "script" with a serie of copy operations
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* to perform (a list of src/dest/size entries).
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*
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* Registers on entry:
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*
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* r2 = 1 on entry by BootX
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* r3 = 0x426f6f58 ('BooX')
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* r4 = pointer to boot_infos (in kernel destination)
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* r5 = fb address (for BAT mapping) (unimplemented)
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* r6 = physical address of me
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* r7 = physical address where I must be copied.
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* r8 = size to copy (size of unmangler)
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* r9 = unmangle map (pointer to list of copy operations)
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* r10 = kernel entry in destination
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* r11 = setup BAT mapping for fb (unimplemented)
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*
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* The unmangle map is a list of tuples of 3 longs each: a source address,
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* a destination address, and a size. A size of zero indicates the end of
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* the list.
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*
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* Portions of this code from Gabriel Paubert's PReP bootloader, other
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* portions from the Linux kernel itself (arch/ppc/kernel/head.S)
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*
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*/
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.include "ppc_regs.i"
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#define DISABLE_COPY 0
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#ifndef BROKEN_THIRD_PARTY_CARDS
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#define BROKEN_THIRD_PARTY_CARDS 1
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#endif
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#ifdef BROKEN_THIRD_PARTY_CARDS
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.macro __sync
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li r0, 0
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cmpwi r0, 0
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bne+ 0f
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sync
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0:
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.endm
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#else
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.macro __sync
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sync
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.endm
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#endif
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first_bootstrap:
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/* Disable interrupts (clear MSR_EE). rlwinm is more "smart"
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but less readable (our constants are bit masks). */
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mfmsr r0
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ori r0,r0,MSR_EE|MSR_ME
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xori r0,r0,MSR_EE|MSR_ME
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mtmsr r0
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__sync
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/* Check if MMU was already turned off */
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cmplwi cr0,r2,0
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beq already_off
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/* turn the MMU off */
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mfmsr r0
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ori r0,r0,MSR_IR|MSR_DR /* |MSR_IP */
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li r2,0
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xori r0,r0,MSR_IR|MSR_DR /* |MSR_IP */
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mtsrr0 r6
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mtsrr1 r0
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__sync /* I heard that some 601 will like this one */
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rfi
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already_off:
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/* save some parameters */
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mr r31,r3
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mr r30,r4
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mr r29,r5
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/* flush TLBs, ivalidate BATs */
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bl flush_tlb
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bl inval_BATs
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bl reset_segs
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#if !DISABLE_COPY
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/* Need to copy myself ? */
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cmpw r6,r7
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beq skip_copy
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/* Copy ourselves */
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mr r3,r7
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mr r4,r6
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mr r5,r8
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li r6,0
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bl copy_and_flush
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mr r6, r7 /* update address of me */
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mr r3,r31 /* restore parameters */
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mr r4,r30
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mr r5,r29
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li r2,0 /* not necessary since no code here changes it, but... */
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mtlr r7 /* Jump to copy of me (*) */
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blr
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/* (*) note that we jump at the beginning of the copy. We could jump
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to skip_copy directly if CW knew how to calculate the offset
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directly in the inline assembler.
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*/
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#endif
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skip_copy:
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#if !DISABLE_COPY
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/* Call unmangle code */
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bl unmangle_kernel
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#endif
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/* Jump to kernel */
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mr r3,r31 /* restore parameters */
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mr r4,r30
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li r5,0 /* clear r5 */
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mtlr r10
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blr
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#if !DISABLE_COPY
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/* Unmangle kernel code. This routine will read the array prepared by
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* BootX and follow instructions in it for copying kernel pages until
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* the kernel is fully reconstitued
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*/
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unmangle_kernel:
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mflr r13
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unmangle_loop:
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lwz r4,0(r9)
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lwz r3,4(r9)
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lwz r5,8(r9)
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li r6,0
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addi r9,r9,12
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cmpwi r5,0
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beq unmangle_finish
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bl copy_and_flush
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b unmangle_loop
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unmangle_finish:
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mtlr r13
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blr
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/*
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* Copy routine used to copy a piece of code and flush and invalidate
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* the caches as needed.
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* r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
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* on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
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*/
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copy_and_flush:
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addi r5,r5,-4
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addi r6,r6,-4
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4:
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li r0,8
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mtctr r0
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3:
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addi r6,r6,4 /* copy a cache line */
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lwzx r0,r6,r4
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stwx r0,r6,r3
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bdnz 3
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dcbst r6,r3 /* write it to memory */
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__sync
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icbi r6,r3 /* flush the icache line */
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cmplw r6,r5
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blt 4
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isync
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addi r5,r5,4
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addi r6,r6,4
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blr
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#endif
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/* Routine for invalidating all BATs */
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inval_BATs:
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li r3,0
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mfspr r28,PVR
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rlwinm r28,r28,16,16,31 /* r28 = 1 for 601, 4 for 604 */
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cmpwi r28,1
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beq is_601_2
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mtspr DBAT0U,r3
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mtspr DBAT1U,r3
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mtspr DBAT2U,r3
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mtspr DBAT3U,r3
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is_601_2:
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mtspr IBAT0U,r3
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mtspr IBAT0L,r3
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mtspr IBAT1U,r3
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mtspr IBAT1L,r3
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mtspr IBAT2U,r3
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mtspr IBAT2L,r3
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mtspr IBAT3U,r3
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mtspr IBAT3L,r3
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blr
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/* Resets the segment registers to a known state */
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reset_segs:
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li r0,16 /* load up segment register values */
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mtctr r0 /* for context 0 */
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lis r3,0x2000 /* Ku = 1, VSID = 0 */
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li r4,0
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s_loop:
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mtsrin r3,r4
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addi r3,r3,1 /* increment VSID */
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addis r4,r4,0x1000 /* address of next segment */
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bdnz s_loop
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blr
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/* Due to the PPC architecture (and according to the specifications), a
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* series of tlbie which goes through a whole 256 MB segment always flushes
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* the whole TLB. This is obviously overkill and slow, but who cares ?
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* It takes about 1 ms on a 200 MHz 603e and works even if residual data
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* get the number of TLB entries wrong.
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*/
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flush_tlb:
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lis r28,0x1000
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flush_tlb_loop:
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addic. r28,r28,-0x1000
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tlbie r28
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blt flush_tlb_loop
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/* tlbsync is not implemented on 601, so use sync which seems to be a superset
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* of tlbsync in all cases and do not bother with CPU dependant code
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*/
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__sync
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blr
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