mirror of
https://github.com/vivier/EMILE.git
synced 2024-12-22 10:29:31 +00:00
Move 32bit switch to 32bitmode.i
This commit is contained in:
parent
f51aab30c9
commit
ebcb14eaa7
45
first/32bitmode.i
Normal file
45
first/32bitmode.i
Normal file
@ -0,0 +1,45 @@
|
|||||||
|
.macro switch32bitmode
|
||||||
|
|
||||||
|
/* is a 32bit aware ROM ? */
|
||||||
|
|
||||||
|
movea.l ROMBase,%a0
|
||||||
|
move.w 8(%a0), %d1 /* read ROM id */
|
||||||
|
|
||||||
|
cmp.w #0x0178, %d1 /* only 24bit ROM */
|
||||||
|
bls.S bit32_ok
|
||||||
|
|
||||||
|
/* is a 32bit aware processor ? */
|
||||||
|
|
||||||
|
cmp.w #1, CPUFlags /* Is 68000 or 68010 */
|
||||||
|
bls.S bit32_ok
|
||||||
|
|
||||||
|
/* test if we are in 32bit mode */
|
||||||
|
|
||||||
|
move.l #-1, %d0
|
||||||
|
StripAddress
|
||||||
|
cmp.l #-1, %d0
|
||||||
|
beq.S bit32_ok
|
||||||
|
|
||||||
|
/* Switch to 32bit mode */
|
||||||
|
|
||||||
|
lea PRAM_buffer(%pc), %a0 /* where to store data */
|
||||||
|
move.w #1, %d0 /* size of data */
|
||||||
|
swap %d0
|
||||||
|
move.w #0x08A, %d0 /* offset in PRAM */
|
||||||
|
ReadXPRam
|
||||||
|
|
||||||
|
lea PRAM_buffer(%pc), %a0
|
||||||
|
or.b #0x05, (%a0)
|
||||||
|
|
||||||
|
move.w #1, %d0 /* size of data */
|
||||||
|
swap %d0
|
||||||
|
move.w #0x08A, %d0 /* offset in PRAM */
|
||||||
|
WriteXPRam
|
||||||
|
|
||||||
|
/* jump to reset function in ROM */
|
||||||
|
|
||||||
|
movea.l ROMBase,%a0
|
||||||
|
jmp 0x90(%a0)
|
||||||
|
|
||||||
|
bit32_ok:
|
||||||
|
.endm
|
@ -10,6 +10,7 @@
|
|||||||
.equ first_level_size, 2 * sector_size
|
.equ first_level_size, 2 * sector_size
|
||||||
|
|
||||||
.include "macos.i"
|
.include "macos.i"
|
||||||
|
.include "32bitmode.i"
|
||||||
|
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
*
|
*
|
||||||
@ -63,48 +64,9 @@ start:
|
|||||||
SetApplBase
|
SetApplBase
|
||||||
movel SysZone,TheZone
|
movel SysZone,TheZone
|
||||||
|
|
||||||
/* is a 32bit aware ROM ? */
|
/* test if we are in 32bit mode, otherwise reboot in 32bit mode */
|
||||||
|
|
||||||
movea.l ROMBase,%a0
|
switch32bitmode
|
||||||
move.w 8(%a0), %d1 /* read ROM id */
|
|
||||||
|
|
||||||
cmp.w #0x0178, %d1 /* only 24bit ROM */
|
|
||||||
bls.S bit32_ok
|
|
||||||
|
|
||||||
/* is a 32bit aware processor ? */
|
|
||||||
|
|
||||||
cmp.w #1, CPUFlags /* Is 68000 or 68010 */
|
|
||||||
bls.S bit32_ok
|
|
||||||
|
|
||||||
/* test if we are in 32bit mode */
|
|
||||||
|
|
||||||
move.l #-1, %d0
|
|
||||||
StripAddress
|
|
||||||
cmp.l #-1, %d0
|
|
||||||
beq.S bit32_ok
|
|
||||||
|
|
||||||
/* Switch to 32bit mode */
|
|
||||||
|
|
||||||
lea PRAM_buffer(%pc), %a0 /* where to store data */
|
|
||||||
move.w #1, %d0 /* size of data */
|
|
||||||
swap %d0
|
|
||||||
move.w #0x08A, %d0 /* offset in PRAM */
|
|
||||||
ReadXPRam
|
|
||||||
|
|
||||||
lea PRAM_buffer(%pc), %a0
|
|
||||||
or.b #0x05, (%a0)
|
|
||||||
|
|
||||||
move.w #1, %d0 /* size of data */
|
|
||||||
swap %d0
|
|
||||||
move.w #0x08A, %d0 /* offset in PRAM */
|
|
||||||
WriteXPRam
|
|
||||||
|
|
||||||
/* jump to reset function in ROM */
|
|
||||||
|
|
||||||
movea.l ROMBase,%a0
|
|
||||||
jmp 0x90(%a0)
|
|
||||||
|
|
||||||
bit32_ok:
|
|
||||||
|
|
||||||
/* buffer size to store second stage booter */
|
/* buffer size to store second stage booter */
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user