mirror of https://github.com/vivier/EMILE.git
535 lines
12 KiB
C
535 lines
12 KiB
C
/*
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*
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* (c) 2004 Laurent Vivier <Laurent@Vivier.EU>
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*
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*/
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#include <stdio.h>
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#include <sys/types.h>
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#include "console.h"
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#include "MMU030.h"
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#define GET_TC_ENABLE(TC) (TC & 0x80000000)
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#define GET_TC_SRE(TC) (TC & 0x02000000)
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#define GET_TC_FCL(TC) (TC & 0x01000000)
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#define GET_TC_IS(TC) ((TC & 0x000F0000) >> 16)
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#define GET_TC_PAGE_SIZE(TC) (1 << ((TC & 0x00F00000) >> 20))
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#define GET_TC_TI(TC) (TC & 0xFFFF)
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#define GET_TC_TIA(TC) ((TC & 0xF000) >> 12)
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#define GET_TC_TIB(TC) ((TC & 0x0F00) >> 8)
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#define GET_TC_TIC(TC) ((TC & 0x00F0) >> 4)
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#define GET_TC_TID(TC) (TC & 0x000F)
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#define RP_LIMIT_MAX 0x7FFF
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#define GET_RP_LIMIT(CRP, max, min) if (CRP[0] & 0x80000000)\
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{\
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min = (CRP[0] >> 16) & 0x7FFF;\
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max = RP_LIMIT_MAX;\
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} else {\
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min = 0;\
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max = (CRP[0] >> 16) & 0x7FFF;\
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}
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#define GET_RP_DT(CRP) (CRP[0] & 0x3)
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#define GET_RP_ADDR(CRP) (CRP[1] & 0xFFFFFFF0)
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#define DT_INVALID 0
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#define DT_PAGE_DESCRIPTOR 1
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#define DT_VALID_4_BYTE 2
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#define DT_VALID_8_BYTE 3
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#define GET_TD_SF_DT(PD) (PD & 0x3)
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#define GET_TD_SF_WP(PD) ((PD >> 2) & 0x1)
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#define GET_TD_SF_U(PD) ((PD >> 3) & 0x1)
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#define GET_TD_SF_NEXT(PD) (PD & 0xFFFFFFF0)
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#define GET_TD_SF_ADDR(PD) (PD & 0xFFFFFF00)
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#define GET_TD_LF_LIMIT(PD0, PD1, max, min) if (PD0 & 0x80000000)\
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{\
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min = (PD0 >> 16) & 0x7FFF;\
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max = RP_LIMIT_MAX;\
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} else {\
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min = 0;\
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max = (PD0 >> 16) & 0x7FFF;\
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}
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#define GET_TD_LF_DT(PD0, PD1) (PD0 & 3)
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#define GET_TD_LF_WP(PD0, PD1) ((PD0 >> 2) & 1)
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#define GET_TD_LF_U(PD0, PD1) ((PD0 >> 3) & 0x1)
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#define GET_TD_LF_M(PD0, PD1) ((PD0 >> 4) & 0x1)
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#define GET_TD_LF_CI(PD0, PD1) ((PD0 >> 6) & 0x1)
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#define GET_TD_SF_S(PD0, PD1) ((PD0 >> 8) & 0x1)
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#define GET_TD_LF_NEXT(PD0, PD1) (PD1 & 0xFFFFFFF0)
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#define GET_TD_LF_ADDR(PD0, PD1) (PD1 & 0xFFFFFF00)
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#define GET_TT_ENABLE(TT) (TT & 0x8000)
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#define GET_TT_BASE(TT) ( (TT >> 24) & 0xFF )
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#define GET_TT_MASK(TT) ( (TT >> 16) & 0xFF )
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#ifdef TRACE_MMU
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#define TRACE(format, args...) if (MMU_trace) printf(format, ##args)
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static int MMU_trace = 0;
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void MMU030_set_trace(int enable)
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{
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MMU_trace = enable;
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}
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#else
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#define TRACE(format, args...)
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#endif
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static int isTTSegment(unsigned long addr)
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{
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unsigned long TT0;
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unsigned long TT1;
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unsigned long base;
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unsigned long mask;
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unsigned long size;
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addr >>= 24;
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MMU030_get_TT0(&TT0);
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if (GET_TT_ENABLE(TT0))
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{
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mask = GET_TT_MASK(TT0);
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base = GET_TT_BASE(TT0);
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base &= ~mask;
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addr &= ~mask;
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size = (mask << 24) || 0x00FFFFFF;
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if ( (base <= addr) && (addr <= base + size) )
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return 1;
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}
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MMU030_get_TT1(&TT1);
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if (GET_TT_ENABLE(TT1))
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{
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mask = GET_TT_MASK(TT1);
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base = GET_TT_BASE(TT1);
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base &= ~mask;
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addr &= ~mask;
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size = (mask << 24) || 0x00FFFFFF;
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if ( (base <= addr) && (addr <= base + size) )
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return 1;
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}
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/* if come here : no Transparent Translation */
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return 0;
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}
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static int decode_8_PD(unsigned long *pageBase, unsigned long *pageMask,
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unsigned long *attr,
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unsigned long logicalAddr, unsigned long TI,
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unsigned long PD0, unsigned long PD1);
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static int decode_4_PD(unsigned long *pageBase, unsigned long *pageMask,
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unsigned long *attr,
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unsigned long logicalAddr, unsigned long TI, unsigned long PD)
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{
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int dt;
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int TIA;
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unsigned long root;
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int index;
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TRACE("PD: %08lx ", PD);
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TIA = GET_TC_TIA(TI);
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dt = GET_TD_SF_DT(PD);
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switch(dt)
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{
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case DT_INVALID:
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TRACE("INVALID\n");
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return -1;
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case DT_PAGE_DESCRIPTOR:
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TRACE("PAGE DESCRIPTOR\n");
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*attr |= ((PD & 0xFF) >> 2);
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*pageBase = GET_TD_SF_ADDR(PD);
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return 0;
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case DT_VALID_4_BYTE:
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*attr |= ((PD & 0x0F) >> 2);
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index = logicalAddr >> (32 - TIA);
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*pageMask = (*pageMask) >> TIA;
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root = GET_TD_SF_NEXT(PD);
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TRACE("4-BYTE TIA: %d index: %d\n", TIA, index);
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return decode_4_PD( pageBase, pageMask, attr,
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logicalAddr << TIA, TI << 4,
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MMU030_read_phys(root + index * 4));
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case DT_VALID_8_BYTE:
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*attr |= ((PD & 0x0F) >> 2);
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index = logicalAddr >> (32 - TIA);
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*pageMask = (*pageMask) >> TIA;
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root = GET_TD_SF_NEXT(PD);
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TRACE("8-BYTE TIA: %d index: %d\n", TIA, index);
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return decode_8_PD( pageBase, pageMask, attr,
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logicalAddr << TIA, TI << 4,
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MMU030_read_phys(root + index * 8),
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MMU030_read_phys(root + index * 8 + 4));
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}
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return 0;
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}
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static int decode_8_PD(unsigned long *pageBase, unsigned long *pageMask,
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unsigned long *attr,
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unsigned long logicalAddr, unsigned long TI,
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unsigned long PD0, unsigned long PD1)
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{
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int dt;
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int TIA;
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unsigned long root;
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int index;
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unsigned long min, max;
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TRACE("PD: %08lx%08lx ", PD0, PD1);
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TIA = GET_TC_TIA(TI);
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dt = GET_TD_LF_DT(PD0, PD1);
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switch(dt)
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{
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case DT_INVALID:
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TRACE("INVALID\n");
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return -1;
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case DT_PAGE_DESCRIPTOR:
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TRACE("PAGE DESCRIPTOR\n");
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*attr |= ((PD0 & 0xFFFF) >> 2);
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*pageBase = GET_TD_LF_ADDR(PD0, PD1);
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return 0;
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case DT_VALID_4_BYTE:
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*attr |= ((PD0 & 0xFFFF) >> 2);
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index = logicalAddr >> (32 - TIA);
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*pageMask = (*pageMask) >> TIA;
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root = GET_TD_LF_NEXT(PD0, PD1);
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TRACE("4-BYTE TIA: %d index: %d\n", TIA, index);
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GET_TD_LF_LIMIT(PD0, PD1, max, min);
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if ( (index < min) || (index > max) )
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return -1;
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return decode_4_PD( pageBase, pageMask, attr,
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logicalAddr << TIA, TI << 4,
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MMU030_read_phys(root + index * 4));
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case DT_VALID_8_BYTE:
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*attr |= ((PD0 & 0xFFFF) >> 2);
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index = logicalAddr >> (32 - TIA);
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*pageMask = (*pageMask) >> TIA;
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root = GET_TD_LF_NEXT(PD0, PD1);
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TRACE("8-BYTE TIA: %d index: %d\n", TIA, index);
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GET_TD_LF_LIMIT(PD0, PD1, max, min);
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if ( (index < min) || (index > max) )
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return -1;
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return decode_8_PD( pageBase, pageMask, attr,
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logicalAddr << TIA, TI << 4,
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MMU030_read_phys(root + index * 8),
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MMU030_read_phys(root + index * 8 + 4));
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}
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return 0;
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}
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int MMU030_logical2physicalAttr(unsigned long logicalAddr, unsigned long *physicalAddr, unsigned long *attr)
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{
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unsigned long TC;
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unsigned long CRP[2];
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unsigned long pageBase;
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unsigned long pageMask = 0xFFFFFFFF;
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int TIA;
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int max, min;
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int dt;
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unsigned long root;
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int is;
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int index;
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int ret = -1;
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TRACE("logical: %08lx ", logicalAddr);
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*attr = 0;
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/* test if MMU is enabled */
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MMU030_get_TC(&TC);
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TRACE("TC: %08lx\n", TC);
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if (!GET_TC_ENABLE(TC) || isTTSegment(logicalAddr))
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{
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*physicalAddr = logicalAddr;
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return 0;
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}
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/* analyse CPU root pointer */
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MMU030_get_CRP(CRP);
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TRACE("CRP: %08lx%08lx ", CRP[0], CRP[1]);
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dt = GET_RP_DT(CRP);
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GET_RP_LIMIT(CRP, max, min);
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/* analyse translation control register */
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TIA = GET_TC_TIA(TC);
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is = GET_TC_IS(TC);
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index = (logicalAddr << is) >> (32 - TIA);
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pageMask = pageMask >> (is + TIA);
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if ( (index < min) || (index > max) )
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return -1;
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index = index - min;
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root = GET_RP_ADDR(CRP);
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switch(dt)
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{
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case DT_INVALID:
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case DT_PAGE_DESCRIPTOR:
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TRACE("INVALID");
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ret = -1;
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break;
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case DT_VALID_4_BYTE:
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TRACE("4-BYTE TIA: %d index: %d\n", TIA, index);
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ret = decode_4_PD( &pageBase, &pageMask, attr,
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logicalAddr << (is + TIA),
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GET_TC_TI(TC) << 4,
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MMU030_read_phys(root + index * 4));
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break;
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case DT_VALID_8_BYTE:
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TRACE("8-BYTE TIA: %d index: %d\n", TIA, index);
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ret = decode_8_PD( &pageBase, &pageMask, attr,
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logicalAddr << (is + TIA),
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GET_TC_TI(TC) << 4,
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MMU030_read_phys(root + index * 8),
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MMU030_read_phys(root + index * 8 + 4));
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break;
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}
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*physicalAddr = pageBase + (logicalAddr & pageMask);
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TRACE("Base: %08lx Mask: %08lx -> %08lx\n",
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pageBase, pageMask, *physicalAddr);
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return ret;
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}
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int MMU030_logical2physical(unsigned long logicalAddr, unsigned long *physicalAddr)
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{
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unsigned long attr;
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return MMU030_logical2physicalAttr(logicalAddr, physicalAddr, &attr);
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}
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unsigned long MMU030_get_page_size(void)
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{
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unsigned long TC;
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MMU030_get_TC(&TC);
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return GET_TC_PAGE_SIZE(TC);
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}
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#ifdef MMU_DUMP
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static void dump_8_PD(int shift, unsigned long PD0, unsigned long PD1);
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static void dump_4_PD(int shift, unsigned long PD)
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{
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int dt;
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int i;
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int TIA;
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unsigned long TC;
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unsigned long root;
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if (shift > 8)
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printf("ERROR ! shift > 8 ");
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MMU030_get_TC(&TC);
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TIA = (GET_TC_TI(TC) >> (8 - shift)) & 0x000F;
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dt = GET_TD_SF_DT(PD);
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switch(dt)
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{
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case DT_INVALID:
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printf("INVALID!, ");
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break;
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case DT_PAGE_DESCRIPTOR:
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printf("0x%08lx (%d), ", GET_TD_SF_ADDR(PD), shift);
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break;
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case DT_VALID_4_BYTE:
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root = GET_TD_SF_NEXT(PD);
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for (i = 0; i < (1 << TIA); i++)
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{
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unsigned long PD = MMU030_read_phys(root + i * 4);
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dump_4_PD(shift + 4, PD);
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}
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break;
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case DT_VALID_8_BYTE:
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root = GET_TD_SF_NEXT(PD);
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for (i = 0; i < (1 << TIA); i++)
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{
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unsigned long PD0 = MMU030_read_phys(root + i * 8);
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unsigned long PD1 = MMU030_read_phys(root + i * 8 + 4);
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dump_8_PD(shift + 4, PD0, PD1);
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}
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break;
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default:
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printf("ERROR !! dt = %d ", dt);
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break;
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}
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}
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static void dump_8_PD(int shift, unsigned long PD0, unsigned long PD1)
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{
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int dt;
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int max, min;
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int i;
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int TIA;
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unsigned long TC;
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unsigned long root;
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GET_TD_LF_LIMIT(PD0, PD1, max, min);
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if (shift > 8)
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printf("ERROR ! shift > 8 ");
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MMU030_get_TC(&TC);
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TIA = (GET_TC_TI(TC) >> (8 - shift)) & 0x000F;
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max = max > (1 << TIA) ? (1 << TIA) : max;
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if (max - min < 0)
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printf("ERROR ! max(%d) - min(%d) < 0, TIA = %d, ", max, min, TIA);
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dt = GET_TD_LF_DT(PD0, PD1);
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switch(dt)
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{
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case DT_INVALID:
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printf("INVALID!, ");
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break;
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case DT_PAGE_DESCRIPTOR:
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printf("0x%08lx (%d), ", GET_TD_LF_ADDR(PD0, PD1), shift);
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break;
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case DT_VALID_4_BYTE:
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root = GET_TD_LF_NEXT(PD0, PD1);
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for (i = 0; i < max - min; i++)
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{
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unsigned long PD = MMU030_read_phys(root + i * 4);
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dump_4_PD(shift + 4, PD);
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}
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break;
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case DT_VALID_8_BYTE:
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root = GET_TD_LF_NEXT(PD0, PD1);
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for (i = 0; i < max - min; i++)
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{
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unsigned long PD0 = MMU030_read_phys(root + i * 8);
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unsigned long PD1 = MMU030_read_phys(root + i * 8 + 4);
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dump_8_PD(shift + 4, PD0, PD1);
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}
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break;
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default:
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printf("ERROR !! dt = %d ", dt);
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break;
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}
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}
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void MMU030_dump_table()
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{
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unsigned long root;
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unsigned long TC;
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unsigned long CRP[2];
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int max, min;
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int dt;
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int i;
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int TIA, TIB, TIC, TID;
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MMU030_get_TC(&TC);
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printf("TC: 0x%08lx\n", TC);
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if (GET_TC_ENABLE(TC))
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printf(" Enable\n");
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if (GET_TC_SRE(TC))
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printf(" Supervisor Root Pointer Enable\n");
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if (GET_TC_FCL(TC))
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printf(" Function Code lookup Enable\n");
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printf("Page Size: %d, Initial Shift: %ld\n",
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GET_TC_PAGE_SIZE(TC), GET_TC_IS(TC));
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TIA = GET_TC_TIA(TC);
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TIB = GET_TC_TIB(TC);
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TIC = GET_TC_TIC(TC);
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TID = GET_TC_TID(TC);
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printf("TIA: %d TIB: %d TIC: %d TID: %d\n", TIA, TIB, TIC, TID);
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/* dump table */
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MMU030_get_CRP(CRP);
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printf("Root Pointer: 0x%08lx%08lx\n", CRP[0], CRP[1]);
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dt = GET_RP_DT(CRP);
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GET_RP_LIMIT(CRP, max, min);
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max = max > (1 << TIA) ? (1 << TIA) : max;
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root = GET_RP_ADDR(CRP);
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printf("SRP: 0x%08lx\n", root);
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switch(dt)
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{
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case DT_INVALID:
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case DT_PAGE_DESCRIPTOR:
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break;
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case DT_VALID_4_BYTE:
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for (i = 0; i < max - min; i++)
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{
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unsigned long PD = MMU030_read_phys(root + i * 4);
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printf("0x%08lx -> ", (unsigned long)(i + min) << (32 - TIA));
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dump_4_PD(0, PD);
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}
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break;
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case DT_VALID_8_BYTE:
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for (i = 0; i < max - min; i++)
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{
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unsigned long PD0 = MMU030_read_phys(root + i * 8);
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unsigned long PD1 = MMU030_read_phys(root + i * 8 + 4);
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printf("0x%08lx -> ", (unsigned long)(i + min) << (32 - TIA));
|
|
dump_8_PD(0, PD0, PD1);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
#endif /* MMU_DUMP */
|