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142 lines
1.9 KiB
ArmAsm
142 lines
1.9 KiB
ArmAsm
/*
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*
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* (c) 2004 Laurent Vivier <Laurent@lvivier.info>
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*
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*/
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.cpu 68040
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.global MMU040_disable_cache
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MMU040_disable_cache:
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moveq.l #0, %d0
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nop
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cpusha %bc
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movec %d0, %cacr
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cinva %bc
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rts
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.global MMU040_get_TC
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MMU040_get_TC:
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link.w %fp,#0
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move.l 8(%fp),%a0
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movec %tc,%d0
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move.l %d0,%a0@
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unlk %fp
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rts
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.global MMU040_get_SRP
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MMU040_get_SRP:
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link.w %fp,#0
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move.l 8(%fp),%a0
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movec %srp, %d0
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move.l %d0,%a0@
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unlk %fp
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rts
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.global MMU040_get_CRP
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MMU040_get_CRP:
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link.w %fp,#0
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move.l 8(%fp),%a0
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movec %urp, %d0
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move.l %d0,%a0@
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unlk %fp
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rts
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.global MMU040_get_ITT0
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MMU040_get_ITT0:
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link.w %fp,#0
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move.l 8(%fp),%a0
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movec %itt0, %d0
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move.l %d0,%a0@
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unlk %fp
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rts
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.global MMU040_get_DTT0
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MMU040_get_DTT0:
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link.w %fp,#0
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move.l 8(%fp),%a0
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movec %dtt0, %d0
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move.l %d0,%a0@
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unlk %fp
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rts
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.global MMU040_get_ITT1
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MMU040_get_ITT1:
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link.w %fp,#0
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move.l 8(%fp),%a0
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movec %itt1, %d0
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move.l %d0,%a0@
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unlk %fp
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rts
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.global MMU040_get_DTT1
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MMU040_get_DTT1:
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link.w %fp,#0
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move.l 8(%fp),%a0
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movec %dtt1, %d0
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move.l %d0,%a0@
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unlk %fp
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rts
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.global MMU040_ptest
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MMU040_ptest:
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link.w %fp,#0
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move.l 8(%fp),%a0
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/* test address */
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ptestw (%a0)
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movec %mmusr,%d0
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unlk %fp
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rts
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.global MMU040_read_phys
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MMU040_read_phys:
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link.w %fp,#-8
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move.l %d2,%sp@-
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/* get the address to read */
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move.l 8(%fp),%d0
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move.l %d0,%a0
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/* save the %TT0 register */
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movec %dtt0,%d2
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/* compute %TT0 new value */
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andi.l #0xFF000000, %d0 /* 8 high bits of address */
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ori.l #0x00008207, %d0 /* Enable, Caching allowed, read access
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* Ignore Function Code
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*/
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/* disable interrupts */
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move.l %d1,-(%sp)
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move %sr,%d1
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ori.w #0x0700,%sr
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/* set %TT0 with new value */
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movec %d0, %dtt0
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/* read real memory */
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move.l %a0@,%d0
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/* restore %tt0 */
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movec %d2,%dtt0
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/* restore interrupts */
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move %d1, %sr
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move.l (%sp)+, %d1
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move.l %sp@+, %d2
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unlk %fp
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rts
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