# Instruction Format of Memory Reference Instructions (MRIs)

| Opcode |  | Page Bit | Page Address
Bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11
| Address Mode Bit

Mnemonic | Opcode | Description
--- | --- | ---
AND Y | 000 | Logical AND. The AND operation is performed between the content of memory location Y and the content of AC. The result is left in AC, the original content of AC is lost, and the content of Y is unchanged.
TAD Y | 001 | Two’s complement add. The content of memory location Y is added to the content of AC in two’s complement arithmetic. The result of this addition is held in AC, the original content of AC is lost, and the content of Y is unchanged. If there is a carry from the MSB of AC, the L flag is complemented.
ISZ Y | 010 | Increment and skip if zero. The content of memory location Y is incremented by one. If the resultant content of Y equals zero, the content of PC is incremented and the next instruction is skipped. If the resultant content of Y does not equal zero, the program proceeds to the next instruction.
DCA Y | 011 | Deposit and clear AC. The content of AC is deposited in core memory at the address Y and AC is cleared. The previous content of memory location Y is lost.
JMS Y | 100 | Jump to subroutine. The incremented content of PC is deposited in core memory location Y, and PC is loaded with the address of the memory location Y+1. So the first word of the subroutine contains the return address and execution continues at the second word of the subroutine.
JMP Y | 101 | Jump to Y. The address Y is loaded into PC so that the next instruction is taken from core memory location Y. The original content of PC is lost.

## Addressing Modes

When the Address Mode Bit is zero, the memory location specified by the instruciton word contains the operand (direct addressing). When the Address Mode Bit is one, the memory location specified by the instruction word contains the address of the operand (indirect addressing). In symbolic notation, indirect addressing is indicated by the letter “I” between the mnemonic and the actual address, e. g. “TAD I 10”.

## The Page Bit

The basic 4K core memory is (logically) partitioned into 32 pages of 128 (octal 200) words each. A page number determines the five most significant bits of an address. When the Page Bit of a MRI is zero, the operand is taken from memory page zero. When the Page Bit is one, the page number of the operand is the number of the page where the instruction resides, i. e. the five MSBs of the operand address are identical to the five MSBs of the instruction words address. The offset inside the designated page is taken from the Page Address part (bits 5–11) of the instruction word.

## Autoindexing Memory Locations

Memory locations 0010–0017 (of all memory fields, i. e. locations 00010–00017, 10010–10017, 20010–20017, …) are special registers which are automatically incremented when they are used as pointer addresses of indirectly addressed memory reference instructions. The increment takes place before the value is used as indirect address. When these locations are addressed directly, they behave as any other memory location.

Note that the CPU window displays disassembled instructions as if the increment of autoindexing memory locations has already occured; showing the location the instruction will really access. The autoindexing addresses appear underlined in the CPU window.

## Memory Reference Instructions with the KM8-E Memory Extension

When the PDP-8 has a KM8-E Memory Extension, it can have up to 32K words of core memory, partitioned in eight 4K fields. The value of the KM8-E register IF (Instruction Field) is used as a 3-bit extension of the PC. IF not only determines the memory field where the next instruction is to be taken from, but also the field where directly addressed operands and the pointer addresses of indirectly addressed operands are to be taken from. The final operand of the indirect addressing is taken from the memory field designated by the KM8-E register DF (Data Field).

## Example

Assume DF=1, IF=2, PC=205 (octal).