# Interrupt Control

On the PDP-8, an interrupt can occur when the interrupt enable flag is set and the delay and inhibit flags are cleared. With the PDP-8/E (not with earlier models), any I/O device has an interrupt enable flag. They and the I/O flags of the devices are collected in the interrupt enable and I/O flags table of the CPU window. When a devices interrupt mask flag is set, this device can cause an interrupt by setting its I/O flag when completing an I/O operation to signal that it is ready for new I/O operations or that new input is available. The interrupt mask flags can be set or cleared by device specific IOTs.

When the CPU accepts an interrupt, i. e. when the interrupt enable flag is set, the delay and inhibit flags are cleared and a device thats interrupt mask flag is set raises its I/O flag, the following happens: The CPU completes the execution of the instruction in progress and acknowledges the interrupt. The interrupt enable flag is cleared, i. e. no further interrupts can occur, the content of PC is saved in memory location 0 (on field 0), and PC is set to one. So execution continues at location 1 where the interrupt service routine must reside. When the PDP-8 has a KM8-E Memory Extension, additionally the values of DF, IF and UB are saved in the 7-bit register SF (UB in SF(0), IF in SF(1–3), and DF in SF(4–6)), and DF, IF, IB, UB, and UF are cleared, i. e. the CPU switches to memory field 0 and to system mode (UF=0).

When the interrupt service routine has serviced the I/O request, it must enable interrupts and return to the user program. (Eventually it has to restore DF, IF, and UF; for that and the function of the inhibit flag see the KM8-E help.) To re-enable interrupts, it executes an ION instruction which sets the interrupt enable and delay flag, and a JMP I 0. Because the delay flag is set, no interrupt can occur between the ION and JMP instruction which would destroy the return address in location 0. The delay flag is cleared in any instruction cycle after checking for interrupts and before execution of the instruction; so new interrupts can occur after execution of the JMP instruction.

The machine instructions for controlling the interrupt facility are IOTs with I/O address 0:

Mnemonic Symbol | Octal Code | Description
--- | --- | ---
SKON | 6000 | Skip the next instruction if interrupts are enabled and disable interrupts, i. e. clear the interrupt enable flag.
ION | 6001 | Turn interrupts on and enable the computer to respond to an interrupt request. When this instruction is given, the computer executes the next instruction, then enables interrupts. The additional instruction allows exit from the interrupt service routine before allowing another interrupt to occur.
IOF | 6002 | Turn interrupts off, i. e. disable interrupts.
SRQ | 6003 | Skip on interrupt request. When the interrupt enable flag and the I/O flag of any I/O device are set, the next instruction is skipped.
GTF | 6004 | Get interrupt flags. All status flags of the CPU are loaded into AC: AC(0) = L flag, AC(1) = GTF (when the EAE is running in mode B), AC(2) = 1 when an interrupt request is pending, else 0, AC(3) = 0 (the KM8-E was specified to load the interrupt inhibit flag into AC(3), but the hardware ignores this flag), AC(4) = interrupt enable flag, AC(5–11) = SF.
RTF | 6005 | Restore interrupt flags. This is the invers operation of GTF and loads the CPU status flags from AC: L = AC(0), GTF = AC(1) (when the EAE is running in mode B), SF = AC(5–11), UB = AC(5), IB = AC(6–8), DF = AC(9–11), Interrupt inhibit flag = 1, Interrupt enable flag = 1, Interrupt delay flag = 1.
SGT | 6006 | Clear all flags. This instruction clears L, AC, the interrupt enable, delay and inhibit flag, the I/O flags, the interrupt enable flags (it sets the enable flags for TTY input and output and, if UB is one, the user mode mask); it switches the EAE to mode A and clears GTF, and it clears the input and output registers of all attached I/O devices.

### Remark

Earlier PDP-8 models (PDP-8, -8/S, -8/I, -8/L) do not support IOTs SKON (6000) and SRQ, GTF, RTF, SGF, CAF (6003–6007).