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https://github.com/maximumspatium/PowerRomDasm.git
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Support int subregions.
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023682783d
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1cd33a596c
@ -117,19 +117,6 @@ class M68KDasm:
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print(instr['mnem'], '\t', end='')
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print(instr['mnem'], '\t', end='')
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print(','.join(instr['ops']))
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print(','.join(instr['ops']))
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def dasm_regions(self, start_addr, size, data, regions):
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self.labels = {}
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for reg in regions:
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if reg[2] == 'align':
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print(hex(start_addr + reg[0]).ljust(15), end='')
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print('align\t' + str(reg[3]))
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elif reg[2] == 'code':
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reg_size = reg[1] - reg[0] + 1
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self.dasm_region(start_addr + reg[0], reg_size,
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data[reg[3]:reg[3]+reg_size])
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else:
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print("Unknown region type " + reg[2])
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class ROMDisassembler:
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class ROMDisassembler:
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def __init__(self, rom_data, rom_db):
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def __init__(self, rom_data, rom_db):
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@ -173,23 +160,56 @@ class ROMDisassembler:
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else:
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else:
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print("dc.l\t0x%X" % dest_offset)
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print("dc.l\t0x%X" % dest_offset)
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def dasm_regions(self, start_addr, size, data, regions):
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self.labels = {}
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for reg in regions:
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if reg[2] == 'align':
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print(hex(start_addr + reg[0]).ljust(15), end='')
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print('align\t' + str(reg[3]))
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elif reg[2] == 'code':
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reg_size = reg[1] - reg[0] + 1
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self.m68k_dasm.dasm_region(start_addr + reg[0], reg_size,
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data[reg[3]:reg[3]+reg_size])
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elif reg[2] == 'int':
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print("")
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print((reg[1] + ':').ljust(15))
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self.fmt_single_entry(reg[3], reg[4], reg[0])
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else:
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print("Unknown region type " + reg[2])
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def parse_subregs(self, start, size, subregs):
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def parse_subregs(self, start, size, subregs):
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#print("This entry has subregions", subregs)
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#print("This entry has subregions", subregs)
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regs = []
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regs = []
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reg_start = start
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reg_start = start
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for reg in subregs:
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for reg in subregs:
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if reg['type'] != 'align':
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if reg['type'] == 'align':
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offset = reg['offset']
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if offset < reg_start or offset >= (start + size):
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print("Invalid subregion offset: 0x%X" % offset)
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return regs
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regs.append((reg_start, offset - 1, 'code', reg_start - start))
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boundary = reg['boundary']
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reg_end = align(offset, boundary)
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regs.append((offset, reg_end - 1, 'align', boundary))
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reg_start = reg_end
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print("reg_start=%d" % reg_start)
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elif reg['type'] == 'int':
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offset = reg['offset']
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if offset < reg_start or offset >= (start + size):
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print("Invalid subregion offset: 0x%X" % offset)
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return regs
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regs.append((reg_start, offset - 1, 'code', reg_start - start))
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reg_size = reg['size']
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if 'label' in reg:
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label = reg['label']
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else:
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label = 'l_{:x}'.format(self.start_addr + offset)
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self.m68k_dasm.labels[self.start_addr + offset] = label
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regs.append((offset, label, 'int', reg['format'], reg_size))
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reg_start = offset + reg_size
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else:
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print("Unknown subregion type " + reg['type'])
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print("Unknown subregion type " + reg['type'])
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return regs
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return regs
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offset = reg['offset']
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if offset < reg_start or offset >= (start + size):
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print("Invalid subregion offset: 0x%X" % offset)
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return regs
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regs.append((reg_start, offset - 1, 'code', reg_start - start))
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boundary = reg['boundary']
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reg_end = align(offset, boundary)
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regs.append((offset, reg_end - 1, 'align', boundary))
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reg_start = reg_end
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if reg_start < (start + size):
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if reg_start < (start + size):
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regs.append((reg_start, (start + size) - 1, 'code', reg_start - start))
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regs.append((reg_start, (start + size) - 1, 'code', reg_start - start))
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#print(regs)
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#print(regs)
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@ -237,8 +257,7 @@ class ROMDisassembler:
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regs = self.parse_subregs(offset, size, entry['subregs'])
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regs = self.parse_subregs(offset, size, entry['subregs'])
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else:
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else:
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regs = [(offset, offset + size - 1, 'code', 0)]
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regs = [(offset, offset + size - 1, 'code', 0)]
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self.m68k_dasm.dasm_regions(self.start_addr, size,
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self.dasm_regions(self.start_addr, size, self.rom_data[offset:offset+size], regs)
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self.rom_data[offset:offset+size], regs)
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elif entry['arch'] == 'ppc':
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elif entry['arch'] == 'ppc':
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print("PPC disassembler not implemented yet")
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print("PPC disassembler not implemented yet")
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else:
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else:
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