mirror of https://github.com/elliotnunn/boot3.git
2861 lines
120 KiB
Plaintext
2861 lines
120 KiB
Plaintext
;__________________________________________________________________________________________________
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;
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; File: Universal.a
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;
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; Contains: This module provides Data structures and routines to support Universal ROMs.
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; It can also be used in Non-Universal ROMs to provide tables for initializing
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; base addresses and hardware.
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;
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; Written by: Gary G. Davidian
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;
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; Copyright © 1989-1993 by Apple Computer, Inc. All rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM62> 12/17/93 PN Fix the test for Pratt decoder
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; <SM61> 12/13/93 PN Roll in KAOs and Horror changes to support Malcom and AJ
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; machines.
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; <SM60> 12/7/93 BG Modified the Frigidaire entries in the djMEMC @MachineTbl to
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; properly reflect the VIA PortA values for CPU ID+Speed.
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; <SM59> 11/17/93 KW forSTP601 in GetCPUIDReg to or in Risc product to the id.
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; <SM58> 11/9/93 KW made some changes for STP machines. changes are conditionalized
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; by forSTP601
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; <SM57> 9/26/93 KW (H35 BG) Modified the djMEMC memory controller setup so that it
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; chooses between Wombats and Speedbumped Wombats and initializes
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; the memory controller to use a different set of wait states for
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; the Speedbumped machines. This is because the Speedbump'ed
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; units do not want to have to use faster-speed DRAM, which
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; currently the Quadra 800 (Wombat33inFridge) requires. The
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; Speedbumped 650 (Wombat33inLego) will expect 80ns DRAM, just as
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; the Centris650 (Wombat25inLego) did.
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; <SM56> 8/13/93 KW adding two more smurf wombats
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; <SM55> 8/12/93 BG Changed various Cyclone-related boxflags to their official
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; names.
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; <SM54> 8/11/93 KW made the forSmurf check in GetCPUIDReg dynamic. Currently
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; recoginizes Quadra700/900/950 and Centris610/650 quadra800
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; <SM53> 7/27/93 GMR Added routine to do a runtime check for BART (on PDM).
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; <SM52> 7/2/93 PN Add conditional for export hasCPUIDregs
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; <SM51> 6/29/93 SAM (PDW) Added code to check for a cf96 in GetCPUID (for
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; PDM/ColdFusion).
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; <SM50> 6/14/93 kc Roll in Ludwig.
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; <LW7> 4/29/93 fau Updated the Cyclone/Tempest timing to 120ns ROMS for final
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; shipment.
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; <SM49> 6/3/93 SAM Exporting GetCPUIDReg.
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; <SM48> 5/10/93 SAM Added a few nops in the PDM specific CPU ID check.
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; <SM46> 4/26/93 RC Get ride of warning due to bra.s
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; <SM45> 4/21/93 joe Added hack to GetCPUIDReg for PDM EVT2. (CPUID register doesn't
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; work right, so use extra bits in SCSI DMA Ctl reg to check for
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; AMIC2.)
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; <SM44> 4/20/93 joe Added to PDM-style CPUID reg check. The old
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; long-word-access-only code would read the register, write some
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; value back, and re-read the register, making sure that the
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; second read yielded the same data as the first. The PDM-style,
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; byte-access CPUID register read code now does this too.
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; <SM43> 4/20/93 jb Fixed up the code to work on either a normal or PDM-style CPUID
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; register.
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; <SM42> 3/31/93 chp Synchronize SuperMario with changes from <LW5>.
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; <LW5> 2/26/93 fau Removed support for Cyclone EVT3 and changed all labels having
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; MMC with YMCA.
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; <SM41> 2/23/93 RB Fixed a check for djMEMC in InitVIAs where it was depending on
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; d3 which wasn't set up. Now checking decoder kind in the low
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; byte of d2.
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; <SM40> 2/8/93 rab Rolled in the following change from Horror for Wombat: <H30>
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; 11/18/92 BG Modified TestForSonic so that instead of just
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; reading a register at SonicBase to determine if Sonic is
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; present, we actually WRITE a SW Reset command to Sonic. This
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; way, not only do we detect it, but we make sure Sonic is always
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; reset when booting/restarting.
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; <SM39> 1/15/93 PN In case of Quadra 900 which has a Caboose chip, we do not
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; execute the DoEgretInit but do a CudaDone otherwise we kill
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; Quadra900.
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; <SM38> 01/09/93 RM/HY Disable asynchronous messages on Egret based machines. This
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; fixes a problem which could potentially causes hangs to occurr
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; on restart if enough time elapses before Egret can respond to
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; these messages.
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; <SM37> 12/23/92 RC Added Support for Smurf on Wombat
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; <SM36> 12/17/92 RB Removed some of the LC930 conditionals. Added back other hasXXXX
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; conditionals to make it easier to build 1 off 1 Meg ROMs.
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; <SM35> 12/11/92 FU Was always checking BoxCyclone33 when programming the YMCA.
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; <SM34> 12/4/92 fau Added support for Cyclone40 and Tempest33.
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; <SM33> 11/20/92 fau Didn't put a ; on one of my comments.
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; <SM32> 11/20/92 fau Added a TestForMUNI to GetExtHardwareInfo so that Tempest can
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; check whether the Nubus adapter is there or not. Programmed
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; MUNI for Tempest.
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; <SM31> 11/7/92 rab Roll in Horror changes. Comments follow:
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; <H29> 8/10/92 SWC Fixed the MSC VIA/RBV initialization to disable slot interrupts.
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; <H28> 7/2/92 ag Change initial state of the Jaws/dart via2 modemRst bit. It
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; should be 0 to insure the modem is in reset when not in use.
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; This also avoids current leakage to the modem.
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; <H27> 6/25/92 CCH Added conditionalized support for Quadra on RISC-based emulator.
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; <H26> 6/4/92 HY Add ptr to sound primitives vector table in LC product info table.
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; <H25> 6/3/92 BG Conditionally changed -InitVIAs- temporarily to build the
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; correct sequence of code for the BIOS1 chip on Wombat til BIOS
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; is revved to have VIA1 work correctly. This change only takes
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; effect if you Build -p -WombatEVT1.
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; <H24> 5/28/92 NJV Added SoundPlayAndRecord bit to ProductInfo Tables of machines
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; that can play and record simultaneously.
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; <H22> 05-18-92 jmp Changed the ÒsRsrcZydecoDirÓ name to the more generic
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; ÒsRsrcBFBasedDirÓ (BF=BoxFlag) name.
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; <H18> 5/3/92 BG Removed references to hasOrwell2, since it is now superfluous to
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; hasOrwell.
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; <H17> 4/24/92 HJR Added CheckForNiagra so that we may distinguish from
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; Jawsdecoder.
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; <SM30> 11/3/92 SWC Changed SlotEqu.a->Slots.a.
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; <SM29> 11/2/92 kc Make change to prevent unwanted branch island (to data).
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; <SM28> 10/27/92 fau Rolled in a Horror patch for TestForFPU that also works for
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; 040's without and FPU. This is to support Tempest. Added the
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; necessary changes to the programming of the YMCA for Tempest.
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; <SM27> 10/25/92 HY Add code in jumpintoRom to turn on & grey LC/LC II screen early.
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; <SM26> 10/20/92 fau Stopped using "MMC/YMCAexists" and replaced by either comparing
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; against DecoderKind or by using PSCexists. Also, changed
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; YMCAAddr/MMCAddr to use DecoderAddr.
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; <SM25> 10/18/92 CCH Added support for PDM and conditionalized support for Smurf.
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; <SM24> 10/12/92 RB For the 1 Meg LC930 ROM, exclude all code not related to the LC
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; hardware.
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; <SM23> 9/30/92 fau Added support for Cyclone EVT4. This involved new DRAM/ROM
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; speed values and a modification to GetHardwareInfo so that it
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; looks at the CycloneEVT4 product info.
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; <SM22> 9/25/92 RB Excluded some functions such as INITVias from executing while
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; booting from RAM. Added a ROM base for the LC 2. Hacked
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; GetCPUIDReg to return Cyclone when ROMinRAM testing.
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; <SM21> 8/27/92 CCH Removed some now obsolete conditionals for Smurf card.
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; <SM20> 8/25/92 chp Fix assembler warning.
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; <SM19> 8/24/92 PN Take out CycloneboxEVT1
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; <SM18> 8/20/92 CCH Don't initialize Orwell when running on a Cub Card.
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; <SM17> 8/17/92 CCH Extended Universal support to 96-bits, added GetExtHardwareInfo
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; routine to provide dynamic checking for feature existence.
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; <SM16> 08-11-92 jmp Fixed a problem in the GetCPUIDReg routine where the CACR was
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; being trashed; this caused Õ030 machines to die before BootBeep.
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; <SM15> 8/9/92 CCH Removed uneeded conditionals and temporarily return a CPU ID
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; for RISC cards.
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; <SM14> 7/28/92 fau Corrected the Cyclone MMC_DRAMspeed0/1 to point to a 25MHz CPU
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; with 60ns DRAM, instead of 25MHz with 80ns DRAM.
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; <SM13> 7/21/92 kc Fix duplicate lable.
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; <SM12> 7/13/92 CCH Added conditionalized support for Cub Card.
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; <SM11> 6/30/92 kc Fix bug introduced with last checkin (trashing d0).
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; <SM10> 6/26/92 GS (RBM) Add call to CudaInit to perform a SyncAck cycle prior to
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; any transaction with Cuda. This will disable all asynchronous
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; message sources within Cuda and will prevent any collisions from
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; occuring in the low level io primitive routines prior to
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; installation of the Cuda manager.
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; <SM9> 6/21/92 RB ¥ Added a temporary check for EVT1 Cyclone in InitVIAs and
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; CheckBases so that we don't have to support two builds for the
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; next few weeks.
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; <SM8> 6/9/92 kc Roll in Horror change from UniversalPatch.a,14.
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; <H16> 5/28/92 BG Fixed a bug in GetHardwareInfoPatch. If you have the -Ext- bit
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; set in your CPU ID register, -GetVIAInputs- gets called to read
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; VIA1 to see what machine you really are. However, A1 was a bad
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; register to save the A6 return value in. A3 is better.
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; <SM7> 5/25/92 RB Changed a couple of branch longs to short branches since the
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; code is not in patches anymore. Some VIA1 init code got lost in
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; pass <SM5>, so it has been restored now.
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; <SM6> 5/22/92 RB Removed an ENDIF
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; <SM5> 5/22/92 RB Forgot to add comments in the previous checkin. Added tables for
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; Cyclone, checks for MMC which identify a a Cyclone machine (for
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; now I think) and got rid of the IF forCyclone changes previously
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; made. Added VIA init stuff for Cyclone, its decoder table and
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; video info.
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; <SM4> 5/22/92 RB Making changes for Cyclone
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; <SM3> 5/17/92 kc Roll the Horror changes. Comments follow: ¥ From
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; UniversalPatch.a:
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; <H14> 4/20/92 NJV Adding changes needed to support Patch ROMs
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; <H13> 4/13/92 JC Remove dynamic speed determination from Sonora setup code.
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; <H12> 2/20/92 JC Fix register trashing bug in test for Sonic code and remove
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; temporary branch around Sonic test.
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; <H11> 2/14/92 JC Clean up Sonora Memory controller initialization, dynamically
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; determine clock speed, and add TestforSonic code.
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; <T13> 4/26/91 ag Relocate the stack pointer after we jump into rom, otherwise a
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; berr will cause ram to be written to!
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; <T12> 4/22/91 ag added patch to reinitialize berr handler after jump into rom.
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; removed aux wait state initialization in jaws.
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; <T11> 2/16/91 BG Changed the Orwell initialization to understand 33MHz.
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; <T10> 1/15/91 HJR Added new code in memoryCtrlInitPatch for Jaws initialization.
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; <T7> 11/7/90 BG Made changes for new rev. of Orwell (2) permanent.
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; <T4> 10/30/90 BG Added changes for new rev. of Orwell (2).
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; <T3> 10/25/90 CCH Added support for ReAnimator when forRomulator equate is set.
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; ¥ From Univeral.a:
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; <H9> 12/16/91 HJR Export some symbols and introduce Decoder Niagra and Product
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; Dartanian into product list. Temporarily use the same routine
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; for CheckForJaws and CheckForNiagra until Niagra has some
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; distinguishing characteristic.
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; <H8> 12/12/91 SWC Don't touch RvMonP in InitVIAs if we're running on an MSC since
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; that register offset is used for, among other things, RAM
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; sizing.
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; <T9> 12/7/90 BG (actually JMA) Added support for dual SCSI buses used on
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; Eclipse. Also - merged CheckForRPU with new CheckForSCSI96
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; routine into new patch.
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; <T6> 1/18/90 SWC Fixed an alignment problem where code grew by 2 bytes in
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; TestForIOP. Also changed FMCInit to FMCRPUInit since we don't
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; know if we have parity yet.
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; <T6> 10/29/90 CCH Fixed forRomulator conditional statement.
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; <T5> 10/25/90 CCH Added support for ReAnimator when forRomulator equate is set.
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; <SM2> 4/7/92 JSM Roll-in revision <63> from Reality:
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; <63> 3/24/92 JSM Nuke more code names: boxAuroraCX25 is boxMacIIci, boxF19 is
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; boxMacIIfx.
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; <62> 1/27/92 KC Move Allign 16 macro above rombase table.
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; <61> 1/23/92 RB Changed the order of items in the Decoder lookup table. Changed
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; the Eclipse VIA info record.
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; <60> 1/20/92 RB Backed out to the revision <58>. For some reason making the code
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; that sets up a bus error handler a procedure would freeze the
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; machine upon startup. Very weird because the problem is not
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; obvious. If only that 040 emulator worked...added an ALIGN for
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; the 040 emulator. Got rid of the padForOverpatch at the end of
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; the file.
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; <59> 1/15/92 RB Revisited terror changes. Added a forRomulator change. Made code
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; that sets up the buss error handler a subroutine since it gets
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; called twice.
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; <58> 12/29/91 RB Added Terror changes and rolled in patches to support Quadras
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; and PowerBooks.
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; <57> 12/21/91 RB Need to change boxTim and boxEclipse to the release names.
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; <56> 10/17/91 JSM Get rid of all the stupid conditionals.
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; <55> 10/1/91 JSM DonÕt use onMvMac conditional, Modern Victorian never existed.
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; <54> 10/1/91 JSM DonÕt use eclipseDebug.
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; <53> 9/10/91 JSM Cleanup header.
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; <52> 1/18/91 KIP <JDR> Add Sound8BitMono bit to the Universal ROM flags for TIM,
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; since it has built-in sound input.
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; <51> 10/24/90 JJ Rex V8: Roll in changes from Rex V8 splitoffs.
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; <50> 10/22/90 JJ Rex V8: Change VISAChipBit to V8ChipBit.
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; <49> 9/25/90 SAM Changed boxElsie/boxErickson to boxMacLC/boxMacIIsi
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; <48> 9/13/90 MSH Converted Waimea to TIM. This involved the boxflag, names, and
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; clock/PRAM implementation.
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; <47> 9/1/90 BG Updated Eclipse-related information to reflect the EVT1 boards.
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; <46> 8/15/90 BG Fixed an error in the conditionals at the bottom of JumpIntoROM.
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; <45> 8/14/90 BG Added an address map definition for SONIC on Eclipse. This uses
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; the previously unused Address23 in the I/O map tables.
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; <44> 8/14/90 BG Saved the original bus error vector for the NUB on Eclipse.
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; <43> 8/2/90 CCH Temporarily cleared hwCfgFPU on Eclipse.
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; <42> 6/25/90 BG Modified the EclipseNuBus information to correctly reflect the
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; fact that slot E is not available on the current prototypes.
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; <41> 6/18/90 CCH Added eclipse-specific changes, and removed occurences of the
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; onEclipse equate.
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; <40> 6/11/90 GA Correct VideoInfo 24-bit base address for Erickson. Somehow, it
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; seemed to get lost from <39>.
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; <39> 6/7/90 HJR Changes the 24 Bit Address in MDU and Erickson to 32 Bit
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; Addresses since the video stuff pulls that address and Quickdraw
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; requires it to be a 32 bit address.
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; <38> 5/25/90 MSH JAWS check was all wrong. Changed logical 24 Bit address in MDU
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; and Erickson to reflect actual 24 Bit address.
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; <37> 5/17/90 JJ Change address of diagnostic ROM for VISA decoder.
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; <36> 5/14/90 MSH Moved built in video to logical slot E and the PDS connector to
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; slot B.
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; <35> 5/2/90 CV Updating nuBus slot info to reflect change in the video slot for
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; Erickson.
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; <34> 5/1/90 DAF Updating Erickson VideoInfo for Built-in Video in Slot $E.
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; <33> 4/24/90 DAF Reordered Elsie VideoInfo records to match new RBVPrimaryInit.a
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; <32> 4/21/90 GMR Reversed order of entries in RamInfo tables.
|
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; <31> 4/20/90 JJ Removed support for VISA 1 from Elsie RAM Info Table.
|
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; <30> 4/20/90 JJ Change initial sound volume value for Elsie and Erickson from 2
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; to 6.
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; <29> 4/12/90 MSH Fixed the Waimea clock/PRAM info in tables.
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; <28> 4/11/90 JJ Change sound volume initilization value from 1 to 2 on Erickson
|
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; and Elsie to avoid BURNIN rack problem.
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; <27> 4/11/90 JJ Change VIA1Init table for Erickson and Elsie to set DDRA bits
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; 0:2 to be outputs.
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; <26> 4/4/90 JJ Modified Elsie Video Information Tables.
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; <25> 4/4/90 MSH Added Waimea to the tables. Made the pad bytes at the bottom
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; conditional for overpatching only.
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; <24> 4/2/90 djw Fixup universal NuBusInfo tables for Elsie, Erickson, and
|
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; Eclipse.
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; <23> 3/26/90 CCH Added sound input to external feature flags for Erickson, Elsie,
|
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; and Eclipse.
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; <22> 3/23/90 JJ Made RAMInforElsie tables conditional on hasVISA2.
|
||
; <21> 3/22/90 JJ Fixed bug in JumpIntoROM. Now relocates pointers to Decoder
|
||
; Info and Product Info before "jmp @intoROM(d3.l)".
|
||
; <20> 3/9/90 JJ Changed RAMInfoElsie table to conform to VISA2 memory
|
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; configurations.
|
||
; <19> 2/23/90 BG Moved reference to Orwell to before the Glue DecoderTable entry
|
||
; since Eclipse/Orwell will pass the GLUE test, but a MacII will
|
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; fail the Orwell test.
|
||
; <18> 2/21/90 BG Fixed off-by-one error in Orwell setup code.
|
||
; <17> 2/20/90 CCH Set Eclipse smallest bank size to 4 meg.
|
||
; <16> 2/16/90 BG Modified TestForFPU to check if we're running on an 040 before
|
||
; the SFC check. Running on an 040 implies you have an FPU. The
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||
; SFC check will fail on an 040 because it does not support
|
||
; coprocessor communications. Also modified OrwellDecoderTable to
|
||
; include the possibility of a DiagROM, etc.
|
||
; <15> 2/13/90 JJ Stupid mistake in Version <14>.
|
||
; <14> 2/13/90 JJ Added VISA chip indicator to External Feature flags in VISA
|
||
; decoder table and Elsie information table.
|
||
; <13> 2/9/90 BG Adding Eclipse-specific hardware information. Also added a
|
||
; *CheckForOrwell* routine to determine if we're dealing with
|
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; Orwell decoder. Also added Orwell initialization code in
|
||
; JumpIntoROM.
|
||
; <12> 2/7/90 OR Add CheckForVISADecoder routine and all information tables for
|
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; Elsie.
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||
; <11> 2/7/90 CV Rearranged order of CheckFeatures & CheckOptionals to use d1,
|
||
; not d3 in TestForFPU. d3 contains warmstart value. Sorry!
|
||
; <10> 2/4/90 GMR Fixed VIA init table for Erickson, so it properly initializes
|
||
; the vACR reg for Egret.
|
||
; <9> 2/4/90 CV Removed isUniversal conditional on TestForFPU. Caused HcMac &
|
||
; Macpp to fail.
|
||
; <8> 2/3/90 CV Added TestForFPU to check for an optional FPU.
|
||
; <7> 2/1/90 CV Adding a table for via1 initialization for Erickson. Erickson
|
||
; was using the IIci table, but EGRET requires different
|
||
; initialization. On Erickson, three lines are used to communicate
|
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; with EGRET and five lines are unconnected.
|
||
; <6> 1/25/90 GMR Renamed the ADB/Clock types so they don't conflict with assembly
|
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; conditionals (like iopADB).
|
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; <5> 1/15/90 GMR Added ADB and Clock/Pram bits to External Features longword, to
|
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; help support Erickson/Elsie which use the Egret chip.
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||
; <4> 1/11/90 CCH Added include of ÒHardwarePrivateEqu.aÓ.
|
||
; <3> 1/8/90 CV Adding table information to allow recognition of Erickson as a
|
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; new CPU. Changing the via1 id value for AuroraSE25 to 0. The
|
||
; value it was set to ($16) conflicts with Erickson's cpu id.
|
||
; <2> 1/2/90 SWC Changed CheckForOSSFMC to work with TI as well as NCR parts.
|
||
; <2.5> 11/15/89 GMR Added TestForRPU to check for the optional RPU chip on OSS/FMC,
|
||
; changed the decoder table for OSS/FMC and the InfoF19 table.
|
||
; Fixed bug in TestForIOP when setting increment mode.
|
||
; <2.4> 8/22/89 BBM UGLY HACK. made a quick patch to the bbu table just to get emacs
|
||
; working.
|
||
; <2.3> 7/25/89 CCH Changed JumpIntoROM to preserve the value in the VBR if
|
||
; forRomulator is true.
|
||
; <2.2> 7/16/89 GGD Changed the product info for the former Aurora 16 to be the same
|
||
; as Aurora 25, but without the PGC option. Added a flag to the
|
||
; ExtValid flags of Aurora 25 to indicate that it has the PGC
|
||
; option installed. Renamed AuroraCX25 to be MacIIciPGC and
|
||
; AuroraCX16 to be MacIIci.
|
||
; <2.0> 6/30/89 GGD Initialized the new DefaultRSRCs field in the ProductInfo
|
||
; record. Added some padding to allow for overpatching. Added
|
||
; NuBus Slot Info.
|
||
; <¥2.1> 6/30/89 GGD Changed resource combos from 0,1 to 1,2
|
||
; <2.1> 6/30/89 GGD Changed the DefaultRSRCs from {0,1} to {1,2}
|
||
; <2.0> 6/30/89 GGD Initialized the new DefaultRSRCs field in the ProductInfo record.
|
||
; Added some padding to allow for overpatching. Added NuBus Slot Info.
|
||
; <1.9> 6/12/89 djw Added slot video pram addr to video table
|
||
; <1.8> 6/11/89 GGD Added Video, Ram Bank, hwCfgFlags, and ROM85 info to tables.
|
||
; Updated GetHwInfo to also return the hwCfgFlags. Updated VIA2
|
||
; initialization values.
|
||
; <1.7> 6/10/89 GGD Added info for new aurora boxes. GetHwInfo now clears the beok
|
||
; bit when done.
|
||
; <1.6> 5/29/89 GGD Fixed wrong register bug in FMC initialization. Removed the Test
|
||
; in Ram checks.
|
||
; <1.5> 5/20/89 GGD Updated to use new IOP equates from HardwareEqu, deleted local
|
||
; IOP equates.
|
||
; <1.4> 5/16/89 rwh separated out Mac II Via 2 info to set MMU control bit as an
|
||
; output.
|
||
; <1.3> 5/15/89 GGD Changed RBV BufB initialization to disable Par.Test~ so that
|
||
; correct parity will be generated.
|
||
; <1.2> 5/10/89 CCH Added a test that will make the vFC3 bit an output when running
|
||
; in RAM.
|
||
; <1.1> 5/1/89 GGD Fixed conditionals in CheckForGLUE so that NuMac will work
|
||
; again.
|
||
; <1.0> 4/30/89 GGD Adding to EASE for the first time. Support for Universal ROM.
|
||
;__________________________________________________________________________________________________
|
||
|
||
print off
|
||
LOAD 'StandardEqu.d'
|
||
INCLUDE 'HardwarePrivateEqu.a'
|
||
INCLUDE 'UniversalEqu.a'
|
||
INCLUDE 'PowerPrivEqu.a'
|
||
INCLUDE 'STEqu.a'
|
||
INCLUDE 'Slots.a'
|
||
INCLUDE 'DepVideoEqu.a' ; <58> rb
|
||
INCLUDE 'EgretEqu.a' ; <SM38>
|
||
print on
|
||
print nomdir
|
||
machine mc68030
|
||
mc68881 ; needed for TestForFPU <SM28>
|
||
|
||
|
||
Universal proc export
|
||
import CPUIDProductLookup,ProductLookup,DecoderLookup
|
||
import BaseOfRom, CudaInit
|
||
import SendEgretCmd ; <SM38>
|
||
EXPORT CheckForUnknown
|
||
export GetHardwareInfo
|
||
export GetExtHardwareInfo ; <SM17>
|
||
export JumpIntoROM
|
||
export InitVIAs
|
||
EXPORT CheckNextMap,MapFound ;<SM31> ; <H2>
|
||
IF hasCPUIDRegister THEN ; ; <SM24> rb <SM36> rb
|
||
EXPORT GetCPUIDReg ;<SM49>
|
||
ENDIF
|
||
;_______________________________________________________________________
|
||
;
|
||
; Routine: JumpIntoROM
|
||
; Inputs: A6 - return address
|
||
;
|
||
; Outputs: A0 - Pointer to DecoderInfo record for this machine
|
||
; A1 - Pointer to ProductInfo record for this machine
|
||
; D0 - Flags indicating which base addresses are valid
|
||
; D1 - Flags indicating which external features are valid
|
||
; D2 - Bits 31..16, hwCfgFlags info (possibly unknown)
|
||
; D2 - Bits 15..8, BoxFlag info (possibly unknown)
|
||
; D2 - Bits 7..0, Address Decoder Kind (zero if unknown)
|
||
;
|
||
; Destroys: A2,A3,SP,D3,D4,D5
|
||
; Called by: BSR6
|
||
;
|
||
; Function: Locates the System ROM, which we are executing out of,
|
||
; but which may be mapped down to zero (overlay mode).
|
||
; We will jump into the ROM at its normal base address,
|
||
; and then initialize the VIAs to disable overlay.
|
||
;
|
||
;_______________________________________________________________________
|
||
|
||
with DecoderInfo,ProductInfo,DecoderKinds
|
||
JumpIntoROM
|
||
move.l #aStack,sp ; set stack pointer value
|
||
movea.l a6,a4 ; save the return address
|
||
|
||
; Setup VBR to point to a temporary Bus Error handler, because we need to use
|
||
; Bus Errors to destinguish the address decoders on the 68020/030 machines.
|
||
|
||
lea GotBusError,a0 ; get the handler address
|
||
move.l a0,d0 ; value to search for
|
||
@loop cmp.l -(a0),d0 ; check for a match
|
||
beq.s @found ; use the entry if it matches
|
||
tst.l (a0) ; check for end of list
|
||
bne.s @loop ; if not, keep searching
|
||
lea BusErrVct,a0 ; set it up in RAM
|
||
move.l d0,(a0) ; assume ram based, insert entry
|
||
@found subq.w #BusErrVct,a0 ; make it the bus error vector
|
||
|
||
IF forRomulator THEN ; <T5>
|
||
TestInRAM a3 ; are we in RAM?
|
||
beq.s @notInRAM ;
|
||
movec vbr,d5 ; save contents of vbr <T5>
|
||
movec vbr,a3 ; get vbr address in a1
|
||
move.l BusErrVct(a3),d2 ; save original (read: NUB) buserr vect
|
||
movec d2,USP ; ... in an out-of-the-way place
|
||
move.l BusErrVct(a0),BusErrVct(a3) ; copy old vector to new table
|
||
@notInRAM
|
||
ELSE ; <T6>
|
||
movec.l a0,vbr ; install the vector table
|
||
ENDIF
|
||
|
||
@TryAgain moveq.l #0,d2 ; figure it out from scratch
|
||
bsr6 GetHardwareInfo ; figure out what we are running on
|
||
btst.l #ROMExists,d0 ; see if we have a ROM
|
||
beq.s @TryAgain ; if not, we're screwed, but try again anyway
|
||
|
||
; Now figure out what the new base of ROM should be,
|
||
|
||
IF forRomulator THEN ; <T5>
|
||
TestInRam A2 ; running in RAM? <T5>
|
||
bne.s intoROM ; yep, skip this.. <T5>
|
||
endif
|
||
biglea BaseOfRom,a2 ; where we currently start
|
||
|
||
move.l ROMAddr(a0),d3 ; where we want to start (from savepatch) <3> <cv>
|
||
sub.l a2,d3 ; offset we need to add to relocate <3> <cv>
|
||
adda.l d3,a0 ; relocate decoder info pointer <3> <cv>
|
||
adda.l d3,a1 ; relocate product info pointer <3> <cv>
|
||
|
||
; if not forRamRom then ; ¥¥¥ need to make this a runtime check ¥¥¥
|
||
adda.l d3,a4 ; relocate the return address
|
||
jmp intoROM(d3.l) ; relocate our program counter
|
||
; endif
|
||
intoROM ; now we are in ROM
|
||
|
||
; Setup VBR to point to a temporary Bus Error handler, because we need to use
|
||
; Bus Errors to destinguish the address decoders on the 68020/030 machines.
|
||
|
||
adda.l d3,sp ; relocate the stack to rom addresses <T13>
|
||
|
||
lea GotBusError,a0 ; get the handler address <T12>
|
||
move.l a0,d0 ; value to search for <T12>
|
||
@loop cmp.l -(a0),d0 ; check for a match <T12>
|
||
beq.s @found ; use the entry if it matches <T12>
|
||
tst.l (a0) ; check for end of list <T12>
|
||
bne.s @loop ; if not, keep searching <T12>
|
||
lea BusErrVct,a0 ; set it up in RAM <T12>
|
||
move.l d0,(a0) ; assume ram based, insert entry <T12>
|
||
@found subq.w #BusErrVct,a0 ; make it the bus error vector <T12>
|
||
|
||
IF forRomulator THEN ; <T12>
|
||
TestInRAM a3 ; are we in RAM? <T12>
|
||
beq.s @notInRAM ; <T12>
|
||
movec vbr,d5 ; save contents of vbr <T12>
|
||
movec vbr,a3 ; get vbr address in a1 <T12>
|
||
move.l BusErrVct(a3),d2 ; save original (read: NUB) buserr vect <T12>
|
||
movec d2,USP ; ... in an out-of-the-way place <T12>
|
||
move.l BusErrVct(a0),BusErrVct(a3) ; copy old vector to new table <T12>
|
||
@notInRAM
|
||
ELSE ; <T12>
|
||
movec.l a0,vbr ; install the vector table <T12>
|
||
ENDIF
|
||
|
||
@TryAgain moveq.l #0,d2 ; figure it out from scratch <T12>
|
||
bsr6 GetHardwareInfo ; figure out what we are running on <T12>
|
||
btst.l #ROMExists,d0 ; see if we have a ROM <T12>
|
||
beq.s @TryAgain ; if not, we're screwed, but try again anyway <T12>
|
||
|
||
IF NOT ROMinRAM THEN ; <SM22> rb
|
||
bsr6 InitVIAs ; initialize the VIAs (turns off vOverlay) <T12>
|
||
ENDIF ; <SM22> rb
|
||
|
||
; Here, after running GetHardwareInfo we have: <SM10>{rbm}<2>
|
||
; <SM10>{rbm}<2>
|
||
; a0 - Pointer to table of base addresses <SM10>{rbm}<2>
|
||
; a1 - Pointer to ProductInfo record for this machine <SM10>{rbm}<2>
|
||
; d0 - Flags indicating which base addresses are valid <SM10>{rbm}<2>
|
||
; d1 - Flags indicating which external features are valid <SM10>{rbm}<2>
|
||
; d2 - Bits 31..16, hwCfgFlags info (possibly unknown) <SM10>{rbm}<2>
|
||
; d2 - Bits 15..8, BoxFlag info (possibly unknown) <SM10>{rbm}<2>
|
||
; d2 - Bits 7..0, Address Decoder Kind (zero if unknown) <SM10>{rbm}<2>
|
||
; <SM10>{rbm}<2>
|
||
; CudaInit implies a SyncAck cycle which synchronizes Cuda to the system and disables <SM10>{rbm}<2>
|
||
; all asynchronous messages sources (Auto Poll, RTC, Power Messages, Unknown). No further <SM10>{rbm}<2>
|
||
; individual disabling of asynchronous message sources is required. (R. Montagne 5/25/92) <SM10>{rbm}<2>
|
||
; <SM10>{rbm}<2>
|
||
move.l d0,d3 ; save a copy of d0 <SM11>
|
||
move.l #EgretFWMask,d0 ; mask for Egret Firmware <SM10>{rbm}<2>
|
||
and.l d1,d0 ; isolate the field <SM10>{rbm}<2>
|
||
sub.l #Egret8,d0 ; see if we have Egret FW <SM10>{rbm}<2>
|
||
beq.w @DoEgretInit ; do Egret 8 FW INIT, LC/si <SM10>{rbm}<2> <SM38>
|
||
sub.l #Egret8,d0 ; see if we have Caboose FW <SM10>{rbm}<2>
|
||
beq.s @CudaDone ; just exit Quadra900 <SM10>{rbm}<2> <SM39> PN
|
||
sub.l #Egret8,d0 ; see if we have Cuda FW <SM10>{rbm}<2>
|
||
bne.s @CudaDone ; if not, just exit <SM10>{rbm}<2>
|
||
|
||
IF NOT ROMinRAM THEN ; <SM22> rb
|
||
BigBSR6 CudaInit ;Setup Cuda Sysnc Ack with System <SM10>{rbm}<2>
|
||
bra.s @CudaDone ; <SM38>
|
||
ENDIF ; <SM22> rb
|
||
@DoEgretInit ; <SM38>
|
||
movea.l DecoderInfo.VIA1Addr(a0),a1 ; get VIA 1 base address <SM38>
|
||
move.w #4000,d0 |