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https://github.com/dougg3/mac-rom-simm-programmer.git
synced 2024-12-29 04:29:29 +00:00
Created read and write cycle functions, along with a block read function. I think this will look better...
I also changed the port module so it doesn't needlessly update the data direction register over SPI if it's being told to set the same value it had before.
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@ -105,8 +105,13 @@ void ExternalMem_DeassertOE(void)
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void ExternalMem_Read(uint32_t startAddress, uint32_t *buf, uint32_t len)
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{
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// This is just a time saver if we know we will
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// be reading a complete block -- doesn't bother
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// playing with the control lines between each byte
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ExternalMem_DeassertWE();
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ExternalMem_AssertCS();
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ExternalMem_AssertOE();
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ExternalMem_SetDataAsInput();
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while (len--)
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{
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@ -128,22 +133,26 @@ void ExternalMem_Read(uint32_t startAddress, uint32_t *buf, uint32_t len)
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void ExternalMem_WriteCycle(uint32_t address, uint32_t data)
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{
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ExternalMem_AssertCS();
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ExternalMem_DeassertOE();
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ExternalMem_SetAddressAndData(address, data);
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ExternalMem_AssertWE();
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_delay_us(1); // Give it a small amount of time needed? Could I do this with some NOP instructions instead of waiting 1us?
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ExternalMem_DeassertWE();
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}
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uint32_t ExternalMem_ReadCycle(uint32_t address)
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{
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ExternalMem_DeassertWE();
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ExternalMem_AssertCS();
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ExternalMem_AssertOE();
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ExternalMem_SetDataAsInput();
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ExternalMem_SetAddress(address);
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return ExternalMem_ReadData();
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}
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void ExternalMem_UnlockAllChips(void)
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{
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// Disable the chips completely and wait for a short time...
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ExternalMem_DeassertCS();
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ExternalMem_DeassertOE();
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ExternalMem_DeassertWE();
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_delay_us(1);
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ExternalMem_AssertCS();
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// First part of unlock sequence:
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// Write 0x55555555 to the address bus and 0xAA to the data bus
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// (Some datasheets may only say 0x555 or 0x5555, but they ignore
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@ -163,19 +172,14 @@ void ExternalMem_IdentifyChips(struct ChipID *chips)
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ExternalMem_WriteCycle(0x55555555UL, 0x90909090UL);
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// Now we can read the vendor and product ID
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ExternalMem_SetAddress(0);
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ExternalMem_SetDataAsInput();
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ExternalMem_AssertOE();
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uint32_t result = ExternalMem_ReadData();
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uint32_t result = ExternalMem_ReadCycle(0);
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chips[3].manufacturerID = (uint8_t)result;
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chips[2].manufacturerID = (uint8_t)(result >> 8);
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chips[1].manufacturerID = (uint8_t)(result >> 16);
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chips[0].manufacturerID = (uint8_t)(result >> 24);
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ExternalMem_SetAddress(1);
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result = ExternalMem_ReadData();
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result = ExternalMem_ReadCycle(1);
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chips[3].deviceID = (uint8_t)result;
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chips[2].deviceID = (uint8_t)(result >> 8);
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@ -183,6 +187,5 @@ void ExternalMem_IdentifyChips(struct ChipID *chips)
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chips[0].deviceID = (uint8_t)(result >> 24);
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// Exit software ID mode
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ExternalMem_DeassertOE();
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ExternalMem_WriteCycle(0, 0xF0F0F0F0UL);
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}
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@ -51,9 +51,12 @@ void ExternalMem_DeassertOE(void);
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// Reads a set of data...
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void ExternalMem_Read(uint32_t startAddress, uint32_t *buf, uint32_t len);
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// Performs a write cycle
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// Performs a single write cycle
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void ExternalMem_WriteCycle(uint32_t address, uint32_t data);
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// Performs a single read cycle
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uint32_t ExternalMem_ReadCycle(uint32_t address);
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// Does an unlock sequence on the chips
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void ExternalMem_UnlockAllChips(void);
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31
ports.c
31
ports.c
@ -14,10 +14,16 @@
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#define SIMM_OE (1 << 5)
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#define SIMM_CS (1 << 4)
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// Save some time by not changing the register
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// unless the value has changed [SPI = relatively slow]
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static uint32_t savedDataDDR = 0;
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void Ports_Init(void)
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{
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// This module depends on the MPC23S17
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MCP23S17_Init();
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savedDataDDR = 0xFFFFFFFFUL;
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Ports_SetDataDDR(0);
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}
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void Ports_SetAddressOut(uint32_t data)
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@ -164,13 +170,19 @@ void Ports_AddressDDR_RMW(uint32_t ddr, uint32_t modifyMask)
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void Ports_SetDataDDR(uint32_t ddr)
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{
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MCP23S17_SetDDR(ddr & 0xFFFF); // D0-D15
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DDRE = ((ddr >> 16) & 0xFF); // D16-D23
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DDRF = ((ddr >> 24) & 0xFF); // D24-D31
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if (savedDataDDR != ddr)
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{
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MCP23S17_SetDDR(ddr & 0xFFFF); // D0-D15
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DDRE = ((ddr >> 16) & 0xFF); // D16-D23
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DDRF = ((ddr >> 24) & 0xFF); // D24-D31
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savedDataDDR = ddr;
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}
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}
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void Ports_DataDDR_RMW(uint32_t ddr, uint32_t modifyMask)
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{
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uint32_t newSavedDataDDR;
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uint32_t modifiedDataOn = ddr & modifyMask;
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uint32_t modifiedDataOff = ddr | ~modifyMask;
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@ -178,6 +190,9 @@ void Ports_DataDDR_RMW(uint32_t ddr, uint32_t modifyMask)
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if ((modifyMask & 0xFFFF) == 0xFFFF)
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{
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MCP23S17_SetDDR(modifiedDataOn & 0xFFFF);
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// Remember what the new DDR will be
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newSavedDataDDR = modifiedDataOn & 0xFFFF;
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}
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else // Otherwise, we have to read what's in it first...(unless I decide to keep a local cached copy)
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{
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@ -185,6 +200,9 @@ void Ports_DataDDR_RMW(uint32_t ddr, uint32_t modifyMask)
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outputLatches |= (modifiedDataOn) & 0xFFFF;
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outputLatches &= modifiedDataOff & 0xFFFF;
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MCP23S17_SetDDR(outputLatches);
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// Remember what the new DDR will be
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newSavedDataDDR = outputLatches;
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}
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// Turn on/off requested bits in the DDR register.
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@ -192,6 +210,13 @@ void Ports_DataDDR_RMW(uint32_t ddr, uint32_t modifyMask)
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DDRE &= ((modifiedDataOff >> 16) & 0xFF);
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DDRF |= ((modifiedDataOn >> 24) & 0xFF);
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DDRF &= ((modifiedDataOff >> 24) & 0xFF);
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// Remember what the new DDR will be
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newSavedDataDDR |= ((uint32_t)DDRE) << 16;
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newSavedDataDDR |= ((uint32_t)DDRF) << 24;
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// Save the new DDR
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savedDataDDR = newSavedDataDDR;
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}
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void Ports_SetCSDDR(bool ddr)
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@ -84,17 +84,21 @@ void USBSerial_Check(void)
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struct ChipID chips[4];
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ExternalMem_IdentifyChips(chips);
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char tmp[20];
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uint32_t data = ExternalMem_ReadCycle(0);
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int x;
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for (x = 0; x < 4; x++)
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{
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sprintf(tmp, "IC%d: M%02X, D%02X\r\n", x, chips[x].manufacturerID, chips[x].deviceID);
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sprintf(tmp, "IC%d: M%02X, D%02X\r\n", x+1, chips[x].manufacturerID, chips[x].deviceID);
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CDC_Device_SendString(&VirtualSerial_CDC_Interface, tmp);
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}
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sprintf(tmp, "%08lX\r\n", data);
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CDC_Device_SendString(&VirtualSerial_CDC_Interface, tmp);
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}
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}*/
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if (USB_DeviceState == DEVICE_STATE_Configured)
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/*if (USB_DeviceState == DEVICE_STATE_Configured)
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{
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// Check for commands, etc...
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int16_t recvByte = CDC_Device_ReceiveByte(&VirtualSerial_CDC_Interface);
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@ -108,7 +112,7 @@ void USBSerial_Check(void)
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break;
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}
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}
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}
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}*/
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CDC_Device_USBTask(&VirtualSerial_CDC_Interface);
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USB_USBTask();
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