Commit Graph

16 Commits

Author SHA1 Message Date
Doug Brown
bf1031127d Set up CMake build
This allows building with CMake instead of Eclipse. The reasoning behind
this is to make the code more easily portable to other architectures,
and to move away from being dependent on Eclipse.
2023-06-25 11:38:41 -07:00
Doug Brown
baf0937589 Switch to config header for LUFA
This eliminates the need for a bunch of extra defines added to the
compile command.
2023-06-25 11:38:41 -07:00
Doug Brown
b627ef9020 Move descriptors to RAM
This ensures they will work properly on the AT90USB128x, especially in
the bootloader where they will be in the upper 64 KB.
2023-05-28 19:34:02 -07:00
Doug Brown
3a8e006925 Manually control USB PLL
The 646 and 1286 have different required USB PLL values when you have a
16 MHz crystal. Detect the chip at runtime to set up the PLL correctly.
This requires taking over control of the PLL from LUFA.
2023-05-28 19:34:02 -07:00
Doug Brown
88e8f47bde Jump to correct bootloader address based on whether it's a 64x or 128x 2023-05-28 19:34:02 -07:00
Doug Brown
a7fe6d9b39 Add utility function for determining the AVR model
This is needed in order to handle slightly different functionality
between the AT90USB64x and AT90USB128x.
2023-05-28 19:34:02 -07:00
Doug Brown
14cf8505f7 Break out bootloader entry into HAL
For some reason, I didn't have this as part of the HAL, so the main
program still had AVR dependencies.
2023-05-28 19:34:02 -07:00
Doug Brown
8aec8807c9 Fix line endings
A whole bunch of files in this project had DOS line endings. This is due
to how I started working on it on a Windows machine with little Git
experience. Now it's inconsistent so I'm fixing it.
2023-05-28 19:34:02 -07:00
Doug Brown
82df6ea459 Fix a few minor issues
I noticed that after I implemented the SPI optimization of cycle
counting instead of polling on SPIF, the first "normal" SPI transaction
I tried would fail. This is because nothing was clearing the SPIF flag
anymore, and the normal SPI driver still looks at it. So it was thinking
that the latest transaction was already completed (it wasn't). Worked
around this by making sure we clear the flag in SPI_Assert. I'm not
concerned about performance impact here because the actual clean SPI
driver is not used in performance-bound situations.

Fixed an issue that identified the wrong pins as shorted to ground in
the electrical test functionality. Whoops!
2020-11-27 00:16:35 -08:00
Doug Brown
39f34d67c4 Fix some spaces that should have been tabs 2020-11-27 00:16:35 -08:00
Doug Brown
9e586339dd Insane SPI optimization
Wait a specific amount of time after each SPI transfer instead of
polling status. It works, and it saves about 21 seconds in total on an
8 MB SIMM!
2020-11-27 00:16:35 -08:00
Doug Brown
4394533d88 Small optimization to address calculation
Due to integer promotion, the calculation of what to write to PORTD was
inefficient. Based on my benchmarking, it didn't really matter though.
2020-11-27 00:16:35 -08:00
Doug Brown
9521494971 Optimize read/write cycle functions
If multiple read or write cycles are done in sequence, we'll no longer
needlessly update the data direction registers (which is a slow SPI
transaction). We can also skip updating the pullups on the AVR if
multiple read cycles occur in sequence.
2020-11-27 00:16:35 -08:00
Doug Brown
2943b80c42 Optimize reading of 1024 byte chunks
This was a suggestion from bigmessowires. Do a tight loop when reading
a chunk of 1024 bytes. It's faster.
2020-11-27 00:16:35 -08:00
Doug Brown
3df4c40f38 Add/update copyright
This just makes sure everything is up to date with copyrights.
2020-11-27 00:16:35 -08:00
Doug Brown
7425af761a Break out code into a HAL, optimize flash operations
This makes the code pretty easily portable to other architectures if someone
wants to make a more modern SIMM programmer. I also was pretty careful to split
responsibilities of the different components and give the existing components
better names. I'm pretty happy with the organization of the code now.

As part of this change I have also heavily optimized the code. In particular,
the read and write cycle routines are very important to the overall performance
of the programmer. In these routines I had to make some tradeoffs of code
performance versus prettiness, but the overall result is much faster
programming.

Some of these performance changes are the result of what I discovered when
I upgraded my AVR compiler. I discovered that it is smarter at looking at 32-bit
variables when I use a union instead of bitwise operations.

I also shaved off more CPU cycles by carefully making a few small tweaks. I
added a bypass for the "program only some chips" mask, because it was adding
unnecessary CPU cycles for a feature that is rarely used. I removed the
verification feature from the write routine, because we can always verify the
data after the write chunk is complete, which is more efficient. I also added
assumptions about the initial/final state of the CS/OE/WE pins, which allowed me
to remove more valuable CPU cycles from the read/write cycle routines.

There are also a few enormous performance optimizations I should have done a
long time ago:

1) The code was only handling one received byte per main loop iteration. Reading
   every byte available cut nearly a minute off of the 8 MB programming time.
2) The code wasn't taking advantage of the faster programming command available
   in the chips used on the 8 MB SIMM.

The end result of all of these optimizations is I have programming time of the
8 MB SIMM down to 3:31 (it used to be 8:43).

Another minor issue I fixed: the Micron SIMM chip identification wasn't working
properly. It was outputting the manufacturer ID again instead of the device ID.
2020-11-27 00:16:35 -08:00