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https://github.com/dougg3/mac-rom-simm-programmer.git
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134 lines
3.5 KiB
C
134 lines
3.5 KiB
C
/**************************************************************************//**
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* @file system_M251.c
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* @version V0.10
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* @brief System Setting Source File
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*
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* SPDX-License-Identifier: Apache-2.0
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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****************************************************************************/
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#include <arm_cmse.h>
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#include <stdio.h>
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#include <stdint.h>
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#include "NuMicro.h"
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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#include "partition_M251.h"
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#endif
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extern void *__Vectors; /* see startup file */
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/*----------------------------------------------------------------------------
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Clock Variable definitions
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*----------------------------------------------------------------------------*/
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uint32_t SystemCoreClock = __HSI; /*!< System Clock Frequency (Core Clock) */
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uint32_t CyclesPerUs = (__HSI / 1000000); /*!< Cycles per micro second */
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uint32_t PllClock = __HSI; /*!< PLL Output Clock Frequency */
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const uint32_t gau32ClkSrcTbl[8] = {__HXT, __LXT, 0UL, __LIRC, 0UL, __MIRC, 0UL, __HIRC};
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/**
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* @brief Update the Variable SystemCoreClock
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*
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* @details This function is used to update the variable SystemCoreClock
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* and must be called whenever the core clock is changed.
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*/
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void SystemCoreClockUpdate(void)
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{
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uint32_t u32Freq, u32ClkSrc;
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uint32_t u32HclkDiv;
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u32ClkSrc = CLK->CLKSEL0 & CLK_CLKSEL0_HCLKSEL_Msk;
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/* Update PLL Clock */
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PllClock = CLK_GetPLLClockFreq();
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if (u32ClkSrc != CLK_CLKSEL0_HCLKSEL_PLL)
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{
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/* Use the clock sources directly */
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u32Freq = gau32ClkSrcTbl[u32ClkSrc];
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}
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else
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{
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/* Use PLL clock */
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u32Freq = PllClock;
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}
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u32HclkDiv = (CLK->CLKDIV0 & CLK_CLKDIV0_HCLKDIV_Msk) + 1;
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/* Update System Core Clock */
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SystemCoreClock = u32Freq / u32HclkDiv;
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CyclesPerUs = (SystemCoreClock + 500000) / 1000000;
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}
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/**
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* @brief System Initialization
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*
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* @details The necessary initialization of system. Global variables are forbidden here.
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*/
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void SystemInit(void)
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{
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/* Set access cycle for CPU @ 48MHz */
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FMC->CYCCTL = (FMC->CYCCTL & ~FMC_CYCCTL_CYCLE_Msk) | (3 << FMC_CYCCTL_CYCLE_Pos) | 0x100;
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#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
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SCB->VTOR = (uint32_t) &__Vectors;
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#endif
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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TZ_SAU_Setup();
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SCU_Setup();
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FMC_NSBA_Setup();
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#endif
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#ifdef INIT_SYSCLK_AT_BOOTING
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#endif
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}
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#if USE_ASSERT
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/**
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* @brief Assert Error Message
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*
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* @param[in] file the source file name
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* @param[in] line line number
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*
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* @details The function prints the source file name and line number where
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* the ASSERT_PARAM() error occurs, and then stops in an infinite loop.
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*/
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void AssertError(uint8_t *file, uint32_t line)
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{
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printf("[%s] line %u : wrong parameters.\r\n", file, line);
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/* Infinite loop */
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while (1) ;
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}
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#endif
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/**
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* @brief Set UART0 Default MPF
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*
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* @details The initialization of uart0 default multi function pin.
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*/
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#if defined( __ICCARM__ )
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__WEAK
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#else
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__attribute__((weak))
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#endif
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void Uart0DefaultMPF(void)
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{
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/* Set GPB multi-function pins for UART0 RXD and TXD */
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SYS->GPB_MFPH = (SYS->GPB_MFPH & ~SYS_GPB_MFPH_PB12MFP_Msk) | SYS_GPB_MFPH_PB12MFP_UART0_RXD;
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SYS->GPB_MFPH = (SYS->GPB_MFPH & ~SYS_GPB_MFPH_PB13MFP_Msk) | SYS_GPB_MFPH_PB13MFP_UART0_TXD;
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}
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