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mac-rom/Interfaces/AIncludes/HardwareEqu.a

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Bring in CubeE sources Resource forks are included only for .rsrc files. These are DeRezzed into their data fork. 'ckid' resources, from the Projector VCS, are not included. The Tools directory, containing mostly junk, is also excluded.
2017-09-17 09:09:04 +00:00
; Version: 1.5
; Created: Tuesday, September 19, 1989
;
; File: HardwareEqu.a
;
; Assembler Interface to the Macintosh Libraries
; Copyright Apple Computer, Inc. 1984-1990
; All Rights Reserved
;
; This file is used in these builds: ROM System
;
; Change History (most recent first):
;
; <16> 6/14/91 JL Checked in official MPW 3.2<EFBFBD> version.
; Fixed casing of dsRectBR and dsRectTL in the dsRectHei and
; dsRectLen equates.
; Removed Line1010, Line1111, FMTErrVect, and AutoInt<6E> equates
; because they are declared in SysEqu.a
; Reverted conditionalized equate of hiIntMask and declaration of
; forROM to match shipped Interface.
; ****************************************************************
; ************* Do not edit this file!!!!!!!!!!!!!!!!!!!!!
; ****************************************************************
; This PUBLIC Interface file should not change anymore. Use
; HardwarePrivateEqu.a instead.
; ****************************************************************
; <15> 6/12/91 LN Removed private interface includes
; <14> 1/30/91 gbm sab, #38: Change the <20>already including this file<6C> variable to
; all uppercase (for security reasons)
; <13> 1/16/91 JDR (dba) Removed the comment about Topanga.
; <12> 11/26/90 gbm (and bbm) This file is still obsolete. And when we fix all the
; files that include this old version, this one will still go
; away. === the change we made here is: On 7.0 (and other places
; eventually) HiIntMask will be $0700 instead of $0300 all the
; time, not just when on a non-Plus.
; <9> 4/4/90 MSH This file is now obsolete. All equates found here are are now
; found in the beautifully restructured HardwarePrivateEqu.a. Do
; not chage this file. Do not use this file.
; <7> 1/31/90 CV Adding comment for the previous rev. It was deleted when the
; file was checked in.
; <6> 1/31/90 CV Adding bit definition for via1 buffer B for Erickson. On
; Erickson, three lines are used to communicate with EGRET.
; Five lines are unconnected.
; <5> 1/16/90 EH NEEDED FOR ZONE 5. Added bit offset equ for SCC RRO Receive
; Char Available bit.
; <4> 1/11/90 CCH Moving private stuff to HardwarePrivate.a.
; <3> 12/26/89 SWC Replaced "#"s with ";"s for the following comment since the
; AddChange script was messed up when this file got checked in.
; <2> 12/26/89 SWC Added FMCRPUInit as the FMC initialization value to use when
; Zone 5 has a parity chip installed.
;
; <5.1> 11/29/89 SWC Removed all references to OSS ADB since we'll probably never use
; it. Removed NewOSS and all "old" OSS register offsets since all
; we now have are "new" OSS's. Removed FMCRev2 since we're now
; using the final memory controller on Zone 5.
; <5.0> 11/17/89 GMR Fixed RPU base address, to $50F1E000!
; <4.9> 11/14/89 GMR Changed FMCInit value to new setting for parity. Added RPUBase,
; rpuReset equates.
; <4.8> 11/7/89 GMR Added OSSIntRPU and OSSMskRPU equates for the Ram Parity Unit
; additions to the OSS chip interrupt sources.
; <4.7> 8/16/89 BBM added temporary hack to support emacs build.
; <4.6> 7/25/89 SWC Changed FMCInit so that an extra wait state will be done on ROM
; accesses.
; <4.5> 7/14/89 SWC NEEDED FOR AURORA: Made the FMC init value conditional on
; FMCRev2 until hardware freezes. Changed MskSound from 0 to 2
; since sound now works on F-19.
; <4.4> 7/8/89 CCH Put TestInRam macro back in here, since it is used in more than
; one file.
; <4.3> 7/6/89 GGD Added the ROMRelease field to the ROM Header. Changed the
; defaults for NewOSS and FMCRev2 to both be enabled now, Moved
; the FMCRev2 equate to be outside of the if hasFMC conditional so
; that it will always have a value.
; <4.2> 6/30/89 DAF Added equate for vDAC read address register
; <4.1> 6/28/89 rwh NEEDED FOR AURORA: axed MMUSkyHook from RomHeader, in foreign OS
; table now.
; <4.0> 6/28/89 GGD Deleted FrmBufBase which was no longer correct and unused.
; Deleted old SCSI equates. Deleted hwCfgBits and rom85Bits from
; new machines since they now come from the Universal ROM tables.
; Deleted TestInRAM and related equates.
; <3.9> 6/27/89 rwh NEEDED FOR AURORA: changes to get FMC rev 2 working. Also mark
; 3.6 change.
; <3.8> 6/20/89 SWC Removed the following video parameter constants since they're no
; longer used (and there are lomems that contain the correct
; information): maxX, MaxY, screenWidth, screenHeight, scrnRowB,
; scrnBytes, scrnHorRes, scrnVertRes, dVertRRate, SEScrnIcon,
; SEScrnFace, SEScrnI2.
; <3.7> 6/19/89 SWC Added NewOSS conditional so that builds will be easier to do
; while transitioning from the old to the new OSS version.
; <3.6> 5/31/89 rwh added sound chip register definitions.
; <3.5> 5/30/89 GGD Re-positioned the Mac32 equates to be before all other 32 bit
; machines so that it has precedence when multiple machines are
; defined. Changed Mac32 machine number to be 6 to match hafMac.
; Added a few more equates to Mac32 that are needed by the
; universal ROM.
; <3.4> 5/20/89 GGD Added IOP register definitions. Changed IOP base addresses to
; point to the bypass register set, changed register offsets to
; compensate for base address change.
; <3.3> 5/16/89 rwh changed comments for cache enable/disable bit. Improved
; TestInRam. Added MMUSkyHook to RomHeader.
; <3.2> 5/10/89 CCH Changed TestInRam macro to be PC-relative.
; <3.1> 4/30/89 GGD Temporarily defined some equates when on HafMac and universal to
; get build to work Defined more of the VIA bit equates for Mac16.
; <3.0> 4/27/89 CCH Added TestInRam Macro.
; <2.9> 4/13/89 MSH Ramconfiginit changed to work on 3M ram cards.
; <2.8> 4/13/89 GGD Added hwCfgFlags bit definitions for hwCbAUX, which was defined
; but didn't have an equate here, and hwCbPwrMgr to identify the
; presence of a Power Manager on HcMac. Deleted the equate FPUin,
; and change the one place that used it to use hwCbFPU instead.
; Made the names vrtcData, vrtcClk, vRTCEnb consistent across
; machines by adding a leading "v" in some cases. Removed several
; ancient equates that are no longer referenced by the ROM or
; System disk, and would only encourage non-portable code. Made
; TimeSCSIDB to same address on all machines. Removed OldSCSIxxx
; left over from rev7 board support.
; <2.7> 4/3/89 MSH Moved HcMac screen base to the upper half of its address area to
; allow for Quickdraw
; <2.6> 3/14/89 MSH Removed obsolete equates that were used by starttest. Added
; Esprit ASIC register
; <2.5> 3/6/89 GGD Added equates for the remaining (excluding slots) OSS interrupt
; status bits. Added in conditional support for RAM based MacPP
; ROM (default ROM based). Deleted equate ROMDoEject which was an
; absolute ROM address for all machines except onMac (it used in
; PatchPlusROM.a), as part of the shift towards a position
; independent ROM. Moved the SWIM ISM register offset equates from
; SonyEqu.a to here, to be with the IWM register offset equates,
; re-arranged IWM equates. Deleted redundent IWMBase when onHcMac.
; Re-arranged VIA equates, adding vIFR bit definitions to all
; machines, and making VIA register offsets (with the exception of
; vBufD) machine independent. Added record definition for fields
; in base of ROM. Changed RBV register equates to be offsets from
; base of RBV, instead of absolute addresses. Include RBV equates
; when hasMacIIVia2 also, in preparation for universal ROM.
; <2.4> 2/27/89 CSL hanged FrmBufBase, RBV Frame buffer base from slot E to slot 9
; for real machines.
; <2.3> 2/22/89 CSL moved machine definition for HafMac in front of NuMac to avoid
; conflict.
; <2.2> 2/17/89 rwh changed 4Square and F19 to have same Machien type so Macsbug
; works.
; <2.1> 2/16/89 rwh added equate for power off bit in OSS power off control
; register.
; <2.0> 2/16/89 rwh added Fitch Memory Controller (FMC) equates, some OSS equates.
; <1.9> 2/16/89 CSL Move System heap to start at $2000, provide space for 24/32
; memory manager jump vector table
; <1.8> 2/10/89 csl dded machine EQU for HafMac, made IoMac & MvMac unique.
; <1.7> 2/8/89 CCH Moved "Clock16M" outside of HcMac conditional, and moved
; PMgrBase into SysEqu.a.
; <1.6> 2/8/89 MSH Added equs for Topanga support.
; <1.5> 1/17/89 GGD Added sccIntMask to allow MacPP to build.
; <1.4> 12/15/88 GGD Added equate for RBVBase
; <1.3> 11/17/88 DAF Added equate for vDACPixRdMask
; <1.2> 11/17/88 GGD Increased size of Toolbox Dispatch table onHcMac to be the same
; size as on the MacII, changed HeapStart to correspond.
; <1.1> 11/11/88 DAF Added hasRBV equates for vDAC; moved FrmBufBase up
; <1.0> 11/9/88 CCH Adding to EASE.
;
; <1.9> 11/6/88 GGD Port to IoMac hardware.
; <1.8> 11/2/88 djw Added FrmBufBase for RBV and RomBSize for 512K roms.
; <1.7> 10/7/88 rwh hacked in equates to make MvMac build work
; <1.6> 10/7/88 rwh changed name of sound, IWM chips base addr to be uniform on all
; <1.5> 10/6/88 rwh fixed bug from v1.4: hasMDU, not hadMDU.
; <1.4> 10/5/88 CSL Added EQUs for RBV registers
; <1.3> 9/24/88 rwh re-do onMvMac equates
; <1.2> 9/19/88 MSH It's so great to be finally able to EASE equate files.
; <<3C>1.1> 9/14/88 CCH Updated EASE with the current rev of this file.
;
; <C963> 11/12/87 MSH Put NTicks (via timing constant) in here from timeequ.a
; <C923> 10/29/87 rwh Redo C920: rip out all NEW equates, put into nHardwareEqu.a
; <C920> 10/27/87 rwh Changes for Modern Victorian port (onMvMac). Attempted to make conditionals
; easier to understand with "IF machine1... ELSEIF machine2...ENDIF"s.
; Formatted for readability. Deleted slot address & video register equates,
; since nobody uses them AND they are wrong!
; <C918> 10/26/87 MSH Must continually make more things truly conditional here.
; <C913> 10/22/87 MSH HcMac needs the large tooltable. Made it so.
; <C913> 10/16/87 MSH Conditionalized all VIA offsets.
; <cxxxx> 8/11/87 rwh I hereby note Tony's changes for patch roll-in to ROM sources.
; <PB091> 4/20/87 RDC Added new equs OnemsDBRA, PwrOffEnbl for Mac ][ poweroff routine
; <C634> 1/14/87 bbm one of the via ports used to be connected to the sound stuff, and has
; been disconected on numac. In order for the sound manager to work old
; sound programs on the new chip, that portbit still needs to be set to
; output, even though it is not connected to anything.
; <C587> 1/4/87 JTC New variable NDfltStackSize replaces old DfltStackSize in sysequ.a
; <C579> 12/31/86 GWN Added equates for centering the sys alert box.
; <C483> 12/4/86 bbm The tooltable had wrong address for macplus.
; <C406> 11/12/86 SHF Fixed the SCSI DMA address for Beck's Rev. 8 boards.
; <C289> 10/29/86 RDC deleted DBase and other IWM equ's for NuMac (oldIWMBase, offsets should be used)
; <A283> 10/28/86 bbm changed lo memory all around and moved the toolbox trap table
; <A275> 10/27/86 RDC Added new equates for SCSI addresses
; <A270> 10/27/86 SHF **ALADDIN** Modified vBout and vBInit for Aladdin's VIA
; port B (SCSI IRQ mask), added a SCSI WrOffs definition.
; <A228> 10/26/86 RDC Added changes for rev8 NuMac board
; 9/23/86 NSJ Merged in HardwareEqu from MPW 1.0 release
; <C152> 9/15/86 WRL Added BufWorldSize, DefSysHeapSize; corrected RomBSize and RomWSize.
; Added ScrnHorRes and ScrnVertRes for Jerome.
; <C14x> 9/7/86 BBM hacked away for expanded tb trap table
; <C137> 9/3/86 SHF Added equate for handshaking DMA address for onNuMac SCSI
; <C131> 8/29/86 BBM moved ToolTable from newequ.a to hwequ.a
; <C119> 8/18/86 RDC Added fix for new NuMac H/W so printing works on modem port
; <C112> 8/7/86 RDC Added changes for new NuMac hardware (VIA1 and VIA2 pinout changes)
; <C84> 8/1/86 WRL Added Rom85Bits (value to go in ROM85 global).
; <C99> 7/31/86 BBM expanded the toolbox trap table. Required changes to five files:
; hwequ.a, startinit.a, postlinker.a, dispatch.a, and disptable.a.
; <C91> 7/29/86 WRL CSL Moved Aladdin heapstart to $2200 for now.
; <C56> 6/26/86 WRL Added Machine equate. Made RamChk present for all machines.
; Added SoundChip equate. Corrected number of ticks per millisecond.
; <C49> 6/18/86 WRL [NuMac] Set RAMchk to 1k to reflect new RAM test interface.
; <C46> 6/16/86 DAH [NuMac] Removed Patrn (no longer used).
; <C44> 6/15/86 WRL [NuMac] Added RAMchk equate (amount of RAM to check at first)
; <C41> 6/9/86 RDC Changed ROMstart value for NuMac to full 32 bit address
; <C28> 6/2/86 CSL Added changes for Aladdin, and Aladdin Front desk bus support.
; <c21> 5/29/86 WRL Changes to VIA equates for DVT build
; <C1> 4/14/86 RDC Added changes for new 020 Reno project (NuMac)
; - Deleted default screen variables
; - Added new SCC constants for NuMac
; - Added equate for slot dispatch table size
; - Added NTicks equate for timer mgr (moved from newequ file)
; - Added changes for new memory map
; - Adjusted screen equates
; - Changed address for video card control reg, added bit definitions
; - Added equate for icon flash delay count
; - Added equates to support memory sizing
; - Changed system data space to use low mem area
; - Added equate for DOEject jump vector
; - Changed clock values for serial port
; - Changed screen locations for icons to make it look better
; - Added Heapstart var from NewEqu file
; 9/24/85 LAK VIA init for reg B now disables sound.
; 9/16/85 RDC More SCSI changes for MidMac
; 9/13/85 RDC Added SCSI changes for MidMac
; 9/9/85 LAK Removed equate for DiagROM3.
; 9/5/85 ELR Added SCSI chip addresses for MacPlus.
; 8/26/85 LAK Changed Mac HW addresses for max 4MB of memory. Changed to turn
; overlay off at VIA init.
; 8/5/85 RDC Added MidMac equate for difference between Mac and MidMac screen center point
; 8/1/85 RDC Adjusted DS rect coordinates for MidMac
; 7/31/85 LAK Adjusted DiagROM entrypoints for General Computer . . .
; 7/26/85 RDC Removed machine flag equates - now part of each header file for
; hardware dependent modules
; 7/25/85 RDC Added system error and debugger equates from newequ file
; (they are based on SERegs location)
; 7/24/85 RDC Added changes for project X (aka MidMac):
; - new interrupt levels and equates
; - new screen parameters
; - new VIA, SCC and IWM addresses and equates
; - added hardware equates from serial driver (os-async.text)
; - added timing constant equates
; - MMU equates
; - equates for real time clock interface
; - DMA chip equates
; - added Screenwidth, screenheight equates from Newprivate file
; 7/9/85 LAK Added equates for additional DiagROM entrypoints.
; 5/10/85 LAK Broke out equates from SysEqu.Text and PrivateEqu.Text
; while changing equates to support 2MB Mac.
;__________________________________________________________________________________________________
;
; The following information was formerly in "private" files that were
; not released to the general developer community.
;
; The information in this file is not needed for normal application
; development. These equates and macros were necessary for development
; of the Macintosh ToolBox and Operating System, and are likely to be
; dependent on their current implementation. Use of any information
; in this file is likely to cause your software to fail on future
; versions of Macintosh system software or hardware.
;
; Apple Developer Support will not support any use of the following
; information.
;
; In order to prevent any "accidental" use of this information, it has
; been disabled using the conditional-assembly variable, HWNonPortable,
; defined below. If you change this to a non-zero value, you're on your
; own. Since this gives hardware specific equates, we must also define
; which type of Mac we are assembling for. Define the following variable:
;
; onMac 128K, 512K, 512Ke, or Mac Plus
; onMacPP Mac SE
; onNuMac Mac II,IIx,IIcx,SE/30
; onHafMac Mac IIci
; onHcMac Portable
; onMac16 universal 68000 ROM
; onMac32 universal 68020/30/40/? ROM
;
; Hardware Equates -- This file defines the low-level equates for the
; Macintosh hardware interface.
;--------------------------------------------------------------------
IF &TYPE('__INCLUDINGHARDWAREEQU__') = 'UNDEFINED' THEN
__INCLUDINGHARDWAREEQU__ SET 1
IF (&TYPE('onMac') = 'UNDEFINED') THEN
onMac EQU 0
ENDIF
IF (&TYPE('onMacPP') = 'UNDEFINED') THEN
onMacPP EQU 0
ENDIF
IF (&TYPE('onNuMac') = 'UNDEFINED') THEN
onNuMac EQU 0
ENDIF
IF (&TYPE('onHafMac') = 'UNDEFINED') THEN
onHafMac EQU 0
ENDIF
IF (&TYPE('onHcMac') = 'UNDEFINED') THEN
onHcMac EQU 0
ENDIF
IF (&TYPE('onMac16') = 'UNDEFINED') THEN
onMac16 EQU 0
ENDIF
IF (&TYPE('onMac32') = 'UNDEFINED') THEN
onMac32 EQU 0
ENDIF
onAnything EQU onMac|onMacPP|onHcMac|onHafMac|onNuMac
; *** If HWNonPortable is defined to be non-zero, Then a machine type must be specified!
; *** If a machine is specified, HWNonPortable must be non-zero, specified or not.
IF (&TYPE('HWNonPortable') = 'UNDEFINED') THEN
HWNonPortable EQU onAnything
ENDIF
IF HWNonPortable THEN
;----------
; Hardware configuration bits.
;----------
;the following goes with hwCfgFlags
hwCbSCSI EQU 15 ; SCSI port present
hwCbClock EQU 14 ; New clock chip present
hwCbExPRAM EQU 13 ; Extra Parameter Ram valid.
hwCbFPU EQU 12 ; FPU chip present.
hwCbMMU EQU 11 ; Some kind of MMU present (see MMUType for what kind).
hwCbADB EQU 10 ; Apple Desktop Bus present.
hwCbAUX EQU 9 ; Running A/UX <2.8>
hwCbPwrMgr EQU 8 ; Power Manager present <2.8>
hwCmSCSI EQU (1 << hwCbSCSI)
hwCmClock EQU (1 << hwCbClock)
hwCmExPRAM EQU (1 << hwCbExPRAM)
hwCmFPU EQU (1 << hwCbFPU)
hwCmMMU EQU (1 << hwCbMMU)
hwCmADB EQU (1 << hwCbADB)
hwCmAUX EQU (1 << hwCbAUX)
hwCmPwrMgr EQU (1 << hwCbPwrMgr)
;----------
; 6522 VIA offsets
;----------
vBufB EQU 0 ; BUFFER B
vBufAH EQU $200 ; buffer a (with handshake) [ Dont use! ]
vDIRB EQU $400 ; DIRECTION B
vDIRA EQU $600 ; DIRECTION A
vT1C EQU $800 ; TIMER 1 COUNTER (L.O.)
vT1CH EQU $A00 ; timer 1 counter (high order)
vT1L EQU $C00 ; TIMER 1 LATCH (L.O.)
vT1LH EQU $E00 ; timer 1 latch (high order)
vT2C EQU $1000 ; TIMER 2 LATCH (L.O.)
vT2CH EQU $1200 ; timer 2 counter (high order)
vSR EQU $1400 ; SHIFT REGISTER
vACR EQU $1600 ; AUX. CONTROL REG.
vPCR EQU $1800 ; PERIPH. CONTROL REG.
vIFR EQU $1A00 ; INT. FLAG REG.
vIER EQU $1C00 ; INT. ENABLE REG.
vBufA EQU $1E00 ; BUFFER A
; === VIA IFR/IER bits ===
ifCA2 EQU 0 ; CA2 interrupt
ifCA1 EQU 1 ; CA1 interrupt
ifSR EQU 2 ; SR shift register done
ifCB2 EQU 3 ; CB2 interrupt
ifCB1 EQU 4 ; CB1 interrupt
ifT2 EQU 5 ; T2 timer2 interrupt
ifT1 EQU 6 ; T1 timer1 interrupt
ifIRQ EQU 7 ; any interrupt
;----------
; IWM Offsets
;----------
ph0L EQU 0 ; disk address offsets from base
ph0H EQU $200
ph1L EQU $400
ph1H EQU $600
ph2L EQU $800
ph2H EQU $A00
ph3L EQU $C00
ph3H EQU $E00
mtrOff EQU $1000
mtrOn EQU $1200
intDrive EQU $1400 ; enable internal drive address
extDrive EQU $1600 ; enable external drive address
q6L EQU $1800
q6H EQU $1A00
q7L EQU $1C00
q7H EQU $1E00
;_______________________________________; <2.5>
;
; SWIM offsets
;_______________________________________;
wData EQU $0000 ;Write a data byte
wMark EQU $0200 ;Write a mark byte
wCRC EQU $0400 ;Write a 2-byte CRC (1 access does both)
wIWMConfig EQU wCRC ;Set IWM configuration
wParams EQU $0600 ;Set the 16 parameter registers
wPhase EQU $0800 ;Set phase lines states and directions
wSetup EQU $0A00 ;Set the current configuration
wZeroes EQU $0C00 ;Mode reg: 1's clr bits, 0's=don't care
wOnes EQU $0E00 ;Mode reg: 1's set bits, 0's=don't care
rData EQU $1000 ;Read a data byte
rCorrection EQU rData ;Read the correction factor
rMark EQU $1200 ;Read a mark byte
rError EQU $1400 ;Error register
rParams EQU $1600 ;Parameters (16 bytes deep at this addr)
rPhase EQU $1800 ;Phase lines states and directions
rSetup EQU $1A00 ;Read the current configuration
rStatus EQU $1C00 ;Status (returns current mode reg value)
rHandshake EQU $1E00 ;Handshake register
;----------
; 8530 SCC Offsets
;----------
aData EQU 6 ; offset for A channel data
aCtl EQU 2 ; offset for A channel control
bData EQU 4 ; offset for B channel data
bCtl EQU 0 ; offset for B channel control
sccData EQU 4 ; general offset for data from control
rxBF EQU 0 ; SCC receive buffer full
txBE EQU 2 ; SCC transmit buffer empty
RxCA EQU 0 ; Receive Character Available <5>
;----------
; SCC Clock Rates, Baud Rate Constants
;----------
macClock EQU 36707 ; in Hz * 100
hcMacClock EQU 36720 ; SCC clock rates
midMacClock EQU 39168
nuMacClock EQU 36864
lisaAClock EQU 40000 ; port A clock
lisaBCLock EQU 36864 ; port B clock
macConst EQU 114709 ; in Hz/32
hcMacConst EQU 114750
midMacConst EQU 122400
nuMacConst EQU 115200
lisaAConst EQU 125000
lisaBConst EQU 115200
;----------
; 53C80 SCSI Register Defs, Offsets
;----------
sCDR EQU $00 ; Current SCSI Read Data
sODR EQU $00 ; Output data register
sICR EQU $10 ; Initiator Command Register - READ/WRITE
iRST EQU $80 ; *RST asserted
iAIP EQU $40 ; arbitration in progress (read)
bAIP EQU 6 ; bit test for arbitration in progress
aTMD EQU $40 ; assert Test Mode (write)
iLA EQU $20 ; Lost arbitration (read)
bLA EQU 5 ; bit test for Lost Arbitration
aDIFF EQU $20 ; assert Differential enable (write)
iACK EQU $10 ; *ACK is asserted
iBSY EQU $08 ; *BSY is asserted
iSEL EQU $04 ; *SEL is asserted
iATN EQU $02 ; *ATN is asserted
iDB EQU $01 ; Data bus is asserted
sMR EQU $20 ; Mode Register - READ/WRITE
iBDMA EQU $80 ; Block Mode DMA
iTGT EQU $40 ; Target Mode
iPTY EQU $20 ; Enable Parity Checking
iIPTY EQU $10 ; Enable Parity interrupt
iIEOP EQU $08 ; Enable EOP interrupt
iMBSY EQU $04 ; Monitor BSY
iDMA EQU $02 ; DMA Mode
iARB EQU $01 ; Arbitration
sTCR EQU $30 ; Target Command Register - READ/WRITE
iREQ EQU $08 ; Assert *REQ
iMSG EQU $04 ; Assert *MSG
iCD EQU $02 ; Assert C/*D
iIO EQU $01 ; Assert I/*O
sCSR EQU $40 ; Current SCSI Bus Status (READ)
aRST EQU $80 ; *RST
aBSY EQU $40 ; *BSY
bBSY EQU 6 ; bit test for *BSY
aREQ EQU $20 ; *REQ
bREQ EQU 5 ; bit test for *REQ
aMSG EQU $10 ; *MSG
bMSG EQU 4 ; bit test for *MSG
aCD EQU $08 ; C/*D
bCD EQU 3 ; bit test for C/*D
aIO EQU $04 ; I/*O
bIO EQU 2 ; bit test for I/*O
aSEL EQU $02 ; *SEL
bSEL EQU 1 ; bit test for *SEL
aDBP EQU $01 ; *DBP
sSER EQU $40 ; Select Enable Register (WRITE)
sBSR EQU $50 ; Bus & Status Register (READ)
iEDMA EQU $80 ; End of DMA
bEDMA EQU 7 ; bit test for end of DMA
iDMAR EQU $40 ; DMA Request
bDMAR EQU 6 ; bit test for DMA Req
iPERR EQU $20 ; Parity Error
iIREQ EQU $10 ; Interrupt Request
bIREQ EQU 4 ; bit test for interrupt
iPM EQU $08 ; Phase Match
bPM EQU 3 ; bit test for Phase Match
iBERR EQU $04 ; Bus Error
ATN EQU $02 ; *ATN
ACK EQU $01 ; *ACK
bACK EQU 0 ; bit test for ACK
sDMAtx EQU $50 ; DMA Transmit Start (WRITE)
sIDR EQU $60 ; Data input register (READ)
sTDMArx EQU $60 ; Start Target DMA receive (WRITE)
sRESET EQU $70 ; Reset Parity/Interrupt (READ)
sIDMArx EQU $70 ; Start Initiator DMA receive (WRITE)
;----------
; VIA2 register definitions
;----------
; === VIA2 BUFFER A ===
v2IRQ1 EQU 0 ; slot 1 interrupt
v2IRQ2 EQU 1 ; slot 2 interrupt
v2IRQ3 EQU 2 ; slot 3 interrupt
v2IRQ4 EQU 3 ; slot 4 interrupt
v2IRQ5 EQU 4 ; slot 5 interrupt
v2IRQ6 EQU 5 ; slot 6 interrupt
v2RAM0 EQU 6 ; RAM size bit 0
v2RAM1 EQU 7 ; RAM size bit 1
; === VIA2 BUFFER B ===
v2CDis EQU 0 ; cache disable (when 1) <3.3>
v2BusLk EQU 1 ; Bus lockout
v2PowerOff EQU 2 ; soft power off signal (when 0)
vFC3 EQU 3 ; PMMU FC3 indicator
v2TM1A EQU 4 ; bit for NUBus
v2TM0A EQU 5 ; and another
v2SndExt EQU 6 ; 1 = internal speaker, 0 = ext. audio
v2VBL EQU 7 ; pseudo VBL signal
IF onMac THEN
;=======================================;
; Macintosh Plus Hardware Information ;
;=======================================;
hwCfgBits EQU hwCmSCSI++hwCmClock
machine EQU 0
rom85Bits EQU $7F ; New ROMs, No Power Off.
; === Interrupt Masks ===
hiIntMask EQU $0300 ; programmer switch only
sccIntMask EQU $0200 ; SCC interrupt Level <1.5>
sccEnblMask EQU $F9FF ; mask to enable SCC interrupts
viaIntMask EQU $0100 ; mask for VIA (and VBL) interrupts
loIntMask EQU $0100
; === VIA1 BUFFER A ===
vSound EQU $7 ; sound volume bits (0..2)
vSndPg2 EQU 3 ; select sound page 2 if 0
vOverlay EQU 4 ; overlay bit (overlay when 1)
vHeadSel EQU 5 ; head select line for Sony
vPage2 EQU 6 ; select video page 2 if 0
vSCCWrReq EQU 7 ; SCC write/request line
vAOut EQU (vSound)|\ ; sound volume bits are outputs
(1<<vSndPg2)|\ ; sound page 2 select is an output
(1<<vOverlay)|\ ; overlay bit is an output
(1<<vHeadSel)|\ ; head select line is an output
(1<<vPage2)|\ ; video page 2 select is an output
(0<<vSCCWrReq) ; SCC write/request line is an input
vAInit EQU (1)|\ ; sound volume level initially 1
(1<<vSndPg2)|\ ; main sound buffer selected
(0<<vOverlay)|\ ; overlay is turned off
(1<<vHeadSel)|\ ; head select line is an output
(1<<vPage2)|\ ; main screen buffer selected
(0<<vSCCWrReq) ; SCC write/request line is an input
vBufD EQU vBufA ; disk head select is buffer A
; === VIA1 BUFFER B ===
vRTCData EQU 0 ; real time clock data
vRTCClk EQU 1 ; real time clock clock pulses
vRTCEnb EQU 2 ; clock enable (0 for enable)
vSW EQU 3 ; mouse switch (0 when down)
vX2 EQU 4 ; mouse X level
vY2 EQU 5 ; mouse Y level
vH4 EQU 6 ; horizontal sync
vSndEnb EQU 7 ; /sound enable (reset when 1)
vBOut EQU (1<<vRTCData)|\ ; real time clock data initially an output
(1<<vRTCClk)|\ ; real time clock clock is an output
(1<<vRTCEnb)|\ ; clock enable is an output
(0<<vSW)|\ ; mouse switch is an input
(0<<vX2)|\ ; mouse X level is an input
(0<<vY2)|\ ; mouse Y level is an input
(0<<vH4)|\ ; horizontal sync is an input
(1<<vSndEnb) ; sound enable is an output
vBInit EQU (1<<vRTCData)|\ ; real time clock data is one
(1<<vRTCClk)|\ ; real time clock clock is high
(1<<vRTCEnb)|\ ; clock initially disabled
(0<<vSW)|\ ; mouse switch is an input
(0<<vX2)|\ ; mouse X level is an input
(0<<vY2)|\ ; mouse Y level is an input
(0<<vH4)|\ ; horizontal sync is an input
(1<<vSndEnb) ; sound is disabled
vBufM EQU vBufB ; mouse state is buffer B
; === Hardware Base Addresses ===
PhaseRead EQU $F00000 ; Phase read address
VBase EQU $EFE1FE ; VIA base address
AVBufA EQU VBase+vBufA ; VIA buffer A
AVBufB EQU VBase+vBufB ; VIA buffer B
AVBufM EQU VBase+vBufM ; VIA buffer with mouse button bit
SCCRBase EQU $9FFFF8 ; SCC base read address
SCCWBase EQU $BFFFF9 ; SCC base write address
sccWrite EQU SCCWBase-SCCRBase ; general offset for write from read
SCSIRd EQU $580000 ; base addr SCSI interface - READ
SCSIWr EQU $580001 ; base addr SCSI interface - WRITE
wrOffs EQU SCSIWr-SCSIRd ; write addrs are +1 to the read base
SoundLow EQU $3FFD00 ; sound buffer start address
snd2MemTop EQU $300 ; SoundLow to Memtop
PWMBuffer EQU $3FFD01 ; PWM bytes are low bytes
pwm2MemTop EQU $2FF ; PWMBuffer to MemTop
; === Video Parameters ===
ScreenLow EQU $3FA700 ; top of screen screen address
scrn2MemTop EQU $5900 ; ScreenBase to Memtop
; === System Software Information ===
bufWorldSize EQU scrn2MemTop ; total size of the BufPtr world
seRegs EQU $3FFC80 ; Sys Error Regs w/o Overlay
ELSEIF onMacPP THEN
;=======================================;
; Macintosh SE Hardware Information ;
;=======================================;
hwCfgBits EQU hwCmSCSI++hwCmClock++hwCmADB
machine EQU 2
rom85Bits EQU $7F ; New ROMs, No Power Off.
; === Interrupt Masks ===
hiIntMask EQU $0300 ; programmer switch only
sccIntMask EQU $0200 ; SCC interrupt Level <1.5>
sccEnblMask EQU $F9FF ; mask to enable SCC interrupts
viaIntMask EQU $0100 ; mask for VIA (and VBL) interrupts
loIntMask EQU $0100
; === VIA1 BUFFER A ===
vSound EQU $7 ; sound volume bits (0..2)
vSync EQU 3 ; Synchronous modem
vDriveSel EQU 4 ; int drive select (lower drive when 1)
vHeadSel EQU 5 ; head select line for Sony
vPage2 EQU 6 ; select video page 2 if 0
vSCCWrReq EQU 7 ; SCC write/request line
vAOut EQU (vSound)|\ ; sound volume bits are outputs
(1<<vSync)|\ ; Synchronous modem is an output
(1<<vDriveSel)|\ ; int drive select is an output
(1<<vHeadSel)|\ ; head select line is an output
(1<<vPage2)|\ ; video page 2 select is an output
(0<<vSCCWrReq) ; SCC write/request line is an input
vAInit EQU (1)|\ ; sound volume level initially 1
(1<<vSync)|\ ; Synchronous modem disabled (active low)
(0<<vDriveSel)|\ ; upper floppy drive selected
(1<<vHeadSel)|\ ; head select line is an output
(1<<vPage2)|\ ; main screen buffer selected
(0<<vSCCWrReq) ; SCC write/request line is an input
vBufD EQU vBufA ; disk head select is buffer A
; === VIA1 BUFFER B ===
vRTCData EQU 0 ; real time clock data
vRTCClk EQU 1 ; real time clock clock pulses
vRTCEnb EQU 2 ; clock enable (0 for enable)
vFDBInt EQU 3 ; Front Desk bus interrupt
vFDesk1 EQU 4 ; Front Desk bus state bit 0
vFDesk2 EQU 5 ; Front Desk bus state bit 1
vSCSIMask EQU 6 ; SCSI IRQ mask
vH4 EQU vSCSIMask ; SCSI IRQ mask (was horiz. sync)
vSndEnb EQU 7 ; /sound enable (reset when 1)
vBOut EQU (1<<vRTCData)|\ ; real time clock data initially an output
(1<<vRTCClk)|\ ; real time clock clock is an output
(1<<vRTCEnb)|\ ; clock enable is an output
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
(1<<vFDesk1)|\ ; FDB state bit 0 is an output
(1<<vFDesk2)|\ ; FDB state bit 1 is an output
(1<<vSCSIMask)|\ ; SCSI IRQ mask is an output
(1<<vSndEnb) ; sound enable is an output
vBInit EQU (1<<vRTCData)|\ ; real time clock data is one
(1<<vRTCClk)|\ ; real time clock clock is high
(1<<vRTCEnb)|\ ; clock initially disabled
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
(1<<vFDesk1)|\ ; FDB state bit 0 is initially state 3
(1<<vFDesk2)|\ ; FDB state bit 1 is initially state 3
(1<<vSCSIMask)|\ ; SCSI IRQ mask is initially masked
(1<<vSndEnb) ; sound is disabled
; === Hardware Base Addresses ===
VBase EQU $EFE1FE ; VIA base address
AVBufA EQU VBase+vBufA ; VIA buffer A
AVBufB EQU VBase+vBufB ; VIA buffer B
SCCRBase EQU $9FFFF8 ; SCC base read address
SCCWBase EQU $BFFFF9 ; SCC base write address
sccWrite EQU SCCWBase-SCCRBase ; general offset for write from read
SCSIRd EQU $5FF000 ; base addr SCSI interface - READ
SCSIWr EQU $5FF001 ; base addr SCSI interface - WRITE
MacSCSIBase EQU $5FF000 ; base addr SCSI READ interface
MacSCSIDMA EQU $5FF200 ; base addr SCSI DMA
MacSCSIHsk EQU $5FF200 ; base addr SCSI handshake
wrOffs EQU SCSIWr-SCSIRd ; write addrs are +1 to the read base
SoundLow EQU $3FFD00 ; sound buffer start address
snd2MemTop EQU $300 ; SoundLow to Memtop
PWMBuffer EQU $3FFD01 ; PWM bytes are low bytes
pwm2MemTop EQU $2FF ; PWMBuffer to MemTop
; === Video Parameters ===
ScreenLow EQU $3FA700 ; top of screen screen address
scrn2MemTop EQU $5900 ; ScreenBase to Memtop
; === System Software Information ===
bufWorldSize EQU scrn2MemTop ; total size of the BufPtr world
seRegs EQU $3FFC80 ; Sys Error Regs w/o Overlay
ELSEIF onHcMac THEN
;===========================================;
; Macintosh Portable Hardware Information ;
;===========================================;
hwCfgBits EQU hwCmSCSI++hwCmClock++hwCmADB++hwCbPwrMgr ; <2.8>
machine EQU 3
rom85Bits EQU $7F ; New ROMs, No Power Off.
; === Interrupt Masks ===
hiIntMask EQU $0300 ; programmer switch only
sccIntMask EQU $0200 ; SCC interrupt Level <1.5>
sccEnblMask EQU $F9FF ; mask to enable SCC interrupts
viaIntMask EQU $0100 ; mask for VIA (and VBL) interrupts
loIntMask EQU $0100
; === VIA1 BUFFER A ===
; 68000 <-> PowerMgr data bus
vAIn EQU $00 ; VBufA output bits (all inputs)
vAOut EQU $FF ; VBufA output bits (all outputs)
vAInit EQU $00 ; VBufA initial values
; === VIA1 BUFFER B ===
vPMreq EQU 0 ; Power manager handshake request
vPMack EQU 1 ; Power manager handshake acknowledge
vTestJ EQU 2 ; Test jumper
vSync EQU 3 ; Synchronous modem
vDriveSel EQU 4 ; int drive select (lower drive when 1)
vHeadSel EQU 5 ; head select line for Sony
vStereo EQU 6 ; Stereo sound enable
vSCCWrReq EQU 7 ; SCC write/request line (input)
vSndEnb EQU 7 ; /sound enable (reset when 1) (output)
vBOut EQU (1<<vPMreq)|\ ; Power mgr handshake request is an output
(0<<vPMack)|\ ; Power mgr handshake acknowledge is an input
(0<<vTestJ)|\ ; Test jumper is an input
(1<<vSync)|\ ; Synchronous modem is an output
(1<<vDriveSel)|\ ; int drive select is an output
(1<<vHeadSel)|\ ; head select line is an output
(0<<vStereo)|\ ; Stereo sound detect is an input
(1<<vSndEnb) ; sound enable is an output
vBInit EQU (1<<vPMreq)|\ ; Power mgr handshake not requesting
(1<<vPMack)|\ ; Power mgr handshake acknowledge is an input
(1<<vTestJ)|\ ; Test jumper is an input
(1<<vSync)|\ ; Synchronous modem disabled (active low)
(1<<vDriveSel)|\ ; lower floppy drive selected
(0<<vHeadSel)|\ ; head select line is an output
(1<<vStereo)|\ ; Stereo sound detect is an input
(1<<vSndEnb) ; sound is disabled
vBufD EQU vBufB ; disk head select is buffer B
; === Hardware Base Addresses ===
VBase EQU $F70000 ; VIA base address
AVBufA EQU VBase+vBufA ; VIA buffer A
AVBufB EQU VBase+vBufB ; VIA buffer B
SCCRBase EQU $FD0000 ; SCC base read address
SCCWBase EQU $FD8000 ; SCC base write address
sccWrite EQU SCCWBase-SCCRBase ; general offset for write from read
SCSIRd EQU $F90000 ; base address of SCSI interface - READ
SCSIWr EQU $F90001 ; base address of SCSI interface - WRITE
MacSCSIBase EQU $F90000 ; base address of SCSI READ interface
MacSCSIDMA EQU $F90200 ; base address of SCSI DMA
MacSCSIHsk EQU $F90200 ; base address of SCSI handshake
wrOffs EQU SCSIWr-SCSIRd ; write addrs are +1 to the read base
SndBase EQU $FB0000 ; sound chip's base address
MapperBase EQU $FC0000 ; Mapper RAM base address
RAMconfigBase EQU $FE0200 ; Internal/external RAM control register
RAMconfigInit EQU $0006 ; Init test register <v2.6>
; === Video Parameters ===
ScreenLow EQU $FA8000 ; top of screen screen address
hcVideoSize EQU $8000 ; 32k of video memory
HcVideoStart EQU ScreenLow
HcVideoEnd EQU HcVideoStart+hcVideoSize
NTSCMaxX EQU 512 ; NTSC output is narrow
NTSCOffset EQU 8 ; and centered
LCDmode EQU 0 ; Normal built in screen
Mac2mode EQU 1 ; Custom screen for Mac2
NTSCmode EQU 2 ; NTSC output
; === System Software Information ===
snd2MemTop EQU $300 ; SoundLow to Memtop
pwm2MemTop EQU $2FF ; PWMBuffer to MemTop
bufWorldSize EQU snd2MemTop ; total size of the BufPtr world
seRegs EQU $0C30 ; offset to Sys Error Regs w/o Overlay
ELSEIF onMac16 THEN
;===================================================;
; Universal 16 bit Macintosh Hardware Information ;
;===================================================;
; === Interrupt Masks ===
hiIntMask EQU $0300 ; programmer switch only
sccIntMask EQU $0200 ; SCC interrupt Level <1.5>
sccEnblMask EQU $F9FF ; mask to enable SCC interrupts
viaIntMask EQU $0100 ; mask for VIA (and VBL) interrupts
loIntMask EQU $0100
; === VIA1 BUFFER A ===
vSound EQU $7 ; sound volume bits (0..2)
vSndPg2 EQU 3 ; select sound page 2 if 0
;vSync EQU 3 ; Synchronous modem
vOverlay EQU 4 ; overlay bit (overlay when 1)
;vDriveSel EQU 4 ; int drive select (lower drive when 1)
;vHeadSel EQU 5 ; head select line for Sony
vPage2 EQU 6 ; select video page 2 if 0
;vSCCWrReq EQU 7 ; SCC write/request line
; === VIA1 BUFFER B ===
vRTCData EQU 0 ; real time clock data
vRTCClk EQU 1 ; real time clock clock pulses
vRTCEnb EQU 2 ; clock enable (0 for enable)
vSW EQU 3 ; mouse switch (0 when down)
vFDBInt EQU 3 ; Front Desk bus interrupt
vX2 EQU 4 ; mouse X level
vFDesk1 EQU 4 ; Front Desk bus state bit 0
vY2 EQU 5 ; mouse Y level
vFDesk2 EQU 5 ; Front Desk bus state bit 1
vH4 EQU 6 ; horizontal sync
vSCSIMask EQU 6 ; SCSI IRQ mask
vSndEnb EQU 7 ; /sound enable (reset when 1)
vPMreq EQU 0 ; Power manager handshake request
vPMack EQU 1 ; Power manager handshake acknowledge
vTestJ EQU 2 ; Test jumper
;vSync EQU 3 ; Synchronous modem
;vDriveSel EQU 4 ; int drive select (lower drive when 1)
;vHeadSel EQU 5 ; head select line for Sony
vStereo EQU 6 ; Stereo sound enable
;vSCCWrReq EQU 7 ; SCC write/request line (input)
; === VIA1 BUFFER A/B ===
vSync EQU 3 ; Synchronous modem <3.1>
vDriveSel EQU 4 ; int drive select (lower drive when 1) <3.1>
vHeadSel EQU 5 ; head select line for Sony <3.1>
vSCCWrReq EQU 7 ; SCC write/request line <3.1>
; === Hardware Base Addresses ===
wrOffs EQU 1 ; write addrs are +1 to the read base
; === System Software Information ===
seRegs EQU $0C30 ; offset to Sys Error Regs w/o Overlay
ELSEIF onMac32 THEN
;===================================================;
; Universal 32 bit Macintosh Hardware Information ;
;===================================================;
machine EQU 6 ; for patch file $067C <3.5>
; === Interrupt Masks ===
hiIntMask EQU $0700 ; programmer switch only
pwrOffEnbl EQU $2500 ; mask to allow poweroff interrupts
sccIntMask EQU $0400 ; SCC interrupt level
sccEnblMask EQU $FBFF ; mask to enable SCC interrupts
slotIntMask EQU $0200 ; slot's interrupt level <v1.4><1.9>
viaIntMask EQU $0100 ; VIA1 interrupt level
loIntMask EQU $0100
; === VIA1 BUFFER A ===
vSound EQU $7 ; sound volume bits (0..2) (output)
vTestJ EQU 0 ; Burn In Test jumper (input)
vCpuId0 EQU 1 ; CPU Identification bit 0 (input)
vCpuId1 EQU 2 ; CPU Identification bit 1 (input)
vSync EQU 3 ; Synchronous modem
vOverlay EQU 4 ; overlay bit (overlay when 1)
vCpuId2 EQU 4 ; CPU Identification bit 2
vHeadSel EQU 5 ; head select line for Sony
vRev8Bd EQU 6 ; =0 for rev 8 board
vCpuId3 EQU 6 ; CPU Identification bit 3
vSCCWrReq EQU 7 ; SCC write/request line
; === VIA1 BUFFER B ===
vRTCData EQU 0 ; real time clock data
v0reserved EQU 0 ; reserved bit in Erickson <6>
vRTCClk EQU 1 ; real time clock clock pulses
v1reserved EQU 1 ; reserved bit in Erickson <6>
vRTCEnb EQU 2 ; clock enable (0 for enable)
v2reserved EQU 2 ; reserved bit in Erickson <6>
vFDBInt EQU 3 ; Front Desk bus interrupt
xcvrsesbit EQU 3 ; Egret transceiver session bit <6>
vFDesk1 EQU 4 ; Front Desk bus state bit 0
viafullbit EQU 4 ; Egret via full bit <6>
vFDesk2 EQU 5 ; Front Desk bus state bit 1
syssesbit EQU 5 ; Egret system session bit <6>
vPGCEnb EQU 6 ; Parity Generator/Checker enable (0 for enable)
v6reserved EQU 6 ; reserved bit in Erickson <6>
vPGCErr EQU 7 ; Parity Generator/Checker error (input)
v7reserved EQU 7 ; reserved bit in Erickson <6>
vSndEnb EQU 7 ; /sound enable (reset when 1) (output)
; === Hardware Base Addresses ===
WrOffs EQU 0 ; SCSI write addrs are same as read base
MskIOP1 EQU 1 ; IOP 1 (SWIM) is level 1 interrupt
MskVIA1 EQU 1 ; VIA 1 is level 1
MskADB EQU 1 ; ADB is level 1
Msk60Hz EQU 1 ; 60 Hz is level 1
MskSCSI EQU 2 ; SCSI is level 2
MskSound EQU 2 ; sound is level 2 <4.5>
MskSlots EQU 2 ; slots are level 2 interrupts
MskRTC EQU 3 ; RTC is level 3
MskIOP0 EQU 4 ; IOP 0 (& SCC chip) is level 4
MskPwrOff EQU 6 ; Poweroff button is level 6
MskNMI EQU 7 ; NMI switch is level 7
; === System Software Information ===
snd2MemTop EQU $300 ; SoundLow to Memtop
pwm2MemTop EQU $2FF ; PWMBuffer to MemTop
bufWorldSize EQU snd2MemTop ; total size of the BufPtr world
seRegs EQU $0C30 ; offset to Sys Error Regs w/o Overlay
ELSEIF onHafMac THEN
;===================================;
; Mac IIci Hardware Information ;
;===================================;
machine EQU 6
; === Interrupt Masks ===
hiIntMask EQU $0700 ; programmer switch only
pwrOffEnbl EQU $2500 ; mask to allow poweroff interrupts
sccIntMask EQU $0400 ; SCC interrupt level
sccEnblMask EQU $FBFF ; mask to enable SCC interrupts
via2IntMask EQU $0200 ; VIA2 interrupt level <v1.4><1.9>
slotIntMask EQU via2IntMask ; slot's interrupt level <v1.4><1.9>
viaIntMask EQU $0100 ; VIA1 interrupt level
loIntMask EQU $0100
; === VIA1 BUFFER A ===
vSound EQU $7 ; sound volume bits (0..2) (output)
vTestJ EQU 0 ; Burn In Test jumper (input)
vCpuId0 EQU 1 ; CPU Identification bit 0 (input)
vCpuId1 EQU 2 ; CPU Identification bit 1 (input)
vSync EQU 3 ; Synchronous modem
vCpuId2 EQU 4 ; CPU Identification bit 2
vHeadSel EQU 5 ; head select line for Sony
vCpuId3 EQU 6 ; CPU Identification bit 3
vSCCWrReq EQU 7 ; SCC write/request line
vAOut EQU (vSound)|\ ; sound volume bits are outputs
(1<<vSync)|\ ; Synchronous modem is an output
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
(1<<vHeadSel)|\ ; head select line is an output
(0<<vCpuId3)|\ ; CPU Identification bit 3 is an input
(0<<vSCCWrReq) ; SCC write/request line is an input
vAInit EQU (1)|\ ; sound volume level initially 1
(0<<vSync)|\ ; Synchronous modem disabled (active high)
(0<<vCpuId2)|\ ; CPU Identification bit 2 is an input
(1<<vHeadSel)|\ ; head select line is an output
(0<<vCpuId3)|\ ; CPU Identification bit 3 is an input
(0<<vSCCWrReq) ; SCC write/request line is an input
vBufD EQU vBufA ; disk head select is buffer A
; === VIA1 BUFFER B ===
vRTCData EQU 0 ; real time clock data
vRTCClk EQU 1 ; real time clock clock pulses
vRTCEnb EQU 2 ; clock enable (0 for enable)
vFDBInt EQU 3 ; Front Desk bus interrupt
vFDesk1 EQU 4 ; Front Desk bus state bit 0
vFDesk2 EQU 5 ; Front Desk bus state bit 1
vPGCEnb EQU 6 ; Parity Generator/Checker enable (0 for enable)
vPGCErr EQU 7 ; Parity Generator/Checker error (input)
vSndEnb EQU 7 ; /sound enable (reset when 1) (output)
vBOut EQU (1<<vRTCData)|\ ; real time clock data initially an output
(1<<vRTCClk)|\ ; real time clock clock is an output
(1<<vRTCEnb)|\ ; clock enable is an output
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
(1<<vFDesk1)|\ ; FDB state bit 0 is an output
(1<<vFDesk2)|\ ; FDB state bit 1 is an output
(1<<vPGCEnb)|\ ; PGC enable is an output
(1<<vSndEnb) ; sound enable is an output
vBInit EQU (1<<vRTCData)|\ ; real time clock data is one
(1<<vRTCClk)|\ ; real time clock clock is high
(1<<vRTCEnb)|\ ; clock initially disabled
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
(1<<vFDesk1)|\ ; FDB state bit 0 is initially state 3
(1<<vFDesk2)|\ ; FDB state bit 1 is initially state 3
(1<<vPGCEnb)|\ ; Parity Checking is initially disabled
(1<<vSndEnb) ; sound is disabled
; === RBV BUFFER B ===
RvBInit EQU (1<<RvCDis)|\ ; cache disabled <3.3>
(1<<RvBusLk)|\ ; Bus unlocked
(1<<RvPowerOff)|\ ; Power on
(1<<RvCFlush)|\ ; don't flush cache
(0<<RvTM1A)|\ ; NuBus timeout bits are inputs
(0<<RvTM0A)|\ ; NuBus timeout bits are inputs
(0<<RvSndExt)|\ ; sound/speaker mode is an input
(1<<RvPGCTest) ; generate correct parity
; === Hardware Base Addresses ===
VBase EQU $50F00000 ; VIA base address
AVBufA EQU VBase+vBufA ; VIA buffer A
AVBufB EQU VBase+vBufB ; VIA buffer B
SCCRBase EQU $50F04000 ; SCC base read address
SCCWBase EQU $50F04000 ; SCC base write address
sccWrite EQU SCCWBase-SCCRBase ; general offset for write from read
NewSCSIBase EQU $50F10000 ; rev8 base addr SCSI interface
NewSCSIDMA EQU $50F12000 ; rev8 base addr SCSI DMA (corrected)
NewSCSIHsk EQU $50F06000 ; rev8 base addr SCSI handshake
MacSCSIBase EQU $50F10000 ; base addr SCSI interface
MacSCSIDMA EQU $50F12000 ; base addr SCSI DMA
MacSCSIHsk EQU $50F06000 ; base addr SCSI handshake
wrOffs EQU 0 ; write addrs are same as read base
SndBase EQU $50F14000 ; sound chip's base address
; === Video Parameters ===
RBVBase EQU $50F26000 ; RBV base address <v1.4><1.4>
vDACBase EQU $50F24000 ; base of clut
; === System Software Information ===
snd2MemTop EQU $300 ; SoundLow to Memtop
pwm2MemTop EQU $2FF ; PWMBuffer to MemTop
bufWorldSize EQU snd2MemTop ; total size of the BufPtr world
seRegs EQU $0C30 ; offset to Sys Error Regs w/o Overlay
ELSEIF onNuMac THEN
;=======================================================;
; Macintosh II, IIx, IIcx, SE30 Hardware Information ;
;=======================================================;
hwCfgBits EQU hwCmSCSI++hwCmClock++hwCmFPU++hwCmMMU++hwCmADB
machine EQU 1
rom85Bits EQU $3F ; New ROMs, Power Off ability.
; === Interrupt Masks ===
hiIntMask EQU $0700 ; programmer switch only
pwrOffEnbl EQU $2500 ; mask to allow poweroff interrupts
sccIntMask EQU $0400 ; SCC interrupt level
sccEnblMask EQU $FBFF ; mask to enable SCC interrupts
via2IntMask EQU $0200 ; VIA2 interrupt level <v1.4><1.9>
slotIntMask EQU via2IntMask ; slot's interrupt level <v1.4><1.9>
viaIntMask EQU $0100 ; VIA1 interrupt level
loIntMask EQU $0100
; === VIA1 BUFFER A ===
vSound EQU $7 ; sound volume bits (0..2) (output)
vSync EQU 3 ; Synchronous modem
vOverlay EQU 4 ; overlay bit (overlay when 1)
vHeadSel EQU 5 ; head select line for Sony
vRev8Bd EQU 6 ; =0 for rev 8 board
vSCCWrReq EQU 7 ; SCC write/request line
vAOut EQU (vSound)|\ ; sound volume bits are outputs
(1<<vSync)|\ ; Synchronous modem is an output
(1<<vOverlay)|\ ; overlay bit is an output
(1<<vHeadSel)|\ ; head select line is an output
(0<<vRev8Bd)|\ ; board ID is an input
(0<<vSCCWrReq) ; SCC write/request line is an input
vAInit EQU (1)|\ ; sound volume level initially 1
(0<<vSync)|\ ; Synchronous modem disabled (active high)
(0<<vOverlay)|\ ; overlay is turned off
(0<<vHeadSel)|\ ; head select line is an output
(0<<vRev8Bd)|\ ; board ID is an input
(0<<vSCCWrReq) ; SCC write/request line is an input
vBufD EQU vBufA ; disk head select is buffer A
; === VIA1 BUFFER B ===
vRTCData EQU 0 ; real time clock data
vRTCClk EQU 1 ; real time clock clock pulses
vRTCEnb EQU 2 ; clock enable (0 for enable)
vFDBInt EQU 3 ; Front Desk bus interrupt
vFDesk1 EQU 4 ; Front Desk bus state bit 0
vFDesk2 EQU 5 ; Front Desk bus state bit 1
; EQU 6 ; unused
vSndEnb EQU 7 ; /sound enable (reset when 1) (output)
vBOut EQU (1<<vRTCData)|\ ; real time clock data initially an output
(1<<vRTCClk)|\ ; real time clock clock is an output
(1<<vRTCEnb)|\ ; clock enable is an output
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
(1<<vFDesk1)|\ ; FDB state bit 0 is an output
(1<<vFDesk2)|\ ; FDB state bit 1 is an output
(1<<vSndEnb) ; sound enable is an output
vBInit EQU (1<<vRTCData)|\ ; real time clock data is one
(1<<vRTCClk)|\ ; real time clock clock is high
(1<<vRTCEnb)|\ ; clock initially disabled
(0<<vFDBInt)|\ ; Front Desk bus interrupt is an input
(1<<vFDesk1)|\ ; FDB state bit 0 is initially state 3
(1<<vFDesk2)|\ ; FDB state bit 1 is initially state 3
(0<<vSndEnb) ; sound is enabled
; === VIA2 BUFFER A ===
v2AOut EQU (0<<v2IRQ1)|\ ; slot 1 interrupt is an input
(0<<v2IRQ2)|\ ; slot 2 interrupt is an input
(0<<v2IRQ3)|\ ; slot 3 interrupt is an input
(0<<v2IRQ4)|\ ; slot 4 interrupt is an input
(0<<v2IRQ5)|\ ; slot 5 interrupt is an input
(0<<v2IRQ6)|\ ; slot 6 interrupt is an input
(1<<v2RAM0)|\ ; ram size bit 0 is an output
(1<<v2RAM1) ; ram size bit 1 is an output
v2AInit EQU (0<<v2IRQ1)|\ ; slot 1 interrupt is an input
(0<<v2IRQ2)|\ ; slot 2 interrupt is an input
(0<<v2IRQ3)|\ ; slot 3 interrupt is an input
(0<<v2IRQ4)|\ ; slot 4 interrupt is an input
(0<<v2IRQ5)|\ ; slot 5 interrupt is an input
(0<<v2IRQ6)|\ ; slot 6 interrupt is an input
(0<<v2RAM0)|\ ; or ram size bit 0 with 0
(0<<v2RAM1) ; or ram size bit 1 with 0
; === VIA2 BUFFER B ===
v2BOut EQU (0<<v2CDis)|\ ; cache disabled <3.3>
(0<<v2BusLk)|\ ; Bus unlocked
(0<<v2PowerOff)|\ ; Power on
(0<<vFC3)|\ ; don't flush cache
(0<<v2TM1A)|\ ; NuBus timeout bits are inputs
(0<<v2TM0A)|\ ; NuBus timeout bits are inputs
(0<<v2SndExt)|\ ; sound/speaker mode is an input
(1<<v2VBL) ; 60Hz pseudo VBL output
v2BInit EQU (1<<v2CDis)|\ ; cache disabled (input when not in use) <3.3>
(0<<v2BusLk)|\ ; Bus unlocked (input when not in use)
(1<<v2PowerOff)|\ ; Power on (input when not in use)
(0<<vFC3)|\ ; don't flush cache (input when not in use)
(0<<v2TM1A)|\ ; NuBus timeout bits are inputs
(0<<v2TM0A)|\ ; NuBus timeout bits are inputs
(0<<v2SndExt)|\ ; sound/speaker mode is an input
(0<<v2VBL) ; 60Hz pseudo VBL output
; === Hardware Base Addresses ===
VBase EQU $50F00000 ; VIA base address
AVBufA EQU VBase+vBufA ; VIA buffer A
AVBufB EQU VBase+vBufB ; VIA buffer B
VBase2 EQU $50F02000 ; VIA2 base address <v1.4>
SCCRBase EQU $50F04000 ; SCC base read address
SCCWBase EQU $50F04000 ; SCC base write address
sccWrite EQU SCCWBase-SCCRBase ; general offset for write from read
NewSCSIBase EQU $50F10000 ; rev8 base addr SCSI interface
NewSCSIDMA EQU $50F12000 ; rev8 base addr SCSI DMA (corrected)
NewSCSIHsk EQU $50F06000 ; rev8 base addr SCSI handshake
MacSCSIBase EQU $50F10000 ; base addr SCSI interface
MacSCSIDMA EQU $50F12000 ; base addr SCSI DMA
MacSCSIHsk EQU $50F06000 ; base addr SCSI handshake
wrOffs EQU 0 ; write addrs are same as read base
SndBase EQU $50F14000 ; sound chip's base address
; === System Software Information ===
snd2MemTop EQU $300 ; SoundLow to Memtop
pwm2MemTop EQU $2FF ; PWMBuffer to MemTop
bufWorldSize EQU snd2MemTop ; total size of the BufPtr world
seRegs EQU $0C30 ; offset to Sys Error Regs w/o Overlay
ENDIF
;----------
; Deep Shit Rectangle info
;----------
dsRectTL EQU (64<<16)+32 ; top left = 64,32
dsRectBR EQU (190<<16)+480 ; bottom right = 190,480
dsRectHei EQU (dsRectBR**$FFFF0000)-(dsRectTL**$FFFF0000)>>16
dsRectLen EQU (dsRectBR**$FFFF)-(dsRectTL**$FFFF)
IF onAnything THEN
;----------
; System Error, ROM Based Debugger Nub, MicroBug Equates
;----------
seVars EQU seRegs ; start of system error data space (wrap city)
seVSize EQU 128 ; # of bytes in space
seD0 EQU seVars ; loc of saved reg D0
seA0 EQU seD0+32 ; loc of saved reg A0
seA7 EQU seA0+28 ; loc of saved reg A7
sePC EQU seA7+4 ; loc of saved PC
seSR EQU sePC+4 ; loc of saved SR
seAccess EQU seSR+2 ; PC address during bus/address error
seCmdSize EQU seAccess+4 ; # of bytes of parameters passed in _debugger call
se000BE EQU seCmdSize+2 ; 8 bytes of bus error info for 68000
seLastVar EQU se000BE+8 ; last var in System Error data space
;-----
; ROM based debugger nub
;-----
rdPort EQU seLastVar ; Number of port currently in use (0 => no link, 1 => A, 2 => B)
rdCode EQU rdPort+2 ; Ptr to code download buffer.
rdAtrap EQU rdCode+4 ; Saved Rom Atrap handler
rdLowTrap EQU rdAtrap+4 ; low value for trap handling
rdHiTrap EQU rdLowTrap+2 ; high value for trap handling
rdResult EQU rdHiTrap+2 ; result of executing down-loaded code, etc. (16 bytes)
rdEnd EQU rdResult+16 ; end of vars
;-----
; Microbug
;-----
; NOTE: Keep mbDotAddr immediately before mBlocAddr
mbBufSize EQU 34
mbBuffer EQU seLastVar ; buffer for input
mbSign EQU mbBuffer+mbBufSize ; ST => negative sign during conversion
mbDotAddr EQU mbSign+2 ; saved address
mBlocAddr EQU mbDotAddr+4 ; saved location
;----------
; Timing constants
;----------
VIAClockHz EQU 783360 ; VIA clock rate is 783360 Hz. <2.8>
nTicks EQU VIAClockHz/1000 ; VIA timer ticks per msec
oneSecTicks EQU 60 ; ticks, of course
TimeSCSIDB EQU $0B24 ; DBRAs & SCSI access per millisecond <1.9>
ramChk EQU 1024 ; Amount of memory tested for stack.
ENDIF
ENDIF ; {HWNonPortable}
ENDIF ; ...already included
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