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https://github.com/elliotnunn/mac-rom.git
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9546 lines
404 KiB
R
9546 lines
404 KiB
R
/*
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File: DeclData.r
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Contains: Shared resource declarations for DeclData components.
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Copyright: © 1989-1994 by Apple Computer, Inc., all rights reserved.
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Change History (most recent first):
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<SM28> 1/20/94 PN Remove the remaining slot resource types "_CPUMac20" to fix DAFB
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video display.
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<SM27> 1/4/94 PN Add the rest of support for more CSC panels from KAOS.
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<SM26> 12/14/93 PN Obsolete the CPUMac020 resources.
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<SM25> 11/10/93 fau Update from SuperMunggio <SMG2>.
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<SMG2> 10/27/93 fau Added the ATIDir to the SuperDirectory.
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<SM24> 11/9/93 KW added some srsrc's for stp machines
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<SM23> 08-16-93 jmp Eliminated an extraneous Wombat/WLCD board sRsrc entry.
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<SM22> 8/12/93 KW adding two more smurf wombats
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<SM21> 8/11/93 KW adding some srsrc for a few more smurf machines
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<SM20> 08-06-93 jmp Added to the list of timinginfo constants, which is not complete
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yet, but is good enough for the Sonora/PDM support.
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<SM19> 08-03-93 jmp Updated the copyright notice and changed the various display
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name strings to the new resolution/vertical refresh rate format
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(i.e., the original Apple display names no longer make sense --
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too many share the same sense codes).
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<18> 6/1/93 IH Add timing info for video modes
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<SM17> 4/5/93 chp Synchronize with Ludwig.
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<SM16> 04-01-93 jmp Removed the reference to SuperMario (SM) in the VendorInfo.
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<SM15> 3/9/93 jmp Updated the rev-level to reflect the fact that SuperMario is
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different from Ludwig.
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<LW6> 3/8/93 fau Changed the SCSITransport DrHw field to be the board resource
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for Cyclone, for lack of a better number.
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<LW5> 3/1/93 DCB Changed typSIM to typeXPT for the transport sRsrc.
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<LW4> 2/24/93 fau Added a sRsrc for the SCSI Transport, as well as typ and cstr
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entries for it.
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<LW3> 2/16/93 fau Changed the name of the HRNTSC names to 512x384/640x480/768x576.
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<SM14> 01-12-93 jmp Added initial support for CSC.
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<SM13> 01-11-93 jmp Compacted the DBLite/Dart video data to now match whatÕs in
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HORROR.
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<SM12> 01-07-93 jmp Added a VideoNames directory for V8-based built-in video.
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<SM11> 12/23/92 RC Added support for running Smurf on Wombat (boxRiscWombat)
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<SM10> 12-10-92 jmp Fixed the DAFB Two-Page and 21" Color Display 8bpp entries for
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Brooktree CLUT/DAC CPUs (i.e., production Quadra 700/900). The
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TimingAdj value was off by one.
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<SM9> 11/2/92 kc Change ObjDir to RsrcDir
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<SM8> 10-29-92 jmp Added support for 33 MHz WLCD.
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<SM7> 10/26/92 HY Added support for LC II boxflag. Defined sRsrc_BdLCII.
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<SM6> 10/19/92 RB Removed more video resources from the LC II (1 Meg) ROM build
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for the LC930
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<SM5> 10-17-92 jmp Needed to the change the 'decl' IDs of various externally
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referenced components.
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<SM4> 10/14/92 RB When building for a 1 Meg LC930 ROM, exclude unused components.
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<SM3> 10/8/92 fau Added separate 2bpp/8bpp parameter structures for Civic-based
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CPU's.
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<SM2> 10/6/92 GDW Fixed missing text.
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<SM1> 10/6/92 GDW New location for ROMLink tool.
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*/
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// <SM18> 8/20/92 AK Removed last part of format block (starting with Rom Length Size.)
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// SMRomImage.r now supplies this. This is a test for ROMLink.
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// <SM17> 8/9/92 CCH Added video support for Quadras with RISC cards.
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// <SM16> 7/29/92 fau Fixed bug in the Civic vidParams for the full-page displays,
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// where I forgot to take the base address out of the data
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// structure. Update the Endeavor M,N and clock select on the
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// Goldfish and Full page displays to use lower M,N. This got rid
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// of the jitter on EVT3 on those displays. Also updated the 2pg
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// monitors to lower M,N values.
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// <SM15> 7/28/92 fau Updated PAL Convolution parameters to be exactly 4x the
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// non-convolved and moved the base to 4096 (from 2048) -- even
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// though 'cause of a bug in Civic, PALConv won't work at 25MHz.
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// Because of that, changed the equivalent PAL spID's for switching
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// between RGB Syncs and PAL Composite syncs to the non-convolved
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// parameters. Added equivalent spID's for NTSC/PAL composite
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// syncs to all vidparams that needed them. Adjusted the serration
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// timing on PAL and some of the vertical timings on NTSC and PAL
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// per the hardware guy (L. Thompson), so that they meet the CCIR
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// spec. Change the name of the equivalent modes from
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// Under/Overscan to 512x384 et.al.
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// <SM14> 07-14-92 jmp (SWC,H47) Changed the ctSeed for the 1-, 2-, and 4-bit fixed
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// CLUTs used for the grayscale LCDs to help fix a QuickDraw bug.
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// InitGDevice calls GetDevPixMap to fill in the device's PixMap,
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// including its CLUT. For fixed devices, it then generates a new
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// ctSeed, which causes problems in IconUtilities because the LCD's
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// CLUT doesn't match the current display mode/depth.
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// (djw,H46) Add sVidAttribute flag to indicate a "built-in"
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// display (fBuiltInDisplay) on all applicable video sRsrc's.
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// (jmp,H45) Added in support to make the DAFB-related DeclData
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// work correctly among Spike, Eclipse, Zydeco, and all Wombat/WLCD
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// CPUs.
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// (jmp,H44) Added support for PAL and NTSC on Wombat.
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// (jmp,H43) Adjusted a number of the DAFBVidParams to be more
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// compatible with Wombat. (In doing this, I have temporarily
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// caused some aesthetically unpleasing artifacts to occur on
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// Spike/Eclipse/Zydeco, but I will fix these problems shortly.)
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// (jmp,H42) Added first-pass support for the Wombat version of
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// DAFB (i.e., add the NSC-8534 clock chip params to the supported
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// progressive scan displays; interlaced displays to follow soon).
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// <SM13> 7/7/92 fau Moved sRsrc_BdWombat20 to the correct location in the resource
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// directory, since the boxflagWombat20 moved from 29 to 52.
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// Corrected some problems in the DAFB video parameters entries
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// that happenned at the <H41> roll-in.
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// <SM12> 6/26/92 fau Changed HSERR parameter on Civic Interlaced displays (to 1/2 of
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// original value). Change clock timing for PAL displays in Civic
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// to a 14.78MHz dot clock per Eric Baden and Larry Thompson
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// request (that is the correct timing, not 14.75). Added
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// composite out support for 12" and 13" displays.
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// <SM11> 6/22/92 mal changed label decldataethernet to decldatasonic
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// <SM10> 6/20/92 ejb Removed all trace of BOMII DSP3210 Driver from DeclData. Its
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// now going to be just a regular ROM resource like the RTMgr.
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// <SM9> 6/19/92 KW (fau,P28) Added support for GoldFish displays switching to
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// composite out. Kludgy, but will go away when we implement a
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// dynamic desktop. RSN...
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// <SM8> 6/18/92 KW (jmp,H41) Eliminated yet even more of the old DAFBVidParams
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// fields.
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// (jmp,H39) Tweaked the 15.6672 MHz Omega-2Õs P value from
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// previous check-in.
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// (jmp,H38) Updated the SonoraVidParams for the Omega-2.
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// (fau,P26) Added video-in configurations for Vesuvio, Kong,
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// Rubik, 19" Display and all VGA families for Civic-based CPU's.
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// <SM7> 6/18/92 RB Changed the entry of the DSP driver (ATT3210) so it won't get
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// opened automatically at PrimaryInit time. The current DSP driver
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// breaks on Cyclone EVT2.
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// <SM6> 6/4/92 KW (jmp,H37) Fixed a few minor typos that prevented some displays
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// form working correctly on REAL Quadra 900/700s (i.e., ones that
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// have Brooktree DACs). (jmp,H36) Compacted the DAFB vidParam
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// tables. (djw,H35) Added secondaryInit to board sRsrc for DBLite
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// and Dartanian. (BG,H34) Changed various Wombat-style BoxFlag
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// references to their new, more descriptive names. (jmp,H33)
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// Eliminated support for the no-vRAM case in V8-based systems.
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// (jmp,H32) Changed the ÒsRsrcZydecoDirÓ name to the more generic
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// ÒsRsrcBFBasedDirÓ (BF=BoxFlag) name. (jmp,H31) Changed the
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// hard-coded values in my last check-in into equates. (jmp,H30)
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// Added real MinorBaseOffsets for the V8-based sResources.
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// (jmp,H29) Just added the SecondaryInit entry to Wombat board
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// sRsrc. (jmp,H28) Took a lot of ÒairÓ out of this file by
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// combining lots of tables that are exactly the same except for
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// their names. Also, conditionally dropped support for Apollo,
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// since this ROM canÕt do it anyway. Conditionally removed the
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// checksumming. (jmp,H26) Did a couple of things for the
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// Sonora-based CPUs: 1) Added a 640x400 mode for the HiRes
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// display, and 2) fixed a problem in the GoldFish 256K of vRAM
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// configuration where only 2bpp is possible but I supporting upto
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// 4bpp.
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// <SM5> 5/21/92 RB Making changes for Cyclone. Moved some changes from Pandora. It
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// seems like Mike should look at this file because Pandora is out
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// of Zync with Horror in Sonora (today). Changed 'The SuperMario
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// ROM' to 'The SM ROM' NEVER have someone else's copyright in ROM
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// !!!
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// <SM4> 5/16/92 kc Roll in Horror and Zydeco Changes. Comments follow:
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// <H27> 4/21/92 SWC Added INCLUDE of PowerPrivEqu.a for PrimaryInit.a.
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// <H26> 04/20/92 jmp Did a couple of things for the Sonora-based CPUs: 1) Added a
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// 640x400 mode for the HiRes display, and 2) fixed a problem in
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// the GoldFish 256K of vRAM configuration where only 2bpp is
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// possible but I supporting upto 4bpp.
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// <H25> 3/17/92 SWC Renamed boxDBLite->boxDBLite25 and boxDBLiteLC->boxDBLite33, and
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// added boxDBLite16 and boxDBLite20 to the lists.
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// <H24> 3/6/92 SWC Added DockingEqu.a to the INCLUDEs list.
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// <H23> 02/19/92 jmp Changed all the Condor references to Wombat.
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// <H22> 01/30/92 jmp Fixed a couple of typoÕs I introduced in <H19>.
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// <H21> 01/29/92 jmp (jmp,Z27) Added two new INCLUDES for GestaltEqu.a and
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// GestaltPrivateEqu.a for the SecondaryInit System fixes.
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// <H20> 01/27/92 jmp (BG,Z26) Added an INCLUDE for IOPrimitiveEqu.a for
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// SecondaryInit.a. Also, cleaned up the vidAttributes fields on
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// the LCD-based sRsrcs.
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// <H19> 01/22/92 jmp (jmp,Z25) Added SecondaryInit entries for Spike & Eclipse as
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// well as for Zydeco.
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// (jmp,Z24) Added an include for ShutDownEqu.a.
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// <H18> 01/14/92 jmp Fixed a problem I introduced during my last check-in (I inserted
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// the RdTPD DAFB vidParams in front of the 19x vidParams, and it
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// should have been the other way around).
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// <H17> 01/11/92 jmp Added rudimentary support for the newly-defined extended sense
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// codes.
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// <H16> 01/07/92 jmp Updated the Brooktree-DAC Timing Adjust value in the Kong and
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// Vesuvio DAFB vidParams due to change <H14> below.
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// <H15> 12/19/91 jmp Added the initial support for Rubik-560 mode for Sonora.
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// <H14> 12/17/91 jmp Updated the Kong/Vesuvio, GoldFish, SuperVGA, and PAL
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// non-convolved tables so that all depths within each
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// configuration share a common base address. Also, tweaked the
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// 19" Display parameters to generate a 60.2 KHz clock rather than
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// a 59.9 KHz clock.
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// <H13> 12/16/91 HJR Added support for Dartanian.
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// <H12> 12/12/91 jmp Added in the rest of the Sonora initial support.
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// <H11> 11/27/91 jmp Started adding support for Sonora.
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// <H10> 11/26/91 jmp Added support for a 640x480 LCD screen as well as 640x400 LCD
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// screen.
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// <H9> 11/25/91 jmp Moved the DAFB vidParams from the functional sRrsrcs to the
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// board sRsrcs -- this significantly reduced the size of this
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// file!
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// <H8> 11/12/91 jmp Added the ÒMac Std GammaÓ table to the VGA and SVGA sRsrcs as
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// requested by MacDTS.
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// <H7> 11/05/91 jmp Added preliminary support for 19" Displays for DAFB-based CPUs.
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// <H6> 11/01/91 jmp We now have two DBLite functional sRsrcs. One is for the
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// developmental black/white-only LCD displays (controller), while
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// the other is for the grayscale LCD controller. Currently, only
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// the black/white sRsrc is used.
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// <H5> 10/31/91 jmp Marketing (Ross Ely) finally admitted that defaulting to the
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// 6500¡K gamma table for Vesuvio & GoldFish was a bad idea, so I
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// am now defaulting to the 9300¡K gamma table on those displays.
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// Yeah!
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// <4> 10/29/91 jmp Added the initial support for super sRsrc directories.
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// <3> 10/24/91 jmp Added the gray-scale (thru 4bpp) mVidParams for DB-Lite and
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// updated the Horror ROM VendorInfo sRsrc.
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// <2> 10/24/91 jmp Updating to Zydeco-TERROR version.
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// ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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// Pre-Horror ROM comments begin here.
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// ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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// <3> 3/31/92 JSM Rolled this file into Reality.
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// <2> 2/11/92 RB Need to include ROMPrivateEqu.a and align a few labels to avoid
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// warnings.
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// <26> 1/22/92 BG Added an INCLUDE for IOPrimitiveEqu.a for SecondaryInit.a.
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// <25> 01/21/92 jmp Added SecondaryInit entries for Spike & Eclipse as well as for
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// Zydeco.
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// <24> 01/20/92 jmp Added an include for ShutDownEqu.a.
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// <23> 01/09/92 jmp Added rudimentary support for the newly-defined extended sense
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// codes.
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// <22> 01/07/92 jmp Updated the Brooktree-DAC Timing Adjust value in the Kong and
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// Vesuvio DAFB vidParams due to change <21> below.
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// <21> 12/17/91 jmp Updated the Kong/Vesuvio, GoldFish, SuperVGA, and PAL
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// non-convolved tables so that all depths within each
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// configuration share a common base address. Also, tweaked the
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// 19Ó Display parameters to generate a 60.2 KHz clock rather than
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// a 59.9 KHz clock.
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// <20> 11/11/91 jmp Added the ÒMac Std GammaÓ table to the VGA and SVGA sRsrcs as
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// requested by MacDTS.
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// <19> 11/05/91 jmp Added preliminary support for 19Ó Displays for DAFB-based CPUs.
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// <18> 10/31/91 jmp Marketing (Ross Ely) finally admitted that defaulting to the
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// 6500¡K gamma table for Vesuvio & GoldFish was a bad idea, so I
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// am now defaulting to the 9300¡K gamma table on those displays.
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// Yeah!
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// <17> 10/03/91 jmp Added a SecondaryInit off the Zydeco board sRsrc. WeÕre doing
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// this to fix any Zydeco-specific System Disk Regatta-related
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// problems.
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// <16> 09/13/91 jmp Added support for 16pp on Rubik displays when only 512K of vRAM
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// is around in preparation for Spike33s.
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// <15> 8/26/91 jmp Added the Zydeco ROM part numbers.
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// <14> 8/26/91 jmp Added support for a Spike33-type box.
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// <13> 8/21/91 jmp Changed all the Eclipse33 references to Zydeco.
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// <12> 8/20/91 jmp Just updated the supported CPU code name list.
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// <11> 8/9/91 jmp Added support to fix a problem with NTSC & PAL family modes
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// where changing the amount of vRAM didnÕt cause DAFBÕs part of
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// PrimaryInit to re-validate the SP_LastConfig pRAM byte.
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// <10> 8/7/91 jmp Added 16bpp support for all applicable DAFB displays.
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// <9> 7/29/91 jmp Added the Eclipse33 (Zydeco) & TIM-LC board sRsrcs.
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// ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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// Pre-Zydeco ROM comments begin here.
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// ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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// <8> 6/29/91 jmp Added the alternate AC842A-compatible timing adjust, horizontal
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// active line, and horizontal front porch DAFB paramters.
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// <7> 6/28/91 jmp Fixed the HFP value in the DAFB VGA parameters, and fixed the
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// TA, HAL, and HFP values in the DAFB SuperVGA parameters.
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// <6> 6/24/91 jmp Added support for 16bpp Vesuvio & RGB Portrait displays.
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// <5> 6/17/91 jmp Reset the base address of NTSC, PAL, SuperVGA, Kong, and
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// Vesuvio. Also, changed the rowbytes of PAL and SuperVGA to be
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// the same as GoldFish.
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// <4> 6/10/91 jmp Had to change the clock parameters for HR & GoldFish on Spike &
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// Eclipse PVT units to eliminate possible jitter.
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// <3> 6/4/91 jmp Made the RGB Portrait name more generic, sinc Apple doesnÕt
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// manufacture one, and pointed the RGB Portrait gamma directory to
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// the HR gamma directory instead of the one used by Vesuvio &
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// GoldFish.
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// <2> 5/22/91 jmp Corrected the flags in the DB-Lite functional sRsrc to reflect
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// the fact that DB-LiteÕs frame buffer is 32-bit addressed.
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// Updated the Apollo, Tim, and DB-Lite functional sRsrcs to
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// contain the fOpenAtStart flag. Added the ROM (surface mount)
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// part numbers for Spike & Eclipse. Eliminated the hardware IDs
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// on the gamma tables so that the strategy for built-in video is
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// again universal (this works because all the current built-in
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// videos that have DACs have similar response curves). Removed
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// the blanking pedestal on all PAL modes because the PAL standard
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// specifies that the black & blanking levels are the same.
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// <1> 5/22/91 jmp Changed name to DeclData.a from DeclDataRBV.a to reflect
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// the fact that this file is used by all built-in videos, not
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// just RBV.
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// <29> 5/15/91 jmp Added DB-Lite support. Also, removed the multi-bit icons and
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// added a new icon for TIM (also used by DB-Lite for now).
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// <28> 5/10/91 jmp Added the 4¥8/8¥24Õs Vesuvio & GoldFish (calibrated) gamma
|
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// tables. Added all the appropriate data to support SuperVGA.
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// <27> 4/26/91 jmp Updated the PAL convolved baseAddr.
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// <26> 4/25/91 jmp Added a preliminary (i.e., un-calibrated) alternate gamma table
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// for Vesuvio & GoldFish. This gamma table is for the the
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// ÒnaturalÓ 9300¡K heat point of those displays.
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// <25> 4/23/91 jmp Eliminated duplicate NTSC parameters.
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// <24> 4/19/91 jmp Cleaned up the NTSC & PAL parameters; several modes were
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// Òfuzzy.Ó Put a 1bpp icon in the board sResource for Eclipse,
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// Spike, TIM, and Apollo. Put in an icon suite for Eclipse &
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// Spike, but am not currently pointing at it. Eliminated gamma
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// tables for NTSC, PAL, and VGA because we donÕt know what kind of
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// displays usersÕ will be hooking up. Pointed Vesuvio & GoldFish
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// at the same (yet uncalibrated) gamma table being used by version
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// 1.2d1 of the 8¥24 card. Finally, moved PrimaryInit to the end
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// of the file so that code-common data (i.e., data shared among
|
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// the Drivers & PrimaryInit) can be declared in the DeclData file
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// itself.
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// <23> 4/16/91 jmp Updated fixed tables for TIM & Apollo.
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// <22> 4/15/91 djw Add spId for functional video sRsrc's video attibutes (a data
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// field) for Tim.
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// <20> 4/4/91 jmp Updated various string names to be consistent across all uses
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// (e.g., made all references to ÒHiResÓ look like ÒHi-ResÓ).
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// <19> 4/1/91 jmp Forgot to mention two other things in previous check-in: 1)
|
|
// Removed support for DAFB 1, and 2) Added R-G-B 6500 & 9300 gamma
|
|
// tables for Vesuvio and GoldFish.
|
|
// <18> 4/1/91 jmp Changed the Monitors cdev name of VGA from ÒVGA DisplayÓ to ÒVGA
|
|
// 640x480Ó for consistency with NTSC & PAL. That is, we only use
|
|
// the term ÒDisplayÓ for monitors we know about; the NTSC, PAL and
|
|
// VGA modes specify industry standards rather than particular
|
|
// display types. Also, added an R-G-B 2.2 (D65) gamma table for
|
|
// interlaced displays; 2.2 is the common value used for NTSC gamma
|
|
// correction, and D65 (6500¡ K) is the heat temperature of the
|
|
// phosphors commonly used in TV (broadcast & reception).
|
|
// <17> 3/18/91 jmp Added in DAFB 2 support. The DAFB 2 data is still
|
|
// conditionalized for now, so we can take it out very easily if we
|
|
// need to. Also, removed some old data from earlier attempts to
|
|
// fix the 1bpp Rubik screen clearing stuff.
|
|
// <16> 3/8/91 jmp Needed to set rowbytes to 512 for FP @ 1, 2, and 4bb so that FPa
|
|
// would actually finti into 512K of vRam. Needed to set rowbytes
|
|
// for PAL @ 1, 2, 4, and 8bpp so that PALa would actuall fit into
|
|
// 512K of vRam. Had to add new mVidParams for PAL convolved modes
|
|
// due to the change in rowbytes for the non-convolved modes.
|
|
// Added a vidName directory for TIM and Apollo.
|
|
// <15> 3/4/91 jmp Fixed problems (bad entries) in RubikÕs inverse gamma table.
|
|
// Fixed problems (bad entries) in HRÕs inverse gamma table.
|
|
// Reduced video refresh counts by -1 across the board. Needed to
|
|
// make real entries for RGB2P and RGBFP (for gamma correction).
|
|
// Used same gamma table for VGA as Rubik (due to similarity in
|
|
// clock rates). Added new gamma table for NTSC & PAL (uncorrect,
|
|
// actually, need to add real one later).
|
|
// <14> 2/25/91 jmp Moved driver directory to its proper place (i.e., according to
|
|
// its sRsrc-ID number). Moved all drivers to the very end of the
|
|
// file. Added support for CPU and Video icons. The gamma tables
|
|
// for RubikRBV & RubikACDC were identical, so I eliminated one of
|
|
// them. Updated the GS video params to reflect the fact that
|
|
// Rubik 1bpp has a 1pixel wide ÒborderÓ at the top (bottom doesnÕt
|
|
// matter since it will be drawn offscreen). Added inverse gamma
|
|
// tables. The 32bpp screen clearing params for GoldFish were
|
|
// incorrect. The 8bpp screen clearing params for the two-page
|
|
// display were incorrect.
|
|
// <13> 2/15/91 jmp Updated NTSC & PAL data to fix ÒdarkeningÓ problem in the
|
|
// full-frame convolved modes. Added support for doing only 4/8bpp
|
|
// in NTSC & PAL convolved modes. This has been conditionalized
|
|
// with CurDAFBDrvrVersion. Needed to INCLUDE
|
|
// 'HardwarePrivateEqu.a' for checking for 33 vs. 25 Mhz CPU
|
|
// operation.
|
|
// <12> 2/12/91 jmp Updated NTSC & PAL data for 4/8bpp convolved (for both FF & ST
|
|
// modes). Added defmBaseOffset to screen clear params. Added in
|
|
// ÒMiscÓ params to video params for ChkMode (in DAFBDriver.a).
|
|
// Fixed the gType id for the Rubik Gamma Table. And updated the
|
|
// GoldFishÕs clock parameters to match the PortraitÕs as per Larry
|
|
// ForsbladÕs latest spec.
|
|
// <11> 2/3/91 jmp Added PAL video and Slot Manager data; commented out 32bpp
|
|
// params. Added in NTSC and PAL ST defmBaseOffsets. Added family
|
|
// names NTSC and PAL video families, as well as video names for
|
|
// each kind of supported display. Added Õ040 CPU family sRsrc. And
|
|
// fixed the ordering of the DoubleExposure sRsrc.
|
|
// <10> 1/31/91 JK Added INCLUDE of SonicEqu.a for Sonic initialization.
|
|
// <9> 1/30/91 jmp Several fixes: Fixed rowbytes (in mVidParams) in 32bpp mode for
|
|
// GoldFish. Added NTSCFF & NTSCST video and Slot Manager data.
|
|
// For now, though, only NTSCST is up, and it is in the upper
|
|
// lefthand corner of the display. Eventually, it will be
|
|
// centered. Also, fixed a problem in the VGA video data (HFP was
|
|
// 10 pixels off in all modes). Finally, doubled rowbytes for
|
|
// 1-8bpp for Rubik displays to fix 1bpp problem: The baseAddr is
|
|
// set 512 bytes back from where QuickDraw thinks it so that none
|
|
// of the 1bpp jitter can be seen.
|
|
// <8> 1/24/91 jmp Added support for extended-sense-line displays, but this a long
|
|
// way from finished.
|
|
// <7> 1/22/91 jmp The RGB versions of the Two-Page and Portrait DAFB vidParam
|
|
// OSLstEntries were out of order.
|
|
// <6> 1/21/91 jmp Incremental change -- added support for monitors that have both
|
|
// RGB and Mono-Only types (for now that means the Portrait and
|
|
// Kong).
|
|
// <5> 1/15/91 jmp Corrected several parameters in the DAFB sVidParams data. Still
|
|
// having problems with 1 bpp mode on Rubik displays.
|
|
// <4> 1/15/91 DAF Added DAFB structures (tons of them - way too many to tag).
|
|
// Many, many, many new structures, and data.
|
|
// <3> 1/9/91 JK Added Sonic Ethernet, Eclipse, and Spike support.
|
|
// <2> 12/11/90 HJR Integration of Rex and Tim video into Terror Project.
|
|
//
|
|
|
|
//
|
|
// The Sixth Generation of the Slot 0 Config ROM image.
|
|
//
|
|
// 0.0 = Simple config ROM ID for Mac II motherboard ROM, no functional sRsrcs.
|
|
// 1.0 = Built-in video for RBV (Mac IIci) hardware.
|
|
// 2.0 = Support for multiple built-in video devices RBV & VISA (Mac LC).
|
|
// 3.0 = Support for even more video (DAFB2, TIM, Apollo, DB-Lite) and SONIC Ethernet.
|
|
// 3.1 = Support for Zydeco (Eclipse33) video (DAFB3).
|
|
// 4.0 = The Horror DeclData.
|
|
// 5.0 = The Ludwig (Cyclone/Tempest/LC930) DeclData.
|
|
// 5.1 = The SuperMario DeclData.
|
|
//
|
|
// This file (which includes a number of other files) is the source of
|
|
// the slot 0 configuration ROM which describes a subset of the motherboard
|
|
// features. Specifically, this version of the config ROM contains the
|
|
// functional slot Resources (sRsrcs) for devices which were previously
|
|
// defined as NuBus additions, and have migrated to the motherboard. This
|
|
// class of devices include video and Ethernet communications, both of
|
|
// which had fully defined Slot Manager interfaces. In this way, these
|
|
// motherboard devices can be accessed in an implementation-independent
|
|
// manner by software that already knows how to use the Slot Manager.
|
|
// Other motherboard devices (serial ports, SCSI, etc.) could be
|
|
// represented as part of slot 0 as well, but these functions are
|
|
// identified to the system in other ways.
|
|
//
|
|
//-------------------------------------------------------------------
|
|
// Supported CPU code name list (to make sense of stray comments):
|
|
//-------------------------------------------------------------------
|
|
// Mac II, IIx, IIcx, SE/30
|
|
// Cobra II -> Aurora -> Aurora25/16 -> Pacific/Atlantic -> IIci
|
|
// F19 -> Zone5 -> IIfx
|
|
// Erickson -> Rafiki -> Hobie Cat -> IIsi
|
|
// Elsie -> Rex -> LC
|
|
//
|
|
// TIM -> PowerBook 170
|
|
// Eclipse -> Quadra 900
|
|
// Spike -> Quadra 700
|
|
// Apollo -> Classic II
|
|
// TIM-LC -> PowerBook 140
|
|
// Eclipse33 -> Zydeco -> Quadra 950
|
|
// DB-Lite -> PowerBook Duo 210/230
|
|
// Spike33 -> Condor -> Wombat/WLCD -> Centris/Quadra 800
|
|
//
|
|
// Vail -> Lego -> LC III
|
|
// Carnation/Carnation3 -> Died
|
|
// TimII -> Dartanian/Monet -> PowerBook 160/180
|
|
//
|
|
// Cyclone ->
|
|
// Tempest ->
|
|
//
|
|
//-------------------------------------------------------------------
|
|
// Hardware code names that pop up in the config ROM code:
|
|
//-------------------------------------------------------------------
|
|
// RBV - non-programmable video hardware in the IIci and IIsi
|
|
// supports the Hi-Res, Portrait, Rubik, and an SE-sized grayscale display
|
|
// VISA - a simple non-programmable video controller in the early Elsie. Never produced.
|
|
// V8 - the replacement for the VISA in the production Elsie with much greater functionality.
|
|
// supports the Hi-Res, Rubik, and VGA displays.
|
|
// JAWS - the single mode flat-panel display controller in the 030-family portables.
|
|
// DAFB - highly-programmable video controller in the Eclipse25/33 and Spike machines,
|
|
// supports all Apple displays including interlaced video.
|
|
// Ariel - the (Brooktree-like) CLUT/DAC in the Elsie/Sonora machines.
|
|
// ACDC - the CLUT/DAC in the DAFB machines (also in the 8¥24/8*24 GC cards).
|
|
// Eagle - the one-bit only controller that is in Apollo machines. It is virtually
|
|
// identical to V8.
|
|
// MSC - the LCD display control for DB-Lite machines.
|
|
// GSC - the LCD grayscale controller for DB-Lites and Dartanians.
|
|
// Sonora - kitchen-sink ASIC that is RBV-like in itÕs programability (or lack there of), but video
|
|
// is just one of itÕs subfunctions.
|
|
// Civic - highly-programmable video controller in the Cyclone CPU(s), similar functionality
|
|
// to that of DAFB, except that it also supports video-in.
|
|
// Sebastian
|
|
// - the CLUT/DAC used by Civic, includes an alpha channel to support video-in.
|
|
//-------------------------------------------------------------------
|
|
// Displays supported by this code (ST=safe title interlaced modes, FF=full frame):
|
|
//-------------------------------------------------------------------
|
|
// Hi-Res (HR) - 640*480, 67Hz refresh, 30.2400MHz dot clock, RGB and Monochrome
|
|
// Hi-Res 400 - 640*400, 67Hz refresh, 30.2400MHz dot clock, RGB and Monochrome
|
|
// Hi-Res MAZ - 704*512, 67Hz refresh, 33.0400MHz dot clock, RGB and Monochrome
|
|
// Rubik (GS) - 512*384, 60Hz refresh, 15.6672MHz dot clock, RGB
|
|
// Rubik-560 - 560*384, 60Hz refresh, 17.2340MHz dot clock, RGB
|
|
// Portrait (FP & RGBFP) - 640*870, 75Hz refresh, 57.2832MHz dot clock, RGB and Monochrome
|
|
// Two-Page (2P & RGB2P) - 1152*870, 75Hz refresh,100.0000MHz dot clock, RGB and Monochrome
|
|
// Goldfish (LP,GF) - 832*624, 75Hz refresh, 57.2832MHz dot clock, RGB
|
|
// VGA - 640*480, 59Hz refresh, 25.1750MHz dot clock, RGB
|
|
// SuperVGA (SVGA) - 800*600, 56Hz refresh, 36.0000MHz dot clock, RGB (VESA)
|
|
// - 800*600, 72Hz refresh, 50.0000MHz dot clock, RGB (VESA)
|
|
// SuperVGA (SxVGA) - 1024x768, 60Hz refresh, 65.0000MHz dot clock, RGB (VESA)
|
|
// - 1024x768, 70Hz refresh, 75.0000MHz dot clock, RGB (VESA)
|
|
// 19" - 1024*768, 75Hz refresh, 60.2400MHz dot clock RGB
|
|
// SE-like - 512*342, 60Hz refresh, ??.????MHz dot clock, Monochrome
|
|
// NTSC_ST - 512*384, 60Hz interlaced refresh, 12.2727MHz dot clock, RGB
|
|
// NTSC_FF - 640*480, 60Hz interlaced refresh, 12.2727MHz dot clock, RGB
|
|
// PAL_ST - 614*460, 50Hz interlaced refresh, 14.7500MHz dot clock, RGB
|
|
// PAL_FF - 768*576, 50Hz interlaced refresh, 14.7500MHz dot clock, RGB
|
|
// GSC_LCD - 640*400, 60Hz psuedo-refresh, active matrix or supertwish, Monochrome to 4bpp.
|
|
// 640x400 LCD - 640x400, 60Hz psuedo-refresh, active matrix or supertwish, RGB.
|
|
// 640x480 LCD - 640x480, 60Hz psuedo-refresh, active matrix or supertwish, RGB.
|
|
//
|
|
|
|
#include "Types.r"
|
|
#include "ROMLink.r"
|
|
|
|
#include "DepVideoEqu.r"
|
|
#include "HardwarePrivateEqu.r"
|
|
#include "InternalOnlyEqu.r"
|
|
#include "Quickdraw.r"
|
|
|
|
//-------------------------------------------------------------
|
|
//
|
|
// Super sRsrc Directory
|
|
//
|
|
// This is the sRsrc directory directory, or super sRsrc
|
|
// directory. It contains entries to all supported
|
|
// sRsrc directories.
|
|
//
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'spdr' (130, "_sRsrcSuperDir") {{
|
|
sRsrcUnknownDir, l{"_sRsrcUnknownDir"}; // Minimal sRsrc dir.
|
|
|
|
#if !LC930
|
|
sRsrcATIDir, a{"_sRsrcATIDir"}; // The ATI-based CPUs directory.
|
|
sRsrcCSCDir, a{"_sRsrcCSCDir"}; // The CSC-based CPUs directory.
|
|
sRsrcCivicDir, a{"_sRsrcCivicDir"}; // The Civic-based CPUs directory.
|
|
sRsrcSonoraDir, a{"_sRsrcSonoraDir"}; // The Sonora-based CPUs directory.
|
|
#endif
|
|
|
|
sRsrcBFBasedDir, l{"_sRsrcBFBasedDir"}; // The BoxFlag-based CPUs directory. <P25>
|
|
}};
|
|
|
|
|
|
//-------------------------------------------------------------
|
|
// Unknown sRsrc Directory
|
|
//
|
|
// This is a minimal sRsrc Directory. This sRsrc
|
|
// directory will only be chosen when the
|
|
// SuperInit is run on an unknown CPU.
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'sdir' (135, "_sRsrcUnknownDir") {{
|
|
sRsrcUnknownBD, l{"_sRsrcUnknownBd"}; // Minimal board sRsrc directory.
|
|
}};
|
|
|
|
|
|
resource 'boar' (140, "_sRsrcUnknownBd") {{
|
|
sRsrcType, l{"_BoardType"}; // Minimal board sRsrc.
|
|
sRsrcName, c{"Unknown Macintosh"};
|
|
BoardId, d{0};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
//-------------------------------------------------------------
|
|
//
|
|
// BoxFlag-based sRsrc Directory
|
|
//
|
|
// This sRsrc Directory supports all Slot-Manager-
|
|
// capable CPUs whose board sRsrcs and functional
|
|
// sRsrcs are/were based on BoxFlag.
|
|
//
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'sdir' (160, "_sRsrcBFBasedDir") {{
|
|
|
|
sRsrc_BdMacII, l{"_sRsrc_BdMacII"}; // Board sResources
|
|
sRsrc_BdMacIIx, l{"_sRsrc_BdMacIIx"};
|
|
sRsrc_BdMacIIcx, l{"_sRsrc_BdMacIIcx"};
|
|
sRsrc_BdMacSE30, l{"_sRsrc_BdMacSE30"};
|
|
sRsrc_BdMacIIci, l{"_sRsrc_BdMacIIci"};
|
|
sRsrc_BdMacIIfx, l{"_sRsrc_BdMacIIfx"};
|
|
sRsrc_BdErickson, l{"_sRsrc_BdErickson"};
|
|
sRsrc_BdElsie, l{"_sRsrc_BdElsie"};
|
|
|
|
#if !LC930
|
|
sRsrc_BdEclipse, l{"_sRsrc_BdEclipse"};
|
|
sRsrc_BdTIM, l{"_sRsrc_BdTIM"};
|
|
sRsrc_BdSpike, l{"_sRsrc_BdSpike"};
|
|
sRsrc_BdApollo, l{"_sRsrc_BdApollo"};
|
|
sRsrc_BdTIMLC, l{"_sRsrc_BdTIM"};
|
|
sRsrc_BdZydeco, l{"_sRsrc_BdZydeco"};
|
|
sRsrc_BdDBLite25, l{"_sRsrc_BdDBLite"};
|
|
sRsrc_BdWombat25, l{"_sRsrc_BdWombat"}; // <H34>
|
|
sRsrc_BdDBLite33, l{"_sRsrc_BdDBLite"};
|
|
sRsrc_BdDartanian, l{"_sRsrc_BdDartanian"};
|
|
sRsrc_BdDartanianLC, l{"_sRsrc_BdDartanian"};
|
|
sRsrc_BdWombat33F, l{"_sRsrc_BdWombat"}; // <H34><H40>
|
|
sRsrc_BdWombat33, l{"_sRsrc_BdWombat"};
|
|
#endif
|
|
|
|
sRsrc_BdLCII, l{"_sRsrc_BdElsie"}; // <SM7>
|
|
|
|
#if !LC930
|
|
sRsrc_BdDBLite16, l{"_sRsrc_BdDBLite"};
|
|
sRsrc_BdDBLite20, l{"_sRsrc_BdDBLite"};
|
|
sRsrc_BdWombat40, l{"_sRsrc_BdWombat"}; // <H34>
|
|
sRsrc_BdWLCD20, l{"_sRsrc_BdWombat"}; // <H34>
|
|
sRsrc_BdWLCD25, l{"_sRsrc_BdWombat"}; // <H34>
|
|
sRsrc_BdWombat20, l{"_sRsrc_BdWombat"};
|
|
sRsrc_BdWombat40F,l{"_sRsrc_BdWombat"};
|
|
|
|
sRsrc_BdRiscQuadra700, l{"_sRsrc_BdSpike"}; // <SM21>
|
|
sRsrc_BdWLCD33, l{"_sRsrc_BdWombat"};
|
|
|
|
sRsrc_BdRiscCentris650, l{"_sRsrc_BdWombat"}; // <SM21>
|
|
|
|
sRsrc_BdRiscQuadra900, l{"_sRsrc_BdEclipse"}; // <SM21>
|
|
sRsrc_BdRiscQuadra950, l{"_sRsrc_BdZydeco"}; // <SM21>
|
|
sRsrc_BdRiscCentris610, l{"_sRsrc_BdWombat"}; // <SM21>
|
|
sRsrc_BdRiscQuadra800, l{"_sRsrc_BdWombat"}; // <SM21>
|
|
sRsrc_BdRiscQuadra610, l{"_sRsrc_BdWombat"}; // <SM22>
|
|
sRsrc_BdRiscQuadra650, l{"_sRsrc_BdWombat"}; // <SM22>
|
|
|
|
|
|
sRsrc_BdSTPQ700, l{"_sRsrc_BdSpike"}; // <SM24>
|
|
sRsrc_BdSTPQ900, l{"_sRsrc_BdEclipse"}; // <SM24>
|
|
sRsrc_BdSTPQ950, l{"_sRsrc_BdZydeco"}; // <SM24>
|
|
sRsrc_BdSTPC610, l{"_sRsrc_BdWombat"}; // <SM24>
|
|
sRsrc_BdSTPC650, l{"_sRsrc_BdWombat"}; // <SM24>
|
|
sRsrc_BdSTPQ610, l{"_sRsrc_BdWombat"}; // <SM24>
|
|
sRsrc_BdSTPQ650, l{"_sRsrc_BdWombat"}; // <SM24>
|
|
sRsrc_BdSTPQ800, l{"_sRsrc_BdWombat"}; // <SM24>
|
|
|
|
#endif
|
|
|
|
//
|
|
// These are the directory entries for RBV-based machines.
|
|
//
|
|
|
|
#if !LC930
|
|
|
|
sRsrc_VidRbvFPa, l{"_sRsrc_VidRbvFPa"}; // Portrait (1,2,4)
|
|
sRsrc_VidRbvGSa, l{"_sRsrc_VidRbvGSa"}; // Rubik (1,2,4,8)
|
|
sRsrc_VidRbvHRa, l{"_sRsrc_VidRbvHRa"}; // High-Res (1,2,4,8)
|
|
sRsrc_VidRbvSEa, l{"_sRsrc_VidRbvSEa"}; // SE (1,2,4,8)
|
|
|
|
sRsrc_VidRbvFPc, l{"_sRsrc_VidRbvFPc"}; // Portrait (1 only)
|
|
sRsrc_VidRbvGSd, l{"_sRsrc_VidRbvGSd"}; // Rubik (1 only)
|
|
sRsrc_VidRbvHRd, l{"_sRsrc_VidRbvHRd"}; // High-Res (1 only)
|
|
sRsrc_VidRbvSEd, l{"_sRsrc_VidRbvSEd"}; // SE (1 only)
|
|
|
|
sRsrc_VidRbvFPb, l{"_sRsrc_VidRbvFPb"}; // Portrait (1,2)
|
|
sRsrc_VidRbvGSb, l{"_sRsrc_VidRbvGSb"}; // Rubik (1,2,4)
|
|
sRsrc_VidRbvHRb, l{"_sRsrc_VidRbvHRb"}; // High-Res (1,2,4)
|
|
sRsrc_VidRbvSEb, l{"_sRsrc_VidRbvSEb"}; // SE (1,2,4)
|
|
|
|
sRsrc_VidRbvGSc, l{"_sRsrc_VidRbvGSc"}; // Rubik (1,2)
|
|
sRsrc_VidRbvHRc, l{"_sRsrc_VidRbvHRc"}; // High-Res (1,2)
|
|
sRsrc_VidRbvSEc, l{"_sRsrc_VidRbvSEc"}; // SE (1,2)
|
|
#endif
|
|
|
|
//
|
|
// These are the directory entries for V8-based machines.
|
|
//
|
|
sRsrc_Vid_V8_GSa, l{"_sRsrc_Vid_V8_GSa"}; // Rubik, 512K VRAM configuration
|
|
sRsrc_Vid_V8_VGAa, l{"_sRsrc_Vid_V8_VGAa"}; // VGA, 512K VRAM configuration
|
|
sRsrc_Vid_V8_HRa, l{"_sRsrc_Vid_V8_HRa"}; // Hi-Res, 512K VRAM configuration
|
|
|
|
sRsrc_Vid_V8_GSb, l{"_sRsrc_Vid_V8_GSb"}; // Rubik, 256K VRAM configuration
|
|
sRsrc_Vid_V8_VGAb, l{"_sRsrc_Vid_V8_VGAb"}; // VGA, 256K VRAM configuration
|
|
sRsrc_Vid_V8_HRb, l{"_sRsrc_Vid_V8_HRb"}; // Hi-Res, 256K VRAM configuration
|
|
|
|
sRsrc_Vid_V8_A2Ema, l{"_sRsrc_Vid_V8_A2Ema"}; // A2 emulation, 512K VRAM configuration
|
|
sRsrc_Vid_V8_A2Emb, l{"_sRsrc_Vid_V8_A2Emb"}; // A2 emulation, 256K VRAM configuration
|
|
// ; all Rubik configs require VRAM
|
|
//
|
|
// DBLite has very simple video capabilites (for now).
|
|
//
|
|
|
|
#if !LC930
|
|
|
|
sRsrc_Vid_GSC_LCD, l{"_sRsrc_Vid_GSC_LCD"}; // 1,2,4 (640x400)
|
|
|
|
//
|
|
// This range is used for the DAFB-based directory entries. Lots of modes, so this is complicated.
|
|
//
|
|
|
|
sRsrc_Vid_DAFB_19a, l{"_sRsrc_Vid_DAFB_19a"}; // 19" (1,2,4)
|
|
sRsrc_Vid_DAFB_19b, l{"_sRsrc_Vid_DAFB_19b"}; // 19" (1,2,4,8)
|
|
|
|
sRsrc_Vid_DAFB_FPa, l{"_sRsrc_Vid_DAFB_FPa"}; // Portrait (1,2,4)
|
|
sRsrc_Vid_DAFB_FPb, l{"_sRsrc_Vid_DAFB_FPb"}; // Portrait (1,2,4,8)
|
|
|
|
sRsrc_Vid_DAFB_GSa, l{"_sRsrc_Vid_DAFB_GSa"}; // Rubik (1,2,4,8)
|
|
sRsrc_Vid_DAFB_GSb, l{"_sRsrc_Vid_DAFB_GSb"}; // Rubik (1,2,4,8,32)
|
|
|
|
sRsrc_Vid_DAFB_2Pa, l{"_sRsrc_Vid_DAFB_2Pa"}; // 2-Page (1,2,4)
|
|
sRsrc_Vid_DAFB_2Pb, l{"_sRsrc_Vid_DAFB_2Pb"}; // 2-Page (1,2,4,8)
|
|
|
|
sRsrc_Vid_DAFB_LPa, l{"_sRsrc_Vid_DAFB_LPa"}; // Goldfish (1,2,4,8)
|
|
sRsrc_Vid_DAFB_LPb, l{"_sRsrc_Vid_DAFB_LPb"}; // Goldfish (1,2,4,8,32)
|
|
|
|
sRsrc_Vid_DAFB_HRa, l{"_sRsrc_Vid_DAFB_HRa"}; // High-Res (1,2,4,8)
|
|
sRsrc_Vid_DAFB_HRb, l{"_sRsrc_Vid_DAFB_HRb"}; // High-Res (1,2,4,8,32)
|
|
|
|
sRsrc_Vid_DAFB_VGAa, l{"_sRsrc_Vid_DAFB_VGAa"}; // VGA (1,2,4,8)
|
|
sRsrc_Vid_DAFB_VGAb, l{"_sRsrc_Vid_DAFB_VGAb"}; // VGA (1,2,4,8,32)
|
|
|
|
sRsrc_Vid_DAFB_RGBFPa, l{"_sRsrc_Vid_DAFB_RGBFPa"}; // RGB Portrait (1,2,4)
|
|
sRsrc_Vid_DAFB_RGBFPb, l{"_sRsrc_Vid_DAFB_RGBFPb"}; // RGB Portrait (1,2,4,8)
|
|
|
|
sRsrc_Vid_DAFB_RGB2Pa, l{"_sRsrc_Vid_DAFB_RGB2Pa"}; // RGB 2-Page (1,2,4)
|
|
sRsrc_Vid_DAFB_RGB2Pb, l{"_sRsrc_Vid_DAFB_RGB2Pb"}; // RGB 2-Page (1,2,4,8)
|
|
|
|
sRsrc_Vid_DAFB_NTSCSTa, l{"_sRsrc_Vid_DAFB_NTSCSTa"}; // NTSC safe title (1,2,4,8)
|
|
sRsrc_Vid_DAFB_NTSCSTb, l{"_sRsrc_Vid_DAFB_NTSCSTb"}; // NTSC safe title (1,2,4,8,32)
|
|
sRsrc_Vid_DAFB_NTSCFFa, l{"_sRsrc_Vid_DAFB_NTSCFFa"}; // NTSC full frame (1,2,4,8)
|
|
sRsrc_Vid_DAFB_NTSCFFb, l{"_sRsrc_Vid_DAFB_NTSCFFb"}; // NTSC full frame (1,2,4,8,32)
|
|
|
|
sRsrc_Vid_DAFB_PALSTa, l{"_sRsrc_Vid_DAFB_PALSTa"}; // PAL safe title (1,2,4,8)
|
|
sRsrc_Vid_DAFB_PALSTb, l{"_sRsrc_Vid_DAFB_PALSTb"}; // PAL safe title (1,2,4,8,32)
|
|
sRsrc_Vid_DAFB_PALFFa, l{"_sRsrc_Vid_DAFB_PALFFa"}; // PAL full frame (1,2,4,8)
|
|
sRsrc_Vid_DAFB_PALFFb, l{"_sRsrc_Vid_DAFB_PALFFb"}; // PAL full frame (1,2,4,8,32)
|
|
|
|
sRsrc_Vid_DAFB_NTSCconvSTx, l{"_sRsrc_Vid_DAFB_NTSCconvST"}; // NTSC ST, convolved (1,2,4,8)
|
|
sRsrc_Vid_DAFB_NTSCconvST, l{"_sRsrc_Vid_DAFB_NTSCconvST"}; // NTSC ST, convolved (1,2,4,8)
|
|
sRsrc_Vid_DAFB_NTSCconvFFx, l{"_sRsrc_Vid_DAFB_NTSCconvFF"}; // NTSC FF, convolved (1,2,4,8)
|
|
sRsrc_Vid_DAFB_NTSCconvFF, l{"_sRsrc_Vid_DAFB_NTSCconvFF"}; // NTSC FF, convolved (1,2,4,8)
|
|
|
|
sRsrc_Vid_DAFB_PALconvSTx, l{"_sRsrc_Vid_DAFB_PALconvST"}; // PAL ST, convolved (1,2,4,8)
|
|
sRsrc_Vid_DAFB_PALconvST, l{"_sRsrc_Vid_DAFB_PALconvST"}; // PAL ST, convolved (1,2,4,8)
|
|
sRsrc_Vid_DAFB_PALconvFFx, l{"_sRsrc_Vid_DAFB_PALconvFF"}; // PAL FF, convolved (1,2,4,8)
|
|
sRsrc_Vid_DAFB_PALconvFF, l{"_sRsrc_Vid_DAFB_PALconvFF"}; // PAL FF, convolved (1,2,4,8)
|
|
|
|
//
|
|
// The portables have very simple video capabilities - a single sRsrc.
|
|
//
|
|
sRsrc_Vid_Tim_LCD, l{"_sRsrc_Vid_Tim_LCD"}; // 1bpp only
|
|
|
|
//
|
|
// Apollo also has very simple video capabilites.
|
|
//
|
|
sRsrc_Vid_Apollo, l{"_sRsrc_Vid_Apollo"}; // 1bpp only
|
|
|
|
//
|
|
// Ugh. I needed more entries for DAFB, so I had to put them here.
|
|
//
|
|
|
|
sRsrc_Vid_DAFB_HRax, l{"_sRsrc_Vid_DAFB_HRax"}; // HiRes (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_HRbx, l{"_sRsrc_Vid_DAFB_HRbx"}; // HiRes (1,2,4,8,16,32)
|
|
|
|
sRsrc_Vid_DAFB_VGAax, l{"_sRsrc_Vid_DAFB_VGAax"}; // VGA (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_VGAbx, l{"_sRsrc_Vid_DAFB_VGAbx"}; // VGA (1,2,4,8,16,32)
|
|
|
|
sRsrc_Vid_DAFB_LPax, l{"_sRsrc_Vid_DAFB_LPax"}; // GoldFish (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_LPbx, l{"_sRsrc_Vid_DAFB_LPbx"}; // GoldFish (1,2,4,8,16,32)
|
|
|
|
sRsrc_Vid_DAFB_SVGAax, l{"_sRsrc_Vid_DAFB_SVGAax"}; // SuperVGA (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_SVGAbx, l{"_sRsrc_Vid_DAFB_SVGAbx"}; // SuperVGA (1,2,4,8,16,32)
|
|
|
|
sRsrc_Vid_DAFB_SVGAa, l{"_sRsrc_Vid_DAFB_SVGAa"}; // SuperVGA (1,2,4,8)
|
|
sRsrc_Vid_DAFB_SVGAb, l{"_sRsrc_Vid_DAFB_SVGAb"}; // SuperVGA (1,2,4,8,32)
|
|
|
|
sRsrc_Vid_DAFB_GSx, l{"_sRsrc_Vid_DAFB_GSx"}; // Rubik (1,2,4,8,16,32)
|
|
sRsrc_Vid_DAFB_RGBFPbx, l{"_sRsrc_Vid_DAFB_RGBFPbx"}; // RGBPort (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_GSz, l{"_sRsrc_Vid_DAFB_GSz"}; // Rubik (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_RGB2Pbx, l{"_sRsrc_Vid_DAFB_RGB2Pbx"}; // Vesuvio (1,2,4,8,16)
|
|
|
|
sRsrc_Vid_DAFB_NTSCSTax, l{"_sRsrc_Vid_DAFB_NTSCSTax"}; // NTSC ST (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_NTSCSTbx, l{"_sRsrc_Vid_DAFB_NTSCSTbx"}; // NTSC ST (1,2,4,8,16,32)
|
|
sRsrc_Vid_DAFB_NTSCFFax, l{"_sRsrc_Vid_DAFB_NTSCFFax"}; // NTSC FF (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_NTSCFFbx, l{"_sRsrc_Vid_DAFB_NTSCFFbx"}; // NTSC FF (1,2,4,8,16,32)
|
|
|
|
sRsrc_Vid_DAFB_PALSTax, l{"_sRsrc_Vid_DAFB_PALSTax"}; // PAL ST (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_PALSTbx, l{"_sRsrc_Vid_DAFB_PALSTbx"}; // PAL ST extended (1,2,4,8,16,32)
|
|
sRsrc_Vid_DAFB_PALFFax, l{"_sRsrc_Vid_DAFB_PALFFax"}; // PAL FF (1,2,4,8,16)
|
|
sRsrc_Vid_DAFB_PALFFbx, l{"_sRsrc_Vid_DAFB_PALFFbx"}; // PAL FF extended (1,2,4,8,16,32)
|
|
|
|
sRsrc_Vid_DAFB_19bx, l{"_sRsrc_Vid_DAFB_19bx"}; // 19" (1,2,4,8,16)
|
|
|
|
#endif
|
|
|
|
//
|
|
// The final range is reserved for miscellaneous stuff - Ethernet and Double Exposure. There's also some
|
|
// CPU sResources to identify ROM families.
|
|
//
|
|
|
|
sRsrc_CPUMacIIci, l{"_sRsrc_CPUMacIIci"};
|
|
sRsrc_CPUMac040, l{"_sRsrc_CPUMacO40"};
|
|
|
|
#if !LC930
|
|
sRsrc_Sonic, l{"_sRsrc_Sonic"}; // Onboard Sonic Ethernet chip
|
|
#endif
|
|
|
|
sRsrc_DoubleExposure, l{"_sRsrc_DoubleExposure"}; // special sRsrc for no-config
|
|
// ; ROM Double Exposure
|
|
|
|
}};
|
|
|
|
|
|
//-------------------------------------------------------------
|
|
// TNT sRsrc Directory
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'sdir' (170, "_sRsrcTNTDir") {{
|
|
$3E, l{"_sRsrc_TNT"}; // Minimal board sRsrc directory.
|
|
$FD, l{"_sRsrc_OpenTxpt"}; // Open Transport functional sRsrc
|
|
}};
|
|
|
|
|
|
resource 'boar' (150, "_sRsrc_TNT") {{
|
|
sRsrcType, l{"_BoardType"}; // Minimal board sRsrc.
|
|
sRsrcName, c{"Macintosh 4A"};
|
|
BoardId, d{$670};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
|
|
//-------------------------------------------------------------
|
|
//
|
|
// sRsrc_Board Lists
|
|
//
|
|
// These board sResources contain the ÒcardÓ name seen by the
|
|
// Monitors cdev.
|
|
// Another important part of the board sRsrc is the PrimaryInit code.
|
|
// This universal section of code performs all necessary sRsrc
|
|
// pruning which entails a full identification of the CPU type
|
|
// and configuration. On entry to the routine, the full contents
|
|
// of the sRsrc directory are presented. On exit, only one board
|
|
// sRsrc, one video sRsrc, and any other miscellaneous sRsrcs
|
|
// remain.
|
|
// In theory, each board sRsrc should contain a PrimaryInit entry.
|
|
// The Slot Manager expects only one board sRsrc and one PrimaryInit
|
|
// per card. Since the Slot Manager scans in ascending spID order,
|
|
// only the first entry in the directory (the Mac II resource) has
|
|
// a PrimaryInit. After this universal PrimaryInit runs everything
|
|
// that needs to happen has happened, so there's no need for
|
|
// the ultimate board sRsrc list to run another PrimaryInit.
|
|
//
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'boar' (165, "_sRsrc_BdMacII") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh II"};
|
|
BoardId, d{MIIBoardId};
|
|
PrimaryInit, l{"_sPrimaryInitRec"}; // This PrimaryInit is universal for all machines
|
|
VendorInfo, l{"_VendorInfo"}; // supported by this sRsrc directory.
|
|
}};
|
|
|
|
resource 'boar' (175, "_sRsrc_BdMacIIx") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh IIx"};
|
|
BoardId, d{MIIxBoardId};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
resource 'boar' (185, "_sRsrc_BdMacIIcx") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh IIcx"};
|
|
BoardId, d{MIIcxBoardId};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
resource 'boar' (195, "_sRsrc_BdMacSE30") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh SE/30"};
|
|
BoardId, d{SE30BoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
resource 'boar' (205, "_sRsrc_BdMacIIci") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh IIci Built-In Video"};
|
|
BoardId, d{ciVidBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
resource 'boar' (215, "_sRsrc_BdMacIIfx") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh IIfx"};
|
|
BoardId, d{MIIfxBoardId};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
resource 'boar' (225, "_sRsrc_BdErickson") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh A Built-In Video"};
|
|
BoardId, d{EricksonBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
}};
|
|
|
|
resource 'boar' (235, "_sRsrc_BdElsie") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh B Built-In Video"};
|
|
BoardId, d{ElsieBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
sRsrcVidNames, l{"_V8VidNameDir"};
|
|
}};
|
|
|
|
#if !LC930
|
|
|
|
resource 'boar' (245, "_sRsrc_BdEclipse") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh C Built-In Video"};
|
|
sRsrcIcon, l{"_VidICONEclipse"};
|
|
BoardId, d{EclipseBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
SecondaryInit, l{"_sSecondaryInit"};
|
|
sRsrcVidNames, l{"_DAFBVidNameDir"};
|
|
sVidParmDir, l{"_VidParmDir_DAFB"};
|
|
}};
|
|
|
|
resource 'boar' (255, "_sRsrc_BdTIM") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh D Built-In Video"};
|
|
sRsrcIcon, l{"_VidICONTIM"};
|
|
BoardId, d{TIMBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
sRsrcVidNames, l{"_TIMVidNameDir"};
|
|
}};
|
|
|
|
resource 'boar' (265, "_sRsrc_BdSpike") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh E Built-In Video"};
|
|
sRsrcIcon, l{"_VidICONSpike"};
|
|
BoardId, d{SpikeBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
SecondaryInit, l{"_sSecondaryInit"};
|
|
sRsrcVidNames, l{"_DAFBVidNameDir"};
|
|
sVidParmDir, l{"_VidParmDir_DAFB"};
|
|
}};
|
|
|
|
resource 'boar' (275, "_sRsrc_BdApollo") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh F Built-In Video"};
|
|
sRsrcIcon, l{"_VidICONApollo"};
|
|
BoardId, d{ApolloBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
sRsrcVidNames, l{"_ApolloVidNameDir"};
|
|
}};
|
|
|
|
resource 'boar' (285, "_sRsrc_BdZydeco") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh G Built-In Video"};
|
|
sRsrcIcon, l{"_VidICONZydeco"};
|
|
BoardId, d{ZydecoBrdID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
SecondaryInit, l{"_sSecondaryInit"};
|
|
sRsrcVidNames, l{"_DAFBVidNameDir"};
|
|
sVidParmDir, l{"_VidParmDir_DAFB"};
|
|
}};
|
|
|
|
resource 'boar' (295, "_sRsrc_BdDBLite") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh H Built-In Video"};
|
|
BoardId, d{DBLiteBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
SecondaryInit, l{"_sSecondaryInit"};
|
|
sRsrcVidNames, l{"_DBLiteVidNameDir"}; //
|
|
}};
|
|
|
|
resource 'boar' (305, "_sRsrc_BdWombat") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh I Built-In Video"};
|
|
sRsrcIcon, l{"_VidICONWombat"};
|
|
BoardId, d{WombatBrdID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
SecondaryInit, l{"_sSecondaryInit"};
|
|
sRsrcVidNames, l{"_DAFBVidNameDir"}; //
|
|
sVidParmDir, l{"_VidParmDir_DAFB"};
|
|
}};
|
|
|
|
resource 'boar' (315, "_sRsrc_BdDartanian") {{
|
|
sRsrcType, l{"_BoardType"};
|
|
sRsrcName, c{"Macintosh J Built-In Video"};
|
|
BoardId, d{DartanianBoardID};
|
|
VendorInfo, l{"_VendorInfo"};
|
|
SecondaryInit, l{"_sSecondaryInit"};
|
|
sRsrcVidNames, l{"_DartanianVidNameDir"};
|
|
}};
|
|
|
|
#endif
|
|
|
|
//=====================================================================
|
|
// Primary/Secondary/Super Init records
|
|
//=====================================================================
|
|
|
|
resource 'node' (418, "_sPrimaryInitRec") {{
|
|
blocksize{};
|
|
include{match{{file{$$Shell("RsrcDir")"PrimaryInit.rsrc"};
|
|
type{'decl'};
|
|
id{200};}}};
|
|
}};
|
|
|
|
resource 'node' (419, "_sSecondaryInit") {{
|
|
blocksize{};
|
|
include{match{{file{$$Shell("RsrcDir")"SecondaryInit.rsrc"};
|
|
type{'decl'};
|
|
id{210};}}};
|
|
}};
|
|
|
|
resource 'node' (420, "_sSuperInitRec") {{
|
|
blocksize{};
|
|
include{match{{file{$$Shell("RsrcDir")"SuperInit.rsrc"};
|
|
type{'decl'};
|
|
id{220};}}};
|
|
}};
|
|
|
|
//-------------------------------------------------------------
|
|
// Video Name Directory
|
|
//-------------------------------------------------------------
|
|
//
|
|
// A name directory is structured identically to that of a gamma directory.
|
|
// For each possible video sRsrc spID, there is a corresponding OSLstEntry
|
|
// pointing to the name data. Also, each name data block contains a word-sized
|
|
// localization id.
|
|
//
|
|
|
|
resource 'vdir' (345, "_DAFBVidNameDir") {{
|
|
|
|
sRsrc_Vid_DAFB_19a, l{"_sName_19"};
|
|
sRsrc_Vid_DAFB_19b, l{"_sName_19"};
|
|
|
|
sRsrc_Vid_DAFB_FPa, l{"_sName_FP"};
|
|
sRsrc_Vid_DAFB_FPb, l{"_sName_FP"};
|
|
|
|
sRsrc_Vid_DAFB_GSa, l{"_sName_GS"};
|
|
sRsrc_Vid_DAFB_GSb, l{"_sName_GS"};
|
|
|
|
sRsrc_Vid_DAFB_2Pa, l{"_sName_2P"};
|
|
sRsrc_Vid_DAFB_2Pb, l{"_sName_2P"};
|
|
|
|
sRsrc_Vid_DAFB_LPa, l{"_sName_LP"};
|
|
sRsrc_Vid_DAFB_LPb, l{"_sName_LP"};
|
|
|
|
sRsrc_Vid_DAFB_HRa, l{"_sName_HR"};
|
|
sRsrc_Vid_DAFB_HRb, l{"_sName_HR"};
|
|
|
|
sRsrc_Vid_DAFB_VGAa, l{"_sName_VGA"};
|
|
sRsrc_Vid_DAFB_VGAb, l{"_sName_VGA"};
|
|
|
|
sRsrc_Vid_DAFB_RGBFPa, l{"_sName_RGBFP"};
|
|
sRsrc_Vid_DAFB_RGBFPb, l{"_sName_RGBFP"};
|
|
|
|
sRsrc_Vid_DAFB_RGB2Pa, l{"_sName_RGB2P"};
|
|
sRsrc_Vid_DAFB_RGB2Pb, l{"_sName_RGB2P"};
|
|
|
|
sRsrc_Vid_DAFB_NTSCSTa, l{"_sName_NTSCST"};
|
|
sRsrc_Vid_DAFB_NTSCSTb, l{"_sName_NTSCST"};
|
|
sRsrc_Vid_DAFB_NTSCFFa, l{"_sName_NTSCFF"};
|
|
sRsrc_Vid_DAFB_NTSCFFb, l{"_sName_NTSCFF"};
|
|
|
|
sRsrc_Vid_DAFB_PALSTa, l{"_sName_PALST"};
|
|
sRsrc_Vid_DAFB_PALSTb, l{"_sName_PALST"};
|
|
sRsrc_Vid_DAFB_PALFFa, l{"_sName_PALFF"};
|
|
sRsrc_Vid_DAFB_PALFFb, l{"_sName_PALFF"};
|
|
|
|
sRsrc_Vid_DAFB_NTSCconvSTx, l{"_sName_NTSCconvST"};
|
|
sRsrc_Vid_DAFB_NTSCconvST, l{"_sName_NTSCconvST"};
|
|
sRsrc_Vid_DAFB_NTSCconvFFx, l{"_sName_NTSCconvFF"};
|
|
sRsrc_Vid_DAFB_NTSCconvFF, l{"_sName_NTSCconvFF"};
|
|
|
|
sRsrc_Vid_DAFB_PALconvSTx, l{"_sName_PALconvST"};
|
|
sRsrc_Vid_DAFB_PALconvST, l{"_sName_PALconvST"};
|
|
sRsrc_Vid_DAFB_PALconvFFx, l{"_sName_PALconvFF"};
|
|
sRsrc_Vid_DAFB_PALconvFF, l{"_sName_PALconvFF"};
|
|
|
|
sRsrc_Vid_DAFB_HRax, l{"_sName_HR"};
|
|
sRsrc_Vid_DAFB_HRbx, l{"_sName_HR"};
|
|
|
|
sRsrc_Vid_DAFB_VGAax, l{"_sName_VGA"};
|
|
sRsrc_Vid_DAFB_VGAbx, l{"_sName_VGA"};
|
|
|
|
sRsrc_Vid_DAFB_LPax, l{"_sName_LP"};
|
|
sRsrc_Vid_DAFB_LPbx, l{"_sName_LP"};
|
|
|
|
sRsrc_Vid_DAFB_SVGAax, l{"_sName_SVGA56"};
|
|
sRsrc_Vid_DAFB_SVGAbx, l{"_sName_SVGA56"};
|
|
|
|
sRsrc_Vid_DAFB_SVGAa, l{"_sName_SVGA56"};
|
|
sRsrc_Vid_DAFB_SVGAb, l{"_sName_SVGA56"};
|
|
|
|
sRsrc_Vid_DAFB_GSx, l{"_sName_GS"};
|
|
sRsrc_Vid_DAFB_RGBFPbx, l{"_sName_RGBFP"};
|
|
sRsrc_Vid_DAFB_GSz, l{"_sName_GS"};
|
|
sRsrc_Vid_DAFB_RGB2Pbx, l{"_sName_RGB2P"};
|
|
|
|
sRsrc_Vid_DAFB_NTSCSTax, l{"_sName_NTSCST"};
|
|
sRsrc_Vid_DAFB_NTSCSTbx, l{"_sName_NTSCST"};
|
|
sRsrc_Vid_DAFB_NTSCFFax, l{"_sName_NTSCFF"};
|
|
sRsrc_Vid_DAFB_NTSCFFbx, l{"_sName_NTSCFF"};
|
|
|
|
sRsrc_Vid_DAFB_PALSTax, l{"_sName_PALST"};
|
|
sRsrc_Vid_DAFB_PALSTbx, l{"_sName_PALST"};
|
|
sRsrc_Vid_DAFB_PALFFax, l{"_sName_PALFF"};
|
|
sRsrc_Vid_DAFB_PALFFbx, l{"_sName_PALFF"};
|
|
|
|
sRsrc_Vid_DAFB_19bx, l{"_sName_19"};
|
|
|
|
}};
|
|
|
|
resource 'vdir' (350, "_V8VidNameDir") {{
|
|
|
|
sRsrc_Vid_V8_GSa, l{"_sName_GS"};
|
|
sRsrc_Vid_V8_VGAa, l{"_sName_VGA"};
|
|
sRsrc_Vid_V8_HRa, l{"_sName_HR"};
|
|
|
|
sRsrc_Vid_V8_GSb, l{"_sName_GS"};
|
|
sRsrc_Vid_V8_VGAb, l{"_sName_VGA"};
|
|
sRsrc_Vid_V8_HRb, l{"_sName_HR"};
|
|
}};
|
|
|
|
resource 'vmna' (360, "_sName_FP") {128, "Ê640 x 870, 75 Hz (Grayscale Only)"};
|
|
resource 'vmna' (365, "_sName_GS") {129, "Ê512 x 384, 60 Hz"};
|
|
resource 'vmna' (370, "_sName_2P") {130, "1152 x 870, 75 Hz (Grayscale Only)"};
|
|
resource 'node' (375, "_sName_GF") {{include{l{"_sName_LP"}};}};
|
|
resource 'vmna' (380, "_sName_LP") {131, "Ê832 x 624, 75 Hz"};
|
|
resource 'vmna' (385, "_sName_HR") {133, "Ê640 x 480, 67 Hz"};
|
|
resource 'vmna' (390, "_sName_VGA") {134, "Ê640 x 480, 60 Hz (VGA)"};
|
|
resource 'vmna' (395, "_sName_SVGA56") {135, "Ê800 x 600, 56 Hz (SVGA)"};
|
|
resource 'vmna' (400, "_sName_RGBFP") {136, "Ê640 x 870, 75 Hz"};
|
|
resource 'vmna' (405, "_sName_RGB2P") {137, "1152 x 870, 75 Hz"};
|
|
resource 'vmna' (410, "_sName_NTSCST") {138, "Ê512 x 384, NTSC"};
|
|
resource 'vmna' (415, "_sName_NTSCFF") {139, "Ê640 x 480, NTSC"};
|
|
resource 'vmna' (420, "_sName_PALST") {140, "Ê640 x 480, PAL"};
|
|
resource 'vmna' (425, "_sName_PALFF") {141, "Ê768 x 576, PAL"};
|
|
resource 'vmna' (430, "_sName_NTSCconvST") {142, "Ê512 x 384, NTSC Convolved"};
|
|
resource 'vmna' (435, "_sName_NTSCconvFF") {143, "Ê640 x 480, NTSC Convolved"};
|
|
resource 'vmna' (440, "_sName_PALconvST") {144, "Ê640 x 480, PAL Convolved"};
|
|
resource 'vmna' (445, "_sName_PALconvFF") {145, "Ê768 x 576, PAL Convolved"};
|
|
resource 'vmna' (450, "_sName_19") {146, "1024 x 768, 75 Hz"};
|
|
resource 'vmna' (455, "_sName_GS560") {147, "Ê560 x 384, 60 Hz"};
|
|
resource 'vmna' (460, "_sName_SVGA72") {148, "Ê800 x 600, 72 Hz (VESA)"};
|
|
resource 'vmna' (465, "_sName_SxVGA60") {149, "1024 x 768, 60 Hz (VESA)"};
|
|
resource 'vmna' (470, "_sName_SxVGA70") {150, "1024 x 768, 70 Hz (VESA)"};
|
|
resource 'vmna' (475, "_sName_HR400") {151, "Ê640 x 400, 67 Hz"};
|
|
resource 'vmna' (480, "_sName_HRMAZ") {151, "Ê704 x 512, 67 Hz"};
|
|
resource 'vmna' (485, "_sName_512x384") {152, "Ê512 x 384"};
|
|
resource 'vmna' (495, "_sName_640x480") {154, "Ê640 x 480"};
|
|
resource 'vmna' (500, "_sName_768x576") {155, "Ê768 x 576"};
|
|
|
|
// WeÕve got the room, so what the heck: LetÕs put video name directories in for TIMs, Apollos, DB-Lites!
|
|
//
|
|
resource 'vdir' (505, "_TIMVidNameDir") {{
|
|
sRsrc_Vid_Tim_LCD, l{"_sName_LCD"};
|
|
}};
|
|
|
|
resource 'node' (510, "_DartanianVidNameDir") {{
|
|
include{l{"_DBLiteVidNameDir"}};
|
|
}};
|
|
|
|
resource 'vdir' (515, "_DBLiteVidNameDir") {{
|
|
sRsrc_Vid_GSC_LCD, l{"_sName_LCD"};
|
|
}};
|
|
|
|
resource 'vdir' (520, "_ApolloVidNameDir") {{
|
|
sRsrc_Vid_Apollo, l{"_sName_Apollo"};
|
|
}};
|
|
|
|
resource 'vmna' (525, "_sName_LCD") {128, "Ê640 x 400 (Black & White)"};
|
|
resource 'vmna' (530, "_sName_Apollo") {128, "Ê512 x 342 (Black & White)"};
|
|
|
|
|
|
//-------------------------------------------------------------
|
|
// Board Type
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'styp' (535, "_BoardType") {CatBoard, TypBoard, 0, 0};
|
|
|
|
//-------------------------------------------------------------
|
|
// Vendor Info
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'vend' (540, "_VendorInfo") {{
|
|
VendorId, c{"Copyright © 1986-1998 by Apple Computer, Inc. All Rights Reserved."};
|
|
RevLevel, c{"Macintosh CPU Family 6.0"}; // offset to revision
|
|
PartNum, c{"DeclROM for OpenTxpt"}; // offset to part number descriptor
|
|
Date, c{"Tuesday, September 3, 2002"}; // sorry
|
|
// Date, c{$$Date}; // offset to ROM build date descriptor
|
|
}};
|
|
|
|
//-------------------------------------------------------------
|
|
// CPU sResource List
|
|
//-------------------------------------------------------------
|
|
|
|
|
|
resource 'node' (575, "_sRsrc_CPUMacIIci") {{
|
|
include{l{"_sRsrc_CPUMac030"}};
|
|
}};
|
|
|
|
resource 'srsc' (575, "_sRsrc_CPUMac030") {{
|
|
sRsrcType, l{"_CPUMacIIci"}; // Õ030 Class Machines (plus MacII & LC).
|
|
sRsrcName, l{"_CPUMacIIciName"};
|
|
MajRAMSp, l{"_MajRAMSp"};
|
|
MinROMSp, l{"_MinROMSp"};
|
|
}};
|
|
|
|
|
|
resource 'srsc' (578, "_sRsrc_CPUMacO40") {{
|
|
sRsrcType, l{"_CPUMacO40"}; // Õ040 Class Machines.
|
|
sRsrcName, l{"_CPUMac040Name"};
|
|
MajRAMSp, l{"_MajRAMSp"};
|
|
MinROMSp, l{"_MinROMSp"};
|
|
}};
|
|
|
|
|
|
resource 'styp' (583, "_CPUMacIIci") {CatCPU, Typ68030, DrSwMacCPU, drHWRBV};
|
|
resource 'styp' (585, "_CPUMacO40") {CatCPU, Type68040, DrSwMacCPU, drHwRBV};
|
|
|
|
resource 'node' (590, "_CPUMacIIciName") {{
|
|
cstring{"CPU_68030_\_MacIIFamily"}; // Name of sResource
|
|
}};
|
|
|
|
resource 'node' (595, "_CPUMac040Name") {{
|
|
cstring{"CPU_68040"}; // Name of sResource
|
|
}};
|
|
|
|
resource 'node' (600, "_MajRAMSp") {{
|
|
longs{{$00000000;$3FFFFFFF;}}; // RAM space
|
|
}};
|
|
|
|
resource 'node' (605, "_MinROMSp") {{
|
|
longs{{$F0800000;$F0FFFFFF;}}; // ROM space
|
|
}};
|
|
|
|
//-------------------------------------------------------------
|
|
// Functional sResources
|
|
//-------------------------------------------------------------
|
|
|
|
resource 'srsc' (610, "_sRsrc_VidRbvHRa") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthHRa"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvHR"};
|
|
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMHR"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMHR"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBMHR"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBMHR"};
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (615, "_sRsrc_VidRbvHRb") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthHRb"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvHR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMHR"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMHR"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBMHR"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (620, "_sRsrc_VidRbvHRc") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthHRc"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvHR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMHR"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMHR"}; // offset to TwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (625, "_sRsrc_VidRbvHRd") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthHRd"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvHR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMHR"}; // offset to OneBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (630, "_sRsrc_VidRbvFPa") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthFPa"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDir_FP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMFP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMFP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBMFP"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (635, "_sRsrc_VidRbvFPb") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthFPb"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDir_FP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMFP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMFP"}; // offset to TwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (640, "_sRsrc_VidRbvFPc") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthFPc"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDir_FP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMFP"}; // offset to OneBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (645, "_sRsrc_VidRbvGSa") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthGSa"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMGS"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMGS"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBMGS"}; // offset to TwoBitMode parameters
|
|
FourthVidMode, l{"_EBMGS"}; // offset to TwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (650, "_sRsrc_VidRbvGSb") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthGSb"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMGS"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMGS"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBMGS"}; // offset to TwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (655, "_sRsrc_VidRbvGSc") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthGSc"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMGS"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMGS"}; // offset to TwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (660, "_sRsrc_VidRbvGSd") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthGSd"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMGS"}; // offset to OneBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (665, "_sRsrc_VidRbvSEa") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthSEa"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvSE"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMSE"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMSE"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBMSE"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBMSE"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (670, "_sRsrc_VidRbvSEb") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthSEb"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvSE"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMSE"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMSE"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBMSE"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (675, "_sRsrc_VidRbvSEc") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthSEc"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvSE"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMSE"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBMSE"}; // offset to TwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (680, "_sRsrc_VidRbvSEd") {{
|
|
sRsrcType, l{"_VideoTypeRBV"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameRBV"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirRBV"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseRBV"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthSEd"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirRbvSE"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMSE"}; // offset to OneBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (685, "_sRsrc_Vid_V8_GSa") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_GSa"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirElsGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_GSa"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_GSa"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_GSa"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_V8_GSa"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_V8_GS"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (690, "_sRsrc_Vid_V8_GSb") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_GSb"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirElsGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_GSb"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_GSb"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_GSb"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_V8_GSb"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (695, "_sRsrc_Vid_V8_A2Ema") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_A2Ema"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirElsGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_A2Ema"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_A2Ema"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_A2Ema"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_V8_A2Ema"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (700, "_sRsrc_Vid_V8_A2Emb") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_A2Emb"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirElsGS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_A2Emb"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_A2Emb"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_A2Emb"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (705, "_sRsrc_Vid_V8_HRa") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_HRa"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirElsHR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_HRa"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_HRa"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_HRa"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_V8_HR"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (710, "_sRsrc_Vid_V8_HRb") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_HRb"}; // offset to frame buffer length
|
|
|
|
sGammaDir, a{"_GammaDirElsHR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_HRb"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_HRb"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_HRb"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
//
|
|
// The two VGA modes have the same configurations and capabilities as the Mac II High-Res, so, to
|
|
// save a little ROM space, we have a distinct sRsrc list, but the elements of this list all
|
|
// point to High-Res data structures.
|
|
//
|
|
|
|
resource 'srsc' (715, "_sRsrc_Vid_V8_VGAa") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_VGAa"}; // offset to frame buffer length
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_HRa"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_HRa"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_HRa"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_V8_HR"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (720, "_sRsrc_Vid_V8_VGAb") {{
|
|
sRsrcType, l{"_VideoTypeElsie"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameV8"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirElsie"}; // offset to driver directory
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseElsie"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLength_V8_VGAb"}; // offset to frame buffer length
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_V8_HRb"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_V8_HRb"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_V8_HRb"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (725, "_sRsrc_Vid_DAFB_19a") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_19a"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_19"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_19"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_19"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_19"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (730, "_sRsrc_Vid_DAFB_19b") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_19b"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_19"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_19"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_19"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_19"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_19"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (735, "_sRsrc_Vid_DAFB_19bx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_19bx"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_19"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_19"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_19"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_19"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_19"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_19"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (740, "_sRsrc_Vid_DAFB_FPa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_FPa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_FP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_FP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_FP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_FP"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (745, "_sRsrc_Vid_DAFB_FPb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_FPb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_FP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_FP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_FP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_FP"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_FP"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (750, "_sRsrc_Vid_DAFB_2Pa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFB2PW"};
|
|
MinorLength, l{"_MinorLength_DAFB_2Pa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_2P"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_2P"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_2P"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_2P"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (755, "_sRsrc_Vid_DAFB_2Pb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFB2PW"};
|
|
MinorLength, l{"_MinorLength_DAFB_2Pb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_2P"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_2P"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_2P"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_2P"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_2P"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (760, "_sRsrc_Vid_DAFB_LPa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBSW"};
|
|
MinorLength, l{"_MinorLength_DAFB_LPa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_LP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_LP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_LP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_LP"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_LP"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (765, "_sRsrc_Vid_DAFB_LPb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBS"};
|
|
MinorLength, l{"_MinorLength_DAFB_LPb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_LP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_LP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_LP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_LP"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_LP"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_LP"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (770, "_sRsrc_Vid_DAFB_LPax") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBSW"};
|
|
MinorLength, l{"_MinorLength_DAFB_LPax"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_LP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_LP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_LP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_LP"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_LP"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_LP"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (775, "_sRsrc_Vid_DAFB_LPbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBS"};
|
|
MinorLength, l{"_MinorLength_DAFB_LPb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_LP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_LP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_LP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_LP"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_LP"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_LP"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_LP"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (780, "_sRsrc_Vid_DAFB_GSa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_GSa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_GS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_GS"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_GS"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_GS"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_GS"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (785, "_sRsrc_Vid_DAFB_GSb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_GSb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_GS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_GS"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_GS"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_GS"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_GS"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_GS"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (790, "_sRsrc_Vid_DAFB_GSx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_GSb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_GS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_GS"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_GS"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_GS"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_GS"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_GS"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_GS"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (795, "_sRsrc_Vid_DAFB_GSz") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_GSb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_GS"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_GS"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_GS"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_GS"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_GS"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_GS"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'node' (800, "_sRsrc_Vid_DAFB_VGAa") {{
|
|
include{l{"_sRsrc_Vid_DAFB_HRa"}};
|
|
}};
|
|
|
|
resource 'srsc' (805, "_sRsrc_Vid_DAFB_HRa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_HRa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_HR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_HR"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_HR"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_HR"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_HR"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'node' (810, "_sRsrc_Vid_DAFB_VGAb") {{
|
|
include{l{"_sRsrc_Vid_DAFB_HRb"}};
|
|
}};
|
|
|
|
resource 'srsc' (815, "_sRsrc_Vid_DAFB_HRb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_HRb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_HR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_HR"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_HR"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_HR"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_HR"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_HR"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'node' (820, "_sRsrc_Vid_DAFB_VGAax") {{
|
|
include{l{"_sRsrc_Vid_DAFB_HRax"}};
|
|
}};
|
|
|
|
resource 'srsc' (825, "_sRsrc_Vid_DAFB_HRax") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_HRax"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_HR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_HR"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_HR"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_HR"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_HR"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_HR"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'node' (830, "_sRsrc_Vid_DAFB_VGAbx") {{
|
|
include{l{"_sRsrc_Vid_DAFB_HRbx"}};
|
|
}};
|
|
|
|
resource 'srsc' (835, "_sRsrc_Vid_DAFB_HRbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_HRb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_HR"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_HR"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_HR"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_HR"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_HR"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_HR"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_HR"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (840, "_sRsrc_Vid_DAFB_SVGAa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBSW"};
|
|
MinorLength, l{"_MinorLength_DAFB_SVGAa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_VGA"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_SVGA"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_SVGA"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_SVGA"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_SVGA"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (845, "_sRsrc_Vid_DAFB_SVGAb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBS"};
|
|
MinorLength, l{"_MinorLength_DAFB_SVGAb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_VGA"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_SVGA"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_SVGA"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_SVGA"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_SVGA"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_SVGA"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (850, "_sRsrc_Vid_DAFB_SVGAax") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBSW"};
|
|
MinorLength, l{"_MinorLength_DAFB_SVGAax"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_VGA"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_SVGA"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_SVGA"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_SVGA"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_SVGA"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_SVGA"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (855, "_sRsrc_Vid_DAFB_SVGAbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBBS"};
|
|
MinorLength, l{"_MinorLength_DAFB_SVGAb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_VGA"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_SVGA"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_SVGA"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_SVGA"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_SVGA"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_SVGA"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_SVGA"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (860, "_sRsrc_Vid_DAFB_RGBFPa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_FPa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_RGBFP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_FP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_FP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_FP"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (865, "_sRsrc_Vid_DAFB_RGBFPb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_FPb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_RGBFP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_FP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_FP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_FP"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_FP"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (870, "_sRsrc_Vid_DAFB_RGBFPbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBStd"};
|
|
MinorLength, l{"_MinorLength_DAFB_FPbx"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_RGBFP"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_FP"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_FP"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_FP"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_FP"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_FP"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
|
|
resource 'srsc' (875, "_sRsrc_Vid_DAFB_RGB2Pa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFB2PW"};
|
|
MinorLength, l{"_MinorLength_DAFB_2Pa"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_RGB2P"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_2P"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_2P"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_2P"}; // offset to FourBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (880, "_sRsrc_Vid_DAFB_RGB2Pb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFB2PW"};
|
|
MinorLength, l{"_MinorLength_DAFB_2Pb"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_RGB2P"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_2P"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_2P"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_2P"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_2P"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (885, "_sRsrc_Vid_DAFB_RGB2Pbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFB2P"};
|
|
MinorLength, l{"_MinorLength_DAFB_2Pbx"};
|
|
|
|
sGammaDir, a{"_GammaDir_DAFB_RGB2P"};
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_2P"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_2P"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_2P"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_2P"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_2P"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (890, "_sRsrc_Vid_DAFB_NTSCSTa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCSTa"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCST"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCST"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCST"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (895, "_sRsrc_Vid_DAFB_NTSCSTb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCSTb"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCST"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCST"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCST"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_NTSCST"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (900, "_sRsrc_Vid_DAFB_NTSCSTax") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCSTax"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCST"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCST"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCST"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_NTSCST"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (905, "_sRsrc_Vid_DAFB_NTSCSTbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCSTb"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCST"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCST"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCST"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_NTSCST"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_NTSCST"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (910, "_sRsrc_Vid_DAFB_NTSCconvST") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSCConv"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCconvST"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCSTconv"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCSTconv"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCSTconv"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCSTconv"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (915, "_sRsrc_Vid_DAFB_NTSCFFa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCFFa"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCFF"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (920, "_sRsrc_Vid_DAFB_NTSCFFb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCFFb"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCFF"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_NTSCFF"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (925, "_sRsrc_Vid_DAFB_NTSCFFax") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCFFax"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCFF"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_NTSCFF"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (930, "_sRsrc_Vid_DAFB_NTSCFFbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSC"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCFFb"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCFF"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_NTSCFF"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_NTSCFF"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (935, "_sRsrc_Vid_DAFB_NTSCconvFF") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBNTSCConv"};
|
|
MinorLength, l{"_MinorLength_DAFB_NTSCconvFF"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_NTSCFFconv"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_NTSCFFconv"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_NTSCFFconv"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_NTSCFFconv"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (940, "_sRsrc_Vid_DAFB_PALSTa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPALW"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALSTa"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALST"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALST"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALST"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (945, "_sRsrc_Vid_DAFB_PALSTb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPAL"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALSTb"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALST"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALST"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALST"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_PALST"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (950, "_sRsrc_Vid_DAFB_PALSTax") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPALW"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALSTax"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALST"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALST"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALST"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_PALST"}; // offset to SixteenBitMode parameters
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|
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}};
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//----------------------------------
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resource 'srsc' (955, "_sRsrc_Vid_DAFB_PALSTbx") {{
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sRsrcType, l{"_VideoTypeDAFB"};
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sRsrcName, l{"_VideoNameDAFB"};
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sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
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sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
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sRsrcHWDevID, d{1};
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|
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MinorBaseOS, l{"_MinorBaseDAFBPAL"};
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MinorLength, l{"_MinorLength_DAFB_PALSTb"};
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|
|
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FirstVidMode, l{"_OBM_DAFB_PALST"}; // offset to OneBitMode parameters
|
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SecondVidMode, l{"_TBM_DAFB_PALST"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALST"}; // offset to FourBitMode parameters
|
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FourthVidMode, l{"_EBM_DAFB_PALST"}; // offset to EightBitMode parameters
|
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FifthVidMode, l{"_D16BM_DAFB_PALST"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_PALST"}; // offset to ThirtyTwoBitMode parameters
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|
|
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}};
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//----------------------------------
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resource 'srsc' (960, "_sRsrc_Vid_DAFB_PALconvST") {{
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sRsrcType, l{"_VideoTypeDAFB"};
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sRsrcName, l{"_VideoNameDAFB"};
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sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
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|
|
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MinorBaseOS, l{"_MinorBaseDAFBPALConv"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALconvST"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALSTconv"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALSTconv"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALSTconv"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALSTconv"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
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|
|
|
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//----------------------------------
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resource 'srsc' (965, "_sRsrc_Vid_DAFB_PALFFa") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPALW"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALFFa"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALFF"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (970, "_sRsrc_Vid_DAFB_PALFFb") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPAL"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALFFb"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALFF"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D32BM_DAFB_PALFF"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (975, "_sRsrc_Vid_DAFB_PALFFax") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPALW"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALFFax"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALFF"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_PALFF"}; // offset to SixteenBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (980, "_sRsrc_Vid_DAFB_PALFFbx") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPAL"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALFFb"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALFF"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALFF"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALFF"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALFF"}; // offset to EightBitMode parameters
|
|
FifthVidMode, l{"_D16BM_DAFB_PALFF"}; // offset to SixteenBitMode parameters
|
|
SixthVidMode, l{"_D32BM_DAFB_PALFF"}; // offset to ThirtyTwoBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (985, "_sRsrc_Vid_DAFB_PALconvFF") {{
|
|
sRsrcType, l{"_VideoTypeDAFB"};
|
|
sRsrcName, l{"_VideoNameDAFB"};
|
|
sRsrcDrvrDir, l{"_VidDrvrDirDAFB"};
|
|
sRsrcFlags, d{(0|(1<<f32BitMode)|(1<<fOpenAtStart))}; // 32-bit base address for frame buffer
|
|
sRsrcHWDevID, d{1};
|
|
|
|
MinorBaseOS, l{"_MinorBaseDAFBPALConv"};
|
|
MinorLength, l{"_MinorLength_DAFB_PALconvFF"};
|
|
|
|
FirstVidMode, l{"_OBM_DAFB_PALFFconv"}; // offset to OneBitMode parameters
|
|
SecondVidMode, l{"_TBM_DAFB_PALFFconv"}; // offset to TwoBitMode parameters
|
|
ThirdVidMode, l{"_FBM_DAFB_PALFFconv"}; // offset to FourBitMode parameters
|
|
FourthVidMode, l{"_EBM_DAFB_PALFFconv"}; // offset to EightBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (990, "_sRsrc_Vid_Tim_LCD") {{
|
|
sRsrcType, l{"_VideoTypeTim"}; // Video Type descriptor
|
|
sRsrcName, l{"_VideoNameTim"}; // offset to Video Name string
|
|
sRsrcDrvrDir, l{"_VidDrvrDirTim"}; // offset to driver directory
|
|
sRsrcFlags, d{(0|(1<<fOpenAtStart))}; // flags
|
|
sRsrcHWDevID, d{1}; // hardware device id
|
|
|
|
MinorBaseOS, l{"_MinorBaseTim"}; // offset to frame buffer array offset
|
|
MinorLength, l{"_MinorLengthLCD"}; // offset to frame buffer length
|
|
|
|
sVidAttributes, d{(0|(1<<fLCDScreen)|(1<<fBuiltInDisplay))}; // built-in display <h46>
|
|
|
|
//Parameters - this consists of a list of the different modes supported by this hardware configuration
|
|
|
|
FirstVidMode, l{"_OBMLCD"}; // offset to OneBitMode parameters
|
|
|
|
}};
|
|
|
|
|
|
//----------------------------------
|
|
|
|
resource 'srsc' (995, "_sRsrc_Vid_Apollo") {{
|
|
sRsrcType, l{"_VideoTypeApollo"}; // Video type descriptor.
|
|
sRsrcName, l{"_VideoNameApollo"}; // Offset to video name string.
|
|
sRsrcDrvrDir, l{"_VidDrvrDirApollo"}; // Offset to driver directory.
|
|