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https://github.com/itomato/macusbdb.git
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670 lines
19 KiB
C
670 lines
19 KiB
C
/*-----------------------------------------------------------------------*/
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/* MMCv3/SDv1/SDv2 (in SPI mode) control module (C)ChaN, 2007 */
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/*-----------------------------------------------------------------------*/
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/* Only rcvr_spi(), xmit_spi(), disk_timerproc() and some macros */
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/* are platform dependent. */
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/*-----------------------------------------------------------------------*/
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#include "projectconfig.h"
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#include "diskio.h"
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#include "core/gpio/gpio.h"
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#include "core/ssp/ssp.h"
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#include "core/systick/systick.h"
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/* Definitions for MMC/SDC command */
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#define CMD0 (0x40+0) /* GO_IDLE_STATE */
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#define CMD1 (0x40+1) /* SEND_OP_COND (MMC) */
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#define ACMD41 (0xC0+41) /* SEND_OP_COND (SDC) */
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#define CMD8 (0x40+8) /* SEND_IF_COND */
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#define CMD9 (0x40+9) /* SEND_CSD */
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#define CMD10 (0x40+10) /* SEND_CID */
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#define CMD12 (0x40+12) /* STOP_TRANSMISSION */
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#define ACMD13 (0xC0+13) /* SD_STATUS (SDC) */
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#define CMD16 (0x40+16) /* SET_BLOCKLEN */
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#define CMD17 (0x40+17) /* READ_SINGLE_BLOCK */
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#define CMD18 (0x40+18) /* READ_MULTIPLE_BLOCK */
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#define CMD23 (0x40+23) /* SET_BLOCK_COUNT (MMC) */
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#define ACMD23 (0xC0+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
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#define CMD24 (0x40+24) /* WRITE_BLOCK */
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#define CMD25 (0x40+25) /* WRITE_MULTIPLE_BLOCK */
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#define CMD55 (0x40+55) /* APP_CMD */
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#define CMD58 (0x40+58) /* READ_OCR */
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/* Port Controls (Platform dependent) */
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#define CS_LOW() gpioSetValue(SSP0_CSPORT, SSP0_CSPIN, 0)
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#define CS_HIGH() gpioSetValue(SSP0_CSPORT, SSP0_CSPIN, 1)
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// #define FCLK_SLOW() /* Set slow clock (100k-400k) */
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// #define FCLK_FAST() /* Set fast clock (depends on the CSD) */
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#define FDELAY(ms) systickDelay(ms) // Assumes delay = 1ms, ugly
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/*--------------------------------------------------------------------------
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Module Private Functions
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---------------------------------------------------------------------------*/
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static volatile
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DSTATUS Stat = STA_NOINIT; /* Disk status */
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static volatile
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BYTE Timer1, Timer2; /* 100Hz decrement timer */
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static
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BYTE CardType; /* Card type flags */
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/**************************************************************************/
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/*!
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Set SSP clock to slow (400 KHz)
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*/
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/**************************************************************************/
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static void FCLK_SLOW()
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{
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/* Divide by 10 (SSPCLKDIV also enables to SSP CLK) */
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SCB_SSP0CLKDIV = SCB_SSP0CLKDIV_DIV10;
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/* (PCLK / (CPSDVSR <20> [SCR+1])) = (7,200,000 / (2 x [8 + 1])) = 400 KHz */
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uint32_t configReg = ( SSP_SSP0CR0_DSS_8BIT // Data size = 8-bit
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| SSP_SSP0CR0_FRF_SPI // Frame format = SPI
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| SSP_SSP0CR0_SCR_8); // Serial clock rate = 8
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// Set clock polarity
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configReg &= ~SSP_SSP0CR0_CPOL_MASK; // Clock polarity = Low between frames
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// Set edge transition
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configReg &= ~SSP_SSP0CR0_CPHA_MASK; // Clock out phase = Leading edge clock transition
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// Assign config values to SSP0CR0
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SSP_SSP0CR0 = configReg;
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/* Clock prescale register must be even and at least 2 in master mode */
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SSP_SSP0CPSR = SSP_SSP0CPSR_CPSDVSR_DIV2;
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}
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/**************************************************************************/
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/*!
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Set SSP clock to fast (4.0 MHz)
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*/
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/**************************************************************************/
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static void FCLK_FAST()
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{
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/* Divide by 1 (SSPCLKDIV also enables to SSP CLK) */
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SCB_SSP0CLKDIV = SCB_SSP0CLKDIV_DIV1;
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/* (PCLK / (CPSDVSR <20> [SCR+1])) = (72,000,000 / (2 x [8 + 1])) = 4.0 MHz */
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uint32_t configReg = ( SSP_SSP0CR0_DSS_8BIT // Data size = 8-bit
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| SSP_SSP0CR0_FRF_SPI // Frame format = SPI
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| SSP_SSP0CR0_SCR_8); // Serial clock rate = 8
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// Set clock polarity
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configReg &= ~SSP_SSP0CR0_CPOL_MASK; // Clock polarity = Low between frames
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// Set edge transition
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configReg &= ~SSP_SSP0CR0_CPHA_MASK; // Clock out phase = Leading edge clock transition
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// Assign config values to SSP0CR0
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SSP_SSP0CR0 = configReg;
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/* Clock prescale register must be even and at least 2 in master mode */
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SSP_SSP0CPSR = SSP_SSP0CPSR_CPSDVSR_DIV2;
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}
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/*-----------------------------------------------------------------------*/
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/* Transmit a byte to MMC via SPI (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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//#define xmit_spi(dat) (SSPSend((uint8_t*)&(dat), 1))
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static void xmit_spi(BYTE dat)
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{
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sspSend(0, (uint8_t*) &dat, 1);
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}
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/*-----------------------------------------------------------------------*/
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/* Receive a byte from MMC via SPI (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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static
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BYTE rcvr_spi (void)
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{
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BYTE data = 0;
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sspReceive(0, &data, 1);
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return data;
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}
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/* Alternative macro to receive data fast */
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#define rcvr_spi_m(dst) \
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do { \
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sspReceive(0, (uint8_t*)(dst), 1); \
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} while(0)
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/*-----------------------------------------------------------------------*/
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/* Wait for card ready */
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/*-----------------------------------------------------------------------*/
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static
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BYTE wait_ready (void)
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{
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BYTE res;
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Timer2 = 50; /* Wait for ready in timeout of 500ms */
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rcvr_spi();
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do
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res = rcvr_spi();
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while ((res != 0xFF) && Timer2);
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return res;
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}
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/*-----------------------------------------------------------------------*/
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/* Deselect the card and release SPI bus */
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/*-----------------------------------------------------------------------*/
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static
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void deselect (void)
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{
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CS_HIGH();
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rcvr_spi();
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}
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/*-----------------------------------------------------------------------*/
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/* Select the card and wait ready */
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/*-----------------------------------------------------------------------*/
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static
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BOOL select (void) /* TRUE:Successful, FALSE:Timeout */
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{
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CS_LOW();
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if (wait_ready() != 0xFF) {
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deselect();
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return FALSE;
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}
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return TRUE;
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}
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/*-----------------------------------------------------------------------*/
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/* Power Control (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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/* When the target system does not support socket power control, there */
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/* is nothing to do in these functions and chk_power always returns 1. */
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static
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void power_on (void)
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{
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}
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static
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void power_off (void)
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{
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}
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static
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int chk_power(void) /* Socket power state: 0=off, 1=on */
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{
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return 1;
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}
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/*-----------------------------------------------------------------------*/
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/* Receive a data packet from MMC */
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/*-----------------------------------------------------------------------*/
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static
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BOOL rcvr_datablock (
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BYTE *buff, /* Data buffer to store received data */
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UINT btr /* Byte count (must be multiple of 4) */
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)
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{
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BYTE token;
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Timer1 = 20;
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do { /* Wait for data packet in timeout of 200ms */
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token = rcvr_spi();
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} while ((token == 0xFF) && Timer1);
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if(token != 0xFE) return FALSE; /* If not valid data token, retutn with error */
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do { /* Receive the data block into buffer */
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rcvr_spi_m(buff++);
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rcvr_spi_m(buff++);
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rcvr_spi_m(buff++);
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rcvr_spi_m(buff++);
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} while (btr -= 4);
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rcvr_spi(); /* Discard CRC */
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rcvr_spi();
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return TRUE; /* Return with success */
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}
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/*-----------------------------------------------------------------------*/
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/* Send a data packet to MMC */
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/*-----------------------------------------------------------------------*/
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#if _READONLY == 0
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static
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BOOL xmit_datablock (
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const BYTE *buff, /* 512 byte data block to be transmitted */
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BYTE token /* Data/Stop token */
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)
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{
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BYTE resp, wc;
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if (wait_ready() != 0xFF) return FALSE;
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xmit_spi(token); /* Xmit data token */
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if (token != 0xFD) { /* Is data token */
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wc = 0;
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do { /* Xmit the 512 byte data block to MMC */
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xmit_spi(*buff++);
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xmit_spi(*buff++);
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} while (--wc);
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xmit_spi(0xFF); /* CRC (Dummy) */
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xmit_spi(0xFF);
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resp = rcvr_spi(); /* Reveive data response */
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if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
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return FALSE;
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}
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return TRUE;
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}
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#endif /* _READONLY */
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/*-----------------------------------------------------------------------*/
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/* Send a command packet to MMC */
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/*-----------------------------------------------------------------------*/
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static
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BYTE send_cmd (
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BYTE cmd, /* Command byte */
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DWORD arg /* Argument */
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)
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{
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BYTE n, res;
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if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
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cmd &= 0x7F;
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res = send_cmd(CMD55, 0);
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if (res > 1) return res;
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}
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/* Select the card and wait for ready */
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deselect();
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if (!select()) return 0xFF;
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/* Send command packet */
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xmit_spi(cmd); /* Start + Command index */
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xmit_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
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xmit_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
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xmit_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
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xmit_spi((BYTE)arg); /* Argument[7..0] */
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n = 0x01; /* Dummy CRC + Stop */
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if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) */
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if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */
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xmit_spi(n);
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/* Receive command response */
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if (cmd == CMD12) rcvr_spi(); /* Skip a stuff byte when stop reading */
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n = 10; /* Wait for a valid response in timeout of 10 attempts */
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do
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res = rcvr_spi();
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while ((res & 0x80) && --n);
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return res; /* Return with the response value */
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}
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/*--------------------------------------------------------------------------
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Public Functions
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---------------------------------------------------------------------------*/
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/*-----------------------------------------------------------------------*/
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/* Initialize Disk Drive */
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/*-----------------------------------------------------------------------*/
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DSTATUS disk_initialize (
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BYTE drv /* Physical drive nmuber (0) */
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)
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{
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BYTE n, cmd, ty, ocr[4];
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gpioSetDir( SSP0_CSPORT, SSP0_CSPIN, 1 ); /* CS */
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gpioSetDir( CFG_SDCARD_CDPORT, CFG_SDCARD_CDPIN, 0 ); /* Card Detect */
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if (drv) return STA_NOINIT; /* Supports only single drive */
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if (Stat & STA_NODISK) return Stat; /* No card in the socket */
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power_on(); /* Force socket power on */
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FCLK_SLOW();
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for (n = 10; n; n--) rcvr_spi(); /* 80 dummy clocks */
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ty = 0;
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if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
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Timer1 = 100; /* Initialization timeout of 1000 msec */
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if (send_cmd(CMD8, 0x1AA) == 1) { /* SDHC */
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for (n = 0; n < 4; n++) ocr[n] = rcvr_spi(); /* Get trailing return value of R7 resp */
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if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
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while (Timer1 && send_cmd(ACMD41, 1UL << 30)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
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if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
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for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();
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ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* SDv2 */
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}
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}
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} else { /* SDSC or MMC */
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if (send_cmd(ACMD41, 0) <= 1) {
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ty = CT_SD1; cmd = ACMD41; /* SDv1 */
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} else {
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ty = CT_MMC; cmd = CMD1; /* MMCv3 */
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}
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while (Timer1 && send_cmd(cmd, 0)); /* Wait for leaving idle state */
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if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set R/W block length to 512 */
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ty = 0;
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}
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}
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CardType = ty;
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deselect();
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if (ty) { /* Initialization succeded */
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Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
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FCLK_FAST();
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} else { /* Initialization failed */
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power_off();
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}
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return Stat;
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}
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/*-----------------------------------------------------------------------*/
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/* Get Disk Status */
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/*-----------------------------------------------------------------------*/
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DSTATUS disk_status (
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BYTE drv /* Physical drive nmuber (0) */
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)
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{
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if (drv) return STA_NOINIT; /* Supports only single drive */
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return Stat;
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}
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/*-----------------------------------------------------------------------*/
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/* Read Sector(s) */
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/*-----------------------------------------------------------------------*/
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DRESULT disk_read (
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BYTE drv, /* Physical drive nmuber (0) */
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BYTE *buff, /* Pointer to the data buffer to store read data */
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DWORD sector, /* Start sector number (LBA) */
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BYTE count /* Sector count (1..255) */
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)
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{
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if (drv || !count) return RES_PARERR;
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if (Stat & STA_NOINIT) return RES_NOTRDY;
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if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
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if (count == 1) { /* Single block read */
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if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
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&& rcvr_datablock(buff, 512))
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count = 0;
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}
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else { /* Multiple block read */
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if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
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do {
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if (!rcvr_datablock(buff, 512)) break;
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buff += 512;
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} while (--count);
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send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
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}
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}
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deselect();
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return count ? RES_ERROR : RES_OK;
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}
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/*-----------------------------------------------------------------------*/
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/* Write Sector(s) */
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/*-----------------------------------------------------------------------*/
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#if _READONLY == 0
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DRESULT disk_write (
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BYTE drv, /* Physical drive nmuber (0) */
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const BYTE *buff, /* Pointer to the data to be written */
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DWORD sector, /* Start sector number (LBA) */
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BYTE count /* Sector count (1..255) */
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)
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{
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if (drv || !count) return RES_PARERR;
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if (Stat & STA_NOINIT) return RES_NOTRDY;
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if (Stat & STA_PROTECT) return RES_WRPRT;
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if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
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if (count == 1) { /* Single block write */
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if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
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&& xmit_datablock(buff, 0xFE))
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count = 0;
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}
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else { /* Multiple block write */
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if (CardType & CT_SDC) send_cmd(ACMD23, count);
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if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
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do {
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if (!xmit_datablock(buff, 0xFC)) break;
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buff += 512;
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} while (--count);
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if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
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count = 1;
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}
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}
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deselect();
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return count ? RES_ERROR : RES_OK;
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}
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#endif /* _READONLY == 0 */
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/*-----------------------------------------------------------------------*/
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/* Miscellaneous Functions */
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/*-----------------------------------------------------------------------*/
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#if _USE_IOCTL != 0
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DRESULT disk_ioctl (
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BYTE drv, /* Physical drive nmuber (0) */
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BYTE ctrl, /* Control code */
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void *buff /* Buffer to send/receive control data */
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)
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{
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DRESULT res;
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BYTE n, csd[16], *ptr = buff;
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WORD csize;
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if (drv) return RES_PARERR;
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res = RES_ERROR;
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if (ctrl == CTRL_POWER) {
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switch (*ptr) {
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case 0: /* Sub control code == 0 (POWER_OFF) */
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if (chk_power())
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power_off(); /* Power off */
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res = RES_OK;
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break;
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case 1: /* Sub control code == 1 (POWER_ON) */
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power_on(); /* Power on */
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res = RES_OK;
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break;
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case 2: /* Sub control code == 2 (POWER_GET) */
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*(ptr+1) = (BYTE)chk_power();
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res = RES_OK;
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break;
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default :
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res = RES_PARERR;
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}
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}
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else {
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if (Stat & STA_NOINIT) return RES_NOTRDY;
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switch (ctrl) {
|
||
case CTRL_SYNC : /* Make sure that no pending write process. Do not remove this or written sector might not left updated. */
|
||
if (select()) {
|
||
res = RES_OK;
|
||
deselect();
|
||
}
|
||
break;
|
||
|
||
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
|
||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||
if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
|
||
csize = csd[9] + ((WORD)csd[8] << 8) + 1;
|
||
*(DWORD*)buff = (DWORD)csize << 10;
|
||
} else { /* SDC ver 1.XX or MMC*/
|
||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||
csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||
*(DWORD*)buff = (DWORD)csize << (n - 9);
|
||
}
|
||
res = RES_OK;
|
||
}
|
||
break;
|
||
|
||
case GET_SECTOR_SIZE : /* Get R/W sector size (WORD) */
|
||
*(WORD*)buff = 512;
|
||
res = RES_OK;
|
||
break;
|
||
|
||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
|
||
if (CardType & CT_SD2) { /* SDC ver 2.00 */
|
||
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
||
rcvr_spi();
|
||
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
||
for (n = 64 - 16; n; n--) rcvr_spi(); /* Purge trailing data */
|
||
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
||
res = RES_OK;
|
||
}
|
||
}
|
||
} else { /* SDC ver 1.XX or MMC */
|
||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
||
if (CardType & CT_SD1) { /* SDC ver 1.XX */
|
||
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
||
} else { /* MMC */
|
||
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
||
}
|
||
res = RES_OK;
|
||
}
|
||
}
|
||
break;
|
||
|
||
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
|
||
*ptr = CardType;
|
||
res = RES_OK;
|
||
break;
|
||
|
||
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
|
||
if (send_cmd(CMD9, 0) == 0 /* READ_CSD */
|
||
&& rcvr_datablock(ptr, 16))
|
||
res = RES_OK;
|
||
break;
|
||
|
||
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
|
||
if (send_cmd(CMD10, 0) == 0 /* READ_CID */
|
||
&& rcvr_datablock(ptr, 16))
|
||
res = RES_OK;
|
||
break;
|
||
|
||
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
|
||
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
||
for (n = 4; n; n--) *ptr++ = rcvr_spi();
|
||
res = RES_OK;
|
||
}
|
||
break;
|
||
|
||
case MMC_GET_SDSTAT : /* Receive SD statsu as a data block (64 bytes) */
|
||
if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
||
rcvr_spi();
|
||
if (rcvr_datablock(ptr, 64))
|
||
res = RES_OK;
|
||
}
|
||
break;
|
||
|
||
default:
|
||
res = RES_PARERR;
|
||
}
|
||
|
||
deselect();
|
||
}
|
||
|
||
return res;
|
||
}
|
||
#endif /* _USE_IOCTL != 0 */
|
||
|
||
|
||
/*-----------------------------------------------------------------------*/
|
||
/* Device Timer Interrupt Procedure (Platform dependent) */
|
||
/*-----------------------------------------------------------------------*/
|
||
/* This function must be called in period of 10ms */
|
||
|
||
void disk_timerproc (void)
|
||
{
|
||
static BYTE pv;
|
||
BYTE n, s;
|
||
|
||
|
||
n = Timer1; /* 100Hz decrement timer */
|
||
if (n) Timer1 = --n;
|
||
n = Timer2;
|
||
if (n) Timer2 = --n;
|
||
|
||
n = pv;
|
||
// pv = SOCKPORT & (SOCKWP | SOCKINS); /* Sample socket switch */
|
||
pv = 0; // gpioGetValue( 0, 1 );
|
||
|
||
// if (n == pv) { /* Have contacts stabled? */
|
||
// s = Stat;
|
||
//
|
||
// /* write protect NOT supported */
|
||
//
|
||
// /* check card detect */
|
||
// if (pv) /* (Socket empty) */
|
||
// s |= (STA_NODISK | STA_NOINIT);
|
||
// else /* (Card inserted) */
|
||
// s &= ~STA_NODISK;
|
||
//
|
||
// Stat = s;
|
||
// }
|
||
}
|
||
|
||
|