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578 lines
15 KiB
C
578 lines
15 KiB
C
/* @(#) $Id: CpuModule_Flags.c,v 1.3 2011-07-18 17:22:55 peschau Exp $ */
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/*=========================================================================*/
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/* Fellow */
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/* 68000 flag and condition code handling */
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/* */
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/* Author: Petter Schau */
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/* */
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/* Copyright (C) 1991, 1992, 1996 Free Software Foundation, Inc. */
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/* */
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/* This program is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation; either version 2, or (at your option) */
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/* any later version. */
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/* */
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/* This program is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with this program; if not, write to the Free Software Foundation, */
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/* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/*=========================================================================*/
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#include "defs.h"
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#include "CpuModule.h"
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#include "CpuModule_Internal.h"
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/// Sets the Z flag for bit operations
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void cpuSetZFlagBitOpsB(UBY res)
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{
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ULO flags = cpu_sr & 0xfffb;
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if (res == 0) flags |= 4;
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cpu_sr = flags;
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}
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/// Sets the Z flag for bit operations
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void cpuSetZFlagBitOpsL(ULO res)
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{
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ULO flags = cpu_sr & 0xfffb;
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if (res == 0) flags |= 4;
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cpu_sr = flags;
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}
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// rm,dm,sm
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ULO cpu_xnvc_flag_add_table[2][2][2] = { 0,0x11,0x11,0x13,0xa,8,8,0x19};
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/// <summary>
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/// Calculate XNVC flags of an add operation.
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/// </summary>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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static ULO cpuMakeFlagXNVCAdd(BOOLE rm, BOOLE dm, BOOLE sm)
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{
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return cpu_xnvc_flag_add_table[rm][dm][sm];
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}
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// rm,dm,sm
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ULO cpu_nvc_flag_add_table[2][2][2] = { 0,1,1,3,0xa,8,8,9};
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/// <summary>
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/// Calculate NVC flags of an add operation for instructions not setting X.
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/// </summary>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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static ULO cpuMakeFlagNVCAdd(BOOLE rm, BOOLE dm, BOOLE sm)
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{
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return cpu_nvc_flag_add_table[rm][dm][sm];
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}
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// rm,dm,sm
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ULO cpu_xnvc_flag_sub_table[2][2][2] = { 0,0x11,2,0,0x19,0x1b,8,0x19};
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/// <summary>
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/// Calculate XNVC flags of a sub operation.
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/// </summary>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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static ULO cpuMakeFlagXNVCSub(BOOLE rm, BOOLE dm, BOOLE sm)
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{
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return cpu_xnvc_flag_sub_table[rm][dm][sm];
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}
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// rm,dm,sm
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ULO cpu_nvc_flag_sub_table[2][2][2] = { 0,1,2,0,9,0xb,8,9};
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/// <summary>
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/// Calculate NVC flags of a sub operation for instructions not setting X.
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/// </summary>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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static ULO cpuMakeFlagNVCSub(BOOLE rm, BOOLE dm, BOOLE sm)
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{
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return cpu_nvc_flag_sub_table[rm][dm][sm];
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}
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/// <summary>
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/// Set the X and C flags to the value f.
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/// </summary>
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/// <param name="f">The new state of the flags.</param>
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void cpuSetFlagXC(BOOLE f)
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{
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cpu_sr = (cpu_sr & 0xffee) | ((f) ? 0x11 : 0);
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}
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/// <summary>
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/// Set the C flag to the value f.
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/// </summary>
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/// <param name="f">The new state of the flag.</param>
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void cpuSetFlagC(BOOLE f)
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{
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cpu_sr = (cpu_sr & 0xfffe) | ((f) ? 1 : 0);
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}
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/// <summary>
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/// Set the V flag.
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/// </summary>
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/// <param name="f">The new state of the flag.</param>
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void cpuSetFlagV(BOOLE f)
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{
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cpu_sr = (cpu_sr & 0xfffd) | ((f) ? 2 : 0);
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}
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/// <summary>
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/// Clear the V flag.
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/// </summary>
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static void cpuClearFlagV(void)
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{
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cpu_sr = cpu_sr & 0xfffd;
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}
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/// <summary>
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/// Get the V flag.
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/// </summary>
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BOOLE cpuGetFlagV(void)
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{
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return cpu_sr & 0x2;
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}
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/// <summary>
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/// Set the N flag.
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/// </summary>
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/// <param name="f">The new state of the flag.</param>
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void cpuSetFlagN(BOOLE f)
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{
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cpu_sr = (cpu_sr & 0xfff7) | ((f) ? 8 : 0);
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}
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/// <summary>
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/// Set the Z flag.
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/// </summary>
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/// <param name="f">The new state of the flag.</param>
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void cpuSetFlagZ(BOOLE f)
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{
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cpu_sr = (cpu_sr & 0xfffb) | ((f) ? 4 : 0);
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}
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/// <summary>
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/// Clear the Z flag.
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/// </summary>
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static void cpuClearFlagZ(void)
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{
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cpu_sr = cpu_sr & 0xfffb;
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}
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/// <summary>
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/// Get the Z flag.
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/// </summary>
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static BOOLE cpuGetFlagZ(void)
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{
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return cpu_sr & 0x4;
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}
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/// <summary>
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/// Get the X flag.
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/// </summary>
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BOOLE cpuGetFlagX(void)
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{
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return cpu_sr & 0x10;
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}
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/// <summary>
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/// Set the flags.
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/// </summary>
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void cpuSetFlags0100(void)
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{
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cpu_sr = (cpu_sr & 0xfff0) | 4;
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}
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/// <summary>
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/// Clear V and C.
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/// </summary>
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void cpuClearFlagsVC(void)
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{
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cpu_sr = cpu_sr & 0xfffc;
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}
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UWO cpuGetZFlagB(UBY res) {return (UWO)((res) ? 0 : 4);}
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UWO cpuGetZFlagW(UWO res) {return (UWO)((res) ? 0 : 4);}
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UWO cpuGetZFlagL(ULO res) {return (UWO)((res) ? 0 : 4);}
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UWO cpuGetNFlagB(UBY res) {return (UWO)((res & 0x80) >> 4);}
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UWO cpuGetNFlagW(UWO res) {return (UWO)((res & 0x8000) >> 12);}
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UWO cpuGetNFlagL(ULO res) {return (UWO)((res & 0x80000000) >> 28);}
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/// <summary>
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/// Set the flags NZVC.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="n">The N flag.</param>
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/// <param name="v">The V flag.</param>
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/// <param name="c">The C flag.</param>
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void cpuSetFlagsNZVC(BOOLE z, BOOLE n, BOOLE v, BOOLE c)
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{
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ULO flags = cpu_sr & 0xfff0;
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if (n) flags |= 8;
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else if (z) flags |= 4;
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if (v) flags |= 2;
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if (c) flags |= 1;
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags VC.
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/// </summary>
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/// <param name="v">The V flag.</param>
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/// <param name="c">The C flag.</param>
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void cpuSetFlagsVC(BOOLE v, BOOLE c)
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{
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ULO flags = cpu_sr & 0xfffc;
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if (v) flags |= 2;
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if (c) flags |= 1;
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags (all) of an add operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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void cpuSetFlagsAdd(BOOLE z, BOOLE rm, BOOLE dm, BOOLE sm)
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{
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ULO flags = cpu_sr & 0xffe0;
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if (z) flags |= 4;
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flags |= cpuMakeFlagXNVCAdd(rm, dm, sm);
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags (all) of a sub operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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void cpuSetFlagsSub(BOOLE z, BOOLE rm, BOOLE dm, BOOLE sm)
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{
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ULO flags = cpu_sr & 0xffe0;
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if (z) flags |= 4;
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flags |= cpuMakeFlagXNVCSub(rm, dm, sm);
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags (all) of an addx operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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void cpuSetFlagsAddX(BOOLE z, BOOLE rm, BOOLE dm, BOOLE sm)
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{
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ULO flags = cpu_sr & ((z) ? 0xffe4 : 0xffe0); // Clear z if result is non-zero
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flags |= cpuMakeFlagXNVCAdd(rm, dm, sm);
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags (all) of a subx operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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void cpuSetFlagsSubX(BOOLE z, BOOLE rm, BOOLE dm, BOOLE sm)
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{
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ULO flags = cpu_sr & ((z) ? 0xffe4 : 0xffe0); // Clear z if result is non-zero
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flags |= cpuMakeFlagXNVCSub(rm, dm, sm);
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags (all) of a neg operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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void cpuSetFlagsNeg(BOOLE z, BOOLE rm, BOOLE dm)
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{
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ULO flags = cpu_sr & 0xffe0;
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if (z) flags |= 4;
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else
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{
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flags |= 0x11; // set XC if result is non-zero
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if (rm)
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{
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flags |= 8;
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if (dm) flags |= 2; // V
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}
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}
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags (all) of a negx operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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void cpuSetFlagsNegx(BOOLE z, BOOLE rm, BOOLE dm)
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{
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ULO flags = cpu_sr & ((z) ? 0xffe4 : 0xffe0); // Clear z if result is non-zero
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if (dm || rm)
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{
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flags |= 0x11; // XC
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if (rm)
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{
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flags |= 8;
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if (dm) flags |= 2; // V
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}
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}
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags (all) of a cmp operation. (Same as sub, but no X.)
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="dm">The MSB of the destination source.</param>
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/// <param name="sm">The MSB of the source.</param>
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void cpuSetFlagsCmp(BOOLE z, BOOLE rm, BOOLE dm, BOOLE sm)
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{
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ULO flags = cpu_sr & 0xfff0;
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if (z) flags |= 4;
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flags |= cpuMakeFlagNVCSub(rm, dm, sm);
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags of a 0 shift count operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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void cpuSetFlagsShiftZero(BOOLE z, BOOLE rm)
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{
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ULO flags = cpu_sr & 0xfff0; // Always clearing the VC flag
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if (rm) flags |= 8;
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else if (z) flags |= 4;
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags of a shift operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="c">The carry of the result.</param>
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/// <param name="c">The overflow of the result.</param>
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void cpuSetFlagsShift(BOOLE z, BOOLE rm, BOOLE c, BOOLE v)
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{
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ULO flags = cpu_sr & 0xffe0;
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if (rm) flags |= 8;
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else if (z) flags |= 4;
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if (v) flags |= 2;
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if (c) flags |= 0x11;
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags of a rotate operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="c">The carry of the result.</param>
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void cpuSetFlagsRotate(BOOLE z, BOOLE rm, BOOLE c)
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{
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ULO flags = cpu_sr & 0xfff0; // Always clearing the V flag
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if (rm) flags |= 8;
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else if (z) flags |= 4;
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if (c) flags |= 1;
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cpu_sr = flags;
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}
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/// <summary>
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/// Set the flags of a rotate with x operation.
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/// </summary>
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/// <param name="z">The Z flag.</param>
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/// <param name="rm">The MSB of the result.</param>
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/// <param name="c">The extend bit and carry of the result.</param>
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void cpuSetFlagsRotateX(UWO z, UWO rm, UWO x)
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{
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cpu_sr = (cpu_sr & 0xffe0) | z | rm | x;
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}
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/// <summary>
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/// Set the flags (ZN00).
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/// </summary>
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void cpuSetFlagsNZ00NewB(UBY res)
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{
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ULO flag = cpu_sr & 0xfff0;
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if (res & 0x80) flag |= 0x8;
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else if (res == 0) flag |= 0x4;
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cpu_sr = flag;
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}
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/// <summary>
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/// Set the flags (ZN00).
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/// </summary>
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void cpuSetFlagsNZ00NewW(UWO res)
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{
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ULO flag = cpu_sr & 0xfff0;
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if (res & 0x8000) flag |= 0x8;
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else if (res == 0) flag |= 0x4;
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cpu_sr = flag;
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}
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/// <summary>
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/// Set the flags (ZN00).
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/// </summary>
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void cpuSetFlagsNZ00NewL(ULO res)
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{
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ULO flag = cpu_sr & 0xfff0;
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if (res & 0x80000000) flag |= 0x8;
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else if (res == 0) flag |= 0x4;
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cpu_sr = flag;
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}
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/// <summary>
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/// Set the flags (ZN00).
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/// </summary>
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void cpuSetFlagsNZ00New64(LLO res)
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{
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ULO flag = cpu_sr & 0xfff0;
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if (res < 0) flag |= 0x8;
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else if (res == 0) flag |= 0x4;
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cpu_sr = flag;
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}
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/// <summary>
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/// Set the 4 flags absolute.
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/// </summary>
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/// <param name="f">flags</param>
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void cpuSetFlagsAbs(UWO f)
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{
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cpu_sr = (cpu_sr & 0xfff0) | f;
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}
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/// <summary>
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/// Calculates the values for the condition codes.
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/// </summary>
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/// <returns>TRUE or FALSE</returns>
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BOOLE cpuCalculateConditionCode0(void)
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{
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return TRUE;
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}
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BOOLE cpuCalculateConditionCode1(void)
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{
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return FALSE;
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}
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BOOLE cpuCalculateConditionCode2(void)
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{
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return !(cpu_sr & 5); // HI - !C && !Z
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}
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BOOLE cpuCalculateConditionCode3(void)
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{
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return cpu_sr & 5; // LS - C || Z
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}
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BOOLE cpuCalculateConditionCode4(void)
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{
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return (~cpu_sr) & 1; // CC - !C
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}
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BOOLE cpuCalculateConditionCode5(void)
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{
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return cpu_sr & 1; // CS - C
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}
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BOOLE cpuCalculateConditionCode6(void)
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{
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return (~cpu_sr) & 4; // NE - !Z
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}
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|
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BOOLE cpuCalculateConditionCode7(void)
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{
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return cpu_sr & 4; // EQ - Z
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}
|
|
|
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BOOLE cpuCalculateConditionCode8(void)
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{
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return (~cpu_sr) & 2; // VC - !V
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}
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|
|
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BOOLE cpuCalculateConditionCode9(void)
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|
{
|
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return cpu_sr & 2; // VS - V
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}
|
|
|
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BOOLE cpuCalculateConditionCode10(void)
|
|
{
|
|
return (~cpu_sr) & 8; // PL - !N
|
|
}
|
|
|
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BOOLE cpuCalculateConditionCode11(void)
|
|
{
|
|
return cpu_sr & 8; // MI - N
|
|
}
|
|
|
|
BOOLE cpuCalculateConditionCode12(void)
|
|
{
|
|
ULO tmp = cpu_sr & 0xa;
|
|
return (tmp == 0xa) || (tmp == 0); // GE - (N && V) || (!N && !V)
|
|
}
|
|
|
|
BOOLE cpuCalculateConditionCode13(void)
|
|
{
|
|
ULO tmp = cpu_sr & 0xa;
|
|
return (tmp == 0x8) || (tmp == 0x2); // LT - (N && !V) || (!N && V)
|
|
}
|
|
|
|
BOOLE cpuCalculateConditionCode14(void)
|
|
{
|
|
ULO tmp = cpu_sr & 0xa;
|
|
return (!(cpu_sr & 0x4)) && ((tmp == 0xa) || (tmp == 0)); // GT - (N && V && !Z) || (!N && !V && !Z)
|
|
}
|
|
|
|
BOOLE cpuCalculateConditionCode15(void)
|
|
{
|
|
ULO tmp = cpu_sr & 0xa;
|
|
return (cpu_sr & 0x4) || (tmp == 0x8) || (tmp == 2);// LE - Z || (N && !V) || (!N && V)
|
|
}
|
|
|
|
BOOLE cpuCalculateConditionCode(ULO cc)
|
|
{
|
|
switch (cc & 0xf)
|
|
{
|
|
case 0: return cpuCalculateConditionCode0();
|
|
case 1: return cpuCalculateConditionCode1();
|
|
case 2: return cpuCalculateConditionCode2();
|
|
case 3: return cpuCalculateConditionCode3();
|
|
case 4: return cpuCalculateConditionCode4();
|
|
case 5: return cpuCalculateConditionCode5();
|
|
case 6: return cpuCalculateConditionCode6();
|
|
case 7: return cpuCalculateConditionCode7();
|
|
case 8: return cpuCalculateConditionCode8();
|
|
case 9: return cpuCalculateConditionCode9();
|
|
case 10: return cpuCalculateConditionCode10();
|
|
case 11: return cpuCalculateConditionCode11();
|
|
case 12: return cpuCalculateConditionCode12();
|
|
case 13: return cpuCalculateConditionCode13();
|
|
case 14: return cpuCalculateConditionCode14();
|
|
case 15: return cpuCalculateConditionCode15();
|
|
}
|
|
return FALSE;
|
|
}
|