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https://github.com/ksherlock/mpw.git
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5976f91a89
- edge-case fixes for bcd ops - tweak division by 0 exception a bit - clean up includes
194 lines
6.7 KiB
C
194 lines
6.7 KiB
C
/* @(#) $Id: CpuModule_EffectiveAddress.c,v 1.3 2012-07-15 22:20:35 peschau Exp $ */
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/*=========================================================================*/
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/* Fellow */
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/* CPU 68k effective address calculation functions */
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/* */
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/* Author: Petter Schau */
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/* */
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/* */
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/* Copyright (C) 1991, 1992, 1996 Free Software Foundation, Inc. */
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/* */
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/* This program is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation; either version 2, or (at your option) */
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/* any later version. */
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/* */
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/* This program is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with this program; if not, write to the Free Software Foundation, */
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/* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/*=========================================================================*/
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#include "defs.h"
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#include "CpuModule_Memory.h"
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#include "CpuModule.h"
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#include "CpuModule_Internal.h"
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/* Calculates EA for (Ax). */
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ULO cpuEA02(ULO regno)
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{
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return cpuGetAReg(regno);
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}
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/* Calculates EA for (Ax)+ */
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ULO cpuEA03(ULO regno, ULO size)
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{
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ULO tmp = cpuGetAReg(regno);
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if (regno == 7 && size == 1) size++;
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cpuSetAReg(regno, tmp + size);
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return tmp;
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}
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/* Calculates EA for -(Ax) */
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ULO cpuEA04(ULO regno, ULO size)
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{
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if (regno == 7 && size == 1) size++;
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cpuSetAReg(regno, cpuGetAReg(regno) - size);
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return cpuGetAReg(regno);
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}
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/* Calculates EA for disp16(Ax) */
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ULO cpuEA05(ULO regno)
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{
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return cpuGetAReg(regno) + cpuGetNextWordSignExt();
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}
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/* Calculates EA for disp8(Ax,Ri.size) with 68020 extended modes. */
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static ULO cpuEA06Ext(UWO ext, ULO base_reg_value, ULO index_value)
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{
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ULO base_displacement;
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ULO outer_displacement;
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BOOLE index_register_suppressed = (ext & 0x0040);
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BOOLE base_register_suppressed = (ext & 0x0080);
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ULO base_displacement_size = (ext >> 4) & 3;
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ULO memory_indirect_action = (ext & 7);
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if (memory_indirect_action == 4
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|| (memory_indirect_action > 4 && index_register_suppressed))
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{
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cpuThrowIllegalInstructionException(TRUE); /* Illegal instruction */
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// Never returns
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}
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if (index_register_suppressed)
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{
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index_value = 0;
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}
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if (base_register_suppressed)
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{
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base_reg_value = 0;
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}
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switch (base_displacement_size)
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{
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case 0: /* Reserved */
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cpuThrowIllegalInstructionException(TRUE); /* Illegal instruction */
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break;
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case 1: /* Null base displacement */
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base_displacement = 0;
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break;
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case 2: /* Word base displacement */
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base_displacement = cpuGetNextWordSignExt();
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break;
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case 3: /* Long base displacement */
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base_displacement = cpuGetNextLong();
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break;
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}
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switch (memory_indirect_action)
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{
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case 0: /* No memory indirect action */
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return base_reg_value + base_displacement + index_value;
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case 1: /* Indirect preindexed with null outer displacement */
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return memoryReadLong(base_reg_value + base_displacement + index_value);
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case 2: /* Indirect preindexed with word outer displacement */
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outer_displacement = cpuGetNextWordSignExt();
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return memoryReadLong(base_reg_value + base_displacement + index_value) + outer_displacement;
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case 3: /* Indirect preindexed with long outer displacement */
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outer_displacement = cpuGetNextLong();
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return memoryReadLong(base_reg_value + base_displacement + index_value) + outer_displacement;
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case 5: /* Indirect postindexed with null outer displacement, reserved for index register suppressed */
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return memoryReadLong(base_reg_value + base_displacement) + index_value;
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case 6: /* Indirect postindexed with word outer displacement, reserved for index register suppressed */
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outer_displacement = cpuGetNextWordSignExt();
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return memoryReadLong(base_reg_value + base_displacement) + index_value + outer_displacement;
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case 7: /* Indirect postindexed with long outer displacement, reserved for index register suppressed */
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outer_displacement = cpuGetNextLong();
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return memoryReadLong(base_reg_value + base_displacement) + index_value + outer_displacement;
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}
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return 0; /* Should never come here. */
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}
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/* Calculates EA for disp8(Ax,Ri.size), calls cpuEA06Ext() for 68020 extended modes. */
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ULO cpuEA06(ULO regno)
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{
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ULO reg_value = cpuGetAReg(regno);
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UWO ext = cpuGetNextWord();
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ULO index_value = cpuGetReg(ext >> 15, (ext >> 12) & 7);
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if (!(ext & 0x0800))
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{
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index_value = cpuSignExtWordToLong((UWO)index_value);
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}
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if (cpuGetModelMajor() >= 2)
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{
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index_value = index_value << ((ext >> 9) & 3); /* Scaling index value */
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if (ext & 0x0100) /* Full extension word */
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{
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return cpuEA06Ext(ext, reg_value, index_value);
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}
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}
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return reg_value + index_value + cpuSignExtByteToLong((UBY)ext);
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}
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/* Calculates EA for xxxx.W */
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ULO cpuEA70(void)
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{
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return cpuGetNextWordSignExt();
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}
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/* Calculates EA for xxxxxxxx.L */
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ULO cpuEA71(void)
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{
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return cpuGetNextLong();
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}
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/// <summary>
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/// Calculates EA for disp16(PC)
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/// </summary>
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/// <returns>Address</returns>
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ULO cpuEA72(void)
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{
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ULO pc_tmp = cpuGetPC();
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return pc_tmp + cpuGetNextWordSignExt();
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}
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/// <summary>
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/// Calculates EA for disp8(PC,Ri.size). Calls cpuEA06Ext() to calculate extended 68020 modes.
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/// </summary>
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/// <returns>Address</returns>
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ULO cpuEA73(void)
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{
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ULO reg_value = cpuGetPC();
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UWO ext = cpuGetNextWord();
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ULO index_value = cpuGetReg(ext >> 15, (ext >> 12) & 0x7);
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if (!(ext & 0x0800))
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{
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index_value = cpuSignExtWordToLong((UWO)index_value);
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}
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if (cpuGetModelMajor() >= 2)
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{
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index_value = index_value << ((ext >> 9) & 0x3); // Scaling index value
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if (ext & 0x0100) // Full extension word
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{
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return cpuEA06Ext(ext, reg_value, index_value);
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}
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}
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return reg_value + index_value + cpuSignExtByteToLong((UBY)ext);
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}
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