all MR loads now working

This commit is contained in:
Elliot Nunn 2018-05-22 13:24:10 +08:00
parent 2606a8f68e
commit 1272fa218c
4 changed files with 876 additions and 170 deletions

View File

@ -366,7 +366,7 @@ IntReturnToOtherBlueContext
IntReturn ; OUTSIDE REFERER
andi. r8, r7, (1 << (31 - 26)) | (1 << (31 - 27))
andi. r8, r7, (1 << (31 - EWA.kFlag26)) | (1 << (31 - EWA.kFlagLowSaves))
mfsprg r1, 0
bnel major_0x02ccc ; my counters say almost never called!
li r8, 0
@ -457,7 +457,7 @@ major_0x02ccc_0x30
isync
rlwimi r25, r26, 2, 22, 29 ; apparently the lower byte of the entry is an FDP (code?) offset, /4!
bnelr
b FDP_011c
b MRExecuted
@ -1139,7 +1139,7 @@ FDP_TableBase equ 0xa00
major_0x03548 ; OUTSIDE REFERER
IcbiNextBlock ; msr r14 // ; OUTSIDE REFERER
sync
mtmsr r14
isync

View File

@ -141,29 +141,29 @@ FDP_00e8 ; lwbrx, lhbrx, lmw, lhzu(x), lhfsu(x), lfdu(x)
b FDP_03AC
FDP_00f4
MRStore4bToWordMod2
srwi r23, r21, 16
sth r23, -0x0004(r19)
sth r23, -4(r19)
subi r17, r17, 4
sth r21, -0x0002(r19)
b FDP_011C
sth r21, -4(r19)
b MRExecuted
FDP_0108
lhz r23, -0x0004(r19)
MRLoad22
lhz r23, -4(r19)
subi r17, r17, 4
insrwi r21, r23, 16, 0
FDP_0114
lhz r23, -0x0002(r19)
MRLoad2
lhz r23, -2(r19)
insrwi r21, r23, 16, 16
FDP_011c ; exported, r25 = address of routine in MixedTable
MRExecuted
li r0, -3
sc
bl major_0x03548
bl IcbiNextBlock ; msr r14 //
rlwinm. r28, r17, 18, 25, 29
mtlr r25
mfsprg r1, 0
@ -285,7 +285,7 @@ FDP_023c
FDP_024c
li r8, 18
b ExceptionMemRetried
b DataLikeException
FDP_0254 ; stswi
@ -441,30 +441,38 @@ FDP_03ac
isync
insrwi r25, r26, 8, 22
bnelr
b FDP_011C
b MRExecuted
FDP_03ec
lbz r23, -0x0008(r19)
lbz r23, -8(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 0
FDP_03f8
lhz r23, -0x0007(r19)
lhz r23, -7(r19)
subi r17, r17, 4
insrwi r20, r23, 16, 8
b FDP_0414
FDP_0408
lbz r23, -0x0006(r19)
lbz r23, -6(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 16
FDP_0414
lwz r23, -0x0005(r19)
lwz r23, -5(r19)
subi r17, r17, 8
inslwi r20, r23, 8, 24
insrwi r21, r23, 24, 0
@ -472,12 +480,12 @@ FDP_0414
FDP_0428
lbz r23, -0x0008(r19)
lbz r23, -8(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 0
FDP_0434
lwz r23, -0x0007(r19)
lwz r23, -7(r19)
subi r17, r17, 8
inslwi r20, r23, 24, 8
insrwi r21, r23, 8, 0
@ -485,13 +493,13 @@ FDP_0434
FDP_0448
lbz r23, -0x0006(r19)
lbz r23, -6(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 16
FDP_0454
lhz r23, -0x0005(r19)
lhz r23, -5(r19)
subi r17, r17, 4
rlwimi r20, r23, 24, 24, 31
insrwi r21, r23, 8, 0
@ -499,110 +507,110 @@ FDP_0454
FDP_0468
lbz r23, -0x0004(r19)
lbz r23, -4(r19)
subi r17, r17, 2
insrwi r21, r23, 8, 0
FDP_0474
lhz r23, -0x0003(r19)
lhz r23, -3(r19)
subi r17, r17, 4
insrwi r21, r23, 16, 8
b FDP_0490
FDP_0484
lbz r23, -0x0002(r19)
lbz r23, -2(r19)
subi r17, r17, 2
insrwi r21, r23, 8, 16
FDP_0490
lbz r23, -0x0001(r19)
lbz r23, -1(r19)
insrwi r21, r23, 8, 24
b FDP_011C
b MRExecuted
FDP_049c
lhz r23, -0x0008(r19)
lhz r23, -8(r19)
subi r17, r17, 4
insrwi r20, r23, 16, 0
b FDP_04B8
FDP_04ac
lbz r23, -0x0007(r19)
lbz r23, -7(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 8
FDP_04b8
lwz r23, -0x0006(r19)
lwz r23, -6(r19)
subi r17, r17, 8
inslwi r20, r23, 16, 16
insrwi r21, r23, 16, 0
b FDP_0114
b MRLoad2bFromWordMod2
FDP_04cc
lbz r23, -0x0005(r19)
lbz r23, -5(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 24
b FDP_0108
b MRLoad4bFromWordMod2
FDP_04dc
lbz r23, -0x0003(r19)
lbz r23, -3(r19)
subi r17, r17, 2
insrwi r21, r23, 8, 8
b FDP_0114
b MRLoad2bFromWordMod2
FDP_04ec
lwz r20, -0x0008(r19)
lwz r20, -8(r19)
subi r17, r17, 8
lwz r21, -0x0004(r19)
b FDP_011C
lwz r21, -4(r19)
b MRExecuted
FDP_04fc
lbz r23, -0x0007(r19)
lbz r23, -7(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 8
FDP_0508
lhz r23, -0x0006(r19)
lhz r23, -6(r19)
subi r17, r17, 4
insrwi r20, r23, 16, 16
lwz r21, -0x0004(r19)
b FDP_011C
lwz r21, -4(r19)
b MRExecuted
FDP_051c
lbz r23, -0x0005(r19)
lbz r23, -5(r19)
subi r17, r17, 2
insrwi r20, r23, 8, 24
lwz r21, -0x0004(r19)
b FDP_011C
lwz r21, -4(r19)
b MRExecuted
FDP_0530
bso cr5, FDP_053C
lwz r21, -0x0004(r19)
b FDP_011C
lwz r21, -4(r19)
b MRExecuted
FDP_053c
li r23, -4
lwarx r21, r23, r19
b FDP_011C
b MRExecuted
FDP_0548
lwz r20, -0x0008(r19)
lwz r21, -0x0004(r19)
b FDP_011C
lwz r20, -8(r19)
lwz r21, -4(r19)
b MRExecuted
FDP_0554
@ -617,155 +625,155 @@ FDP_0554
FDP_0570
srwi r23, r20, 24
stb r23, -0x0008(r19)
stb r23, -8(r19)
subi r17, r17, 2
FDP_057c
srwi r23, r20, 8
sth r23, -0x0007(r19)
sth r23, -7(r19)
subi r17, r17, 4
b FDP_0598
FDP_058c
srwi r23, r20, 8
stb r23, -0x0006(r19)
stb r23, -6(r19)
subi r17, r17, 2
FDP_0598
srwi r23, r21, 8
insrwi r23, r20, 8, 0
stw r23, -0x0005(r19)
stw r23, -5(r19)
subi r17, r17, 8
stb r21, -0x0001(r19)
b FDP_011C
stb r21, -1(r19)
b MRExecuted
FDP_05b0
srwi r23, r20, 24
stb r23, -0x0008(r19)
stb r23, -8(r19)
subi r17, r17, 2
FDP_05bc
srwi r23, r21, 24
insrwi r23, r20, 24, 0
stw r23, -0x0007(r19)
stw r23, -7(r19)
subi r17, r17, 8
b FDP_05FC
FDP_05d0
srwi r23, r20, 8
stb r23, -0x0006(r19)
stb r23, -6(r19)
subi r17, r17, 2
FDP_05dc
srwi r23, r21, 24
insrwi r23, r20, 8, 16
sth r23, -0x0005(r19)
sth r23, -5(r19)
subi r17, r17, 4
b FDP_05FC
FDP_05f0
srwi r23, r21, 24
stb r23, -0x0004(r19)
stb r23, -4(r19)
subi r17, r17, 2
FDP_05fc
srwi r23, r21, 8
sth r23, -0x0003(r19)
sth r23, -3(r19)
subi r17, r17, 4
stb r21, -0x0001(r19)
b FDP_011C
stb r21, -1(r19)
b MRExecuted
FDP_0610
srwi r23, r21, 8
stb r23, -0x0002(r19)
stb r23, -2(r19)
subi r17, r17, 2
FDP_061c
stb r21, -0x0001(r19)
b FDP_011C
stb r21, -1(r19)
b MRExecuted
FDP_0624
srwi r23, r20, 16
sth r23, -0x0008(r19)
sth r23, -8(r19)
subi r17, r17, 4
b FDP_0640
FDP_0634
srwi r23, r20, 16
stb r23, -0x0007(r19)
stb r23, -7(r19)
subi r17, r17, 2
FDP_0640
srwi r23, r21, 16
insrwi r23, r20, 16, 0
stw r23, -0x0006(r19)
stw r23, -6(r19)
subi r17, r17, 8
sth r21, -0x0002(r19)
b FDP_011C
sth r21, -2(r19)
b MRExecuted
FDP_0658
stb r20, -0x0005(r19)
stb r20, -5(r19)
subi r17, r17, 2
b FDP_00F4
b MRStore4bToWordMod2
FDP_0664
srwi r23, r21, 16
stb r23, -0x0003(r19)
stb r23, -3(r19)
subi r17, r17, 2
FDP_0670
sth r21, -0x0002(r19)
b FDP_011C
sth r21, -2(r19)
b MRExecuted
FDP_0678
stw r20, -0x0008(r19)
stw r20, -8(r19)
subi r17, r17, 8
stw r21, -0x0004(r19)
b FDP_011C
stw r21, -4(r19)
b MRExecuted
FDP_0688
srwi r23, r20, 16
stb r23, -0x0007(r19)
stb r23, -7(r19)
subi r17, r17, 2
FDP_0694
sth r20, -0x0006(r19)
sth r20, -6(r19)
subi r17, r17, 4
stw r21, -0x0004(r19)
b FDP_011C
stw r21, -4(r19)
b MRExecuted
FDP_06a4
stb r20, -0x0005(r19)
stb r20, -5(r19)
subi r17, r17, 2
stw r21, -0x0004(r19)
b FDP_011C
stw r21, -4(r19)
b MRExecuted
FDP_06b4
bso cr5, FDP_06C0
stw r21, -0x0004(r19)
b FDP_011C
stw r21, -4(r19)
b MRExecuted
FDP_06c0
@ -774,13 +782,13 @@ FDP_06c0
isync
mfcr r23
rlwimi r13, r23, 0, 0, 3
b FDP_011C
b MRExecuted
FDP_06d8
stw r20, -0x0008(r19)
stw r21, -0x0004(r19)
b FDP_011C
stw r20, -8(r19)
stw r21, -4(r19)
b MRExecuted
FDP_06e4
@ -1666,13 +1674,13 @@ HalfWordTable ; FDP + 0xc00
HalfWordTableEntry 38, FDP_0670
HalfWordTableEntry 39, FDP_0610
HalfWordTableEntry 40, FDP_0114
HalfWordTableEntry 40, MRLoad2bFromWordMod2
HalfWordTableEntry 41, FDP_0484
HalfWordTableEntry 42, FDP_0114
HalfWordTableEntry 42, MRLoad2bFromWordMod2
HalfWordTableEntry 43, FDP_0484
HalfWordTableEntry 44, FDP_0114
HalfWordTableEntry 44, MRLoad2bFromWordMod2
HalfWordTableEntry 45, FDP_0484
HalfWordTableEntry 46, FDP_0114
HalfWordTableEntry 46, MRLoad2bFromWordMod2
HalfWordTableEntry 47, FDP_0484
HalfWordTableEntry 48, FDP_0664
@ -1695,20 +1703,20 @@ HalfWordTable ; FDP + 0xc00
HalfWordTableEntry 64, FDP_06b4
HalfWordTableEntry 65, FDP_05f0
HalfWordTableEntry 66, FDP_00f4
HalfWordTableEntry 66, MRStore4bToWordMod2
HalfWordTableEntry 67, FDP_05f0
HalfWordTableEntry 68, FDP_06b4
HalfWordTableEntry 69, FDP_05f0
HalfWordTableEntry 70, FDP_00f4
HalfWordTableEntry 70, MRStore4bToWordMod2
HalfWordTableEntry 71, FDP_05f0
HalfWordTableEntry 72, FDP_0530
HalfWordTableEntry 73, FDP_0468
HalfWordTableEntry 74, FDP_0108
HalfWordTableEntry 74, MRLoad4bFromWordMod2
HalfWordTableEntry 75, FDP_0468
HalfWordTableEntry 76, FDP_0530
HalfWordTableEntry 77, FDP_0468
HalfWordTableEntry 78, FDP_0108
HalfWordTableEntry 78, MRLoad4bFromWordMod2
HalfWordTableEntry 79, FDP_0468
HalfWordTableEntry 80, FDP_06a4
@ -2351,7 +2359,7 @@ FDP_1354
stw r9, 0x0ea0(r6)
lwz r6, -0x0014(r1)
lwz r7, -0x0010(r1)
b Exception
b CodeLikeException
@ -3841,69 +3849,69 @@ major_0x07d80_0x20 ; OUTSIDE REFERER
FDP_2620
dc.l 0x7C00B8CE
b FDP_011C
b MRExecuted
dc.l 0x7C20B8CE
b FDP_011C
b MRExecuted
dc.l 0x7C40B8CE
b FDP_011C
b MRExecuted
dc.l 0x7C60B8CE
b FDP_011C
b MRExecuted
dc.l 0x7C80B8CE
b FDP_011C
b MRExecuted
dc.l 0x7CA0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7CC0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7CE0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7D00B8CE
b FDP_011C
b MRExecuted
dc.l 0x7D20B8CE
b FDP_011C
b MRExecuted
dc.l 0x7D40B8CE
b FDP_011C
b MRExecuted
dc.l 0x7D60B8CE
b FDP_011C
b MRExecuted
dc.l 0x7D80B8CE
b FDP_011C
b MRExecuted
dc.l 0x7DA0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7DC0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7DE0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7E00B8CE
b FDP_011C
b MRExecuted
dc.l 0x7E20B8CE
b FDP_011C
b MRExecuted
dc.l 0x7E40B8CE
b FDP_011C
b MRExecuted
dc.l 0x7E60B8CE
b FDP_011C
b MRExecuted
dc.l 0x7E80B8CE
b FDP_011C
b MRExecuted
dc.l 0x7EA0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7EC0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7EE0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7F00B8CE
b FDP_011C
b MRExecuted
dc.l 0x7F20B8CE
b FDP_011C
b MRExecuted
dc.l 0x7F40B8CE
b FDP_011C
b MRExecuted
dc.l 0x7F60B8CE
b FDP_011C
b MRExecuted
dc.l 0x7F80B8CE
b FDP_011C
b MRExecuted
dc.l 0x7FA0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7FC0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7FE0B8CE
b FDP_011C
b MRExecuted
dc.l 0x7C00B80E
b FDP_0DA0
dc.l 0x7C20B80E
@ -3968,6 +3976,7 @@ FDP_2620
b FDP_0DA0
dc.l 0x7FE0B80E
b FDP_0DA0
SixEFourPointsHere
dc.l 0x7C00B84E
b FDP_0DA0
dc.l 0x7C20B84E
@ -4097,69 +4106,69 @@ FDP_2620
dc.l 0x7FE0B88E
b FDP_0DA0
dc.l 0x7C00B9CE
b FDP_011C
b MRExecuted
dc.l 0x7C20B9CE
b FDP_011C
b MRExecuted
dc.l 0x7C40B9CE
b FDP_011C
b MRExecuted
dc.l 0x7C60B9CE
b FDP_011C
b MRExecuted
dc.l 0x7C80B9CE
b FDP_011C
b MRExecuted
dc.l 0x7CA0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7CC0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7CE0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7D00B9CE
b FDP_011C
b MRExecuted
dc.l 0x7D20B9CE
b FDP_011C
b MRExecuted
dc.l 0x7D40B9CE
b FDP_011C
b MRExecuted
dc.l 0x7D60B9CE
b FDP_011C
b MRExecuted
dc.l 0x7D80B9CE
b FDP_011C
b MRExecuted
dc.l 0x7DA0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7DC0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7DE0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7E00B9CE
b FDP_011C
b MRExecuted
dc.l 0x7E20B9CE
b FDP_011C
b MRExecuted
dc.l 0x7E40B9CE
b FDP_011C
b MRExecuted
dc.l 0x7E60B9CE
b FDP_011C
b MRExecuted
dc.l 0x7E80B9CE
b FDP_011C
b MRExecuted
dc.l 0x7EA0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7EC0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7EE0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7F00B9CE
b FDP_011C
b MRExecuted
dc.l 0x7F20B9CE
b FDP_011C
b MRExecuted
dc.l 0x7F40B9CE
b FDP_011C
b MRExecuted
dc.l 0x7F60B9CE
b FDP_011C
b MRExecuted
dc.l 0x7F80B9CE
b FDP_011C
b MRExecuted
dc.l 0x7FA0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7FC0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7FE0B9CE
b FDP_011C
b MRExecuted
dc.l 0x7C00B90E
b FDP_104C
dc.l 0x7C20B90E

466
alignments.s Normal file
View File

@ -0,0 +1,466 @@
mrBase equ r19
mrScratch equ r26
mrCtr equ r17
mrHigh equ r20
mrLow equ r21
MRLoad1241
lbz mrScratch, -8(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 0
MRLoad241
lhz mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 4
insrwi mrHigh, mrScratch, 16, 8
b MRLoad41
MRLoad141
lbz mrScratch, -6(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 16
MRLoad41
lwz mrScratch, -5(mrBase)
subi mrCtr, mrCtr, 8
inslwi mrHigh, mrScratch, 8, 24
insrwi mrLow, mrScratch, 24, 0
b MRLoad1
MRLoad1421
lbz mrScratch, -8(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 0
MRLoad421
lwz mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 8
inslwi mrHigh, mrScratch, 24, 8
insrwi mrLow, mrScratch, 8, 0
b MRLoad21
MRLoad1221
lbz mrScratch, -6(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 16
MRLoad221
lhz mrScratch, -5(mrBase)
subi mrCtr, mrCtr, 4
rlwimi mrHigh, mrScratch, 24, 24, 31
insrwi mrLow, mrScratch, 8, 0
b MRLoad21
MRLoad121
lbz mrScratch, -4(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrLow, mrScratch, 8, 0
MRLoad21
lhz mrScratch, -3(mrBase)
subi mrCtr, mrCtr, 4
insrwi mrLow, mrScratch, 16, 8
b MRLoad1
MRLoad11
lbz mrScratch, -2(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrLow, mrScratch, 8, 16
MRLoad1
lbz mrScratch, -1(mrBase)
insrwi mrLow, mrScratch, 8, 24
b MRExecuted
MRLoad242
lhz mrScratch, -8(mrBase)
subi mrCtr, mrCtr, 4
insrwi mrHigh, mrScratch, 16, 0
b MRLoad42
MRLoad142
lbz mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 8
MRLoad42
lwz mrScratch, -6(mrBase)
subi mrCtr, mrCtr, 8
inslwi mrHigh, mrScratch, 16, 16
insrwi mrLow, mrScratch, 16, 0
b MRLoad2
MRLoad122
lbz mrScratch, -5(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 24
b MRLoad22
MRLoad12
lbz mrScratch, -3(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrLow, mrScratch, 8, 8
b MRLoad2
MRLoad44
lwz mrHigh, -8(mrBase)
subi mrCtr, mrCtr, 8
lwz mrLow, -4(mrBase)
b MRExecuted
MRLoad124
lbz mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 8
MRLoad24
lhz mrScratch, -6(mrBase)
subi mrCtr, mrCtr, 4
insrwi mrHigh, mrScratch, 16, 16
lwz mrLow, -4(mrBase)
b MRExecuted
MRLoad14
lbz mrScratch, -5(mrBase)
subi mrCtr, mrCtr, 2
insrwi mrHigh, mrScratch, 8, 24
lwz mrLow, -4(mrBase)
b MRExecuted
MRLoad4
bc BO_IF, 23, @atomic
lwz mrLow, -4(mrBase)
b MRExecuted
@atomic
li mrScratch, -4
lwarx mrLow, mrScratch, mrBase
b MRExecuted
MRLoad8
lwz mrHigh, -8(mrBase)
lwz mrLow, -4(mrBase)
b MRExecuted
MRLoadVector
clrrwi mrScratch, r25, 10
rlwimi mrScratch, mrCtr, 14, 24, 28
addi mrScratch, mrScratch, LVXArray - FDP
mtlr mrScratch
mr mrScratch, r18
_bset r11, r11, 6
blr
MRStore1241
srwi mrScratch, mrHigh, 24
stb mrScratch, -8(mrBase)
subi mrCtr, mrCtr, 2
MRStore241
srwi mrScratch, mrHigh, 8
sth mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 4
b MRStore41
MRStore141
srwi mrScratch, mrHigh, 8
stb mrScratch, -6(mrBase)
subi mrCtr, mrCtr, 2
MRStore41
srwi mrScratch, mrLow, 8
insrwi mrScratch, mrHigh, 8, 0
stw mrScratch, -5(mrBase)
subi mrCtr, mrCtr, 8
stb mrLow, -1(mrBase)
b MRExecuted
MRStore1421
srwi mrScratch, mrHigh, 24
stb mrScratch, -8(mrBase)
subi mrCtr, mrCtr, 2
MRStore421
srwi mrScratch, mrLow, 24
insrwi mrScratch, mrHigh, 24, 0
stw mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 8
b MRStore21
MRStore1221
srwi mrScratch, mrHigh, 8
stb mrScratch, -6(mrBase)
subi mrCtr, mrCtr, 2
MRStore221
srwi mrScratch, mrLow, 24
insrwi mrScratch, mrHigh, 8, 16
sth mrScratch, -5(mrBase)
subi mrCtr, mrCtr, 4
b MRStore21
MRStore121
srwi mrScratch, mrLow, 24
stb mrScratch, -4(mrBase)
subi mrCtr, mrCtr, 2
MRStore21
srwi mrScratch, mrLow, 8
sth mrScratch, -3(mrBase)
subi mrCtr, mrCtr, 4
stb mrLow, -1(mrBase)
b MRExecuted
MRStore11
srwi mrScratch, mrLow, 8
stb mrScratch, -2(mrBase)
subi mrCtr, mrCtr, 2
MRStore1
stb mrLow, -1(mrBase)
b MRExecuted
MRStore242
srwi mrScratch, mrHigh, 16
sth mrScratch, -8(mrBase)
subi mrCtr, mrCtr, 4
b MRStore42
MRStore142
srwi mrScratch, mrHigh, 16
stb mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 2
MRStore42
srwi mrScratch, mrLow, 16
insrwi mrScratch, mrHigh, 16, 0
stw mrScratch, -6(mrBase)
subi mrCtr, mrCtr, 8
sth mrLow, -2(mrBase)
b MRExecuted
MRStore122
stb mrHigh, -5(mrBase)
subi mrCtr, mrCtr, 2
b MRStore22
MRStore12
srwi mrScratch, mrLow, 16
stb mrScratch, -3(mrBase)
subi mrCtr, mrCtr, 2
MRStore2
sth mrLow, -2(mrBase)
b MRExecuted
MRStore44
stw mrHigh, -8(mrBase)
subi mrCtr, mrCtr, 8
stw mrLow, -4(mrBase)
b MRExecuted
MRStore124
srwi mrScratch, mrHigh, 16
stb mrScratch, -7(mrBase)
subi mrCtr, mrCtr, 2
MRStore24
sth mrHigh, -6(mrBase)
subi mrCtr, mrCtr, 4
stw mrLow, -4(mrBase)
b MRExecuted
MRStore14
stb mrHigh, -5(mrBase)
subi mrCtr, mrCtr, 2
stw mrLow, -4(mrBase)
b MRExecuted
MRStore4
bc BO_IF, 23, @atomic
stw mrLow, -4(mrBase)
b MRExecuted
@atomic
li mrScratch, -4
stwcx. mrLow, mrScratch, mrBase
isync
mfcr mrScratch
rlwimi r13, mrScratch, 0, 0, 3
b MRExecuted
MRStore8
stw mrHigh, -8(mrBase)
stw mrLow, -4(mrBase)
b MRExecuted
MRStoreVector
clrrwi mrScratch, r25, 10
rlwimi mrScratch, mrCtr, 14, 24, 28
addi mrScratch, mrScratch, STVXArray - FDP
mtlr mrScratch
mr mrScratch, r18
_bset r11, r11, 6
blr
HalfWordTableEntry 0, MRStoreVector
HalfWordTableEntry 1, MRStoreVector
HalfWordTableEntry 2, MRStoreVector
HalfWordTableEntry 3, MRStoreVector
HalfWordTableEntry 4, MRStoreVector
HalfWordTableEntry 5, MRStoreVector
HalfWordTableEntry 6, MRStoreVector
HalfWordTableEntry 7, MRStoreVector
HalfWordTableEntry 8, MRLoadVector
HalfWordTableEntry 9, MRLoadVector
HalfWordTableEntry 10, MRLoadVector
HalfWordTableEntry 11, MRLoadVector
HalfWordTableEntry 12, MRLoadVector
HalfWordTableEntry 13, MRLoadVector
HalfWordTableEntry 14, MRLoadVector
HalfWordTableEntry 15, MRLoadVector
HalfWordTableEntry 16, MRStore1
HalfWordTableEntry 17, MRStore1
HalfWordTableEntry 18, MRStore1
HalfWordTableEntry 19, MRStore1
HalfWordTableEntry 20, MRStore1
HalfWordTableEntry 21, MRStore1
HalfWordTableEntry 22, MRStore1
HalfWordTableEntry 23, MRStore1
HalfWordTableEntry 24, MRLoad1
HalfWordTableEntry 25, MRLoad1
HalfWordTableEntry 26, MRLoad1
HalfWordTableEntry 27, MRLoad1
HalfWordTableEntry 28, MRLoad1
HalfWordTableEntry 29, MRLoad1
HalfWordTableEntry 30, MRLoad1
HalfWordTableEntry 31, MRLoad1
HalfWordTableEntry 32, MRStore2
HalfWordTableEntry 33, MRStore11
HalfWordTableEntry 34, MRStore2
HalfWordTableEntry 35, MRStore11
HalfWordTableEntry 36, MRStore2
HalfWordTableEntry 37, MRStore11
HalfWordTableEntry 38, MRStore2
HalfWordTableEntry 39, MRStore11
HalfWordTableEntry 40, MRLoad2
HalfWordTableEntry 41, MRLoad11
HalfWordTableEntry 42, MRLoad2
HalfWordTableEntry 43, MRLoad11
HalfWordTableEntry 44, MRLoad2
HalfWordTableEntry 45, MRLoad11
HalfWordTableEntry 46, MRLoad2
HalfWordTableEntry 47, MRLoad11
HalfWordTableEntry 48, MRStore12
HalfWordTableEntry 49, MRStore21
HalfWordTableEntry 50, MRStore12
HalfWordTableEntry 51, MRStore21
HalfWordTableEntry 52, MRStore12
HalfWordTableEntry 53, MRStore21
HalfWordTableEntry 54, MRStore12
HalfWordTableEntry 55, MRStore21
HalfWordTableEntry 56, MRLoad12
HalfWordTableEntry 57, MRLoad21
HalfWordTableEntry 58, MRLoad12
HalfWordTableEntry 59, MRLoad21
HalfWordTableEntry 60, MRLoad12
HalfWordTableEntry 61, MRLoad21
HalfWordTableEntry 62, MRLoad12
HalfWordTableEntry 63, MRLoad21
HalfWordTableEntry 64, MRStore4
HalfWordTableEntry 65, MRStore121
HalfWordTableEntry 66, MRStore22
HalfWordTableEntry 67, MRStore121
HalfWordTableEntry 68, MRStore4
HalfWordTableEntry 69, MRStore121
HalfWordTableEntry 70, MRStore22
HalfWordTableEntry 71, MRStore121
HalfWordTableEntry 72, MRLoad4
HalfWordTableEntry 73, MRLoad121
HalfWordTableEntry 74, MRLoad22
HalfWordTableEntry 75, MRLoad121
HalfWordTableEntry 76, MRLoad4
HalfWordTableEntry 77, MRLoad121
HalfWordTableEntry 78, MRLoad22
HalfWordTableEntry 79, MRLoad121
HalfWordTableEntry 80, MRStore14
HalfWordTableEntry 81, MRStore41
HalfWordTableEntry 82, MRStore14
HalfWordTableEntry 83, MRStore221
HalfWordTableEntry 84, MRStore14
HalfWordTableEntry 85, MRStore41
HalfWordTableEntry 86, MRStore14
HalfWordTableEntry 87, MRStore221
HalfWordTableEntry 88, MRLoad14
HalfWordTableEntry 89, MRLoad41
HalfWordTableEntry 90, MRLoad122
HalfWordTableEntry 91, MRLoad221
HalfWordTableEntry 92, MRLoad14
HalfWordTableEntry 93, MRLoad41
HalfWordTableEntry 94, MRLoad122
HalfWordTableEntry 95, MRLoad221
HalfWordTableEntry 96, MRStore24
HalfWordTableEntry 97, MRStore141
HalfWordTableEntry 98, MRStore42
HalfWordTableEntry 99, MRStore1221
HalfWordTableEntry 100, MRStore24
HalfWordTableEntry 101, MRStore141
HalfWordTableEntry 102, MRStore42
HalfWordTableEntry 103, MRStore1221
HalfWordTableEntry 104, MRLoad24
HalfWordTableEntry 105, MRLoad141
HalfWordTableEntry 106, MRLoad42
HalfWordTableEntry 107, MRLoad1221
HalfWordTableEntry 108, MRLoad24
HalfWordTableEntry 109, MRLoad141
HalfWordTableEntry 110, MRLoad42
HalfWordTableEntry 111, MRLoad1221
HalfWordTableEntry 112, MRStore124
HalfWordTableEntry 113, MRStore241
HalfWordTableEntry 114, MRStore142
HalfWordTableEntry 115, MRStore421
HalfWordTableEntry 116, MRStore124
HalfWordTableEntry 117, MRStore241
HalfWordTableEntry 118, MRStore142
HalfWordTableEntry 119, MRStore421
HalfWordTableEntry 120, MRLoad124
HalfWordTableEntry 121, MRLoad241
HalfWordTableEntry 122, MRLoad142
HalfWordTableEntry 123, MRLoad421
HalfWordTableEntry 124, MRLoad124
HalfWordTableEntry 125, MRLoad241
HalfWordTableEntry 126, MRLoad142
HalfWordTableEntry 127, MRLoad421
HalfWordTableEntry 128, MRStore8
HalfWordTableEntry 129, MRStore1241
HalfWordTableEntry 130, MRStore242
HalfWordTableEntry 131, MRStore1421
HalfWordTableEntry 132, MRStore44
HalfWordTableEntry 133, MRStore1241
HalfWordTableEntry 134, MRStore242
HalfWordTableEntry 135, MRStore1421
HalfWordTableEntry 136, MRLoad8
HalfWordTableEntry 137, MRLoad1241
HalfWordTableEntry 138, MRLoad242
HalfWordTableEntry 139, MRLoad1421
HalfWordTableEntry 140, MRLoad44
HalfWordTableEntry 141, MRLoad1241
HalfWordTableEntry 142, MRLoad242
HalfWordTableEntry 143, MRLoad1421

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#!/usr/bin/env python3
def label(x):
for l in x.split():
print(l)
def directive(x, *args):
argstr = ', '.join(str(x) for x in args)
if argstr: argstr = '\t' + argstr
if argstr and len(x) < 4: argstr = '\t' + argstr
print('\t\t' + x + argstr)
def equ(k, v):
print(str(k) + '\tequ\t' + str(v))
def cmt(*args):
print(';', *args)
def r(x):
return 'r' + str(x)
def v(x):
return 'v' + str(x)
def f(x):
return 'f' + str(x)
def normlshift(x):
while x < 0: x += 32
while x > 31: x -= 32
return x
def sequence_aligned_loadstores(n, ralign):
"""
How do I load/store n bytes, with their RHS aligned to an 8-boundary
modulo ralign, while using only naturally aligned instructions?
Return a string like this: '8', '4', '22', '121'
"""
# (assumes some cheeky cleverness!)
remaining = n
s = ''
while remaining:
ofs = ralign - remaining
if ofs & 1:
g = 1
elif ofs & 2:
g = 2
elif ofs & 4:
g = 4
else:
g = 8
while g > remaining:
g >>= 1
s += str(g)
remaining -= g
return s
def permutations_of_aligned_loadstores():
"""
Get a set containing every permutation of sequence_aligned_loadstores for
n of 1, 2, 3 ... 8 and ralign of 0, 1, 2 ... 7.
"""
x = set()
for length in range(1,9):
for rhsalign in range(8):
x.add(sequence_aligned_loadstores(length, rhsalign))
return x
PERMUTATIONS_OF_ALIGNED_LOADSTORES = permutations_of_aligned_loadstores()
def list_perms_ending_with(x):
"""
Recursive function tuned to help with final_loadstore_list
"""
yield x
subset = set()
for e in PERMUTATIONS_OF_ALIGNED_LOADSTORES:
if e.endswith(x) and len(e) > len(x):
subset.add(e[-len(x)-1])
for nextlet in sorted(subset):
yield from list_perms_ending_with(nextlet + x)
SPECIAL_LOADSTORE_RETURN_PATHS = ['2', '22']
def final_loadstore_list():
"""
Big waterfall of loads/stores!
"""
the_list = []
for ender in '8421':
for x in list_perms_ending_with(ender):
if x not in SPECIAL_LOADSTORE_RETURN_PATHS:
the_list.append(x)
return list(reversed(the_list))
FINAL_LOADSTORE_LIST = final_loadstore_list()
################################################################
# serious-er part of file. codegen functions only!
################################################################
def MRAlignDispatchTable():
"""
Going through this dispatch table (which an int handler does) is the
only route to access MRAlignLoads
"""
directive('align', 10)
label('MRAlignDispatchTable')
hwtab_sizes = ['vector', 1, 2, 3, 4, 5, 6, 7, 8]
for howlong in hwtab_sizes:
cmt(howlong, 'stores/loads')
for ldst in 'sl':
for ralign in range(8):
if howlong == 'vector':
if ldst == 's':
target = 'MRStoreVector'
elif ldst == 'l':
target = 'MRLoadVector'
else: # integer load/store
if ldst == 's':
target = 'MRStore'
elif ldst == 'l':
target = 'MRLoad'
target += sequence_aligned_loadstores(howlong, ralign)
directive('dc.w', '%s - FDP - (* - MRAlignDispatchTable)' % target)
# The table at the very end of the FDP, full of vector instructions!
# called from FDP_0554, which itself comes from the halfwit table, which seems to serve major_0x02ccc
def MRVectorAlignDispatchTable():
pairs = [
('lvx', 'MRExecuted'),
('lvebx', 'FDP_0DA0'),
('lvehx', 'FDP_0DA0'),
('lvewx', 'FDP_0DA0'),
('stvx', 'MRExecuted'),
('stvebx', 'FDP_104C'),
('stvehx', 'FDP_1058'),
('stvewx', 'FDP_1064'),
]
for firstinst_opcode, secondinst_dest in pairs:
label(firstint_opcode.upper()+'Array')
for i in range(32):
directive(firstinst_opcode, v(i), 0, 'r23')
directive('b', secondinst_dest)
def MRAlignLoads():
waterfall = FINAL_LOADSTORE_LIST
for wi in range(len(waterfall)):
thisone = waterfall[wi]
label('MRLoad' + thisone)
size_list = [int(x) for x in thisone]
this_size = size_list[0]
total_size = sum(size_list)
remain_size = sum(size_list[1:])
if thisone == '8': # 2 x lwz
directive('lwz', 'mrLow', '-8(mrBase)')
directive('lwz', 'mrHigh', '-4(mrBase)')
elif thisone == '44': # just do a straight load of the first 4, no scratch
directive('lwz', 'mrHigh', '-%d(mrBase)' % total_size)
directive('subi', 'mrCtr', 'mrCtr', 2 * this_size)
elif thisone == '4': # special case: emulate lwarx if asked
directive('bc', 'BO_IF', 23, '@atomic')
directive('lwz', 'mrLow', '-4(mrBase)')
directive('b', 'MRExecuted')
label('@atomic')
directive('li', 'mrScratch', -4)
directive('lwarx', 'mrScratch', 'mrBase')
else: # use an intermediate scratch register then bit-hack onwards
inst = {1: 'lbz', 2: 'lhz', 4: 'lwz'}[this_size]
directive(inst, 'mrScratch', '-%d(mrBase)' % total_size)
if len(thisone) > 1: directive('subi', 'mrCtr', 'mrCtr', 2 * this_size)
for regexponent, regname in [(4,'mrHigh'), (0,'mrLow')]:
thisexponent = remain_size
if regexponent >= thisexponent + this_size: continue
if thisexponent >= regexponent + 4: continue
lshift = (regexponent - thisexponent) * 8
mask = 0
for i in range(thisexponent, thisexponent + this_size):
i -= regexponent
if not 0 <= i < 4: continue
mask |= 0xFF << (8 * i)
directive('rlwimi', regname, 'mrScratch', normlshift(lshift), '0x%08X' % mask)
# We've done our load. Now jump to the proc that does the rest of them!
if thisone[1:] == '4': # special case... inline an lwz!
directive('lwz', 'mrLow', '-4(mrBase)')
directive('b', 'MRExecuted')
elif remain_size == 0:
directive('b', 'MRExecuted')
elif wi + 1 < len(waterfall) and waterfall[wi+1] == thisone[1:]:
pass # fall through
else:
directive('b', 'MRLoad' + thisone[1:])
print()
MRAlignLoads()