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https://github.com/elliotnunn/powermac-rom.git
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139 lines
4.2 KiB
ArmAsm
139 lines
4.2 KiB
ArmAsm
;_______________________________________________________________________
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; Equates for the whole NanoKernel
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;_______________________________________________________________________
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; Helps with making equates
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; X = 0x00008000, Xbit=16, Xshift=15
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macro
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_bitEqu &bit, &name
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&name equ 1 << (31-&bit)
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bit&name equ &bit
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shift&name equ 31 - &bit
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endm
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kNanoKernelVersion equ $0101
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; PowerPC Machine Status Register (MSR) bits
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; (borrowing the _bitEqu macro from NKInfoRecordsPriv.s)
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_bitEqu 13, MsrPOW
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_bitEqu 15, MsrILE
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_bitEqu 16, MsrEE
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_bitEqu 17, MsrPR
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_bitEqu 18, MsrFP
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_bitEqu 19, MsrME
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_bitEqu 20, MsrFE0
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_bitEqu 21, MsrSE
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_bitEqu 22, MsrBE
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_bitEqu 23, MsrFE1
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_bitEqu 25, MsrIP
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_bitEqu 26, MsrIR
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_bitEqu 27, MsrDR
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_bitEqu 30, MsrRI
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_bitEqu 31, MsrLE
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; Special Purpose Registers (SPRs) not understood by MPW
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l2cr equ 1017
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; Alignment for NanoKernel interrupt routines (mostly Interrupts.s)
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kIntAlign equ 5
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; Junk
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; IRP is 10 pages below KDP (measured start to start)
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; This should be neatened up to describe the kernel global area
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IRPOffset equ (-10) * 4096
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kKDPfromIRP equ 10 * 4096
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kPoolOffsetFromGlobals equ (-7) * 4096 ; goes all the way up to 24 bytes short of PSA
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; Branch instruction BO fields
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; (disregarding static prediction :)
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BO_IF equ 12
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BO_IF_NOT equ 4
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Z equ 0x80000000
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; SIGP (SIGnal Plugin) selectors used by the kernel:
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kStartProcessor equ 1 ; r4 = target CPU idx, r5 = cpu's entry point, r6 = entry point's r3 (CPU struct ptr)
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kStopProcessor equ 3 ; r4 = target CPU idx
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kResetProcessor equ 4 ; r4 = target CPU idx
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kAlert equ 5 ; r4 = target CPU idx? ; my name, has something to do with timers
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kSIGP6 equ 6 ; r4 = target CPU idx?
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kSIGP7 equ 7 ; r4 = target CPU idx?
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kSynchClock equ 8 ; r4 = target CPU idx,
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kSIGP9 equ 9 ; no args?
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kGetProcessorTemp equ 12 ; r4 = selector (ignored on Core99), r5 = cpu ID ; my name
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kSIGP17 equ 17 ; r4 = target CPU idx?
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; Exception cause equates
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; System = FFFFFFFF, Alt = 7DF2F700 (ecInstPageFault and ecDataPageFault disabled), same +/- VM
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ecNoException equ 0
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ecSystemCall equ 1
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ecTrapInstr equ 2
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ecFloatException equ 3
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ecInvalidInstr equ 4
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ecPrivilegedInstr equ 5
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ecMachineCheck equ 7
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ecInstTrace equ 8
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ecInstInvalidAddress equ 10
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ecInstHardwareFault equ 11
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ecInstPageFault equ 12
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ecInstSupAccessViolation equ 14
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ecDataInvalidAddress equ 18
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ecDataHardwareFault equ 19
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ecDataPageFault equ 20
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ecDataWriteViolation equ 21
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ecDataSupAccessViolation equ 22
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ecDataSupWriteViolation equ 23
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ecUnknown24 equ 24
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; FLAGS r7/cr
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crMaskAll equ %11111111
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; Bits 0-7 (CR0-CR1): Exception Cause Number (see equates)
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crMaskExceptionNum equ %11000000
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maskExceptionNum equ 0xFF000000
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crMaskFlags equ %00111111
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maskFlags equ 0x00FFFFFF
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; Bits 8-15 (CR2-CR3) Global Flags
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crMaskGlobalFlags equ %00110000
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maskGlobalFlags equ 0x00FF0000
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_bitEqu 8, GlobalFlagSystem ; raised when System (Emulator) Context is running
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_bitEqu 13, GlobalFlagMQReg ; raised when POWER "Multiply-Quotient" register is present
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; Bits 24-31 (CR6-CR7) Context Flags
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crMaskContextFlags equ %00001111
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maskContextFlags equ 0x0000FFFF
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; Bits 20-23 (CR5) MSR Flags FE0/SE/BE/FE1:
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crMaskMsrFlags equ %00000100
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maskMsrFlags equ 0x00000F00
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; Bits 24-31 (CR6-CR7) Other Context Flags:
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_bitEqu 26, ContextFlagTraceWhenDone ; raised when MSR[SE] is up but we get an unrelated interrupt
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_bitEqu 27, ContextFlagMemRetryErr ; raised when an exception is raised during MemRetry
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_bitEqu 31, ContextFlagResumeMemRetry ; allows MemRetry to be resumed (raised by userspace?)
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mrOpflag1 equ cr3_lt
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mrOpflag2 equ cr3_gt
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mrOpflag3 equ cr3_eq
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mrFlagDidLoad equ cr3_so
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