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1180 lines
43 KiB
Plaintext
1180 lines
43 KiB
Plaintext
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;
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; File: ADBDriver.aii
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;
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; Contains: IOP code for IOP Based ADB driver
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;
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; Written by: Gary G. Davidian 10-Jul-88
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;
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; Copyright: © 1988-1990 by Apple Computer, Inc., all rights reserved.
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;
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; Change History (most recent first):
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;
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; <2> 1/2/90 GGD NEEDED FOR ZONE-5: General source cleanup, no code changes.
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; <1.5> 11/19/89 GGD NEEDED FOR ZONE-5 Added conditional assembly option
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; 'ForceWorstCase' to cause ADB to use more processor time, to
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; stress test the worst case paths of the SWIM Driver. Added
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; facility to control auto-polling on a device address basis so
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; that the ADB Manager can select to only poll addresses that have
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; device table entries.
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; <1.4> 11/2/89 GGD NEEDED FOR ZONE-5 Changed the ADB Polling rate from 13.5ms to
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; 11.0ms to be closer to a floppy disk sector time, and to be
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; consistent with the Mac II ADB Micro poll rate.
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; <1.3> 9/21/89 GGD Added ADBActivity indicator so that the disk driver can give ADB
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; more priority if there was recent activity. Corrected timing
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; calculation in Attn pulse (off by 5µs).
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; <1.2> 7/8/89 CCH No changes. Testing in-file comments for ".aii" suffix files.
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; <1.1> 6/15/89 GGD Updated to use equates for the latest rev of the IOP chip,
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; re-formated tab stops in source.
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; <1.0> 11/9/88 CCH Adding to EASE.
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; 7/10/88 GGD Created today.
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;
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; To Do:
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;
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eject
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title 'IOP ADB Driver'
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; File: ADBDriver.aii - IOP code for IOP Based ADB driver.
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;
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;_______________________________________________________________________
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;
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; Copyright © Apple Computer, Inc. 1988-1989
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;
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; written by Gary G. Davidian 10-Jul-88
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;
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; This module implements the IOP side of the IOP based Apple Desktop Bus
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; Driver. It performs the low level ADB transactions as well as automatic
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; polling of the last device, and automatic service request polling (in
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; Most Recently Used order). The Host CPU will only be interrupted, with
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; a single interrupt per transaction, when there is some device input to
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; be processed.
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;
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; This driver co-exists on the IOP that also has the SWIM Driver, and the
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; SWIM chip is used to drive and receive the ADB bus.
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;
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; NOTE: This code was optimized for space, and also contains many cycle
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; counted timing dependent routines. This may detract from its
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; readability at times, but keep in mind that this code replaces a
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; considerable amount of hardware and saves $$$ (profit sharing).
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;
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; MODIFICATION HISTORY:
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;
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; <10Jul88> GGD Created today.
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;
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;_______________________________________________________________________
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machine m65C02
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codechk off
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datachk off
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longa off
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longi off
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print nomdir,nogen
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print off
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include 'IOPDefs.aii'
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include 'SWIMDefs.aii'
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print on
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hasAltADB equ 1 ; include alternate SWIM based ADB also
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ForceWorstCase equ 0 ; don't simulate worst case data length <1.5>
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; Polling rate definitions
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; These two time constants are used to control auto polling, and service request
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; polling. Explicit commands are serviced immediatly, which may mean that if they
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; are issued at a very high frequency, they may utilize more than 50% of the bus
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; bandwith, and may prevent the processors in the devices from having time to
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; service their device (this is the way that it is done on other machines).
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; During normal AutoPolling, this situation will not occur. But it can occur during
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; Service Request polling.
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;
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; AutoPollRate is the MINIMUM time from the START of a command to the START of
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; the next command when auto polling.
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;
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; SRQPollDelay is the MINIMUM time from the END of a command to the START of
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; the next command. This is used when polling for a device that issued a service
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; request.
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AutoPollRate equ (11000*TMPB1second)/1000000 ; 11.000 MS auto poll interval <1.4>
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SRQPollDelay equ (00500*TMPB1second)/1000000 ; 0.500 MS delay before SRQ polls
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; ADB transaction related definitions
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NumADBAddrs equ 16 ; 16 addresses, 0..15
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ADBCmdMask equ $0F ; mask for command/reg portion of ADB command
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ADBAddrMask equ $F0 ; mask for address portion of ADB command
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ResetCmd equ $00 ; ADB Bus Reset command
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TalkR0Cmd equ $0C ; ADB command Talk Reg 0
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MinDataLen equ 2 ; Data length can be 0, 2..8 bytes
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MaxDataLen equ 8 ; Data length can be 0, 2..8 bytes
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; Message Format
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ADBMsg record 0,increment ; format CPU <-> IOP messages
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Flags ds.b 1 ; modifier/status flags (see below)
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DataCount ds.b 1 ; number of bytes of ADBData (0..8) (cmd not included)
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ADBCmd ds.b 1 ; ADB command to send / command that replied
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ADBData ds.b MaxDataLen ; ADB Data to be sent with command, or data received
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ds.b 1 ; input data buffer (needs 1 extra byte)
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endr
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; ADBMsg.Flags bit definitions
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ExplicitCmd equ %10000000 ; message contains an explicit commmand
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AutoPollEnable equ %01000000 ; auto polling and srq polling enabled
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SetPollEnables equ %00100000 ; Update auto-enable bit mask from ADBData field
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ServiceRequest equ %00000100 ; service request detected
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TimedOut equ %00000010 ; addressed device did not return data
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; Low level message passing state and data buffer assignments
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ADBXmtMsgState equ XMTMsg3State
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ADBRcvMsgState equ RCVMsg3State
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ADBXmtMsgData equ XMTMsg3Data
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ADBRcvMsgData equ RCVMsg3Data
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; Page zero variables
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seg 'zdata'
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ADBVarsZ record
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export ADBActivity ; export activity status for disk driver
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ADBActivity ds.b 1 ; status of last 8 transactions
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ADBFlags ds.b 1 ; status information
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ByteCount ds.b 1 ; number of bytes to send / bytes received
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PollingTMPB ds.b 1 ; index of Polling Timer Param Block
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MRUAddr ds.b 1 ; ADB address most recently received from
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LRUAddr ds.b 1 ; ADB address least recently received from
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AutoPollAddr ds.b 1 ; ADB address to auto poll
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MsgPtr ds.w 1 ; pointer to xmt/rcv message buffer
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Temp ds.b 1 ; general purpose temporary
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SRQcount ds.b 1 ; number of devices searched during SRQ poll
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endr
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; Other Driver variables
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seg 'data'
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ADBVars record
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XmtCmdAndData ds.b 1 ; command byte (must precede SendBuffer)
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ds.b MaxDataLen ; output data buffer
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MRUList ds.b NumADBAddrs ; list of ADB addrs in MRU order
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DisableFlags ds.b NumADBAddrs ; if <> 0 then don't auto-poll this address
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endr
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ReceiveBuffer equ ADBXmtMsgData+ADBMsg.ADBData ; rcv directly into msg buffer
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seg 'code'
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ADBDrvr proc export
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export HandleRCVMsg3 ; ADB driver requests use MSG 3
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export HandleXMTMsg3 ; ADB driver requests use MSG 3
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export InitADBDrvr ; ADB driver initialization
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import GetTMPB
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import CancelTMPBTimer
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import StartTMPBTimer
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import WaitTMPBDone
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import CheckTMPBdone
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import TMPBtimeH
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import TMPBtimeL
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with ADBVarsZ,ADBVars ; globals used throughout driver
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title 'IOP ADB Driver - Initialization'
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;_______________________________________________________________________
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;
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; Routine: jsr InitADBDrvr
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; Inputs: none
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; Outputs: none
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; Destroys: A, X, Y, n, z, c
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; Calls: GetTMPB
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; Called by: SWIMIOP driver initialization
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;
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; Function: Initializes the IOP based ADB Driver variables.
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;
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;_______________________________________________________________________
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InitADBDrvr
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if hasAltADB then
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jsr CheckForAltADB ; patch in SWIM based ADB if present
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endif
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jsr GetTMPB ; get a timer parameter block pointer
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sty <PollingTMPB ; save the TMPB pointer
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* stz <ADBFlags ; initialize the status flags
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assert (ADBXmtMsgData**$FF)=(ADBRcvMsgData**$FF)
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lda #<(ADBXmtMsgData\
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+ADBMsg.ADBCmd) ; get low byte of msg pointer
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sta <MsgPtr ; init low byte of message pointer
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; Initialize the MRU information
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* stz <MRUAddr ; first entry is default MRU
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* stz <AutoPollAddr ; first entry is default Poll device
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ldx #NumADBAddrs-1 ; index/counter
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stx <LRUAddr ; last entry is default LRU
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@MRUInitLoop txa ; prepare to store count
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sta MRUList-1,x ; MRUList[x] := x+1
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dex ; point to prev list
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bne @MRUInitLoop ; init the entire list
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* stz MRUList\
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+NumADBAddrs-1 ; last entry points to first
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rts
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title 'IOP ADB Driver - Host Message Request Handling'
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;_______________________________________________________________________
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;
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; Routine: jsr HandleRCVMsg3
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; Inputs: none
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; Outputs: none
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; Destroys: A, X, Y, n, v, z, c
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; Calls: CopyMsg, ADBAction (branched to)
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; Called by: IOPKernel.HandleHSTInt
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;
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; Function: Handles receiving new messages from the host, by copying
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; the request information, and notifying the host that the
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; message request has been accepted. ADBAction is then
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; called to actually process the command.
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;
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;_______________________________________________________________________
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HandleRCVMsg3 ldx #>ADBRcvMsgData ; get high byte of message pointer
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ldy ADBRcvMsgData\
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+ADBMsg.DataCount ; get the xmt byte count
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lda ADBRcvMsgData\
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+ADBMsg.Flags ; get the new flags
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jsr CopyMsg ; copy the message
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lda #MessageCompleted ; message completed state
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sta ADBRcvMsgState ; indicate that it is done
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lda #MsgCompletedINT ; get the interrupt bit
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sta HostControl ; interrupt the main CPU
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bra ADBAction ; go run a command
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;_______________________________________________________________________
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;
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; Routine: jsr HandleXMTMsg3
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; Inputs: none
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; Outputs: none
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; Destroys: A, X, Y, n, v, z, c
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; Calls: CopyMsg, ADBAction (branched to)
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; Called by: IOPKernel.HandleHSTInt
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;
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; Function: Handles receiving messages replies from the host, by copying
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; the request information, and updating the message state to
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; indicate that the message reply has been accepted.
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; ADBAction is then called to actually process the command.
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;
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;_______________________________________________________________________
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HandleXMTMsg3 ldx #>ADBXmtMsgData ; get high byte of message pointer
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ldy ADBXmtMsgData\
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+ADBMsg.DataCount ; get the xmt byte count
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lda ADBXmtMsgData\
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+ADBMsg.Flags ; get the new flags
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jsr CopyMsg ; copy the message
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assert Idle=0
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* lda #Idle ; Indicate that response was received
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stz ADBXmtMsgState ; set the new message state
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bra ADBAction ; go run a command
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title 'IOP ADB Driver - Polling Request Handling'
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;_______________________________________________________________________
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;
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; Routine: jmp StartSRQPoll
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; Inputs: none
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; Outputs: none
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; Destroys: A, X, n, z, c
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; Calls: CancelPollTimer, StartPolling (branched to)
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; Called by: ADBAction
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;
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; Function: Handles service request polling, by setting up a Talk R0
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; command for the next device in MRU (Most Recently Used) order.
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; It will delay for a short time before issuing the request
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; so that devices on the ADB bus, and the IOP itself will not be
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; saturated by this polling.
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;
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;_______________________________________________________________________
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StartSRQPoll ldx <AutoPollAddr ; get address of last device polled
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@disabled lda MRUList,x ; get the next address to poll for service request
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tax ; save the poll address
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inc <SRQcount ; update the SRQ poll count
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lda <SRQcount ; get the updated count
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cpa #NumADBAddrs ; see if one pass through table completed
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bge @updatePollAddr ; if all enabled addrs searched, search disabled ones
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bit DisableFlags,x ; see if this address is enabled
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bmi @disabled ; if disabled, skip it the first time
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@updatePollAddr stx <AutoPollAddr ; change poll device to next most recently used
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jsr CancelPollTimer ; cancel the autopoll timer
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lda #<SRQPollDelay ; get low byte of poll delay
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* (fall into) bra StartPolling ; poll the next device after a short delay
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;_______________________________________________________________________
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;
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; Routine: jsr StartPolling
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; Inputs: A - low byte of poll timer delay (high byte assumed zero)
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; Outputs: none
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; Destroys: A, X, Y, n, v, z, c
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; Calls: ADBAction (falls into)
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; Called by: ADBAction, StartSRQPoll (branched to)
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;
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; Function: Starts running the polling timer, and returns.
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;
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; When the timer goes off, ADBAction will be called.
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;
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;_______________________________________________________________________
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StartPolling ldy <PollingTMPB ; get the TMPB index
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sta TMPBtimeL,y ; store low into the TMPB
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assert (SRQPollDelay>>8)=(AutoPollRate>>8)
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lda #>AutoPollRate ; get high byte of poll rate
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sta TMPBtimeH,y ; store high into the TMPB
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jsr StartTMPBTimer ; start the timer
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ldy <PollingTMPB ; get the TMPB index
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jsr WaitTMPBdone ; wait for it to time out, return to caller
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; Timer interrupt resumes us here
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* (fall into) bra ADBAction ; when timer goes off, perform some ADB Action
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title 'IOP ADB Driver - Perform ADB Action'
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;_______________________________________________________________________
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;
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; Routine: jmp ADBAction
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; Inputs: none
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; Outputs: none
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; Destroys: A, X, Y, n, v, z, c
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; Calls: StartPolling, CheckTMPBdone, ADBRequest, StartSRQPoll (branched to)
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; Called by: HandleRCVMsg3, HandleXMTMsg3, StartPolling (falls into)
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;
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; Function: Handles ADB request processing, by deciding what if anything
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; should be done. While the IOP to Host transmit message is in
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; use, no ADB action will be performed, since there is no way
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; to notify the Host that it has completed. If an Explicit
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; request is pending, it will be sent, otherwise, auto/SRQ
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; polling will be done if enabled.
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;
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;_______________________________________________________________________
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ADBAction lda ADBXmtMsgState ; get the xmt message state
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assert Idle=0
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bne @Done ; if xmt msg in use, wait until its free
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ldy <PollingTMPB ; get the TMPB index
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jsr CheckTMPBdone ; see if auto poll timer timed out
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bne @Done ; if not, wait until auto poll interval
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lda #<AutoPollRate ; get low byte of auto poll rate
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jsr StartPolling ; setup timer to wake us up later
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; Figure out what to do.
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assert ExplicitCmd=$80 ; n bit
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assert AutoPollEnable=$40 ; v bit
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bit <ADBFlags ; test explicit and auto-poll bits
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bmi @SendIt ; if explicit command, go send it
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bvc @Done ; if implicit, and no auto polling, do nothing
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; If implicit, and polling enabled, create the auto-poll command
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lda <AutoPollAddr ; get the device address to auto poll
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asl a ; shift left 4 bits to position device address
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asl a
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asl a
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asl a
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ora #TalkR0Cmd ; make it a talk R0 command
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sta XmtCmdAndData ; update the command
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stz <ByteCount ; no data to send, now send the command
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@SendIt jsr ADBRequest ; perform the ADB transaction
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; Check the result of the transaction
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lsr <ADBActivity ; shift in zero, assume no activity
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lda <ADBFlags ; get flags
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sta ADBXmtMsgData\
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+ADBMsg.Flags ; return the new flags
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and #ExplicitCmd\
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+AutoPollEnable\
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+TimedOut ; isolate just the flags that we want to check
|
||
|
|
||
|
cpa #AutoPollEnable\
|
||
|
+TimedOut ; test for implicit, auto, no reply
|
||
|
beq @CheckSRQ ; if so, don't notify host, keep on polling
|
||
|
|
||
|
; If explicit command, or reply received, Send ADB transaction result back to host
|
||
|
|
||
|
lda #$80 ; mask to set activity indication
|
||
|
tsb <ADBActivity ; indicate explicit or reply received activity
|
||
|
|
||
|
lda <ByteCount ; get the number of bytes received
|
||
|
sta ADBXmtMsgData\
|
||
|
+ADBMsg.DataCount ; get the xmt byte count
|
||
|
assert (Idle+1)=NewMessageSent
|
||
|
inc ADBXmtMsgState ; change message state Idle -> NewMessageSent
|
||
|
lda #NewMsgSentINT ; prepare to interrupt the host
|
||
|
sta HostControl ; interrupt the host
|
||
|
|
||
|
lda #ExplicitCmd ; prepare to clear explicit bit
|
||
|
trb <ADBFlags ; indicate no longer explicit
|
||
|
bne @Done ; if was explicit, don't check SRQ
|
||
|
stz <SRQcount ; if reply received, reset the SRQ count
|
||
|
|
||
|
; Check for service request, and if so, start SRQ polling
|
||
|
|
||
|
|
||
|
@CheckSRQ lda #ServiceRequest ; prepare to test for service request
|
||
|
bit <ADBFlags ; see if service request was set
|
||
|
bne StartSRQPoll ; if so, start/continue SRQ polling, and return
|
||
|
@Done rts ; otherwise, request is complete
|
||
|
title 'IOP ADB Driver - Utility Routines'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr CopyMsg
|
||
|
; Inputs: A - new flags from ADBMsg.Flags
|
||
|
; X - page number of message buffer
|
||
|
; Y - data count from ADBMsg.DataCount
|
||
|
; Outputs: none
|
||
|
; Destroys: A, X, Y, n, v, z, c
|
||
|
; Calls: CancelPollTimer (falls into)
|
||
|
; Called by: HandleRCVMsg3, HandleXMTMsg3
|
||
|
;
|
||
|
; Function: If an explicit command is not already accepted, it will
|
||
|
; copy the flags, byte count, command and data, from the
|
||
|
; message whose page number was passed in, to prepare for
|
||
|
; starting an ADB transaction. If the new command is an
|
||
|
; explicit command, the poll timer is canceled, so that
|
||
|
; the command can run immediatly.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
CopyMsg bit <ADBFlags ; see if already have an explicit cmd
|
||
|
assert ExplicitCmd=$80 ; n bit
|
||
|
bmi @CopyDone ; if explicit pending, don't overwrite it
|
||
|
stx <MsgPtr+1 ; setup high byte of message pointer
|
||
|
sta <ADBFlags ; set new flags
|
||
|
stz <ByteCount ; send count is zero when implicit
|
||
|
and #ExplicitCmd\
|
||
|
+SetPollEnables ; check for explicit / SetPollEnables
|
||
|
assert ExplicitCmd=$80 ; n bit
|
||
|
bmi @Explicit ; if explicit then copy cmd and data
|
||
|
beq @CopyDone ; if not SetPollEnables, just return
|
||
|
|
||
|
; Process a SetPollEnables request (ignored if ExplicitCmd is also set)
|
||
|
trb <ADBFlags ; reset the SetPollEnables flag
|
||
|
ldy #2 ; 2 bytes of data (16 bit mask)
|
||
|
lda (MsgPtr),y ; get low byte of mask
|
||
|
sta <Temp ; save it
|
||
|
dey ; point to high byte
|
||
|
lda (MsgPtr),y ; get high byte of mask
|
||
|
ldx #NumADBAddrs-1 ; loop counter, index into DisableFlags
|
||
|
@EnablesLoop rol <Temp ; shift the low byte
|
||
|
rol a ; shift the high byte (highest bit into carry)
|
||
|
stz DisableFlags,x ; assume polling enabled
|
||
|
bcs @NextEnable ; if enable bit set, DisableFlags := $00
|
||
|
dec DisableFlags,x ; if enable bit clear, DisableFlags := $FF
|
||
|
@NextEnable dex ; update loop counter and index
|
||
|
bpl @EnablesLoop ; loop through all device addresses
|
||
|
|
||
|
@CopyDone rts ; all done
|
||
|
|
||
|
@Explicit cpy #MaxDataLen+1 ; see if count is reasonable
|
||
|
blt @CopyStart ; if in range start copying
|
||
|
ldy #MaxDataLen ; otherwise, peg it to the Max
|
||
|
@CopyStart sty <ByteCount ; init the send count
|
||
|
@CopyLoop lda (MsgPtr),y ; get a byte from the message
|
||
|
sta XmtCmdAndData,y ; copy it into the send buffer
|
||
|
dey ; dec index/count
|
||
|
bpl @CopyLoop ; copy the command and data
|
||
|
* (fall into) bra CancelPollTimer ; cancel the poll timer and return
|
||
|
|
||
|
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr CancelPollTimer
|
||
|
; Inputs: none
|
||
|
; Outputs: none
|
||
|
; Destroys: A, X, Y, n, v, z, c
|
||
|
; Calls: CancelTMPBTimer
|
||
|
; Called by: StartSRQPoll, CopyMsg (falls into)
|
||
|
;
|
||
|
; Function: Cancels to Auto Polling interval timer.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
CancelPollTimer ldy <PollingTMPB ; get the TMPB index
|
||
|
jmp CancelTMPBTimer ; cancel the timer and return
|
||
|
title 'IOP ADB Driver - Bus Timing'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
; Apple Desktop Bus timing definitions from ADB spec #062-0267 (Rev E)
|
||
|
; Clock counts based upon IOP Clock = 15.6672 MHZ / 8 = 1.9584 MHZ
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
;symbol clocks true clocks time meaning
|
||
|
Tcyc equ 196 ; 195.840 100µs bit cell time
|
||
|
T0 equ 127 ; 127.296 65µs "0" low time
|
||
|
T1 equ 69 ; 68.544 35µs "1" low time
|
||
|
Tattn equ 1567 ; 1566.720 800µs attention signal
|
||
|
Tsynch equ 127 ; 127.296 65µs synch pulse width
|
||
|
Tlt equ 392 ; 391.680 200µs stop to start time
|
||
|
Tstop equ 137 ; 137.088 70µs stop pulse width
|
||
|
Tsrq equ 588 ; 587.520 300µs service request
|
||
|
*Tres equ 5875 ; 5875.200 3ms reset signal (3ms min)
|
||
|
|
||
|
; Additionally we define the following
|
||
|
Tres equ 7834 ; 7833.600 4ms reset signal (40*Tcyc in Rev C)
|
||
|
*TsrqMin equ Tsrq-Tsrq*30/100 ; 210µs Minimum SRQ width is Tsrq - 30%
|
||
|
TsrqMin equ Tsrq-Tsrq*40/100 ; 180µs Minimum SRQ width is Tsrq - 40% (mouse violates spec)
|
||
|
TsrqMax equ Tsrq*130/100 ; 390µs Maximum SRQ width is Tsrq + 30%
|
||
|
TltMax equ Tlt*130/100 ; 260µs Maximum stop to start time is Tlt + 30%
|
||
|
T0Max equ Tcyc*130/100*65/100*105/100 ; 88.725µs Max time between data bit transitions
|
||
|
Tlow equ T1 ; 68.544 35µs initial low phase of bit cell
|
||
|
Tdata equ T0-T1 ; 58.752 30µs middle low or high phase of bit cell
|
||
|
Thigh equ Tcyc-T0 ; 68.544 35µs final high phase of bit cell
|
||
|
|
||
|
assert Tcyc=(T0+T1)
|
||
|
assert Tcyc=(Tlow+Tdata+Thigh)
|
||
|
|
||
|
; The ADB bus is normally high, a transaction is sent as follows.
|
||
|
|
||
|
; Attention signal starts the transaction
|
||
|
;High Bus is high when not in use
|
||
|
;Low Tattn Attention signal
|
||
|
;High Tsynch synch pulse
|
||
|
|
||
|
; The 8 bits of the command are sent, MSB first, LSB last.
|
||
|
;Low Tlow low phase of data bit
|
||
|
;L/H Tdata low if zero, high if one. Data phase of bit
|
||
|
;High Thigh high phase of data bit
|
||
|
|
||
|
; Stop bit follows command
|
||
|
;Low Tstop command stop bit
|
||
|
|
||
|
; Service requests from other devices are indicated here by pulling bus low.
|
||
|
;High Tlt stop bit to start bit
|
||
|
|
||
|
; data if any is as follows (otherwise bus is left high)
|
||
|
|
||
|
;Low Tlow beginning of start bit for data
|
||
|
;High Tdata data phase of start bit
|
||
|
;High Thigh high phase of start bit
|
||
|
|
||
|
; 2..8 bytes are sent, MSB first, LSB last.
|
||
|
;Low Tlow low phase of data bit
|
||
|
;L/H Tdata low if zero, high if one. Data phase of bit
|
||
|
;High Thigh high phase of data bit
|
||
|
|
||
|
; Stop bit follows command
|
||
|
;Low Tstop command stop bit
|
||
|
;High bus left high at end of transaction
|
||
|
title 'IOP ADB Driver - Bus Manipulation'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
; Macros and constants used to read and write the ADB Bus. By using
|
||
|
; these definitions, this code can be easily modified if the polarity,
|
||
|
; bit position, or register addresss ever change. This would allow easy
|
||
|
; migration to an IOP that had direct access to the ADB bus, instead of
|
||
|
; accessing it through the SWIM chip.
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
; ADB output bit
|
||
|
|
||
|
if hasAltADB then
|
||
|
rAltADBoutReg equ rSetup ; SWIM register for ADB output state
|
||
|
wAltADBoutReg equ wSetup ; SWIM register for ADB output state
|
||
|
AltADBoutMask equ Select35 ; bit mask for output bit
|
||
|
endif
|
||
|
rADBoutReg equ TimerDPLLctl ; SWIM register for ADB output state
|
||
|
wADBoutReg equ TimerDPLLctl ; SWIM register for ADB output state
|
||
|
ADBoutMask equ GPOUT0 ; bit mask for output bit
|
||
|
|
||
|
; macros for modifing state of ADBoutReg when it is the Accumulator
|
||
|
|
||
|
macro
|
||
|
ADBoutLow ; change state to cause bus to go Low
|
||
|
ora #ADBoutMask ; output bit is active low
|
||
|
endm
|
||
|
|
||
|
macro
|
||
|
ADBoutHigh ; change state to cause bus to go High
|
||
|
and #≈ADBoutMask ; output bit is active low
|
||
|
endm
|
||
|
|
||
|
; ADB input bit
|
||
|
|
||
|
if hasAltADB then
|
||
|
AltADBinReg equ rHandshake ; SWIM register for ADB input state
|
||
|
AltADBinMask equ DriveSense ; bit mask for input bit
|
||
|
endif
|
||
|
ADBinReg equ TimerDPLLctl ; SWIM register for ADB input state
|
||
|
ADBinMask equ GPIN0 ; bit mask for input bit
|
||
|
|
||
|
; macros for branching on the state of ADBinReg after a BIT instruction
|
||
|
|
||
|
macro
|
||
|
brADBlo &Target ; branch if bus is low
|
||
|
beq &Target ; input bit is active high
|
||
|
endm
|
||
|
|
||
|
macro
|
||
|
brADBhi &Target ; branch if bus is high
|
||
|
bne &Target ; input bit is active high
|
||
|
endm
|
||
|
title 'IOP ADB Driver - Set Bus / Set Bus After'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr SetBus
|
||
|
; Inputs: c - Value to set the ADB bus to.
|
||
|
; Outputs: z - setup for brADBlo/brADBhi testing
|
||
|
; Destroys: A, n, v, z
|
||
|
; Calls: none
|
||
|
; Called by: ADBRequest
|
||
|
;
|
||
|
; Function: Sets the ADB bus output to the state specified by the
|
||
|
; carry bit. Carry reset means bus low, Carry set means
|
||
|
; bus high. After setting the bus, the bus input is read,
|
||
|
; and tested, ready for branching with brADBlo/brADBhi.
|
||
|
; This routine returns to the caller 12 clocks after the
|
||
|
; bus is set.
|
||
|
;
|
||
|
; The Macro SetBusAfter, is provided to allow an exact number
|
||
|
; of clocks to be counted before setting the bus.
|
||
|
; The acceptable clock counts are 27, 29..1301, 1303.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
|
||
|
macro
|
||
|
SetBusAfter &Count ; set bus to carry after "count" clocks
|
||
|
CallWaiting &Count-22,SetBusPlus
|
||
|
endm
|
||
|
|
||
|
macro
|
||
|
CallWaiting &Count,&Routine
|
||
|
lcla &q,&r
|
||
|
&q seta &eval(&Count)/5
|
||
|
&r seta &eval(&Count)//5
|
||
|
if &r=1 then
|
||
|
&q seta &q-1
|
||
|
&r seta &r+5
|
||
|
endif
|
||
|
if &q<1 then
|
||
|
aerror 'Wait value too small'
|
||
|
elseif &q>255 then
|
||
|
aerror 'Wait value too large'
|
||
|
else
|
||
|
lda #&q
|
||
|
jsr &Routine&r
|
||
|
endif
|
||
|
endm
|
||
|
|
||
|
if hasAltADB then
|
||
|
PatchBase
|
||
|
endif
|
||
|
SetBusPlus6 nop ; add 6 clocks before loop
|
||
|
SetBusPlus4 nop ; add 4 clocks before loop
|
||
|
SetBusPlus2 nop ; add 2 clocks before loop
|
||
|
* lda #1 ; ( 2)
|
||
|
* jsr SetBusHighPlus0 ; ( 8)
|
||
|
SetBusPlus0 dea ; (10) decrement loop counter
|
||
|
SetBusPlus3 bne SetBusPlus0 ; (12) loop until A=0
|
||
|
|
||
|
SetBus lda rADBoutReg ; (16) read output register
|
||
|
bcs @SetHigh ; (18) (19)
|
||
|
ADBoutLow ; (20) modify to set bus low
|
||
|
bra @SetBusOutput ; (23)
|
||
|
|
||
|
@SetHigh ADBoutHigh ; (21) modify to set bus high
|
||
|
nop ; (23)
|
||
|
|
||
|
@SetBusOutput sta wADBoutReg ; (27) set the bus high or low
|
||
|
lda #ADBinMask ; ( 2) prepare check bus fighting
|
||
|
bit ADBinReg ; ( 6) test the bus
|
||
|
rts ; (12) all done
|
||
|
if hasAltADB then
|
||
|
|
||
|
gbla &FixrADBoutReg1,&FixOutLowOp1,&FixOutLowData1,&FixOutHighOp1
|
||
|
gbla &FixOutHighData1,&FixwADBoutReg1,&FixADBinMask1,&FixADBinReg1
|
||
|
&FixrADBoutReg1 seta SetBus+1-PatchBase
|
||
|
&FixOutLowOp1 seta SetBus+5-PatchBase
|
||
|
&FixOutLowData1 seta SetBus+6-PatchBase
|
||
|
&FixOutHighOp1 seta @SetHigh+0-PatchBase
|
||
|
&FixOutHighData1 seta @SetHigh+1-PatchBase
|
||
|
&FixwADBoutReg1 seta @SetBusOutput+1-PatchBase
|
||
|
&FixADBinMask1 seta @SetBusOutput+4-PatchBase
|
||
|
&FixADBinReg1 seta @SetBusOutput+6-PatchBase
|
||
|
endif
|
||
|
title 'IOP ADB Driver - ADB Request Transaction'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr ADBrequest
|
||
|
; Inputs: XmtCmdAndData - Command byte, followed by data, if any
|
||
|
; ByteCount - number of data bytes to send (0..8)
|
||
|
; Outputs: ReceiveBuffer - data received from device
|
||
|
; ByteCount - number of data bytes received (0..8)
|
||
|
; ADBFlags.ServiceRequest - set if SRQ detected, else 0
|
||
|
; ADBFlags.TimedOut - set if no reply data received, else 0
|
||
|
; Destroys: A, X, Y, n, v, z. c
|
||
|
; Calls: SetBus, SetBusAfter, SendBytes, @ReceiveReply (branched to)
|
||
|
; Called by: ADBAction
|
||
|
;
|
||
|
; Function: Performs the low level ADB transmission, sending attention,
|
||
|
; sync, command byte, and stop bit. Detects and records
|
||
|
; service requests after command byte's stop bit. Data is
|
||
|
; sent if ByteCount is non-zero, preceded by a start bit,
|
||
|
; and followed by a stop bit.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
ADBrequest
|
||
|
if ForceWorstCase then ; simulate worst case data length <1.5>
|
||
|
ldy #10*8 ; 10 byte times @ 8 bits per byte
|
||
|
@delay sec ; leave bus high
|
||
|
setbusafter (Tcyc*130/100) ; worst case bit time
|
||
|
dey ; update bits remaining count
|
||
|
bne @delay ; loop through all bits
|
||
|
endif ; <1.5>
|
||
|
clc ; prepare to set bus low for attention pulse
|
||
|
jsr SetBus ; ( 12) attn is low for Tattn
|
||
|
lda <ADBFlags ; ( 15) Setup default result flags
|
||
|
and #≈ServiceRequest ; ( 17) Assume no service request
|
||
|
ora #TimedOut ; ( 19) Assume timeout (no receive data)
|
||
|
sta <ADBFlags ; ( 22)
|
||
|
|
||
|
; initialize the receive buffer while attention is being sent.
|
||
|
|
||
|
ldx #MaxDataLen ; ( 24) buffer index
|
||
|
lda #$01 ; ( 26) initialize receive buffer to $01 for shift loop
|
||
|
@RcvBufInitLoop sta ReceiveBuffer,x ; ( 31) ( 101)
|
||
|
dex ; ( 33) ( 103)
|
||
|
bne @RcvBufInitLoop ; ( 36) ( 105)
|
||
|
stz ReceiveBuffer ; ( 109) first byte is zero, to allow for start bit
|
||
|
|
||
|
; check for specially handled reset command
|
||
|
|
||
|
lda XmtCmdAndData ; ( 113) Get the command byte
|
||
|
sta ADBXmtMsgData\
|
||
|
+ADBMsg.ADBCmd ; ( 117) return the command
|
||
|
and #ADBCmdMask ; ( 119) isolate the command
|
||
|
assert ResetCmd=$00
|
||
|
* eor #ResetCmd ; test for reset command
|
||
|
beq @SendReset ; ( 121) ( 122) if reset command, send it
|
||
|
|
||
|
; kill some extra time because Tattn is too long for SetBusAfter range.
|
||
|
|
||
|
* ldx #0 ; X is still zero from above
|
||
|
@AttnLowWait dex ; ( 123) (1398)
|
||
|
bne @AttnLowWait ; ( 126) (1400)
|
||
|
|
||
|
; Send Sync before command byte
|
||
|
|
||
|
ldy #1 ; (1402) byte count is 1, index is 0. ADBcmd
|
||
|
assert Tsynch=(Tcyc-T1) ; sync is same as high phase of a 1 bit (start bit)
|
||
|
SetBusAfter Tattn-Tlow-1402 ; (Tattn-Tlow) (12) beginning of low phase of start bit
|
||
|
jsr SendBytes ; (Tlow) (18) send start bit, ADBcmd, and Stop bit
|
||
|
bcc @BusFite ; (20) report error if fighting (before stop bit)
|
||
|
brADBhi @NoSRQ ; (22) (23) if no fight then no SRQ
|
||
|
|
||
|
; An SRQ is defined as TsrqMin .. TsrqMax of low from the beginning of the stop
|
||
|
; bit, which was Tstop ago. So the min would be TsrqMin - Tstop.
|
||
|
; And the max would be TsrqMax - Tstop.
|
||
|
|
||
|
lda #ADBinMask ; (24) prepare to read the bus
|
||
|
ldx #(TsrqMin\ ; get min srq poll time
|
||
|
-Tstop\ ; Tsrq is defined from start of stop bit
|
||
|
-26\ ; which started its high phase 26 clocks ago
|
||
|
+10)/11 ; (26) Round up, Load min loop counter
|
||
|
@ChkSRQmin bit ADBinReg ; ( 4) test to see if SRQ went away
|
||
|
brADBhi @NoSRQ ; ( 6) Branch if SRQ too short
|
||
|
dex ; ( 8) decrement timeout count
|
||
|
bne @ChkSRQmin ; (11) loop
|
||
|
|
||
|
; if the SRQ was low long enough, make sure it goes back high soon enough
|
||
|
|
||
|
ldx #(TsrqMax\ ; get remaining max srq poll time
|
||
|
-(TsrqMin+2)\ ; adjust for min srq time already waited
|
||
|
+10)/11+1 ; (TsrqMin+2) Load max loop counter (1 extra due to early dec)
|
||
|
@ChkSRQmax dex ; ( 2) decrement timeout count
|
||
|
beq @BusFite ; ( 4) if timed out, SRQ too long
|
||
|
bit ADBinReg ; ( 8) test to see if SRQ is done
|
||
|
brADBlo @ChkSRQmax ; (11) loop until it goes high or times out
|
||
|
|
||
|
lda #ServiceRequest ; Flag valid SRQ detected
|
||
|
tsb <ADBFlags ; update status
|
||
|
|
||
|
; After the stop bit (and possibly SRQ) we wait 200µs (391 clocks) before
|
||
|
; the start bit that indicates the beginning of the data bytes.
|
||
|
|
||
|
@NoSRQ ldx #1 ; (25) initialize buffer index
|
||
|
ldy <ByteCount ; (28) get send byte count
|
||
|
beq @ReceiveReply ; (30) (31) if no data to send, look for a reply
|
||
|
|
||
|
; Send Start bit before data bytes
|
||
|
clc ; (32) prepare to set bus low
|
||
|
SetBusAfter Tlt-32 ; (Tlt) (12) begin start bit before sending data
|
||
|
jsr SendBytes ; send the transmit buffer
|
||
|
* (fall into) brADBhi @Done ; all done if no bus fight
|
||
|
|
||
|
@BusFite
|
||
|
@DataError
|
||
|
@TimeOut
|
||
|
@Done stz <ByteCount ; indicate no bytes in reply
|
||
|
rts ; Done
|
||
|
if hasAltADB then
|
||
|
|
||
|
gbla &FixADBinMask2,&FixADBinReg2,&FixADBinReg3
|
||
|
&FixADBinMask2 seta @ChkSRQmin-3-PatchBase
|
||
|
&FixADBinReg2 seta @ChkSRQmin+1-PatchBase
|
||
|
&FixADBinReg3 seta @ChkSRQmax+4-PatchBase
|
||
|
endif
|
||
|
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Reset is a special case command, the command byte is not sent out
|
||
|
; on the bus, instead, the bus is held low for Tres.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
@ResetLoopCount equ (Tres-(132-15)+1299)/1300
|
||
|
@ResetWait equ (Tres-(132-15))/@ResetLoopCount-(4+15)
|
||
|
|
||
|
@SendReset
|
||
|
* ldx #0 ; X is still zero from above
|
||
|
@ResetLoop inx ; ( 2) increment loop count
|
||
|
cpx #@ResetLoopCount ; ( 4) carry := 1 if limit reached, otherwise 0.
|
||
|
SetBusAfter @ResetWait ; (12) either leave the bus zero, or set it high
|
||
|
bcc @ResetLoop ; (15) loop until last time
|
||
|
rts ; all done
|
||
|
title 'IOP ADB Driver - Receive Reply'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr @ReceiveReply
|
||
|
; Inputs: ByteCount - initialized to zero
|
||
|
; ReceiveBuffer[0] - initialized to zero
|
||
|
; ReceiveBuffer[1..8] - initialized to $01
|
||
|
; Outputs: ReceiveBuffer - data received from device
|
||
|
; ByteCount - number of data bytes received (0..8)
|
||
|
; ADBFlags.TimedOut - set if no reply data received, else 0
|
||
|
; Destroys: A, X, Y, n, v, z. c
|
||
|
; Calls: @UpdateMRU (falls into)
|
||
|
; Called by: ADBRequest
|
||
|
;
|
||
|
; Function: Performs the low level ADB data reception, sending attention,
|
||
|
; sync, command byte, and stop bit. Detects and records
|
||
|
; service requests after command byte's stop bit.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
@ReceiveReply lda #ADBinMask ; ( 33) get the bit mask for testing the bus
|
||
|
; start bit should happen by TltMax after stop bit
|
||
|
ldx #-((T0Max\ ; ( 35) setup low counter/timeout
|
||
|
-0\ ; no extra time to reomve
|
||
|
+10)/11+1) ; Round up, adjust for early inc
|
||
|
ldy #(TltMax\ ; setup start bit timeout
|
||
|
-(37-7)\ ; Adjust for time before/after
|
||
|
+10)/11 ; ( 37) round up
|
||
|
@StartSearch bit ADBinReg ; ( 4) sample the bus
|
||
|
brADBlo @LowLoop ; ( 6) loop until it goes low
|
||
|
dey ; ( 8) check for timeout
|
||
|
bne @StartSearch ; (11) loop until start bit or timeout
|
||
|
rts ; no reply data if start bit timeout
|
||
|
|
||
|
|
||
|
@GetNextBit beq @DataError ; (20) if Shift Data is zero, start bit was zero
|
||
|
ldx #-((T0Max\ ; (22) setup low counter/timeout
|
||
|
-22\ ; adjust for cycles already consumed
|
||
|
+10)/11+1) ; Round up, adjust for early inc
|
||
|
|
||
|
; count number of samples when bus is low
|
||
|
|
||
|
@LowLoop inx ; ( 2) update low count/timeout
|
||
|
beq @TimeOut ; ( 4) if low too long
|
||
|
bit ADBinReg ; ( 8) sample the bus
|
||
|
brADBlo @LowLoop ; (11) loop until it goes high
|
||
|
|
||
|
; count number of samples when bus is high
|
||
|
|
||
|
ldy #-((T0Max\ ; ( 2) setup high counter/timeout
|
||
|
-2\ ; adjust for cycles already consumed
|
||
|
+10)/11+1) ; Round up, adjust for early inc
|
||
|
@HighLoop iny ; ( 2) update high count/timeout
|
||
|
beq @CheckEnd ; ( 4) if high too long (maybe end of data)
|
||
|
bit ADBinReg ; ( 8) sample the bus
|
||
|
brADBhi @HighLoop ; (11) loop until it goes low
|
||
|
|
||
|
; data bit is based on the higher counter
|
||
|
|
||
|
stx <Temp ; ( 3) setup for compare
|
||
|
cpy <Temp ; ( 6) carry := 1 if high >= low
|
||
|
ldx <ByteCount ; ( 9) get count/buffer index
|
||
|
rol ReceiveBuffer,x ; (15) shift the bit in
|
||
|
bcc @GetNextBit ; (17) (18) loop until entire byte is received
|
||
|
|
||
|
cpx #MaxDataLen ; (19) see if end of buffer reached
|
||
|
bge @DataError ; (21) report error if too many bytes received
|
||
|
inc <ByteCount ; (26) update count/buffer index
|
||
|
ldx #-((T0Max\ ; (28) setup timeout counter
|
||
|
-31\ ; adjust for cycles already consumed
|
||
|
+10)/11+1) ; Round up, adjust for early inc
|
||
|
bra @LowLoop ; (31) get next bit
|
||
|
|
||
|
@CheckEnd ldx <ByteCount ; get count/buffer index
|
||
|
dec ReceiveBuffer,x ; test for Shift Data = $01 (no bits shifted in)
|
||
|
bne @TimeOut ; if partial byte received, then this is a timeout
|
||
|
cpx #MinDataLen ; see if the 2 byte minimum was reached
|
||
|
blt @DataError ; if not, then the report the error
|
||
|
|
||
|
lda #TimedOut ; indicate that there is a valid reply
|
||
|
trb <ADBFlags ; update the flags
|
||
|
* (fall into) bra @UpdateMRU ; mark the device as most recent
|
||
|
if hasAltADB then
|
||
|
|
||
|
gbla &FixADBinMask3,&FixADBinReg4,&FixADBinReg5,&FixADBinReg6
|
||
|
&FixADBinMask3 seta @ReceiveReply+1-PatchBase
|
||
|
&FixADBinReg4 seta @StartSearch+1-PatchBase
|
||
|
&FixADBinReg5 seta @LowLoop+4-PatchBase
|
||
|
&FixADBinReg6 seta @HighLoop+4-PatchBase
|
||
|
endif
|
||
|
|
||
|
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr @UpdateMRU
|
||
|
; Inputs: XmtCmdAndData - command whose device is to be made MRU
|
||
|
; Outputs: none
|
||
|
; Destroys: A, X, Y, n, v, z. c
|
||
|
; Calls: none
|
||
|
; Called by: @ReceiveReply (falls into)
|
||
|
;
|
||
|
; Function: Updates the MRU chain by making the specified device the
|
||
|
; most recently used, by removing it from the chain, and
|
||
|
; inserting it before the prior MRU entry, and marking it
|
||
|
; as the head of the MRU chain.
|
||
|
;
|
||
|
; When a Service Request is pending, don't update the MRU,
|
||
|
; because it is about to change again, and we don't want
|
||
|
; the MRU list to change during SRQ polling because if more
|
||
|
; that two devices were sending constant data, only the first
|
||
|
; two would get serviced.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
|
||
|
@UpdateMRU lda #ServiceRequest ; prepare to test service request
|
||
|
bit <ADBFlags ; see if it is set
|
||
|
bne @MRUok ; don't update MRU if SRQ pending
|
||
|
|
||
|
lda XmtCmdAndData ; get the last command sent
|
||
|
lsr a ; shift right 4 bits to get device address
|
||
|
lsr a
|
||
|
lsr a
|
||
|
lsr a
|
||
|
cpa <MRUAddr ; see if already MRU
|
||
|
beq @MRUok ; if so, no need to change anything
|
||
|
|
||
|
tax ; load last address into index reg
|
||
|
bit DisableFlags,x ; see if polling is disabled for this address
|
||
|
bmi @MRUok ; if disabled, don't update the AutoPollAddr
|
||
|
|
||
|
ldy #-1 ; loop counter/index
|
||
|
@MRUloop iny ; inc counter/index
|
||
|
cpa MRUList,y ; look for entry that points to new MRU
|
||
|
bne @MRUloop ; loop until it is found
|
||
|
|
||
|
cpa <LRUAddr ; see if LRU is becoming MRU
|
||
|
bne @DoUpdate ; if not, do normal stuff
|
||
|
sty <LRUAddr ; new LRU is pointer to old LRU
|
||
|
bra @MRUdone ; all done
|
||
|
|
||
|
@DoUpdate lda MRUList,x ; get successor of new MRU
|
||
|
sta MRUList,y ; remove new MRU entry from chain
|
||
|
ldy <LRUAddr ; get pointer to LRU entry
|
||
|
txa ;
|
||
|
sta MRUList,y ; LRU entry points to new MRU entry
|
||
|
lda <MRUAddr ; get pointer to old MRU entry
|
||
|
sta MRUList,x ; new MRU entry points to old MRU entry
|
||
|
@MRUdone stx <MRUAddr ; mark new entry as MRU
|
||
|
stx <AutoPollAddr ; mark new entry as auto poll device
|
||
|
|
||
|
@MRUok rts ; return, with valid reply
|
||
|
title 'IOP ADB Driver - Send Bytes'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr SendBytes
|
||
|
; Inputs: X - index to first byte to send from XmtCmdAndData
|
||
|
; Y - number of bytes to send
|
||
|
; Outputs: c - 0 means send aborted due to bus fighting
|
||
|
; 1 means send was successfull
|
||
|
; z - setup for brADBlo/brADBhi testing
|
||
|
; Destroys: A, X, Y, n, v, z, c
|
||
|
; Calls: SetBusAfter, brADBlo
|
||
|
; Called by: ADBRequest
|
||
|
;
|
||
|
; Function: Sends a start bit, the requested number of bytes, and a
|
||
|
; stop bit. The send will be aborted, and indicated in
|
||
|
; carry bit, if a bus fight occurs on any bit other than the
|
||
|
; stop bit. The fight status of the stop bit is returned in
|
||
|
; the z bit. It is assumed the SetBusAfter was called to
|
||
|
; set the bus low to begin the start bit right before calling
|
||
|
; SendBytes.
|
||
|
;
|
||
|
; This routine returns to the caller 18 clocks after setting
|
||
|
; the stop bit high.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
SendBytes
|
||
|
|
||
|
; Send Start bit before data bytes
|
||
|
|
||
|
stz <Temp ; (21) setup shift data for 1 bit (start bit)
|
||
|
sec ; (23) start bit is a one
|
||
|
|
||
|
; Send the data bytes
|
||
|
|
||
|
@NextBit SetBusAfter Tlow-23 ; (Tlow) (12) wait for end of low phase
|
||
|
bra @SendLoop ; (15) join common code (waste 3 clocks)
|
||
|
|
||
|
@SendLoop sec ; (17)
|
||
|
SetBusAfter Tdata-17 ; (Tdata) (12) set the bus high for Thigh
|
||
|
clc ; (14) prepare to set bus low / flag fight error
|
||
|
brADBlo @Error ; (16) report error if fighting
|
||
|
SetBusAfter Thigh-16 ; (Thigh) (12) set the bus low for Tlow
|
||
|
bit <Temp ; (15) just waste 3 clocks
|
||
|
asl <Temp ; (20) Shift the next bit into carry
|
||
|
bne @NextBit ; (22) (23) loop if not final bit
|
||
|
|
||
|
; drop 1 clock every byte to adjust for 195.84 vs 196.00
|
||
|
; missing clock ; (23)
|
||
|
lda XmtCmdAndData,x ; (27) get the next data byte
|
||
|
sec ; (29) shift in a one, so non-zero until done
|
||
|
rol a ; (31) Shift first bit into carry, 1 into low bit
|
||
|
sta <Temp ; (34) setup shift data
|
||
|
inx ; (36) update the buffer index
|
||
|
dey ; (38) update byte count
|
||
|
bmi @SendStop ; (40) (41) send the entire buffer
|
||
|
SetBusAfter Tlow-40 ; (Tlow) (12) wait for end of low phase
|
||
|
bra @SendLoop ; (15) join common code
|
||
|
|
||
|
; Send Stop bit after data bytes
|
||
|
@SendStop sec ; ( 43)
|
||
|
SetBusAfter Tstop-43 ; (Tstop) (12) stop bit is low for Tstop
|
||
|
@Error rts ; (18) then leave bus high
|
||
|
if hasAltADB then
|
||
|
title 'IOP ADB Driver - CheckForAltADB'
|
||
|
|
||
|
;_______________________________________________________________________
|
||
|
;
|
||
|
; Routine: jsr CheckForAltADB
|
||
|
; Inputs: none
|
||
|
; Outputs: none
|
||
|
; Destroys: A, X, Y, n, z, c
|
||
|
; Calls: none
|
||
|
; Called by: InitADBDrvr
|
||
|
;
|
||
|
; Function: If running on an old IOP chip, patch in the SWIM support.
|
||
|
;
|
||
|
;_______________________________________________________________________
|
||
|
|
||
|
CheckForAltADB ldx #-1 ; PatchTable index, pre-decremented
|
||
|
lda #ADBoutMask ; get the output bit mask
|
||
|
tsb wADBoutReg ; set the output bit
|
||
|
bit rADBoutReg ; see if the bit got set
|
||
|
beq @patchStart ; if clear, running on an old IOP chip
|
||
|
rts ; if set, new IOP, code is correct
|
||
|
|
||
|
; If this is an old IOP chip, we will patch our code to access the SWIM chip
|
||
|
; registers instead.
|
||
|
|
||
|
@addrLoop sta PatchBase,y ; change the code to use the new byte
|
||
|
@addrStart inx ; advance to next entry in the PatchTable
|
||
|
ldy PatchTable,x ; get the code offset to be changed
|
||
|
bne @addrLoop ; loop until end of list
|
||
|
|
||
|
@patchStart inx ; advance to next entry in the PatchTable
|
||
|
lda PatchTable,x ; get the new code byte to be used
|
||
|
bne @addrStart ; loop until end of list
|
||
|
rts ; code now patched for old IOP
|
||
|
|
||
|
|
||
|
FixrADBoutReg1 equ &FixrADBoutReg1
|
||
|
FixwADBoutReg1 equ &FixwADBoutReg1
|
||
|
FixOutLowOp1 equ &FixOutLowOp1
|
||
|
FixOutLowData1 equ &FixOutLowData1
|
||
|
FixOutHighOp1 equ &FixOutHighOp1
|
||
|
FixOutHighData1 equ &FixOutHighData1
|
||
|
FixADBinMask1 equ &FixADBinMask1
|
||
|
FixADBinMask2 equ &FixADBinMask2
|
||
|
FixADBinMask3 equ &FixADBinMask3
|
||
|
FixADBinReg1 equ &FixADBinReg1
|
||
|
FixADBinReg2 equ &FixADBinReg2
|
||
|
FixADBinReg3 equ &FixADBinReg3
|
||
|
FixADBinReg4 equ &FixADBinReg4
|
||
|
FixADBinReg5 equ &FixADBinReg5
|
||
|
FixADBinReg6 equ &FixADBinReg6
|
||
|
|
||
|
PatchTable
|
||
|
dc.b rAltADBoutReg**$FF ; change reads to the ADBoutReg
|
||
|
dc.b FixrADBoutReg1
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b wAltADBoutReg**$FF ; change writes to the ADBoutReg
|
||
|
dc.b FixwADBoutReg1
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b $29 ; change the 'ora' to an 'and'
|
||
|
dc.b FixOutLowOp1
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b ≈AltADBoutMask ; active high output data
|
||
|
dc.b FixOutLowData1
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b $09 ; change the 'and' to an 'ora'
|
||
|
dc.b FixOutHighOp1
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b AltADBoutMask ; active high output data
|
||
|
dc.b FixOutHighData1
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b AltADBinMask ; change loads of the ADBinMask
|
||
|
dc.b FixADBinMask1
|
||
|
dc.b FixADBinMask2
|
||
|
dc.b FixADBinMask3
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b AltADBinReg**$FF ; change reads to the ADBinReg
|
||
|
dc.b FixADBinReg1
|
||
|
dc.b FixADBinReg2
|
||
|
dc.b FixADBinReg3
|
||
|
dc.b FixADBinReg4
|
||
|
dc.b FixADBinReg5
|
||
|
dc.b FixADBinReg6
|
||
|
dc.b 0
|
||
|
|
||
|
dc.b 0 ; end of table
|
||
|
endif
|
||
|
endwith
|
||
|
endproc
|
||
|
|
||
|
end
|
||
|
|