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389 lines
13 KiB
Plaintext
389 lines
13 KiB
Plaintext
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;
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; File: DBDMA.a
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;
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; Contains: public headers defining the Descriptor Based DMA standard
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;
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; Written by: Craig Prouse
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;
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; Copyright: © 1993-1994 by Apple Computer, Inc., all rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM3> 1/10/94 chp Comment out WAIT command value. This identifier conflicts with
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; something in SonyEqu.a that should be encapsulated in a record.
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; However, WAIT may soon be obsolete anyway.
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; <SM2> 12/13/93 chp Add TStat encodings.
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; <SM1> 11/10/93 fau first checked in
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; <SMG2> 10/26/93 chp Checking in the first “complete” version. Some macros changed
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; for compatibility with C equivalents.
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;
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;
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IF &TYPE('__INCLUDINGDBDMA__') = 'UNDEFINED' THEN
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__INCLUDINGDBDMA__ SET 1
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IF &TYPE('__INCLUDINGENDIANAWARE__') = 'UNDEFINED' THEN
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INCLUDE 'EndianAware.a'
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ENDIF
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; This structure defines the standard set of DB-DMA channel registers.
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DBDMAChannelRegisters record 0
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channelControl ds.l 1
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channelStatus ds.l 1
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commandPtrHi ds.l 1 ; implementation optional
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commandPtrLo ds.l 1
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dataPtrHi ds.l 1 ; implementation optional
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dataPtrLo ds.l 1
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byteCount ds.l 1
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reserved1 ds.l 1
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data2PtrHi ds.l 1 ; implementation optional
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data2PtrLo ds.l 1 ; implementation optional
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transferModes ds.l 1 ; implementation optional
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addressHi ds.l 1 ; implementation optional
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reserved2 ds.l 4
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unimplemented ds.l 16
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; This structure must remain fully padded to 256 bytes.
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undefined ds.l 32
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IF * <> 256 THEN
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AERROR ('DBDMAChannelRegisters is the wrong size!')
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ENDIF
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endr
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; These constants define the DB-DMA channel control words and status flags.
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kdbdmaSetRun equ $80008000
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kdbdmaClrRun equ $80000000
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kdbdmaSetPause equ $40004000
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kdbdmaClrPause equ $40000000
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kdbdmaClrHalted equ $20000000
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kdbdmaClrDead equ $10000000
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kdbdmaSetActive equ $08000800
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kdbdmaSetS3 equ $00080008
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kdbdmaClrS3 equ $00080000
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kdbdmaSetS2 equ $00040004
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kdbdmaClrS2 equ $00040000
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kdbdmaSetS1 equ $00020002
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kdbdmaClrS1 equ $00020000
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kdbdmaSetS0 equ $00010001
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kdbdmaClrS0 equ $00010000
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kdbdmaClrAll equ $F00F0000
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kdbdmaHalted equ $2000
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kdbdmaDead equ $1000
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kdbdmaActive equ $0800
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kdbdmaPaused equ $0400
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kTStatMore equ $0000
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kTStatDone equ $0100
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kTStatDiff equ $0200
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kTStatError equ $0300
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kdbdmaTStatMask equ $0300
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kdbdmaS3 equ $0008
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kdbdmaS2 equ $0004
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kdbdmaS1 equ $0002
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kdbdmaS0 equ $0001
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; This structure defines the DB-DMA channel command descriptor.
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; *** WARNING: Endian-ness issues must be considered when performing load/store! ***
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; *** DB-DMA specifies memory organization as quadlets so it is not correct
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; *** to think of either the operation or result field as two 16-bit fields.
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; *** This would have undesirable effects on the byte ordering within their
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; *** respective quadlets.
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DBDMADescriptor record 0
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operation ds.l 1 ; MSW = command, LSW = reqCount
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address ds.l 1
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data32 ds.l 1
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result ds.l 1 ; MSW = xferStatus, LSW = resCount
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size equ *
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endr
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; These constants define the DB-DMA channel command operations and modifiers.
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; Command.cmd operations
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OUTPUT_MORE equ $0000
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OUTPUT_LAST equ $0100
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INPUT_MORE equ $0200
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INPUT_LAST equ $0300
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STORE_QUAD equ $0400
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LOAD_QUAD equ $0500
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JUMP equ $0600
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;WAIT equ $0700
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STOP equ $0800
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kdbdmaCmdMask equ $0F00
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; Command.test modifiers (choose all that apply)
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kTestMore equ $1000
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kTestDone equ $2000
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kTestDiff equ $4000
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kTestError equ $8000
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kdbdmaTestMask equ $F000
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; Command.i modifiers (choose one)
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kIntError equ $0000 ; default modifier
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kIntErrorDiff equ $0040
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kIntErrorDiffDone equ $0080
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kIntAll equ $00C0
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kdbdmaIMask equ $00C0
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; Command.h modifiers (choose one)
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kHaltError equ $0000 ; default modifier
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kHaltErrorDiff equ $0010
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kHaltErrorDiffDone equ $0020
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kHaltNone equ $0030
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kdbdmaHMask equ $0030
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; Command.cdep.key modifiers (choose one for INPUT, OUTPUT, LOAD, and STORE operations)
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KEY_STREAM0 equ $0000 ; default modifier
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KEY_STREAM1 equ $0001
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KEY_STREAM2 equ $0002
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KEY_STREAM3 equ $0003
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KEY_REGS equ $0005
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KEY_SYSTEM equ $0006
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KEY_DEVICE equ $0007
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kdbdmaKeyMask equ $0007
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; Command.cdep.cond modifiers (choose all that apply for JUMP and WAIT operations)
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kFailZerosFailOnes equ $0001
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kFailZerosPassOnes equ $0002
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kPassZerosFailOnes equ $0004
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kPassZerosPassOnes equ $0008
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kdbdmaCondMask equ $000F
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _MakeCCDescriptor (macro)
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;
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; In: A0 pointer to a channel command descriptor buffer
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; D0.L DMA command in high word, DMA request count in low word
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; A1 DMA address
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;
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; Notes: D0/D1 are never preserved.
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; The macro generates code for either big-endian or little-endian storage.
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; The command field must be written to memory last for STOP replacement.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_MakeCCDescriptor
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adda.w #DBDMADescriptor.size,a0
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clr.l -(a0) ; initialize status and residual count
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clr.l -(a0) ; data32 is usually reserved
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move.l a1,d1
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endsw.l d1
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move.l d1,-(a0) ; address
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nop
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endsw.l d0
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move.l d0,-(a0) ; command and count
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nop
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _MakeData32CCDescriptor (macro)
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;
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; In: A0 pointer to a channel command descriptor buffer
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; D0.L DMA command in high word, DMA reqCount in low word
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; D1.L 32-bit data word for STORE_QUAD
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; A1 DMA address
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;
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; Notes: D0/D1 are never preserved.
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; The macro generates code for either big-endian or little-endian storage.
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; The command field must be written to memory last for STOP replacement.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_MakeData32CCDescriptor
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adda.w #DBDMADescriptor.size,a0
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clr.l -(a0) ; initialize status and residual count
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endsw.l d1
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move.l d1,-(a0) ; data32
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move.l a1,d1
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endsw.l d1
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move.l d1,-(a0) ; address
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nop
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endsw.l d0
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move.l d0,-(a0) ; command and count
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nop
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _GetCCOperation (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; Out: D0.L DMA command in high word, DMA request count in low word
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;
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; Notes: The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GetCCOperation
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move.l DBDMADescriptor.operation(a0),d0
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endsw.l d0
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _GetCCAddress (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; Out: D0.L 32-bit address
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;
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; Notes: The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GetCCAddress
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move.l DBDMADescriptor.address(a0),d0
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endsw.l d0
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _GetCCData32 (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; Out: D0.L 32-bit data word from LOAD_QUAD
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;
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; Notes: The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GetCCData32
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move.l DBDMADescriptor.data32(a0),d0
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endsw.l d0
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _GetCCResult (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; Out: D0.L DMA status in high word, DMA residual count in low word
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;
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; Notes: The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GetCCResult
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move.l DBDMADescriptor.result(a0),d0
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endsw.l d0
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _SetChannelControl (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; D0.L sum of desired DB-DMA control words
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;
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; Notes: D0 is not guaranteed to be preserved.
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; The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_SetChannelControl
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with DBDMAChannelRegisters
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endsw.l d0
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move.l d0,channelControl(a0) ; store channel control
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nop ; eieio
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endwith
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _GetChannelStatus (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; Out: D0.L sum of DB-DMA status flags
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;
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; Notes: The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GetChannelStatus
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with DBDMAChannelRegisters
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move.l channelStatus(a0),d0 ; recover channel status
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endsw.l d0
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endwith
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _GetCommandPtr (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; Out: D0.L pointer to the current descriptor in the channel command list
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;
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; Notes: The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_GetCommandPtr
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with DBDMAChannelRegisters
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move.l commandPtrLo(a0),d0 ; pointer to next descriptor in list
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endsw.l d0
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endwith
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endm
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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; _SetCommandPtr (macro)
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;
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; In: A0 pointer to a DB-DMA channel register set
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; D0.L pointer to an initialized channel command list
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;
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; Notes: D0 is not guaranteed to be preserved.
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; The macro generates code for either big-endian or little-endian storage.
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; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
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macro
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_SetCommandPtr
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with DBDMAChannelRegisters
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endsw.l d0
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move.l d0,commandPtrLo(a0) ; pointer to first descriptor in list
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nop ; eieio
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endwith
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endm
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|
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||
|
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ENDIF ; __INCLUDINGDBDMA__
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