124 lines
4.8 KiB
Plaintext
Raw Normal View History

2019-06-29 23:17:50 +08:00
;
; File: TFBDepVideoEqu.a
;
; Contains: Hardware-specific equates for the TFB Declaration ROM and Video Driver.
;
; Written by: George Norman, Dave Fung, Mike Puckett
;
; Copyright: © 1986-1992 by Apple Computer, Inc., all rights reserved.
;
; Change History (most recent first):
;
; <SM2> 09-24-92 jmp Strange problem: On 040 CPUs the TFBResetReg is seen only on
; byte-lane 3 (as would be expected), but on 020/030 CPUs, the
; TFBResetReg MUST be smeared from byte-lane zero. So, for the
; moment, Ive “fixed” this problem with a conditional. In the
; future, we should perhaps do this dynamically in the code (i.e.,
; so the build will work for both ROMs and Systems).
; <4> 8/21/91 JSM Clean up header.
; <3> 4/3/91 jmp When I was doing the byte-smearing fixes, I didnt offset the
; TFB reset register correctly; i.e., TFBResetReg is one of the -3
; instead of +3 offsets: TFB is weird.
; <2> 3/22/91 jmp Rolled in the current TERROR ROM version of the TFBDriver (for
; fixing a “screen tearing” problem at SetEntries time).
; <1> 11/5/90 jmp first checked in
; <2> 11/2/90 jmp Made changes so that the TFB Driver would no longer rely on the
; byte-smearing properties of the 68020/68030 to do its thing.
; <1.0> 11/16/88 CCH Added to EASE.
; 12/18/86 EHB Fixed resolution constants Changed mBaseOffset from 4 to 32
; <C773/09Feb87 GWN> Set DisableVInt to proper value.
; <PB283/19Aug87 DAF> Removed ROM equ since it conflicts with
; system build (Arrgh...)
; <C501> 12/10/86 GWN Added DisableVInt.
; <C463> 11/19/86 GWN Changed mBaseOffset from 0 to 4.................last time.
; <C441> 11/19/86 GWN Changed mBaseOffset from 0 to 4.
; <C444> 11/19/86 GWN Changed mBaseOffset from 4 to 0.
; <C336> 11/3/86 GWN Changed to new Video parameters as described in video card spec.
; (1,2,4 and 8-bit modes supported). Added mVertRefRate to video
; parameters. Changed to new SDM format header (ByteLanes field).
; Changed to 4-k ROM. Video driver is on ROM. Fixed video driver
; bugs: (1) SetEntries trash A0, (2) SetEntries/GetEntries Data
; NOT.;
;
CurTFBDrvrVersion EQU 5 ;Used for override purposes.
ROMSize EQU $1000 ;TFB is 4Kbyte ROM.
TFBBoardId EQU $0005 ;TFB Board Id.
sRsrcBoard EQU 1 ;Board sResource {May be any number in [0..127]}
sRsrcVideo8 EQU 128 ;Video sResource {May be any number in [128..254]}
sRsrcVideo4 EQU 129 ;Another Video sResource (for 4-bit TFB card)
TFBTestPos EQU (265*1024)-4 ;Position to test for 256K vs. 512K of VRAM.
TFBTestPat EQU 'MAC2' ;Test pattern.
; Parameter definitions {For Primary init}
;
defScrnRow EQU $0080 ;Bytes per pixel line <C441/19Nov86 GWN>
defMinorBase EQU 0 ;Video RAM Offset is 32 <C441/19Nov86 GWN>
defMinorLength4 EQU $40000 ;Video RAM length is $40000 <C441/19Nov86 GWN>
defMinorLength8 EQU $80000 ;Video RAM length is $80000 for 8-bit cards. <jmp>
; Parameter definitions {New ones}
;
defmBaseOffset EQU 32 ;Offset to base of video RAM <C441/19nov86><C444/19Nov86 GWN>
defmBounds_T EQU 0 ;Bounds.Top
defmBounds_L EQU 0 ;Bounds.Left
defmBounds_B EQU 480 ;Bounds.Bottom
defmBounds_R EQU 640 ;Bounds.Right
defVersion EQU 0 ;Version = 0
defmHRes EQU $480000 ;Horizontal Pixels/inch
defmVRes EQU $480000 ;Vertical pixels/inch
defPixelType EQU 0 ;0 = Chunky
defCmpCount EQU 1 ;Number of components in pixel
defCmpSize EQU 1 ;Number of bits per component
defmPlaneBytes EQU 0 ;Offset from one plane to the next.
defmPageCnt EQU 1 ;Total number of pages
defmVertRefRate EQU 67 ;Vert refresh rate
defmDevType EQU 0 ;0 = CLUTType
; Hardware definitions (+3 to fix the fact the byte-smearing doesnt happen
; on machines with MC68040 processors).
;
TFBIBase EQU $8FFFC+3
TFBBase EQU $80000+3
ClrTbl EQU $90000+3
ClrVInt EQU $A0000+3
DisableVInt EQU $A0004+3
IntIcOn EQU $B0000+3
IntIcOff EQU $C0000+3
RdVSync EQU $D0000+3
RdVInt EQU $D0004+3
RdIntIc EQU $D0008+3
; TFB Registers -- these are relative to dCtlDevBase+TFBBase (the -3s are due
; to the fact that these addresses are in fact relative to the 0th addresses
; shown above. Ugh.)
;
wCLUTDataReg EQU $18-3
wCLUTAddReg EQU $1C-3
rCLUTDataReg EQU $28-3
rCLUTAddReg EQU $2C-3
; The following are also TFB registers; they control where the video page actually
; starts.
;
wBaseOfstHi EQU $08
wBaseOfstLo EQU $0C
; Misc. TFB Constants. See the comments above about why -3 is used.
;
If Not ForROM Then
TFBResReg EQU $3C-3 ;offset to reset register
Else
TFBResReg EQU $3C ;offset to reset register
Endif
TFBReset EQU $B7 ;value to write for reset