; ; File: DBDMA.a ; ; Contains: public headers defining the Descriptor Based DMA standard ; ; Written by: Craig Prouse ; ; Copyright: © 1993-1994 by Apple Computer, Inc., all rights reserved. ; ; Change History (most recent first): ; ; 1/10/94 chp Comment out WAIT command value. This identifier conflicts with ; something in SonyEqu.a that should be encapsulated in a record. ; However, WAIT may soon be obsolete anyway. ; 12/13/93 chp Add TStat encodings. ; 11/10/93 fau first checked in ; 10/26/93 chp Checking in the first “complete” version. Some macros changed ; for compatibility with C equivalents. ; ; IF &TYPE('__INCLUDINGDBDMA__') = 'UNDEFINED' THEN __INCLUDINGDBDMA__ SET 1 IF &TYPE('__INCLUDINGENDIANAWARE__') = 'UNDEFINED' THEN INCLUDE 'EndianAware.a' ENDIF ; This structure defines the standard set of DB-DMA channel registers. DBDMAChannelRegisters record 0 channelControl ds.l 1 channelStatus ds.l 1 commandPtrHi ds.l 1 ; implementation optional commandPtrLo ds.l 1 dataPtrHi ds.l 1 ; implementation optional dataPtrLo ds.l 1 byteCount ds.l 1 reserved1 ds.l 1 data2PtrHi ds.l 1 ; implementation optional data2PtrLo ds.l 1 ; implementation optional transferModes ds.l 1 ; implementation optional addressHi ds.l 1 ; implementation optional reserved2 ds.l 4 unimplemented ds.l 16 ; This structure must remain fully padded to 256 bytes. undefined ds.l 32 IF * <> 256 THEN AERROR ('DBDMAChannelRegisters is the wrong size!') ENDIF endr ; These constants define the DB-DMA channel control words and status flags. kdbdmaSetRun equ $80008000 kdbdmaClrRun equ $80000000 kdbdmaSetPause equ $40004000 kdbdmaClrPause equ $40000000 kdbdmaClrHalted equ $20000000 kdbdmaClrDead equ $10000000 kdbdmaSetActive equ $08000800 kdbdmaSetS3 equ $00080008 kdbdmaClrS3 equ $00080000 kdbdmaSetS2 equ $00040004 kdbdmaClrS2 equ $00040000 kdbdmaSetS1 equ $00020002 kdbdmaClrS1 equ $00020000 kdbdmaSetS0 equ $00010001 kdbdmaClrS0 equ $00010000 kdbdmaClrAll equ $F00F0000 kdbdmaHalted equ $2000 kdbdmaDead equ $1000 kdbdmaActive equ $0800 kdbdmaPaused equ $0400 kTStatMore equ $0000 kTStatDone equ $0100 kTStatDiff equ $0200 kTStatError equ $0300 kdbdmaTStatMask equ $0300 kdbdmaS3 equ $0008 kdbdmaS2 equ $0004 kdbdmaS1 equ $0002 kdbdmaS0 equ $0001 ; This structure defines the DB-DMA channel command descriptor. ; *** WARNING: Endian-ness issues must be considered when performing load/store! *** ; *** DB-DMA specifies memory organization as quadlets so it is not correct ; *** to think of either the operation or result field as two 16-bit fields. ; *** This would have undesirable effects on the byte ordering within their ; *** respective quadlets. DBDMADescriptor record 0 operation ds.l 1 ; MSW = command, LSW = reqCount address ds.l 1 data32 ds.l 1 result ds.l 1 ; MSW = xferStatus, LSW = resCount size equ * endr ; These constants define the DB-DMA channel command operations and modifiers. ; Command.cmd operations OUTPUT_MORE equ $0000 OUTPUT_LAST equ $0100 INPUT_MORE equ $0200 INPUT_LAST equ $0300 STORE_QUAD equ $0400 LOAD_QUAD equ $0500 JUMP equ $0600 ;WAIT equ $0700 STOP equ $0800 kdbdmaCmdMask equ $0F00 ; Command.test modifiers (choose all that apply) kTestMore equ $1000 kTestDone equ $2000 kTestDiff equ $4000 kTestError equ $8000 kdbdmaTestMask equ $F000 ; Command.i modifiers (choose one) kIntError equ $0000 ; default modifier kIntErrorDiff equ $0040 kIntErrorDiffDone equ $0080 kIntAll equ $00C0 kdbdmaIMask equ $00C0 ; Command.h modifiers (choose one) kHaltError equ $0000 ; default modifier kHaltErrorDiff equ $0010 kHaltErrorDiffDone equ $0020 kHaltNone equ $0030 kdbdmaHMask equ $0030 ; Command.cdep.key modifiers (choose one for INPUT, OUTPUT, LOAD, and STORE operations) KEY_STREAM0 equ $0000 ; default modifier KEY_STREAM1 equ $0001 KEY_STREAM2 equ $0002 KEY_STREAM3 equ $0003 KEY_REGS equ $0005 KEY_SYSTEM equ $0006 KEY_DEVICE equ $0007 kdbdmaKeyMask equ $0007 ; Command.cdep.cond modifiers (choose all that apply for JUMP and WAIT operations) kFailZerosFailOnes equ $0001 kFailZerosPassOnes equ $0002 kPassZerosFailOnes equ $0004 kPassZerosPassOnes equ $0008 kdbdmaCondMask equ $000F ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _MakeCCDescriptor (macro) ; ; In: A0 pointer to a channel command descriptor buffer ; D0.L DMA command in high word, DMA request count in low word ; A1 DMA address ; ; Notes: D0/D1 are never preserved. ; The macro generates code for either big-endian or little-endian storage. ; The command field must be written to memory last for STOP replacement. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _MakeCCDescriptor adda.w #DBDMADescriptor.size,a0 clr.l -(a0) ; initialize status and residual count clr.l -(a0) ; data32 is usually reserved move.l a1,d1 endsw.l d1 move.l d1,-(a0) ; address nop endsw.l d0 move.l d0,-(a0) ; command and count nop endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _MakeData32CCDescriptor (macro) ; ; In: A0 pointer to a channel command descriptor buffer ; D0.L DMA command in high word, DMA reqCount in low word ; D1.L 32-bit data word for STORE_QUAD ; A1 DMA address ; ; Notes: D0/D1 are never preserved. ; The macro generates code for either big-endian or little-endian storage. ; The command field must be written to memory last for STOP replacement. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _MakeData32CCDescriptor adda.w #DBDMADescriptor.size,a0 clr.l -(a0) ; initialize status and residual count endsw.l d1 move.l d1,-(a0) ; data32 move.l a1,d1 endsw.l d1 move.l d1,-(a0) ; address nop endsw.l d0 move.l d0,-(a0) ; command and count nop endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _GetCCOperation (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; Out: D0.L DMA command in high word, DMA request count in low word ; ; Notes: The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _GetCCOperation move.l DBDMADescriptor.operation(a0),d0 endsw.l d0 endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _GetCCAddress (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; Out: D0.L 32-bit address ; ; Notes: The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _GetCCAddress move.l DBDMADescriptor.address(a0),d0 endsw.l d0 endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _GetCCData32 (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; Out: D0.L 32-bit data word from LOAD_QUAD ; ; Notes: The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _GetCCData32 move.l DBDMADescriptor.data32(a0),d0 endsw.l d0 endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _GetCCResult (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; Out: D0.L DMA status in high word, DMA residual count in low word ; ; Notes: The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _GetCCResult move.l DBDMADescriptor.result(a0),d0 endsw.l d0 endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _SetChannelControl (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; D0.L sum of desired DB-DMA control words ; ; Notes: D0 is not guaranteed to be preserved. ; The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _SetChannelControl with DBDMAChannelRegisters endsw.l d0 move.l d0,channelControl(a0) ; store channel control nop ; eieio endwith endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _GetChannelStatus (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; Out: D0.L sum of DB-DMA status flags ; ; Notes: The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _GetChannelStatus with DBDMAChannelRegisters move.l channelStatus(a0),d0 ; recover channel status endsw.l d0 endwith endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _GetCommandPtr (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; Out: D0.L pointer to the current descriptor in the channel command list ; ; Notes: The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _GetCommandPtr with DBDMAChannelRegisters move.l commandPtrLo(a0),d0 ; pointer to next descriptor in list endsw.l d0 endwith endm ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… ; _SetCommandPtr (macro) ; ; In: A0 pointer to a DB-DMA channel register set ; D0.L pointer to an initialized channel command list ; ; Notes: D0 is not guaranteed to be preserved. ; The macro generates code for either big-endian or little-endian storage. ; …………………………………………………………………………………………………………………………………………………………………………………………………………………… macro _SetCommandPtr with DBDMAChannelRegisters endsw.l d0 move.l d0,commandPtrLo(a0) ; pointer to first descriptor in list nop ; eieio endwith endm ENDIF ; __INCLUDINGDBDMA__