; ; File: TFBPrimaryInit.a ; ; Contains: PrimaryInit code for the original Macintosh II Video Card. ; ; Written by: Ernie Beernik, George Norman, Dave Fung, Mike Puckett. ; ; Copyright: © 1990-1992 by Apple Computer, Inc. All rights reserved. ; ; This file is used in these builds: ROM ; ; Change History (most recent first): ; ; 11/18/92 SWC Changed SlotEqu.a->Slots.a and VideoEqu.a->Video.a. ; <2> 1/15/92 KC Repair "uncompleted conditional directive" error. ; <1> 1/8/92 RB first checked in ; ——————————————————————————————————————————————————————————————————————————————————————— ; Terror ROM comments begin here. ; ——————————————————————————————————————————————————————————————————————————————————————— ; <5> 4/4/91 jmp Cleaned up the conditional assembly stuff (i.e., now use ForRom ; instead of PadForOverPatch). ; <4> 2/10/91 jmp Added interrupt disabling code during write to the CLUT (like ; the driver code). ; <3> 1/7/91 jmp Replaced an RTS that was accidently deleted. ; <2> 1/6/91 jmp Cleaned up conditional assembly stuff. ; <1> 11/19/90 jmp Checked into TERROR ROM build for the first time. ; ——————————————————————————————————————————————————————————————————————————————————————— ; Pre-Terror ROM comments begin here. ; ——————————————————————————————————————————————————————————————————————————————————————— ; 2/13/87 DAF Changed CPUType to 68020 ; 2/9/87 GWN Set mode to One-bit (Copied from Driver). Disabled interrupts. ; 2/2/87 DAF Added test for amount of RAM and adjusted slot rsrc table for ; appropriate size. ; 12/11/86 GWN Modified for new seBlock. ; 11/3/86 GWN Changed to new Video parameters as described in video card spec. ; (1,2,4 and 8-bit modes supported). Added mVertRefRate to video ; parameters. Changed to new SDM format header (ByteLanes field). ; Changed to 4-k ROM. Video driver is on ROM. Fixed video driver ; bugs: (1) SetEntries trash A0, (2) SetEntries/GetEntries Data NOT.; ; 9/19/86 GWN Removed interrupt handler. ; 7/21/86 EHB TFB support. ; If ForRom THEN LOAD 'StandardEqu.d' PRINT OFF INCLUDE 'ROMEqu.a' INCLUDE 'Slots.a' INCLUDE 'Video.a' INCLUDE 'TFBDepVideoEqu.a' PRINT ON TFBPrimaryInit Proc Export Bra.s Begin Else ;------------------------------------------------------------------- ; Header ;------------------------------------------------------------------- DC.B sExec2 ;Code revision (Primary init) DC.B sCPU68020 ;CPU type is 68020 DC.W 0 ;Reserved DC.L Begin-* ;Offset to code. Endif ;------------------------------------------------------------------- ; Tables ;------------------------------------------------------------------- ; TFB Initialization. This data comes from the Macintosh II Video Card Theory of Operations, dated ; 02/16/87, page 7. These values should only be loaded into TFB (from CardBase+TFBIBase) at system ; reset time. ; InitTbl DC.B $DF,$B8,$FF,$FF,$E1,$1A,$88,$B9,$FA,$FD,$FD,$FE,$F0,$BE,$FA,$37 EndInitTbl SizeInitTbl EQU EndInitTbl-InitTbl ; One-bit Mode Table. These values are given on page 6 of the Macintosh II Video Card Theory of ; Opertaions document. ; OneBitTbl DC.B $20,$47,$00,defmBaseOffset/4,$1E,$E5,$77,$46,$05,$02,$02,$01,$0F,$41,$05,$C8 End1BitTbl Size1BitTbl EQU End1BitTbl-OneBitTbl ;------------------------------------------------------------------- ; PrimaryInit ;------------------------------------------------------------------- ; Set initial vendor status and save vars. ; WITH seBlock Begin If ForRom Then ; For Terror ROM, PrimaryInit is NOT executed thru _sExec. SaveRegs Reg A0-A2/D0-D3 ; So, we need to save our work registers. Movem.l SaveRegs,-(Sp) Endif MOVE.W #1,seStatus(A0) ;VendorStatus <- 1 {Code was executed} MOVE.L A0,A3 ;save param block {A0 is destroyed} ; Turn the slot number into a base address. Note: When finished, A2 contains slotBase. ; MOVEQ #0,D0 ;D0 <- 00000000 MOVE.B seSlot(A0),D0 ;D0 <- 0000000s LSL.W #4,D0 ;D0 <- 000000s0 OR.B seSlot(A0),D0 ;D0 <- 000000ss OR.W #$F00,D0 ;D0 <- 00000Fss SWAP D0 ;D0 <- 0Fss0000 LSL.L #4,D0 ;D0 <- Fss00000 MOVE.L D0,A2 ;A2 <- Base address to the slot. ; Reset the hardware. ; MOVE.L A2,A0 ;get slot base ADD.L #TFBIBase,A0 ;point to registers LEA InitTbl,A1 ;get data pointer MOVEQ #(SizeInitTbl-1),D0 ;set init table size @0 MOVE.B (A1)+,(A0) ;set one byte SUBQ #4,A0 ;back up to prev register DBRA D0,@0 ;repeat until done ; Set mode to one bit per pixel. ; MOVE.L A2,A0 ;get slot base ADD.L #TFBBase,A0 ;point to registers LEA OneBitTbl,A1 ;point to depth data MOVEQ #(Size1BitTbl-1),D0 ;set 1-bit table size @1 MOVE.B (A1)+,D1 ;get a byte NOT.B D1 ;invert it MOVE.B D1,(A0) ;write one byte ADDQ #4,A0 ;bump to next register DBRA D0,@1 ;=>repeat until done ; Disable interrupts. ; MOVE.L A2,A0 ;get slot base ADD.L #DisableVInt,A0 ;Adjust the base CLR.B (A0) ;Disable interrupt from card MOVE.W SR,-(SP) ; preserve the status register MOVEQ #7,D0 ; get mask in D0 AND.B (SP),D0 ; get the interrupt level SUBQ.B #2,D0 ; BGE.S @OK ; if ≥, then don't change ORI.W #$0200,SR ; raise above level-2 ANDI.W #$FAFF,SR ; make it level-2 @OK ; Load CLUT as half-white/half-black. ; DoTbl MOVE.L A2,A0 ;get slot base Add.l #ClrTbl,A0 ;point to clut address space. Moveq #0,D0 ;Start at address 0 in the CLUT: Not.b D0 ; Invert for Nubus, and Move.b D0,wClutAddReg(A0) ; write it out. Add.l #wClutDataReg,A0 ;point to clut data reg. MOVEQ #-1,D1 ;first half of table is FF (-1) MOVE #128*3-1,D0 ;do all values in table (*3 for r,g,b) @0 MOVE.B D1,(A0) ;write next byte DBRA D0,@0 ;=>repeat until done MOVEQ #$00,D1 ;second half of table is 00 MOVE #128*3-1,D0 ;do all values in table (*3 for r,g,b) @1 MOVE.B D1,(A0) ;write next byte DBRA D0,@1 ;=>repeat until done MOVE.W (SP)+,SR ; restore status register. ; Size the RAM on the video card. To do this, we look for a nice longword in the second ; half of the frame buffer array that doesn't show up on the screen. I've selected the ; last longword of the first scanline that is a multiple of 8 in the second RAM bank (line 264). ; This alignment guarantees that this memory is off the right edge in all pixel depths ; when the frame buffer base addr is on a normal page boundary. ; ; DAF ; WITH spBlock ;use the template SizeTestVRAM SUBA #spBlockSize,SP ;make an SDM parameter block on stack MOVE.L SP,A0 ;get pointer to parm block now MOVE.B seSlot(A3),spSlot(A0) ;put slot in pBlock CLR.B spExtDev(A0) ;external device = 0 MOVE.L #TFBTestPos,D1 ;get offset in D1 MOVE.L #TFBTestPat,(A2,D1.L) ;write to alleged RAM MOVE.L #-1,-(SP) ;write out some garbage to clear data lines ADDQ #4,SP ;and pitch it MOVE.L (A2,D1.L),D0 ;read pattern back CMP.L #TFBTestPat,D0 ;did it stick? BEQ.S @1 ;if equal, we have ram MOVE.B #sRsrcVideo8,spID(A0) ;if not, remove 8-bit table BRA.S @2 @1 CLR.B (A2,D1.L) ;clear RAM of test pattern (for MaxAppleZoom) MOVE.B #sRsrcVideo4,spID(A0) ;remove 4-bit table if we have ram @2 _sDeleteSRTRec ;remove the invalid entry BNE.S @3 ; MOVE #2,seStatus(A3) ;mark the change @3 ADDA #spBlockSize,SP ;clean up the caca... ; Clear video RAM to a nice gray… ; MOVE.L #$AAAAAAAA,D0 ;1-bit graypattern ($A=b1010) MOVE.L D0,D1 NOT.L D1 MOVE.W #defScrnRow,D4 ;sRow := defScrnRow {Bytes per pixel line} MOVE.W #$200*4-1,D3 ;sHei := defScrnHeight {Screen Height in pixels} MOVE.L A2,A1 ;init row pointer ;REPEAT @nxtRow MOVE.L A1,A0 ;get next row MOVE.W #defScrnRow/4-1,D2 ; rowlongs := defScrnRow/4 - 1 {How many Longs there are} @nxtLong MOVE.L D0,(A0)+ ; (A0) := graypat(1/2) DBF D2,@nxtLong ; UNTIL rowlongs < 0 EXG D0,D1 ; graypat1 <-> graypat2 ADD.W D4,A1 ; A2 := A2 + sRow DBF D3,@nxtRow ;UNTIL sHei < 0 If ForRom Then Movem.l (Sp)+,SaveRegs Endif RTS If ForRom Then Endp Endif End ; <2>